Index: head/sys/arm/arm/cpu_asm-v6.S =================================================================== --- head/sys/arm/arm/cpu_asm-v6.S (nonexistent) +++ head/sys/arm/arm/cpu_asm-v6.S (revision 276336) @@ -0,0 +1,200 @@ +/*- + * Copyright 2014 Svatopluk Kraus + * Copyright 2014 Michal Meloun + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include +#include +#include +#include + +#if __ARM_ARCH >= 7 + +/* + * Define cache functions used by startup code, which counts on the fact that + * only r0-r4,r12 (ip) are modified and no stack space is used. This set + * of function must be called with interrupts disabled and don't follow + * ARM ABI (cannot be called form C code. + * Moreover, it works only with caches integrated to CPU (accessible via CP15). + */ + +/* Invalidate D cache to PoC. (aka all cache levels)*/ +ASENTRY(dcache_inv_poc_all) + mrc CP15_CLIDR(r0) + ands r0, r0, #0x07000000 + mov r0, r0, lsr #23 /* Get LoC (naturally aligned) */ + beq 4f + +1: mcr CP15_CSSELR(r0) /* set cache level */ + isb + mrc CP15_CCSIDR(r0) /* read CCSIDR */ + + ubfx r2, r0, #13, #15 /* get num sets - 1 from CCSIDR */ + ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */ + clz r1, r3 /* number of bits to MSB of way */ + lsl r3, r3, r1 /* shift into position */ + mov ip, #1 + lsl ip, ip, r1 /* ip now contains the way decr */ + + ubfx r0, r0, #0, #3 /* get linesize from CCSIDR */ + add r0, r0, #4 /* apply bias */ + lsl r2, r2, r0 /* shift sets by log2(linesize) */ + add r3, r3, r2 /* merge numsets - 1 with numways - 1 */ + sub ip, ip, r2 /* subtract numsets - 1 from way decr */ + mov r1, #1 + lsl r1, r1, r0 /* r1 now contains the set decr */ + mov r2, ip /* r2 now contains set way decr */ + + /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */ +2: mcr CP15_DCISW(r3) /* invalidate line */ + movs r0, r3 /* get current way/set */ + beq 3f /* at 0 means we are done */ + movs r0, r0, lsl #10 /* clear way bits leaving only set bits*/ + subne r3, r3, r1 /* non-zero?, decrement set */ + subeq r3, r3, r2 /* zero?, decrement way and restore set count */ + b 2b + +3: + mrc CP15_CSSELR(r0) /* get cache level */ + add r0, r0, #2 /* next level */ + mrc CP15_CLIDR(r1) + ands r1, r1, #0x07000000 + mov r1, r1, lsr #23 /* Get LoC (naturally aligned) */ + cmp r1, r0 + bgt 1b + +4: dsb /* wait for stores to finish */ + mov r0, #0 + mcr CP15_CSSELR(r0) + isb + bx lr +END(dcache_inv_poc_all) + +/* Invalidate D cache to PoU. (aka L1 cache only)*/ +ASENTRY(dcache_inv_pou_all) + mrc CP15_CLIDR(r0) + ands r0, r0, #0x07000000 + mov r0, r0, lsr #26 /* Get LoUU (naturally aligned) */ + beq 4f + +1: mcr CP15_CSSELR(r0) /* set cache level */ + isb + mrc CP15_CCSIDR(r0) /* read CCSIDR */ + + ubfx r2, r0, #13, #15 /* get num sets - 1 from CCSIDR */ + ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */ + clz r1, r3 /* number of bits to MSB of way */ + lsl r3, r3, r1 /* shift into position */ + mov ip, #1 + lsl ip, ip, r1 /* ip now contains the way decr */ + + ubfx r0, r0, #0, #3 /* get linesize from CCSIDR */ + add r0, r0, #4 /* apply bias */ + lsl r2, r2, r0 /* shift sets by log2(linesize) */ + add r3, r3, r2 /* merge numsets - 1 with numways - 1 */ + sub ip, ip, r2 /* subtract numsets - 1 from way decr */ + mov r1, #1 + lsl r1, r1, r0 /* r1 now contains the set decr */ + mov r2, ip /* r2 now contains set way decr */ + + /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */ +2: mcr CP15_DCISW(r3) /* clean & invalidate line */ + movs r0, r3 /* get current way/set */ + beq 3f /* at 0 means we are done */ + movs r0, r0, lsl #10 /* clear way bits leaving only set bits*/ + subne r3, r3, r1 /* non-zero?, decrement set */ + subeq r3, r3, r2 /* zero?, decrement way and restore set count */ + b 2b + +3: + mrc CP15_CSSELR(r0) /* get cache level */ + add r0, r0, #2 /* next level */ + mrc CP15_CLIDR(r1) + ands r1, r1, #0x07000000 + mov r1, r1, lsr #26 /* Get LoUU (naturally aligned) */ + cmp r1, r0 + bgt 1b + +4: dsb /* wait for stores to finish */ + mov r0, #0 + mcr CP15_CSSELR(r0) + bx lr +END(dcache_inv_pou_all) + +/* Write back and Invalidate D cache to PoC. */ +ASENTRY(dcache_wbinv_poc_all) + mrc CP15_CLIDR(r0) + ands r0, r0, #0x07000000 + mov r0, r0, lsr #23 /* Get LoC (naturally aligned) */ + beq 4f + +1: mcr CP15_CSSELR(r0) /* set cache level */ + isb + mrc CP15_CCSIDR(r0) /* read CCSIDR */ + + ubfx r2, r0, #13, #15 /* get num sets - 1 from CCSIDR */ + ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */ + clz r1, r3 /* number of bits to MSB of way */ + lsl r3, r3, r1 /* shift into position */ + mov ip, #1 + lsl ip, ip, r1 /* ip now contains the way decr */ + + ubfx r0, r0, #0, #3 /* get linesize from CCSIDR */ + add r0, r0, #4 /* apply bias */ + lsl r2, r2, r0 /* shift sets by log2(linesize) */ + add r3, r3, r2 /* merge numsets - 1 with numways - 1 */ + sub ip, ip, r2 /* subtract numsets - 1 from way decr */ + mov r1, #1 + lsl r1, r1, r0 /* r1 now contains the set decr */ + mov r2, ip /* r2 now contains set way decr */ + + /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */ +2: mcr CP15_DCCISW(r3) /* clean & invalidate line */ + movs r0, r3 /* get current way/set */ + beq 3f /* at 0 means we are done */ + movs r0, r0, lsl #10 /* clear way bits leaving only set bits*/ + subne r3, r3, r1 /* non-zero?, decrement set */ + subeq r3, r3, r2 /* zero?, decrement way and restore set count */ + b 2b + +3: + mrc CP15_CSSELR(r0) /* get cache level */ + add r0, r0, #2 /* next level */ + mrc CP15_CLIDR(r1) + ands r1, r1, #0x07000000 + mov r1, r1, lsr #23 /* Get LoC (naturally aligned) */ + cmp r1, r0 + bgt 1b + +4: dsb /* wait for stores to finish */ + mov r0, #0 + mcr CP15_CSSELR(r0) + bx lr +END(dcache_wbinv_poc_all) + +#endif /* __ARM_ARCH >= 7 */ Property changes on: head/sys/arm/arm/cpu_asm-v6.S ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/conf/files.arm =================================================================== --- head/sys/conf/files.arm (revision 276335) +++ head/sys/conf/files.arm (revision 276336) @@ -1,104 +1,105 @@ # $FreeBSD$ arm/arm/autoconf.c standard arm/arm/bcopy_page.S standard arm/arm/bcopyinout.S standard arm/arm/blockio.S standard arm/arm/bootconfig.c standard arm/arm/bus_space_asm_generic.S standard arm/arm/busdma_machdep.c optional !armv6 arm/arm/busdma_machdep-v6.c optional armv6 arm/arm/copystr.S standard arm/arm/cpufunc.c standard arm/arm/cpufunc_asm.S standard arm/arm/cpufunc_asm_armv4.S standard arm/arm/cpuinfo.c standard +arm/arm/cpu_asm-v6.S optional armv6 arm/arm/db_disasm.c optional ddb arm/arm/db_interface.c optional ddb arm/arm/db_trace.c optional ddb arm/arm/devmap.c standard arm/arm/disassem.c optional ddb arm/arm/dump_machdep.c standard arm/arm/elf_machdep.c standard arm/arm/elf_note.S standard arm/arm/exception.S standard arm/arm/fiq.c standard arm/arm/fiq_subr.S standard arm/arm/fusu.S standard arm/arm/gdb_machdep.c optional gdb arm/arm/identcpu.c standard arm/arm/in_cksum.c optional inet | inet6 arm/arm/in_cksum_arm.S optional inet | inet6 arm/arm/intr.c standard arm/arm/locore.S standard no-obj arm/arm/machdep.c standard arm/arm/mem.c optional mem arm/arm/minidump_machdep.c optional mem arm/arm/mp_machdep.c optional smp arm/arm/nexus.c standard arm/arm/physmem.c standard arm/arm/pl190.c optional pl190 arm/arm/pl310.c optional pl310 arm/arm/platform.c optional platform arm/arm/platform_if.m optional platform arm/arm/pmap.c optional !armv6 arm/arm/pmap-v6.c optional armv6 arm/arm/sc_machdep.c optional sc arm/arm/setcpsr.S standard arm/arm/setstack.s standard arm/arm/stack_machdep.c optional ddb | stack arm/arm/stdatomic.c standard \ compile-with "${NORMAL_C:N-Wmissing-prototypes}" arm/arm/support.S standard arm/arm/swtch.S standard arm/arm/sys_machdep.c standard arm/arm/syscall.c standard arm/arm/trap.c standard arm/arm/uio_machdep.c standard arm/arm/undefined.c standard arm/arm/vm_machdep.c standard arm/arm/vfp.c standard board_id.h standard \ dependency "$S/arm/conf/genboardid.awk $S/arm/conf/mach-types" \ compile-with "${AWK} -f $S/arm/conf/genboardid.awk $S/arm/conf/mach-types > board_id.h" \ no-obj no-implicit-rule before-depend \ clean "board_id.h" cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs compile-with "${ZFS_C}" crypto/blowfish/bf_enc.c optional crypto | ipsec crypto/des/des_enc.c optional crypto | ipsec | netsmb dev/fb/fb.c optional sc dev/fdt/fdt_arm_platform.c optional platform fdt dev/hwpmc/hwpmc_arm.c optional hwpmc dev/kbd/kbd.c optional sc | vt dev/syscons/scgfbrndr.c optional sc dev/syscons/scterm-teken.c optional sc dev/syscons/scvtb.c optional sc dev/uart/uart_cpu_fdt.c optional uart fdt font.h optional sc \ compile-with "uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x16.fnt && file2c 'u_char dflt_font_16[16*256] = {' '};' < ${SC_DFLT_FONT}-8x16 > font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x14.fnt && file2c 'u_char dflt_font_14[14*256] = {' '};' < ${SC_DFLT_FONT}-8x14 >> font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x8.fnt && file2c 'u_char dflt_font_8[8*256] = {' '};' < ${SC_DFLT_FONT}-8x8 >> font.h" \ no-obj no-implicit-rule before-depend \ clean "font.h ${SC_DFLT_FONT}-8x14 ${SC_DFLT_FONT}-8x16 ${SC_DFLT_FONT}-8x8" kern/subr_busdma_bufalloc.c standard kern/subr_dummy_vdso_tc.c standard kern/subr_sfbuf.c standard libkern/arm/aeabi_unwind.c standard libkern/arm/divsi3.S standard libkern/arm/ffs.S standard libkern/arm/ldivmod.S standard libkern/arm/ldivmod_helper.c standard libkern/arm/memcpy.S standard libkern/arm/memset.S standard libkern/arm/muldi3.c standard libkern/ashldi3.c standard libkern/ashrdi3.c standard libkern/divdi3.c standard libkern/ffsl.c standard libkern/fls.c standard libkern/flsl.c standard libkern/flsll.c standard libkern/lshrdi3.c standard libkern/moddi3.c standard libkern/qdivrem.c standard libkern/ucmpdi2.c standard libkern/udivdi3.c standard libkern/umoddi3.c standard