Index: head/sys/arm/freescale/imx/imx51_iomuxvar.h =================================================================== --- head/sys/arm/freescale/imx/imx51_iomuxvar.h (revision 271099) +++ head/sys/arm/freescale/imx/imx51_iomuxvar.h (nonexistent) @@ -1,45 +0,0 @@ -/*- - * Copyright (c) 2012, 2013 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Oleksandr Rybalko - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* iomux utility functions */ -struct iomux_conf { - u_int pin; -#define IOMUX_CONF_EOT ((u_int)(-1)) - u_short mux; - u_short pad; -}; - -void iomux_set_function(u_int, u_int); -void iomux_set_pad(u_int, u_int); -#ifdef notyet -void iomux_set_input(u_int, u_int); -#endif -void iomux_mux_config(const struct iomux_conf *); Property changes on: head/sys/arm/freescale/imx/imx51_iomuxvar.h ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/arm/freescale/imx/files.imx51 =================================================================== --- head/sys/arm/freescale/imx/files.imx51 (revision 271099) +++ head/sys/arm/freescale/imx/files.imx51 (revision 271100) @@ -1,52 +1,52 @@ # $FreeBSD$ arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_generic.c standard arm/arm/cpufunc_asm_armv5.S standard arm/arm/cpufunc_asm_arm11.S standard arm/arm/cpufunc_asm_armv7.S standard kern/kern_clocksource.c standard # Init arm/freescale/imx/imx_common.c standard arm/freescale/imx/imx_machdep.c standard arm/freescale/imx/imx51_machdep.c standard arm/arm/bus_space-v6.c standard # Dummy serial console #arm/freescale/imx/console.c standard # TrustZone Interrupt Controller arm/freescale/imx/tzic.c standard # IOMUX - external pins multiplexor -arm/freescale/imx/imx51_iomux.c optional iomux +arm/freescale/imx/imx51_iomux.c standard # GPIO arm/freescale/imx/imx_gpio.c optional gpio # Generic Periodic Timer arm/freescale/imx/imx_gpt.c standard # Clock Configuration Manager arm/freescale/imx/imx51_ccm.c standard # i.MX5xx PATA controller dev/ata/chipsets/ata-fsl.c optional imxata # UART driver dev/uart/uart_dev_imx.c optional uart # USB OH3 controller (1 OTG, 3 EHCI) arm/freescale/imx/imx_nop_usbphy.c optional echi dev/usb/controller/ehci_imx.c optional ehci # Watchdog arm/freescale/imx/imx_wdog.c optional imxwdt # i2c arm/freescale/imx/imx_i2c.c optional fsliic # IPU - Image Processing Unit (frame buffer also) arm/freescale/imx/imx51_ipuv3.c optional sc arm/freescale/imx/imx51_ipuv3_fbd.c optional vt dev/vt/hw/fb/vt_early_fb.c optional vt Index: head/sys/arm/freescale/imx/files.imx53 =================================================================== --- head/sys/arm/freescale/imx/files.imx53 (revision 271099) +++ head/sys/arm/freescale/imx/files.imx53 (revision 271100) @@ -1,59 +1,59 @@ # $FreeBSD$ arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_generic.c standard arm/arm/cpufunc_asm_armv5.S standard arm/arm/cpufunc_asm_arm11.S standard arm/arm/cpufunc_asm_armv7.S standard kern/kern_clocksource.c standard # Init arm/freescale/imx/imx_common.c standard arm/freescale/imx/imx_machdep.c standard arm/freescale/imx/imx53_machdep.c standard arm/arm/bus_space-v6.c standard # Special serial console for debuging early boot code #arm/freescale/imx/console.c standard # UART driver (includes serial console support) dev/uart/uart_dev_imx.c optional uart # TrustZone Interrupt Controller arm/freescale/imx/tzic.c standard # IOMUX - external pins multiplexor -arm/freescale/imx/imx51_iomux.c optional iomux +arm/freescale/imx/imx51_iomux.c standard # GPIO arm/freescale/imx/imx_gpio.c optional gpio # Generic Periodic Timer arm/freescale/imx/imx_gpt.c standard # Clock Configuration Manager arm/freescale/imx/imx51_ccm.c standard # i.MX5xx PATA controller dev/ata/chipsets/ata-fsl.c optional imxata # SDHCI/MMC arm/freescale/imx/imx_sdhci.c optional sdhci # USB OH3 controller (1 OTG, 3 EHCI) arm/freescale/imx/imx_nop_usbphy.c optional ehci dev/usb/controller/ehci_imx.c optional ehci # Watchdog arm/freescale/imx/imx_wdog.c optional imxwdt # i2c arm/freescale/imx/imx_i2c.c optional fsliic # IPU - Image Processing Unit (frame buffer also) arm/freescale/imx/imx51_ipuv3.c optional sc arm/freescale/imx/imx51_ipuv3_fbd.c optional vt dev/vt/hw/fb/vt_early_fb.c optional vt # Fast Ethernet Controller dev/ffec/if_ffec.c optional ffec Index: head/sys/arm/freescale/imx/files.imx6 =================================================================== --- head/sys/arm/freescale/imx/files.imx6 (revision 271099) +++ head/sys/arm/freescale/imx/files.imx6 (revision 271100) @@ -1,57 +1,55 @@ # $FreeBSD$ # # Standard ARM support. # arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_generic.c standard arm/arm/cpufunc_asm_arm11.S standard arm/arm/cpufunc_asm_armv5.S standard arm/arm/cpufunc_asm_armv7.S standard kern/kern_clocksource.c standard # # Standard imx6 devices and support. # arm/arm/gic.c standard arm/arm/pl310.c standard arm/arm/bus_space-v6.c standard arm/arm/mpcore_timer.c standard arm/freescale/fsl_ocotp.c standard arm/freescale/imx/imx6_anatop.c standard arm/freescale/imx/imx6_ccm.c standard arm/freescale/imx/imx6_iomux.c standard arm/freescale/imx/imx6_machdep.c standard arm/freescale/imx/imx6_mp.c optional smp arm/freescale/imx/imx6_pl310.c standard arm/freescale/imx/imx_common.c standard arm/freescale/imx/imx_machdep.c standard arm/freescale/imx/imx_gpt.c standard arm/freescale/imx/imx_gpio.c optional gpio arm/freescale/imx/imx_i2c.c optional fsliic # # Optional devices. # arm/freescale/imx/imx_sdhci.c optional sdhci arm/freescale/imx/imx_wdog.c optional imxwdt dev/ffec/if_ffec.c optional ffec dev/uart/uart_dev_imx.c optional uart dev/usb/controller/ehci_imx.c optional ehci arm/freescale/imx/imx6_usbphy.c optional ehci # # Low-level serial console for debugging early kernel startup. # #arm/freescale/imx/console.c standard # # Not ready yet... # -#arm/freescale/imx/imx51_iomux.c optional iomux -#dev/ata/chipsets/ata-fsl.c optional imxata #arm/freescale/imx/imx51_ipuv3.c optional sc Index: head/sys/arm/freescale/imx/imx51_iomux.c =================================================================== --- head/sys/arm/freescale/imx/imx51_iomux.c (revision 271099) +++ head/sys/arm/freescale/imx/imx51_iomux.c (revision 271100) @@ -1,272 +1,249 @@ /* $NetBSD: imx51_iomux.c,v 1.3 2012/04/15 09:51:31 bsh Exp $ */ /* * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved. * Written by Hashimoto Kenichi for Genetec Corporation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /*- * Copyright (c) 2012, 2013 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Oleksandr Rybalko * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include -#include -#include +#include "imx51_iomuxreg.h" #define IOMUX_WRITE(_sc, _r, _v) \ bus_write_4((_sc)->sc_res, (_r), (_v)) #define IOMUX_READ(_sc, _r) \ bus_read_4((_sc)->sc_res, (_r)) #define IOMUX_SET(_sc, _r, _m) \ IOMUX_WRITE((_sc), (_r), IOMUX_READ((_sc), (_r)) | (_m)) #define IOMUX_CLEAR(_sc, _r, _m) \ IOMUX_WRITE((_sc), (_r), IOMUX_READ((_sc), (_r)) & ~(_m)) struct iomux_softc { struct resource *sc_res; device_t sc_dev; }; static int iomux_probe(device_t); static int iomux_attach(device_t); static struct iomux_softc *iomuxsc = NULL; static struct resource_spec imx_iomux_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Global registers */ { -1, 0 } }; static int iomux_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "fsl,imx51-iomux") && !ofw_bus_is_compatible(dev, "fsl,imx53-iomux")) return (ENXIO); device_set_desc(dev, "Freescale i.MX51 IO pins multiplexor"); return (BUS_PROBE_DEFAULT); } static int iomux_attach(device_t dev) { struct iomux_softc * sc; sc = device_get_softc(dev); if (bus_alloc_resources(dev, imx_iomux_spec, &sc->sc_res)) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); } iomuxsc = sc; /* * XXX: place to fetch all info about pinmuxing from loader data * (FDT blob) and apply. Loader (1st one) must care about * device-to-device difference. */ return (0); } static void iomux_set_function_sub(struct iomux_softc *sc, uint32_t pin, uint32_t fn) { bus_size_t mux_ctl_reg = IOMUX_PIN_TO_MUX_ADDRESS(pin); if (mux_ctl_reg != IOMUX_MUX_NONE) IOMUX_WRITE(sc, mux_ctl_reg, fn); } void iomux_set_function(unsigned int pin, unsigned int fn) { if (iomuxsc == NULL) return; iomux_set_function_sub(iomuxsc, pin, fn); } static void iomux_set_pad_sub(struct iomux_softc *sc, uint32_t pin, uint32_t config) { bus_size_t pad_ctl_reg = IOMUX_PIN_TO_PAD_ADDRESS(pin); if (pad_ctl_reg != IOMUX_PAD_NONE) IOMUX_WRITE(sc, pad_ctl_reg, config); } void iomux_set_pad(unsigned int pin, unsigned int config) { if (iomuxsc == NULL) return; iomux_set_pad_sub(iomuxsc, pin, config); } -#ifdef notyet -void -iomux_set_input(unsigned int input, unsigned int config) +static uint32_t +iomux_get_pad_config_sub(struct iomux_softc *sc, uint32_t pin) { - bus_size_t input_ctl_reg = input; + bus_size_t pad_reg = IOMUX_PIN_TO_PAD_ADDRESS(pin); + uint32_t result; - bus_space_write_4(iomuxsc->iomux_memt, iomuxsc->iomux_memh, - input_ctl_reg, config); -} -#endif + result = IOMUX_READ(sc, pad_reg); -void -iomux_mux_config(const struct iomux_conf *conflist) -{ - int i; - - if (iomuxsc == NULL) - return; - for (i = 0; conflist[i].pin != IOMUX_CONF_EOT; i++) { - iomux_set_pad_sub(iomuxsc, conflist[i].pin, conflist[i].pad); - iomux_set_function_sub(iomuxsc, conflist[i].pin, - conflist[i].mux); - } + return(result); } -#ifdef notyet -void -iomux_input_config(const struct iomux_input_conf *conflist) +unsigned int +iomux_get_pad_config(unsigned int pin) { - int i; - if (iomuxsc == NULL) - return; - for (i = 0; conflist[i].inout != -1; i++) { - iomux_set_inout(iomuxsc, conflist[i].inout, - conflist[i].inout_mode); - } + return(iomux_get_pad_config_sub(iomuxsc, pin)); } -#endif uint32_t imx_iomux_gpr_get(u_int regnum) { KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_get() called before attach")); KASSERT(regnum >= 0 && regnum <= 1, ("imx_iomux_gpr_get bad regnum %u", regnum)); return (IOMUX_READ(iomuxsc, IOMUXC_GPR0 + regnum)); } void imx_iomux_gpr_set(u_int regnum, uint32_t val) { KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_set() called before attach")); KASSERT(regnum >= 0 && regnum <= 1, ("imx_iomux_gpr_set bad regnum %u", regnum)); IOMUX_WRITE(iomuxsc, IOMUXC_GPR0 + regnum, val); } void imx_iomux_gpr_set_masked(u_int regnum, uint32_t clrbits, uint32_t setbits) { uint32_t val; KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_set_masked called before attach")); KASSERT(regnum >= 0 && regnum <= 1, ("imx_iomux_gpr_set_masked bad regnum %u", regnum)); val = IOMUX_READ(iomuxsc, IOMUXC_GPR0 + regnum); val = (val & ~clrbits) | setbits; IOMUX_WRITE(iomuxsc, IOMUXC_GPR0 + regnum, val); } static device_method_t imx_iomux_methods[] = { DEVMETHOD(device_probe, iomux_probe), DEVMETHOD(device_attach, iomux_attach), DEVMETHOD_END }; static driver_t imx_iomux_driver = { "imx_iomux", imx_iomux_methods, sizeof(struct iomux_softc), }; static devclass_t imx_iomux_devclass; EARLY_DRIVER_MODULE(imx_iomux, simplebus, imx_iomux_driver, - imx_iomux_devclass, 0, 0, BUS_PASS_BUS - 1); + imx_iomux_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_LATE);