Index: head/sys/dev/cxgbe/osdep.h =================================================================== --- head/sys/dev/cxgbe/osdep.h (revision 228442) +++ head/sys/dev/cxgbe/osdep.h (revision 228443) @@ -1,152 +1,154 @@ /*- * Copyright (c) 2010 Chelsio Communications, Inc. * All rights reserved. * Written by: Navdeep Parhar * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ * */ #ifndef __CXGBE_OSDEP_H_ #define __CXGBE_OSDEP_H_ #include #include #include #include #include #include #include #include #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__) #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__) #define CH_WARN_RATELIMIT(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) typedef int8_t s8; typedef int16_t s16; typedef int32_t s32; typedef int64_t s64; typedef uint8_t u8; typedef uint16_t u16; typedef uint32_t u32; typedef uint64_t u64; typedef uint8_t __u8; typedef uint16_t __u16; typedef uint32_t __u32; typedef uint64_t __u64; typedef uint8_t __be8; typedef uint16_t __be16; typedef uint32_t __be32; typedef uint64_t __be64; #if BYTE_ORDER == BIG_ENDIAN #define __BIG_ENDIAN_BITFIELD #elif BYTE_ORDER == LITTLE_ENDIAN #define __LITTLE_ENDIAN_BITFIELD #else #error "Must set BYTE_ORDER" #endif +#ifndef __bool_true_false_are_defined typedef boolean_t bool; #define false FALSE #define true TRUE +#endif #define mdelay(x) DELAY((x) * 1000) #define udelay(x) DELAY(x) #define __devinit #define simple_strtoul strtoul #define DIV_ROUND_UP(x, y) howmany(x, y) #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) #define container_of(p, s, f) ((s *)(((uint8_t *)(p)) - offsetof(s, f))) #define swab16(x) bswap16(x) #define swab32(x) bswap32(x) #define swab64(x) bswap64(x) #define le16_to_cpu(x) le16toh(x) #define le32_to_cpu(x) le32toh(x) #define le64_to_cpu(x) le64toh(x) #define cpu_to_le16(x) htole16(x) #define cpu_to_le32(x) htole32(x) #define cpu_to_le64(x) htole64(x) #define be16_to_cpu(x) be16toh(x) #define be32_to_cpu(x) be32toh(x) #define be64_to_cpu(x) be64toh(x) #define cpu_to_be16(x) htobe16(x) #define cpu_to_be32(x) htobe32(x) #define cpu_to_be64(x) htobe64(x) #define SPEED_10 10 #define SPEED_100 100 #define SPEED_1000 1000 #define SPEED_10000 10000 #define DUPLEX_HALF 0 #define DUPLEX_FULL 1 #define AUTONEG_DISABLE 0 #define AUTONEG_ENABLE 1 #define PCI_CAP_ID_VPD PCIY_VPD #define PCI_VPD_ADDR PCIR_VPD_ADDR #define PCI_VPD_ADDR_F 0x8000 #define PCI_VPD_DATA PCIR_VPD_DATA #define PCI_CAP_ID_EXP PCIY_EXPRESS #define PCI_EXP_DEVCTL PCIR_EXPRESS_DEVICE_CTL #define PCI_EXP_DEVCTL_PAYLOAD PCIM_EXP_CTL_MAX_PAYLOAD #define PCI_EXP_DEVCTL_READRQ PCIM_EXP_CTL_MAX_READ_REQUEST #define PCI_EXP_LNKCTL PCIR_EXPRESS_LINK_CTL #define PCI_EXP_LNKSTA PCIR_EXPRESS_LINK_STA #define PCI_EXP_LNKSTA_CLS PCIM_LINK_STA_SPEED #define PCI_EXP_LNKSTA_NLW PCIM_LINK_STA_WIDTH static inline int ilog2(long x) { KASSERT(x > 0 && powerof2(x), ("%s: invalid arg %ld", __func__, x)); return (flsl(x) - 1); } static inline char * strstrip(char *s) { char c, *r, *trim_at; while (isspace(*s)) s++; r = trim_at = s; while ((c = *s++) != 0) { if (!isspace(c)) trim_at = s; } *trim_at = 0; return (r); } #endif Index: head/sys/dev/drm/i915_drv.h =================================================================== --- head/sys/dev/drm/i915_drv.h (revision 228442) +++ head/sys/dev/drm/i915_drv.h (revision 228443) @@ -1,680 +1,680 @@ /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*- */ /* * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #include __FBSDID("$FreeBSD$"); #ifndef _I915_DRV_H_ #define _I915_DRV_H_ #include "dev/drm/drm_mm.h" #include "dev/drm/i915_reg.h" /* General customization: */ #define DRIVER_AUTHOR "Tungsten Graphics, Inc." #define DRIVER_NAME "i915" #define DRIVER_DESC "Intel Graphics" #define DRIVER_DATE "20080730" enum pipe { PIPE_A = 0, PIPE_B, }; #define I915_NUM_PIPE 2 /* Interface history: * * 1.1: Original. * 1.2: Add Power Management * 1.3: Add vblank support * 1.4: Fix cmdbuffer path, add heap destroy * 1.5: Add vblank pipe configuration * 1.6: - New ioctl for scheduling buffer swaps on vertical blank * - Support vertical blank on secondary display pipe */ #define DRIVER_MAJOR 1 #define DRIVER_MINOR 6 #define DRIVER_PATCHLEVEL 0 #define WATCH_COHERENCY 0 #define WATCH_BUF 0 #define WATCH_EXEC 0 #define WATCH_LRU 0 #define WATCH_RELOC 0 #define WATCH_INACTIVE 0 #define WATCH_PWRITE 0 typedef struct _drm_i915_ring_buffer { int tail_mask; unsigned long Size; u8 *virtual_start; int head; int tail; int space; drm_local_map_t map; struct drm_gem_object *ring_obj; } drm_i915_ring_buffer_t; struct mem_block { struct mem_block *next; struct mem_block *prev; int start; int size; struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */ }; struct opregion_header; struct opregion_acpi; struct opregion_swsci; struct opregion_asle; struct intel_opregion { struct opregion_header *header; struct opregion_acpi *acpi; struct opregion_swsci *swsci; struct opregion_asle *asle; int enabled; }; typedef struct drm_i915_private { struct drm_device *dev; drm_local_map_t *sarea; drm_local_map_t *mmio_map; drm_i915_sarea_t *sarea_priv; drm_i915_ring_buffer_t ring; drm_dma_handle_t *status_page_dmah; void *hw_status_page; dma_addr_t dma_status_page; uint32_t counter; unsigned int status_gfx_addr; drm_local_map_t hws_map; struct drm_gem_object *hws_obj; unsigned int cpp; int back_offset; int front_offset; int current_page; int page_flipping; wait_queue_head_t irq_queue; /** Protects user_irq_refcount and irq_mask_reg */ DRM_SPINTYPE user_irq_lock; /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */ int user_irq_refcount; /** Cached value of IER to avoid reads in updating the bitfield */ u32 irq_mask_reg; u32 pipestat[2]; int tex_lru_log_granularity; int allow_batchbuffer; struct mem_block *agp_heap; unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds; int vblank_pipe; struct intel_opregion opregion; /* Register state */ u8 saveLBB; u32 saveDSPACNTR; u32 saveDSPBCNTR; u32 saveDSPARB; u32 saveRENDERSTANDBY; u32 saveHWS; u32 savePIPEACONF; u32 savePIPEBCONF; u32 savePIPEASRC; u32 savePIPEBSRC; u32 saveFPA0; u32 saveFPA1; u32 saveDPLL_A; u32 saveDPLL_A_MD; u32 saveHTOTAL_A; u32 saveHBLANK_A; u32 saveHSYNC_A; u32 saveVTOTAL_A; u32 saveVBLANK_A; u32 saveVSYNC_A; u32 saveBCLRPAT_A; u32 savePIPEASTAT; u32 saveDSPASTRIDE; u32 saveDSPASIZE; u32 saveDSPAPOS; u32 saveDSPAADDR; u32 saveDSPASURF; u32 saveDSPATILEOFF; u32 savePFIT_PGM_RATIOS; u32 saveBLC_PWM_CTL; u32 saveBLC_PWM_CTL2; u32 saveFPB0; u32 saveFPB1; u32 saveDPLL_B; u32 saveDPLL_B_MD; u32 saveHTOTAL_B; u32 saveHBLANK_B; u32 saveHSYNC_B; u32 saveVTOTAL_B; u32 saveVBLANK_B; u32 saveVSYNC_B; u32 saveBCLRPAT_B; u32 savePIPEBSTAT; u32 saveDSPBSTRIDE; u32 saveDSPBSIZE; u32 saveDSPBPOS; u32 saveDSPBADDR; u32 saveDSPBSURF; u32 saveDSPBTILEOFF; u32 saveVGA0; u32 saveVGA1; u32 saveVGA_PD; u32 saveVGACNTRL; u32 saveADPA; u32 saveLVDS; u32 savePP_ON_DELAYS; u32 savePP_OFF_DELAYS; u32 saveDVOA; u32 saveDVOB; u32 saveDVOC; u32 savePP_ON; u32 savePP_OFF; u32 savePP_CONTROL; u32 savePP_DIVISOR; u32 savePFIT_CONTROL; u32 save_palette_a[256]; u32 save_palette_b[256]; u32 saveFBC_CFB_BASE; u32 saveFBC_LL_BASE; u32 saveFBC_CONTROL; u32 saveFBC_CONTROL2; u32 saveIER; u32 saveIIR; u32 saveIMR; u32 saveCACHE_MODE_0; u32 saveD_STATE; u32 saveCG_2D_DIS; u32 saveMI_ARB_STATE; u32 saveSWF0[16]; u32 saveSWF1[16]; u32 saveSWF2[3]; u8 saveMSR; u8 saveSR[8]; u8 saveGR[25]; u8 saveAR_INDEX; u8 saveAR[21]; u8 saveDACMASK; u8 saveCR[37]; struct { struct drm_mm gtt_space; /** * List of objects currently involved in rendering from the * ringbuffer. * * A reference is held on the buffer while on this list. */ struct list_head active_list; /** * List of objects which are not in the ringbuffer but which * still have a write_domain which needs to be flushed before * unbinding. * * A reference is held on the buffer while on this list. */ struct list_head flushing_list; /** * LRU list of objects which are not in the ringbuffer and * are ready to unbind, but are still in the GTT. * * A reference is not held on the buffer while on this list, * as merely being GTT-bound shouldn't prevent its being * freed, and we'll pull it off the list in the free path. */ struct list_head inactive_list; /** * List of breadcrumbs associated with GPU requests currently * outstanding. */ struct list_head request_list; #ifdef __linux__ /** * We leave the user IRQ off as much as possible, * but this means that requests will finish and never * be retired once the system goes idle. Set a timer to * fire periodically while the ring is running. When it * fires, go retire requests. */ struct delayed_work retire_work; #endif uint32_t next_gem_seqno; /** * Waiting sequence number, if any */ uint32_t waiting_gem_seqno; /** * Last seq seen at irq time */ uint32_t irq_gem_seqno; /** * Flag if the X Server, and thus DRM, is not currently in * control of the device. * * This is set between LeaveVT and EnterVT. It needs to be * replaced with a semaphore. It also needs to be * transitioned away from for kernel modesetting. */ int suspended; /** * Flag if the hardware appears to be wedged. * * This is set when attempts to idle the device timeout. * It prevents command submission from occuring and makes * every pending request fail */ int wedged; /** Bit 6 swizzling required for X tiling */ uint32_t bit_6_swizzle_x; /** Bit 6 swizzling required for Y tiling */ uint32_t bit_6_swizzle_y; } mm; } drm_i915_private_t; enum intel_chip_family { CHIP_I8XX = 0x01, CHIP_I9XX = 0x02, CHIP_I915 = 0x04, CHIP_I965 = 0x08, }; /** driver private structure attached to each drm_gem_object */ struct drm_i915_gem_object { struct drm_gem_object *obj; /** Current space allocated to this object in the GTT, if any. */ struct drm_mm_node *gtt_space; /** This object's place on the active/flushing/inactive lists */ struct list_head list; /** * This is set if the object is on the active or flushing lists * (has pending rendering), and is not set if it's on inactive (ready * to be unbound). */ int active; /** * This is set if the object has been written to since last bound * to the GTT */ int dirty; /** AGP memory structure for our GTT binding. */ DRM_AGP_MEM *agp_mem; struct page **page_list; /** * Current offset of the object in GTT space. * * This is the same as gtt_space->start */ uint32_t gtt_offset; /** Boolean whether this object has a valid gtt offset. */ int gtt_bound; /** How many users have pinned this object in GTT space */ int pin_count; /** Breadcrumb of last rendering to the buffer. */ uint32_t last_rendering_seqno; /** Current tiling mode for the object. */ uint32_t tiling_mode; /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */ uint32_t agp_type; /** * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when * GEM_DOMAIN_CPU is not in the object's read domain. */ uint8_t *page_cpu_valid; }; /** * Request queue structure. * * The request queue allows us to note sequence numbers that have been emitted * and may be associated with active buffers to be retired. * * By keeping this list, we can avoid having to do questionable * sequence-number comparisons on buffer last_rendering_seqnos, and associate * an emission time with seqnos for tracking how far ahead of the GPU we are. */ struct drm_i915_gem_request { /** GEM sequence number associated with this request. */ uint32_t seqno; /** Time at which this request was emitted, in jiffies. */ unsigned long emitted_jiffies; /** Cache domains that were flushed at the start of the request. */ uint32_t flush_domains; struct list_head list; }; struct drm_i915_file_private { struct { uint32_t last_gem_seqno; uint32_t last_gem_throttle_seqno; } mm; }; extern struct drm_ioctl_desc i915_ioctls[]; extern int i915_max_ioctl; /* i915_dma.c */ extern void i915_kernel_lost_context(struct drm_device * dev); extern int i915_driver_load(struct drm_device *, unsigned long flags); extern int i915_driver_unload(struct drm_device *); extern int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv); extern void i915_driver_lastclose(struct drm_device * dev); extern void i915_driver_preclose(struct drm_device *dev, struct drm_file *file_priv); extern void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv); extern int i915_driver_device_is_agp(struct drm_device * dev); extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); extern int i915_emit_box(struct drm_device *dev, struct drm_clip_rect __user *boxes, int i, int DR1, int DR4); /* i915_irq.c */ extern int i915_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_priv); void i915_user_irq_get(struct drm_device *dev); void i915_user_irq_put(struct drm_device *dev); extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); extern void i915_driver_irq_preinstall(struct drm_device * dev); extern int i915_driver_irq_postinstall(struct drm_device *dev); extern void i915_driver_irq_uninstall(struct drm_device * dev); extern int i915_vblank_pipe_set(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_vblank_pipe_get(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_enable_vblank(struct drm_device *dev, int crtc); extern void i915_disable_vblank(struct drm_device *dev, int crtc); extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc); extern u32 g45_get_vblank_counter(struct drm_device *dev, int crtc); extern int i915_vblank_swap(struct drm_device *dev, void *data, struct drm_file *file_priv); void i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask); void i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask); /* i915_mem.c */ extern int i915_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_mem_init_heap(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_mem_destroy_heap(struct drm_device *dev, void *data, struct drm_file *file_priv); extern void i915_mem_takedown(struct mem_block **heap); extern void i915_mem_release(struct drm_device * dev, struct drm_file *file_priv, struct mem_block *heap); #ifdef I915_HAVE_GEM /* i915_gem.c */ int i915_gem_init_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_create_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_pread_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_mmap_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_execbuffer(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_pin_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_unpin_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_busy_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_throttle_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_entervt_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_leavevt_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_set_tiling(struct drm_device *dev, void *data, struct drm_file *file_priv); int i915_gem_get_tiling(struct drm_device *dev, void *data, struct drm_file *file_priv); void i915_gem_load(struct drm_device *dev); int i915_gem_proc_init(struct drm_minor *minor); void i915_gem_proc_cleanup(struct drm_minor *minor); int i915_gem_init_object(struct drm_gem_object *obj); void i915_gem_free_object(struct drm_gem_object *obj); int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment); void i915_gem_object_unpin(struct drm_gem_object *obj); void i915_gem_lastclose(struct drm_device *dev); uint32_t i915_get_gem_seqno(struct drm_device *dev); void i915_gem_retire_requests(struct drm_device *dev); void i915_gem_retire_work_handler(struct work_struct *work); void i915_gem_clflush_object(struct drm_gem_object *obj); /* i915_gem_tiling.c */ void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); /* i915_gem_debug.c */ void i915_gem_dump_object(struct drm_gem_object *obj, int len, const char *where, uint32_t mark); #if WATCH_INACTIVE void i915_verify_inactive(struct drm_device *dev, char *file, int line); #else #define i915_verify_inactive(dev, file, line) #endif void i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle); void i915_gem_dump_object(struct drm_gem_object *obj, int len, const char *where, uint32_t mark); void i915_dump_lru(struct drm_device *dev, const char *where); #endif /* I915_HAVE_GEM */ /* i915_suspend.c */ extern int i915_save_state(struct drm_device *dev); extern int i915_restore_state(struct drm_device *dev); /* i915_opregion.c */ extern int intel_opregion_init(struct drm_device *dev); extern void intel_opregion_free(struct drm_device *dev); extern void opregion_asle_intr(struct drm_device *dev); extern void opregion_enable_asle(struct drm_device *dev); /** * Lock test for when it's just for synchronization of ring access. * * In that case, we don't need to do it when GEM is initialized as nobody else * has access to the ring. */ #define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \ if (((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == NULL) \ LOCK_TEST_WITH_RETURN(dev, file_priv); \ } while (0) -#if defined(__FreeBSD__) +#if defined(__FreeBSD__) && !defined(__bool_true_false_are_defined) typedef boolean_t bool; #endif #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg)) #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val)) #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg)) #define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val)) #define I915_READ8(reg) DRM_READ8(dev_priv->mmio_map, (reg)) #define I915_WRITE8(reg,val) DRM_WRITE8(dev_priv->mmio_map, (reg), (val)) #define I915_VERBOSE 0 #define RING_LOCALS unsigned int outring, ringmask, outcount; \ volatile char *virt; #define BEGIN_LP_RING(n) do { \ if (I915_VERBOSE) \ DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \ if (dev_priv->ring.space < (n)*4) \ i915_wait_ring(dev, (n)*4, __func__); \ outcount = 0; \ outring = dev_priv->ring.tail; \ ringmask = dev_priv->ring.tail_mask; \ virt = dev_priv->ring.virtual_start; \ } while (0) #define OUT_RING(n) do { \ if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ *(volatile unsigned int *)(virt + outring) = (n); \ outcount++; \ outring += 4; \ outring &= ringmask; \ } while (0) #define ADVANCE_LP_RING() do { \ if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \ dev_priv->ring.tail = outring; \ dev_priv->ring.space -= outcount * 4; \ I915_WRITE(PRB0_TAIL, outring); \ } while(0) /** * Reads a dword out of the status page, which is written to from the command * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or * MI_STORE_DATA_IMM. * * The following dwords have a reserved meaning: * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes. * 0x04: ring 0 head pointer * 0x05: ring 1 head pointer (915-class) * 0x06: ring 2 head pointer (915-class) * 0x10-0x1b: Context status DWords (GM45) * 0x1f: Last written status offset. (GM45) * * The area from dword 0x20 to 0x3ff is available for driver usage. */ #define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg]) #define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX) #define I915_GEM_HWS_INDEX 0x20 #define I915_BREADCRUMB_INDEX 0x21 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); #define IS_I830(dev) ((dev)->pci_device == 0x3577) #define IS_845G(dev) ((dev)->pci_device == 0x2562) #define IS_I85X(dev) ((dev)->pci_device == 0x3582) #define IS_I855(dev) ((dev)->pci_device == 0x3582) #define IS_I865G(dev) ((dev)->pci_device == 0x2572) #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a) #define IS_I915GM(dev) ((dev)->pci_device == 0x2592) #define IS_I945G(dev) ((dev)->pci_device == 0x2772) #define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\ (dev)->pci_device == 0x27AE) #define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \ (dev)->pci_device == 0x2982 || \ (dev)->pci_device == 0x2992 || \ (dev)->pci_device == 0x29A2 || \ (dev)->pci_device == 0x2A02 || \ (dev)->pci_device == 0x2A12 || \ (dev)->pci_device == 0x2A42 || \ (dev)->pci_device == 0x2E02 || \ (dev)->pci_device == 0x2E12 || \ (dev)->pci_device == 0x2E22 || \ (dev)->pci_device == 0x2E32) #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02) #define IS_GM45(dev) ((dev)->pci_device == 0x2A42) #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \ (dev)->pci_device == 0x2E12 || \ (dev)->pci_device == 0x2E22 || \ (dev)->pci_device == 0x2E32 || \ IS_GM45(dev)) #define IS_IGDG(dev) ((dev)->pci_device == 0xa001) #define IS_IGDGM(dev) ((dev)->pci_device == 0xa011) #define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev)) #define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \ (dev)->pci_device == 0x29B2 || \ (dev)->pci_device == 0x29D2 || \ IS_IGD(dev)) #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \ IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev)) #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \ IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \ IS_IGD(dev)) #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev)) #define PRIMARY_RINGBUFFER_SIZE (128*1024) #endif Index: head/sys/dev/speaker/spkr.c =================================================================== --- head/sys/dev/speaker/spkr.c (revision 228442) +++ head/sys/dev/speaker/spkr.c (revision 228443) @@ -1,551 +1,553 @@ /*- * spkr.c -- device driver for console speaker * * v1.4 by Eric S. Raymond (esr@snark.thyrsus.com) Aug 1993 * modified for FreeBSD by Andrew A. Chernov * modified for PC98 by Kakefuda */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include static d_open_t spkropen; static d_close_t spkrclose; static d_write_t spkrwrite; static d_ioctl_t spkrioctl; static struct cdevsw spkr_cdevsw = { .d_version = D_VERSION, .d_flags = D_NEEDGIANT, .d_open = spkropen, .d_close = spkrclose, .d_write = spkrwrite, .d_ioctl = spkrioctl, .d_name = "spkr", }; static MALLOC_DEFINE(M_SPKR, "spkr", "Speaker buffer"); /* **************** MACHINE DEPENDENT PART STARTS HERE ************************* * This section defines a function tone() which causes a tone of given * frequency and duration from the ISA console speaker. * Another function endtone() is defined to force sound off, and there is * also a rest() entry point to do pauses. * * Audible sound is generated using the Programmable Interval Timer (PIT) and * Programmable Peripheral Interface (PPI) attached to the ISA speaker. The * PPI controls whether sound is passed through at all; the PIT's channel 2 is * used to generate clicks (a square wave) of whatever frequency is desired. */ #define SPKRPRI PSOCK static char endtone, endrest; static void tone(unsigned int thz, unsigned int centisecs); static void rest(int centisecs); static void playinit(void); static void playtone(int pitch, int value, int sustain); static void playstring(char *cp, size_t slen); /* * Emit tone of frequency thz for given number of centisecs */ static void tone(unsigned int thz, unsigned int centisecs) { int sps, timo; if (thz <= 0) return; #ifdef DEBUG (void) printf("tone: thz=%d centisecs=%d\n", thz, centisecs); #endif /* DEBUG */ /* set timer to generate clicks at given frequency in Hertz */ sps = splclock(); if (timer_spkr_acquire()) { /* enter list of waiting procs ??? */ splx(sps); return; } splx(sps); disable_intr(); timer_spkr_setfreq(thz); enable_intr(); /* * Set timeout to endtone function, then give up the timeslice. * This is so other processes can execute while the tone is being * emitted. */ timo = centisecs * hz / 100; if (timo > 0) tsleep(&endtone, SPKRPRI | PCATCH, "spkrtn", timo); sps = splclock(); timer_spkr_release(); splx(sps); } /* * Rest for given number of centisecs */ static void rest(int centisecs) { int timo; /* * Set timeout to endrest function, then give up the timeslice. * This is so other processes can execute while the rest is being * waited out. */ #ifdef DEBUG (void) printf("rest: %d\n", centisecs); #endif /* DEBUG */ timo = centisecs * hz / 100; if (timo > 0) tsleep(&endrest, SPKRPRI | PCATCH, "spkrrs", timo); } /* **************** PLAY STRING INTERPRETER BEGINS HERE ********************** * Play string interpretation is modelled on IBM BASIC 2.0's PLAY statement; * M[LNS] are missing; the ~ synonym and the _ slur mark and the octave- * tracking facility are added. * Requires tone(), rest(), and endtone(). String play is not interruptible * except possibly at physical block boundaries. */ +#ifndef __bool_true_false_are_defined typedef int bool; +#endif #define TRUE 1 #define FALSE 0 #define dtoi(c) ((c) - '0') static int octave; /* currently selected octave */ static int whole; /* whole-note time at current tempo, in ticks */ static int value; /* whole divisor for note time, quarter note = 1 */ static int fill; /* controls spacing of notes */ static bool octtrack; /* octave-tracking on? */ static bool octprefix; /* override current octave-tracking state? */ /* * Magic number avoidance... */ #define SECS_PER_MIN 60 /* seconds per minute */ #define WHOLE_NOTE 4 /* quarter notes per whole note */ #define MIN_VALUE 64 /* the most we can divide a note by */ #define DFLT_VALUE 4 /* default value (quarter-note) */ #define FILLTIME 8 /* for articulation, break note in parts */ #define STACCATO 6 /* 6/8 = 3/4 of note is filled */ #define NORMAL 7 /* 7/8ths of note interval is filled */ #define LEGATO 8 /* all of note interval is filled */ #define DFLT_OCTAVE 4 /* default octave */ #define MIN_TEMPO 32 /* minimum tempo */ #define DFLT_TEMPO 120 /* default tempo */ #define MAX_TEMPO 255 /* max tempo */ #define NUM_MULT 3 /* numerator of dot multiplier */ #define DENOM_MULT 2 /* denominator of dot multiplier */ /* letter to half-tone: A B C D E F G */ static int notetab[8] = {9, 11, 0, 2, 4, 5, 7}; /* * This is the American Standard A440 Equal-Tempered scale with frequencies * rounded to nearest integer. Thank Goddess for the good ol' CRC Handbook... * our octave 0 is standard octave 2. */ #define OCTAVE_NOTES 12 /* semitones per octave */ static int pitchtab[] = { /* C C# D D# E F F# G G# A A# B*/ /* 0 */ 65, 69, 73, 78, 82, 87, 93, 98, 103, 110, 117, 123, /* 1 */ 131, 139, 147, 156, 165, 175, 185, 196, 208, 220, 233, 247, /* 2 */ 262, 277, 294, 311, 330, 349, 370, 392, 415, 440, 466, 494, /* 3 */ 523, 554, 587, 622, 659, 698, 740, 784, 831, 880, 932, 988, /* 4 */ 1047, 1109, 1175, 1245, 1319, 1397, 1480, 1568, 1661, 1760, 1865, 1975, /* 5 */ 2093, 2217, 2349, 2489, 2637, 2794, 2960, 3136, 3322, 3520, 3729, 3951, /* 6 */ 4186, 4435, 4698, 4978, 5274, 5588, 5920, 6272, 6644, 7040, 7459, 7902, }; static void playinit() { octave = DFLT_OCTAVE; whole = (100 * SECS_PER_MIN * WHOLE_NOTE) / DFLT_TEMPO; fill = NORMAL; value = DFLT_VALUE; octtrack = FALSE; octprefix = TRUE; /* act as though there was an initial O(n) */ } /* * Play tone of proper duration for current rhythm signature */ static void playtone(int pitch, int value, int sustain) { register int sound, silence, snum = 1, sdenom = 1; /* this weirdness avoids floating-point arithmetic */ for (; sustain; sustain--) { /* See the BUGS section in the man page for discussion */ snum *= NUM_MULT; sdenom *= DENOM_MULT; } if (value == 0 || sdenom == 0) return; if (pitch == -1) rest(whole * snum / (value * sdenom)); else { sound = (whole * snum) / (value * sdenom) - (whole * (FILLTIME - fill)) / (value * FILLTIME); silence = whole * (FILLTIME-fill) * snum / (FILLTIME * value * sdenom); #ifdef DEBUG (void) printf("playtone: pitch %d for %d ticks, rest for %d ticks\n", pitch, sound, silence); #endif /* DEBUG */ tone(pitchtab[pitch], sound); if (fill != LEGATO) rest(silence); } } /* * Interpret and play an item from a notation string */ static void playstring(char *cp, size_t slen) { int pitch, oldfill, lastpitch = OCTAVE_NOTES * DFLT_OCTAVE; #define GETNUM(cp, v) for(v=0; isdigit(cp[1]) && slen > 0; ) \ {v = v * 10 + (*++cp - '0'); slen--;} for (; slen--; cp++) { int sustain, timeval, tempo; register char c = toupper(*cp); #ifdef DEBUG (void) printf("playstring: %c (%x)\n", c, c); #endif /* DEBUG */ switch (c) { case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': case 'G': /* compute pitch */ pitch = notetab[c - 'A'] + octave * OCTAVE_NOTES; /* this may be followed by an accidental sign */ if (cp[1] == '#' || cp[1] == '+') { ++pitch; ++cp; slen--; } else if (cp[1] == '-') { --pitch; ++cp; slen--; } /* * If octave-tracking mode is on, and there has been no octave- * setting prefix, find the version of the current letter note * closest to the last regardless of octave. */ if (octtrack && !octprefix) { if (abs(pitch-lastpitch) > abs(pitch+OCTAVE_NOTES - lastpitch)) { ++octave; pitch += OCTAVE_NOTES; } if (abs(pitch-lastpitch) > abs((pitch-OCTAVE_NOTES) - lastpitch)) { --octave; pitch -= OCTAVE_NOTES; } } octprefix = FALSE; lastpitch = pitch; /* ...which may in turn be followed by an override time value */ GETNUM(cp, timeval); if (timeval <= 0 || timeval > MIN_VALUE) timeval = value; /* ...and/or sustain dots */ for (sustain = 0; cp[1] == '.'; cp++) { slen--; sustain++; } /* ...and/or a slur mark */ oldfill = fill; if (cp[1] == '_') { fill = LEGATO; ++cp; slen--; } /* time to emit the actual tone */ playtone(pitch, timeval, sustain); fill = oldfill; break; case 'O': if (cp[1] == 'N' || cp[1] == 'n') { octprefix = octtrack = FALSE; ++cp; slen--; } else if (cp[1] == 'L' || cp[1] == 'l') { octtrack = TRUE; ++cp; slen--; } else { GETNUM(cp, octave); if (octave >= sizeof(pitchtab) / sizeof(pitchtab[0]) / OCTAVE_NOTES) octave = DFLT_OCTAVE; octprefix = TRUE; } break; case '>': if (octave < sizeof(pitchtab) / sizeof(pitchtab[0]) / OCTAVE_NOTES - 1) octave++; octprefix = TRUE; break; case '<': if (octave > 0) octave--; octprefix = TRUE; break; case 'N': GETNUM(cp, pitch); for (sustain = 0; cp[1] == '.'; cp++) { slen--; sustain++; } oldfill = fill; if (cp[1] == '_') { fill = LEGATO; ++cp; slen--; } playtone(pitch - 1, value, sustain); fill = oldfill; break; case 'L': GETNUM(cp, value); if (value <= 0 || value > MIN_VALUE) value = DFLT_VALUE; break; case 'P': case '~': /* this may be followed by an override time value */ GETNUM(cp, timeval); if (timeval <= 0 || timeval > MIN_VALUE) timeval = value; for (sustain = 0; cp[1] == '.'; cp++) { slen--; sustain++; } playtone(-1, timeval, sustain); break; case 'T': GETNUM(cp, tempo); if (tempo < MIN_TEMPO || tempo > MAX_TEMPO) tempo = DFLT_TEMPO; whole = (100 * SECS_PER_MIN * WHOLE_NOTE) / tempo; break; case 'M': if (cp[1] == 'N' || cp[1] == 'n') { fill = NORMAL; ++cp; slen--; } else if (cp[1] == 'L' || cp[1] == 'l') { fill = LEGATO; ++cp; slen--; } else if (cp[1] == 'S' || cp[1] == 's') { fill = STACCATO; ++cp; slen--; } break; } } } /* * ****************** UNIX DRIVER HOOKS BEGIN HERE ************************** * This section implements driver hooks to run playstring() and the tone(), * endtone(), and rest() functions defined above. */ static int spkr_active = FALSE; /* exclusion flag */ static char *spkr_inbuf; /* incoming buf */ static int spkropen(dev, flags, fmt, td) struct cdev *dev; int flags; int fmt; struct thread *td; { #ifdef DEBUG (void) printf("spkropen: entering with dev = %s\n", devtoname(dev)); #endif /* DEBUG */ if (spkr_active) return(EBUSY); else { #ifdef DEBUG (void) printf("spkropen: about to perform play initialization\n"); #endif /* DEBUG */ playinit(); spkr_inbuf = malloc(DEV_BSIZE, M_SPKR, M_WAITOK); spkr_active = TRUE; return(0); } } static int spkrwrite(dev, uio, ioflag) struct cdev *dev; struct uio *uio; int ioflag; { #ifdef DEBUG printf("spkrwrite: entering with dev = %s, count = %zd\n", devtoname(dev), uio->uio_resid); #endif /* DEBUG */ if (uio->uio_resid > (DEV_BSIZE - 1)) /* prevent system crashes */ return(E2BIG); else { unsigned n; char *cp; int error; n = uio->uio_resid; cp = spkr_inbuf; error = uiomove(cp, n, uio); if (!error) { cp[n] = '\0'; playstring(cp, n); } return(error); } } static int spkrclose(dev, flags, fmt, td) struct cdev *dev; int flags; int fmt; struct thread *td; { #ifdef DEBUG (void) printf("spkrclose: entering with dev = %s\n", devtoname(dev)); #endif /* DEBUG */ wakeup(&endtone); wakeup(&endrest); free(spkr_inbuf, M_SPKR); spkr_active = FALSE; return(0); } static int spkrioctl(dev, cmd, cmdarg, flags, td) struct cdev *dev; unsigned long cmd; caddr_t cmdarg; int flags; struct thread *td; { #ifdef DEBUG (void) printf("spkrioctl: entering with dev = %s, cmd = %lx\n", devtoname(dev), cmd); #endif /* DEBUG */ if (cmd == SPKRTONE) { tone_t *tp = (tone_t *)cmdarg; if (tp->frequency == 0) rest(tp->duration); else tone(tp->frequency, tp->duration); return 0; } else if (cmd == SPKRTUNE) { tone_t *tp = (tone_t *)(*(caddr_t *)cmdarg); tone_t ttp; int error; for (; ; tp++) { error = copyin(tp, &ttp, sizeof(tone_t)); if (error) return(error); if (ttp.duration == 0) break; if (ttp.frequency == 0) rest(ttp.duration); else tone(ttp.frequency, ttp.duration); } return(0); } return(EINVAL); } static struct cdev *speaker_dev; /* * Module handling */ static int speaker_modevent(module_t mod, int type, void *data) { int error = 0; switch(type) { case MOD_LOAD: speaker_dev = make_dev(&spkr_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, "speaker"); break; case MOD_SHUTDOWN: case MOD_UNLOAD: destroy_dev(speaker_dev); break; default: error = EOPNOTSUPP; } return (error); } DEV_MODULE(speaker, speaker_modevent, NULL); Index: head/sys/dev/tws/tws.h =================================================================== --- head/sys/dev/tws/tws.h (revision 228442) +++ head/sys/dev/tws/tws.h (revision 228443) @@ -1,265 +1,269 @@ /* * Copyright (c) 2010, LSI Corp. * All rights reserved. * Author : Manjunath Ranganathaiah * Support: freebsdraid@lsi.com * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * 3. Neither the name of the nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #include /* defines used in kernel.h */ #include #include #include #include #include /* types used in module initialization */ #include /* cdevsw struct */ #include /* uio struct */ #include #include /* structs, prototypes for pci bus stuff */ #include #include #include #include /* For pci_get macros! */ #include #include #include #include #define TWS_PULL_MODE_ENABLE 1 MALLOC_DECLARE(M_TWS); /* externs */ extern int tws_queue_depth; #define TWS_DRIVER_VERSION_STRING "10.80.00.003" #define TWS_MAX_NUM_UNITS 65 #define TWS_MAX_NUM_LUNS 16 #define TWS_MAX_IRQS 2 #define TWS_SCSI_INITIATOR_ID 66 #define TWS_MAX_IO_SIZE 0x20000 /* 128kB */ #define TWS_SECTOR_SIZE 0x200 #define TWS_POLL_TIMEOUT 60 #define TWS_IO_TIMEOUT 60 #define TWS_IOCTL_TIMEOUT 60 #define TWS_RESET_TIMEOUT 60 #define TWS_PCI_BAR0 0x10 #define TWS_PCI_BAR1 0x14 #define TWS_PCI_BAR2 0x1C #define TWS_VENDOR_ID 0x13C1 #define TWS_DEVICE_ID 0x1010 #define TWS_INVALID_REQID 0xFFFF /* bus tag related */ #define TWS_ALIGNMENT 4 #define TWS_IN_MF_ALIGNMENT 16 #define TWS_OUT_MF_ALIGNMENT 4 #define TWS_MAX_32BIT_SG_ELEMENTS 93 /* max 32-bit sg elements */ #define TWS_MAX_64BIT_SG_ELEMENTS 46 /* max 64-bit sg elements */ #define TWS_MAX_QS 4 #define TWS_MAX_REQS 256 #define TWS_RESERVED_REQS 4 /* Request states */ #define TWS_REQ_STATE_FREE 0 #define TWS_REQ_STATE_BUSY 1 #define TWS_REQ_STATE_TRAN 2 #define TWS_REQ_STATE_COMPLETE 3 /* Request types */ #define TWS_REQ_TYPE_INTERNAL_CMD 0x0 #define TWS_REQ_TYPE_AEN_FETCH 0x1 #define TWS_REQ_TYPE_PASSTHRU 0x2 #define TWS_REQ_TYPE_GETSET_PARAM 0x3 #define TWS_REQ_TYPE_SCSI_IO 0x4 /* Driver states */ enum tws_states { TWS_INIT=50, TWS_UNINIT, TWS_OFFLINE, TWS_ONLINE, TWS_RESET, }; /* events */ enum tws_events { TWS_INIT_START=100, TWS_INIT_COMPLETE, TWS_UNINIT_START, TWS_RESET_START, TWS_RESET_COMPLETE, TWS_SCAN_FAILURE, }; enum tws_req_flags { TWS_DIR_UNKNOWN = 0x1, TWS_DIR_IN = 0x2, TWS_DIR_OUT = 0x4, TWS_DIR_NONE = 0x8, }; enum tws_intrs { TWS_INTx, TWS_MSI, TWS_MSIX, }; struct tws_msix_info { int tbl_res_id; bus_space_tag_t tbl_tag; bus_space_handle_t tbl_handle; struct resource *tbl_res; }; struct tws_ioctl_lock { u_int32_t lock; time_t timeout; }; #define TWS_TRACE_FNAME_LEN 10 #define TWS_TRACE_FUNC_LEN 15 #define TWS_TRACE_DESC_LEN 10 struct tws_trace_rec { struct timespec ts; char fname[TWS_TRACE_FNAME_LEN]; char func[TWS_TRACE_FUNC_LEN]; int linenum; char desc[TWS_TRACE_DESC_LEN]; u_int64_t val1; u_int64_t val2; }; struct tws_circular_q { volatile int16_t head; volatile int16_t tail; u_int16_t depth; u_int8_t overflow; void * q; }; struct tws_stats { u_int64_t reqs_in; u_int64_t reqs_out; u_int64_t reqs_errored; u_int64_t spurios_intrs; u_int64_t num_intrs; u_int64_t num_aens; u_int64_t ioctls; u_int64_t scsi_ios; }; struct tws_init_connect_info { u_int16_t working_srl; u_int16_t working_branch; u_int16_t working_build; u_int16_t fw_on_ctlr_srl; u_int16_t fw_on_ctlr_branch; u_int16_t fw_on_ctlr_build; }; /* ------------ boolean types ------------------- */ +#ifndef __bool_true_false_are_defined typedef enum _boolean { false, true } boolean; +#else +#define boolean bool +#endif enum err { SUCCESS, FAILURE }; /* ----------- per instance data ---------------- */ /* The softc holds our per-instance data. */ struct tws_softc { device_t tws_dev; /* bus device */ struct cdev *tws_cdev; /* controller device */ u_int32_t device_id; /* device id */ u_int32_t subvendor_id; /* device id */ u_int32_t subdevice_id; /* device id */ u_int8_t tws_state; /* driver state */ u_int8_t tws_prev_state; /* driver prev state */ struct sysctl_ctx_list tws_clist; /* sysctl context */ struct sysctl_oid *tws_oidp; /* sysctl context */ struct resource *reg_res; /* register interface window */ struct resource *mfa_res; /* mfa interface window */ int reg_res_id; /* register resource id */ int mfa_res_id; /* register resource id */ bus_space_handle_t bus_handle; /* bus space handle */ bus_space_handle_t bus_mfa_handle; /* bus space handle */ bus_space_tag_t bus_tag; /* bus space tag */ bus_space_tag_t bus_mfa_tag; /* bus space tag for mfa's */ u_int64_t mfa_base; /* mfa base address */ struct resource *irq_res[TWS_MAX_IRQS];/* interrupt resource */ int irq_res_id[TWS_MAX_IRQS]; /* intr resource id */ void *intr_handle[TWS_MAX_IRQS]; /* interrupt handle */ int irqs; /* intrs used */ struct tws_msix_info msix; /* msix info */ struct cam_sim *sim; /* sim for this controller */ struct cam_path *path; /* Ctlr path to CAM */ struct mtx q_lock; /* queue lock */ struct mtx sim_lock; /* sim lock */ struct mtx gen_lock; /* general driver lock */ struct mtx io_lock; /* IO lock */ struct tws_ioctl_lock ioctl_lock; /* ioctl lock */ u_int32_t seq_id; /* Sequence id */ int chan; /* wait channel */ struct tws_circular_q aen_q; /* aen q */ struct tws_circular_q trace_q; /* trace q */ struct tws_stats stats; /* I/O stats */ struct tws_init_connect_info cinfo; /* compatibility info */ boolean is64bit; /* True - 64bit else 32bit */ u_int8_t intr_type; /* Interrupt type used */ bus_dma_tag_t parent_tag; /* parent DMA tag */ bus_dma_tag_t cmd_tag; /* command DMA tag */ bus_dmamap_t cmd_map; /* command map */ void *dma_mem; /* pointer to dmable memory */ u_int64_t dma_mem_phys; /* phy addr */ bus_dma_tag_t data_tag; /* data DMA tag */ struct tws_request *reqs; /* pointer to requests */ struct tws_sense *sense_bufs; /* pointer to sense buffers */ boolean obfl_q_overrun; /* OBFL overrun flag */ union ccb *scan_ccb; /* pointer to a ccb */ struct tws_request *q_head[TWS_MAX_QS]; /* head pointers to q's */ struct tws_request *q_tail[TWS_MAX_QS]; /* tail pointers to q's */ }; Index: head/sys/dev/vxge/vxge-osdep.h =================================================================== --- head/sys/dev/vxge/vxge-osdep.h (revision 228442) +++ head/sys/dev/vxge/vxge-osdep.h (revision 228443) @@ -1,697 +1,699 @@ /*- * Copyright(c) 2002-2011 Exar Corp. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification are permitted provided the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * 3. Neither the name of the Exar Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /*$FreeBSD$*/ /* LINTLIBRARY */ #ifndef _VXGE_OSDEP_H_ #define _VXGE_OSDEP_H_ #include #include #if __FreeBSD_version >= 800000 #include #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* * ------------------------- includes and defines ------------------------- */ #if BYTE_ORDER == BIG_ENDIAN #define VXGE_OS_HOST_BIG_ENDIAN #else #define VXGE_OS_HOST_LITTLE_ENDIAN #endif #if __LONG_BIT == 64 #define VXGE_OS_PLATFORM_64BIT #else #define VXGE_OS_PLATFORM_32BIT #endif #define VXGE_OS_PCI_CONFIG_SIZE 256 #define VXGE_OS_HOST_PAGE_SIZE 4096 #define VXGE_LL_IP_FAST_CSUM(hdr, len) 0 #ifndef __DECONST #define __DECONST(type, var) ((type)(uintrptr_t)(const void *)(var)) #endif typedef struct ifnet *ifnet_t; typedef struct mbuf *mbuf_t; typedef struct mbuf *OS_NETSTACK_BUF; typedef struct _vxge_bus_res_t { u_long bus_res_len; bus_space_tag_t bus_space_tag; /* DMA Tag */ bus_space_handle_t bus_space_handle; /* Bus handle */ struct resource *bar_start_addr; /* BAR address */ } vxge_bus_res_t; typedef struct _vxge_dma_alloc_t { bus_addr_t dma_paddr; /* Physical Address */ caddr_t dma_vaddr; /* Virtual Address */ bus_dma_tag_t dma_tag; /* DMA Tag */ bus_dmamap_t dma_map; /* DMA Map */ bus_dma_segment_t dma_segment; /* DMA Segment */ bus_size_t dma_size; /* Size */ int dma_nseg; /* scatter-gather */ } vxge_dma_alloc_t; typedef struct _vxge_pci_info { device_t ndev; /* Device */ void *reg_map[3]; /* BAR Resource */ struct resource *bar_info[3]; /* BAR tag and handle */ } vxge_pci_info_t; /* * ---------------------- fixed size primitive types ----------------------- */ typedef size_t ptr_t; typedef int8_t s8; typedef uint8_t u8; typedef uint16_t u16; typedef int32_t s32; typedef uint32_t u32; typedef unsigned long long int u64; +#ifndef __bool_true_false_are_defined typedef boolean_t bool; +#endif typedef bus_addr_t dma_addr_t; typedef struct mtx spinlock_t; typedef struct resource *pci_irq_h; typedef vxge_pci_info_t *pci_dev_h; typedef vxge_pci_info_t *pci_cfg_h; typedef vxge_bus_res_t *pci_reg_h; typedef vxge_dma_alloc_t pci_dma_h; typedef vxge_dma_alloc_t pci_dma_acc_h; /* * -------------------------- "libc" functionality ------------------------- */ #define vxge_os_curr_time systime #define vxge_os_strcpy strcpy #define vxge_os_strlcpy strlcpy #define vxge_os_strlen strlen #define vxge_os_sprintf sprintf #define vxge_os_snprintf snprintf #define vxge_os_println(buf) printf("%s\n", buf) #define vxge_os_memzero bzero #define vxge_os_memcmp memcmp #define vxge_os_memcpy(dst, src, size) bcopy(src, dst, size) #define vxge_os_timestamp(buff) { \ struct timeval cur_time; \ gettimeofday(&cur_time, 0); \ snprintf(buff, sizeof(buff), "%08li.%08li: ", \ cur_time.tv_sec, cur_time.tv_usec); \ } #define vxge_os_printf(fmt...) { \ printf(fmt); \ printf("\n"); \ } #define vxge_os_vaprintf(fmt...) \ vxge_os_printf(fmt); #define vxge_os_vasprintf(fmt...) { \ vxge_os_printf(fmt); \ } #define vxge_trace(trace, fmt, args...) \ vxge_debug_uld(VXGE_COMPONENT_ULD, \ trace, hldev, vpid, fmt, ## args) /* * -------------------- synchronization primitives ------------------------- */ /* Initialize the spin lock */ #define vxge_os_spin_lock_init(lockp, ctxh) { \ if (mtx_initialized(lockp) == 0) \ mtx_init((lockp), "vxge", NULL, MTX_DEF); \ } /* Initialize the spin lock (IRQ version) */ #define vxge_os_spin_lock_init_irq(lockp, ctxh) { \ if (mtx_initialized(lockp) == 0) \ mtx_init((lockp), "vxge", NULL, MTX_DEF); \ } /* Destroy the lock */ #define vxge_os_spin_lock_destroy(lockp, ctxh) { \ if (mtx_initialized(lockp) != 0) \ mtx_destroy(lockp); \ } /* Destroy the lock (IRQ version) */ #define vxge_os_spin_lock_destroy_irq(lockp, ctxh) { \ if (mtx_initialized(lockp) != 0) \ mtx_destroy(lockp); \ } /* Acquire the lock */ #define vxge_os_spin_lock(lockp) { \ if (mtx_owned(lockp) == 0) \ mtx_lock(lockp); \ } /* Release the lock */ #define vxge_os_spin_unlock(lockp) mtx_unlock(lockp) /* Acquire the lock (IRQ version) */ #define vxge_os_spin_lock_irq(lockp, flags) { \ flags = MTX_QUIET; \ if (mtx_owned(lockp) == 0) \ mtx_lock_flags(lockp, flags); \ } /* Release the lock (IRQ version) */ #define vxge_os_spin_unlock_irq(lockp, flags) { \ flags = MTX_QUIET; \ mtx_unlock_flags(lockp, flags); \ } /* Write memory barrier */ #if __FreeBSD_version < 800000 #if defined(__i386__) || defined(__amd64__) #define mb() __asm volatile("mfence" ::: "memory") #define wmb() __asm volatile("sfence" ::: "memory") #define rmb() __asm volatile("lfence" ::: "memory") #else #define mb() #define rmb() #define wmb() #endif #endif #define vxge_os_wmb() wmb() #define vxge_os_udelay(x) DELAY(x) #define vxge_os_stall(x) DELAY(x) #define vxge_os_mdelay(x) DELAY(x * 1000) #define vxge_os_xchg (targetp, newval) /* * ------------------------- misc primitives ------------------------------- */ #define vxge_os_be32 u32 #define vxge_os_unlikely(x) (x) #define vxge_os_prefetch(x) (x = x) #define vxge_os_prefetchw(x) (x = x) #define vxge_os_bug vxge_os_printf #define vxge_os_ntohs ntohs #define vxge_os_ntohl ntohl #define vxge_os_ntohll be64toh #define vxge_os_htons htons #define vxge_os_htonl htonl #define vxge_os_htonll htobe64 #define vxge_os_in_multicast IN_MULTICAST #define VXGE_OS_INADDR_BROADCAST INADDR_BROADCAST /* * -------------------------- compiler stuff ------------------------------ */ #define __vxge_os_cacheline_size CACHE_LINE_SIZE #define __vxge_os_attr_cacheline_aligned __aligned(__vxge_os_cacheline_size) /* * ---------------------- memory primitives -------------------------------- */ #if defined(VXGE_OS_MEMORY_CHECK) typedef struct _vxge_os_malloc_t { u_long line; u_long size; void *ptr; const char *file; } vxge_os_malloc_t; #define VXGE_OS_MALLOC_CNT_MAX 64*1024 extern u32 g_malloc_cnt; extern vxge_os_malloc_t g_malloc_arr[VXGE_OS_MALLOC_CNT_MAX]; #define VXGE_OS_MEMORY_CHECK_MALLOC(_vaddr, _size, _file, _line) { \ if (_vaddr) { \ u32 i; \ for (i = 0; i < g_malloc_cnt; i++) { \ if (g_malloc_arr[i].ptr == NULL) \ break; \ } \ if (i == g_malloc_cnt) { \ g_malloc_cnt++; \ if (g_malloc_cnt >= VXGE_OS_MALLOC_CNT_MAX) { \ vxge_os_bug("g_malloc_cnt exceed %d\n", \ VXGE_OS_MALLOC_CNT_MAX); \ } else { \ g_malloc_arr[i].ptr = _vaddr; \ g_malloc_arr[i].size = _size; \ g_malloc_arr[i].file = _file; \ g_malloc_arr[i].line = _line; \ } \ } \ } \ } #define VXGE_OS_MEMORY_CHECK_FREE(_vaddr, _size, _file, _line) { \ u32 i; \ for (i = 0; i < VXGE_OS_MALLOC_CNT_MAX; i++) { \ if (g_malloc_arr[i].ptr == _vaddr) { \ g_malloc_arr[i].ptr = NULL; \ if (_size && g_malloc_arr[i].size != _size) { \ vxge_os_printf("freeing wrong size " \ "%lu allocated %s:%lu:" \ VXGE_OS_LLXFMT":%lu\n", \ _size, \ g_malloc_arr[i].file, \ g_malloc_arr[i].line, \ (u64)(u_long) g_malloc_arr[i].ptr, \ g_malloc_arr[i].size); \ } \ break; \ } \ } \ } #else #define VXGE_OS_MEMORY_CHECK_MALLOC(prt, size, file, line) #define VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line) #endif static inline void * vxge_mem_alloc_ex(u_long size, const char *file, int line) { void *vaddr = NULL; vaddr = malloc(size, M_DEVBUF, M_ZERO | M_NOWAIT); if (NULL != vaddr) { VXGE_OS_MEMORY_CHECK_MALLOC((void *)vaddr, size, file, line) vxge_os_memzero(vaddr, size); } return (vaddr); } static inline void vxge_mem_free_ex(const void *vaddr, u_long size, const char *file, int line) { if (NULL != vaddr) { VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line) free(__DECONST(void *, vaddr), M_DEVBUF); } } #define vxge_os_malloc(pdev, size) \ vxge_mem_alloc_ex(size, __FILE__, __LINE__) #define vxge_os_free(pdev, vaddr, size) \ vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__) #define vxge_mem_alloc(size) \ vxge_mem_alloc_ex(size, __FILE__, __LINE__) #define vxge_mem_free(vaddr, size) \ vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__) #define vxge_free_packet(x) \ if (NULL != x) { m_freem(x); x = NULL; } /* * --------------------------- pci primitives ------------------------------ */ #define vxge_os_pci_read8(pdev, cfgh, where, val) \ (*(val) = pci_read_config(pdev->ndev, where, 1)) #define vxge_os_pci_write8(pdev, cfgh, where, val) \ pci_write_config(pdev->ndev, where, val, 1) #define vxge_os_pci_read16(pdev, cfgh, where, val) \ (*(val) = pci_read_config(pdev->ndev, where, 2)) #define vxge_os_pci_write16(pdev, cfgh, where, val) \ pci_write_config(pdev->ndev, where, val, 2) #define vxge_os_pci_read32(pdev, cfgh, where, val) \ (*(val) = pci_read_config(pdev->ndev, where, 4)) #define vxge_os_pci_write32(pdev, cfgh, where, val) \ pci_write_config(pdev->ndev, where, val, 4) static inline u32 vxge_os_pci_res_len(pci_dev_h pdev, pci_reg_h regh) { return (((vxge_bus_res_t *) regh)->bus_res_len); } static inline u8 vxge_os_pio_mem_read8(pci_dev_h pdev, pci_reg_h regh, void *addr) { caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); return bus_space_read_1(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr)); } static inline u16 vxge_os_pio_mem_read16(pci_dev_h pdev, pci_reg_h regh, void *addr) { caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); return bus_space_read_2(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr)); } static inline u32 vxge_os_pio_mem_read32(pci_dev_h pdev, pci_reg_h regh, void *addr) { caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); return bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr)); } static inline u64 vxge_os_pio_mem_read64(pci_dev_h pdev, pci_reg_h regh, void *addr) { u64 val, val_l, val_u; caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); val_l = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) (((caddr_t) addr) + 4 - vaddr)); val_u = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr)); val = ((val_l << 32) | val_u); return (val); } static inline void vxge_os_pio_mem_write8(pci_dev_h pdev, pci_reg_h regh, u8 val, void *addr) { caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) regh)->bar_start_addr); bus_space_write_1(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr), val); } static inline void vxge_os_pio_mem_write16(pci_dev_h pdev, pci_reg_h regh, u16 val, void *addr) { caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); bus_space_write_2(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr), val); } static inline void vxge_os_pio_mem_write32(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr) { caddr_t vaddr = (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); bus_space_write_4(((vxge_bus_res_t *) regh)->bus_space_tag, ((vxge_bus_res_t *) regh)->bus_space_handle, (bus_size_t) ((caddr_t) (addr) - vaddr), val); } static inline void vxge_os_pio_mem_write64(pci_dev_h pdev, pci_reg_h regh, u64 val, void *addr) { u32 val_l = (u32) (val & 0xffffffff); u32 val_u = (u32) (val >> 32); vxge_os_pio_mem_write32(pdev, regh, val_l, addr); vxge_os_pio_mem_write32(pdev, regh, val_u, (caddr_t) addr + 4); } #define vxge_os_flush_bridge vxge_os_pio_mem_read64 /* * --------------------------- dma primitives ----------------------------- */ #define VXGE_OS_DMA_DIR_TODEVICE 0 #define VXGE_OS_DMA_DIR_FROMDEVICE 1 #define VXGE_OS_DMA_DIR_BIDIRECTIONAL 2 #define VXGE_OS_INVALID_DMA_ADDR ((bus_addr_t)0) static void vxge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) { if (error) return; *(bus_addr_t *) arg = segs->ds_addr; } static inline void * vxge_os_dma_malloc(pci_dev_h pdev, u_long bytes, int dma_flags, pci_dma_h * p_dmah, pci_dma_acc_h * p_dma_acch) { int error = 0; bus_addr_t bus_addr = BUS_SPACE_MAXADDR; bus_size_t boundary, max_size, alignment = PAGE_SIZE; if (bytes > PAGE_SIZE) { boundary = 0; max_size = bytes; } else { boundary = PAGE_SIZE; max_size = PAGE_SIZE; } error = bus_dma_tag_create( bus_get_dma_tag(pdev->ndev), /* Parent */ alignment, /* Alignment */ boundary, /* Bounds */ bus_addr, /* Low Address */ bus_addr, /* High Address */ NULL, /* Filter Func */ NULL, /* Filter Func Argument */ bytes, /* Maximum Size */ 1, /* Number of Segments */ max_size, /* Maximum Segment Size */ BUS_DMA_ALLOCNOW, /* Flags */ NULL, /* Lock Func */ NULL, /* Lock Func Arguments */ &(p_dmah->dma_tag)); /* DMA Tag */ if (error != 0) { device_printf(pdev->ndev, "bus_dma_tag_create failed\n"); goto _exit0; } p_dmah->dma_size = bytes; error = bus_dmamem_alloc(p_dmah->dma_tag, (void **)&p_dmah->dma_vaddr, (BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT), &p_dmah->dma_map); if (error != 0) { device_printf(pdev->ndev, "bus_dmamem_alloc failed\n"); goto _exit1; } VXGE_OS_MEMORY_CHECK_MALLOC(p_dmah->dma_vaddr, p_dmah->dma_size, __FILE__, __LINE__); return (p_dmah->dma_vaddr); _exit1: bus_dma_tag_destroy(p_dmah->dma_tag); _exit0: return (NULL); } static inline void vxge_dma_free(pci_dev_h pdev, const void *vaddr, u_long size, pci_dma_h *p_dmah, pci_dma_acc_h *p_dma_acch, const char *file, int line) { VXGE_OS_MEMORY_CHECK_FREE(p_dmah->dma_vaddr, size, file, line) bus_dmamem_free(p_dmah->dma_tag, p_dmah->dma_vaddr, p_dmah->dma_map); bus_dma_tag_destroy(p_dmah->dma_tag); p_dmah->dma_map = NULL; p_dmah->dma_tag = NULL; p_dmah->dma_vaddr = NULL; } extern void vxge_hal_blockpool_block_add(void *, void *, u32, pci_dma_h *, pci_dma_acc_h *); static inline void vxge_os_dma_malloc_async(pci_dev_h pdev, void *devh, u_long size, int dma_flags) { pci_dma_h dma_h; pci_dma_acc_h acc_handle; void *block_addr = NULL; block_addr = vxge_os_dma_malloc(pdev, size, dma_flags, &dma_h, &acc_handle); vxge_hal_blockpool_block_add(devh, block_addr, size, &dma_h, &acc_handle); } static inline void vxge_os_dma_sync(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr, u64 dma_offset, size_t length, int dir) { bus_dmasync_op_t dmasync_op; switch (dir) { case VXGE_OS_DMA_DIR_TODEVICE: dmasync_op = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTWRITE; break; case VXGE_OS_DMA_DIR_FROMDEVICE: dmasync_op = BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD; break; default: case VXGE_OS_DMA_DIR_BIDIRECTIONAL: dmasync_op = BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE; break; } bus_dmamap_sync(dmah.dma_tag, dmah.dma_map, dmasync_op); } static inline dma_addr_t vxge_os_dma_map(pci_dev_h pdev, pci_dma_h dmah, void *vaddr, u_long size, int dir, int dma_flags) { int error; error = bus_dmamap_load(dmah.dma_tag, dmah.dma_map, dmah.dma_vaddr, dmah.dma_size, vxge_dmamap_cb, &(dmah.dma_paddr), BUS_DMA_NOWAIT); if (error != 0) return (VXGE_OS_INVALID_DMA_ADDR); dmah.dma_size = size; return (dmah.dma_paddr); } static inline void vxge_os_dma_unmap(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr, u32 size, int dir) { bus_dmamap_unload(dmah.dma_tag, dmah.dma_map); } #define vxge_os_dma_free(pdev, vaddr, size, dma_flags, p_dma_acch, p_dmah) \ vxge_dma_free(pdev, vaddr, size, p_dma_acch, p_dmah, \ __FILE__, __LINE__) static inline int vxge_os_is_my_packet(void *pdev, unsigned long addr) { return (0); } #endif /* _VXGE_OSDEP_H_ */ Index: head/sys/ofed/include/linux/types.h =================================================================== --- head/sys/ofed/include/linux/types.h (revision 228442) +++ head/sys/ofed/include/linux/types.h (revision 228443) @@ -1,55 +1,57 @@ /*- * Copyright (c) 2010 Isilon Systems, Inc. * Copyright (c) 2010 iX Systems, Inc. * Copyright (c) 2010 Panasas, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _LINUX_TYPES_H_ #define _LINUX_TYPES_H_ #include #include #include #include typedef __u16 __le16; typedef __u16 __be16; typedef __u32 __le32; typedef __u32 __be32; typedef __u64 __le64; typedef __u64 __be64; +#ifndef __bool_true_false_are_defined typedef _Bool bool; #define true TRUE #define false FALSE +#endif typedef unsigned long kernel_ulong_t; typedef unsigned int uint; typedef unsigned gfp_t; typedef uint64_t loff_t; typedef vm_paddr_t resource_size_t; #define DECLARE_BITMAP(n, bits) \ unsigned long n[howmany(bits, sizeof(long) * 8)] #endif /* _LINUX_TYPES_H_ */