Index: head/sys/amd64/include/xen =================================================================== --- head/sys/amd64/include/xen (revision 190580) +++ head/sys/amd64/include/xen (revision 190581) Property changes on: head/sys/amd64/include/xen ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/amd64/include/xen:r189793-190578 Index: head/sys/arm/arm/cpufunc_asm_sheeva.S =================================================================== --- head/sys/arm/arm/cpufunc_asm_sheeva.S (revision 190580) +++ head/sys/arm/arm/cpufunc_asm_sheeva.S (revision 190581) Property changes on: head/sys/arm/arm/cpufunc_asm_sheeva.S ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/arm/arm/cpufunc_asm_sheeva.S:r189793-190578 Index: head/sys/cddl/dev/dtnfsclient =================================================================== --- head/sys/cddl/dev/dtnfsclient (revision 190580) +++ head/sys/cddl/dev/dtnfsclient (revision 190581) Property changes on: head/sys/cddl/dev/dtnfsclient ___________________________________________________________________ Added: svn:mergeinfo ## -0,0 +0,0 ## Index: head/sys/contrib/pf =================================================================== --- head/sys/contrib/pf (revision 190580) +++ head/sys/contrib/pf (revision 190581) Property changes on: head/sys/contrib/pf ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/contrib/pf:r189793-190578 Index: head/sys/dev/ata/ata-pci.c =================================================================== --- head/sys/dev/ata/ata-pci.c (revision 190580) +++ head/sys/dev/ata/ata-pci.c (revision 190581) @@ -1,847 +1,860 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local vars */ static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI"); /* misc defines */ #define IOMASK 0xfffffffc /* local prototypes */ static int ata_generic_chipinit(device_t dev); static void ata_generic_setmode(device_t dev, int mode); /* * generic PCI ATA device probe */ int ata_pci_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); char buffer[64]; /* is this a storage class device ? */ if (pci_get_class(dev) != PCIC_STORAGE) return ENXIO; /* is this an IDE/ATA type device ? */ if (pci_get_subclass(dev) != PCIS_STORAGE_IDE) return ENXIO; sprintf(buffer, "%s ATA controller", ata_pcivendor2str(dev)); device_set_desc_copy(dev, buffer); ctlr->chipinit = ata_generic_chipinit; /* we are a low priority handler */ return -100; } int ata_pci_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); device_t child; u_int32_t cmd; int unit; /* do chipset specific setups only needed once */ ctlr->legacy = ata_legacy(dev); if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK) ctlr->channels = 2; else ctlr->channels = 1; ctlr->ichannels = -1; ctlr->ch_attach = ata_pci_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->dev = dev; /* if needed try to enable busmastering */ cmd = pci_read_config(dev, PCIR_COMMAND, 2); if (!(cmd & PCIM_CMD_BUSMASTEREN)) { pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); cmd = pci_read_config(dev, PCIR_COMMAND, 2); } /* if busmastering mode "stuck" use it */ if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { ctlr->r_type1 = SYS_RES_IOPORT; ctlr->r_rid1 = ATA_BMADDR_RID; ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, RF_ACTIVE); } if (ctlr->chipinit(dev)) return ENXIO; /* attach all channels on this controller */ for (unit = 0; unit < ctlr->channels; unit++) { if ((ctlr->ichannels & (1 << unit)) == 0) continue; child = device_add_child(dev, "ata", ((unit == 0 || unit == 1) && ctlr->legacy) ? unit : devclass_find_free_unit(ata_devclass, 2)); if (child == NULL) device_printf(dev, "failed to add ata child device\n"); else device_set_ivars(child, (void *)(intptr_t)unit); } bus_generic_attach(dev); return 0; } int ata_pci_detach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); device_t *children; int nchildren, i; /* detach & delete all children */ if (!device_get_children(dev, &children, &nchildren)) { for (i = 0; i < nchildren; i++) device_delete_child(dev, children[i]); free(children, M_TEMP); } if (ctlr->r_irq) { bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); bus_release_resource(dev, SYS_RES_IRQ, ctlr->r_irq_rid, ctlr->r_irq); if (ctlr->r_irq_rid != ATA_IRQ_RID) pci_release_msi(dev); } if (ctlr->r_res2) bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); if (ctlr->r_res1) bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); return 0; } int ata_pci_suspend(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); int error = 0; bus_generic_suspend(dev); if (ctlr->suspend) error = ctlr->suspend(dev); return error; } int ata_pci_resume(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); int error = 0; if (ctlr->resume) error = ctlr->resume(dev); bus_generic_resume(dev); return error; } struct resource * ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags) { struct ata_pci_controller *controller = device_get_softc(dev); int unit = ((struct ata_channel *)device_get_softc(child))->unit; struct resource *res = NULL; int myrid; if (type == SYS_RES_IOPORT) { switch (*rid) { case ATA_IOADDR_RID: if (controller->legacy) { start = (unit ? ATA_SECONDARY : ATA_PRIMARY); count = ATA_IOSIZE; end = start + count - 1; } myrid = PCIR_BAR(0) + (unit << 3); res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, SYS_RES_IOPORT, &myrid, start, end, count, flags); break; case ATA_CTLADDR_RID: if (controller->legacy) { start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET; count = ATA_CTLIOSIZE; end = start + count - 1; } myrid = PCIR_BAR(1) + (unit << 3); res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, SYS_RES_IOPORT, &myrid, start, end, count, flags); break; } } if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { if (controller->legacy) { int irq = (unit == 0 ? 14 : 15); res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, SYS_RES_IRQ, rid, irq, irq, 1, flags); } else res = controller->r_irq; } return res; } int ata_pci_release_resource(device_t dev, device_t child, int type, int rid, struct resource *r) { struct ata_pci_controller *controller = device_get_softc(dev); int unit = ((struct ata_channel *)device_get_softc(child))->unit; if (type == SYS_RES_IOPORT) { switch (rid) { case ATA_IOADDR_RID: return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, SYS_RES_IOPORT, PCIR_BAR(0) + (unit << 3), r); break; case ATA_CTLADDR_RID: return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, SYS_RES_IOPORT, PCIR_BAR(1) + (unit << 3), r); break; default: return ENOENT; } } if (type == SYS_RES_IRQ) { if (rid != ATA_IRQ_RID) return ENOENT; if (controller->legacy) { return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, SYS_RES_IRQ, rid, r); } else return 0; } return EINVAL; } int ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, int flags, driver_filter_t *filter, driver_intr_t *function, void *argument, void **cookiep) { struct ata_pci_controller *controller = device_get_softc(dev); if (controller->legacy) { return BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, filter, function, argument, cookiep); } else { struct ata_pci_controller *controller = device_get_softc(dev); int unit = ((struct ata_channel *)device_get_softc(child))->unit; if (filter != NULL) { printf("ata-pci.c: we cannot use a filter here\n"); return (EINVAL); } controller->interrupt[unit].function = function; controller->interrupt[unit].argument = argument; *cookiep = controller; return 0; } } int ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, void *cookie) { struct ata_pci_controller *controller = device_get_softc(dev); if (controller->legacy) { return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); } else { struct ata_pci_controller *controller = device_get_softc(dev); int unit = ((struct ata_channel *)device_get_softc(child))->unit; controller->interrupt[unit].function = NULL; controller->interrupt[unit].argument = NULL; return 0; } } static void ata_generic_setmode(device_t dev, int mode) { struct ata_device *atadev = device_get_softc(dev); mode = ata_limit_mode(dev, mode, ATA_UDMA2); mode = ata_check_80pin(dev, mode); if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode)) atadev->mode = mode; } static int ata_generic_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; ctlr->setmode = ata_generic_setmode; return 0; } int ata_pci_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct resource *io = NULL, *ctlio = NULL; int i, rid; rid = ATA_IOADDR_RID; if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE))) return ENXIO; rid = ATA_CTLADDR_RID; if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){ bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); return ENXIO; } ata_pci_dmainit(dev); for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { ch->r_io[i].res = io; ch->r_io[i].offset = i; } ch->r_io[ATA_CONTROL].res = ctlio; ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2; ch->r_io[ATA_IDX_ADDR].res = io; ata_default_registers(dev); if (ctlr->r_res1) { for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { ch->r_io[i].res = ctlr->r_res1; ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE); } } ata_pci_hw(dev); return 0; } int ata_pci_ch_detach(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ata_pci_dmafini(dev); bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID, ch->r_io[ATA_CONTROL].res); bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, ch->r_io[ATA_IDX_ADDR].res); return (0); } int ata_pci_status(device_t dev) { struct ata_pci_controller *controller = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); if ((dumping || !controller->legacy) && ((ch->flags & ATA_ALWAYS_DMASTAT) || (ch->dma.flags & ATA_DMA_ACTIVE))) { int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) return 0; ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR); DELAY(1); } if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { DELAY(100); if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) return 0; } return 1; } void ata_pci_hw(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ata_generic_hw(dev); ch->hw.status = ata_pci_status; } static int ata_pci_dmastart(struct ata_request *request) { struct ata_channel *ch = device_get_softc(request->parent); ATA_DEBUG_RQ(request, "dmastart"); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, request->dma->sg_bus); ch->dma.flags |= ATA_DMA_ACTIVE; ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, (ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_WRITE_READ) | ((request->flags & ATA_R_READ) ? ATA_BMCMD_WRITE_READ : 0)| ATA_BMCMD_START_STOP); return 0; } static int ata_pci_dmastop(struct ata_request *request) { struct ata_channel *ch = device_get_softc(request->parent); int error; ATA_DEBUG_RQ(request, "dmastop"); ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); ch->dma.flags &= ~ATA_DMA_ACTIVE; error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); return error; } static void ata_pci_dmareset(device_t dev) { struct ata_channel *ch = device_get_softc(dev); struct ata_request *request; ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); ch->dma.flags &= ~ATA_DMA_ACTIVE; ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); if ((request = ch->running)) { device_printf(request->dev, "DMA reset calling unload\n"); ch->dma.unload(request); } } void ata_pci_dmainit(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ata_dmainit(dev); ch->dma.start = ata_pci_dmastart; ch->dma.stop = ata_pci_dmastop; ch->dma.reset = ata_pci_dmareset; } void ata_pci_dmafini(device_t dev) { ata_dmafini(dev); } static device_method_t ata_pci_methods[] = { /* device interface */ DEVMETHOD(device_probe, ata_pci_probe), DEVMETHOD(device_attach, ata_pci_attach), DEVMETHOD(device_detach, ata_pci_detach), DEVMETHOD(device_suspend, ata_pci_suspend), DEVMETHOD(device_resume, ata_pci_resume), DEVMETHOD(device_shutdown, bus_generic_shutdown), /* bus methods */ DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), DEVMETHOD(bus_release_resource, ata_pci_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), { 0, 0 } }; devclass_t ata_pci_devclass; static driver_t ata_pci_driver = { "atapci", ata_pci_methods, sizeof(struct ata_pci_controller), }; DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); MODULE_VERSION(atapci, 1); MODULE_DEPEND(atapci, ata, 1, 1, 1); static int ata_pcichannel_probe(device_t dev) { char buffer[32]; sprintf(buffer, "ATA channel %d", (int)(intptr_t)device_get_ivars(dev)); device_set_desc_copy(dev, buffer); return ata_probe(dev); } static int ata_pcichannel_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int error; if (ch->attached) return (0); ch->attached = 1; ch->unit = (intptr_t)device_get_ivars(dev); if ((error = ctlr->ch_attach(dev))) return error; return ata_attach(dev); } static int ata_pcichannel_detach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int error; if (!ch->attached) return (0); ch->attached = 0; if ((error = ata_detach(dev))) return error; if (ctlr->ch_detach) return (ctlr->ch_detach(dev)); return (0); } static int ata_pcichannel_suspend(device_t dev) { + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); + int error; if (!ch->attached) return (0); - return ata_suspend(dev); + if ((error = ata_suspend(dev))) + return (error); + + if (ctlr->ch_suspend != NULL && (error = ctlr->ch_suspend(dev))) + return (error); + + return (0); } static int ata_pcichannel_resume(device_t dev) { + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); + int error; if (!ch->attached) return (0); + + if (ctlr->ch_resume != NULL && (error = ctlr->ch_resume(dev))) + return (error); return ata_resume(dev); } static int ata_pcichannel_locking(device_t dev, int mode) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); if (ctlr->locking) return ctlr->locking(dev, mode); else return ch->unit; } static void ata_pcichannel_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* if DMA engine present reset it */ if (ch->dma.reset) ch->dma.reset(dev); /* reset the controller HW */ if (ctlr->reset) ctlr->reset(dev); else ata_generic_reset(dev); } static void ata_pcichannel_setmode(device_t parent, device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev)); struct ata_device *atadev = device_get_softc(dev); int mode = atadev->mode; ctlr->setmode(dev, ATA_PIO_MAX); if (mode >= ATA_DMA) ctlr->setmode(dev, mode); } static device_method_t ata_pcichannel_methods[] = { /* device interface */ DEVMETHOD(device_probe, ata_pcichannel_probe), DEVMETHOD(device_attach, ata_pcichannel_attach), DEVMETHOD(device_detach, ata_pcichannel_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD(device_suspend, ata_pcichannel_suspend), DEVMETHOD(device_resume, ata_pcichannel_resume), /* ATA methods */ DEVMETHOD(ata_setmode, ata_pcichannel_setmode), DEVMETHOD(ata_locking, ata_pcichannel_locking), DEVMETHOD(ata_reset, ata_pcichannel_reset), { 0, 0 } }; driver_t ata_pcichannel_driver = { "ata", ata_pcichannel_methods, sizeof(struct ata_channel), }; DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0); /* * misc support fucntions */ int ata_legacy(device_t dev) { return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&& ((pci_read_config(dev, PCIR_PROGIF, 1) & (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) != (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) || (!pci_read_config(dev, PCIR_BAR(0), 4) && !pci_read_config(dev, PCIR_BAR(1), 4) && !pci_read_config(dev, PCIR_BAR(2), 4) && !pci_read_config(dev, PCIR_BAR(3), 4) && !pci_read_config(dev, PCIR_BAR(5), 4))); } void ata_generic_intr(void *data) { struct ata_pci_controller *ctlr = data; struct ata_channel *ch; int unit; for (unit = 0; unit < ctlr->channels; unit++) { if ((ch = ctlr->interrupt[unit].argument)) ctlr->interrupt[unit].function(ch); } } int ata_setup_interrupt(device_t dev, void *intr_func) { struct ata_pci_controller *ctlr = device_get_softc(dev); int i, msi = 0; if (!ctlr->legacy) { if (resource_int_value(device_get_name(dev), device_get_unit(dev), "msi", &i) == 0 && i != 0) msi = 1; if (msi && pci_msi_count(dev) > 0 && pci_alloc_msi(dev, &msi) == 0) { ctlr->r_irq_rid = 0x1; } else { ctlr->r_irq_rid = ATA_IRQ_RID; } if (!(ctlr->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &ctlr->r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { device_printf(dev, "unable to map interrupt\n"); return ENXIO; } if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL, intr_func, ctlr, &ctlr->handle))) { /* SOS XXX release r_irq */ device_printf(dev, "unable to setup interrupt\n"); return ENXIO; } } return 0; } void ata_set_desc(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); char buffer[128]; sprintf(buffer, "%s %s %s controller", ata_pcivendor2str(dev), ctlr->chip->text, ata_mode2str(ctlr->chip->max_dma)); device_set_desc_copy(dev, buffer); } struct ata_chip_id * ata_match_chip(device_t dev, struct ata_chip_id *index) { while (index->chipid != 0) { if (pci_get_devid(dev) == index->chipid && pci_get_revid(dev) >= index->chiprev) return index; index++; } return NULL; } struct ata_chip_id * ata_find_chip(device_t dev, struct ata_chip_id *index, int slot) { device_t *children; int nchildren, i; if (device_get_children(device_get_parent(dev), &children, &nchildren)) return 0; while (index->chipid != 0) { for (i = 0; i < nchildren; i++) { if (((slot >= 0 && pci_get_slot(children[i]) == slot) || (slot < 0 && pci_get_slot(children[i]) <= -slot)) && pci_get_devid(children[i]) == index->chipid && pci_get_revid(children[i]) >= index->chiprev) { free(children, M_TEMP); return index; } } index++; } free(children, M_TEMP); return NULL; } void ata_print_cable(device_t dev, u_int8_t *who) { device_printf(dev, "DMA limited to UDMA33, %s found non-ATA66 cable\n", who); } int ata_check_80pin(device_t dev, int mode) { struct ata_device *atadev = device_get_softc(dev); if (!ata_dma_check_80pin) { if (bootverbose) device_printf(dev, "Skipping 80pin cable check\n"); return mode; } if (mode > ATA_UDMA2 && !(atadev->param.hwres & ATA_CABLE_ID)) { ata_print_cable(dev, "device"); mode = ATA_UDMA2; } return mode; } char * ata_pcivendor2str(device_t dev) { switch (pci_get_vendor(dev)) { case ATA_ACARD_ID: return "Acard"; case ATA_ACER_LABS_ID: return "AcerLabs"; case ATA_AMD_ID: return "AMD"; case ATA_ADAPTEC_ID: return "Adaptec"; case ATA_ATI_ID: return "ATI"; case ATA_CYRIX_ID: return "Cyrix"; case ATA_CYPRESS_ID: return "Cypress"; case ATA_HIGHPOINT_ID: return "HighPoint"; case ATA_INTEL_ID: return "Intel"; case ATA_ITE_ID: return "ITE"; case ATA_JMICRON_ID: return "JMicron"; case ATA_MARVELL_ID: return "Marvell"; case ATA_NATIONAL_ID: return "National"; case ATA_NETCELL_ID: return "Netcell"; case ATA_NVIDIA_ID: return "nVidia"; case ATA_PROMISE_ID: return "Promise"; case ATA_SERVERWORKS_ID: return "ServerWorks"; case ATA_SILICON_IMAGE_ID: return "SiI"; case ATA_SIS_ID: return "SiS"; case ATA_VIA_ID: return "VIA"; case ATA_CENATEK_ID: return "Cenatek"; case ATA_MICRON_ID: return "Micron"; default: return "Generic"; } } int ata_mode2idx(int mode) { if ((mode & ATA_DMA_MASK) == ATA_UDMA0) return (mode & ATA_MODE_MASK) + 8; if ((mode & ATA_DMA_MASK) == ATA_WDMA0) return (mode & ATA_MODE_MASK) + 5; return (mode & ATA_MODE_MASK) - ATA_PIO0; } Index: head/sys/dev/ata/ata-pci.h =================================================================== --- head/sys/dev/ata/ata-pci.h (revision 190580) +++ head/sys/dev/ata/ata-pci.h (revision 190581) @@ -1,492 +1,498 @@ /*- * Copyright (c) 2003 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ /* structure holding chipset config info */ struct ata_chip_id { u_int32_t chipid; u_int8_t chiprev; int cfg1; int cfg2; u_int8_t max_dma; char *text; }; /* structure describing a PCI ATA controller */ struct ata_pci_controller { device_t dev; int r_type1; int r_rid1; struct resource *r_res1; int r_type2; int r_rid2; struct resource *r_res2; int r_irq_rid; struct resource *r_irq; void *handle; struct ata_chip_id *chip; int legacy; int channels; int ichannels; int (*chipinit)(device_t); int (*suspend)(device_t); int (*resume)(device_t); int (*ch_attach)(device_t); int (*ch_detach)(device_t); + int (*ch_suspend)(device_t); + int (*ch_resume)(device_t); int (*locking)(device_t, int); void (*reset)(device_t); void (*setmode)(device_t, int); struct { void (*function)(void *); void *argument; } interrupt[8]; /* XXX SOS max ch# for now */ }; /* defines for known chipset PCI id's */ #define ATA_ACARD_ID 0x1191 #define ATA_ATP850 0x00021191 #define ATA_ATP850A 0x00041191 #define ATA_ATP850R 0x00051191 #define ATA_ATP860A 0x00061191 #define ATA_ATP860R 0x00071191 #define ATA_ATP865A 0x00081191 #define ATA_ATP865R 0x00091191 #define ATA_ACER_LABS_ID 0x10b9 #define ATA_ALI_1533 0x153310b9 #define ATA_ALI_5229 0x522910b9 #define ATA_ALI_5281 0x528110b9 #define ATA_ALI_5287 0x528710b9 #define ATA_ALI_5288 0x528810b9 #define ATA_ALI_5289 0x528910b9 #define ATA_AMD_ID 0x1022 #define ATA_AMD755 0x74011022 #define ATA_AMD756 0x74091022 #define ATA_AMD766 0x74111022 #define ATA_AMD768 0x74411022 #define ATA_AMD8111 0x74691022 #define ATA_AMD5536 0x209a1022 #define ATA_ADAPTEC_ID 0x9005 #define ATA_ADAPTEC_1420 0x02419005 #define ATA_ATI_ID 0x1002 #define ATA_ATI_IXP200 0x43491002 #define ATA_ATI_IXP300 0x43691002 #define ATA_ATI_IXP300_S1 0x436e1002 #define ATA_ATI_IXP400 0x43761002 #define ATA_ATI_IXP400_S1 0x43791002 #define ATA_ATI_IXP400_S2 0x437a1002 #define ATA_ATI_IXP600 0x438c1002 #define ATA_ATI_IXP600_S1 0x43801002 #define ATA_ATI_IXP700 0x439c1002 #define ATA_ATI_IXP700_S1 0x43901002 #define ATA_CENATEK_ID 0x16ca #define ATA_CENATEK_ROCKET 0x000116ca #define ATA_CYRIX_ID 0x1078 #define ATA_CYRIX_5530 0x01021078 #define ATA_CYPRESS_ID 0x1080 #define ATA_CYPRESS_82C693 0xc6931080 #define ATA_DEC_21150 0x00221011 #define ATA_DEC_21150_1 0x00231011 #define ATA_HIGHPOINT_ID 0x1103 #define ATA_HPT366 0x00041103 #define ATA_HPT372 0x00051103 #define ATA_HPT302 0x00061103 #define ATA_HPT371 0x00071103 #define ATA_HPT374 0x00081103 #define ATA_INTEL_ID 0x8086 #define ATA_I960RM 0x09628086 #define ATA_I82371FB 0x12308086 #define ATA_I82371SB 0x70108086 #define ATA_I82371AB 0x71118086 #define ATA_I82443MX 0x71998086 #define ATA_I82451NX 0x84ca8086 #define ATA_I82372FB 0x76018086 #define ATA_I82801AB 0x24218086 #define ATA_I82801AA 0x24118086 #define ATA_I82801BA 0x244a8086 #define ATA_I82801BA_1 0x244b8086 #define ATA_I82801CA 0x248a8086 #define ATA_I82801CA_1 0x248b8086 #define ATA_I82801DB 0x24cb8086 #define ATA_I82801DB_1 0x24ca8086 #define ATA_I82801EB 0x24db8086 #define ATA_I82801EB_S1 0x24d18086 #define ATA_I82801EB_R1 0x24df8086 #define ATA_I6300ESB 0x25a28086 #define ATA_I6300ESB_S1 0x25a38086 #define ATA_I6300ESB_R1 0x25b08086 #define ATA_I63XXESB2 0x269e8086 #define ATA_I63XXESB2_S1 0x26808086 #define ATA_I63XXESB2_S2 0x26818086 #define ATA_I63XXESB2_R1 0x26828086 #define ATA_I63XXESB2_R2 0x26838086 #define ATA_I82801FB 0x266f8086 #define ATA_I82801FB_S1 0x26518086 #define ATA_I82801FB_R1 0x26528086 #define ATA_I82801FBM 0x26538086 #define ATA_I82801GB 0x27df8086 #define ATA_I82801GB_S1 0x27c08086 #define ATA_I82801GB_AH 0x27c18086 #define ATA_I82801GB_R1 0x27c38086 #define ATA_I82801GBM_S1 0x27c48086 #define ATA_I82801GBM_AH 0x27c58086 #define ATA_I82801GBM_R1 0x27c68086 #define ATA_I82801HB_S1 0x28208086 #define ATA_I82801HB_AH6 0x28218086 #define ATA_I82801HB_R1 0x28228086 #define ATA_I82801HB_AH4 0x28248086 #define ATA_I82801HB_S2 0x28258086 #define ATA_I82801HBM 0x28508086 #define ATA_I82801HBM_S1 0x28288086 #define ATA_I82801HBM_S2 0x28298086 #define ATA_I82801HBM_S3 0x282a8086 #define ATA_I82801IB_S1 0x29208086 #define ATA_I82801IB_AH2 0x29218086 #define ATA_I82801IB_AH6 0x29228086 #define ATA_I82801IB_AH4 0x29238086 #define ATA_I82801IB_R1 0x29258086 #define ATA_I82801IB_S2 0x29268086 #define ATA_I82801JIB_S1 0x3a208086 #define ATA_I82801JIB_AH 0x3a228086 #define ATA_I82801JIB_R1 0x3a258086 #define ATA_I82801JIB_S2 0x3a268086 #define ATA_I82801JD_S1 0x3a008086 #define ATA_I82801JD_AH 0x3a028086 #define ATA_I82801JD_R1 0x3a058086 #define ATA_I82801JD_S2 0x3a068086 #define ATA_I31244 0x32008086 #define ATA_ITE_ID 0x1283 #define ATA_IT8211F 0x82111283 #define ATA_IT8212F 0x82121283 #define ATA_IT8213F 0x82131283 #define ATA_JMICRON_ID 0x197b #define ATA_JMB360 0x2360197b #define ATA_JMB361 0x2361197b #define ATA_JMB363 0x2363197b #define ATA_JMB365 0x2365197b #define ATA_JMB366 0x2366197b #define ATA_JMB368 0x2368197b #define ATA_MARVELL_ID 0x11ab #define ATA_M88SX5040 0x504011ab #define ATA_M88SX5041 0x504111ab #define ATA_M88SX5080 0x508011ab #define ATA_M88SX5081 0x508111ab #define ATA_M88SX6041 0x604111ab #define ATA_M88SX6081 0x608111ab #define ATA_M88SX6101 0x610111ab #define ATA_M88SX6121 0x612111ab #define ATA_M88SX6145 0x614511ab #define ATA_MICRON_ID 0x1042 #define ATA_MICRON_RZ1000 0x10001042 #define ATA_MICRON_RZ1001 0x10011042 #define ATA_NATIONAL_ID 0x100b #define ATA_SC1100 0x0502100b #define ATA_NETCELL_ID 0x169c #define ATA_NETCELL_SR 0x0044169c #define ATA_NVIDIA_ID 0x10de #define ATA_NFORCE1 0x01bc10de #define ATA_NFORCE2 0x006510de #define ATA_NFORCE2_PRO 0x008510de #define ATA_NFORCE2_PRO_S1 0x008e10de #define ATA_NFORCE3 0x00d510de #define ATA_NFORCE3_PRO 0x00e510de #define ATA_NFORCE3_PRO_S1 0x00e310de #define ATA_NFORCE3_PRO_S2 0x00ee10de #define ATA_NFORCE_MCP04 0x003510de #define ATA_NFORCE_MCP04_S1 0x003610de #define ATA_NFORCE_MCP04_S2 0x003e10de #define ATA_NFORCE_CK804 0x005310de #define ATA_NFORCE_CK804_S1 0x005410de #define ATA_NFORCE_CK804_S2 0x005510de #define ATA_NFORCE_MCP51 0x026510de #define ATA_NFORCE_MCP51_S1 0x026610de #define ATA_NFORCE_MCP51_S2 0x026710de #define ATA_NFORCE_MCP55 0x036e10de #define ATA_NFORCE_MCP55_S1 0x037e10de #define ATA_NFORCE_MCP55_S2 0x037f10de #define ATA_NFORCE_MCP61 0x03ec10de #define ATA_NFORCE_MCP61_S1 0x03e710de #define ATA_NFORCE_MCP61_S2 0x03f610de #define ATA_NFORCE_MCP61_S3 0x03f710de #define ATA_NFORCE_MCP65 0x044810de #define ATA_NFORCE_MCP67_A0 0x055010de #define ATA_NFORCE_MCP67_A1 0x055110de #define ATA_NFORCE_MCP67_A2 0x055210de #define ATA_NFORCE_MCP67_A3 0x055310de #define ATA_NFORCE_MCP67_A4 0x055410de #define ATA_NFORCE_MCP67_A5 0x055510de #define ATA_NFORCE_MCP67_A6 0x055610de #define ATA_NFORCE_MCP67_A7 0x055710de #define ATA_NFORCE_MCP67_A8 0x055810de #define ATA_NFORCE_MCP67_A9 0x055910de #define ATA_NFORCE_MCP67_AA 0x055A10de #define ATA_NFORCE_MCP67_AB 0x055B10de #define ATA_NFORCE_MCP67 0x056010de #define ATA_NFORCE_MCP73 0x056c10de #define ATA_NFORCE_MCP73_A0 0x07f010de #define ATA_NFORCE_MCP73_A1 0x07f110de #define ATA_NFORCE_MCP73_A2 0x07f210de #define ATA_NFORCE_MCP73_A3 0x07f310de #define ATA_NFORCE_MCP73_A4 0x07f410de #define ATA_NFORCE_MCP73_A5 0x07f510de #define ATA_NFORCE_MCP73_A6 0x07f610de #define ATA_NFORCE_MCP73_A7 0x07f710de #define ATA_NFORCE_MCP73_A8 0x07f810de #define ATA_NFORCE_MCP73_A9 0x07f910de #define ATA_NFORCE_MCP73_AA 0x07fa10de #define ATA_NFORCE_MCP73_AB 0x07fb10de #define ATA_NFORCE_MCP77 0x075910de #define ATA_PROMISE_ID 0x105a #define ATA_PDC20246 0x4d33105a #define ATA_PDC20262 0x4d38105a #define ATA_PDC20263 0x0d38105a #define ATA_PDC20265 0x0d30105a #define ATA_PDC20267 0x4d30105a #define ATA_PDC20268 0x4d68105a #define ATA_PDC20269 0x4d69105a #define ATA_PDC20270 0x6268105a #define ATA_PDC20271 0x6269105a #define ATA_PDC20275 0x1275105a #define ATA_PDC20276 0x5275105a #define ATA_PDC20277 0x7275105a #define ATA_PDC20318 0x3318105a #define ATA_PDC20319 0x3319105a #define ATA_PDC20371 0x3371105a #define ATA_PDC20375 0x3375105a #define ATA_PDC20376 0x3376105a #define ATA_PDC20377 0x3377105a #define ATA_PDC20378 0x3373105a #define ATA_PDC20379 0x3372105a #define ATA_PDC20571 0x3571105a #define ATA_PDC20575 0x3d75105a #define ATA_PDC20579 0x3574105a #define ATA_PDC20771 0x3570105a #define ATA_PDC40518 0x3d18105a #define ATA_PDC40519 0x3519105a #define ATA_PDC40718 0x3d17105a #define ATA_PDC40719 0x3515105a #define ATA_PDC40775 0x3d73105a #define ATA_PDC40779 0x3577105a #define ATA_PDC20617 0x6617105a #define ATA_PDC20618 0x6626105a #define ATA_PDC20619 0x6629105a #define ATA_PDC20620 0x6620105a #define ATA_PDC20621 0x6621105a #define ATA_PDC20622 0x6622105a #define ATA_PDC20624 0x6624105a #define ATA_PDC81518 0x8002105a #define ATA_SERVERWORKS_ID 0x1166 #define ATA_ROSB4_ISA 0x02001166 #define ATA_ROSB4 0x02111166 #define ATA_CSB5 0x02121166 #define ATA_CSB6 0x02131166 #define ATA_CSB6_1 0x02171166 #define ATA_HT1000 0x02141166 #define ATA_HT1000_S1 0x024b1166 #define ATA_HT1000_S2 0x024a1166 #define ATA_K2 0x02401166 #define ATA_FRODO4 0x02411166 #define ATA_FRODO8 0x02421166 #define ATA_SILICON_IMAGE_ID 0x1095 #define ATA_SII3114 0x31141095 #define ATA_SII3512 0x35121095 #define ATA_SII3112 0x31121095 #define ATA_SII3112_1 0x02401095 #define ATA_SII3124 0x31241095 #define ATA_SII3132 0x31321095 #define ATA_SII3132_1 0x02421095 #define ATA_SII0680 0x06801095 #define ATA_CMD646 0x06461095 #define ATA_CMD648 0x06481095 #define ATA_CMD649 0x06491095 #define ATA_SIS_ID 0x1039 #define ATA_SISSOUTH 0x00081039 #define ATA_SIS5511 0x55111039 #define ATA_SIS5513 0x55131039 #define ATA_SIS5517 0x55171039 #define ATA_SIS5518 0x55181039 #define ATA_SIS5571 0x55711039 #define ATA_SIS5591 0x55911039 #define ATA_SIS5596 0x55961039 #define ATA_SIS5597 0x55971039 #define ATA_SIS5598 0x55981039 #define ATA_SIS5600 0x56001039 #define ATA_SIS530 0x05301039 #define ATA_SIS540 0x05401039 #define ATA_SIS550 0x05501039 #define ATA_SIS620 0x06201039 #define ATA_SIS630 0x06301039 #define ATA_SIS635 0x06351039 #define ATA_SIS633 0x06331039 #define ATA_SIS640 0x06401039 #define ATA_SIS645 0x06451039 #define ATA_SIS646 0x06461039 #define ATA_SIS648 0x06481039 #define ATA_SIS650 0x06501039 #define ATA_SIS651 0x06511039 #define ATA_SIS652 0x06521039 #define ATA_SIS655 0x06551039 #define ATA_SIS658 0x06581039 #define ATA_SIS661 0x06611039 #define ATA_SIS730 0x07301039 #define ATA_SIS733 0x07331039 #define ATA_SIS735 0x07351039 #define ATA_SIS740 0x07401039 #define ATA_SIS745 0x07451039 #define ATA_SIS746 0x07461039 #define ATA_SIS748 0x07481039 #define ATA_SIS750 0x07501039 #define ATA_SIS751 0x07511039 #define ATA_SIS752 0x07521039 #define ATA_SIS755 0x07551039 #define ATA_SIS961 0x09611039 #define ATA_SIS962 0x09621039 #define ATA_SIS963 0x09631039 #define ATA_SIS964 0x09641039 #define ATA_SIS965 0x09651039 #define ATA_SIS180 0x01801039 #define ATA_SIS181 0x01811039 #define ATA_SIS182 0x01821039 #define ATA_VIA_ID 0x1106 #define ATA_VIA82C571 0x05711106 #define ATA_VIA82C586 0x05861106 #define ATA_VIA82C596 0x05961106 #define ATA_VIA82C686 0x06861106 #define ATA_VIA8231 0x82311106 #define ATA_VIA8233 0x30741106 #define ATA_VIA8233A 0x31471106 #define ATA_VIA8233C 0x31091106 #define ATA_VIA8235 0x31771106 #define ATA_VIA8237 0x32271106 #define ATA_VIA8237A 0x05911106 #define ATA_VIA8237S 0x53371106 #define ATA_VIA8251 0x33491106 #define ATA_VIA8361 0x31121106 #define ATA_VIA8363 0x03051106 #define ATA_VIA8371 0x03911106 #define ATA_VIA8662 0x31021106 #define ATA_VIA6410 0x31641106 #define ATA_VIA6420 0x31491106 #define ATA_VIA6421 0x32491106 /* global prototypes ata-pci.c */ int ata_pci_probe(device_t dev); int ata_pci_attach(device_t dev); int ata_pci_detach(device_t dev); int ata_pci_suspend(device_t dev); int ata_pci_resume(device_t dev); struct resource * ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags); int ata_pci_release_resource(device_t dev, device_t child, int type, int rid, struct resource *r); int ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, int flags, driver_filter_t *filter, driver_intr_t *function, void *argument, void **cookiep); int ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, void *cookie); int ata_pci_ch_attach(device_t dev); int ata_pci_ch_detach(device_t dev); int ata_pci_status(device_t dev); void ata_pci_hw(device_t dev); void ata_pci_dmainit(device_t dev); void ata_pci_dmafini(device_t dev); char *ata_pcivendor2str(device_t dev); int ata_legacy(device_t); void ata_generic_intr(void *data); int ata_setup_interrupt(device_t dev, void *intr_func); void ata_set_desc(device_t dev); struct ata_chip_id *ata_match_chip(device_t dev, struct ata_chip_id *index); struct ata_chip_id *ata_find_chip(device_t dev, struct ata_chip_id *index, int slot); void ata_print_cable(device_t dev, u_int8_t *who); int ata_check_80pin(device_t dev, int mode); int ata_mode2idx(int mode); /* global prototypes ata-sata.c */ void ata_sata_phy_check_events(device_t dev); -int ata_sata_phy_reset(device_t dev); +int ata_sata_scr_read(struct ata_channel *ch, int port, int reg, uint32_t *val); +int ata_sata_scr_write(struct ata_channel *ch, int port, int reg, uint32_t val); +int ata_sata_phy_reset(device_t dev, int port, int quick); void ata_sata_setmode(device_t dev, int mode); int ata_request2fis_h2d(struct ata_request *request, u_int8_t *fis); void ata_pm_identify(device_t dev); /* global prototypes from chipsets/ata-*.c */ int ata_ahci_chipinit(device_t); int ata_ahci_ch_attach(device_t dev); int ata_ahci_ch_detach(device_t dev); +int ata_ahci_ch_suspend(device_t dev); +int ata_ahci_ch_resume(device_t dev); void ata_ahci_reset(device_t dev); int ata_marvell_edma_chipinit(device_t); int ata_sii_chipinit(device_t); /* global prototypes ata-dma.c */ void ata_dmainit(device_t); void ata_dmafini(device_t dev); /* externs */ extern devclass_t ata_pci_devclass; /* macro for easy definition of all driver module stuff */ #define ATA_DECLARE_DRIVER(dname) \ static device_method_t __CONCAT(dname,_methods)[] = { \ DEVMETHOD(device_probe, __CONCAT(dname,_probe)), \ DEVMETHOD(device_attach, ata_pci_attach), \ DEVMETHOD(device_detach, ata_pci_detach), \ DEVMETHOD(device_suspend, ata_pci_suspend), \ DEVMETHOD(device_resume, ata_pci_resume), \ DEVMETHOD(device_shutdown, bus_generic_shutdown), \ DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), \ DEVMETHOD(bus_release_resource, ata_pci_release_resource), \ DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), \ DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), \ DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), \ DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), \ { 0, 0 } \ }; \ static driver_t __CONCAT(dname,_driver) = { \ "atapci", \ __CONCAT(dname,_methods), \ sizeof(struct ata_pci_controller) \ }; \ DRIVER_MODULE(dname, pci, __CONCAT(dname,_driver), ata_pci_devclass, 0, 0); \ MODULE_VERSION(dname, 1); \ MODULE_DEPEND(dname, ata, 1, 1, 1); \ MODULE_DEPEND(dname, atapci, 1, 1, 1); Index: head/sys/dev/ata/ata-sata.c =================================================================== --- head/sys/dev/ata/ata-sata.c (revision 190580) +++ head/sys/dev/ata/ata-sata.c (revision 190581) @@ -1,307 +1,378 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void ata_sata_phy_check_events(device_t dev) { struct ata_channel *ch = device_get_softc(dev); u_int32_t error = ATA_IDX_INL(ch, ATA_SERROR); /* clear error bits/interrupt */ ATA_IDX_OUTL(ch, ATA_SERROR, error); /* if we have a connection event deal with it */ if (error & ATA_SE_PHY_CHANGED) { if (bootverbose) { u_int32_t status = ATA_IDX_INL(ch, ATA_SSTATUS); if (((status & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN1) || ((status & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN2)) { device_printf(dev, "CONNECT requested\n"); } else device_printf(dev, "DISCONNECT requested\n"); } taskqueue_enqueue(taskqueue_thread, &ch->conntask); } } +int +ata_sata_scr_read(struct ata_channel *ch, int port, int reg, uint32_t *val) +{ + int r; + + if (port < 0) { + *val = ATA_IDX_INL(ch, reg); + return (0); + } else { + switch (reg) { + case ATA_SSTATUS: + r = 0; + break; + case ATA_SERROR: + r = 1; + break; + case ATA_SCONTROL: + r = 2; + break; + default: + return (EINVAL); + } + return (ch->hw.pm_read(ch->dev, port, r, val)); + } +} + +int +ata_sata_scr_write(struct ata_channel *ch, int port, int reg, uint32_t val) +{ + int r; + + if (port < 0) { + ATA_IDX_OUTL(ch, reg, val); + return (0); + } else { + switch (reg) { + case ATA_SERROR: + r = 1; + break; + case ATA_SCONTROL: + r = 2; + break; + default: + return (EINVAL); + } + return (ch->hw.pm_write(ch->dev, port, r, val)); + } +} + static int -ata_sata_connect(struct ata_channel *ch) +ata_sata_connect(struct ata_channel *ch, int port) { u_int32_t status; int timeout; /* wait up to 1 second for "connect well" */ for (timeout = 0; timeout < 100 ; timeout++) { - status = ATA_IDX_INL(ch, ATA_SSTATUS); + if (ata_sata_scr_read(ch, port, ATA_SSTATUS, &status)) + return (0); if ((status & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN1 || (status & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN2) break; ata_udelay(10000); } if (timeout >= 100) { - if (bootverbose) - device_printf(ch->dev, "SATA connect status=%08x\n", status); + if (bootverbose) { + if (port < 0) { + device_printf(ch->dev, "SATA connect timeout status=%08x\n", + status); + } else { + device_printf(ch->dev, "p%d: SATA connect timeout status=%08x\n", + port, status); + } + } return 0; } - if (bootverbose) - device_printf(ch->dev, "SATA connect time=%dms\n", timeout * 10); + if (bootverbose) { + if (port < 0) { + device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", + timeout * 10, status); + } else { + device_printf(ch->dev, "p%d: SATA connect time=%dms status=%08x\n", + port, timeout * 10, status); + } + } /* clear SATA error register */ - ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR)); + ata_sata_scr_write(ch, port, ATA_SERROR, 0xffffffff); return 1; } int -ata_sata_phy_reset(device_t dev) +ata_sata_phy_reset(device_t dev, int port, int quick) { struct ata_channel *ch = device_get_softc(dev); int loop, retry; + uint32_t val; - if ((ATA_IDX_INL(ch, ATA_SCONTROL) & ATA_SC_DET_MASK) == ATA_SC_DET_IDLE) - return ata_sata_connect(ch); + if (quick) { + if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val)) + return (0); + if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_IDLE) + return ata_sata_connect(ch, port); + } + if (bootverbose) { + if (port < 0) { + device_printf(dev, "hardware reset ...\n"); + } else { + device_printf(dev, "p%d: hardware reset ...\n", port); + } + } for (retry = 0; retry < 10; retry++) { for (loop = 0; loop < 10; loop++) { - ATA_IDX_OUTL(ch, ATA_SCONTROL, ATA_SC_DET_RESET); + if (ata_sata_scr_write(ch, port, ATA_SCONTROL, ATA_SC_DET_RESET)) + return (0); ata_udelay(100); - if ((ATA_IDX_INL(ch, ATA_SCONTROL) & ATA_SC_DET_MASK) == - ATA_SC_DET_RESET) + if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val)) + return (0); + if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_RESET) break; } ata_udelay(5000); for (loop = 0; loop < 10; loop++) { - ATA_IDX_OUTL(ch, ATA_SCONTROL, ATA_SC_DET_IDLE | - ATA_SC_IPM_DIS_PARTIAL | - ATA_SC_IPM_DIS_SLUMBER); + if (ata_sata_scr_write(ch, port, ATA_SCONTROL, + ATA_SC_DET_IDLE | + ATA_SC_IPM_DIS_PARTIAL | + ATA_SC_IPM_DIS_SLUMBER)) + return (0); ata_udelay(100); - if ((ATA_IDX_INL(ch, ATA_SCONTROL) & ATA_SC_DET_MASK) == 0) - return ata_sata_connect(ch); + if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val)) + return (0); + if ((val & ATA_SC_DET_MASK) == 0) + return ata_sata_connect(ch, port); } } return 0; } void ata_sata_setmode(device_t dev, int mode) { struct ata_device *atadev = device_get_softc(dev); /* * if we detect that the device isn't a real SATA device we limit * the transfer mode to UDMA5/ATA100. * this works around the problems some devices has with the * Marvell 88SX8030 SATA->PATA converters and UDMA6/ATA133. */ if (atadev->param.satacapabilities != 0x0000 && atadev->param.satacapabilities != 0xffff) { struct ata_channel *ch = device_get_softc(device_get_parent(dev)); /* on some drives we need to set the transfer mode */ ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, ata_limit_mode(dev, mode, ATA_UDMA6)); /* query SATA STATUS for the speed */ if (ch->r_io[ATA_SSTATUS].res && ((ATA_IDX_INL(ch, ATA_SSTATUS) & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN2)) atadev->mode = ATA_SA300; else atadev->mode = ATA_SA150; } else { mode = ata_limit_mode(dev, mode, ATA_UDMA5); if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode)) atadev->mode = mode; } } int ata_request2fis_h2d(struct ata_request *request, u_int8_t *fis) { struct ata_device *atadev = device_get_softc(request->dev); if (request->flags & ATA_R_ATAPI) { fis[0] = 0x27; /* host to device */ fis[1] = 0x80 | (atadev->unit & 0x0f); fis[2] = ATA_PACKET_CMD; if (request->flags & (ATA_R_READ | ATA_R_WRITE)) fis[3] = ATA_F_DMA; else { fis[5] = request->transfersize; fis[6] = request->transfersize >> 8; } fis[7] = ATA_D_LBA; fis[15] = ATA_A_4BIT; return 20; } else { ata_modify_if_48bit(request); fis[0] = 0x27; /* host to device */ fis[1] = 0x80 | (atadev->unit & 0x0f); fis[2] = request->u.ata.command; fis[3] = request->u.ata.feature; fis[4] = request->u.ata.lba; fis[5] = request->u.ata.lba >> 8; fis[6] = request->u.ata.lba >> 16; fis[7] = ATA_D_LBA; if (!(atadev->flags & ATA_D_48BIT_ACTIVE)) fis[7] |= (ATA_D_IBM | (request->u.ata.lba >> 24 & 0x0f)); fis[8] = request->u.ata.lba >> 24; fis[9] = request->u.ata.lba >> 32; fis[10] = request->u.ata.lba >> 40; fis[11] = request->u.ata.feature >> 8; fis[12] = request->u.ata.count; fis[13] = request->u.ata.count >> 8; fis[15] = ATA_A_4BIT; return 20; } return 0; } void ata_pm_identify(device_t dev) { struct ata_channel *ch = device_get_softc(dev); u_int32_t pm_chipid, pm_revision, pm_ports; int port; /* get PM vendor & product data */ if (ch->hw.pm_read(dev, ATA_PM, 0, &pm_chipid)) { device_printf(dev, "error getting PM vendor data\n"); return; } /* get PM revision data */ if (ch->hw.pm_read(dev, ATA_PM, 1, &pm_revision)) { device_printf(dev, "error getting PM revison data\n"); return; } /* get number of HW ports on the PM */ if (ch->hw.pm_read(dev, ATA_PM, 2, &pm_ports)) { device_printf(dev, "error getting PM port info\n"); return; } pm_ports &= 0x0000000f; /* chip specific quirks */ switch (pm_chipid) { case 0x37261095: - /* Some of these bogusly reports 6 ports */ + /* This PM declares 6 ports, while only 5 of them are real. + * Port 5 is enclosure management bridge port, which has implementation + * problems, causing probe faults. Hide it for now. */ + device_printf(dev, "SiI 3726 (rev=%x) Port Multiplier with %d (5) ports\n", + pm_revision, pm_ports); pm_ports = 5; - device_printf(dev, "SiI 3726 r%x Portmultiplier with %d ports\n", + break; + + case 0x47261095: + /* This PM declares 7 ports, while only 5 of them are real. + * Port 5 is some fake "Config Disk" with 640 sectors size, + * port 6 is enclosure management bridge port. + * Both fake ports has implementation problems, causing + * probe faults. Hide them for now. */ + device_printf(dev, "SiI 4726 (rev=%x) Port Multiplier with %d (5) ports\n", pm_revision, pm_ports); + pm_ports = 5; break; default: - device_printf(dev, "Portmultiplier (id=%08x rev=%x) with %d ports\n", + device_printf(dev, "Port Multiplier (id=%08x rev=%x) with %d ports\n", pm_chipid, pm_revision, pm_ports); } /* realloc space for needed DMA slots */ ch->dma.dma_slots = pm_ports; /* reset all ports and register if anything connected */ for (port=0; port < pm_ports; port++) { - u_int32_t signature, status; - int timeout; + u_int32_t signature; - if (ch->hw.pm_write(dev, port, 2, ATA_SC_DET_RESET)) { - device_printf(dev, "p%d: writing ATA_SC_DET_RESET failed\n", port); + if (!ata_sata_phy_reset(dev, port, 1)) continue; - } - ata_udelay(5000); - - if (ch->hw.pm_write(dev, port, 2, ATA_SC_DET_IDLE)) { - device_printf(dev, "p%d: writing ATA_SC_DET_idle failed\n", port); - continue; - } - - ata_udelay(5000); - - /* wait up to 1 second for "connect well" */ - for (timeout = 0; timeout < 100 ; timeout++) { - ch->hw.pm_read(dev, port, 0, &status); - if ((status & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN1 || - (status & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN2) - break; - ata_udelay(10000); - } - if (timeout >= 100) { - if (bootverbose) - device_printf(dev, "p%d: connect status=%08x\n", port, status); - continue; - } - if (bootverbose) - device_printf(dev, "p%d: connect time %dms\n", port, timeout * 10); - - /* clear SERROR register */ - ch->hw.pm_write(dev, port, 1, 0xffffffff); + /* + * XXX: I have no idea how to properly wait for PMP port hardreset + * completion. Without this delay soft reset does not completes + * successfully. + */ + DELAY(1000000); signature = ch->hw.softreset(dev, port); if (bootverbose) device_printf(dev, "p%d: SIGNATURE=%08x\n", port, signature); /* figure out whats there */ switch (signature >> 16) { case 0x0000: ch->devices |= (ATA_ATA_MASTER << port); continue; case 0xeb14: ch->devices |= (ATA_ATAPI_MASTER << port); continue; } } } Index: head/sys/dev/ata/ata-usb.c =================================================================== --- head/sys/dev/ata/ata-usb.c (revision 190580) +++ head/sys/dev/ata/ata-usb.c (revision 190581) Property changes on: head/sys/dev/ata/ata-usb.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/ata/ata-usb.c:r189793-190578 Index: head/sys/dev/ata/chipsets/ata-ahci.c =================================================================== --- head/sys/dev/ata/chipsets/ata-ahci.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-ahci.c (revision 190581) @@ -1,826 +1,903 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_ahci_ctlr_reset(device_t dev); static int ata_ahci_suspend(device_t dev); static int ata_ahci_status(device_t dev); static int ata_ahci_begin_transaction(struct ata_request *request); static int ata_ahci_end_transaction(struct ata_request *request); static int ata_ahci_pm_read(device_t dev, int port, int reg, u_int32_t *result); static int ata_ahci_pm_write(device_t dev, int port, int reg, u_int32_t result); +static int ata_ahci_hardreset(device_t dev, int port, uint32_t *signature); static u_int32_t ata_ahci_softreset(device_t dev, int port); static void ata_ahci_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); static int ata_ahci_setup_fis(struct ata_ahci_cmd_tab *ctp, struct ata_request *equest); static void ata_ahci_dmainit(device_t dev); +static void ata_ahci_start(device_t dev); +static void ata_ahci_stop(device_t dev); +static void ata_ahci_clo(device_t dev); +static void ata_ahci_start_fr(device_t dev); +static void ata_ahci_stop_fr(device_t dev); /* * AHCI v1.x compliant SATA chipset support functions */ static int ata_ahci_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); char buffer[64]; /* is this a possible AHCI candidate ? */ if (pci_get_class(dev) != PCIC_STORAGE || pci_get_subclass(dev) != PCIS_STORAGE_SATA) return (ENXIO); /* is this PCI device flagged as an AHCI compliant chip ? */ if (pci_read_config(dev, PCIR_PROGIF, 1) != PCIP_STORAGE_SATA_AHCI_1_0) return ENXIO; if (bootverbose) sprintf(buffer, "%s (ID=%08x) AHCI controller", ata_pcivendor2str(dev), pci_get_devid(dev)); else sprintf(buffer, "%s AHCI controller", ata_pcivendor2str(dev)); device_set_desc_copy(dev, buffer); ctlr->chipinit = ata_ahci_chipinit; return 0; } int ata_ahci_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); int error; u_int32_t version; /* if we have a memory BAR(5) we are likely on an AHCI part */ ctlr->r_type2 = SYS_RES_MEMORY; ctlr->r_rid2 = PCIR_BAR(5); if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) return ENXIO; /* setup interrupt delivery if not done allready by a vendor driver */ if (!ctlr->r_irq) { if (ata_setup_interrupt(dev, ata_generic_intr)) { bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); return ENXIO; } } else device_printf(dev, "AHCI called from vendor specific driver\n"); /* reset controller */ if ((error = ata_ahci_ctlr_reset(dev)) != 0) { bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); return (error); }; /* get the number of HW channels */ ctlr->ichannels = ATA_INL(ctlr->r_res2, ATA_AHCI_PI); ctlr->channels = MAX(flsl(ctlr->ichannels), (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_NPMASK) + 1); ctlr->reset = ata_ahci_reset; ctlr->ch_attach = ata_ahci_ch_attach; ctlr->ch_detach = ata_ahci_ch_detach; + ctlr->ch_suspend = ata_ahci_ch_suspend; + ctlr->ch_resume = ata_ahci_ch_resume; ctlr->setmode = ata_sata_setmode; ctlr->suspend = ata_ahci_suspend; ctlr->resume = ata_ahci_ctlr_reset; /* announce we support the HW */ version = ATA_INL(ctlr->r_res2, ATA_AHCI_VS); device_printf(dev, "AHCI Version %x%x.%x%x controller with %d ports PM %s\n", (version >> 24) & 0xff, (version >> 16) & 0xff, (version >> 8) & 0xff, version & 0xff, (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_NPMASK) + 1, (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_CAP_SPM) ? "supported" : "not supported"); return 0; } static int ata_ahci_ctlr_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); int timeout; /* enable AHCI mode */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC, ATA_AHCI_GHC_AE); /* reset AHCI controller */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC, ATA_AHCI_GHC_AE|ATA_AHCI_GHC_HR); for (timeout = 1000; timeout > 0; timeout--) { DELAY(1000); if ((ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) & ATA_AHCI_GHC_HR) == 0) break; } if (timeout == 0) { device_printf(dev, "AHCI controller reset failure\n"); return ENXIO; } /* reenable AHCI mode */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC, ATA_AHCI_GHC_AE); /* clear interrupts */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_IS, ATA_INL(ctlr->r_res2, ATA_AHCI_IS)); /* enable AHCI interrupts */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC, ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_IE); return 0; } static int ata_ahci_suspend(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); /* disable interupts so the state change(s) doesn't trigger */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC, ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) & (~ATA_AHCI_GHC_IE)); return 0; } - int ata_ahci_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit << 7; ata_ahci_dmainit(dev); /* set the SATA resources */ ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = ATA_AHCI_P_SSTS + offset; ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = ATA_AHCI_P_SERR + offset; ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = ATA_AHCI_P_SCTL + offset; ch->r_io[ATA_SACTIVE].res = ctlr->r_res2; ch->r_io[ATA_SACTIVE].offset = ATA_AHCI_P_SACT + offset; ch->hw.status = ata_ahci_status; ch->hw.begin_transaction = ata_ahci_begin_transaction; ch->hw.end_transaction = ata_ahci_end_transaction; ch->hw.command = NULL; /* not used here */ ch->hw.softreset = ata_ahci_softreset; ch->hw.pm_read = ata_ahci_pm_read; ch->hw.pm_write = ata_ahci_pm_write; + ata_ahci_ch_resume(dev); return 0; } int ata_ahci_ch_detach(device_t dev) { + + ata_ahci_ch_suspend(dev); + ata_dmafini(dev); + return (0); +} + +int +ata_ahci_ch_suspend(device_t dev) +{ struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit << 7; /* Disable port interrupts. */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IE + offset, 0); /* Reset command register. */ + ata_ahci_stop(dev); + ata_ahci_stop_fr(dev); ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, 0); /* Allow everything including partial and slumber modes. */ ATA_IDX_OUTL(ch, ATA_SCONTROL, 0); /* Request slumber mode transition and give some time to get there. */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, ATA_AHCI_P_CMD_SLUMBER); DELAY(100); /* Disable PHY. */ ATA_IDX_OUTL(ch, ATA_SCONTROL, ATA_SC_DET_DISABLE); - ata_dmafini(dev); return (0); } +int +ata_ahci_ch_resume(device_t dev) +{ + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); + struct ata_channel *ch = device_get_softc(dev); + uint64_t work; + int offset = ch->unit << 7; + + /* Disable port interrupts */ + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IE + offset, 0); + + /* setup work areas */ + work = ch->dma.work_bus + ATA_AHCI_CL_OFFSET; + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CLB + offset, work & 0xffffffff); + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CLBU + offset, work >> 32); + + work = ch->dma.work_bus + ATA_AHCI_FB_OFFSET; + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FB + offset, work & 0xffffffff); + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FBU + offset, work >> 32); + + /* activate the channel and power/spin up device */ + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, + (ATA_AHCI_P_CMD_ACTIVE | ATA_AHCI_P_CMD_POD | ATA_AHCI_P_CMD_SUD)); + ata_ahci_start_fr(dev); + ata_ahci_start(dev); + + return (0); +} + static int ata_ahci_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t action = ATA_INL(ctlr->r_res2, ATA_AHCI_IS); int offset = ch->unit << 7; #define ATA_AHCI_STATBITS \ (ATA_AHCI_P_IX_IF|ATA_AHCI_P_IX_HBD|ATA_AHCI_P_IX_HBF|ATA_AHCI_P_IX_TFE) if (action & (1 << ch->unit)) { u_int32_t istatus = ATA_INL(ctlr->r_res2, ATA_AHCI_P_IS + offset); u_int32_t cstatus = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CI + offset); /* clear interrupt(s) */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IS + offset, istatus); ATA_OUTL(ctlr->r_res2, ATA_AHCI_IS, 1 << ch->unit); /* do we have any PHY events ? */ if (istatus & (ATA_AHCI_P_IX_PRC | ATA_AHCI_P_IX_PC)) ata_sata_phy_check_events(dev); /* do we have a potentially hanging engine to take care of? */ /* XXX SOS what todo on NCQ */ if ((istatus & ATA_AHCI_STATBITS) && (cstatus & 1)) { u_int32_t cmd = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset); int timeout = 0; /* kill off all activity on this channel */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, cmd & ~(ATA_AHCI_P_CMD_FRE | ATA_AHCI_P_CMD_ST)); /* XXX SOS this is not entirely wrong */ do { DELAY(1000); if (timeout++ > 1000) { device_printf(dev, "stopping AHCI engine failed\n"); break; } } while (ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset) & ATA_AHCI_P_CMD_CR); /* start operations on this channel */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, cmd | (ATA_AHCI_P_CMD_FRE | ATA_AHCI_P_CMD_ST)); return 1; } else /* XXX SOS what todo on NCQ */ return (!(cstatus & 1)); } return 0; } /* must be called with ATA channel locked and state_mtx held */ static int ata_ahci_begin_transaction(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_device *atadev = device_get_softc(request->dev); struct ata_ahci_cmd_tab *ctp; struct ata_ahci_cmd_list *clp; int offset = ch->unit << 7; int port = atadev->unit & 0x0f; int entries = 0; int fis_size; /* get a piece of the workspace for this request */ ctp = (struct ata_ahci_cmd_tab *) (ch->dma.work + ATA_AHCI_CT_OFFSET + (ATA_AHCI_CT_SIZE*request->tag)); /* setup the FIS for this request */ if (!(fis_size = ata_ahci_setup_fis(ctp, request))) { device_printf(request->dev, "setting up SATA FIS failed\n"); request->result = EIO; return ATA_OP_FINISHED; } /* if request moves data setup and load SG list */ if (request->flags & (ATA_R_READ | ATA_R_WRITE)) { if (ch->dma.load(request, ctp->prd_tab, &entries)) { device_printf(request->dev, "setting up DMA failed\n"); request->result = EIO; return ATA_OP_FINISHED; } } /* setup the command list entry */ clp = (struct ata_ahci_cmd_list *) (ch->dma.work + ATA_AHCI_CL_OFFSET + (ATA_AHCI_CL_SIZE*request->tag)); clp->prd_length = entries; clp->cmd_flags = (request->flags & ATA_R_WRITE ? ATA_AHCI_CMD_WRITE : 0) | (request->flags & ATA_R_ATAPI ? (ATA_AHCI_CMD_ATAPI | ATA_AHCI_CMD_PREFETCH) : 0) | (fis_size / sizeof(u_int32_t)) | (port << 12); clp->bytecount = 0; clp->cmd_table_phys = htole64(ch->dma.work_bus + ATA_AHCI_CT_OFFSET + (ATA_AHCI_CT_SIZE * request->tag)); /* clear eventual ACTIVE bit */ ATA_IDX_OUTL(ch, ATA_SACTIVE, ATA_IDX_INL(ch, ATA_SACTIVE) & (1 << request->tag)); /* set command type bit */ if (request->flags & ATA_R_ATAPI) ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset) | ATA_AHCI_P_CMD_ATAPI); else ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset) & ~ATA_AHCI_P_CMD_ATAPI); - /* set PM port to address */ - //ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FBS + offset, (port << 8) | 0x00000001); - /* issue command to controller */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CI + offset, (1 << request->tag)); if (!(request->flags & ATA_R_ATAPI)) { /* device reset doesn't interrupt */ if (request->u.ata.command == ATA_DEVICE_RESET) { u_int32_t tf_data; int timeout = 1000000; do { DELAY(10); tf_data = ATA_INL(ctlr->r_res2, ATA_AHCI_P_TFD + (ch->unit<<7)); } while ((tf_data & ATA_S_BUSY) && timeout--); if (bootverbose) device_printf(ch->dev, "device_reset timeout=%dus\n", (1000000-timeout)*10); request->status = tf_data; if (request->status & ATA_S_ERROR) request->error = tf_data >> 8; return ATA_OP_FINISHED; } } /* start the timeout */ callout_reset(&request->callout, request->timeout * hz, (timeout_t*)ata_timeout, request); return ATA_OP_CONTINUES; } /* must be called with ATA channel locked and state_mtx held */ static int ata_ahci_end_transaction(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_ahci_cmd_list *clp; u_int32_t tf_data; int offset = ch->unit << 7; /* kill the timeout */ callout_stop(&request->callout); /* get status */ tf_data = ATA_INL(ctlr->r_res2, ATA_AHCI_P_TFD + offset); request->status = tf_data; /* if error status get details */ if (request->status & ATA_S_ERROR) request->error = tf_data >> 8; /* on control commands read back registers to the request struct */ if (request->flags & ATA_R_CONTROL) { struct ata_device *atadev = device_get_softc(request->dev); u_int8_t *fis = ch->dma.work + ATA_AHCI_FB_OFFSET + 0x40; request->u.ata.count = fis[12] | ((u_int16_t)fis[13] << 8); request->u.ata.lba = fis[4] | ((u_int64_t)fis[5] << 8) | ((u_int64_t)fis[6] << 16); if (atadev->flags & ATA_D_48BIT_ACTIVE) request->u.ata.lba |= ((u_int64_t)fis[8] << 24) | ((u_int64_t)fis[9] << 32) | ((u_int64_t)fis[10] << 40); else request->u.ata.lba |= ((u_int64_t)(fis[7] & 0x0f) << 24); } /* record how much data we actually moved */ clp = (struct ata_ahci_cmd_list *) (ch->dma.work + ATA_AHCI_CL_OFFSET + (ATA_AHCI_CL_SIZE*request->tag)); request->donecount = clp->bytecount; /* release SG list etc */ ch->dma.unload(request); return ATA_OP_FINISHED; } static int ata_ahci_issue_cmd(device_t dev, u_int16_t flags, int timeout) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct ata_ahci_cmd_list *clp = (struct ata_ahci_cmd_list *)(ch->dma.work + ATA_AHCI_CL_OFFSET); struct ata_ahci_cmd_tab *ctp = (struct ata_ahci_cmd_tab *)(ch->dma.work + ATA_AHCI_CT_OFFSET); u_int32_t status = 0; int offset = ch->unit << 7; int port = (ctp->cfis[1] & 0x0f); int count; clp->prd_length = 0; clp->cmd_flags = (20 / sizeof(u_int32_t)) | flags | (port << 12); clp->bytecount = 0; clp->cmd_table_phys = htole64(ch->dma.work_bus + ATA_AHCI_CT_OFFSET); - /* set PM port */ - //ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FBS + offset, (port << 8) | 0x00000001); - /* issue command to controller */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CI + offset, 1); /* poll for command finished */ for (count = 0; count < timeout; count++) { DELAY(1000); if (!((status = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CI + offset)) & 1)) break; } /* clear interrupts */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IS + offset, - ATA_INL(ctlr->r_res2, ATA_AHCI_P_IS + offset)); + ATA_INL(ctlr->r_res2, ATA_AHCI_P_IS + offset)); if (timeout && (count >= timeout)) { if (bootverbose) { device_printf(dev, "ahci_issue_cmd timeout: %d of %dms, status=%08x\n", count, timeout, status); } return EIO; } return 0; } static int ata_ahci_pm_read(device_t dev, int port, int reg, u_int32_t *result) { struct ata_channel *ch = device_get_softc(dev); struct ata_ahci_cmd_tab *ctp = (struct ata_ahci_cmd_tab *)(ch->dma.work + ATA_AHCI_CT_OFFSET); u_int8_t *fis = ch->dma.work + ATA_AHCI_FB_OFFSET + 0x40; bzero(ctp->cfis, 64); ctp->cfis[0] = 0x27; /* host to device */ ctp->cfis[1] = 0x8f; /* command FIS to PM port */ ctp->cfis[2] = ATA_READ_PM; ctp->cfis[3] = reg; ctp->cfis[7] = port | ATA_D_LBA; ctp->cfis[15] = ATA_A_4BIT; if (ata_ahci_issue_cmd(dev, 0, 10)) { device_printf(dev, "error reading PM port\n"); return EIO; } *result = fis[12] | (fis[4] << 8) | (fis[5] << 16) | (fis[6] << 24); return 0; } static int ata_ahci_pm_write(device_t dev, int port, int reg, u_int32_t value) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct ata_ahci_cmd_tab *ctp = (struct ata_ahci_cmd_tab *)(ch->dma.work + ATA_AHCI_CT_OFFSET); int offset = ch->unit << 7; bzero(ctp->cfis, 64); ctp->cfis[0] = 0x27; /* host to device */ ctp->cfis[1] = 0x8f; /* command FIS to PM port */ ctp->cfis[2] = ATA_WRITE_PM; ctp->cfis[3] = reg; ctp->cfis[7] = port | ATA_D_LBA; ctp->cfis[12] = value & 0xff; ctp->cfis[4] = (value >> 8) & 0xff;; ctp->cfis[5] = (value >> 16) & 0xff;; ctp->cfis[6] = (value >> 24) & 0xff;; ctp->cfis[15] = ATA_A_4BIT; if (ata_ahci_issue_cmd(dev, 0, 100)) { device_printf(dev, "error writing PM port\n"); return ATA_E_ABORT; } return (ATA_INL(ctlr->r_res2, ATA_AHCI_P_TFD + offset) >> 8) & 0xff; } static void ata_ahci_stop(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t cmd; int offset = ch->unit << 7; int timeout; /* kill off all activity on this channel */ cmd = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset); ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, - cmd & ~(ATA_AHCI_P_CMD_FRE | ATA_AHCI_P_CMD_ST)); + cmd & ~ATA_AHCI_P_CMD_ST); /* XXX SOS this is not entirely wrong */ timeout = 0; do { DELAY(1000); if (timeout++ > 1000) { device_printf(dev, "stopping AHCI engine failed\n"); break; } } while (ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset) & ATA_AHCI_P_CMD_CR); } static void ata_ahci_clo(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t cmd; int offset = ch->unit << 7; int timeout; /* issue Command List Override if supported */ if (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_CAP_CLO) { cmd = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset); cmd |= ATA_AHCI_P_CMD_CLO; ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, cmd); timeout = 0; do { DELAY(1000); if (timeout++ > 1000) { device_printf(dev, "executing CLO failed\n"); break; } } while (ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD+offset)&ATA_AHCI_P_CMD_CLO); } } static void ata_ahci_start(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t cmd; int offset = ch->unit << 7; /* clear SATA error register */ ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR)); /* clear any interrupts pending on this channel */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IS + offset, ATA_INL(ctlr->r_res2, ATA_AHCI_P_IS + offset)); /* start operations on this channel */ cmd = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset); ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, - cmd | (ATA_AHCI_P_CMD_FRE | ATA_AHCI_P_CMD_ST) | + cmd | ATA_AHCI_P_CMD_ST | (ch->devices & ATA_PORTMULTIPLIER ? ATA_AHCI_P_CMD_PMA : 0)); } +static void +ata_ahci_stop_fr(device_t dev) +{ + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); + struct ata_channel *ch = device_get_softc(dev); + u_int32_t cmd; + int offset = ch->unit << 7; + int timeout; + + /* kill off all activity on this channel */ + cmd = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset); + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, cmd & ~ATA_AHCI_P_CMD_FRE); + + timeout = 0; + do { + DELAY(1000); + if (timeout++ > 1000) { + device_printf(dev, "stopping AHCI FR engine failed\n"); + break; + } + } + while (ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset) & ATA_AHCI_P_CMD_FR); +} + +static void +ata_ahci_start_fr(device_t dev) +{ + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); + struct ata_channel *ch = device_get_softc(dev); + u_int32_t cmd; + int offset = ch->unit << 7; + + /* start FIS reception on this channel */ + cmd = ATA_INL(ctlr->r_res2, ATA_AHCI_P_CMD + offset); + ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, cmd | ATA_AHCI_P_CMD_FRE); +} + static int ata_ahci_wait_ready(device_t dev, int t) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit << 7; int timeout = 0; + uint32_t val; - while (ATA_INL(ctlr->r_res2, ATA_AHCI_P_TFD + offset) & + while ((val = ATA_INL(ctlr->r_res2, ATA_AHCI_P_TFD + offset)) & (ATA_S_BUSY | ATA_S_DRQ)) { DELAY(1000); if (timeout++ > t) { - device_printf(dev, "port is not ready (timeout %dms)\n", t); - return (-1); + device_printf(dev, "port is not ready (timeout %dms) tfd = %08x\n", t, val); + return (EBUSY); } } if (bootverbose) device_printf(dev, "ready wait time=%dms\n", timeout); return (0); } +static int +ata_ahci_hardreset(device_t dev, int port, uint32_t *signature) +{ + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); + struct ata_channel *ch = device_get_softc(dev); + int offset = ch->unit << 7; + + *signature = 0xffffffff; + ata_ahci_stop(dev); + /* Reset port */ + if (!ata_sata_phy_reset(dev, port, 0)) + return (ENOENT); + /* Wait for clearing busy status. */ + if (ata_ahci_wait_ready(dev, 10000)) { + device_printf(dev, "hardware reset timeout\n"); + return (EBUSY); + } + *signature = ATA_INL(ctlr->r_res2, ATA_AHCI_P_SIG + offset); + ata_ahci_start(dev); + return (0); +} + static u_int32_t ata_ahci_softreset(device_t dev, int port) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit << 7; struct ata_ahci_cmd_tab *ctp = (struct ata_ahci_cmd_tab *)(ch->dma.work + ATA_AHCI_CT_OFFSET); if (bootverbose) device_printf(dev, "software reset port %d...\n", port); /* kick controller into sane state */ ata_ahci_stop(dev); ata_ahci_clo(dev); ata_ahci_start(dev); /* pull reset active */ bzero(ctp->cfis, 64); ctp->cfis[0] = 0x27; ctp->cfis[1] = port & 0x0f; //ctp->cfis[7] = ATA_D_LBA | ATA_D_IBM; ctp->cfis[15] = (ATA_A_4BIT | ATA_A_RESET); if (ata_ahci_issue_cmd(dev, ATA_AHCI_CMD_RESET | ATA_AHCI_CMD_CLR_BUSY,100)) { device_printf(dev, "software reset set timeout\n"); return (-1); } ata_udelay(50); /* pull reset inactive -> device softreset */ bzero(ctp->cfis, 64); ctp->cfis[0] = 0x27; ctp->cfis[1] = port & 0x0f; //ctp->cfis[7] = ATA_D_LBA | ATA_D_IBM; ctp->cfis[15] = ATA_A_4BIT; - ata_ahci_issue_cmd(dev, 0, 1000); + ata_ahci_issue_cmd(dev, 0, 3000); - if (ata_ahci_wait_ready(dev, 1000)) { + if (ata_ahci_wait_ready(dev, 0)) { device_printf(dev, "software reset clear timeout\n"); return (-1); } return ATA_INL(ctlr->r_res2, ATA_AHCI_P_SIG + offset); } void ata_ahci_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); - u_int64_t work; u_int32_t signature; int offset = ch->unit << 7; if (bootverbose) device_printf(dev, "AHCI reset...\n"); /* Disable port interrupts */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IE + offset, 0); - /* setup work areas */ - work = ch->dma.work_bus + ATA_AHCI_CL_OFFSET; - ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CLB + offset, work & 0xffffffff); - ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CLBU + offset, work >> 32); - - work = ch->dma.work_bus + ATA_AHCI_FB_OFFSET; - ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FB + offset, work & 0xffffffff); - ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FBU + offset, work >> 32); - - /* activate the channel and power/spin up device */ - ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_CMD + offset, - (ATA_AHCI_P_CMD_ACTIVE | ATA_AHCI_P_CMD_POD | ATA_AHCI_P_CMD_SUD)); - - ata_ahci_stop(dev); - - /* enable FIS based switching */ - //ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_FBS + offset, 0x00000003); - - if (!ata_sata_phy_reset(dev)) { + if (ata_ahci_hardreset(dev, -1, &signature)) { if (bootverbose) device_printf(dev, "AHCI reset done: phy reset found no device\n"); ch->devices = 0; /* enable wanted port interrupts */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IE + offset, (ATA_AHCI_P_IX_CPD | ATA_AHCI_P_IX_PRC | ATA_AHCI_P_IX_PC)); return; } - ata_ahci_start(dev); - /* enable wanted port interrupts */ ATA_OUTL(ctlr->r_res2, ATA_AHCI_P_IE + offset, (ATA_AHCI_P_IX_CPD | ATA_AHCI_P_IX_TFE | ATA_AHCI_P_IX_HBF | ATA_AHCI_P_IX_HBD | ATA_AHCI_P_IX_IF | ATA_AHCI_P_IX_OF | ATA_AHCI_P_IX_PRC | ATA_AHCI_P_IX_PC | ATA_AHCI_P_IX_DP | ATA_AHCI_P_IX_UF | ATA_AHCI_P_IX_SDB | ATA_AHCI_P_IX_DS | ATA_AHCI_P_IX_PS | ATA_AHCI_P_IX_DHR)); - - /* Wait for initial TFD from device. */ - ata_ahci_wait_ready(dev, 10000); /* only probe for PortMultiplier if HW has support */ if (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_CAP_SPM) { signature = ata_ahci_softreset(dev, ATA_PM); /* Workaround for some ATI chips, failing to soft-reset * when port multiplicator supported, but absent. * XXX: We can also check PxIS.IPMS==1 here to be sure. */ if (signature == 0xffffffff) signature = ata_ahci_softreset(dev, 0); } else { signature = ata_ahci_softreset(dev, 0); } if (bootverbose) device_printf(dev, "SIGNATURE: %08x\n", signature); switch (signature >> 16) { case 0x0000: ch->devices = ATA_ATA_MASTER; break; case 0x9669: ch->devices = ATA_PORTMULTIPLIER; ata_pm_identify(dev); break; case 0xeb14: ch->devices = ATA_ATAPI_MASTER; break; default: /* SOS XXX */ if (bootverbose) device_printf(dev, "Unknown signature, assuming disk device\n"); ch->devices = ATA_ATA_MASTER; } if (bootverbose) device_printf(dev, "AHCI reset done: devices=%08x\n", ch->devices); } static void ata_ahci_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) { struct ata_dmasetprd_args *args = xsc; struct ata_ahci_dma_prd *prd = args->dmatab; int i; if (!(args->error = error)) { for (i = 0; i < nsegs; i++) { prd[i].dba = htole64(segs[i].ds_addr); prd[i].dbc = htole32((segs[i].ds_len - 1) & ATA_AHCI_PRD_MASK); } } KASSERT(nsegs <= ATA_AHCI_DMA_ENTRIES, ("too many DMA segment entries\n")); args->nsegs = nsegs; } static void ata_ahci_dmainit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); ata_dmainit(dev); /* note start and stop are not used here */ ch->dma.setprd = ata_ahci_dmasetprd; ch->dma.max_iosize = 8192 * DEV_BSIZE; if (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_CAP_64BIT) ch->dma.max_address = BUS_SPACE_MAXADDR; } static int ata_ahci_setup_fis(struct ata_ahci_cmd_tab *ctp, struct ata_request *request) { bzero(ctp->cfis, 64); if (request->flags & ATA_R_ATAPI) { bzero(ctp->acmd, 32); bcopy(request->u.atapi.ccb, ctp->acmd, 16); } return ata_request2fis_h2d(request, &ctp->cfis[0]); } ATA_DECLARE_DRIVER(ata_ahci); Index: head/sys/dev/ata/chipsets/ata-intel.c =================================================================== --- head/sys/dev/ata/chipsets/ata-intel.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-intel.c (revision 190581) @@ -1,525 +1,525 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_intel_chipinit(device_t dev); static int ata_intel_ch_attach(device_t dev); static void ata_intel_reset(device_t dev); static void ata_intel_old_setmode(device_t dev, int mode); static void ata_intel_new_setmode(device_t dev, int mode); static void ata_intel_sata_setmode(device_t dev, int mode); static int ata_intel_31244_ch_attach(device_t dev); static int ata_intel_31244_ch_detach(device_t dev); static int ata_intel_31244_status(device_t dev); static void ata_intel_31244_tf_write(struct ata_request *request); static void ata_intel_31244_reset(device_t dev); /* misc defines */ #define INTEL_AHCI 1 /* * Intel chipset support functions */ static int ata_intel_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); static struct ata_chip_id ids[] = {{ ATA_I82371FB, 0, 0, 2, ATA_WDMA2, "PIIX" }, { ATA_I82371SB, 0, 0, 2, ATA_WDMA2, "PIIX3" }, { ATA_I82371AB, 0, 0, 2, ATA_UDMA2, "PIIX4" }, { ATA_I82443MX, 0, 0, 2, ATA_UDMA2, "PIIX4" }, { ATA_I82451NX, 0, 0, 2, ATA_UDMA2, "PIIX4" }, { ATA_I82801AB, 0, 0, 2, ATA_UDMA2, "ICH0" }, { ATA_I82801AA, 0, 0, 2, ATA_UDMA4, "ICH" }, { ATA_I82372FB, 0, 0, 2, ATA_UDMA4, "ICH" }, { ATA_I82801BA, 0, 0, 2, ATA_UDMA5, "ICH2" }, { ATA_I82801BA_1, 0, 0, 2, ATA_UDMA5, "ICH2" }, { ATA_I82801CA, 0, 0, 2, ATA_UDMA5, "ICH3" }, { ATA_I82801CA_1, 0, 0, 2, ATA_UDMA5, "ICH3" }, { ATA_I82801DB, 0, 0, 2, ATA_UDMA5, "ICH4" }, { ATA_I82801DB_1, 0, 0, 2, ATA_UDMA5, "ICH4" }, { ATA_I82801EB, 0, 0, 2, ATA_UDMA5, "ICH5" }, { ATA_I82801EB_S1, 0, 0, 2, ATA_SA150, "ICH5" }, { ATA_I82801EB_R1, 0, 0, 2, ATA_SA150, "ICH5" }, { ATA_I6300ESB, 0, 0, 2, ATA_UDMA5, "6300ESB" }, { ATA_I6300ESB_S1, 0, 0, 2, ATA_SA150, "6300ESB" }, { ATA_I6300ESB_R1, 0, 0, 2, ATA_SA150, "6300ESB" }, { ATA_I82801FB, 0, 0, 2, ATA_UDMA5, "ICH6" }, { ATA_I82801FB_S1, 0, INTEL_AHCI, 0, ATA_SA150, "ICH6" }, { ATA_I82801FB_R1, 0, INTEL_AHCI, 0, ATA_SA150, "ICH6" }, { ATA_I82801FBM, 0, INTEL_AHCI, 0, ATA_SA150, "ICH6M" }, { ATA_I82801GB, 0, 0, 1, ATA_UDMA5, "ICH7" }, { ATA_I82801GB_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH7" }, { ATA_I82801GB_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH7" }, { ATA_I82801GB_AH, 0, INTEL_AHCI, 0, ATA_SA300, "ICH7" }, { ATA_I82801GBM_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH7M" }, { ATA_I82801GBM_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH7M" }, { ATA_I82801GBM_AH, 0, INTEL_AHCI, 0, ATA_SA300, "ICH7M" }, { ATA_I63XXESB2, 0, 0, 1, ATA_UDMA5, "63XXESB2" }, { ATA_I63XXESB2_S1, 0, INTEL_AHCI, 0, ATA_SA300, "63XXESB2" }, { ATA_I63XXESB2_S2, 0, INTEL_AHCI, 0, ATA_SA300, "63XXESB2" }, { ATA_I63XXESB2_R1, 0, INTEL_AHCI, 0, ATA_SA300, "63XXESB2" }, { ATA_I63XXESB2_R2, 0, INTEL_AHCI, 0, ATA_SA300, "63XXESB2" }, { ATA_I82801HB_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8" }, { ATA_I82801HB_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8" }, { ATA_I82801HB_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8" }, { ATA_I82801HB_AH4, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8" }, { ATA_I82801HB_AH6, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8" }, { ATA_I82801HBM, 0, 0, 1, ATA_UDMA5, "ICH8M" }, { ATA_I82801HBM_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8M" }, { ATA_I82801HBM_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8M" }, { ATA_I82801HBM_S3, 0, INTEL_AHCI, 0, ATA_SA300, "ICH8M" }, { ATA_I82801IB_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH9" }, { ATA_I82801IB_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH9" }, { ATA_I82801IB_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH9" }, { ATA_I82801IB_AH4, 0, INTEL_AHCI, 0, ATA_SA300, "ICH9" }, { ATA_I82801IB_AH6, 0, INTEL_AHCI, 0, ATA_SA300, "ICH9" }, { ATA_I82801IB_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH9" }, { ATA_I82801JIB_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JIB_AH, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JIB_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JIB_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JD_S1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JD_AH, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JD_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I82801JD_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" }, { ATA_I31244, 0, 0, 2, ATA_SA150, "31244" }, { 0, 0, 0, 0, 0, 0}}; if (pci_get_vendor(dev) != ATA_INTEL_ID) return ENXIO; if (!(ctlr->chip = ata_match_chip(dev, ids))) return ENXIO; ata_set_desc(dev); ctlr->chipinit = ata_intel_chipinit; return 0; } static int ata_intel_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; /* good old PIIX needs special treatment (not implemented) */ if (ctlr->chip->chipid == ATA_I82371FB) { ctlr->setmode = ata_intel_old_setmode; } /* the intel 31244 needs special care if in DPA mode */ else if (ctlr->chip->chipid == ATA_I31244) { if (pci_get_subclass(dev) != PCIS_STORAGE_IDE) { ctlr->r_type2 = SYS_RES_MEMORY; ctlr->r_rid2 = PCIR_BAR(0); if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) return ENXIO; ctlr->channels = 4; ctlr->ch_attach = ata_intel_31244_ch_attach; ctlr->ch_detach = ata_intel_31244_ch_detach; ctlr->reset = ata_intel_31244_reset; } ctlr->setmode = ata_sata_setmode; } /* non SATA intel chips goes here */ else if (ctlr->chip->max_dma < ATA_SA150) { ctlr->channels = ctlr->chip->cfg2; ctlr->ch_attach = ata_intel_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->setmode = ata_intel_new_setmode; } /* SATA parts can be either compat or AHCI */ else { /* force all ports active "the legacy way" */ pci_write_config(dev, 0x92, pci_read_config(dev, 0x92, 2) | 0x0f, 2); ctlr->ch_attach = ata_intel_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->reset = ata_intel_reset; /* * if we have AHCI capability and AHCI or RAID mode enabled * in BIOS we try for AHCI mode */ if ((ctlr->chip->cfg1 == INTEL_AHCI) && (pci_read_config(dev, 0x90, 1) & 0xc0) && (ata_ahci_chipinit(dev) != ENXIO)) return 0; /* if BAR(5) is IO it should point to SATA interface registers */ ctlr->r_type2 = SYS_RES_IOPORT; ctlr->r_rid2 = PCIR_BAR(5); if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) ctlr->setmode = ata_intel_sata_setmode; else ctlr->setmode = ata_sata_setmode; } return 0; } static int ata_intel_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* setup the usual register normal pci style */ if (ata_pci_ch_attach(dev)) return ENXIO; /* if r_res2 is valid it points to SATA interface registers */ if (ctlr->r_res2) { ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2; ch->r_io[ATA_IDX_ADDR].offset = 0x00; ch->r_io[ATA_IDX_DATA].res = ctlr->r_res2; ch->r_io[ATA_IDX_DATA].offset = 0x04; } ch->flags |= ATA_ALWAYS_DMASTAT; return 0; } static void ata_intel_reset(device_t dev) { device_t parent = device_get_parent(dev); struct ata_pci_controller *ctlr = device_get_softc(parent); struct ata_channel *ch = device_get_softc(dev); int mask, timeout; /* ICH6 & ICH7 in compat mode has 4 SATA ports as master/slave on 2 ch's */ if (ctlr->chip->cfg1) { mask = (0x0005 << ch->unit); } else { /* ICH5 in compat mode has SATA ports as master/slave on 1 channel */ if (pci_read_config(parent, 0x90, 1) & 0x04) mask = 0x0003; else { mask = (0x0001 << ch->unit); /* XXX SOS should be in intel_ch_attach if we grow it */ ch->flags |= ATA_NO_SLAVE; } } pci_write_config(parent, 0x92, pci_read_config(parent, 0x92, 2) & ~mask, 2); DELAY(10); pci_write_config(parent, 0x92, pci_read_config(parent, 0x92, 2) | mask, 2); /* wait up to 1 sec for "connect well" */ for (timeout = 0; timeout < 100 ; timeout++) { if (((pci_read_config(parent, 0x92, 2) & (mask << 4)) == (mask << 4)) && (ATA_IDX_INB(ch, ATA_STATUS) != 0xff)) break; ata_udelay(10000); } ata_generic_reset(dev); } static void ata_intel_old_setmode(device_t dev, int mode) { /* NOT YET */ } static void ata_intel_new_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); int devno = (ch->unit << 1) + atadev->unit; u_int32_t reg40 = pci_read_config(gparent, 0x40, 4); u_int8_t reg44 = pci_read_config(gparent, 0x44, 1); u_int8_t reg48 = pci_read_config(gparent, 0x48, 1); u_int16_t reg4a = pci_read_config(gparent, 0x4a, 2); u_int16_t reg54 = pci_read_config(gparent, 0x54, 2); u_int32_t mask40 = 0, new40 = 0; u_int8_t mask44 = 0, new44 = 0; int error; u_int8_t timings[] = { 0x00, 0x00, 0x10, 0x21, 0x23, 0x10, 0x21, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23 }; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); if ( mode > ATA_UDMA2 && !(reg54 & (0x10 << devno))) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { if (mode >= ATA_UDMA0) { u_int8_t utimings[] = { 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10 }; pci_write_config(gparent, 0x48, reg48 | (0x0001 << devno), 2); pci_write_config(gparent, 0x4a, (reg4a & ~(0x3 << (devno << 2))) | (utimings[mode & ATA_MODE_MASK] << (devno<<2)), 2); } else { pci_write_config(gparent, 0x48, reg48 & ~(0x0001 << devno), 2); pci_write_config(gparent, 0x4a, (reg4a & ~(0x3 << (devno << 2))),2); } reg54 |= 0x0400; if (mode >= ATA_UDMA2) reg54 |= (0x1 << devno); else reg54 &= ~(0x1 << devno); if (mode >= ATA_UDMA5) reg54 |= (0x1000 << devno); else reg54 &= ~(0x1000 << devno); pci_write_config(gparent, 0x54, reg54, 2); reg40 &= ~0x00ff00ff; reg40 |= 0x40774077; if (atadev->unit == ATA_MASTER) { mask40 = 0x3300; new40 = timings[ata_mode2idx(mode)] << 8; } else { mask44 = 0x0f; new44 = ((timings[ata_mode2idx(mode)] & 0x30) >> 2) | (timings[ata_mode2idx(mode)] & 0x03); } if (ch->unit) { mask40 <<= 16; new40 <<= 16; mask44 <<= 4; new44 <<= 4; } pci_write_config(gparent, 0x40, (reg40 & ~mask40) | new40, 4); pci_write_config(gparent, 0x44, (reg44 & ~mask44) | new44, 1); atadev->mode = mode; } } static void ata_intel_sata_setmode(device_t dev, int mode) { struct ata_device *atadev = device_get_softc(dev); if (atadev->param.satacapabilities != 0x0000 && atadev->param.satacapabilities != 0xffff) { struct ata_channel *ch = device_get_softc(device_get_parent(dev)); int devno = (ch->unit << 1) + atadev->unit; /* on some drives we need to set the transfer mode */ ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, ata_limit_mode(dev, mode, ATA_UDMA6)); /* set ATA_SSTATUS register offset */ ATA_IDX_OUTL(ch, ATA_IDX_ADDR, devno * 0x100); /* query SATA STATUS for the speed */ if ((ATA_IDX_INL(ch, ATA_IDX_DATA) & ATA_SS_CONWELL_MASK) == ATA_SS_CONWELL_GEN2) atadev->mode = ATA_SA300; else atadev->mode = ATA_SA150; } else { mode = ata_limit_mode(dev, mode, ATA_UDMA5); if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode)) atadev->mode = mode; } } static int ata_intel_31244_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int i; int ch_offset; ata_pci_dmainit(dev); ch_offset = 0x200 + ch->unit * 0x200; for (i = ATA_DATA; i < ATA_MAX_RES; i++) ch->r_io[i].res = ctlr->r_res2; /* setup ATA registers */ ch->r_io[ATA_DATA].offset = ch_offset + 0x00; ch->r_io[ATA_FEATURE].offset = ch_offset + 0x06; ch->r_io[ATA_COUNT].offset = ch_offset + 0x08; ch->r_io[ATA_SECTOR].offset = ch_offset + 0x0c; ch->r_io[ATA_CYL_LSB].offset = ch_offset + 0x10; ch->r_io[ATA_CYL_MSB].offset = ch_offset + 0x14; ch->r_io[ATA_DRIVE].offset = ch_offset + 0x18; ch->r_io[ATA_COMMAND].offset = ch_offset + 0x1d; ch->r_io[ATA_ERROR].offset = ch_offset + 0x04; ch->r_io[ATA_STATUS].offset = ch_offset + 0x1c; ch->r_io[ATA_ALTSTAT].offset = ch_offset + 0x28; ch->r_io[ATA_CONTROL].offset = ch_offset + 0x29; /* setup DMA registers */ ch->r_io[ATA_SSTATUS].offset = ch_offset + 0x100; ch->r_io[ATA_SERROR].offset = ch_offset + 0x104; ch->r_io[ATA_SCONTROL].offset = ch_offset + 0x108; /* setup SATA registers */ ch->r_io[ATA_BMCMD_PORT].offset = ch_offset + 0x70; ch->r_io[ATA_BMSTAT_PORT].offset = ch_offset + 0x72; ch->r_io[ATA_BMDTP_PORT].offset = ch_offset + 0x74; ch->flags |= ATA_NO_SLAVE; ata_pci_hw(dev); ch->hw.status = ata_intel_31244_status; ch->hw.tf_write = ata_intel_31244_tf_write; /* enable PHY state change interrupt */ ATA_OUTL(ctlr->r_res2, 0x4, ATA_INL(ctlr->r_res2, 0x04) | (0x01 << (ch->unit << 3))); return 0; } static int ata_intel_31244_ch_detach(device_t dev) { ata_pci_dmafini(dev); return (0); } static int ata_intel_31244_status(device_t dev) { /* do we have any PHY events ? */ ata_sata_phy_check_events(dev); /* any drive action to take care of ? */ return ata_pci_status(dev); } static void ata_intel_31244_tf_write(struct ata_request *request) { struct ata_channel *ch = device_get_softc(device_get_parent(request->dev)); struct ata_device *atadev = device_get_softc(request->dev); if (atadev->flags & ATA_D_48BIT_ACTIVE) { ATA_IDX_OUTW(ch, ATA_FEATURE, request->u.ata.feature); ATA_IDX_OUTW(ch, ATA_COUNT, request->u.ata.count); ATA_IDX_OUTW(ch, ATA_SECTOR, ((request->u.ata.lba >> 16) & 0xff00) | (request->u.ata.lba & 0x00ff)); ATA_IDX_OUTW(ch, ATA_CYL_LSB, ((request->u.ata.lba >> 24) & 0xff00) | ((request->u.ata.lba >> 8) & 0x00ff)); ATA_IDX_OUTW(ch, ATA_CYL_MSB, ((request->u.ata.lba >> 32) & 0xff00) | ((request->u.ata.lba >> 16) & 0x00ff)); ATA_IDX_OUTW(ch, ATA_DRIVE, ATA_D_LBA | ATA_DEV(atadev->unit)); } else { ATA_IDX_OUTB(ch, ATA_FEATURE, request->u.ata.feature); ATA_IDX_OUTB(ch, ATA_COUNT, request->u.ata.count); if (atadev->flags & ATA_D_USE_CHS) { int heads, sectors; if (atadev->param.atavalid & ATA_FLAG_54_58) { heads = atadev->param.current_heads; sectors = atadev->param.current_sectors; } else { heads = atadev->param.heads; sectors = atadev->param.sectors; } ATA_IDX_OUTB(ch, ATA_SECTOR, (request->u.ata.lba % sectors)+1); ATA_IDX_OUTB(ch, ATA_CYL_LSB, (request->u.ata.lba / (sectors * heads))); ATA_IDX_OUTB(ch, ATA_CYL_MSB, (request->u.ata.lba / (sectors * heads)) >> 8); ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_DEV(atadev->unit) | (((request->u.ata.lba% (sectors * heads)) / sectors) & 0xf)); } else { ATA_IDX_OUTB(ch, ATA_SECTOR, request->u.ata.lba); ATA_IDX_OUTB(ch, ATA_CYL_LSB, request->u.ata.lba >> 8); ATA_IDX_OUTB(ch, ATA_CYL_MSB, request->u.ata.lba >> 16); ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | ATA_DEV(atadev->unit) | ((request->u.ata.lba >> 24) & 0x0f)); } } } static void ata_intel_31244_reset(device_t dev) { - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); } ATA_DECLARE_DRIVER(ata_intel); MODULE_DEPEND(ata_intel, ata_ahci, 1, 1, 1); Index: head/sys/dev/ata/chipsets/ata-jmicron.c =================================================================== --- head/sys/dev/ata/chipsets/ata-jmicron.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-jmicron.c (revision 190581) @@ -1,211 +1,239 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_jmicron_chipinit(device_t dev); static int ata_jmicron_ch_attach(device_t dev); static int ata_jmicron_ch_detach(device_t dev); +static int ata_jmicron_ch_suspend(device_t dev); +static int ata_jmicron_ch_resume(device_t dev); static void ata_jmicron_reset(device_t dev); static void ata_jmicron_setmode(device_t dev, int mode); /* * JMicron chipset support functions */ static int ata_jmicron_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); struct ata_chip_id *idx; static struct ata_chip_id ids[] = {{ ATA_JMB360, 0, 1, 0, ATA_SA300, "JMB360" }, { ATA_JMB361, 0, 1, 1, ATA_SA300, "JMB361" }, { ATA_JMB363, 0, 2, 1, ATA_SA300, "JMB363" }, { ATA_JMB365, 0, 1, 2, ATA_SA300, "JMB365" }, { ATA_JMB366, 0, 2, 2, ATA_SA300, "JMB366" }, { ATA_JMB368, 0, 0, 1, ATA_UDMA6, "JMB368" }, { 0, 0, 0, 0, 0, 0}}; char buffer[64]; if (pci_get_vendor(dev) != ATA_JMICRON_ID) return ENXIO; if (!(idx = ata_match_chip(dev, ids))) return ENXIO; if ((pci_read_config(dev, 0xdf, 1) & 0x40) && (pci_get_function(dev) == (pci_read_config(dev, 0x40, 1) & 0x02 >> 1))) sprintf(buffer, "JMicron %s %s controller", idx->text, ata_mode2str(ATA_UDMA6)); else sprintf(buffer, "JMicron %s %s controller", idx->text, ata_mode2str(idx->max_dma)); device_set_desc_copy(dev, buffer); ctlr->chip = idx; ctlr->chipinit = ata_jmicron_chipinit; return 0; } static int ata_jmicron_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); int error; if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; /* do we have multiple PCI functions ? */ if (pci_read_config(dev, 0xdf, 1) & 0x40) { /* are we on the AHCI part ? */ if (ata_ahci_chipinit(dev) != ENXIO) return 0; /* otherwise we are on the PATA part */ ctlr->ch_attach = ata_pci_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->reset = ata_generic_reset; ctlr->setmode = ata_jmicron_setmode; ctlr->channels = ctlr->chip->cfg2; } else { /* set controller configuration to a combined setup we support */ pci_write_config(dev, 0x40, 0x80c0a131, 4); pci_write_config(dev, 0x80, 0x01200000, 4); if (ctlr->chip->cfg1 && (error = ata_ahci_chipinit(dev))) return error; ctlr->ch_attach = ata_jmicron_ch_attach; ctlr->ch_detach = ata_jmicron_ch_detach; + ctlr->ch_suspend = ata_jmicron_ch_suspend; + ctlr->ch_resume = ata_jmicron_ch_resume; ctlr->reset = ata_jmicron_reset; ctlr->setmode = ata_jmicron_setmode; /* set the number of HW channels */ ctlr->channels = ctlr->chip->cfg1 + ctlr->chip->cfg2; ctlr->ichannels |= ((0xffffffffU >> (32 - ctlr->chip->cfg2)) << ctlr->chip->cfg1); } return 0; } static int ata_jmicron_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int error; if (ch->unit >= ctlr->chip->cfg1) { ch->unit -= ctlr->chip->cfg1; error = ata_pci_ch_attach(dev); ch->unit += ctlr->chip->cfg1; } else error = ata_ahci_ch_attach(dev); return error; } static int ata_jmicron_ch_detach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int error; if (ch->unit >= ctlr->chip->cfg1) { ch->unit -= ctlr->chip->cfg1; error = ata_pci_ch_detach(dev); ch->unit += ctlr->chip->cfg1; } else error = ata_ahci_ch_detach(dev); + return (error); +} + +static int +ata_jmicron_ch_suspend(device_t dev) +{ + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); + struct ata_channel *ch = device_get_softc(dev); + int error = 0; + + if (ch->unit < ctlr->chip->cfg1) + error = ata_ahci_ch_suspend(dev); + return error; +} + +static int +ata_jmicron_ch_resume(device_t dev) +{ + struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); + struct ata_channel *ch = device_get_softc(dev); + int error = 0; + + if (ch->unit < ctlr->chip->cfg1) + error = ata_ahci_ch_resume(dev); return (error); } static void ata_jmicron_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); if (ch->unit >= ctlr->chip->cfg1) ata_generic_reset(dev); else ata_ahci_reset(dev); } static void ata_jmicron_setmode(device_t dev, int mode) { struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev)); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); if (pci_read_config(dev, 0xdf, 1) & 0x40 || ch->unit >= ctlr->chip->cfg1) { struct ata_device *atadev = device_get_softc(dev); /* check for 80pin cable present */ if (pci_read_config(dev, 0x40, 1) & 0x08) mode = ata_limit_mode(dev, mode, ATA_UDMA2); else mode = ata_limit_mode(dev, mode, ATA_UDMA6); if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode)) atadev->mode = mode; } else ata_sata_setmode(dev, mode); } ATA_DECLARE_DRIVER(ata_jmicron); MODULE_DEPEND(ata_jmicron, ata_ahci, 1, 1, 1); Index: head/sys/dev/ata/chipsets/ata-marvell.c =================================================================== --- head/sys/dev/ata/chipsets/ata-marvell.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-marvell.c (revision 190581) @@ -1,552 +1,552 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_marvell_pata_chipinit(device_t dev); static int ata_marvell_pata_ch_attach(device_t dev); static void ata_marvell_pata_setmode(device_t dev, int mode); static int ata_marvell_edma_ch_attach(device_t dev); static int ata_marvell_edma_ch_detach(device_t dev); static int ata_marvell_edma_status(device_t dev); static int ata_marvell_edma_begin_transaction(struct ata_request *request); static int ata_marvell_edma_end_transaction(struct ata_request *request); static void ata_marvell_edma_reset(device_t dev); static void ata_marvell_edma_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); static void ata_marvell_edma_dmainit(device_t dev); /* misc defines */ #define MV_50XX 50 #define MV_60XX 60 #define MV_61XX 61 /* * Marvell chipset support functions */ #define ATA_MV_HOST_BASE(ch) \ ((ch->unit & 3) * 0x0100) + (ch->unit > 3 ? 0x30000 : 0x20000) #define ATA_MV_EDMA_BASE(ch) \ ((ch->unit & 3) * 0x2000) + (ch->unit > 3 ? 0x30000 : 0x20000) struct ata_marvell_response { u_int16_t tag; u_int8_t edma_status; u_int8_t dev_status; u_int32_t timestamp; }; struct ata_marvell_dma_prdentry { u_int32_t addrlo; u_int32_t count; u_int32_t addrhi; u_int32_t reserved; }; static int ata_marvell_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); static struct ata_chip_id ids[] = {{ ATA_M88SX5040, 0, 4, MV_50XX, ATA_SA150, "88SX5040" }, { ATA_M88SX5041, 0, 4, MV_50XX, ATA_SA150, "88SX5041" }, { ATA_M88SX5080, 0, 8, MV_50XX, ATA_SA150, "88SX5080" }, { ATA_M88SX5081, 0, 8, MV_50XX, ATA_SA150, "88SX5081" }, { ATA_M88SX6041, 0, 4, MV_60XX, ATA_SA300, "88SX6041" }, { ATA_M88SX6081, 0, 8, MV_60XX, ATA_SA300, "88SX6081" }, { ATA_M88SX6101, 0, 1, MV_61XX, ATA_UDMA6, "88SX6101" }, { ATA_M88SX6121, 0, 1, MV_61XX, ATA_UDMA6, "88SX6121" }, { ATA_M88SX6145, 0, 2, MV_61XX, ATA_UDMA6, "88SX6145" }, { 0, 0, 0, 0, 0, 0}}; if (pci_get_vendor(dev) != ATA_MARVELL_ID) return ENXIO; if (!(ctlr->chip = ata_match_chip(dev, ids))) return ENXIO; ata_set_desc(dev); switch (ctlr->chip->cfg2) { case MV_50XX: case MV_60XX: ctlr->chipinit = ata_marvell_edma_chipinit; break; case MV_61XX: ctlr->chipinit = ata_marvell_pata_chipinit; break; } return 0; } static int ata_marvell_pata_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; ctlr->ch_attach = ata_marvell_pata_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->setmode = ata_marvell_pata_setmode; ctlr->channels = ctlr->chip->cfg1; return 0; } static int ata_marvell_pata_ch_attach(device_t dev) { struct ata_channel *ch = device_get_softc(dev); /* setup the usual register normal pci style */ if (ata_pci_ch_attach(dev)) return ENXIO; /* dont use 32 bit PIO transfers */ ch->flags |= ATA_USE_16BIT; return 0; } static void ata_marvell_pata_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_device *atadev = device_get_softc(dev); mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); mode = ata_check_80pin(dev, mode); if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode)) atadev->mode = mode; } int ata_marvell_edma_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; ctlr->r_type1 = SYS_RES_MEMORY; ctlr->r_rid1 = PCIR_BAR(0); if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, RF_ACTIVE))) return ENXIO; /* mask all host controller interrupts */ ATA_OUTL(ctlr->r_res1, 0x01d64, 0x00000000); /* mask all PCI interrupts */ ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x00000000); ctlr->ch_attach = ata_marvell_edma_ch_attach; ctlr->ch_detach = ata_marvell_edma_ch_detach; ctlr->reset = ata_marvell_edma_reset; ctlr->setmode = ata_sata_setmode; ctlr->channels = ctlr->chip->cfg1; /* clear host controller interrupts */ ATA_OUTL(ctlr->r_res1, 0x20014, 0x00000000); if (ctlr->chip->cfg1 > 4) ATA_OUTL(ctlr->r_res1, 0x30014, 0x00000000); /* clear PCI interrupts */ ATA_OUTL(ctlr->r_res1, 0x01d58, 0x00000000); /* unmask PCI interrupts we want */ ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x007fffff); /* unmask host controller interrupts we want */ ATA_OUTL(ctlr->r_res1, 0x01d64, 0x000000ff/*HC0*/ | 0x0001fe00/*HC1*/ | /*(1<<19) | (1<<20) | (1<<21) |*/(1<<22) | (1<<24) | (0x7f << 25)); return 0; } static int ata_marvell_edma_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int64_t work = ch->dma.work_bus; int i; ata_marvell_edma_dmainit(dev); /* clear work area */ bzero(ch->dma.work, 1024+256); /* set legacy ATA resources */ for (i = ATA_DATA; i <= ATA_COMMAND; i++) { ch->r_io[i].res = ctlr->r_res1; ch->r_io[i].offset = 0x02100 + (i << 2) + ATA_MV_EDMA_BASE(ch); } ch->r_io[ATA_CONTROL].res = ctlr->r_res1; ch->r_io[ATA_CONTROL].offset = 0x02120 + ATA_MV_EDMA_BASE(ch); ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res1; ata_default_registers(dev); /* set SATA resources */ switch (ctlr->chip->cfg2) { case MV_50XX: ch->r_io[ATA_SSTATUS].res = ctlr->r_res1; ch->r_io[ATA_SSTATUS].offset = 0x00100 + ATA_MV_HOST_BASE(ch); ch->r_io[ATA_SERROR].res = ctlr->r_res1; ch->r_io[ATA_SERROR].offset = 0x00104 + ATA_MV_HOST_BASE(ch); ch->r_io[ATA_SCONTROL].res = ctlr->r_res1; ch->r_io[ATA_SCONTROL].offset = 0x00108 + ATA_MV_HOST_BASE(ch); break; case MV_60XX: ch->r_io[ATA_SSTATUS].res = ctlr->r_res1; ch->r_io[ATA_SSTATUS].offset = 0x02300 + ATA_MV_EDMA_BASE(ch); ch->r_io[ATA_SERROR].res = ctlr->r_res1; ch->r_io[ATA_SERROR].offset = 0x02304 + ATA_MV_EDMA_BASE(ch); ch->r_io[ATA_SCONTROL].res = ctlr->r_res1; ch->r_io[ATA_SCONTROL].offset = 0x02308 + ATA_MV_EDMA_BASE(ch); ch->r_io[ATA_SACTIVE].res = ctlr->r_res1; ch->r_io[ATA_SACTIVE].offset = 0x02350 + ATA_MV_EDMA_BASE(ch); break; } ch->flags |= ATA_NO_SLAVE; ch->flags |= ATA_USE_16BIT; /* XXX SOS needed ? */ ata_generic_hw(dev); ch->hw.begin_transaction = ata_marvell_edma_begin_transaction; ch->hw.end_transaction = ata_marvell_edma_end_transaction; ch->hw.status = ata_marvell_edma_status; /* disable the EDMA machinery */ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002); DELAY(100000); /* SOS should poll for disabled */ /* set configuration to non-queued 128b read transfers stop on error */ ATA_OUTL(ctlr->r_res1, 0x02000 + ATA_MV_EDMA_BASE(ch), (1<<11) | (1<<13)); /* request queue base high */ ATA_OUTL(ctlr->r_res1, 0x02010 + ATA_MV_EDMA_BASE(ch), work >> 32); /* request queue in ptr */ ATA_OUTL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch), work & 0xffffffff); /* request queue out ptr */ ATA_OUTL(ctlr->r_res1, 0x02018 + ATA_MV_EDMA_BASE(ch), 0x0); /* response queue base high */ work += 1024; ATA_OUTL(ctlr->r_res1, 0x0201c + ATA_MV_EDMA_BASE(ch), work >> 32); /* response queue in ptr */ ATA_OUTL(ctlr->r_res1, 0x02020 + ATA_MV_EDMA_BASE(ch), 0x0); /* response queue out ptr */ ATA_OUTL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch), work & 0xffffffff); /* clear SATA error register */ ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR)); /* clear any outstanding error interrupts */ ATA_OUTL(ctlr->r_res1, 0x02008 + ATA_MV_EDMA_BASE(ch), 0x0); /* unmask all error interrupts */ ATA_OUTL(ctlr->r_res1, 0x0200c + ATA_MV_EDMA_BASE(ch), ~0x0); /* enable EDMA machinery */ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000001); return 0; } static int ata_marvell_edma_ch_detach(device_t dev) { ata_dmafini(dev); return (0); } static int ata_marvell_edma_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t cause = ATA_INL(ctlr->r_res1, 0x01d60); int shift = (ch->unit << 1) + (ch->unit > 3); if (cause & (1 << shift)) { /* clear interrupt(s) */ ATA_OUTL(ctlr->r_res1, 0x02008 + ATA_MV_EDMA_BASE(ch), 0x0); /* do we have any PHY events ? */ ata_sata_phy_check_events(dev); } /* do we have any device action ? */ return (cause & (2 << shift)); } /* must be called with ATA channel locked and state_mtx held */ static int ata_marvell_edma_begin_transaction(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); u_int32_t req_in; u_int8_t *bytep; u_int16_t *wordp; u_int32_t *quadp; int i; int error, slot; /* only DMA R/W goes through the EMDA machine */ if (request->u.ata.command != ATA_READ_DMA && request->u.ata.command != ATA_WRITE_DMA) { /* disable the EDMA machinery */ if (ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001) ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002); return ata_begin_transaction(request); } /* check for 48 bit access and convert if needed */ ata_modify_if_48bit(request); /* check sanity, setup SG list and DMA engine */ if ((error = ch->dma.load(request, NULL, NULL))) { device_printf(request->dev, "setting up DMA failed\n"); request->result = error; return ATA_OP_FINISHED; } /* get next free request queue slot */ req_in = ATA_INL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch)); slot = (((req_in & ~0xfffffc00) >> 5) + 0) & 0x1f; bytep = (u_int8_t *)(ch->dma.work); bytep += (slot << 5); wordp = (u_int16_t *)bytep; quadp = (u_int32_t *)bytep; /* fill in this request */ quadp[0] = (long)request->dma->sg_bus & 0xffffffff; quadp[1] = (u_int64_t)request->dma->sg_bus >> 32; wordp[4] = (request->flags & ATA_R_READ ? 0x01 : 0x00) | (request->tag<<1); i = 10; bytep[i++] = (request->u.ata.count >> 8) & 0xff; bytep[i++] = 0x10 | ATA_COUNT; bytep[i++] = request->u.ata.count & 0xff; bytep[i++] = 0x10 | ATA_COUNT; bytep[i++] = (request->u.ata.lba >> 24) & 0xff; bytep[i++] = 0x10 | ATA_SECTOR; bytep[i++] = request->u.ata.lba & 0xff; bytep[i++] = 0x10 | ATA_SECTOR; bytep[i++] = (request->u.ata.lba >> 32) & 0xff; bytep[i++] = 0x10 | ATA_CYL_LSB; bytep[i++] = (request->u.ata.lba >> 8) & 0xff; bytep[i++] = 0x10 | ATA_CYL_LSB; bytep[i++] = (request->u.ata.lba >> 40) & 0xff; bytep[i++] = 0x10 | ATA_CYL_MSB; bytep[i++] = (request->u.ata.lba >> 16) & 0xff; bytep[i++] = 0x10 | ATA_CYL_MSB; bytep[i++] = ATA_D_LBA | ATA_D_IBM | ((request->u.ata.lba >> 24) & 0xf); bytep[i++] = 0x10 | ATA_DRIVE; bytep[i++] = request->u.ata.command; bytep[i++] = 0x90 | ATA_COMMAND; /* enable EDMA machinery if needed */ if (!(ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001)) { ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000001); while (!(ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001)) DELAY(10); } /* tell EDMA it has a new request */ slot = (((req_in & ~0xfffffc00) >> 5) + 1) & 0x1f; req_in &= 0xfffffc00; req_in += (slot << 5); ATA_OUTL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch), req_in); return ATA_OP_CONTINUES; } /* must be called with ATA channel locked and state_mtx held */ static int ata_marvell_edma_end_transaction(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); int offset = (ch->unit > 3 ? 0x30014 : 0x20014); u_int32_t icr = ATA_INL(ctlr->r_res1, offset); int res; /* EDMA interrupt */ if ((icr & (0x0001 << (ch->unit & 3)))) { struct ata_marvell_response *response; u_int32_t rsp_in, rsp_out; int slot; /* stop timeout */ callout_stop(&request->callout); /* get response ptr's */ rsp_in = ATA_INL(ctlr->r_res1, 0x02020 + ATA_MV_EDMA_BASE(ch)); rsp_out = ATA_INL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch)); slot = (((rsp_in & ~0xffffff00) >> 3)) & 0x1f; rsp_out &= 0xffffff00; rsp_out += (slot << 3); response = (struct ata_marvell_response *) (ch->dma.work + 1024 + (slot << 3)); /* record status for this request */ request->status = response->dev_status; request->error = 0; /* ack response */ ATA_OUTL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch), rsp_out); /* update progress */ if (!(request->status & ATA_S_ERROR) && !(request->flags & ATA_R_TIMEOUT)) request->donecount = request->bytecount; /* unload SG list */ ch->dma.unload(request); res = ATA_OP_FINISHED; } /* legacy ATA interrupt */ else { res = ata_end_transaction(request); } /* ack interrupt */ ATA_OUTL(ctlr->r_res1, offset, ~(icr & (0x0101 << (ch->unit & 3)))); return res; } static void ata_marvell_edma_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* disable the EDMA machinery */ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002); while ((ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001)) DELAY(10); /* clear SATA error register */ ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR)); /* clear any outstanding error interrupts */ ATA_OUTL(ctlr->r_res1, 0x02008 + ATA_MV_EDMA_BASE(ch), 0x0); /* unmask all error interrupts */ ATA_OUTL(ctlr->r_res1, 0x0200c + ATA_MV_EDMA_BASE(ch), ~0x0); /* enable channel and test for devices */ - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); /* enable EDMA machinery */ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000001); } static void ata_marvell_edma_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) { struct ata_dmasetprd_args *args = xsc; struct ata_marvell_dma_prdentry *prd = args->dmatab; int i; if ((args->error = error)) return; for (i = 0; i < nsegs; i++) { prd[i].addrlo = htole32(segs[i].ds_addr); prd[i].count = htole32(segs[i].ds_len); prd[i].addrhi = htole32((u_int64_t)segs[i].ds_addr >> 32); } prd[i - 1].count |= htole32(ATA_DMA_EOT); KASSERT(nsegs <= ATA_DMA_ENTRIES, ("too many DMA segment entries\n")); args->nsegs = nsegs; } static void ata_marvell_edma_dmainit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); ata_dmainit(dev); /* note start and stop are not used here */ ch->dma.setprd = ata_marvell_edma_dmasetprd; /* if 64bit support present adjust max address used */ if (ATA_INL(ctlr->r_res1, 0x00d00) & 0x00000004) ch->dma.max_address = BUS_SPACE_MAXADDR; /* chip does not reliably do 64K DMA transfers */ ch->dma.max_iosize = 64 * DEV_BSIZE; } ATA_DECLARE_DRIVER(ata_marvell); Index: head/sys/dev/ata/chipsets/ata-nvidia.c =================================================================== --- head/sys/dev/ata/chipsets/ata-nvidia.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-nvidia.c (revision 190581) @@ -1,288 +1,288 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_nvidia_chipinit(device_t dev); static int ata_nvidia_ch_attach(device_t dev); static int ata_nvidia_status(device_t dev); static void ata_nvidia_reset(device_t dev); static void ata_nvidia_setmode(device_t dev, int mode); /* misc defines */ #define NV4 0x01 #define NVQ 0x02 #define NVAHCI 0x04 /* * nVidia chipset support functions */ static int ata_nvidia_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); static struct ata_chip_id ids[] = {{ ATA_NFORCE1, 0, 0, 0, ATA_UDMA5, "nForce" }, { ATA_NFORCE2, 0, 0, 0, ATA_UDMA6, "nForce2" }, { ATA_NFORCE2_PRO, 0, 0, 0, ATA_UDMA6, "nForce2 Pro" }, { ATA_NFORCE2_PRO_S1, 0, 0, 0, ATA_SA150, "nForce2 Pro" }, { ATA_NFORCE3, 0, 0, 0, ATA_UDMA6, "nForce3" }, { ATA_NFORCE3_PRO, 0, 0, 0, ATA_UDMA6, "nForce3 Pro" }, { ATA_NFORCE3_PRO_S1, 0, 0, 0, ATA_SA150, "nForce3 Pro" }, { ATA_NFORCE3_PRO_S2, 0, 0, 0, ATA_SA150, "nForce3 Pro" }, { ATA_NFORCE_MCP04, 0, 0, 0, ATA_UDMA6, "nForce MCP" }, { ATA_NFORCE_MCP04_S1, 0, NV4, 0, ATA_SA150, "nForce MCP" }, { ATA_NFORCE_MCP04_S2, 0, NV4, 0, ATA_SA150, "nForce MCP" }, { ATA_NFORCE_CK804, 0, 0, 0, ATA_UDMA6, "nForce CK804" }, { ATA_NFORCE_CK804_S1, 0, NV4, 0, ATA_SA300, "nForce CK804" }, { ATA_NFORCE_CK804_S2, 0, NV4, 0, ATA_SA300, "nForce CK804" }, { ATA_NFORCE_MCP51, 0, 0, 0, ATA_UDMA6, "nForce MCP51" }, { ATA_NFORCE_MCP51_S1, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP51" }, { ATA_NFORCE_MCP51_S2, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP51" }, { ATA_NFORCE_MCP55, 0, 0, 0, ATA_UDMA6, "nForce MCP55" }, { ATA_NFORCE_MCP55_S1, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP55" }, { ATA_NFORCE_MCP55_S2, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP55" }, { ATA_NFORCE_MCP61, 0, 0, 0, ATA_UDMA6, "nForce MCP61" }, { ATA_NFORCE_MCP61_S1, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP61" }, { ATA_NFORCE_MCP61_S2, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP61" }, { ATA_NFORCE_MCP61_S3, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP61" }, { ATA_NFORCE_MCP65, 0, 0, 0, ATA_UDMA6, "nForce MCP65" }, { ATA_NFORCE_MCP67, 0, 0, 0, ATA_UDMA6, "nForce MCP67" }, { ATA_NFORCE_MCP67_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP67_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, { ATA_NFORCE_MCP73, 0, 0, 0, ATA_UDMA6, "nForce MCP73" }, { ATA_NFORCE_MCP73_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP73_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, { ATA_NFORCE_MCP77, 0, 0, 0, ATA_UDMA6, "nForce MCP77" }, { 0, 0, 0, 0, 0, 0}} ; if (pci_get_vendor(dev) != ATA_NVIDIA_ID) return ENXIO; if (!(ctlr->chip = ata_match_chip(dev, ids))) return ENXIO; ata_set_desc(dev); if (ctlr->chip->cfg1 & NVAHCI) ctlr->chipinit = ata_ahci_chipinit; else ctlr->chipinit = ata_nvidia_chipinit; return 0; } static int ata_nvidia_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; if (ctlr->chip->max_dma >= ATA_SA150) { if (pci_read_config(dev, PCIR_BAR(5), 1) & 1) ctlr->r_type2 = SYS_RES_IOPORT; else ctlr->r_type2 = SYS_RES_MEMORY; ctlr->r_rid2 = PCIR_BAR(5); if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) { int offset = ctlr->chip->cfg1 & NV4 ? 0x0440 : 0x0010; ctlr->ch_attach = ata_nvidia_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->reset = ata_nvidia_reset; /* enable control access */ pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) | 0x04,1); if (ctlr->chip->cfg1 & NVQ) { /* clear interrupt status */ ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff); /* enable device and PHY state change interrupts */ ATA_OUTL(ctlr->r_res2, offset + 4, 0x000d000d); /* disable NCQ support */ ATA_OUTL(ctlr->r_res2, 0x0400, ATA_INL(ctlr->r_res2, 0x0400) & 0xfffffff9); } else { /* clear interrupt status */ ATA_OUTB(ctlr->r_res2, offset, 0xff); /* enable device and PHY state change interrupts */ ATA_OUTB(ctlr->r_res2, offset + 1, 0xdd); } } ctlr->setmode = ata_sata_setmode; } else { /* disable prefetch, postwrite */ pci_write_config(dev, 0x51, pci_read_config(dev, 0x51, 1) & 0x0f, 1); ctlr->setmode = ata_nvidia_setmode; } return 0; } static int ata_nvidia_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* setup the usual register normal pci style */ if (ata_pci_ch_attach(dev)) return ENXIO; ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = (ch->unit << 6); ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = 0x04 + (ch->unit << 6); ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = 0x08 + (ch->unit << 6); ch->hw.status = ata_nvidia_status; ch->flags |= ATA_NO_SLAVE; return 0; } static int ata_nvidia_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ctlr->chip->cfg1 & NV4 ? 0x0440 : 0x0010; int shift = ch->unit << (ctlr->chip->cfg1 & NVQ ? 4 : 2); u_int32_t istatus; /* get interrupt status */ if (ctlr->chip->cfg1 & NVQ) istatus = ATA_INL(ctlr->r_res2, offset); else istatus = ATA_INB(ctlr->r_res2, offset); /* do we have any PHY events ? */ if (istatus & (0x0c << shift)) ata_sata_phy_check_events(dev); /* clear interrupt(s) */ if (ctlr->chip->cfg1 & NVQ) ATA_OUTL(ctlr->r_res2, offset, (0x0f << shift) | 0x00f000f0); else ATA_OUTB(ctlr->r_res2, offset, (0x0f << shift)); /* do we have any device action ? */ return (istatus & (0x01 << shift)); } static void ata_nvidia_reset(device_t dev) { - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); } static void ata_nvidia_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); u_int8_t timings[] = { 0xa8, 0x65, 0x42, 0x22, 0x20, 0x42, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }; int modes[7] = { 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, 0xc7 }; int devno = (ch->unit << 1) + atadev->unit; int reg = 0x63 - devno; int error; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); mode = ata_check_80pin(dev, mode); error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { pci_write_config(gparent, reg - 0x08, timings[ata_mode2idx(mode)], 1); if (mode >= ATA_UDMA0) pci_write_config(gparent, reg, modes[mode & ATA_MODE_MASK], 1); else pci_write_config(gparent, reg, 0x8b, 1); atadev->mode = mode; } } ATA_DECLARE_DRIVER(ata_nvidia); Index: head/sys/dev/ata/chipsets/ata-promise.c =================================================================== --- head/sys/dev/ata/chipsets/ata-promise.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-promise.c (revision 190581) @@ -1,1244 +1,1244 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_promise_chipinit(device_t dev); static int ata_promise_ch_attach(device_t dev); static int ata_promise_status(device_t dev); static int ata_promise_dmastart(struct ata_request *request); static int ata_promise_dmastop(struct ata_request *request); static void ata_promise_dmareset(device_t dev); static void ata_promise_setmode(device_t dev, int mode); static int ata_promise_tx2_ch_attach(device_t dev); static int ata_promise_tx2_status(device_t dev); static int ata_promise_mio_ch_attach(device_t dev); static int ata_promise_mio_ch_detach(device_t dev); static void ata_promise_mio_intr(void *data); static int ata_promise_mio_status(device_t dev); static int ata_promise_mio_command(struct ata_request *request); static void ata_promise_mio_reset(device_t dev); static int ata_promise_mio_pm_read(device_t dev, int port, int reg, u_int32_t *result); static int ata_promise_mio_pm_write(device_t dev, int port, int reg, u_int32_t result); static u_int32_t ata_promise_mio_softreset(device_t dev, int port); static void ata_promise_mio_dmainit(device_t dev); static void ata_promise_mio_setprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); static void ata_promise_mio_setmode(device_t dev, int mode); static void ata_promise_sx4_intr(void *data); static int ata_promise_sx4_command(struct ata_request *request); static int ata_promise_apkt(u_int8_t *bytep, struct ata_request *request); static void ata_promise_queue_hpkt(struct ata_pci_controller *ctlr, u_int32_t hpkt); static void ata_promise_next_hpkt(struct ata_pci_controller *ctlr); /* misc defines */ #define PR_OLD 0 #define PR_NEW 1 #define PR_TX 2 #define PR_MIO 3 #define PR_TX4 0x01 #define PR_SX4X 0x02 #define PR_SX6K 0x04 #define PR_PATA 0x08 #define PR_CMBO 0x10 #define PR_CMBO2 0x20 #define PR_SATA 0x40 #define PR_SATA2 0x80 /* * Promise chipset support functions */ #define ATA_PDC_APKT_OFFSET 0x00000010 #define ATA_PDC_HPKT_OFFSET 0x00000040 #define ATA_PDC_ASG_OFFSET 0x00000080 #define ATA_PDC_LSG_OFFSET 0x000000c0 #define ATA_PDC_HSG_OFFSET 0x00000100 #define ATA_PDC_CHN_OFFSET 0x00000400 #define ATA_PDC_BUF_BASE 0x00400000 #define ATA_PDC_BUF_OFFSET 0x00100000 #define ATA_PDC_MAX_HPKT 8 #define ATA_PDC_WRITE_REG 0x00 #define ATA_PDC_WRITE_CTL 0x0e #define ATA_PDC_WRITE_END 0x08 #define ATA_PDC_WAIT_NBUSY 0x10 #define ATA_PDC_WAIT_READY 0x18 #define ATA_PDC_1B 0x20 #define ATA_PDC_2B 0x40 struct host_packet { u_int32_t addr; TAILQ_ENTRY(host_packet) chain; }; struct ata_promise_sx4 { struct mtx mtx; TAILQ_HEAD(, host_packet) queue; int busy; }; static int ata_promise_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); struct ata_chip_id *idx; static struct ata_chip_id ids[] = {{ ATA_PDC20246, 0, PR_OLD, 0x00, ATA_UDMA2, "PDC20246" }, { ATA_PDC20262, 0, PR_NEW, 0x00, ATA_UDMA4, "PDC20262" }, { ATA_PDC20263, 0, PR_NEW, 0x00, ATA_UDMA4, "PDC20263" }, { ATA_PDC20265, 0, PR_NEW, 0x00, ATA_UDMA5, "PDC20265" }, { ATA_PDC20267, 0, PR_NEW, 0x00, ATA_UDMA5, "PDC20267" }, { ATA_PDC20268, 0, PR_TX, PR_TX4, ATA_UDMA5, "PDC20268" }, { ATA_PDC20269, 0, PR_TX, 0x00, ATA_UDMA6, "PDC20269" }, { ATA_PDC20270, 0, PR_TX, PR_TX4, ATA_UDMA5, "PDC20270" }, { ATA_PDC20271, 0, PR_TX, 0x00, ATA_UDMA6, "PDC20271" }, { ATA_PDC20275, 0, PR_TX, 0x00, ATA_UDMA6, "PDC20275" }, { ATA_PDC20276, 0, PR_TX, PR_SX6K, ATA_UDMA6, "PDC20276" }, { ATA_PDC20277, 0, PR_TX, 0x00, ATA_UDMA6, "PDC20277" }, { ATA_PDC20318, 0, PR_MIO, PR_SATA, ATA_SA150, "PDC20318" }, { ATA_PDC20319, 0, PR_MIO, PR_SATA, ATA_SA150, "PDC20319" }, { ATA_PDC20371, 0, PR_MIO, PR_CMBO, ATA_SA150, "PDC20371" }, { ATA_PDC20375, 0, PR_MIO, PR_CMBO, ATA_SA150, "PDC20375" }, { ATA_PDC20376, 0, PR_MIO, PR_CMBO, ATA_SA150, "PDC20376" }, { ATA_PDC20377, 0, PR_MIO, PR_CMBO, ATA_SA150, "PDC20377" }, { ATA_PDC20378, 0, PR_MIO, PR_CMBO, ATA_SA150, "PDC20378" }, { ATA_PDC20379, 0, PR_MIO, PR_CMBO, ATA_SA150, "PDC20379" }, { ATA_PDC20571, 0, PR_MIO, PR_CMBO2, ATA_SA150, "PDC20571" }, { ATA_PDC20575, 0, PR_MIO, PR_CMBO2, ATA_SA150, "PDC20575" }, { ATA_PDC20579, 0, PR_MIO, PR_CMBO2, ATA_SA150, "PDC20579" }, { ATA_PDC20771, 0, PR_MIO, PR_CMBO2, ATA_SA300, "PDC20771" }, { ATA_PDC40775, 0, PR_MIO, PR_CMBO2, ATA_SA300, "PDC40775" }, { ATA_PDC20617, 0, PR_MIO, PR_PATA, ATA_UDMA6, "PDC20617" }, { ATA_PDC20618, 0, PR_MIO, PR_PATA, ATA_UDMA6, "PDC20618" }, { ATA_PDC20619, 0, PR_MIO, PR_PATA, ATA_UDMA6, "PDC20619" }, { ATA_PDC20620, 0, PR_MIO, PR_PATA, ATA_UDMA6, "PDC20620" }, { ATA_PDC20621, 0, PR_MIO, PR_SX4X, ATA_UDMA5, "PDC20621" }, { ATA_PDC20622, 0, PR_MIO, PR_SX4X, ATA_SA150, "PDC20622" }, { ATA_PDC40518, 0, PR_MIO, PR_SATA2, ATA_SA150, "PDC40518" }, { ATA_PDC40519, 0, PR_MIO, PR_SATA2, ATA_SA150, "PDC40519" }, { ATA_PDC40718, 0, PR_MIO, PR_SATA2, ATA_SA300, "PDC40718" }, { ATA_PDC40719, 0, PR_MIO, PR_SATA2, ATA_SA300, "PDC40719" }, { ATA_PDC40779, 0, PR_MIO, PR_SATA2, ATA_SA300, "PDC40779" }, { 0, 0, 0, 0, 0, 0}}; char buffer[64]; uintptr_t devid = 0; if (pci_get_vendor(dev) != ATA_PROMISE_ID) return ENXIO; if (!(idx = ata_match_chip(dev, ids))) return ENXIO; /* if we are on a SuperTrak SX6000 dont attach */ if ((idx->cfg2 & PR_SX6K) && pci_get_class(GRANDPARENT(dev))==PCIC_BRIDGE && !BUS_READ_IVAR(device_get_parent(GRANDPARENT(dev)), GRANDPARENT(dev), PCI_IVAR_DEVID, &devid) && devid == ATA_I960RM) return ENXIO; strcpy(buffer, "Promise "); strcat(buffer, idx->text); /* if we are on a FastTrak TX4, adjust the interrupt resource */ if ((idx->cfg2 & PR_TX4) && pci_get_class(GRANDPARENT(dev))==PCIC_BRIDGE && !BUS_READ_IVAR(device_get_parent(GRANDPARENT(dev)), GRANDPARENT(dev), PCI_IVAR_DEVID, &devid) && ((devid == ATA_DEC_21150) || (devid == ATA_DEC_21150_1))) { static long start = 0, end = 0; if (pci_get_slot(dev) == 1) { bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &end); strcat(buffer, " (channel 0+1)"); } else if (pci_get_slot(dev) == 2 && start && end) { bus_set_resource(dev, SYS_RES_IRQ, 0, start, end); strcat(buffer, " (channel 2+3)"); } else { start = end = 0; } } sprintf(buffer, "%s %s controller", buffer, ata_mode2str(idx->max_dma)); device_set_desc_copy(dev, buffer); ctlr->chip = idx; ctlr->chipinit = ata_promise_chipinit; return 0; } static int ata_promise_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); int fake_reg, stat_reg; if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; switch (ctlr->chip->cfg1) { case PR_NEW: /* setup clocks */ ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | 0x0a); /* FALLTHROUGH */ case PR_OLD: /* enable burst mode */ ATA_OUTB(ctlr->r_res1, 0x1f, ATA_INB(ctlr->r_res1, 0x1f) | 0x01); ctlr->ch_attach = ata_promise_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->setmode = ata_promise_setmode; return 0; case PR_TX: ctlr->ch_attach = ata_promise_tx2_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->setmode = ata_promise_setmode; return 0; case PR_MIO: ctlr->r_type1 = SYS_RES_MEMORY; ctlr->r_rid1 = PCIR_BAR(4); if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, RF_ACTIVE))) goto failnfree; ctlr->r_type2 = SYS_RES_MEMORY; ctlr->r_rid2 = PCIR_BAR(3); if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) goto failnfree; if (ctlr->chip->cfg2 == PR_SX4X) { struct ata_promise_sx4 *hpkt; u_int32_t dimm = ATA_INL(ctlr->r_res2, 0x000c0080); if (bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle) || bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL, ata_promise_sx4_intr, ctlr, &ctlr->handle)) { device_printf(dev, "unable to setup interrupt\n"); goto failnfree; } /* print info about cache memory */ device_printf(dev, "DIMM size %dMB @ 0x%08x%s\n", (((dimm >> 16) & 0xff)-((dimm >> 24) & 0xff)+1) << 4, ((dimm >> 24) & 0xff), ATA_INL(ctlr->r_res2, 0x000c0088) & (1<<16) ? " ECC enabled" : "" ); /* adjust cache memory parameters */ ATA_OUTL(ctlr->r_res2, 0x000c000c, (ATA_INL(ctlr->r_res2, 0x000c000c) & 0xffff0000)); /* setup host packet controls */ hpkt = malloc(sizeof(struct ata_promise_sx4), M_TEMP, M_NOWAIT | M_ZERO); mtx_init(&hpkt->mtx, "ATA promise HPKT lock", NULL, MTX_DEF); TAILQ_INIT(&hpkt->queue); hpkt->busy = 0; device_set_ivars(dev, hpkt); ctlr->ch_attach = ata_promise_mio_ch_attach; ctlr->ch_detach = ata_promise_mio_ch_detach; ctlr->reset = ata_promise_mio_reset; ctlr->setmode = ata_promise_setmode; ctlr->channels = 4; return 0; } /* mio type controllers need an interrupt intercept */ if (bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle) || bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL, ata_promise_mio_intr, ctlr, &ctlr->handle)) { device_printf(dev, "unable to setup interrupt\n"); goto failnfree; } switch (ctlr->chip->cfg2) { case PR_PATA: ctlr->channels = ((ATA_INL(ctlr->r_res2, 0x48) & 0x01) > 0) + ((ATA_INL(ctlr->r_res2, 0x48) & 0x02) > 0) + 2; goto sata150; case PR_CMBO: ctlr->channels = 3; goto sata150; case PR_SATA: ctlr->channels = 4; sata150: fake_reg = 0x60; stat_reg = 0x6c; break; case PR_CMBO2: ctlr->channels = 3; goto sataii; case PR_SATA2: default: ctlr->channels = 4; sataii: fake_reg = 0x54; stat_reg = 0x60; break; } /* prime fake interrupt register */ ATA_OUTL(ctlr->r_res2, fake_reg, 0xffffffff); /* clear SATA status and unmask interrupts */ ATA_OUTL(ctlr->r_res2, stat_reg, 0x000000ff); /* enable "long burst length" on gen2 chips */ if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2)) ATA_OUTL(ctlr->r_res2, 0x44, ATA_INL(ctlr->r_res2, 0x44) | 0x2000); ctlr->ch_attach = ata_promise_mio_ch_attach; ctlr->ch_detach = ata_promise_mio_ch_detach; ctlr->reset = ata_promise_mio_reset; ctlr->setmode = ata_promise_mio_setmode; return 0; } failnfree: if (ctlr->r_res2) bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); if (ctlr->r_res1) bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); return ENXIO; } static int ata_promise_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); if (ata_pci_ch_attach(dev)) return ENXIO; if (ctlr->chip->cfg1 == PR_NEW) { ch->dma.start = ata_promise_dmastart; ch->dma.stop = ata_promise_dmastop; ch->dma.reset = ata_promise_dmareset; } ch->hw.status = ata_promise_status; return 0; } static int ata_promise_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); if (ATA_INL(ctlr->r_res1, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)) { return ata_pci_status(dev); } return 0; } static int ata_promise_dmastart(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_device *atadev = device_get_softc(request->dev); if (atadev->flags & ATA_D_48BIT_ACTIVE) { ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | (ch->unit ? 0x08 : 0x02)); ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, ((request->flags & ATA_R_READ) ? 0x05000000 : 0x06000000) | (request->bytecount >> 1)); } ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, request->dma->sg_bus); ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, ((request->flags & ATA_R_READ) ? ATA_BMCMD_WRITE_READ : 0) | ATA_BMCMD_START_STOP); ch->dma.flags |= ATA_DMA_ACTIVE; return 0; } static int ata_promise_dmastop(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_device *atadev = device_get_softc(request->dev); int error; if (atadev->flags & ATA_D_48BIT_ACTIVE) { ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) & ~(ch->unit ? 0x08 : 0x02)); ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, 0); } error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT); ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); ch->dma.flags &= ~ATA_DMA_ACTIVE; return error; } static void ata_promise_dmareset(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); ch->flags &= ~ATA_DMA_ACTIVE; } static void ata_promise_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); int devno = (ch->unit << 1) + atadev->unit; int error; u_int32_t timings[][2] = { /* PR_OLD PR_NEW mode */ { 0x004ff329, 0x004fff2f }, /* PIO 0 */ { 0x004fec25, 0x004ff82a }, /* PIO 1 */ { 0x004fe823, 0x004ff026 }, /* PIO 2 */ { 0x004fe622, 0x004fec24 }, /* PIO 3 */ { 0x004fe421, 0x004fe822 }, /* PIO 4 */ { 0x004567f3, 0x004acef6 }, /* MWDMA 0 */ { 0x004467f3, 0x0048cef6 }, /* MWDMA 1 */ { 0x004367f3, 0x0046cef6 }, /* MWDMA 2 */ { 0x004367f3, 0x0046cef6 }, /* UDMA 0 */ { 0x004247f3, 0x00448ef6 }, /* UDMA 1 */ { 0x004127f3, 0x00436ef6 }, /* UDMA 2 */ { 0, 0x00424ef6 }, /* UDMA 3 */ { 0, 0x004127f3 }, /* UDMA 4 */ { 0, 0x004127f3 } /* UDMA 5 */ }; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); switch (ctlr->chip->cfg1) { case PR_OLD: case PR_NEW: if (mode > ATA_UDMA2 && (pci_read_config(gparent, 0x50, 2) & (ch->unit ? 1 << 11 : 1 << 10))) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } if (ata_atapi(dev) && mode > ATA_PIO_MAX) mode = ata_limit_mode(dev, mode, ATA_PIO_MAX); break; case PR_TX: ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b); if (mode > ATA_UDMA2 && ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x04) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } break; case PR_MIO: if (mode > ATA_UDMA2 && (ATA_INL(ctlr->r_res2, (ctlr->chip->cfg2 & PR_SX4X ? 0x000c0260 : 0x0260) + (ch->unit << 7)) & 0x01000000)) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } break; } error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { if (ctlr->chip->cfg1 < PR_TX) pci_write_config(gparent, 0x60 + (devno << 2), timings[ata_mode2idx(mode)][ctlr->chip->cfg1], 4); atadev->mode = mode; } return; } static int ata_promise_tx2_ch_attach(device_t dev) { struct ata_channel *ch = device_get_softc(dev); if (ata_pci_ch_attach(dev)) return ENXIO; ch->hw.status = ata_promise_tx2_status; return 0; } static int ata_promise_tx2_status(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b); if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x20) { return ata_pci_status(dev); } return 0; } static int ata_promise_mio_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = (ctlr->chip->cfg2 & PR_SX4X) ? 0x000c0000 : 0; int i; ata_promise_mio_dmainit(dev); for (i = ATA_DATA; i <= ATA_COMMAND; i++) { ch->r_io[i].res = ctlr->r_res2; ch->r_io[i].offset = offset + 0x0200 + (i << 2) + (ch->unit << 7); } ch->r_io[ATA_CONTROL].res = ctlr->r_res2; ch->r_io[ATA_CONTROL].offset = offset + 0x0238 + (ch->unit << 7); ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2; ata_default_registers(dev); if ((ctlr->chip->cfg2 & (PR_SATA | PR_SATA2)) || ((ctlr->chip->cfg2 & (PR_CMBO | PR_CMBO2)) && ch->unit < 2)) { ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = 0x400 + (ch->unit << 8); ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = 0x404 + (ch->unit << 8); ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = 0x408 + (ch->unit << 8); ch->flags |= ATA_NO_SLAVE; } ch->flags |= ATA_USE_16BIT; ata_generic_hw(dev); if (ctlr->chip->cfg2 & PR_SX4X) { ch->hw.command = ata_promise_sx4_command; } else { ch->hw.command = ata_promise_mio_command; ch->hw.status = ata_promise_mio_status; ch->hw.softreset = ata_promise_mio_softreset; ch->hw.pm_read = ata_promise_mio_pm_read; ch->hw.pm_write = ata_promise_mio_pm_write; } return 0; } static int ata_promise_mio_ch_detach(device_t dev) { ata_dmafini(dev); return (0); } static void ata_promise_mio_intr(void *data) { struct ata_pci_controller *ctlr = data; struct ata_channel *ch; u_int32_t vector; int unit, fake_reg; switch (ctlr->chip->cfg2) { case PR_PATA: case PR_CMBO: case PR_SATA: fake_reg = 0x60; break; case PR_CMBO2: case PR_SATA2: default: fake_reg = 0x54; break; } /* * since reading interrupt status register on early "mio" chips * clears the status bits we cannot read it for each channel later on * in the generic interrupt routine. * store the bits in an unused register in the chip so we can read * it from there safely to get around this "feature". */ vector = ATA_INL(ctlr->r_res2, 0x040); ATA_OUTL(ctlr->r_res2, 0x040, vector); ATA_OUTL(ctlr->r_res2, fake_reg, vector); for (unit = 0; unit < ctlr->channels; unit++) { if ((ch = ctlr->interrupt[unit].argument)) ctlr->interrupt[unit].function(ch); } ATA_OUTL(ctlr->r_res2, fake_reg, 0xffffffff); } static int ata_promise_mio_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t fake_reg, stat_reg, vector, status; switch (ctlr->chip->cfg2) { case PR_PATA: case PR_CMBO: case PR_SATA: fake_reg = 0x60; stat_reg = 0x6c; break; case PR_CMBO2: case PR_SATA2: default: fake_reg = 0x54; stat_reg = 0x60; break; } /* read and acknowledge interrupt */ vector = ATA_INL(ctlr->r_res2, fake_reg); /* read and clear interface status */ status = ATA_INL(ctlr->r_res2, stat_reg); ATA_OUTL(ctlr->r_res2, stat_reg, status & (0x00000011 << ch->unit)); /* check for and handle disconnect events */ if (status & (0x00000001 << ch->unit)) { if (bootverbose) device_printf(dev, "DISCONNECT requested\n"); taskqueue_enqueue(taskqueue_thread, &ch->conntask); } /* check for and handle connect events */ if (status & (0x00000010 << ch->unit)) { if (bootverbose) device_printf(dev, "CONNECT requested\n"); taskqueue_enqueue(taskqueue_thread, &ch->conntask); } /* do we have any device action ? */ return (vector & (1 << (ch->unit + 1))); } static int ata_promise_mio_command(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_device *atadev = device_get_softc(request->dev); u_int32_t *wordp = (u_int32_t *)ch->dma.work; ATA_OUTL(ctlr->r_res2, (ch->unit + 1) << 2, 0x00000001); if ((ctlr->chip->cfg2 == PR_SATA2) || ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) { /* set portmultiplier port */ ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), atadev->unit & 0x0f); } /* XXX SOS add ATAPI commands support later */ switch (request->u.ata.command) { default: return ata_generic_command(request); case ATA_READ_DMA: case ATA_READ_DMA48: wordp[0] = htole32(0x04 | ((ch->unit + 1) << 16) | (0x00 << 24)); break; case ATA_WRITE_DMA: case ATA_WRITE_DMA48: wordp[0] = htole32(0x00 | ((ch->unit + 1) << 16) | (0x00 << 24)); break; } wordp[1] = htole32(request->dma->sg_bus); wordp[2] = 0; ata_promise_apkt((u_int8_t*)wordp, request); ATA_OUTL(ctlr->r_res2, 0x0240 + (ch->unit << 7), ch->dma.work_bus); return 0; } static void ata_promise_mio_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct ata_promise_sx4 *hpktp; switch (ctlr->chip->cfg2) { case PR_SX4X: /* softreset channel ATA module */ hpktp = device_get_ivars(ctlr->dev); ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), ch->unit + 1); ata_udelay(1000); ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), (ATA_INL(ctlr->r_res2, 0xc0260 + (ch->unit << 7)) & ~0x00003f9f) | (ch->unit + 1)); /* softreset HOST module */ /* XXX SOS what about other outstandings */ mtx_lock(&hpktp->mtx); ATA_OUTL(ctlr->r_res2, 0xc012c, (ATA_INL(ctlr->r_res2, 0xc012c) & ~0x00000f9f) | (1 << 11)); DELAY(10); ATA_OUTL(ctlr->r_res2, 0xc012c, (ATA_INL(ctlr->r_res2, 0xc012c) & ~0x00000f9f)); hpktp->busy = 0; mtx_unlock(&hpktp->mtx); ata_generic_reset(dev); break; case PR_PATA: case PR_CMBO: case PR_SATA: if ((ctlr->chip->cfg2 == PR_SATA) || ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2))) { /* mask plug/unplug intr */ ATA_OUTL(ctlr->r_res2, 0x06c, (0x00110000 << ch->unit)); } /* softreset channels ATA module */ ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11)); ata_udelay(10000); ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) & ~0x00003f9f) | (ch->unit + 1)); if ((ctlr->chip->cfg2 == PR_SATA) || ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2))) { - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); /* reset and enable plug/unplug intr */ ATA_OUTL(ctlr->r_res2, 0x06c, (0x00000011 << ch->unit)); } else ata_generic_reset(dev); break; case PR_CMBO2: case PR_SATA2: if ((ctlr->chip->cfg2 == PR_SATA2) || ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) { /* set portmultiplier port */ //ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f); /* mask plug/unplug intr */ ATA_OUTL(ctlr->r_res2, 0x060, (0x00110000 << ch->unit)); } /* softreset channels ATA module */ ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11)); ata_udelay(10000); ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) & ~0x00003f9f) | (ch->unit + 1)); if ((ctlr->chip->cfg2 == PR_SATA2) || ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) { /* set PHY mode to "improved" */ ATA_OUTL(ctlr->r_res2, 0x414 + (ch->unit << 8), (ATA_INL(ctlr->r_res2, 0x414 + (ch->unit << 8)) & ~0x00000003) | 0x00000001); - if (ata_sata_phy_reset(dev)) { + if (ata_sata_phy_reset(dev, -1, 1)) { u_int32_t signature = ch->hw.softreset(dev, ATA_PM); if (1 | bootverbose) device_printf(dev, "SIGNATURE: %08x\n", signature); switch (signature >> 16) { case 0x0000: ch->devices = ATA_ATA_MASTER; break; case 0x9669: ch->devices = ATA_PORTMULTIPLIER; ata_pm_identify(dev); break; case 0xeb14: ch->devices = ATA_ATAPI_MASTER; break; default: /* SOS XXX */ if (bootverbose) device_printf(dev, "No signature, assuming disk device\n"); ch->devices = ATA_ATA_MASTER; } if (bootverbose) device_printf(dev, "promise_mio_reset devices=%08x\n", ch->devices); } /* reset and enable plug/unplug intr */ ATA_OUTL(ctlr->r_res2, 0x060, (0x00000011 << ch->unit)); ///* set portmultiplier port */ ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x00); } else ata_generic_reset(dev); break; } } static int ata_promise_mio_pm_read(device_t dev, int port, int reg, u_int32_t *result) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int timeout = 0; /* set portmultiplier port */ ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f); ATA_IDX_OUTB(ch, ATA_FEATURE, reg); ATA_IDX_OUTB(ch, ATA_DRIVE, port); ATA_IDX_OUTB(ch, ATA_COMMAND, ATA_READ_PM); while (timeout < 1000000) { u_int8_t status = ATA_IDX_INB(ch, ATA_STATUS); if (!(status & ATA_S_BUSY)) break; timeout += 1000; DELAY(1000); } if (timeout >= 1000000) return ATA_E_ABORT; *result = ATA_IDX_INB(ch, ATA_COUNT) | (ATA_IDX_INB(ch, ATA_SECTOR) << 8) | (ATA_IDX_INB(ch, ATA_CYL_LSB) << 16) | (ATA_IDX_INB(ch, ATA_CYL_MSB) << 24); return 0; } static int ata_promise_mio_pm_write(device_t dev, int port, int reg, u_int32_t value) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int timeout = 0; /* set portmultiplier port */ ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f); ATA_IDX_OUTB(ch, ATA_FEATURE, reg); ATA_IDX_OUTB(ch, ATA_DRIVE, port); ATA_IDX_OUTB(ch, ATA_COUNT, value & 0xff); ATA_IDX_OUTB(ch, ATA_SECTOR, (value >> 8) & 0xff); ATA_IDX_OUTB(ch, ATA_CYL_LSB, (value >> 16) & 0xff); ATA_IDX_OUTB(ch, ATA_CYL_MSB, (value >> 24) & 0xff); ATA_IDX_OUTB(ch, ATA_COMMAND, ATA_WRITE_PM); while (timeout < 1000000) { u_int8_t status = ATA_IDX_INB(ch, ATA_STATUS); if (!(status & ATA_S_BUSY)) break; timeout += 1000; DELAY(1000); } if (timeout >= 1000000) return ATA_E_ABORT; return ATA_IDX_INB(ch, ATA_ERROR); } /* must be called with ATA channel locked and state_mtx held */ static u_int32_t ata_promise_mio_softreset(device_t dev, int port) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int timeout; /* set portmultiplier port */ ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), port & 0x0f); /* softreset device on this channel */ ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | ATA_DEV(ATA_MASTER)); DELAY(10); ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS | ATA_A_RESET); ata_udelay(10000); ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS); ata_udelay(150000); ATA_IDX_INB(ch, ATA_ERROR); /* wait for BUSY to go inactive */ for (timeout = 0; timeout < 100; timeout++) { u_int8_t err, stat; err = ATA_IDX_INB(ch, ATA_ERROR); stat = ATA_IDX_INB(ch, ATA_STATUS); //if (stat == err && timeout > (stat & ATA_S_BUSY ? 100 : 10)) //break; if (!(stat & ATA_S_BUSY)) { //if ((err & 0x7f) == ATA_E_ILI) { return ATA_IDX_INB(ch, ATA_COUNT) | (ATA_IDX_INB(ch, ATA_SECTOR) << 8) | (ATA_IDX_INB(ch, ATA_CYL_LSB) << 16) | (ATA_IDX_INB(ch, ATA_CYL_MSB) << 24); //} //else if (stat & 0x0f) { //stat |= ATA_S_BUSY; //} } if (!(stat & ATA_S_BUSY) || (stat == 0xff && timeout > 10)) break; ata_udelay(100000); } return -1; } static void ata_promise_mio_dmainit(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ata_dmainit(dev); /* note start and stop are not used here */ ch->dma.setprd = ata_promise_mio_setprd; } #define MAXLASTSGSIZE (32 * sizeof(u_int32_t)) static void ata_promise_mio_setprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) { struct ata_dmasetprd_args *args = xsc; struct ata_dma_prdentry *prd = args->dmatab; int i; if ((args->error = error)) return; for (i = 0; i < nsegs; i++) { prd[i].addr = htole32(segs[i].ds_addr); prd[i].count = htole32(segs[i].ds_len); } if (segs[i - 1].ds_len > MAXLASTSGSIZE) { //printf("split last SG element of %u\n", segs[i - 1].ds_len); prd[i - 1].count = htole32(segs[i - 1].ds_len - MAXLASTSGSIZE); prd[i].count = htole32(MAXLASTSGSIZE); prd[i].addr = htole32(segs[i - 1].ds_addr + (segs[i - 1].ds_len - MAXLASTSGSIZE)); nsegs++; i++; } prd[i - 1].count |= htole32(ATA_DMA_EOT); KASSERT(nsegs <= ATA_DMA_ENTRIES, ("too many DMA segment entries\n")); args->nsegs = nsegs; } static void ata_promise_mio_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); if ( (ctlr->chip->cfg2 == PR_SATA) || ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2)) || (ctlr->chip->cfg2 == PR_SATA2) || ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) ata_sata_setmode(dev, mode); else ata_promise_setmode(dev, mode); } static void ata_promise_sx4_intr(void *data) { struct ata_pci_controller *ctlr = data; struct ata_channel *ch; u_int32_t vector = ATA_INL(ctlr->r_res2, 0x000c0480); int unit; for (unit = 0; unit < ctlr->channels; unit++) { if (vector & (1 << (unit + 1))) if ((ch = ctlr->interrupt[unit].argument)) ctlr->interrupt[unit].function(ch); if (vector & (1 << (unit + 5))) if ((ch = ctlr->interrupt[unit].argument)) ata_promise_queue_hpkt(ctlr, htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET)); if (vector & (1 << (unit + 9))) { ata_promise_next_hpkt(ctlr); if ((ch = ctlr->interrupt[unit].argument)) ctlr->interrupt[unit].function(ch); } if (vector & (1 << (unit + 13))) { ata_promise_next_hpkt(ctlr); if ((ch = ctlr->interrupt[unit].argument)) ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7), htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET)); } } } static int ata_promise_sx4_command(struct ata_request *request) { device_t gparent = GRANDPARENT(request->dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(request->parent); struct ata_dma_prdentry *prd = request->dma->sg; caddr_t window = rman_get_virtual(ctlr->r_res1); u_int32_t *wordp; int i, idx, length = 0; /* XXX SOS add ATAPI commands support later */ switch (request->u.ata.command) { default: return -1; case ATA_ATA_IDENTIFY: case ATA_READ: case ATA_READ48: case ATA_READ_MUL: case ATA_READ_MUL48: case ATA_WRITE: case ATA_WRITE48: case ATA_WRITE_MUL: case ATA_WRITE_MUL48: ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit + 1) << 2), 0x00000001); return ata_generic_command(request); case ATA_SETFEATURES: case ATA_FLUSHCACHE: case ATA_FLUSHCACHE48: case ATA_SLEEP: case ATA_SET_MULTI: wordp = (u_int32_t *) (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET); wordp[0] = htole32(0x08 | ((ch->unit + 1)<<16) | (0x00 << 24)); wordp[1] = 0; wordp[2] = 0; ata_promise_apkt((u_int8_t *)wordp, request); ATA_OUTL(ctlr->r_res2, 0x000c0484, 0x00000001); ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit + 1) << 2), 0x00000001); ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7), htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_APKT_OFFSET)); return 0; case ATA_READ_DMA: case ATA_READ_DMA48: case ATA_WRITE_DMA: case ATA_WRITE_DMA48: wordp = (u_int32_t *) (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HSG_OFFSET); i = idx = 0; do { wordp[idx++] = prd[i].addr; wordp[idx++] = prd[i].count; length += (prd[i].count & ~ATA_DMA_EOT); } while (!(prd[i++].count & ATA_DMA_EOT)); wordp = (u_int32_t *) (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_LSG_OFFSET); wordp[0] = htole32((ch->unit * ATA_PDC_BUF_OFFSET) + ATA_PDC_BUF_BASE); wordp[1] = htole32(request->bytecount | ATA_DMA_EOT); wordp = (u_int32_t *) (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_ASG_OFFSET); wordp[0] = htole32((ch->unit * ATA_PDC_BUF_OFFSET) + ATA_PDC_BUF_BASE); wordp[1] = htole32(request->bytecount | ATA_DMA_EOT); wordp = (u_int32_t *) (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET); if (request->flags & ATA_R_READ) wordp[0] = htole32(0x14 | ((ch->unit+9)<<16) | ((ch->unit+5)<<24)); if (request->flags & ATA_R_WRITE) wordp[0] = htole32(0x00 | ((ch->unit+13)<<16) | (0x00<<24)); wordp[1] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_HSG_OFFSET); wordp[2] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_LSG_OFFSET); wordp[3] = 0; wordp = (u_int32_t *) (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET); if (request->flags & ATA_R_READ) wordp[0] = htole32(0x04 | ((ch->unit+5)<<16) | (0x00<<24)); if (request->flags & ATA_R_WRITE) wordp[0] = htole32(0x10 | ((ch->unit+1)<<16) | ((ch->unit+13)<<24)); wordp[1] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_ASG_OFFSET); wordp[2] = 0; ata_promise_apkt((u_int8_t *)wordp, request); ATA_OUTL(ctlr->r_res2, 0x000c0484, 0x00000001); if (request->flags & ATA_R_READ) { ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+5)<<2), 0x00000001); ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+9)<<2), 0x00000001); ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7), htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET)); } if (request->flags & ATA_R_WRITE) { ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+1)<<2), 0x00000001); ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+13)<<2), 0x00000001); ata_promise_queue_hpkt(ctlr, htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET)); } return 0; } } static int ata_promise_apkt(u_int8_t *bytep, struct ata_request *request) { struct ata_device *atadev = device_get_softc(request->dev); int i = 12; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_PDC_WAIT_NBUSY|ATA_DRIVE; bytep[i++] = ATA_D_IBM | ATA_D_LBA | ATA_DEV(atadev->unit); bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_CTL; bytep[i++] = ATA_A_4BIT; if (atadev->flags & ATA_D_48BIT_ACTIVE) { bytep[i++] = ATA_PDC_2B | ATA_PDC_WRITE_REG | ATA_FEATURE; bytep[i++] = request->u.ata.feature >> 8; bytep[i++] = request->u.ata.feature; bytep[i++] = ATA_PDC_2B | ATA_PDC_WRITE_REG | ATA_COUNT; bytep[i++] = request->u.ata.count >> 8; bytep[i++] = request->u.ata.count; bytep[i++] = ATA_PDC_2B | ATA_PDC_WRITE_REG | ATA_SECTOR; bytep[i++] = request->u.ata.lba >> 24; bytep[i++] = request->u.ata.lba; bytep[i++] = ATA_PDC_2B | ATA_PDC_WRITE_REG | ATA_CYL_LSB; bytep[i++] = request->u.ata.lba >> 32; bytep[i++] = request->u.ata.lba >> 8; bytep[i++] = ATA_PDC_2B | ATA_PDC_WRITE_REG | ATA_CYL_MSB; bytep[i++] = request->u.ata.lba >> 40; bytep[i++] = request->u.ata.lba >> 16; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_DRIVE; bytep[i++] = ATA_D_LBA | ATA_DEV(atadev->unit); } else { bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_FEATURE; bytep[i++] = request->u.ata.feature; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_COUNT; bytep[i++] = request->u.ata.count; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_SECTOR; bytep[i++] = request->u.ata.lba; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_CYL_LSB; bytep[i++] = request->u.ata.lba >> 8; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_CYL_MSB; bytep[i++] = request->u.ata.lba >> 16; bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_REG | ATA_DRIVE; bytep[i++] = (atadev->flags & ATA_D_USE_CHS ? 0 : ATA_D_LBA) | ATA_D_IBM | ATA_DEV(atadev->unit) | ((request->u.ata.lba >> 24)&0xf); } bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_END | ATA_COMMAND; bytep[i++] = request->u.ata.command; return i; } static void ata_promise_queue_hpkt(struct ata_pci_controller *ctlr, u_int32_t hpkt) { struct ata_promise_sx4 *hpktp = device_get_ivars(ctlr->dev); mtx_lock(&hpktp->mtx); if (hpktp->busy) { struct host_packet *hp = malloc(sizeof(struct host_packet), M_TEMP, M_NOWAIT | M_ZERO); hp->addr = hpkt; TAILQ_INSERT_TAIL(&hpktp->queue, hp, chain); } else { hpktp->busy = 1; ATA_OUTL(ctlr->r_res2, 0x000c0100, hpkt); } mtx_unlock(&hpktp->mtx); } static void ata_promise_next_hpkt(struct ata_pci_controller *ctlr) { struct ata_promise_sx4 *hpktp = device_get_ivars(ctlr->dev); struct host_packet *hp; mtx_lock(&hpktp->mtx); if ((hp = TAILQ_FIRST(&hpktp->queue))) { TAILQ_REMOVE(&hpktp->queue, hp, chain); ATA_OUTL(ctlr->r_res2, 0x000c0100, hp->addr); free(hp, M_TEMP); } else hpktp->busy = 0; mtx_unlock(&hpktp->mtx); } ATA_DECLARE_DRIVER(ata_promise); Index: head/sys/dev/ata/chipsets/ata-siliconimage.c =================================================================== --- head/sys/dev/ata/chipsets/ata-siliconimage.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-siliconimage.c (revision 190581) @@ -1,911 +1,911 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_cmd_ch_attach(device_t dev); static int ata_cmd_status(device_t dev); static void ata_cmd_setmode(device_t dev, int mode); static int ata_sii_ch_attach(device_t dev); static int ata_sii_ch_detach(device_t dev); static int ata_sii_status(device_t dev); static void ata_sii_reset(device_t dev); static void ata_sii_setmode(device_t dev, int mode); static int ata_siiprb_ch_attach(device_t dev); static int ata_siiprb_ch_detach(device_t dev); static int ata_siiprb_status(device_t dev); static int ata_siiprb_begin_transaction(struct ata_request *request); static int ata_siiprb_end_transaction(struct ata_request *request); static int ata_siiprb_pm_read(device_t dev, int port, int reg, u_int32_t *result); static int ata_siiprb_pm_write(device_t dev, int port, int reg, u_int32_t result); static u_int32_t ata_siiprb_softreset(device_t dev, int port); static void ata_siiprb_reset(device_t dev); static void ata_siiprb_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); static void ata_siiprb_dmainit(device_t dev); /* misc defines */ #define SII_MEMIO 1 #define SII_PRBIO 2 #define SII_INTR 0x01 #define SII_SETCLK 0x02 #define SII_BUG 0x04 #define SII_4CH 0x08 /* * Silicon Image Inc. (SiI) (former CMD) chipset support functions */ static int ata_sii_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); static struct ata_chip_id ids[] = {{ ATA_SII3114, 0x00, SII_MEMIO, SII_4CH, ATA_SA150, "3114" }, { ATA_SII3512, 0x02, SII_MEMIO, 0, ATA_SA150, "3512" }, { ATA_SII3112, 0x02, SII_MEMIO, 0, ATA_SA150, "3112" }, { ATA_SII3112_1, 0x02, SII_MEMIO, 0, ATA_SA150, "3112" }, { ATA_SII3512, 0x00, SII_MEMIO, SII_BUG, ATA_SA150, "3512" }, { ATA_SII3112, 0x00, SII_MEMIO, SII_BUG, ATA_SA150, "3112" }, { ATA_SII3112_1, 0x00, SII_MEMIO, SII_BUG, ATA_SA150, "3112" }, { ATA_SII3124, 0x00, SII_PRBIO, SII_4CH, ATA_SA300, "3124" }, { ATA_SII3132, 0x00, SII_PRBIO, 0, ATA_SA300, "3132" }, { ATA_SII3132_1, 0x00, SII_PRBIO, 0, ATA_SA300, "3132" }, { ATA_SII0680, 0x00, SII_MEMIO, SII_SETCLK, ATA_UDMA6, "680" }, { ATA_CMD649, 0x00, 0, SII_INTR, ATA_UDMA5, "(CMD) 649" }, { ATA_CMD648, 0x00, 0, SII_INTR, ATA_UDMA4, "(CMD) 648" }, { ATA_CMD646, 0x07, 0, 0, ATA_UDMA2, "(CMD) 646U2" }, { ATA_CMD646, 0x00, 0, 0, ATA_WDMA2, "(CMD) 646" }, { 0, 0, 0, 0, 0, 0}}; if (pci_get_vendor(dev) != ATA_SILICON_IMAGE_ID) return ENXIO; if (!(ctlr->chip = ata_match_chip(dev, ids))) return ENXIO; ata_set_desc(dev); ctlr->chipinit = ata_sii_chipinit; return 0; } int ata_sii_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; switch (ctlr->chip->cfg1) { case SII_PRBIO: ctlr->r_type1 = SYS_RES_MEMORY; ctlr->r_rid1 = PCIR_BAR(0); if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, RF_ACTIVE))) return ENXIO; ctlr->r_rid2 = PCIR_BAR(2); ctlr->r_type2 = SYS_RES_MEMORY; if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))){ bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1,ctlr->r_res1); return ENXIO; } ctlr->ch_attach = ata_siiprb_ch_attach; ctlr->ch_detach = ata_siiprb_ch_detach; ctlr->reset = ata_siiprb_reset; ctlr->setmode = ata_sata_setmode; ctlr->channels = (ctlr->chip->cfg2 == SII_4CH) ? 4 : 2; /* reset controller */ ATA_OUTL(ctlr->r_res1, 0x0040, 0x80000000); DELAY(10000); ATA_OUTL(ctlr->r_res1, 0x0040, 0x0000000f); break; case SII_MEMIO: ctlr->r_type2 = SYS_RES_MEMORY; ctlr->r_rid2 = PCIR_BAR(5); if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))){ if (ctlr->chip->chipid != ATA_SII0680 || (pci_read_config(dev, 0x8a, 1) & 1)) return ENXIO; } if (ctlr->chip->cfg2 & SII_SETCLK) { if ((pci_read_config(dev, 0x8a, 1) & 0x30) != 0x10) pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0xcf)|0x10,1); if ((pci_read_config(dev, 0x8a, 1) & 0x30) != 0x10) device_printf(dev, "%s could not set ATA133 clock\n", ctlr->chip->text); } /* if we have 4 channels enable the second set */ if (ctlr->chip->cfg2 & SII_4CH) { ATA_OUTL(ctlr->r_res2, 0x0200, 0x00000002); ctlr->channels = 4; } /* dont block interrupts from any channel */ pci_write_config(dev, 0x48, (pci_read_config(dev, 0x48, 4) & ~0x03c00000), 4); /* enable PCI interrupt as BIOS might not */ pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0x3f), 1); if (ctlr->r_res2) { ctlr->ch_attach = ata_sii_ch_attach; ctlr->ch_detach = ata_sii_ch_detach; } if (ctlr->chip->max_dma >= ATA_SA150) { ctlr->reset = ata_sii_reset; ctlr->setmode = ata_sata_setmode; } else ctlr->setmode = ata_sii_setmode; break; default: if ((pci_read_config(dev, 0x51, 1) & 0x08) != 0x08) { device_printf(dev, "HW has secondary channel disabled\n"); ctlr->channels = 1; } /* enable interrupt as BIOS might not */ pci_write_config(dev, 0x71, 0x01, 1); ctlr->ch_attach = ata_cmd_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->setmode = ata_cmd_setmode; break; } return 0; } static int ata_cmd_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* setup the usual register normal pci style */ if (ata_pci_ch_attach(dev)) return ENXIO; if (ctlr->chip->cfg2 & SII_INTR) ch->hw.status = ata_cmd_status; return 0; } static int ata_cmd_status(device_t dev) { struct ata_channel *ch = device_get_softc(dev); u_int8_t reg71; if (((reg71 = pci_read_config(device_get_parent(dev), 0x71, 1)) & (ch->unit ? 0x08 : 0x04))) { pci_write_config(device_get_parent(dev), 0x71, reg71 & ~(ch->unit ? 0x04 : 0x08), 1); return ata_pci_status(dev); } return 0; } static void ata_cmd_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); int devno = (ch->unit << 1) + atadev->unit; int error; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); mode = ata_check_80pin(dev, mode); error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { int treg = 0x54 + ((devno < 3) ? (devno << 1) : 7); int ureg = ch->unit ? 0x7b : 0x73; if (mode >= ATA_UDMA0) { int udmatimings[][2] = { { 0x31, 0xc2 }, { 0x21, 0x82 }, { 0x11, 0x42 }, { 0x25, 0x8a }, { 0x15, 0x4a }, { 0x05, 0x0a } }; u_int8_t umode = pci_read_config(gparent, ureg, 1); umode &= ~(atadev->unit == ATA_MASTER ? 0x35 : 0xca); umode |= udmatimings[mode & ATA_MODE_MASK][atadev->unit]; pci_write_config(gparent, ureg, umode, 1); } else if (mode >= ATA_WDMA0) { int dmatimings[] = { 0x87, 0x32, 0x3f }; pci_write_config(gparent, treg, dmatimings[mode & ATA_MODE_MASK],1); pci_write_config(gparent, ureg, pci_read_config(gparent, ureg, 1) & ~(atadev->unit == ATA_MASTER ? 0x35 : 0xca), 1); } else { int piotimings[] = { 0xa9, 0x57, 0x44, 0x32, 0x3f }; pci_write_config(gparent, treg, piotimings[(mode & ATA_MODE_MASK) - ATA_PIO0], 1); pci_write_config(gparent, ureg, pci_read_config(gparent, ureg, 1) & ~(atadev->unit == ATA_MASTER ? 0x35 : 0xca), 1); } atadev->mode = mode; } } static int ata_sii_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2); int i; ata_pci_dmainit(dev); for (i = ATA_DATA; i <= ATA_COMMAND; i++) { ch->r_io[i].res = ctlr->r_res2; ch->r_io[i].offset = 0x80 + i + (unit01 << 6) + (unit10 << 8); } ch->r_io[ATA_CONTROL].res = ctlr->r_res2; ch->r_io[ATA_CONTROL].offset = 0x8a + (unit01 << 6) + (unit10 << 8); ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2; ata_default_registers(dev); ch->r_io[ATA_BMCMD_PORT].res = ctlr->r_res2; ch->r_io[ATA_BMCMD_PORT].offset = 0x00 + (unit01 << 3) + (unit10 << 8); ch->r_io[ATA_BMSTAT_PORT].res = ctlr->r_res2; ch->r_io[ATA_BMSTAT_PORT].offset = 0x02 + (unit01 << 3) + (unit10 << 8); ch->r_io[ATA_BMDTP_PORT].res = ctlr->r_res2; ch->r_io[ATA_BMDTP_PORT].offset = 0x04 + (unit01 << 3) + (unit10 << 8); if (ctlr->chip->max_dma >= ATA_SA150) { ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = 0x104 + (unit01 << 7) + (unit10 << 8); ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = 0x108 + (unit01 << 7) + (unit10 << 8); ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = 0x100 + (unit01 << 7) + (unit10 << 8); ch->flags |= ATA_NO_SLAVE; /* enable PHY state change interrupt */ ATA_OUTL(ctlr->r_res2, 0x148 + (unit01 << 7) + (unit10 << 8),(1 << 16)); } if (ctlr->chip->cfg2 & SII_BUG) { /* work around errata in early chips */ ch->dma.boundary = 8192; ch->dma.segsize = 15 * DEV_BSIZE; } ata_pci_hw(dev); ch->hw.status = ata_sii_status; return 0; } static int ata_sii_ch_detach(device_t dev) { ata_pci_dmafini(dev); return (0); } static int ata_sii_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset0 = ((ch->unit & 1) << 3) + ((ch->unit & 2) << 8); int offset1 = ((ch->unit & 1) << 6) + ((ch->unit & 2) << 8); /* do we have any PHY events ? */ if (ctlr->chip->max_dma >= ATA_SA150 && (ATA_INL(ctlr->r_res2, 0x10 + offset0) & 0x00000010)) ata_sata_phy_check_events(dev); if (ATA_INL(ctlr->r_res2, 0xa0 + offset1) & 0x00000800) return ata_pci_status(dev); else return 0; } static void ata_sii_reset(device_t dev) { - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); } static void ata_sii_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); int rego = (ch->unit << 4) + (atadev->unit << 1); int mreg = ch->unit ? 0x84 : 0x80; int mask = 0x03 << (atadev->unit << 2); int mval = pci_read_config(gparent, mreg, 1) & ~mask; int error; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); if (ctlr->chip->cfg2 & SII_SETCLK) { if (mode > ATA_UDMA2 && (pci_read_config(gparent, 0x79, 1) & (ch->unit ? 0x02 : 0x01))) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } } else mode = ata_check_80pin(dev, mode); error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (error) return; if (mode >= ATA_UDMA0) { u_int8_t udmatimings[] = { 0xf, 0xb, 0x7, 0x5, 0x3, 0x2, 0x1 }; u_int8_t ureg = 0xac + rego; pci_write_config(gparent, mreg, mval | (0x03 << (atadev->unit << 2)), 1); pci_write_config(gparent, ureg, (pci_read_config(gparent, ureg, 1) & ~0x3f) | udmatimings[mode & ATA_MODE_MASK], 1); } else if (mode >= ATA_WDMA0) { u_int8_t dreg = 0xa8 + rego; u_int16_t dmatimings[] = { 0x2208, 0x10c2, 0x10c1 }; pci_write_config(gparent, mreg, mval | (0x02 << (atadev->unit << 2)), 1); pci_write_config(gparent, dreg, dmatimings[mode & ATA_MODE_MASK], 2); } else { u_int8_t preg = 0xa4 + rego; u_int16_t piotimings[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 }; pci_write_config(gparent, mreg, mval | (0x01 << (atadev->unit << 2)), 1); pci_write_config(gparent, preg, piotimings[mode & ATA_MODE_MASK], 2); } atadev->mode = mode; } struct ata_siiprb_dma_prdentry { u_int64_t addr; u_int32_t count; u_int32_t control; } __packed; #define ATA_SIIPRB_DMA_ENTRIES 125 struct ata_siiprb_ata_command { struct ata_siiprb_dma_prdentry prd[ATA_SIIPRB_DMA_ENTRIES]; } __packed; struct ata_siiprb_atapi_command { u_int8_t ccb[16]; struct ata_siiprb_dma_prdentry prd[ATA_SIIPRB_DMA_ENTRIES]; } __packed; struct ata_siiprb_command { u_int16_t control; u_int16_t protocol_override; u_int32_t transfer_count; u_int8_t fis[24]; union { struct ata_siiprb_ata_command ata; struct ata_siiprb_atapi_command atapi; } u; } __packed; static int ata_siiprb_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit * 0x2000; ata_siiprb_dmainit(dev); /* set the SATA resources */ ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = 0x1f04 + offset; ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = 0x1f08 + offset; ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = 0x1f00 + offset; ch->r_io[ATA_SACTIVE].res = ctlr->r_res2; ch->r_io[ATA_SACTIVE].offset = 0x1f0c + offset; ch->hw.status = ata_siiprb_status; ch->hw.begin_transaction = ata_siiprb_begin_transaction; ch->hw.end_transaction = ata_siiprb_end_transaction; ch->hw.command = NULL; /* not used here */ ch->hw.softreset = ata_siiprb_softreset; ch->hw.pm_read = ata_siiprb_pm_read; ch->hw.pm_write = ata_siiprb_pm_write; return 0; } static int ata_siiprb_ch_detach(device_t dev) { ata_dmafini(dev); return 0; } static int ata_siiprb_status(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int32_t action = ATA_INL(ctlr->r_res1, 0x0044); int offset = ch->unit * 0x2000; if (action & (1 << ch->unit)) { u_int32_t istatus = ATA_INL(ctlr->r_res2, 0x1008 + offset); /* do we have any PHY events ? */ ata_sata_phy_check_events(dev); /* clear interrupt(s) */ ATA_OUTL(ctlr->r_res2, 0x1008 + offset, istatus); /* do we have any device action ? */ return (istatus & 0x00000003); } return 0; } static int ata_siiprb_begin_transaction(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_siiprb_command *prb; struct ata_siiprb_dma_prdentry *prd; int offset = ch->unit * 0x2000; u_int64_t prb_bus; /* SOS XXX */ if (request->u.ata.command == ATA_DEVICE_RESET) { request->result = 0; return ATA_OP_FINISHED; } /* get a piece of the workspace for this request */ prb = (struct ata_siiprb_command *) (ch->dma.work + (sizeof(struct ata_siiprb_command) * request->tag)); /* clear the prb structure */ bzero(prb, sizeof(struct ata_siiprb_command)); /* setup the FIS for this request */ if (!ata_request2fis_h2d(request, &prb->fis[0])) { device_printf(request->dev, "setting up SATA FIS failed\n"); request->result = EIO; return ATA_OP_FINISHED; } /* setup transfer type */ if (request->flags & ATA_R_ATAPI) { struct ata_device *atadev = device_get_softc(request->dev); bcopy(request->u.atapi.ccb, prb->u.atapi.ccb, 16); if ((atadev->param.config & ATA_PROTO_MASK) == ATA_PROTO_ATAPI_12) ATA_OUTL(ctlr->r_res2, 0x1004 + offset, 0x00000020); else ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x00000020); if (request->flags & ATA_R_READ) prb->control = htole16(0x0010); if (request->flags & ATA_R_WRITE) prb->control = htole16(0x0020); prd = &prb->u.atapi.prd[0]; } else prd = &prb->u.ata.prd[0]; /* if request moves data setup and load SG list */ if (request->flags & (ATA_R_READ | ATA_R_WRITE)) { if (ch->dma.load(request, prd, NULL)) { device_printf(request->dev, "setting up DMA failed\n"); request->result = EIO; return ATA_OP_FINISHED; } } /* activate the prb */ prb_bus = ch->dma.work_bus + (sizeof(struct ata_siiprb_command) * request->tag); ATA_OUTL(ctlr->r_res2, 0x1c00 + offset + (request->tag * sizeof(u_int64_t)), prb_bus); ATA_OUTL(ctlr->r_res2, 0x1c04 + offset + (request->tag * sizeof(u_int64_t)), prb_bus>>32); /* start the timeout */ callout_reset(&request->callout, request->timeout * hz, (timeout_t*)ata_timeout, request); return ATA_OP_CONTINUES; } static int ata_siiprb_end_transaction(struct ata_request *request) { struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev)); struct ata_channel *ch = device_get_softc(request->parent); struct ata_siiprb_command *prb; int offset = ch->unit * 0x2000; int error, timeout; /* kill the timeout */ callout_stop(&request->callout); prb = (struct ata_siiprb_command *) ((u_int8_t *)rman_get_virtual(ctlr->r_res2)+(request->tag << 7)+offset); /* any controller errors flagged ? */ if ((error = ATA_INL(ctlr->r_res2, 0x1024 + offset))) { if (bootverbose) printf("ata_siiprb_end_transaction %s error=%08x\n", ata_cmd2str(request), error); /* if device error status get details */ if (error == 1 || error == 2) { request->status = prb->fis[2]; if (request->status & ATA_S_ERROR) request->error = prb->fis[3]; } /* SOS XXX handle other controller errors here */ /* initialize port */ ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x00000004); /* poll for port ready */ for (timeout = 0; timeout < 1000; timeout++) { DELAY(1000); if (ATA_INL(ctlr->r_res2, 0x1008 + offset) & 0x00040000) break; } if (bootverbose) { if (timeout >= 1000) device_printf(ch->dev, "port initialize timeout\n"); else device_printf(ch->dev, "port initialize time=%dms\n", timeout); } } /* on control commands read back registers to the request struct */ if (request->flags & ATA_R_CONTROL) { struct ata_device *atadev = device_get_softc(request->dev); request->u.ata.count = prb->fis[12] | ((u_int16_t)prb->fis[13] << 8); request->u.ata.lba = prb->fis[4] | ((u_int64_t)prb->fis[5] << 8) | ((u_int64_t)prb->fis[6] << 16); if (atadev->flags & ATA_D_48BIT_ACTIVE) request->u.ata.lba |= ((u_int64_t)prb->fis[8] << 24) | ((u_int64_t)prb->fis[9] << 32) | ((u_int64_t)prb->fis[10] << 40); else request->u.ata.lba |= ((u_int64_t)(prb->fis[7] & 0x0f) << 24); } /* update progress */ if (!(request->status & ATA_S_ERROR) && !(request->flags & ATA_R_TIMEOUT)) { if (request->flags & ATA_R_READ) request->donecount = prb->transfer_count; else request->donecount = request->bytecount; } /* release SG list etc */ ch->dma.unload(request); return ATA_OP_FINISHED; } static int ata_siiprb_issue_cmd(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); u_int64_t prb_bus = ch->dma.work_bus; u_int32_t status; int offset = ch->unit * 0x2000; int timeout; /* issue command to chip */ ATA_OUTL(ctlr->r_res2, 0x1c00 + offset, prb_bus); ATA_OUTL(ctlr->r_res2, 0x1c04 + offset, prb_bus >> 32); /* poll for command finished */ for (timeout = 0; timeout < 10000; timeout++) { DELAY(1000); if ((status = ATA_INL(ctlr->r_res2, 0x1008 + offset)) & 0x00010000) break; } // SOS XXX ATA_OUTL(ctlr->r_res2, 0x1008 + offset, 0x00010000); ATA_OUTL(ctlr->r_res2, 0x1008 + offset, 0x08ff08ff); if (timeout >= 1000) return EIO; if (bootverbose) device_printf(dev, "siiprb_issue_cmd time=%dms status=%08x\n", timeout, status); return 0; } static int ata_siiprb_pm_read(device_t dev, int port, int reg, u_int32_t *result) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct ata_siiprb_command *prb = (struct ata_siiprb_command *)ch->dma.work; int offset = ch->unit * 0x2000; bzero(prb, sizeof(struct ata_siiprb_command)); prb->fis[0] = 0x27; /* host to device */ prb->fis[1] = 0x8f; /* command FIS to PM port */ prb->fis[2] = ATA_READ_PM; prb->fis[3] = reg; prb->fis[7] = port; if (ata_siiprb_issue_cmd(dev)) { device_printf(dev, "error reading PM port\n"); return EIO; } prb = (struct ata_siiprb_command *) ((u_int8_t *)rman_get_virtual(ctlr->r_res2) + offset); *result = prb->fis[12]|(prb->fis[4]<<8)|(prb->fis[5]<<16)|(prb->fis[6]<<24); return 0; } static int ata_siiprb_pm_write(device_t dev, int port, int reg, u_int32_t value) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct ata_siiprb_command *prb = (struct ata_siiprb_command *)ch->dma.work; int offset = ch->unit * 0x2000; bzero(prb, sizeof(struct ata_siiprb_command)); prb->fis[0] = 0x27; /* host to device */ prb->fis[1] = 0x8f; /* command FIS to PM port */ prb->fis[2] = ATA_WRITE_PM; prb->fis[3] = reg; prb->fis[7] = port; prb->fis[12] = value & 0xff; prb->fis[4] = (value >> 8) & 0xff;; prb->fis[5] = (value >> 16) & 0xff;; prb->fis[6] = (value >> 24) & 0xff;; if (ata_siiprb_issue_cmd(dev)) { device_printf(dev, "error writing PM port\n"); return ATA_E_ABORT; } prb = (struct ata_siiprb_command *) ((u_int8_t *)rman_get_virtual(ctlr->r_res2) + offset); return prb->fis[3]; } static u_int32_t ata_siiprb_softreset(device_t dev, int port) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); struct ata_siiprb_command *prb = (struct ata_siiprb_command *)ch->dma.work; u_int32_t signature; int offset = ch->unit * 0x2000; /* setup the workspace for a soft reset command */ bzero(prb, sizeof(struct ata_siiprb_command)); prb->control = htole16(0x0080); prb->fis[1] = port & 0x0f; /* issue soft reset */ if (ata_siiprb_issue_cmd(dev)) return -1; ata_udelay(150000); /* get possible signature */ prb = (struct ata_siiprb_command *) ((u_int8_t *)rman_get_virtual(ctlr->r_res2) + offset); signature=prb->fis[12]|(prb->fis[4]<<8)|(prb->fis[5]<<16)|(prb->fis[6]<<24); /* clear error bits/interrupt */ ATA_IDX_OUTL(ch, ATA_SERROR, 0xffffffff); return signature; } static void ata_siiprb_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit * 0x2000; u_int32_t status, signature; int timeout; /* disable interrupts */ ATA_OUTL(ctlr->r_res2, 0x1014 + offset, 0x000000ff); /* reset channel HW */ ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x00000001); DELAY(1000); ATA_OUTL(ctlr->r_res2, 0x1004 + offset, 0x00000001); DELAY(10000); /* poll for channel ready */ for (timeout = 0; timeout < 1000; timeout++) { if ((status = ATA_INL(ctlr->r_res2, 0x1008 + offset)) & 0x00040000) break; DELAY(1000); } if (bootverbose) { if (timeout >= 1000) device_printf(dev, "channel HW reset timeout\n"); else device_printf(dev, "channel HW reset time=%dms\n", timeout); } /* reset phy */ - if (!ata_sata_phy_reset(dev)) { + if (!ata_sata_phy_reset(dev, -1, 1)) { if (bootverbose) device_printf(dev, "phy reset found no device\n"); ch->devices = 0; goto finish; } /* issue soft reset */ signature = ata_siiprb_softreset(dev, ATA_PM); if (bootverbose) device_printf(dev, "SIGNATURE=%08x\n", signature); /* figure out whats there */ switch (signature >> 16) { case 0x0000: ch->devices = ATA_ATA_MASTER; break; case 0x9669: ch->devices = ATA_PORTMULTIPLIER; ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x2000); /* enable PM support */ //SOS XXX need to clear all PM status and interrupts!!!! ata_pm_identify(dev); break; case 0xeb14: ch->devices = ATA_ATAPI_MASTER; break; default: ch->devices = 0; } if (bootverbose) device_printf(dev, "siiprb_reset devices=%08x\n", ch->devices); finish: /* clear interrupt(s) */ ATA_OUTL(ctlr->r_res2, 0x1008 + offset, 0x000008ff); /* require explicit interrupt ack */ ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x00000008); /* 64bit mode */ ATA_OUTL(ctlr->r_res2, 0x1004 + offset, 0x00000400); /* enable interrupts wanted */ ATA_OUTL(ctlr->r_res2, 0x1010 + offset, 0x000000ff); } static void ata_siiprb_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) { struct ata_dmasetprd_args *args = xsc; struct ata_siiprb_dma_prdentry *prd = args->dmatab; int i; if ((args->error = error)) return; for (i = 0; i < nsegs; i++) { prd[i].addr = htole64(segs[i].ds_addr); prd[i].count = htole32(segs[i].ds_len); } prd[i - 1].control = htole32(ATA_DMA_EOT); KASSERT(nsegs <= ATA_SIIPRB_DMA_ENTRIES,("too many DMA segment entries\n")); args->nsegs = nsegs; } static void ata_siiprb_dmainit(device_t dev) { struct ata_channel *ch = device_get_softc(dev); ata_dmainit(dev); /* note start and stop are not used here */ ch->dma.setprd = ata_siiprb_dmasetprd; ch->dma.max_address = BUS_SPACE_MAXADDR; } ATA_DECLARE_DRIVER(ata_sii); Index: head/sys/dev/ata/chipsets/ata-sis.c =================================================================== --- head/sys/dev/ata/chipsets/ata-sis.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-sis.c (revision 190581) @@ -1,314 +1,314 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_sis_chipinit(device_t dev); static int ata_sis_ch_attach(device_t dev); static void ata_sis_reset(device_t dev); static void ata_sis_setmode(device_t dev, int mode); /* misc defines */ #define SIS_33 1 #define SIS_66 2 #define SIS_100NEW 3 #define SIS_100OLD 4 #define SIS_133NEW 5 #define SIS_133OLD 6 #define SIS_SATA 7 /* * Silicon Integrated Systems Corp. (SiS) chipset support functions */ static int ata_sis_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); struct ata_chip_id *idx; static struct ata_chip_id ids[] = {{ ATA_SIS182, 0x00, SIS_SATA, 0, ATA_SA150, "182" }, /* south */ { ATA_SIS181, 0x00, SIS_SATA, 0, ATA_SA150, "181" }, /* south */ { ATA_SIS180, 0x00, SIS_SATA, 0, ATA_SA150, "180" }, /* south */ { ATA_SIS965, 0x00, SIS_133NEW, 0, ATA_UDMA6, "965" }, /* south */ { ATA_SIS964, 0x00, SIS_133NEW, 0, ATA_UDMA6, "964" }, /* south */ { ATA_SIS963, 0x00, SIS_133NEW, 0, ATA_UDMA6, "963" }, /* south */ { ATA_SIS962, 0x00, SIS_133NEW, 0, ATA_UDMA6, "962" }, /* south */ { ATA_SIS745, 0x00, SIS_100NEW, 0, ATA_UDMA5, "745" }, /* 1chip */ { ATA_SIS735, 0x00, SIS_100NEW, 0, ATA_UDMA5, "735" }, /* 1chip */ { ATA_SIS733, 0x00, SIS_100NEW, 0, ATA_UDMA5, "733" }, /* 1chip */ { ATA_SIS730, 0x00, SIS_100OLD, 0, ATA_UDMA5, "730" }, /* 1chip */ { ATA_SIS635, 0x00, SIS_100NEW, 0, ATA_UDMA5, "635" }, /* 1chip */ { ATA_SIS633, 0x00, SIS_100NEW, 0, ATA_UDMA5, "633" }, /* unknown */ { ATA_SIS630, 0x30, SIS_100OLD, 0, ATA_UDMA5, "630S"}, /* 1chip */ { ATA_SIS630, 0x00, SIS_66, 0, ATA_UDMA4, "630" }, /* 1chip */ { ATA_SIS620, 0x00, SIS_66, 0, ATA_UDMA4, "620" }, /* 1chip */ { ATA_SIS550, 0x00, SIS_66, 0, ATA_UDMA5, "550" }, { ATA_SIS540, 0x00, SIS_66, 0, ATA_UDMA4, "540" }, { ATA_SIS530, 0x00, SIS_66, 0, ATA_UDMA4, "530" }, { ATA_SIS5513, 0xc2, SIS_33, 1, ATA_UDMA2, "5513" }, { ATA_SIS5513, 0x00, SIS_33, 1, ATA_WDMA2, "5513" }, { 0, 0, 0, 0, 0, 0 }}; char buffer[64]; int found = 0; if (pci_get_class(dev) != PCIC_STORAGE) return (ENXIO); if (pci_get_vendor(dev) != ATA_SIS_ID) return ENXIO; if (!(idx = ata_find_chip(dev, ids, -pci_get_slot(dev)))) return ENXIO; if (idx->cfg2 && !found) { u_int8_t reg57 = pci_read_config(dev, 0x57, 1); pci_write_config(dev, 0x57, (reg57 & 0x7f), 1); if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == ATA_SIS5518) { found = 1; idx->cfg1 = SIS_133NEW; idx->max_dma = ATA_UDMA6; sprintf(buffer, "SiS 962/963 %s controller", ata_mode2str(idx->max_dma)); } pci_write_config(dev, 0x57, reg57, 1); } if (idx->cfg2 && !found) { u_int8_t reg4a = pci_read_config(dev, 0x4a, 1); pci_write_config(dev, 0x4a, (reg4a | 0x10), 1); if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == ATA_SIS5517) { struct ata_chip_id id[] = {{ ATA_SISSOUTH, 0x10, 0, 0, 0, "" }, { 0, 0, 0, 0, 0, 0 }}; found = 1; if (ata_find_chip(dev, id, pci_get_slot(dev))) { idx->cfg1 = SIS_133OLD; idx->max_dma = ATA_UDMA6; } else { idx->cfg1 = SIS_100NEW; idx->max_dma = ATA_UDMA5; } sprintf(buffer, "SiS 961 %s controller",ata_mode2str(idx->max_dma)); } pci_write_config(dev, 0x4a, reg4a, 1); } if (!found) sprintf(buffer,"SiS %s %s controller", idx->text, ata_mode2str(idx->max_dma)); device_set_desc_copy(dev, buffer); ctlr->chip = idx; ctlr->chipinit = ata_sis_chipinit; return 0; } static int ata_sis_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; switch (ctlr->chip->cfg1) { case SIS_33: break; case SIS_66: case SIS_100OLD: pci_write_config(dev, 0x52, pci_read_config(dev, 0x52, 1) & ~0x04, 1); break; case SIS_100NEW: case SIS_133OLD: pci_write_config(dev, 0x49, pci_read_config(dev, 0x49, 1) & ~0x01, 1); break; case SIS_133NEW: pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 2) | 0x0008, 2); pci_write_config(dev, 0x52, pci_read_config(dev, 0x52, 2) | 0x0008, 2); break; case SIS_SATA: ctlr->r_type2 = SYS_RES_IOPORT; ctlr->r_rid2 = PCIR_BAR(5); if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) { ctlr->ch_attach = ata_sis_ch_attach; ctlr->ch_detach = ata_pci_ch_detach; ctlr->reset = ata_sis_reset; } ctlr->setmode = ata_sata_setmode; return 0; default: return ENXIO; } ctlr->setmode = ata_sis_setmode; return 0; } static int ata_sis_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); int offset = ch->unit << ((ctlr->chip->chipid == ATA_SIS182) ? 5 : 6); /* setup the usual register normal pci style */ if (ata_pci_ch_attach(dev)) return ENXIO; ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = 0x00 + offset; ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = 0x04 + offset; ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = 0x08 + offset; ch->flags |= ATA_NO_SLAVE; /* XXX SOS PHY hotplug handling missing in SiS chip ?? */ /* XXX SOS unknown how to enable PHY state change interrupt */ return 0; } static void ata_sis_reset(device_t dev) { - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); } static void ata_sis_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); int devno = (ch->unit << 1) + atadev->unit; int error; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); if (ctlr->chip->cfg1 == SIS_133NEW) { if (mode > ATA_UDMA2 && pci_read_config(gparent, ch->unit ? 0x52 : 0x50,2) & 0x8000) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } } else { if (mode > ATA_UDMA2 && pci_read_config(gparent, 0x48, 1)&(ch->unit ? 0x20 : 0x10)) { ata_print_cable(dev, "controller"); mode = ATA_UDMA2; } } error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { switch (ctlr->chip->cfg1) { case SIS_133NEW: { u_int32_t timings[] = { 0x28269008, 0x0c266008, 0x04263008, 0x0c0a3008, 0x05093008, 0x22196008, 0x0c0a3008, 0x05093008, 0x050939fc, 0x050936ac, 0x0509347c, 0x0509325c, 0x0509323c, 0x0509322c, 0x0509321c}; u_int32_t reg; reg = (pci_read_config(gparent, 0x57, 1)&0x40?0x70:0x40)+(devno<<2); pci_write_config(gparent, reg, timings[ata_mode2idx(mode)], 4); break; } case SIS_133OLD: { u_int16_t timings[] = { 0x00cb, 0x0067, 0x0044, 0x0033, 0x0031, 0x0044, 0x0033, 0x0031, 0x8f31, 0x8a31, 0x8731, 0x8531, 0x8331, 0x8231, 0x8131 }; u_int16_t reg = 0x40 + (devno << 1); pci_write_config(gparent, reg, timings[ata_mode2idx(mode)], 2); break; } case SIS_100NEW: { u_int16_t timings[] = { 0x00cb, 0x0067, 0x0044, 0x0033, 0x0031, 0x0044, 0x0033, 0x0031, 0x8b31, 0x8731, 0x8531, 0x8431, 0x8231, 0x8131 }; u_int16_t reg = 0x40 + (devno << 1); pci_write_config(gparent, reg, timings[ata_mode2idx(mode)], 2); break; } case SIS_100OLD: case SIS_66: case SIS_33: { u_int16_t timings[] = { 0x0c0b, 0x0607, 0x0404, 0x0303, 0x0301, 0x0404, 0x0303, 0x0301, 0xf301, 0xd301, 0xb301, 0xa301, 0x9301, 0x8301 }; u_int16_t reg = 0x40 + (devno << 1); pci_write_config(gparent, reg, timings[ata_mode2idx(mode)], 2); break; } } atadev->mode = mode; } } ATA_DECLARE_DRIVER(ata_sis); Index: head/sys/dev/ata/chipsets/ata-via.c =================================================================== --- head/sys/dev/ata/chipsets/ata-via.c (revision 190580) +++ head/sys/dev/ata/chipsets/ata-via.c (revision 190581) @@ -1,376 +1,376 @@ /*- * Copyright (c) 1998 - 2008 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* local prototypes */ static int ata_via_chipinit(device_t dev); static int ata_via_ch_attach(device_t dev); static int ata_via_ch_detach(device_t dev); static void ata_via_reset(device_t dev); static void ata_via_old_setmode(device_t dev, int mode); static void ata_via_southbridge_fixup(device_t dev); static void ata_via_new_setmode(device_t dev, int mode); /* misc defines */ #define VIA33 0 #define VIA66 1 #define VIA100 2 #define VIA133 3 #define VIACLK 0x01 #define VIABUG 0x02 #define VIABAR 0x04 #define VIAAHCI 0x08 /* * VIA Technologies Inc. chipset support functions */ static int ata_via_probe(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); static struct ata_chip_id ids[] = {{ ATA_VIA82C586, 0x02, VIA33, 0x00, ATA_UDMA2, "82C586B" }, { ATA_VIA82C586, 0x00, VIA33, 0x00, ATA_WDMA2, "82C586" }, { ATA_VIA82C596, 0x12, VIA66, VIACLK, ATA_UDMA4, "82C596B" }, { ATA_VIA82C596, 0x00, VIA33, 0x00, ATA_UDMA2, "82C596" }, { ATA_VIA82C686, 0x40, VIA100, VIABUG, ATA_UDMA5, "82C686B"}, { ATA_VIA82C686, 0x10, VIA66, VIACLK, ATA_UDMA4, "82C686A" }, { ATA_VIA82C686, 0x00, VIA33, 0x00, ATA_UDMA2, "82C686" }, { ATA_VIA8231, 0x00, VIA100, VIABUG, ATA_UDMA5, "8231" }, { ATA_VIA8233, 0x00, VIA100, 0x00, ATA_UDMA5, "8233" }, { ATA_VIA8233C, 0x00, VIA100, 0x00, ATA_UDMA5, "8233C" }, { ATA_VIA8233A, 0x00, VIA133, 0x00, ATA_UDMA6, "8233A" }, { ATA_VIA8235, 0x00, VIA133, 0x00, ATA_UDMA6, "8235" }, { ATA_VIA8237, 0x00, VIA133, 0x00, ATA_UDMA6, "8237" }, { ATA_VIA8237A, 0x00, VIA133, 0x00, ATA_UDMA6, "8237A" }, { ATA_VIA8237S, 0x00, VIA133, 0x00, ATA_UDMA6, "8237S" }, { ATA_VIA8251, 0x00, VIA133, 0x00, ATA_UDMA6, "8251" }, { 0, 0, 0, 0, 0, 0 }}; static struct ata_chip_id new_ids[] = {{ ATA_VIA6410, 0x00, 0, 0x00, ATA_UDMA6, "6410" }, { ATA_VIA6420, 0x00, 7, 0x00, ATA_SA150, "6420" }, { ATA_VIA6421, 0x00, 6, VIABAR, ATA_SA150, "6421" }, { ATA_VIA8237A, 0x00, 7, 0x00, ATA_SA150, "8237A" }, { ATA_VIA8237S, 0x00, 7, 0x00, ATA_SA150, "8237S" }, { ATA_VIA8251, 0x00, 0, VIAAHCI, ATA_SA300, "8251" }, { 0, 0, 0, 0, 0, 0 }}; if (pci_get_vendor(dev) != ATA_VIA_ID) return ENXIO; if (pci_get_devid(dev) == ATA_VIA82C571) { if (!(ctlr->chip = ata_find_chip(dev, ids, -99))) return ENXIO; } else { if (!(ctlr->chip = ata_match_chip(dev, new_ids))) return ENXIO; } ata_set_desc(dev); ctlr->chipinit = ata_via_chipinit; return 0; } static int ata_via_chipinit(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); if (ata_setup_interrupt(dev, ata_generic_intr)) return ENXIO; if (ctlr->chip->max_dma >= ATA_SA150) { /* do we have AHCI capability ? */ if ((ctlr->chip->cfg2 == VIAAHCI) && ata_ahci_chipinit(dev) != ENXIO) return 0; ctlr->r_type2 = SYS_RES_IOPORT; ctlr->r_rid2 = PCIR_BAR(5); if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE))) { ctlr->ch_attach = ata_via_ch_attach; ctlr->ch_detach = ata_via_ch_detach; ctlr->reset = ata_via_reset; } if (ctlr->chip->cfg2 & VIABAR) { ctlr->channels = 3; ctlr->setmode = ata_via_new_setmode; } else ctlr->setmode = ata_sata_setmode; return 0; } /* prepare for ATA-66 on the 82C686a and 82C596b */ if (ctlr->chip->cfg2 & VIACLK) pci_write_config(dev, 0x50, 0x030b030b, 4); /* the southbridge might need the data corruption fix */ if (ctlr->chip->cfg2 & VIABUG) ata_via_southbridge_fixup(dev); /* set fifo configuration half'n'half */ pci_write_config(dev, 0x43, (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); /* set status register read retry */ pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); /* set DMA read & end-of-sector fifo flush */ pci_write_config(dev, 0x46, (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); /* set sector size */ pci_write_config(dev, 0x60, DEV_BSIZE, 2); pci_write_config(dev, 0x68, DEV_BSIZE, 2); ctlr->setmode = ata_via_old_setmode; return 0; } static int ata_via_ch_attach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* newer SATA chips has resources in one BAR for each channel */ if (ctlr->chip->cfg2 & VIABAR) { struct resource *r_io; int i, rid; ata_pci_dmainit(dev); rid = PCIR_BAR(ch->unit); if (!(r_io = bus_alloc_resource_any(device_get_parent(dev), SYS_RES_IOPORT, &rid, RF_ACTIVE))) return ENXIO; for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { ch->r_io[i].res = r_io; ch->r_io[i].offset = i; } ch->r_io[ATA_CONTROL].res = r_io; ch->r_io[ATA_CONTROL].offset = 2 + ATA_IOSIZE; ch->r_io[ATA_IDX_ADDR].res = r_io; ata_default_registers(dev); for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { ch->r_io[i].res = ctlr->r_res1; ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE); } ata_pci_hw(dev); if (ch->unit >= 2) return 0; } else { /* setup the usual register normal pci style */ if (ata_pci_ch_attach(dev)) return ENXIO; } ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; ch->r_io[ATA_SSTATUS].offset = (ch->unit << ctlr->chip->cfg1); ch->r_io[ATA_SERROR].res = ctlr->r_res2; ch->r_io[ATA_SERROR].offset = 0x04 + (ch->unit << ctlr->chip->cfg1); ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; ch->r_io[ATA_SCONTROL].offset = 0x08 + (ch->unit << ctlr->chip->cfg1); ch->flags |= ATA_NO_SLAVE; /* XXX SOS PHY hotplug handling missing in VIA chip ?? */ /* XXX SOS unknown how to enable PHY state change interrupt */ return 0; } static int ata_via_ch_detach(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); /* newer SATA chips has resources in one BAR for each channel */ if (ctlr->chip->cfg2 & VIABAR) { int rid; rid = PCIR_BAR(ch->unit); bus_release_resource(device_get_parent(dev), SYS_RES_IOPORT, rid, ch->r_io[ATA_CONTROL].res); ata_pci_dmafini(dev); } else { /* setup the usual register normal pci style */ if (ata_pci_ch_detach(dev)) return ENXIO; } return 0; } static void ata_via_reset(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); struct ata_channel *ch = device_get_softc(dev); if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) ata_generic_reset(dev); else - if (ata_sata_phy_reset(dev)) + if (ata_sata_phy_reset(dev, -1, 1)) ata_generic_reset(dev); } static void ata_via_new_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); int error; if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) { u_int8_t pio_timings[] = { 0xa8, 0x65, 0x65, 0x32, 0x20, 0x65, 0x32, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }; u_int8_t dma_timings[] = { 0xee, 0xe8, 0xe6, 0xe4, 0xe2, 0xe1, 0xe0 }; mode = ata_check_80pin(dev, ata_limit_mode(dev, mode, ATA_UDMA6)); error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { pci_write_config(gparent, 0xab, pio_timings[ata_mode2idx(mode)], 1); if (mode >= ATA_UDMA0) pci_write_config(gparent, 0xb3, dma_timings[mode & ATA_MODE_MASK], 1); atadev->mode = mode; } } else ata_sata_setmode(dev, mode); } static void ata_via_old_setmode(device_t dev, int mode) { device_t gparent = GRANDPARENT(dev); struct ata_pci_controller *ctlr = device_get_softc(gparent); struct ata_channel *ch = device_get_softc(device_get_parent(dev)); struct ata_device *atadev = device_get_softc(dev); u_int8_t timings[] = { 0xa8, 0x65, 0x42, 0x22, 0x20, 0x42, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }; int modes[][7] = { { 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */ { 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */ { 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0, 0x00 }, /* VIA ATA100 */ { 0xf7, 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0 } }; /* VIA ATA133 */ int devno = (ch->unit << 1) + atadev->unit; int reg = 0x53 - devno; int error; mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); mode = ata_check_80pin(dev, mode); error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); if (bootverbose) device_printf(dev, "%ssetting %s on %s chip\n", (error) ? "FAILURE " : "", ata_mode2str(mode), ctlr->chip->text); if (!error) { if (ctlr->chip->cfg1 != VIA133) pci_write_config(gparent, reg - 0x08,timings[ata_mode2idx(mode)],1); if (mode >= ATA_UDMA0) pci_write_config(gparent, reg, modes[ctlr->chip->cfg1][mode & ATA_MODE_MASK], 1); else pci_write_config(gparent, reg, 0x8b, 1); atadev->mode = mode; } } static void ata_via_southbridge_fixup(device_t dev) { device_t *children; int nchildren, i; if (device_get_children(device_get_parent(dev), &children, &nchildren)) return; for (i = 0; i < nchildren; i++) { if (pci_get_devid(children[i]) == ATA_VIA8363 || pci_get_devid(children[i]) == ATA_VIA8371 || pci_get_devid(children[i]) == ATA_VIA8662 || pci_get_devid(children[i]) == ATA_VIA8361) { u_int8_t reg76 = pci_read_config(children[i], 0x76, 1); if ((reg76 & 0xf0) != 0xd0) { device_printf(dev, "Correcting VIA config for southbridge data corruption bug\n"); pci_write_config(children[i], 0x75, 0x80, 1); pci_write_config(children[i], 0x76, (reg76 & 0x0f) | 0xd0, 1); } break; } } free(children, M_TEMP); } ATA_DECLARE_DRIVER(ata_via); MODULE_DEPEND(ata_via, ata_ahci, 1, 1, 1); Index: head/sys/dev/cxgb =================================================================== --- head/sys/dev/cxgb (revision 190580) +++ head/sys/dev/cxgb (revision 190581) Property changes on: head/sys/dev/cxgb ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/cxgb:r189793-190578 Index: head/sys/dev/sound/usb/uaudio.c =================================================================== --- head/sys/dev/sound/usb/uaudio.c (revision 190580) +++ head/sys/dev/sound/usb/uaudio.c (revision 190581) Property changes on: head/sys/dev/sound/usb/uaudio.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/sound/usb/uaudio.c:r189793-190578 Index: head/sys/dev/sound/usb/uaudio.h =================================================================== --- head/sys/dev/sound/usb/uaudio.h (revision 190580) +++ head/sys/dev/sound/usb/uaudio.h (revision 190581) Property changes on: head/sys/dev/sound/usb/uaudio.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/sound/usb/uaudio.h:r189793-190578 Index: head/sys/dev/sound/usb/uaudio_pcm.c =================================================================== --- head/sys/dev/sound/usb/uaudio_pcm.c (revision 190580) +++ head/sys/dev/sound/usb/uaudio_pcm.c (revision 190581) Property changes on: head/sys/dev/sound/usb/uaudio_pcm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/sound/usb/uaudio_pcm.c:r189793-190578 Index: head/sys/dev/sound/usb/uaudioreg.h =================================================================== --- head/sys/dev/sound/usb/uaudioreg.h (revision 190580) +++ head/sys/dev/sound/usb/uaudioreg.h (revision 190581) Property changes on: head/sys/dev/sound/usb/uaudioreg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/sound/usb/uaudioreg.h:r189793-190578 Index: head/sys/dev/usb/README.TXT =================================================================== --- head/sys/dev/usb/README.TXT (revision 190580) +++ head/sys/dev/usb/README.TXT (revision 190581) Property changes on: head/sys/dev/usb/README.TXT ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/README.TXT:r189793-190578 Index: head/sys/dev/usb/bluetooth/TODO.TXT =================================================================== --- head/sys/dev/usb/bluetooth/TODO.TXT (revision 190580) +++ head/sys/dev/usb/bluetooth/TODO.TXT (revision 190581) Property changes on: head/sys/dev/usb/bluetooth/TODO.TXT ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/bluetooth/TODO.TXT:r189793-190578 Index: head/sys/dev/usb/bluetooth/ng_ubt.c =================================================================== --- head/sys/dev/usb/bluetooth/ng_ubt.c (revision 190580) +++ head/sys/dev/usb/bluetooth/ng_ubt.c (revision 190581) Property changes on: head/sys/dev/usb/bluetooth/ng_ubt.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/bluetooth/ng_ubt.c:r189793-190578 Index: head/sys/dev/usb/bluetooth/ng_ubt_var.h =================================================================== --- head/sys/dev/usb/bluetooth/ng_ubt_var.h (revision 190580) +++ head/sys/dev/usb/bluetooth/ng_ubt_var.h (revision 190581) Property changes on: head/sys/dev/usb/bluetooth/ng_ubt_var.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/bluetooth/ng_ubt_var.h:r189793-190578 Index: head/sys/dev/usb/bluetooth/ubtbcmfw.c =================================================================== --- head/sys/dev/usb/bluetooth/ubtbcmfw.c (revision 190580) +++ head/sys/dev/usb/bluetooth/ubtbcmfw.c (revision 190581) Property changes on: head/sys/dev/usb/bluetooth/ubtbcmfw.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/bluetooth/ubtbcmfw.c:r189793-190578 Index: head/sys/dev/usb/controller/at91dci.c =================================================================== --- head/sys/dev/usb/controller/at91dci.c (revision 190580) +++ head/sys/dev/usb/controller/at91dci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/at91dci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/at91dci.c:r189793-190578 Index: head/sys/dev/usb/controller/at91dci.h =================================================================== --- head/sys/dev/usb/controller/at91dci.h (revision 190580) +++ head/sys/dev/usb/controller/at91dci.h (revision 190581) Property changes on: head/sys/dev/usb/controller/at91dci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/at91dci.h:r189793-190578 Index: head/sys/dev/usb/controller/at91dci_atmelarm.c =================================================================== --- head/sys/dev/usb/controller/at91dci_atmelarm.c (revision 190580) +++ head/sys/dev/usb/controller/at91dci_atmelarm.c (revision 190581) Property changes on: head/sys/dev/usb/controller/at91dci_atmelarm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/at91dci_atmelarm.c:r189793-190578 Index: head/sys/dev/usb/controller/atmegadci.c =================================================================== --- head/sys/dev/usb/controller/atmegadci.c (revision 190580) +++ head/sys/dev/usb/controller/atmegadci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/atmegadci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/atmegadci.c:r189793-190578 Index: head/sys/dev/usb/controller/atmegadci.h =================================================================== --- head/sys/dev/usb/controller/atmegadci.h (revision 190580) +++ head/sys/dev/usb/controller/atmegadci.h (revision 190581) Property changes on: head/sys/dev/usb/controller/atmegadci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/atmegadci.h:r189793-190578 Index: head/sys/dev/usb/controller/atmegadci_atmelarm.c =================================================================== --- head/sys/dev/usb/controller/atmegadci_atmelarm.c (revision 190580) +++ head/sys/dev/usb/controller/atmegadci_atmelarm.c (revision 190581) Property changes on: head/sys/dev/usb/controller/atmegadci_atmelarm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/atmegadci_atmelarm.c:r189793-190578 Index: head/sys/dev/usb/controller/ehci.c =================================================================== --- head/sys/dev/usb/controller/ehci.c (revision 190580) +++ head/sys/dev/usb/controller/ehci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ehci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ehci.c:r189793-190578 Index: head/sys/dev/usb/controller/ehci.h =================================================================== --- head/sys/dev/usb/controller/ehci.h (revision 190580) +++ head/sys/dev/usb/controller/ehci.h (revision 190581) Property changes on: head/sys/dev/usb/controller/ehci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ehci.h:r189793-190578 Index: head/sys/dev/usb/controller/ehci_ixp4xx.c =================================================================== --- head/sys/dev/usb/controller/ehci_ixp4xx.c (revision 190580) +++ head/sys/dev/usb/controller/ehci_ixp4xx.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ehci_ixp4xx.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ehci_ixp4xx.c:r189793-190578 Index: head/sys/dev/usb/controller/ehci_mbus.c =================================================================== --- head/sys/dev/usb/controller/ehci_mbus.c (revision 190580) +++ head/sys/dev/usb/controller/ehci_mbus.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ehci_mbus.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ehci_mbus.c:r189793-190578 Index: head/sys/dev/usb/controller/ehci_pci.c =================================================================== --- head/sys/dev/usb/controller/ehci_pci.c (revision 190580) +++ head/sys/dev/usb/controller/ehci_pci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ehci_pci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ehci_pci.c:r189793-190578 Index: head/sys/dev/usb/controller/musb_otg.c =================================================================== --- head/sys/dev/usb/controller/musb_otg.c (revision 190580) +++ head/sys/dev/usb/controller/musb_otg.c (revision 190581) Property changes on: head/sys/dev/usb/controller/musb_otg.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/musb_otg.c:r189793-190578 Index: head/sys/dev/usb/controller/musb_otg.h =================================================================== --- head/sys/dev/usb/controller/musb_otg.h (revision 190580) +++ head/sys/dev/usb/controller/musb_otg.h (revision 190581) Property changes on: head/sys/dev/usb/controller/musb_otg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/musb_otg.h:r189793-190578 Index: head/sys/dev/usb/controller/musb_otg_atmelarm.c =================================================================== --- head/sys/dev/usb/controller/musb_otg_atmelarm.c (revision 190580) +++ head/sys/dev/usb/controller/musb_otg_atmelarm.c (revision 190581) Property changes on: head/sys/dev/usb/controller/musb_otg_atmelarm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/musb_otg_atmelarm.c:r189793-190578 Index: head/sys/dev/usb/controller/ohci.c =================================================================== --- head/sys/dev/usb/controller/ohci.c (revision 190580) +++ head/sys/dev/usb/controller/ohci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ohci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ohci.c:r189793-190578 Index: head/sys/dev/usb/controller/ohci.h =================================================================== --- head/sys/dev/usb/controller/ohci.h (revision 190580) +++ head/sys/dev/usb/controller/ohci.h (revision 190581) Property changes on: head/sys/dev/usb/controller/ohci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ohci.h:r189793-190578 Index: head/sys/dev/usb/controller/ohci_atmelarm.c =================================================================== --- head/sys/dev/usb/controller/ohci_atmelarm.c (revision 190580) +++ head/sys/dev/usb/controller/ohci_atmelarm.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ohci_atmelarm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ohci_atmelarm.c:r189793-190578 Index: head/sys/dev/usb/controller/ohci_pci.c =================================================================== --- head/sys/dev/usb/controller/ohci_pci.c (revision 190580) +++ head/sys/dev/usb/controller/ohci_pci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/ohci_pci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/ohci_pci.c:r189793-190578 Index: head/sys/dev/usb/controller/uhci.c =================================================================== --- head/sys/dev/usb/controller/uhci.c (revision 190580) +++ head/sys/dev/usb/controller/uhci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/uhci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/uhci.c:r189793-190578 Index: head/sys/dev/usb/controller/uhci.h =================================================================== --- head/sys/dev/usb/controller/uhci.h (revision 190580) +++ head/sys/dev/usb/controller/uhci.h (revision 190581) Property changes on: head/sys/dev/usb/controller/uhci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/uhci.h:r189793-190578 Index: head/sys/dev/usb/controller/uhci_pci.c =================================================================== --- head/sys/dev/usb/controller/uhci_pci.c (revision 190580) +++ head/sys/dev/usb/controller/uhci_pci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/uhci_pci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/uhci_pci.c:r189793-190578 Index: head/sys/dev/usb/controller/usb_controller.c =================================================================== --- head/sys/dev/usb/controller/usb_controller.c (revision 190580) +++ head/sys/dev/usb/controller/usb_controller.c (revision 190581) Property changes on: head/sys/dev/usb/controller/usb_controller.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/usb_controller.c:r189793-190578 Index: head/sys/dev/usb/controller/uss820dci.c =================================================================== --- head/sys/dev/usb/controller/uss820dci.c (revision 190580) +++ head/sys/dev/usb/controller/uss820dci.c (revision 190581) Property changes on: head/sys/dev/usb/controller/uss820dci.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/uss820dci.c:r189793-190578 Index: head/sys/dev/usb/controller/uss820dci.h =================================================================== --- head/sys/dev/usb/controller/uss820dci.h (revision 190580) +++ head/sys/dev/usb/controller/uss820dci.h (revision 190581) Property changes on: head/sys/dev/usb/controller/uss820dci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/uss820dci.h:r189793-190578 Index: head/sys/dev/usb/controller/uss820dci_atmelarm.c =================================================================== --- head/sys/dev/usb/controller/uss820dci_atmelarm.c (revision 190580) +++ head/sys/dev/usb/controller/uss820dci_atmelarm.c (revision 190581) Property changes on: head/sys/dev/usb/controller/uss820dci_atmelarm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/controller/uss820dci_atmelarm.c:r189793-190578 Index: head/sys/dev/usb/input/uhid.c =================================================================== --- head/sys/dev/usb/input/uhid.c (revision 190580) +++ head/sys/dev/usb/input/uhid.c (revision 190581) Property changes on: head/sys/dev/usb/input/uhid.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/input/uhid.c:r189793-190578 Index: head/sys/dev/usb/input/ukbd.c =================================================================== --- head/sys/dev/usb/input/ukbd.c (revision 190580) +++ head/sys/dev/usb/input/ukbd.c (revision 190581) Property changes on: head/sys/dev/usb/input/ukbd.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/input/ukbd.c:r189793-190578 Index: head/sys/dev/usb/input/ums.c =================================================================== --- head/sys/dev/usb/input/ums.c (revision 190580) +++ head/sys/dev/usb/input/ums.c (revision 190581) Property changes on: head/sys/dev/usb/input/ums.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/input/ums.c:r189793-190578 Index: head/sys/dev/usb/input/usb_rdesc.h =================================================================== --- head/sys/dev/usb/input/usb_rdesc.h (revision 190580) +++ head/sys/dev/usb/input/usb_rdesc.h (revision 190581) Property changes on: head/sys/dev/usb/input/usb_rdesc.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/input/usb_rdesc.h:r189793-190578 Index: head/sys/dev/usb/misc/udbp.c =================================================================== --- head/sys/dev/usb/misc/udbp.c (revision 190580) +++ head/sys/dev/usb/misc/udbp.c (revision 190581) Property changes on: head/sys/dev/usb/misc/udbp.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/misc/udbp.c:r189793-190578 Index: head/sys/dev/usb/misc/udbp.h =================================================================== --- head/sys/dev/usb/misc/udbp.h (revision 190580) +++ head/sys/dev/usb/misc/udbp.h (revision 190581) Property changes on: head/sys/dev/usb/misc/udbp.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/misc/udbp.h:r189793-190578 Index: head/sys/dev/usb/misc/ufm.c =================================================================== --- head/sys/dev/usb/misc/ufm.c (revision 190580) +++ head/sys/dev/usb/misc/ufm.c (revision 190581) Property changes on: head/sys/dev/usb/misc/ufm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/misc/ufm.c:r189793-190578 Index: head/sys/dev/usb/net/if_aue.c =================================================================== --- head/sys/dev/usb/net/if_aue.c (revision 190580) +++ head/sys/dev/usb/net/if_aue.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_aue.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_aue.c:r189793-190578 Index: head/sys/dev/usb/net/if_auereg.h =================================================================== --- head/sys/dev/usb/net/if_auereg.h (revision 190580) +++ head/sys/dev/usb/net/if_auereg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_auereg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_auereg.h:r189793-190578 Index: head/sys/dev/usb/net/if_axe.c =================================================================== --- head/sys/dev/usb/net/if_axe.c (revision 190580) +++ head/sys/dev/usb/net/if_axe.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_axe.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_axe.c:r189793-190578 Index: head/sys/dev/usb/net/if_axereg.h =================================================================== --- head/sys/dev/usb/net/if_axereg.h (revision 190580) +++ head/sys/dev/usb/net/if_axereg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_axereg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_axereg.h:r189793-190578 Index: head/sys/dev/usb/net/if_cdce.c =================================================================== --- head/sys/dev/usb/net/if_cdce.c (revision 190580) +++ head/sys/dev/usb/net/if_cdce.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_cdce.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_cdce.c:r189793-190578 Index: head/sys/dev/usb/net/if_cdcereg.h =================================================================== --- head/sys/dev/usb/net/if_cdcereg.h (revision 190580) +++ head/sys/dev/usb/net/if_cdcereg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_cdcereg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_cdcereg.h:r189793-190578 Index: head/sys/dev/usb/net/if_cue.c =================================================================== --- head/sys/dev/usb/net/if_cue.c (revision 190580) +++ head/sys/dev/usb/net/if_cue.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_cue.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_cue.c:r189793-190578 Index: head/sys/dev/usb/net/if_cuereg.h =================================================================== --- head/sys/dev/usb/net/if_cuereg.h (revision 190580) +++ head/sys/dev/usb/net/if_cuereg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_cuereg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_cuereg.h:r189793-190578 Index: head/sys/dev/usb/net/if_kue.c =================================================================== --- head/sys/dev/usb/net/if_kue.c (revision 190580) +++ head/sys/dev/usb/net/if_kue.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_kue.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_kue.c:r189793-190578 Index: head/sys/dev/usb/net/if_kuefw.h =================================================================== --- head/sys/dev/usb/net/if_kuefw.h (revision 190580) +++ head/sys/dev/usb/net/if_kuefw.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_kuefw.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_kuefw.h:r189793-190578 Index: head/sys/dev/usb/net/if_kuereg.h =================================================================== --- head/sys/dev/usb/net/if_kuereg.h (revision 190580) +++ head/sys/dev/usb/net/if_kuereg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_kuereg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_kuereg.h:r189793-190578 Index: head/sys/dev/usb/net/if_rue.c =================================================================== --- head/sys/dev/usb/net/if_rue.c (revision 190580) +++ head/sys/dev/usb/net/if_rue.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_rue.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_rue.c:r189793-190578 Index: head/sys/dev/usb/net/if_ruereg.h =================================================================== --- head/sys/dev/usb/net/if_ruereg.h (revision 190580) +++ head/sys/dev/usb/net/if_ruereg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_ruereg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_ruereg.h:r189793-190578 Index: head/sys/dev/usb/net/if_udav.c =================================================================== --- head/sys/dev/usb/net/if_udav.c (revision 190580) +++ head/sys/dev/usb/net/if_udav.c (revision 190581) Property changes on: head/sys/dev/usb/net/if_udav.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_udav.c:r189793-190578 Index: head/sys/dev/usb/net/if_udavreg.h =================================================================== --- head/sys/dev/usb/net/if_udavreg.h (revision 190580) +++ head/sys/dev/usb/net/if_udavreg.h (revision 190581) Property changes on: head/sys/dev/usb/net/if_udavreg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/if_udavreg.h:r189793-190578 Index: head/sys/dev/usb/net/usb_ethernet.c =================================================================== --- head/sys/dev/usb/net/usb_ethernet.c (revision 190580) +++ head/sys/dev/usb/net/usb_ethernet.c (revision 190581) Property changes on: head/sys/dev/usb/net/usb_ethernet.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/usb_ethernet.c:r189793-190578 Index: head/sys/dev/usb/net/usb_ethernet.h =================================================================== --- head/sys/dev/usb/net/usb_ethernet.h (revision 190580) +++ head/sys/dev/usb/net/usb_ethernet.h (revision 190581) Property changes on: head/sys/dev/usb/net/usb_ethernet.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/net/usb_ethernet.h:r189793-190578 Index: head/sys/dev/usb/quirk/usb_quirk.c =================================================================== --- head/sys/dev/usb/quirk/usb_quirk.c (revision 190580) +++ head/sys/dev/usb/quirk/usb_quirk.c (revision 190581) Property changes on: head/sys/dev/usb/quirk/usb_quirk.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/quirk/usb_quirk.c:r189793-190578 Index: head/sys/dev/usb/quirk/usb_quirk.h =================================================================== --- head/sys/dev/usb/quirk/usb_quirk.h (revision 190580) +++ head/sys/dev/usb/quirk/usb_quirk.h (revision 190581) Property changes on: head/sys/dev/usb/quirk/usb_quirk.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/quirk/usb_quirk.h:r189793-190578 Index: head/sys/dev/usb/serial/u3g.c =================================================================== --- head/sys/dev/usb/serial/u3g.c (revision 190580) +++ head/sys/dev/usb/serial/u3g.c (revision 190581) Property changes on: head/sys/dev/usb/serial/u3g.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/u3g.c:r189793-190578 Index: head/sys/dev/usb/serial/uark.c =================================================================== --- head/sys/dev/usb/serial/uark.c (revision 190580) +++ head/sys/dev/usb/serial/uark.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uark.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uark.c:r189793-190578 Index: head/sys/dev/usb/serial/ubsa.c =================================================================== --- head/sys/dev/usb/serial/ubsa.c (revision 190580) +++ head/sys/dev/usb/serial/ubsa.c (revision 190581) Property changes on: head/sys/dev/usb/serial/ubsa.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/ubsa.c:r189793-190578 Index: head/sys/dev/usb/serial/ubser.c =================================================================== --- head/sys/dev/usb/serial/ubser.c (revision 190580) +++ head/sys/dev/usb/serial/ubser.c (revision 190581) Property changes on: head/sys/dev/usb/serial/ubser.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/ubser.c:r189793-190578 Index: head/sys/dev/usb/serial/uchcom.c =================================================================== --- head/sys/dev/usb/serial/uchcom.c (revision 190580) +++ head/sys/dev/usb/serial/uchcom.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uchcom.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uchcom.c:r189793-190578 Index: head/sys/dev/usb/serial/ucycom.c =================================================================== --- head/sys/dev/usb/serial/ucycom.c (revision 190580) +++ head/sys/dev/usb/serial/ucycom.c (revision 190581) Property changes on: head/sys/dev/usb/serial/ucycom.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/ucycom.c:r189793-190578 Index: head/sys/dev/usb/serial/ufoma.c =================================================================== --- head/sys/dev/usb/serial/ufoma.c (revision 190580) +++ head/sys/dev/usb/serial/ufoma.c (revision 190581) Property changes on: head/sys/dev/usb/serial/ufoma.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/ufoma.c:r189793-190578 Index: head/sys/dev/usb/serial/uftdi.c =================================================================== --- head/sys/dev/usb/serial/uftdi.c (revision 190580) +++ head/sys/dev/usb/serial/uftdi.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uftdi.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uftdi.c:r189793-190578 Index: head/sys/dev/usb/serial/uftdi_reg.h =================================================================== --- head/sys/dev/usb/serial/uftdi_reg.h (revision 190580) +++ head/sys/dev/usb/serial/uftdi_reg.h (revision 190581) Property changes on: head/sys/dev/usb/serial/uftdi_reg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uftdi_reg.h:r189793-190578 Index: head/sys/dev/usb/serial/ugensa.c =================================================================== --- head/sys/dev/usb/serial/ugensa.c (revision 190580) +++ head/sys/dev/usb/serial/ugensa.c (revision 190581) Property changes on: head/sys/dev/usb/serial/ugensa.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/ugensa.c:r189793-190578 Index: head/sys/dev/usb/serial/uipaq.c =================================================================== --- head/sys/dev/usb/serial/uipaq.c (revision 190580) +++ head/sys/dev/usb/serial/uipaq.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uipaq.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uipaq.c:r189793-190578 Index: head/sys/dev/usb/serial/ulpt.c =================================================================== --- head/sys/dev/usb/serial/ulpt.c (revision 190580) +++ head/sys/dev/usb/serial/ulpt.c (revision 190581) Property changes on: head/sys/dev/usb/serial/ulpt.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/ulpt.c:r189793-190578 Index: head/sys/dev/usb/serial/umct.c =================================================================== --- head/sys/dev/usb/serial/umct.c (revision 190580) +++ head/sys/dev/usb/serial/umct.c (revision 190581) Property changes on: head/sys/dev/usb/serial/umct.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/umct.c:r189793-190578 Index: head/sys/dev/usb/serial/umodem.c =================================================================== --- head/sys/dev/usb/serial/umodem.c (revision 190580) +++ head/sys/dev/usb/serial/umodem.c (revision 190581) Property changes on: head/sys/dev/usb/serial/umodem.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/umodem.c:r189793-190578 Index: head/sys/dev/usb/serial/umoscom.c =================================================================== --- head/sys/dev/usb/serial/umoscom.c (revision 190580) +++ head/sys/dev/usb/serial/umoscom.c (revision 190581) Property changes on: head/sys/dev/usb/serial/umoscom.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/umoscom.c:r189793-190578 Index: head/sys/dev/usb/serial/uplcom.c =================================================================== --- head/sys/dev/usb/serial/uplcom.c (revision 190580) +++ head/sys/dev/usb/serial/uplcom.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uplcom.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uplcom.c:r189793-190578 Index: head/sys/dev/usb/serial/usb_serial.c =================================================================== --- head/sys/dev/usb/serial/usb_serial.c (revision 190580) +++ head/sys/dev/usb/serial/usb_serial.c (revision 190581) Property changes on: head/sys/dev/usb/serial/usb_serial.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/usb_serial.c:r189793-190578 Index: head/sys/dev/usb/serial/usb_serial.h =================================================================== --- head/sys/dev/usb/serial/usb_serial.h (revision 190580) +++ head/sys/dev/usb/serial/usb_serial.h (revision 190581) Property changes on: head/sys/dev/usb/serial/usb_serial.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/usb_serial.h:r189793-190578 Index: head/sys/dev/usb/serial/uslcom.c =================================================================== --- head/sys/dev/usb/serial/uslcom.c (revision 190580) +++ head/sys/dev/usb/serial/uslcom.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uslcom.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uslcom.c:r189793-190578 Index: head/sys/dev/usb/serial/uvisor.c =================================================================== --- head/sys/dev/usb/serial/uvisor.c (revision 190580) +++ head/sys/dev/usb/serial/uvisor.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uvisor.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uvisor.c:r189793-190578 Index: head/sys/dev/usb/serial/uvscom.c =================================================================== --- head/sys/dev/usb/serial/uvscom.c (revision 190580) +++ head/sys/dev/usb/serial/uvscom.c (revision 190581) Property changes on: head/sys/dev/usb/serial/uvscom.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/serial/uvscom.c:r189793-190578 Index: head/sys/dev/usb/storage/rio500_usb.h =================================================================== --- head/sys/dev/usb/storage/rio500_usb.h (revision 190580) +++ head/sys/dev/usb/storage/rio500_usb.h (revision 190581) Property changes on: head/sys/dev/usb/storage/rio500_usb.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/storage/rio500_usb.h:r189793-190578 Index: head/sys/dev/usb/storage/umass.c =================================================================== --- head/sys/dev/usb/storage/umass.c (revision 190580) +++ head/sys/dev/usb/storage/umass.c (revision 190581) Property changes on: head/sys/dev/usb/storage/umass.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/storage/umass.c:r189793-190578 Index: head/sys/dev/usb/storage/urio.c =================================================================== --- head/sys/dev/usb/storage/urio.c (revision 190580) +++ head/sys/dev/usb/storage/urio.c (revision 190581) Property changes on: head/sys/dev/usb/storage/urio.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/storage/urio.c:r189793-190578 Index: head/sys/dev/usb/storage/ustorage_fs.c =================================================================== --- head/sys/dev/usb/storage/ustorage_fs.c (revision 190580) +++ head/sys/dev/usb/storage/ustorage_fs.c (revision 190581) Property changes on: head/sys/dev/usb/storage/ustorage_fs.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/storage/ustorage_fs.c:r189793-190578 Index: head/sys/dev/usb/template/usb_template.c =================================================================== --- head/sys/dev/usb/template/usb_template.c (revision 190580) +++ head/sys/dev/usb/template/usb_template.c (revision 190581) Property changes on: head/sys/dev/usb/template/usb_template.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/template/usb_template.c:r189793-190578 Index: head/sys/dev/usb/template/usb_template.h =================================================================== --- head/sys/dev/usb/template/usb_template.h (revision 190580) +++ head/sys/dev/usb/template/usb_template.h (revision 190581) Property changes on: head/sys/dev/usb/template/usb_template.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/template/usb_template.h:r189793-190578 Index: head/sys/dev/usb/template/usb_template_cdce.c =================================================================== --- head/sys/dev/usb/template/usb_template_cdce.c (revision 190580) +++ head/sys/dev/usb/template/usb_template_cdce.c (revision 190581) Property changes on: head/sys/dev/usb/template/usb_template_cdce.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/template/usb_template_cdce.c:r189793-190578 Index: head/sys/dev/usb/template/usb_template_msc.c =================================================================== --- head/sys/dev/usb/template/usb_template_msc.c (revision 190580) +++ head/sys/dev/usb/template/usb_template_msc.c (revision 190581) Property changes on: head/sys/dev/usb/template/usb_template_msc.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/template/usb_template_msc.c:r189793-190578 Index: head/sys/dev/usb/template/usb_template_mtp.c =================================================================== --- head/sys/dev/usb/template/usb_template_mtp.c (revision 190580) +++ head/sys/dev/usb/template/usb_template_mtp.c (revision 190581) Property changes on: head/sys/dev/usb/template/usb_template_mtp.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/template/usb_template_mtp.c:r189793-190578 Index: head/sys/dev/usb/ufm_ioctl.h =================================================================== --- head/sys/dev/usb/ufm_ioctl.h (revision 190580) +++ head/sys/dev/usb/ufm_ioctl.h (revision 190581) Property changes on: head/sys/dev/usb/ufm_ioctl.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/ufm_ioctl.h:r189793-190578 Index: head/sys/dev/usb/usb.h =================================================================== --- head/sys/dev/usb/usb.h (revision 190580) +++ head/sys/dev/usb/usb.h (revision 190581) Property changes on: head/sys/dev/usb/usb.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb.h:r189793-190578 Index: head/sys/dev/usb/usb_bus.h =================================================================== --- head/sys/dev/usb/usb_bus.h (revision 190580) +++ head/sys/dev/usb/usb_bus.h (revision 190581) Property changes on: head/sys/dev/usb/usb_bus.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_bus.h:r189793-190578 Index: head/sys/dev/usb/usb_busdma.c =================================================================== --- head/sys/dev/usb/usb_busdma.c (revision 190580) +++ head/sys/dev/usb/usb_busdma.c (revision 190581) Property changes on: head/sys/dev/usb/usb_busdma.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_busdma.c:r189793-190578 Index: head/sys/dev/usb/usb_busdma.h =================================================================== --- head/sys/dev/usb/usb_busdma.h (revision 190580) +++ head/sys/dev/usb/usb_busdma.h (revision 190581) Property changes on: head/sys/dev/usb/usb_busdma.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_busdma.h:r189793-190578 Index: head/sys/dev/usb/usb_cdc.h =================================================================== --- head/sys/dev/usb/usb_cdc.h (revision 190580) +++ head/sys/dev/usb/usb_cdc.h (revision 190581) Property changes on: head/sys/dev/usb/usb_cdc.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_cdc.h:r189793-190578 Index: head/sys/dev/usb/usb_compat_linux.c =================================================================== --- head/sys/dev/usb/usb_compat_linux.c (revision 190580) +++ head/sys/dev/usb/usb_compat_linux.c (revision 190581) Property changes on: head/sys/dev/usb/usb_compat_linux.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_compat_linux.c:r189793-190578 Index: head/sys/dev/usb/usb_compat_linux.h =================================================================== --- head/sys/dev/usb/usb_compat_linux.h (revision 190580) +++ head/sys/dev/usb/usb_compat_linux.h (revision 190581) Property changes on: head/sys/dev/usb/usb_compat_linux.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_compat_linux.h:r189793-190578 Index: head/sys/dev/usb/usb_controller.h =================================================================== --- head/sys/dev/usb/usb_controller.h (revision 190580) +++ head/sys/dev/usb/usb_controller.h (revision 190581) Property changes on: head/sys/dev/usb/usb_controller.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_controller.h:r189793-190578 Index: head/sys/dev/usb/usb_core.c =================================================================== --- head/sys/dev/usb/usb_core.c (revision 190580) +++ head/sys/dev/usb/usb_core.c (revision 190581) Property changes on: head/sys/dev/usb/usb_core.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_core.c:r189793-190578 Index: head/sys/dev/usb/usb_core.h =================================================================== --- head/sys/dev/usb/usb_core.h (revision 190580) +++ head/sys/dev/usb/usb_core.h (revision 190581) Property changes on: head/sys/dev/usb/usb_core.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_core.h:r189793-190578 Index: head/sys/dev/usb/usb_debug.c =================================================================== --- head/sys/dev/usb/usb_debug.c (revision 190580) +++ head/sys/dev/usb/usb_debug.c (revision 190581) Property changes on: head/sys/dev/usb/usb_debug.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_debug.c:r189793-190578 Index: head/sys/dev/usb/usb_debug.h =================================================================== --- head/sys/dev/usb/usb_debug.h (revision 190580) +++ head/sys/dev/usb/usb_debug.h (revision 190581) Property changes on: head/sys/dev/usb/usb_debug.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_debug.h:r189793-190578 Index: head/sys/dev/usb/usb_defs.h =================================================================== --- head/sys/dev/usb/usb_defs.h (revision 190580) +++ head/sys/dev/usb/usb_defs.h (revision 190581) Property changes on: head/sys/dev/usb/usb_defs.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_defs.h:r189793-190578 Index: head/sys/dev/usb/usb_dev.c =================================================================== --- head/sys/dev/usb/usb_dev.c (revision 190580) +++ head/sys/dev/usb/usb_dev.c (revision 190581) Property changes on: head/sys/dev/usb/usb_dev.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_dev.c:r189793-190578 Index: head/sys/dev/usb/usb_dev.h =================================================================== --- head/sys/dev/usb/usb_dev.h (revision 190580) +++ head/sys/dev/usb/usb_dev.h (revision 190581) Property changes on: head/sys/dev/usb/usb_dev.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_dev.h:r189793-190578 Index: head/sys/dev/usb/usb_device.c =================================================================== --- head/sys/dev/usb/usb_device.c (revision 190580) +++ head/sys/dev/usb/usb_device.c (revision 190581) Property changes on: head/sys/dev/usb/usb_device.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_device.c:r189793-190578 Index: head/sys/dev/usb/usb_device.h =================================================================== --- head/sys/dev/usb/usb_device.h (revision 190580) +++ head/sys/dev/usb/usb_device.h (revision 190581) Property changes on: head/sys/dev/usb/usb_device.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_device.h:r189793-190578 Index: head/sys/dev/usb/usb_dynamic.c =================================================================== --- head/sys/dev/usb/usb_dynamic.c (revision 190580) +++ head/sys/dev/usb/usb_dynamic.c (revision 190581) Property changes on: head/sys/dev/usb/usb_dynamic.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_dynamic.c:r189793-190578 Index: head/sys/dev/usb/usb_dynamic.h =================================================================== --- head/sys/dev/usb/usb_dynamic.h (revision 190580) +++ head/sys/dev/usb/usb_dynamic.h (revision 190581) Property changes on: head/sys/dev/usb/usb_dynamic.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_dynamic.h:r189793-190578 Index: head/sys/dev/usb/usb_endian.h =================================================================== --- head/sys/dev/usb/usb_endian.h (revision 190580) +++ head/sys/dev/usb/usb_endian.h (revision 190581) Property changes on: head/sys/dev/usb/usb_endian.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_endian.h:r189793-190578 Index: head/sys/dev/usb/usb_error.c =================================================================== --- head/sys/dev/usb/usb_error.c (revision 190580) +++ head/sys/dev/usb/usb_error.c (revision 190581) Property changes on: head/sys/dev/usb/usb_error.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_error.c:r189793-190578 Index: head/sys/dev/usb/usb_error.h =================================================================== --- head/sys/dev/usb/usb_error.h (revision 190580) +++ head/sys/dev/usb/usb_error.h (revision 190581) Property changes on: head/sys/dev/usb/usb_error.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_error.h:r189793-190578 Index: head/sys/dev/usb/usb_generic.c =================================================================== --- head/sys/dev/usb/usb_generic.c (revision 190580) +++ head/sys/dev/usb/usb_generic.c (revision 190581) Property changes on: head/sys/dev/usb/usb_generic.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_generic.c:r189793-190578 Index: head/sys/dev/usb/usb_generic.h =================================================================== --- head/sys/dev/usb/usb_generic.h (revision 190580) +++ head/sys/dev/usb/usb_generic.h (revision 190581) Property changes on: head/sys/dev/usb/usb_generic.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_generic.h:r189793-190578 Index: head/sys/dev/usb/usb_handle_request.c =================================================================== --- head/sys/dev/usb/usb_handle_request.c (revision 190580) +++ head/sys/dev/usb/usb_handle_request.c (revision 190581) Property changes on: head/sys/dev/usb/usb_handle_request.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_handle_request.c:r189793-190578 Index: head/sys/dev/usb/usb_handle_request.h =================================================================== --- head/sys/dev/usb/usb_handle_request.h (revision 190580) +++ head/sys/dev/usb/usb_handle_request.h (revision 190581) Property changes on: head/sys/dev/usb/usb_handle_request.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_handle_request.h:r189793-190578 Index: head/sys/dev/usb/usb_hid.c =================================================================== --- head/sys/dev/usb/usb_hid.c (revision 190580) +++ head/sys/dev/usb/usb_hid.c (revision 190581) Property changes on: head/sys/dev/usb/usb_hid.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_hid.c:r189793-190578 Index: head/sys/dev/usb/usb_hid.h =================================================================== --- head/sys/dev/usb/usb_hid.h (revision 190580) +++ head/sys/dev/usb/usb_hid.h (revision 190581) Property changes on: head/sys/dev/usb/usb_hid.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_hid.h:r189793-190578 Index: head/sys/dev/usb/usb_hub.c =================================================================== --- head/sys/dev/usb/usb_hub.c (revision 190580) +++ head/sys/dev/usb/usb_hub.c (revision 190581) Property changes on: head/sys/dev/usb/usb_hub.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_hub.c:r189793-190578 Index: head/sys/dev/usb/usb_hub.h =================================================================== --- head/sys/dev/usb/usb_hub.h (revision 190580) +++ head/sys/dev/usb/usb_hub.h (revision 190581) Property changes on: head/sys/dev/usb/usb_hub.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_hub.h:r189793-190578 Index: head/sys/dev/usb/usb_if.m =================================================================== --- head/sys/dev/usb/usb_if.m (revision 190580) +++ head/sys/dev/usb/usb_if.m (revision 190581) Property changes on: head/sys/dev/usb/usb_if.m ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_if.m:r189793-190578 Index: head/sys/dev/usb/usb_ioctl.h =================================================================== --- head/sys/dev/usb/usb_ioctl.h (revision 190580) +++ head/sys/dev/usb/usb_ioctl.h (revision 190581) Property changes on: head/sys/dev/usb/usb_ioctl.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_ioctl.h:r189793-190578 Index: head/sys/dev/usb/usb_lookup.c =================================================================== --- head/sys/dev/usb/usb_lookup.c (revision 190580) +++ head/sys/dev/usb/usb_lookup.c (revision 190581) Property changes on: head/sys/dev/usb/usb_lookup.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_lookup.c:r189793-190578 Index: head/sys/dev/usb/usb_lookup.h =================================================================== --- head/sys/dev/usb/usb_lookup.h (revision 190580) +++ head/sys/dev/usb/usb_lookup.h (revision 190581) Property changes on: head/sys/dev/usb/usb_lookup.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_lookup.h:r189793-190578 Index: head/sys/dev/usb/usb_mbuf.c =================================================================== --- head/sys/dev/usb/usb_mbuf.c (revision 190580) +++ head/sys/dev/usb/usb_mbuf.c (revision 190581) Property changes on: head/sys/dev/usb/usb_mbuf.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_mbuf.c:r189793-190578 Index: head/sys/dev/usb/usb_mbuf.h =================================================================== --- head/sys/dev/usb/usb_mbuf.h (revision 190580) +++ head/sys/dev/usb/usb_mbuf.h (revision 190581) Property changes on: head/sys/dev/usb/usb_mbuf.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_mbuf.h:r189793-190578 Index: head/sys/dev/usb/usb_mfunc.h =================================================================== --- head/sys/dev/usb/usb_mfunc.h (revision 190580) +++ head/sys/dev/usb/usb_mfunc.h (revision 190581) Property changes on: head/sys/dev/usb/usb_mfunc.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_mfunc.h:r189793-190578 Index: head/sys/dev/usb/usb_msctest.c =================================================================== --- head/sys/dev/usb/usb_msctest.c (revision 190580) +++ head/sys/dev/usb/usb_msctest.c (revision 190581) Property changes on: head/sys/dev/usb/usb_msctest.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_msctest.c:r189793-190578 Index: head/sys/dev/usb/usb_msctest.h =================================================================== --- head/sys/dev/usb/usb_msctest.h (revision 190580) +++ head/sys/dev/usb/usb_msctest.h (revision 190581) Property changes on: head/sys/dev/usb/usb_msctest.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_msctest.h:r189793-190578 Index: head/sys/dev/usb/usb_parse.c =================================================================== --- head/sys/dev/usb/usb_parse.c (revision 190580) +++ head/sys/dev/usb/usb_parse.c (revision 190581) Property changes on: head/sys/dev/usb/usb_parse.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_parse.c:r189793-190578 Index: head/sys/dev/usb/usb_parse.h =================================================================== --- head/sys/dev/usb/usb_parse.h (revision 190580) +++ head/sys/dev/usb/usb_parse.h (revision 190581) Property changes on: head/sys/dev/usb/usb_parse.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_parse.h:r189793-190578 Index: head/sys/dev/usb/usb_pci.h =================================================================== --- head/sys/dev/usb/usb_pci.h (revision 190580) +++ head/sys/dev/usb/usb_pci.h (revision 190581) Property changes on: head/sys/dev/usb/usb_pci.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_pci.h:r189793-190578 Index: head/sys/dev/usb/usb_process.c =================================================================== --- head/sys/dev/usb/usb_process.c (revision 190580) +++ head/sys/dev/usb/usb_process.c (revision 190581) Property changes on: head/sys/dev/usb/usb_process.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_process.c:r189793-190578 Index: head/sys/dev/usb/usb_process.h =================================================================== --- head/sys/dev/usb/usb_process.h (revision 190580) +++ head/sys/dev/usb/usb_process.h (revision 190581) Property changes on: head/sys/dev/usb/usb_process.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_process.h:r189793-190578 Index: head/sys/dev/usb/usb_request.c =================================================================== --- head/sys/dev/usb/usb_request.c (revision 190580) +++ head/sys/dev/usb/usb_request.c (revision 190581) Property changes on: head/sys/dev/usb/usb_request.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_request.c:r189793-190578 Index: head/sys/dev/usb/usb_request.h =================================================================== --- head/sys/dev/usb/usb_request.h (revision 190580) +++ head/sys/dev/usb/usb_request.h (revision 190581) Property changes on: head/sys/dev/usb/usb_request.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_request.h:r189793-190578 Index: head/sys/dev/usb/usb_revision.h =================================================================== --- head/sys/dev/usb/usb_revision.h (revision 190580) +++ head/sys/dev/usb/usb_revision.h (revision 190581) Property changes on: head/sys/dev/usb/usb_revision.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_revision.h:r189793-190578 Index: head/sys/dev/usb/usb_sw_transfer.c =================================================================== --- head/sys/dev/usb/usb_sw_transfer.c (revision 190580) +++ head/sys/dev/usb/usb_sw_transfer.c (revision 190581) Property changes on: head/sys/dev/usb/usb_sw_transfer.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_sw_transfer.c:r189793-190578 Index: head/sys/dev/usb/usb_sw_transfer.h =================================================================== --- head/sys/dev/usb/usb_sw_transfer.h (revision 190580) +++ head/sys/dev/usb/usb_sw_transfer.h (revision 190581) Property changes on: head/sys/dev/usb/usb_sw_transfer.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_sw_transfer.h:r189793-190578 Index: head/sys/dev/usb/usb_transfer.c =================================================================== --- head/sys/dev/usb/usb_transfer.c (revision 190580) +++ head/sys/dev/usb/usb_transfer.c (revision 190581) Property changes on: head/sys/dev/usb/usb_transfer.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_transfer.c:r189793-190578 Index: head/sys/dev/usb/usb_transfer.h =================================================================== --- head/sys/dev/usb/usb_transfer.h (revision 190580) +++ head/sys/dev/usb/usb_transfer.h (revision 190581) Property changes on: head/sys/dev/usb/usb_transfer.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_transfer.h:r189793-190578 Index: head/sys/dev/usb/usb_util.c =================================================================== --- head/sys/dev/usb/usb_util.c (revision 190580) +++ head/sys/dev/usb/usb_util.c (revision 190581) Property changes on: head/sys/dev/usb/usb_util.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_util.c:r189793-190578 Index: head/sys/dev/usb/usb_util.h =================================================================== --- head/sys/dev/usb/usb_util.h (revision 190580) +++ head/sys/dev/usb/usb_util.h (revision 190581) Property changes on: head/sys/dev/usb/usb_util.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usb_util.h:r189793-190578 Index: head/sys/dev/usb/usbdevs =================================================================== --- head/sys/dev/usb/usbdevs (revision 190580) +++ head/sys/dev/usb/usbdevs (revision 190581) Property changes on: head/sys/dev/usb/usbdevs ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usbdevs:r189793-190578 Index: head/sys/dev/usb/usbhid.h =================================================================== --- head/sys/dev/usb/usbhid.h (revision 190580) +++ head/sys/dev/usb/usbhid.h (revision 190581) Property changes on: head/sys/dev/usb/usbhid.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/usbhid.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_rum.c =================================================================== --- head/sys/dev/usb/wlan/if_rum.c (revision 190580) +++ head/sys/dev/usb/wlan/if_rum.c (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_rum.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_rum.c:r189793-190578 Index: head/sys/dev/usb/wlan/if_rumfw.h =================================================================== --- head/sys/dev/usb/wlan/if_rumfw.h (revision 190580) +++ head/sys/dev/usb/wlan/if_rumfw.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_rumfw.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_rumfw.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_rumreg.h =================================================================== --- head/sys/dev/usb/wlan/if_rumreg.h (revision 190580) +++ head/sys/dev/usb/wlan/if_rumreg.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_rumreg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_rumreg.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_rumvar.h =================================================================== --- head/sys/dev/usb/wlan/if_rumvar.h (revision 190580) +++ head/sys/dev/usb/wlan/if_rumvar.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_rumvar.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_rumvar.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_ural.c =================================================================== --- head/sys/dev/usb/wlan/if_ural.c (revision 190580) +++ head/sys/dev/usb/wlan/if_ural.c (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_ural.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_ural.c:r189793-190578 Index: head/sys/dev/usb/wlan/if_uralreg.h =================================================================== --- head/sys/dev/usb/wlan/if_uralreg.h (revision 190580) +++ head/sys/dev/usb/wlan/if_uralreg.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_uralreg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_uralreg.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_uralvar.h =================================================================== --- head/sys/dev/usb/wlan/if_uralvar.h (revision 190580) +++ head/sys/dev/usb/wlan/if_uralvar.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_uralvar.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_uralvar.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_zyd.c =================================================================== --- head/sys/dev/usb/wlan/if_zyd.c (revision 190580) +++ head/sys/dev/usb/wlan/if_zyd.c (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_zyd.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_zyd.c:r189793-190578 Index: head/sys/dev/usb/wlan/if_zydfw.h =================================================================== --- head/sys/dev/usb/wlan/if_zydfw.h (revision 190580) +++ head/sys/dev/usb/wlan/if_zydfw.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_zydfw.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_zydfw.h:r189793-190578 Index: head/sys/dev/usb/wlan/if_zydreg.h =================================================================== --- head/sys/dev/usb/wlan/if_zydreg.h (revision 190580) +++ head/sys/dev/usb/wlan/if_zydreg.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/if_zydreg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/if_zydreg.h:r189793-190578 Index: head/sys/dev/usb/wlan/usb_wlan.h =================================================================== --- head/sys/dev/usb/wlan/usb_wlan.h (revision 190580) +++ head/sys/dev/usb/wlan/usb_wlan.h (revision 190581) Property changes on: head/sys/dev/usb/wlan/usb_wlan.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/dev/usb/wlan/usb_wlan.h:r189793-190578 Index: head/sys/dev/xen/netfront =================================================================== --- head/sys/dev/xen/netfront (revision 190580) +++ head/sys/dev/xen/netfront (revision 190581) Property changes on: head/sys/dev/xen/netfront ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,2 ## Merged /head/sys/dev/xen/netfront:r6-167514,167516-167523,167530-167537,167539-167559,167562-167565,167567-167654,167656-167733,167735-167745,167747-167750,167752-167759,167761,167763-167768,167770-167839,167841-167846,167849-167861,167863-168350,168352-168489,168493-168495,168497-168498,168500-168504,168506-168538,168541-168619,168621-168641,168643,168645,168647-168649,168651-168735,168738-168747,168751-168759,168761-168766,168768-168769,168771-168885,168887,168889,168891-169051,169054-169977,169979-169987,169989,169991-169993,169995-170006,170009-170036,170039-170075,170077-170080,170082,170084-170196,170198-170653,170655-170788,170790-170868,170870-171334,171336-171468,171470,171472-171802,171805-171867,171869-171977,171979-172095,172097-172099,172102-172104,172106-172108,172110-172146,172148-172567,172569-172587,172589-172612,172616-172733,172735-172737,172740-172856,172858-172918,172920-172939,172941-172994,172996-173080,173082-173154,173156-173214,173216-173248,173250-173335,173337-173441,173443-173467,173469-173591,173593-173741,173743-173900,173902-173917,173919-173927,173929-173969,173971-174029,174031-174050,174052-174053,174055,174057,174059-174103,174105-174140,174142-174149,174151-174175,174177-174182,174187-174192,174195-174239,174241-174266,174268-174325,174327-174436,174438-174451,174453-174455,174457-174464,174466-174498,174500-174509,174511-174543,174545-174595,174597,174599-174642,174645-174653,174655-174699,174701-174707,174709-174755,174757,174759-174776,174778,174782-174881,174883-175018,175022-175052,175055-175057,175059-175104,175106-175119,175121-175161,175163-175300,175302-175327,175330-175378,175381-175416,175418-175465,175467-175621,175623-175665,175667-175762,175764-175869,175871-175896,175898-175902,175904-176040,176042-176202,176204-176257,176259,176261-176263,176266-176425,176427-176447,176449-176470,176473-176525,176527-176571,176573-176576,176578-176595,176597-176612,176614-176622,176624-176649,176651-176671,176673-176717,176719-176723,176725-176728,176731-176743,176746-176749,176751-176754,176756-176758,176760-176796,176798-176810,176812-176820,176822-176858,176860-176879,176881-176905,176907-176934,176936-176951,176953-176995,176997-177040,177042-177102,177106-177134,177136-177180,177182-177252,177254,177256,177258-177271,177273-177275,177277-177303,177305-177368,177370-177372,177374-177415,177417-177430,177432-177456,177458,177460-177466,177468-177488,177490-177504,177506-177508,177511,177513-177534,177536-177596,177598-177603,177605-177611,177613-177620,177622-177661,177663-177680,177682-177684,177686-177691,177693-177712,177714-177737,177739-177807,177809-177842,177844-177861,177863-177873,177875-177880,177882,177884-177885,177890-177898,177900-177903,177905-177915,177917-177942,177945-177984,177986-178000,178002-178009,178011-178026,178028-178032,178034-178056,178058-178111,178113-178131,178133-178146,178148-178150,178152,178154,178156-178179,178181-178240,178242,178244-178246,178248-178249,178251-178279,178281-178284,178286-178301,178303,178305-178317,178323,178326-178375,178379-178391,178393-178418,178420-178443,178445-178460,178462-178491,178493-178598,178601-178766,178768-178785,178787-178794,178797-178799,178801-178803,178805-178813,178815-178852,178854-178919,178921-178967,178969-178977,178979-179008,179010-179098,179100,179102-179140,179142-179156,179158,179160-179163,179165-179173,179176-179179,179181-179195,179197-179204,179206-179241,179244-179267,179269-179288,179290-179295,179297-179307,179309-179311,179314-179335,179337,179339-179374,179376-179381,179383-179391,179393-179407,179411,179413,179415-179422,179424,179426-179435,179437-179444,179446-179466,179468-179473,179475-179486,179489,179491-179509,179511-179516,179518-179622,179624-179630,179632-179633,179635-179636,179638-179639,179641-179643,179647-179652,179654,179656-179663,179666-179669,179671-179692,179694,179696-179704,179706-179714,179717-179719,179721,179723-179744,179746,179749,179753-179754,179757-179762,179764,179766-179770,179772-179780,179782,179784-179785,179788-179802,179804-179805,179807,179809-179830,179834-179852,179854-179859,179861-179878,179880,179882-179893,179897-179924,179926-179966,179970,179972-179976,179979-180009,180011-180024,180026-180031,180033-180036,180039-180041,180043-180061,180063,180065-180068,180070-180071,180074-180076,180078-180089,180091-180097,180099-180109,180111-180126,180128-180130,180133-180138,180140-180144,180146-180151,180154-180165,180170,180179-180197,180199-180210,180212-180214,180216,180218-180219,180221-180232,180234-180248,180250-180251,180254-180297,180300-180303,180308-180311,180314-180325,180327-180335,180339,180341-180342,180345,180347,180349-180351,180353-180355,180359-180364,180366-180367,180369-180370,180372-180373,180375,180378-180381,180388,180393-180421,180423-180424,180426,180430-180432,180434-180436,180438-180444,180448-180452,180454-180483,180485,180487-180494,180496-180502,180504-180512,180514,180516-180531,180533-180535,180537-180550,180553-180557,180559-180566,180568-180569,180571-180579,180581,180585,180587-180588,180590-180606,180608-180609,180611,180613-180615,180617-180628,180630-180632,180634-180638,180640-180643,180645-180646,180648,180652-180663,180665-180667,180669-180672,180674,180676-180685,180687-180691,180693-180698,180700,180702,180705,180707,180710,180713-180714,180717-180734,180736-180737,180739-180742,180744-180752,180755,180757,180759,180761-180778,180782-180790,180792-180798,180800-180839,180841-180868,180870-180878,180880-180922,180924-180936,180938-180945,180947-180949,180951,180953,180958-180964,180966-180967,180969-180980,180982-180989,180991,180993-180999,181001,181003-181006,181008-181015,181017,181019,181021-181023,181025-181039,181041-181052,181055-181068,181070-181088,181090-181092,181094-181125,181127-181128,181130-181131,181133-181138,181140-181162,181164-181234,181236-181253,181255-181269,181276-181285,181287-181294,181296,181298-181299,181302-181329,181331-181332,181335,181338-181344,181346,181348-181363,181366-181398,181400-181431,181434-181435,181437-181463,181465-181466,181468-181527,181529-181555,181558-181592,181594-181602,181605,181607-181616,181620-181626,181628-181634,181636-181642 Merged /user/mav/ata/sys/dev/xen/netfront:r189793-190578 Index: head/sys/dev/xen/xenpci =================================================================== --- head/sys/dev/xen/xenpci (revision 190580) +++ head/sys/dev/xen/xenpci (revision 190581) Property changes on: head/sys/dev/xen/xenpci ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,2 ## Merged /user/mav/ata/sys/dev/xen/xenpci:r189793-190578 Merged /head/sys/dev/xen/xenpci:r6-153879,153881-155085,155087-155956,155958-157623,157625-158736,158738-159573,159575-159761,159763-159801,159803-159805,159807-159809,159813-160051,160053-162098,162100-162117,162119-162121,162123-162457,162459-162472,162474-162618,162620-162686,162689-163245,163247-163397,163400-164280,164282-164374,164376-165224,165226-165726,165728-165851,165853,165855-166066,166068-166180,166182-166900,166902-169151,169153-169450,169452-169561,169563-169608,169610,169612-169795,169797-169875,169877-170272,170274-170283,170285-170404,170406-170477,170479-170801,170803-170871,170873-171052,171054-171820,171823-171979,171981-172024,172026-172333,172335-172606,172608-172824,172826-172918,172920-172997,172999-173080,173082-173467,173469-173591,173593-173803,173805-174384,174386-174509,174511-174755,174757-174986,174988-175004,175006-175018,175022-175052,175054-175161,175163-175327,175330-175416,175418-175465,175467-176430,176432-176525,176527-176595,176597-176995,176997-177103,177105-177227,177229-177273,177275-177288,177290-177295,177297-177461,177463-177559,177561-177566,177568-177618,177620-177634,177636-177661,177663-177684,177686-177694,177696-177861,177863-177898,177900-178032,178034-178111,178113-178240,178242-178279,178281-178588,178590-178666,178668-178718,178720-178813,178815-178919,178921-178995,178997-179056,179058-179158,179160-179173,179175-179295,179297-179334,179339-179342,179344-179346,179348-179424,179426-179444,179446-179487,179489-179509,179511-179630,179632-179636,179638-179654,179656-179704,179706-179715,179717-179764,179766-179830,179832-179878,179880-179924,179926-179968,179970,179972-180036,180039-180072,180074-180076,180078-180144,180146-180151,180154-180219,180221-180251,180254-180297,180300-180373,180375-180381,180385-180436,180438-180446,180448-180502,180504-180514,180516-180566,180568-180581,180583-180611,180613-180667,180669-180752,180754-180868,180870-180945,180947-180949,180951,180953,180955-180980,180982-180999,181001,181003-181006,181008-181015,181017,181019,181021-181023,181025-181088,181090-181092,181094-181128,181130-181131,181133-181332,181334-181335,181337-181398,181400-181432,181434-181435,181437-181555,181558-181602,181604-181605,181607-181616,181620-181700,181702-181823,181825-181933,181935-181952,181954-181971,181973-181975,181977-181991,181993-182002,182004-182019,182021-182045,182047-182054,182056-182059,182061,182063-182065,182067-182069,182071-182077,182079-182107,182109,182112-182114,182116-182118,182120-182121,182123-182160,182162-182320,182322-182379,182381-182390,182392-182400,182402-182460,182462-182487,182489-182599,182601-182687,182689-182712,182714-182884,182886,182889-182912,182914-182935,182937-183077,183079-183134,183136-183235,183237-183263,183265-183627,183629-189698 Index: head/sys/legacy/dev/ata/ata-usb.c =================================================================== --- head/sys/legacy/dev/ata/ata-usb.c (revision 190580) +++ head/sys/legacy/dev/ata/ata-usb.c (revision 190581) Property changes on: head/sys/legacy/dev/ata/ata-usb.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/ata/ata-usb.c:r189793-190578 Index: head/sys/legacy/dev/sound/usb/uaudio.c =================================================================== --- head/sys/legacy/dev/sound/usb/uaudio.c (revision 190580) +++ head/sys/legacy/dev/sound/usb/uaudio.c (revision 190581) Property changes on: head/sys/legacy/dev/sound/usb/uaudio.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/sound/usb/uaudio.c:r189793-190578 Index: head/sys/legacy/dev/sound/usb/uaudio.h =================================================================== --- head/sys/legacy/dev/sound/usb/uaudio.h (revision 190580) +++ head/sys/legacy/dev/sound/usb/uaudio.h (revision 190581) Property changes on: head/sys/legacy/dev/sound/usb/uaudio.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/sound/usb/uaudio.h:r189793-190578 Index: head/sys/legacy/dev/sound/usb/uaudio_pcm.c =================================================================== --- head/sys/legacy/dev/sound/usb/uaudio_pcm.c (revision 190580) +++ head/sys/legacy/dev/sound/usb/uaudio_pcm.c (revision 190581) Property changes on: head/sys/legacy/dev/sound/usb/uaudio_pcm.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/sound/usb/uaudio_pcm.c:r189793-190578 Index: head/sys/legacy/dev/sound/usb/uaudioreg.h =================================================================== --- head/sys/legacy/dev/sound/usb/uaudioreg.h (revision 190580) +++ head/sys/legacy/dev/sound/usb/uaudioreg.h (revision 190581) Property changes on: head/sys/legacy/dev/sound/usb/uaudioreg.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/sound/usb/uaudioreg.h:r189793-190578 Index: head/sys/legacy/dev/usb/ehci_ixp4xx.c =================================================================== --- head/sys/legacy/dev/usb/ehci_ixp4xx.c (revision 190580) +++ head/sys/legacy/dev/usb/ehci_ixp4xx.c (revision 190581) Property changes on: head/sys/legacy/dev/usb/ehci_ixp4xx.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/usb/ehci_ixp4xx.c:r189793-190578 Index: head/sys/legacy/dev/usb =================================================================== --- head/sys/legacy/dev/usb (revision 190580) +++ head/sys/legacy/dev/usb (revision 190581) Property changes on: head/sys/legacy/dev/usb ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/legacy/dev/usb:r189793-190578 Index: head/sys/mips/mips/elf64_machdep.c =================================================================== --- head/sys/mips/mips/elf64_machdep.c (revision 190580) +++ head/sys/mips/mips/elf64_machdep.c (revision 190581) Property changes on: head/sys/mips/mips/elf64_machdep.c ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/mips/mips/elf64_machdep.c:r189793-190578 Index: head/sys/modules/dtrace/dtnfsclient =================================================================== --- head/sys/modules/dtrace/dtnfsclient (revision 190580) +++ head/sys/modules/dtrace/dtnfsclient (revision 190581) Property changes on: head/sys/modules/dtrace/dtnfsclient ___________________________________________________________________ Added: svn:mergeinfo ## -0,0 +0,0 ## Index: head/sys/modules/ip6_mroute_mod =================================================================== --- head/sys/modules/ip6_mroute_mod (revision 190580) +++ head/sys/modules/ip6_mroute_mod (revision 190581) Property changes on: head/sys/modules/ip6_mroute_mod ___________________________________________________________________ Added: svn:mergeinfo ## -0,0 +0,0 ## Index: head/sys/modules/ipmi/ipmi_linux =================================================================== --- head/sys/modules/ipmi/ipmi_linux (revision 190580) +++ head/sys/modules/ipmi/ipmi_linux (revision 190581) Property changes on: head/sys/modules/ipmi/ipmi_linux ___________________________________________________________________ Added: svn:mergeinfo ## -0,0 +0,0 ## Index: head/sys/xen/evtchn.h =================================================================== --- head/sys/xen/evtchn.h (revision 190580) +++ head/sys/xen/evtchn.h (revision 190581) Property changes on: head/sys/xen/evtchn.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/xen/evtchn.h:r189793-190578 Index: head/sys/xen/hypervisor.h =================================================================== --- head/sys/xen/hypervisor.h (revision 190580) +++ head/sys/xen/hypervisor.h (revision 190581) Property changes on: head/sys/xen/hypervisor.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/xen/hypervisor.h:r189793-190578 Index: head/sys/xen/xen_intr.h =================================================================== --- head/sys/xen/xen_intr.h (revision 190580) +++ head/sys/xen/xen_intr.h (revision 190581) Property changes on: head/sys/xen/xen_intr.h ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys/xen/xen_intr.h:r189793-190578 Index: head/sys =================================================================== --- head/sys (revision 190580) +++ head/sys (revision 190581) Property changes on: head/sys ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /user/mav/ata/sys:r189793-190578