Index: stable/7/sys/contrib/pf =================================================================== --- stable/7/sys/contrib/pf (revision 190286) +++ stable/7/sys/contrib/pf (revision 190287) Property changes on: stable/7/sys/contrib/pf ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head/sys/contrib/pf:r190101 Index: stable/7/sys/dev/ath/ath_hal =================================================================== --- stable/7/sys/dev/ath/ath_hal (revision 190286) +++ stable/7/sys/dev/ath/ath_hal (revision 190287) Property changes on: stable/7/sys/dev/ath/ath_hal ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head/sys/dev/ath/ath_hal:r190101 Index: stable/7/sys/dev/cxgb =================================================================== --- stable/7/sys/dev/cxgb (revision 190286) +++ stable/7/sys/dev/cxgb (revision 190287) Property changes on: stable/7/sys/dev/cxgb ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head/sys/dev/cxgb:r190101 Index: stable/7/sys/sparc64/pci/ofw_pcibus.c =================================================================== --- stable/7/sys/sparc64/pci/ofw_pcibus.c (revision 190286) +++ stable/7/sys/sparc64/pci/ofw_pcibus.c (revision 190287) @@ -1,308 +1,308 @@ /*- * Copyright (c) 1997, Stefan Esser * Copyright (c) 2000, Michael Smith * Copyright (c) 2000, BSDi * Copyright (c) 2003, Thomas Moestl * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ofw_pci.h" #include #include #include #include #include #include #include #include #include #include #include #ifndef SUN4V #include #include #endif #include #include #include #include #include #include "pcib_if.h" #include "pci_if.h" /* Helper functions */ static void ofw_pcibus_setup_device(device_t bridge, uint32_t clock, u_int busno, u_int slot, u_int func); /* Methods */ static device_probe_t ofw_pcibus_probe; static device_attach_t ofw_pcibus_attach; static pci_assign_interrupt_t ofw_pcibus_assign_interrupt; static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo; static device_method_t ofw_pcibus_methods[] = { /* Device interface */ DEVMETHOD(device_probe, ofw_pcibus_probe), DEVMETHOD(device_attach, ofw_pcibus_attach), /* Bus interface */ /* PCI interface */ DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt), /* ofw_bus interface */ DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo), DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - { 0, 0 } + KOBJMETHOD_END }; struct ofw_pcibus_devinfo { struct pci_devinfo opd_dinfo; struct ofw_bus_devinfo opd_obdinfo; }; static devclass_t pci_devclass; DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, 1 /* no softc */, pci_driver); DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0); MODULE_VERSION(ofw_pcibus, 1); MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1); static int ofw_pcibus_probe(device_t dev) { if (ofw_bus_get_node(dev) == 0) return (ENXIO); device_set_desc(dev, "OFW PCI bus"); return (0); } /* * Perform miscellaneous setups the firmware usually does not do for us. */ static void ofw_pcibus_setup_device(device_t bridge, uint32_t clock, u_int busno, u_int slot, u_int func) { #ifndef SUN4V uint32_t reg; /* * Initialize the latency timer register for busmaster devices to * work properly. This is another task which the firmware doesn't * always perform. The Min_Gnt register can be used to compute its * recommended value: it contains the desired latency in units of * 1/4 us assuming a clock rate of 33MHz. To calculate the correct * latency timer value, the clock frequency of the bus (defaulting * to 33MHz) should be used and no wait states assumed. * For bridges, we additionally set up the bridge control and the * secondary latency registers. */ if ((PCIB_READ_CONFIG(bridge, busno, slot, func, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) == PCIM_HDRTYPE_BRIDGE) { reg = PCIB_READ_CONFIG(bridge, busno, slot, func, PCIR_BRIDGECTL_1, 1); #if 0 reg |= PCIB_BCR_MASTER_ABORT_MODE | PCIB_BCR_SERR_ENABLE | #else reg |= PCIB_BCR_SERR_ENABLE | #endif PCIB_BCR_PERR_ENABLE; #ifdef OFW_PCI_DEBUG device_printf(bridge, "bridge %d/%d/%d: control 0x%x -> 0x%x\n", busno, slot, func, PCIB_READ_CONFIG(bridge, busno, slot, func, PCIR_BRIDGECTL_1, 1), reg); #endif /* OFW_PCI_DEBUG */ PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_BRIDGECTL_1, reg, 1); reg = OFW_PCI_LATENCY; #ifdef OFW_PCI_DEBUG device_printf(bridge, "bridge %d/%d/%d: latency timer %d -> %d\n", busno, slot, func, PCIB_READ_CONFIG(bridge, busno, slot, func, PCIR_SECLAT_1, 1), reg); #endif /* OFW_PCI_DEBUG */ PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_SECLAT_1, reg, 1); } else { reg = PCIB_READ_CONFIG(bridge, busno, slot, func, PCIR_MINGNT, 1); if (reg != 0) { switch (clock) { case 33000000: reg *= 8; break; case 66000000: reg *= 4; break; } reg = min(reg, 255); } else reg = OFW_PCI_LATENCY; } #ifdef OFW_PCI_DEBUG device_printf(bridge, "device %d/%d/%d: latency timer %d -> %d\n", busno, slot, func, PCIB_READ_CONFIG(bridge, busno, slot, func, PCIR_LATTIMER, 1), reg); #endif /* OFW_PCI_DEBUG */ PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_LATTIMER, reg, 1); /* * Compute a value to write into the cache line size register. * The role of the streaming cache is unclear in write invalidate * transfers, so it is made sure that it's line size is always * reached. Generally, the cache line size is fixed at 64 bytes * by Fireplane/Safari, JBus and UPA. */ PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_CACHELNSZ, STRBUF_LINESZ / sizeof(uint32_t), 1); #endif /* * The preset in the intline register is usually wrong. Reset * it to 255, so that the PCI code will reroute the interrupt if * needed. */ PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_INTLINE, PCI_INVALID_IRQ, 1); } static int ofw_pcibus_attach(device_t dev) { device_t pcib; struct ofw_pci_register pcir; struct ofw_pcibus_devinfo *dinfo; phandle_t node, child; uint32_t clock; u_int busno, domain, func, slot; pcib = device_get_parent(dev); domain = pcib_get_domain(dev); busno = pcib_get_bus(dev); if (bootverbose) device_printf(dev, "domain=%d, physical bus=%d\n", domain, busno); node = ofw_bus_get_node(dev); #ifndef SUN4V /* Add the PCI side of the HOST-PCI bridge itself to the bus. */ if (strcmp(device_get_name(device_get_parent(pcib)), "nexus") == 0 && (dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, domain, busno, 0, 0, sizeof(*dinfo))) != NULL) { if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, node) != 0) pci_freecfg((struct pci_devinfo *)dinfo); else pci_add_child(dev, (struct pci_devinfo *)dinfo); } #endif if (OF_getprop(ofw_bus_get_node(pcib), "clock-frequency", &clock, sizeof(clock)) == -1) clock = 33000000; for (child = OF_child(node); child != 0; child = OF_peer(child)) { if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1) continue; slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); /* Some OFW device trees contain dupes. */ if (pci_find_dbsf(domain, busno, slot, func) != NULL) continue; ofw_pcibus_setup_device(pcib, clock, busno, slot, func); dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, domain, busno, slot, func, sizeof(*dinfo)); if (dinfo == NULL) continue; if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) != 0) { pci_freecfg((struct pci_devinfo *)dinfo); continue; } pci_add_child(dev, (struct pci_devinfo *)dinfo); } return (bus_generic_attach(dev)); } static int ofw_pcibus_assign_interrupt(device_t dev, device_t child) { ofw_pci_intr_t intr; int isz; isz = OF_getprop(ofw_bus_get_node(child), "interrupts", &intr, sizeof(intr)); if (isz != sizeof(intr)) { /* No property; our best guess is the intpin. */ intr = pci_get_intpin(child); #ifndef SUN4V } else if (intr >= 255) { /* * A fully specified interrupt (including IGN), as present on * SPARCengine Ultra AX and E450. Extract the INO and return * it. */ return (INTINO(intr)); #endif } /* * If we got intr from a property, it may or may not be an intpin. * For on-board devices, it frequently is not, and is completely out * of the valid intpin range. For PCI slots, it hopefully is, * otherwise we will have trouble interfacing with non-OFW buses * such as cardbus. * Since we cannot tell which it is without violating layering, we * will always use the route_interrupt method, and treat exceptions * on the level they become apparent. */ return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr)); } static const struct ofw_bus_devinfo * ofw_pcibus_get_devinfo(device_t bus, device_t dev) { struct ofw_pcibus_devinfo *dinfo; dinfo = device_get_ivars(dev); return (&dinfo->opd_obdinfo); } Index: stable/7/sys/sparc64/sparc64/eeprom.c =================================================================== --- stable/7/sys/sparc64/sparc64/eeprom.c (revision 190286) +++ stable/7/sys/sparc64/sparc64/eeprom.c (revision 190287) @@ -1,188 +1,188 @@ /*- * Copyright (c) 1992, 1993 * The Regents of the University of California. All rights reserved. * Copyright (c) 1994 Gordon W. Ross * Copyright (c) 1993 Adam Glass * Copyright (c) 1996 Paul Kranenburg * Copyright (c) 1996 * The President and Fellows of Harvard College. All rights reserved. * * This software was developed by the Computer Systems Engineering group * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and * contributed to Berkeley. * * All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Harvard University. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Paul Kranenburg. * This product includes software developed by Harvard University. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * from: @(#)clock.c 8.1 (Berkeley) 6/11/93 * from: NetBSD: clock.c,v 1.41 2001/07/24 19:29:25 eeh Exp */ #include __FBSDID("$FreeBSD$"); /* * clock (eeprom) attaches at EBus, FireHose or SBus */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "clock_if.h" static devclass_t eeprom_devclass; static device_probe_t eeprom_probe; static device_attach_t eeprom_attach; static device_method_t eeprom_methods[] = { /* Device interface */ DEVMETHOD(device_probe, eeprom_probe), DEVMETHOD(device_attach, eeprom_attach), /* clock interface */ DEVMETHOD(clock_gettime, mk48txx_gettime), DEVMETHOD(clock_settime, mk48txx_settime), - { 0, 0 } + KOBJMETHOD_END }; static driver_t eeprom_driver = { "eeprom", eeprom_methods, sizeof(struct mk48txx_softc), }; DRIVER_MODULE(eeprom, ebus, eeprom_driver, eeprom_devclass, 0, 0); DRIVER_MODULE(eeprom, fhc, eeprom_driver, eeprom_devclass, 0, 0); DRIVER_MODULE(eeprom, sbus, eeprom_driver, eeprom_devclass, 0, 0); static int eeprom_probe(device_t dev) { if (strcmp("eeprom", ofw_bus_get_name(dev)) == 0) { device_set_desc(dev, "EEPROM/clock"); return (0); } return (ENXIO); } static int eeprom_attach(device_t dev) { struct mk48txx_softc *sc; struct resource *res; struct timespec ts; int error, rid; sc = device_get_softc(dev); mtx_init(&sc->sc_mtx, "eeprom_mtx", NULL, MTX_DEF); rid = 0; res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (res == NULL) { device_printf(dev, "cannot allocate resources\n"); error = ENXIO; goto fail_mtx; } sc->sc_bst = rman_get_bustag(res); sc->sc_bsh = rman_get_bushandle(res); if ((sc->sc_model = ofw_bus_get_model(dev)) == NULL) { device_printf(dev, "cannot determine model\n"); error = ENXIO; goto fail_res; } /* Our TOD clock year 0 is 1968. */ sc->sc_year0 = 1968; /* Use default register read/write functions. */ sc->sc_flag = 0; /* * Generally, if the `eeprom' node has a `watchdog-enable' property * this indicates that the watchdog part of the MK48T59 is usable, * i.e. its RST pin is connected to the WDR input of the CPUs or * something. The `eeprom' nodes of E250, E450 and the clock board * variant in Exx00 have such properties. For E250 and E450 the * watchdog just works, for Exx00 the delivery of the reset signal * apparently has to be additionally enabled elsewhere... * The OFW environment variable `watchdog-reboot?' is ignored for * these watchdogs as they always trigger a system reset when they * time out and can't be made to issue a break to the boot monitor * instead. */ if (OF_getproplen(ofw_bus_get_node(dev), "watchdog-enable") != -1 && (strcmp(sparc64_model, "SUNW,Ultra-250") == 0 || strcmp(sparc64_model, "SUNW,Ultra-4") == 0)) sc->sc_flag |= MK48TXX_WDOG_REGISTER | MK48TXX_WDOG_ENABLE_WDS; if ((error = mk48txx_attach(dev)) != 0) { device_printf(dev, "cannot attach time of day clock\n"); goto fail_res; } if (bootverbose) { if (mk48txx_gettime(dev, &ts) != 0) device_printf(dev, "invalid time"); else device_printf(dev, "current time: %ld.%09ld\n", (long)ts.tv_sec, ts.tv_nsec); } return (0); fail_res: bus_release_resource(dev, SYS_RES_MEMORY, rid, res); fail_mtx: mtx_destroy(&sc->sc_mtx); return (error); } Index: stable/7/sys/sparc64/sparc64/rtc.c =================================================================== --- stable/7/sys/sparc64/sparc64/rtc.c (revision 190286) +++ stable/7/sys/sparc64/sparc64/rtc.c (revision 190287) @@ -1,247 +1,247 @@ /*- * Copyright (c) 2004 Marius Strobl * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * The `rtc' device is a MC146818 compatible clock found on the ISA * bus and EBus. The EBus variant actually is the Real-Time Clock * function of a National Semiconductor PC87317/PC97317 which also * provides Advanced Power Control functionality. */ #include "opt_isa.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "clock_if.h" #define RTC_DESC "Real-Time Clock" #define RTC_READ mc146818_def_read #define RTC_WRITE mc146818_def_write #define PC87317_COMMON MC_REGA_DV0 /* bank 0 */ #define PC87317_RTC (MC_REGA_DV1 | MC_REGA_DV0) /* bank 1 */ #define PC87317_RTC_CR 0x48 /* Century Register */ #define PC87317_APC MC_REGA_DV2 /* bank 2 */ #define PC87317_APC_CADDR 0x51 /* Century Address Register */ #define PC87317_APC_CADDR_BANK0 0x00 /* locate CR in bank 0 */ #define PC87317_APC_CADDR_BANK1 0x80 /* locate CR in bank 1 */ static devclass_t rtc_devclass; static device_attach_t rtc_attach; static device_probe_t rtc_ebus_probe; #ifdef DEV_ISA static device_probe_t rtc_isa_probe; #endif static device_method_t rtc_ebus_methods[] = { /* Device interface */ DEVMETHOD(device_probe, rtc_ebus_probe), DEVMETHOD(device_attach, rtc_attach), /* clock interface */ DEVMETHOD(clock_gettime, mc146818_gettime), DEVMETHOD(clock_settime, mc146818_settime), - { 0, 0 } + KOBJMETHOD_END }; static driver_t rtc_ebus_driver = { "rtc", rtc_ebus_methods, sizeof(struct mc146818_softc), }; DRIVER_MODULE(rtc, ebus, rtc_ebus_driver, rtc_devclass, 0, 0); #ifdef DEV_ISA static device_method_t rtc_isa_methods[] = { /* Device interface */ DEVMETHOD(device_probe, rtc_isa_probe), DEVMETHOD(device_attach, rtc_attach), /* clock interface */ DEVMETHOD(clock_gettime, mc146818_gettime), DEVMETHOD(clock_settime, mc146818_settime), { 0, 0 } }; static driver_t rtc_isa_driver = { "rtc", rtc_isa_methods, sizeof(struct mc146818_softc), }; DRIVER_MODULE(rtc, isa, rtc_isa_driver, rtc_devclass, 0, 0); #endif static u_int pc87317_getcent(device_t); static void pc87317_setcent(device_t, u_int); static int rtc_ebus_probe(device_t dev) { if (strcmp(ofw_bus_get_name(dev), "rtc") == 0) { device_set_desc(dev, RTC_DESC); return (0); } return (ENXIO); } #ifdef DEV_ISA static struct isa_pnp_id rtc_isa_ids[] = { { 0x000bd041, RTC_DESC }, /* PNP0B00 */ { 0 } }; static int rtc_isa_probe(device_t dev) { if (ISA_PNP_PROBE(device_get_parent(dev), dev, rtc_isa_ids) == 0) return (0); return (ENXIO); } #endif static int rtc_attach(device_t dev) { struct timespec ts; struct mc146818_softc *sc; struct resource *res; int ebus, error, rid; sc = device_get_softc(dev); mtx_init(&sc->sc_mtx, "rtc_mtx", NULL, MTX_SPIN); ebus = 0; if (strcmp(device_get_name(device_get_parent(dev)), "ebus") == 0) ebus = 1; rid = 0; res = bus_alloc_resource_any(dev, ebus ? SYS_RES_MEMORY : SYS_RES_IOPORT, &rid, RF_ACTIVE); if (res == NULL) { device_printf(dev, "cannot allocate resources\n"); error = ENXIO; goto fail_mtx; } sc->sc_bst = rman_get_bustag(res); sc->sc_bsh = rman_get_bushandle(res); sc->sc_mcread = RTC_READ; sc->sc_mcwrite = RTC_WRITE; /* The TOD clock year 0 is 0. */ sc->sc_year0 = 0; /* * For ISA use the default century get/set functions, for EBus we * provide our own versions. */ sc->sc_flag = MC146818_NO_CENT_ADJUST; if (ebus) { /* * Make sure the CR is at the default location (also used * by Solaris). */ RTC_WRITE(dev, MC_REGA, PC87317_APC); RTC_WRITE(dev, PC87317_APC_CADDR, PC87317_APC_CADDR_BANK1 | PC87317_RTC_CR); RTC_WRITE(dev, MC_REGA, PC87317_COMMON); sc->sc_getcent = pc87317_getcent; sc->sc_setcent = pc87317_setcent; } if ((error = mc146818_attach(dev)) != 0) { device_printf(dev, "cannot attach time of day clock\n"); goto fail_res; } if (bootverbose) { if (mc146818_gettime(dev, &ts) != 0) device_printf(dev, "invalid time"); else device_printf(dev, "current time: %ld.%09ld\n", (long)ts.tv_sec, ts.tv_nsec); } return (0); fail_res: bus_release_resource(dev, ebus ? SYS_RES_MEMORY : SYS_RES_IOPORT, rid, res); fail_mtx: mtx_destroy(&sc->sc_mtx); return (error); } static u_int pc87317_getcent(device_t dev) { u_int cent; RTC_WRITE(dev, MC_REGA, PC87317_RTC); cent = RTC_READ(dev, PC87317_RTC_CR); RTC_WRITE(dev, MC_REGA, PC87317_COMMON); return (cent); } static void pc87317_setcent(device_t dev, u_int cent) { RTC_WRITE(dev, MC_REGA, PC87317_RTC); RTC_WRITE(dev, PC87317_RTC_CR, cent); RTC_WRITE(dev, MC_REGA, PC87317_COMMON); } Index: stable/7/sys/sparc64/sparc64/sc_machdep.c =================================================================== --- stable/7/sys/sparc64/sparc64/sc_machdep.c (revision 190286) +++ stable/7/sys/sparc64/sparc64/sc_machdep.c (revision 190287) @@ -1,151 +1,151 @@ /*- * Copyright (c) 2003 Jake Burkholder. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #define SC_MD_MAX 8 #define SC_MD_FLAGS SC_AUTODETECT_KBD static sc_softc_t sc_softcs[SC_MD_MAX]; static device_identify_t sc_identify; static device_probe_t sc_probe; static device_attach_t sc_attach; static device_method_t sc_methods[] = { /* Device interface */ DEVMETHOD(device_identify, sc_identify), DEVMETHOD(device_probe, sc_probe), DEVMETHOD(device_attach, sc_attach), - { 0, 0 } + KOBJMETHOD_END }; static driver_t sc_driver = { SC_DRIVER_NAME, sc_methods, 1, /* no softc */ }; static devclass_t sc_devclass; DRIVER_MODULE(sc, nexus, sc_driver, sc_devclass, 0, 0); static void sc_identify(driver_t *driver, device_t parent) { /* * Add with a priority guaranteed to make it last on * the device list. */ BUS_ADD_CHILD(parent, INT_MAX, SC_DRIVER_NAME, 0); } static int sc_probe(device_t dev) { int unit; unit = device_get_unit(dev); if (strcmp(ofw_bus_get_name(dev), SC_DRIVER_NAME) != 0 || unit >= SC_MD_MAX) return (ENXIO); device_set_desc(dev, "System console"); return (sc_probe_unit(unit, device_get_flags(dev) | SC_MD_FLAGS)); } static int sc_attach(device_t dev) { return (sc_attach_unit(device_get_unit(dev), device_get_flags(dev) | SC_MD_FLAGS)); } int sc_get_cons_priority(int *unit, int *flags) { *unit = 0; *flags = 0; return (CN_INTERNAL); } int sc_max_unit(void) { return (devclass_get_maxunit(sc_devclass)); } sc_softc_t * sc_get_softc(int unit, int flags) { sc_softc_t *sc; if (unit < 0 || unit >= SC_MD_MAX) return (NULL); sc = &sc_softcs[unit]; sc->unit = unit; if ((sc->flags & SC_INIT_DONE) == 0) { sc->keyboard = -1; sc->adapter = -1; sc->cursor_char = SC_CURSOR_CHAR; sc->mouse_char = SC_MOUSE_CHAR; } return (sc); } void sc_get_bios_values(bios_values_t *values) { } int sc_tone(int hz) { return (0); } Index: stable/7/sys =================================================================== --- stable/7/sys (revision 190286) +++ stable/7/sys (revision 190287) Property changes on: stable/7/sys ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head/sys:r190101