Index: head/share/man/man4/Makefile =================================================================== --- head/share/man/man4/Makefile (revision 159570) +++ head/share/man/man4/Makefile (revision 159571) @@ -1,518 +1,519 @@ # @(#)Makefile 8.1 (Berkeley) 6/18/93 # $FreeBSD$ MAN= aac.4 \ acpi.4 \ ${_acpi_dock.4} \ acpi_thermal.4 \ acpi_video.4 \ adv.4 \ adw.4 \ agp.4 \ aha.4 \ ahb.4 \ ahc.4 \ ahd.4 \ aio.4 \ altq.4 \ amd.4 \ ${_amdsmb.4} \ amr.4 \ an.4 \ arcmsr.4 \ asr.4 \ ata.4 \ atapicam.4 \ ataraid.4 \ ath.4 \ ath_hal.4 \ atkbd.4 \ atkbdc.4 \ audit.4 \ auditpipe.4 \ aue.4 \ awi.4 \ axe.4 \ bce.4 \ bfe.4 \ bge.4 \ bktr.4 \ blackhole.4 \ bpf.4 \ bt.4 \ cardbus.4 \ carp.4 \ ccd.4 \ cd.4 \ cdce.4 \ ch.4 \ ciss.4 \ cm.4 \ cnw.4 \ cpufreq.4 \ crypto.4 \ cue.4 \ cy.4 \ da.4 \ dc.4 \ dcons.4 \ dcons_crom.4 \ ddb.4 \ de.4 \ devctl.4 \ digi.4 \ disc.4 \ divert.4 \ dpt.4 \ dummynet.4 \ ed.4 \ ef.4 \ ehci.4 \ em.4 \ en.4 \ esp.4 \ exca.4 \ faith.4 \ fast_ipsec.4 \ fatm.4 \ fd.4 \ fdc.4 \ firewire.4 \ fla.4 \ fpa.4 \ fwe.4 \ fwip.4 \ fwohci.4 \ fxp.4 \ gbde.4 \ gdb.4 \ gem.4 \ geom.4 \ geom_fox.4 \ gif.4 \ gre.4 \ harp.4 \ hatm.4 \ hfa.4 \ hifn.4 \ hme.4 \ hptmv.4 \ hwpmc.4 \ ichsmb.4 \ icmp.4 \ icmp6.4 \ ida.4 \ idt.4 \ ieee80211.4 \ if_bridge.4 \ ifmib.4 \ iic.4 \ iicbb.4 \ iicbus.4 \ iicsmb.4 \ iir.4 \ inet.4 \ inet6.4 \ intpm.4 \ intro.4 \ ip.4 \ ip6.4 \ ipfirewall.4 \ ${_ipmi.4} \ ips.4 \ ipsec.4 \ ipw.4 \ isp.4 \ ispfw.4 \ iwi.4 \ ixgb.4 \ joy.4 \ kame.4 \ kbdmux.4 \ keyboard.4 \ kld.4 \ ktr.4 \ kue.4 \ le.4 \ led.4 \ lge.4 \ lmc.4 \ lo.4 \ lp.4 \ lpbb.4 \ lpt.4 \ mac.4 \ mac_biba.4 \ mac_bsdextended.4 \ mac_ifoff.4 \ mac_lomac.4 \ mac_mls.4 \ mac_none.4 \ mac_partition.4 \ mac_portacl.4 \ mac_seeotheruids.4 \ mac_stub.4 \ mac_test.4 \ md.4 \ mem.4 \ meteor.4 \ mfi.4 \ miibus.4 \ mlx.4 \ mly.4 \ mn.4 \ mouse.4 \ mpt.4 \ mtio.4 \ multicast.4 \ + mxge.4 \ my.4 \ natm.4 \ natmip.4 \ ncr.4 \ ncv.4 \ netgraph.4 \ netintro.4 \ ${_nfsmb.4} \ ng_async.4 \ ng_atm.4 \ ngatmbase.4 \ ng_atmllc.4 \ ng_atmpif.4 \ ng_bluetooth.4 \ ng_bpf.4 \ ng_bridge.4 \ ng_bt3c.4 \ ng_btsocket.4 \ ng_ccatm.4 \ ng_cisco.4 \ ng_device.4 \ nge.4 \ ng_echo.4 \ ng_eiface.4 \ ng_etf.4 \ ng_ether.4 \ ng_fec.4 \ ng_frame_relay.4 \ ng_gif.4 \ ng_gif_demux.4 \ ng_h4.4 \ ng_hci.4 \ ng_hole.4 \ ng_hub.4 \ ng_iface.4 \ ng_ipfw.4 \ ng_ip_input.4 \ ng_ksocket.4 \ ng_l2cap.4 \ ng_l2tp.4 \ ng_lmi.4 \ ng_mppc.4 \ ng_nat.4 \ ng_netflow.4 \ ng_one2many.4 \ ng_ppp.4 \ ng_pppoe.4 \ ng_pptpgre.4 \ ng_rfc1490.4 \ ng_socket.4 \ ng_source.4 \ ng_split.4 \ ng_sppp.4 \ ng_sscfu.4 \ ng_sscop.4 \ ng_tcpmss.4 \ ng_tee.4 \ ng_tty.4 \ ng_ubt.4 \ ng_UI.4 \ ng_uni.4 \ ng_vjc.4 \ ng_vlan.4 \ nmdm.4 \ nsp.4 \ null.4 \ ${_nve.4} \ ohci.4 \ oldcard.4 \ orm.4 \ pass.4 \ patm.4 \ pccard.4 \ pccbb.4 \ pci.4 \ pcic.4 \ pcm.4 \ pcn.4 \ pim.4 \ polling.4 \ ppbus.4 \ ppc.4 \ ppi.4 \ ppp.4 \ psm.4 \ pst.4 \ pt.4 \ pty.4 \ puc.4 \ ral.4 \ random.4 \ rc.4 \ re.4 \ rl.4 \ rndtest.4 \ route.4 \ rp.4 \ ${_rr232x.4} \ rue.4 \ sa.4 \ safe.4 \ sbp.4 \ sbp_targ.4 \ sbsh.4 \ scc.4 \ sched_4bsd.4 \ sched_ule.4 \ screen.4 \ scsi.4 \ sem.4 \ ses.4 \ sf.4 \ si.4 \ sio.4 \ sis.4 \ sk.4 \ sl.4 \ smb.4 \ smbus.4 \ smp.4 \ sn.4 \ snd_ad1816.4 \ snd_als4000.4 \ snd_atiixp.4 \ snd_cmi.4 \ snd_cs4281.4 \ snd_csa.4 \ snd_ds1.4 \ snd_emu10k1.4 \ snd_es137x.4 \ snd_ess.4 \ snd_fm801.4 \ snd_gusc.4 \ snd_ich.4 \ snd_maestro.4 \ snd_maestro3.4 \ snd_mss.4 \ snd_neomagic.4 \ snd_sbc.4 \ snd_solo.4 \ snd_t4dwave.4 \ snd_uaudio.4 \ snd_via8233.4 \ snd_via82c686.4 \ snd_vibes.4 \ snp.4 \ spic.4 \ ${_spkr.4} \ splash.4 \ sppp.4 \ ste.4 \ stf.4 \ stg.4 \ sym.4 \ syncache.4 \ syncer.4 \ syscons.4 \ sysmouse.4 \ tap.4 \ targ.4 \ tcp.4 \ tdfx.4 \ termios.4 \ ti.4 \ tl.4 \ trm.4 \ tty.4 \ tun.4 \ twa.4 \ twe.4 \ tx.4 \ txp.4 \ uart.4 \ ubsa.4 \ ubsec.4 \ ubser.4 \ ubtbcmfw.4 \ ucom.4 \ ucycom.4 \ udav.4 \ udbp.4 \ udp.4 \ ufm.4 \ ufoma.4 \ uftdi.4 \ ugen.4 \ uhci.4 \ uhid.4 \ uhidev.4 \ ukbd.4 \ ulpt.4 \ umass.4 \ umct.4 \ umodem.4 \ ums.4 \ unix.4 \ uplcom.4 \ ural.4 \ urio.4 \ usb.4 \ uscanner.4 \ utopia.4 \ uvisor.4 \ uvscom.4 \ vga.4 \ vge.4 \ vinum.4 \ vkbd.4 \ vlan.4 \ vpo.4 \ vr.4 \ watchdog.4 \ wb.4 \ wi.4 \ witness.4 \ wlan.4 \ wlan_acl.4 \ wlan_ccmp.4 \ wlan_tkip.4 \ wlan_wep.4 \ wlan_xauth.4 \ worm.4 \ xe.4 \ xl.4 \ xpt.4 \ zero.4 MLINKS= agp.4 agpgart.4 MLINKS+=altq.4 ALTQ.4 MLINKS+=an.4 if_an.4 MLINKS+=ata.4 acd.4 \ ata.4 ad.4 \ ata.4 afd.4 \ ata.4 ast.4 MLINKS+=aue.4 if_aue.4 MLINKS+=awi.4 if_awi.4 MLINKS+=axe.4 if_axe.4 MLINKS+=bce.4 if_bce.4 MLINKS+=bfe.4 if_bfe.4 MLINKS+=bge.4 if_bge.4 MLINKS+=bktr.4 brooktree.4 MLINKS+=cnw.4 if_cnw.4 MLINKS+=crypto.4 cryptodev.4 MLINKS+=cue.4 if_cue.4 MLINKS+=dc.4 if_dc.4 MLINKS+=de.4 if_de.4 MLINKS+=disc.4 if_disc.4 MLINKS+=ed.4 if_ed.4 MLINKS+=ef.4 if_ef.4 MLINKS+=em.4 if_em.4 MLINKS+=en.4 if_en.4 MLINKS+=faith.4 if_faith.4 MLINKS+=fatm.4 if_fatm.4 MLINKS+=fd.4 stderr.4 \ fd.4 stdin.4 \ fd.4 stdout.4 MLINKS+=firewire.4 ieee1394.4 MLINKS+=fpa.4 fea.4 MLINKS+=fwe.4 if_fwe.4 MLINKS+=fwip.4 if_fwip.4 MLINKS+=fxp.4 if_fxp.4 MLINKS+=gem.4 if_gem.4 MLINKS+=geom.4 GEOM.4 MLINKS+=gif.4 if_gif.4 MLINKS+=gre.4 if_gre.4 MLINKS+=hatm.4 if_hatm.4 MLINKS+=hme.4 if_hme.4 MLINKS+=idt.4 if_idt.4 MLINKS+=if_bridge.4 bridge.4 MLINKS+=ip.4 rawip.4 MLINKS+=ipfirewall.4 ipaccounting.4 \ ipfirewall.4 ipacct.4 \ ipfirewall.4 ipfw.4 MLINKS+=ipw.4 if_ipw.4 MLINKS+=iwi.4 if_iwi.4 MLINKS+=kue.4 if_kue.4 MLINKS+=le.4 if_le.4 MLINKS+=lge.4 if_lge.4 MLINKS+=lo.4 loop.4 MLINKS+=lp.4 plip.4 MLINKS+=md.4 vn.4 MLINKS+=mem.4 kmem.4 MLINKS+=mn.4 if_mn.4 MLINKS+=my.4 if_my.4 MLINKS+=netintro.4 net.4 \ netintro.4 networking.4 MLINKS+=nge.4 if_nge.4 MLINKS+=${_nve.4} ${_if_nve.4} MLINKS+=oldcard.4 card.4 MLINKS+=patm.4 if_patm.4 MLINKS+=pccbb.4 cbb.4 MLINKS+=pcm.4 snd.4 \ pcm.4 sound.4 MLINKS+=pcn.4 if_pcn.4 MLINKS+=ppp.4 if_ppp.4 MLINKS+=ral.4 if_ral.4 MLINKS+=re.4 if_re.4 MLINKS+=rl.4 if_rl.4 MLINKS+=rue.4 if_rue.4 MLINKS+=sbsh.4 if_sbsh.4 MLINKS+=scsi.4 CAM.4 \ scsi.4 cam.4 \ scsi.4 scbus.4 \ scsi.4 SCSI.4 MLINKS+=sf.4 if_sf.4 MLINKS+=sis.4 if_sis.4 MLINKS+=sk.4 if_sk.4 MLINKS+=sl.4 if_sl.4 MLINKS+=smp.4 SMP.4 MLINKS+=sn.4 if_sn.4 MLINKS+=${_spkr.4} ${_speaker.4} MLINKS+=splash.4 screensaver.4 MLINKS+=ste.4 if_ste.4 MLINKS+=stf.4 if_stf.4 MLINKS+=syncache.4 syncookies.4 MLINKS+=syscons.4 sc.4 MLINKS+=tap.4 if_tap.4 MLINKS+=tdfx.4 tdfx_linux.4 MLINKS+=ti.4 if_ti.4 MLINKS+=tl.4 if_tl.4 MLINKS+=tun.4 if_tun.4 MLINKS+=tx.4 if_tx.4 MLINKS+=txp.4 if_txp.4 MLINKS+=udav.4 if_udav.4 MLINKS+=ural.4 if_ural.4 MLINKS+=vge.4 if_vge.4 MLINKS+=vlan.4 if_vlan.4 MLINKS+=vpo.4 imm.4 MLINKS+=vr.4 if_vr.4 MLINKS+=wb.4 if_wb.4 MLINKS+=wi.4 if_wi.4 MLINKS+=xe.4 if_xe.4 MLINKS+=xl.4 if_xl.4 .if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386" _acpi_dock.4= acpi_dock.4 _amdsmb.4= amdsmb.4 _if_nve.4= if_nve.4 _ipmi.4= ipmi.4 _nfsmb.4= nfsmb.4 _nve.4= nve.4 _rr232x.4= rr232x.4 _spkr.4= spkr.4 _speaker.4= speaker.4 .endif .if exists(${.CURDIR}/man4.${MACHINE_ARCH}) SUBDIR= man4.${MACHINE_ARCH} .endif .include Index: head/share/man/man4/mxge.4 =================================================================== --- head/share/man/man4/mxge.4 (revision 159570) +++ head/share/man/man4/mxge.4 (revision 159571) @@ -1,146 +1,146 @@ .\" Copyright (c) 2006, Myricom Inc .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions are met: .\" .\" 1. Redistributions of source code must retain the above copyright notice, .\" this list of conditions and the following disclaimer. .\" .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" 3. Neither the name of the Myricom Inc nor the names of its .\" contributors may be used to endorse or promote products derived from .\" this software without specific prior written permission. .\" .\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" .\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE .\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR .\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF .\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS .\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN .\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE .\" POSSIBILITY OF SUCH DAMAGE. .\" .\" * Other names and brands may be claimed as the property of others. .\" .\" $FreeBSD$ .\" .Dd February 9, 2006 .Dt MYRI10GE 4 .Os .Sh NAME -.Nm myri10ge +.Nm mxge .Nd "Myricom Myri10GE 10 Gigabit Ethernet adapter driver" .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your kernel configuration file: .Bd -ragged -offset indent .Cd "device firmware" -.Cd "device myri10ge" +.Cd "device mxge" .Ed .Pp Alternatively, to load the driver as a module at boot time, place the following line in .Xr loader.conf 5 : .Bd -literal -offset indent -if_myri10ge_load="YES" -myri10ge_ethp_z8e_load="YES" -myri10ge_eth_z8e_load="YES" +if_mxge_load="YES" +mxge_ethp_z8e_load="YES" +mxge_eth_z8e_load="YES" .Ed .Sh DESCRIPTION The .Nm driver provides support for PCI Express 10 Gigabit Ethernet adapters based on the Myricom LANai Z8E chip. The driver supports Transmit/Receive checksum offload and Jumbo Frames. For further hardware information, see http://www.myri.com .Pp For questions related to hardware requirements, refer to the documentation supplied with your Myri10GE adapter. All hardware requirements listed apply to use with .Fx . .Pp Support for Jumbo Frames is provided via the interface MTU setting. Selecting an MTU larger than 1500 bytes with the .Xr ifconfig 8 utility configures the adapter to receive and transmit Jumbo Frames. The maximum MTU size for Jumbo Frames is 9000. .Pp For more information on configuring this device, see .Xr ifconfig 8 . .Sh HARDWARE The .Nm driver supports 10 Gigabit Ethernet adapters based on the Myricom LANai Z8E chips: .Pp .Bl -bullet -compact .It Myricom 10GBase-CX4 (10G-PCIE-8A-C, 10G-PCIE-8AL-C) .It Myricom 10GBase-R (10G-PCIE-8A-R, 10G-PCIE-8AL-R) .It Myricom 10G XAUI over ribbon fiber (10G-PCIE-8A-Q, 10G-PCIE-8AL-Q) .El .Sh LOADER TUNABLES Tunables can be set at the .Xr loader 8 prompt before booting the kernel or stored in .Xr loader.conf 5 . .Bl -tag -width indent -.It Va hw.myri10ge.flow_control_enabled +.It Va hw.mxge.flow_control_enabled Whether or not hardware flow control is enabled on the adapter. The default value is 1. -.It Va hw.myri10ge.intr_coal_delay +.It Va hw.mxge.intr_coal_delay This value delays the generation of all interrupts in units of 1 microsecond. The default value is 30. -.It Va hw.myri10ge.skip_pio_read +.It Va hw.mxge.skip_pio_read This value determines whether or not the driver may omit doing a pio read in the interrupt handler which ensures that the interrupt line has been deasserted when using xPIC interrupts. A non-zero value may result in lower CPU overhead, however it may also result in spurious interrupts. The default value is 0. .El .Sh DIAGNOSTICS .Bl -diag -.It "myri10ge%d: Unable to allocate bus resource: memory" +.It "mxge%d: Unable to allocate bus resource: memory" A fatal initialization error has occurred. -.It "myri10ge%d: Unable to allocate bus resource: interrupt" +.It "mxge%d: Unable to allocate bus resource: interrupt" A fatal initialization error has occurred. -.It "myri10ge%d: Could not find firmware image %s" +.It "mxge%d: Could not find firmware image %s" The appropriate firmware kld module was not installed. This is a fatal initialization error. .El .Sh SUPPORT For general information and support, go to the Myricom support website at: .Pa http://www.myri.com/scs . .Pp If an issue is identified with the released source code on the supported kernel with a supported adapter, email the specific information related to the issue to .Aq help@myri.com . .Sh SEE ALSO .Xr arp 4 , .Xr netintro 4 , .Xr ng_ether 4 , .Xr ifconfig 8 .Sh HISTORY The .Nm device driver first appeared in .Fx 7.0 . .Sh AUTHORS The .Nm driver was written by .An Andrew Gallatin Aq gallatin@freebsd.org . Index: head/sys/dev/mxge/if_mxge.c =================================================================== --- head/sys/dev/mxge/if_mxge.c (revision 159570) +++ head/sys/dev/mxge/if_mxge.c (revision 159571) @@ -1,2488 +1,2470 @@ -/******************************************************************************* +/****************************************************************************** Copyright (c) 2006, Myricom Inc. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of the Myricom Inc, nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ***************************************************************************/ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* for pmap_mapdev() */ #include -#include -#include -#include +#include +#include +#include /* tunable params */ -static int myri10ge_nvidia_ecrc_enable = 1; -static int myri10ge_max_intr_slots = 128; -static int myri10ge_intr_coal_delay = 30; -static int myri10ge_skip_pio_read = 0; -static int myri10ge_flow_control = 1; -static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e"; -static char *myri10ge_fw_aligned = "myri10ge_eth_z8e"; +static int mxge_nvidia_ecrc_enable = 1; +static int mxge_max_intr_slots = 128; +static int mxge_intr_coal_delay = 30; +static int mxge_skip_pio_read = 0; +static int mxge_flow_control = 1; +static char *mxge_fw_unaligned = "mxge_ethp_z8e"; +static char *mxge_fw_aligned = "mxge_eth_z8e"; -static int myri10ge_probe(device_t dev); -static int myri10ge_attach(device_t dev); -static int myri10ge_detach(device_t dev); -static int myri10ge_shutdown(device_t dev); -static void myri10ge_intr(void *arg); +static int mxge_probe(device_t dev); +static int mxge_attach(device_t dev); +static int mxge_detach(device_t dev); +static int mxge_shutdown(device_t dev); +static void mxge_intr(void *arg); -static device_method_t myri10ge_methods[] = +static device_method_t mxge_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, myri10ge_probe), - DEVMETHOD(device_attach, myri10ge_attach), - DEVMETHOD(device_detach, myri10ge_detach), - DEVMETHOD(device_shutdown, myri10ge_shutdown), + DEVMETHOD(device_probe, mxge_probe), + DEVMETHOD(device_attach, mxge_attach), + DEVMETHOD(device_detach, mxge_detach), + DEVMETHOD(device_shutdown, mxge_shutdown), {0, 0} }; -static driver_t myri10ge_driver = +static driver_t mxge_driver = { - "myri10ge", - myri10ge_methods, - sizeof(myri10ge_softc_t), + "mxge", + mxge_methods, + sizeof(mxge_softc_t), }; -static devclass_t myri10ge_devclass; +static devclass_t mxge_devclass; /* Declare ourselves to be a child of the PCI bus.*/ -DRIVER_MODULE(myri10ge, pci, myri10ge_driver, myri10ge_devclass, 0, 0); -MODULE_DEPEND(myri10ge, firmware, 1, 1, 1); +DRIVER_MODULE(mxge, pci, mxge_driver, mxge_devclass, 0, 0); +MODULE_DEPEND(mxge, firmware, 1, 1, 1); static int -myri10ge_probe(device_t dev) +mxge_probe(device_t dev) { - if ((pci_get_vendor(dev) == MYRI10GE_PCI_VENDOR_MYRICOM) && - (pci_get_device(dev) == MYRI10GE_PCI_DEVICE_Z8E)) { + if ((pci_get_vendor(dev) == MXGE_PCI_VENDOR_MYRICOM) && + (pci_get_device(dev) == MXGE_PCI_DEVICE_Z8E)) { device_set_desc(dev, "Myri10G-PCIE-8A"); return 0; } return ENXIO; } static void -myri10ge_enable_wc(myri10ge_softc_t *sc) +mxge_enable_wc(mxge_softc_t *sc) { struct mem_range_desc mrdesc; vm_paddr_t pa; vm_offset_t len; int err, action; pa = rman_get_start(sc->mem_res); len = rman_get_size(sc->mem_res); mrdesc.mr_base = pa; mrdesc.mr_len = len; mrdesc.mr_flags = MDF_WRITECOMBINE; action = MEMRANGE_SET_UPDATE; - strcpy((char *)&mrdesc.mr_owner, "myri10ge"); + strcpy((char *)&mrdesc.mr_owner, "mxge"); err = mem_range_attr_set(&mrdesc, &action); if (err != 0) { device_printf(sc->dev, "w/c failed for pa 0x%lx, len 0x%lx, err = %d\n", (unsigned long)pa, (unsigned long)len, err); } else { sc->wc = 1; } } /* callback to get our DMA address */ static void -myri10ge_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, +mxge_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) { if (error == 0) { *(bus_addr_t *) arg = segs->ds_addr; } } static int -myri10ge_dma_alloc(myri10ge_softc_t *sc, myri10ge_dma_t *dma, size_t bytes, +mxge_dma_alloc(mxge_softc_t *sc, mxge_dma_t *dma, size_t bytes, bus_size_t alignment) { int err; device_t dev = sc->dev; /* allocate DMAable memory tags */ err = bus_dma_tag_create(sc->parent_dmat, /* parent */ alignment, /* alignment */ 4096, /* boundary */ BUS_SPACE_MAXADDR, /* low */ BUS_SPACE_MAXADDR, /* high */ NULL, NULL, /* filter */ bytes, /* maxsize */ 1, /* num segs */ 4096, /* maxsegsize */ BUS_DMA_COHERENT, /* flags */ NULL, NULL, /* lock */ &dma->dmat); /* tag */ if (err != 0) { device_printf(dev, "couldn't alloc tag (err = %d)\n", err); return err; } /* allocate DMAable memory & map */ err = bus_dmamem_alloc(dma->dmat, &dma->addr, (BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO), &dma->map); if (err != 0) { device_printf(dev, "couldn't alloc mem (err = %d)\n", err); goto abort_with_dmat; } /* load the memory */ err = bus_dmamap_load(dma->dmat, dma->map, dma->addr, bytes, - myri10ge_dmamap_callback, + mxge_dmamap_callback, (void *)&dma->bus_addr, 0); if (err != 0) { device_printf(dev, "couldn't load map (err = %d)\n", err); goto abort_with_mem; } return 0; abort_with_mem: bus_dmamem_free(dma->dmat, dma->addr, dma->map); abort_with_dmat: (void)bus_dma_tag_destroy(dma->dmat); return err; } static void -myri10ge_dma_free(myri10ge_dma_t *dma) +mxge_dma_free(mxge_dma_t *dma) { bus_dmamap_unload(dma->dmat, dma->map); bus_dmamem_free(dma->dmat, dma->addr, dma->map); (void)bus_dma_tag_destroy(dma->dmat); } /* * The eeprom strings on the lanaiX have the format * SN=x\0 * MAC=x:x:x:x:x:x\0 * PC=text\0 */ static int -myri10ge_parse_strings(myri10ge_softc_t *sc) +mxge_parse_strings(mxge_softc_t *sc) { -#define MYRI10GE_NEXT_STRING(p) while(ptr < limit && *ptr++) +#define MXGE_NEXT_STRING(p) while(ptr < limit && *ptr++) char *ptr, *limit; int i, found_mac; ptr = sc->eeprom_strings; - limit = sc->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE; + limit = sc->eeprom_strings + MXGE_EEPROM_STRINGS_SIZE; found_mac = 0; while (ptr < limit && *ptr != '\0') { if (memcmp(ptr, "MAC=", 4) == 0) { ptr+=4; sc->mac_addr_string = ptr; for (i = 0; i < 6; i++) { if ((ptr + 2) > limit) goto abort; sc->mac_addr[i] = strtoul(ptr, NULL, 16); found_mac = 1; ptr += 3; } } else if (memcmp(ptr, "PC=", 4) == 0) { sc->product_code_string = ptr; } - MYRI10GE_NEXT_STRING(ptr); + MXGE_NEXT_STRING(ptr); } if (found_mac) return 0; abort: device_printf(sc->dev, "failed to parse eeprom_strings\n"); return ENXIO; } #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ static int -myri10ge_enable_nvidia_ecrc(myri10ge_softc_t *sc, device_t pdev) +mxge_enable_nvidia_ecrc(mxge_softc_t *sc, device_t pdev) { uint32_t val; unsigned long off; char *va, *cfgptr; uint16_t vendor_id, device_id; uintptr_t bus, slot, func, ivend, idev; uint32_t *ptr32; /* XXXX Test below is commented because it is believed that doing config read/write beyond 0xff will access the config space for the next larger function. Uncomment this and remove the hacky pmap_mapdev() way of accessing config space when FreeBSD grows support for extended pcie config space access */ #if 0 /* See if we can, by some miracle, access the extended config space */ val = pci_read_config(pdev, 0x178, 4); if (val != 0xffffffff) { val |= 0x40; pci_write_config(pdev, 0x178, val, 4); return 0; } #endif /* Rather than using normal pci config space writes, we must * map the Nvidia config space ourselves. This is because on * opteron/nvidia class machine the 0xe000000 mapping is * handled by the nvidia chipset, that means the internal PCI * device (the on-chip northbridge), or the amd-8131 bridge * and things behind them are not visible by this method. */ BUS_READ_IVAR(device_get_parent(pdev), pdev, PCI_IVAR_BUS, &bus); BUS_READ_IVAR(device_get_parent(pdev), pdev, PCI_IVAR_SLOT, &slot); BUS_READ_IVAR(device_get_parent(pdev), pdev, PCI_IVAR_FUNCTION, &func); BUS_READ_IVAR(device_get_parent(pdev), pdev, PCI_IVAR_VENDOR, &ivend); BUS_READ_IVAR(device_get_parent(pdev), pdev, PCI_IVAR_DEVICE, &idev); off = 0xe0000000UL + 0x00100000UL * (unsigned long)bus + 0x00001000UL * (unsigned long)(func + 8 * slot); /* map it into the kernel */ va = pmap_mapdev(trunc_page((vm_paddr_t)off), PAGE_SIZE); if (va == NULL) { device_printf(sc->dev, "pmap_kenter_temporary didn't\n"); return EIO; } /* get a pointer to the config space mapped into the kernel */ cfgptr = va + (off & PAGE_MASK); /* make sure that we can really access it */ vendor_id = *(uint16_t *)(cfgptr + PCIR_VENDOR); device_id = *(uint16_t *)(cfgptr + PCIR_DEVICE); if (! (vendor_id == ivend && device_id == idev)) { device_printf(sc->dev, "mapping failed: 0x%x:0x%x\n", vendor_id, device_id); pmap_unmapdev((vm_offset_t)va, PAGE_SIZE); return EIO; } ptr32 = (uint32_t*)(cfgptr + 0x178); val = *ptr32; if (val == 0xffffffff) { device_printf(sc->dev, "extended mapping failed\n"); pmap_unmapdev((vm_offset_t)va, PAGE_SIZE); return EIO; } *ptr32 = val | 0x40; pmap_unmapdev((vm_offset_t)va, PAGE_SIZE); device_printf(sc->dev, "Enabled ECRC on upstream Nvidia bridge at %d:%d:%d\n", (int)bus, (int)slot, (int)func); return 0; } #else static int -myri10ge_enable_nvidia_ecrc(myri10ge_softc_t *sc, device_t pdev) +mxge_enable_nvidia_ecrc(mxge_softc_t *sc, device_t pdev) { device_printf(sc->dev, "Nforce 4 chipset on non-x86/amd64!?!?!\n"); return ENXIO; } #endif /* * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput * when the PCI-E Completion packets are aligned on an 8-byte * boundary. Some PCI-E chip sets always align Completion packets; on * the ones that do not, the alignment can be enforced by enabling * ECRC generation (if supported). * * When PCI-E Completion packets are not aligned, it is actually more * efficient to limit Read-DMA transactions to 2KB, rather than 4KB. * * If the driver can neither enable ECRC nor verify that it has * already been enabled, then it must use a firmware image which works * around unaligned completion packets (ethp_z8e.dat), and it should * also ensure that it never gives the device a Read-DMA which is * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is * enabled, then the driver should use the aligned (eth_z8e.dat) * firmware image, and set tx.boundary to 4KB. */ static void -myri10ge_select_firmware(myri10ge_softc_t *sc) +mxge_select_firmware(mxge_softc_t *sc) { int err, aligned = 0; device_t pdev; uint16_t pvend, pdid; pdev = device_get_parent(device_get_parent(sc->dev)); if (pdev == NULL) { device_printf(sc->dev, "could not find parent?\n"); goto abort; } pvend = pci_read_config(pdev, PCIR_VENDOR, 2); pdid = pci_read_config(pdev, PCIR_DEVICE, 2); /* see if we can enable ECRC's on an upstream Nvidia bridge */ - if (myri10ge_nvidia_ecrc_enable && + if (mxge_nvidia_ecrc_enable && (pvend == 0x10de && pdid == 0x005d)) { - err = myri10ge_enable_nvidia_ecrc(sc, pdev); + err = mxge_enable_nvidia_ecrc(sc, pdev); if (err == 0) { aligned = 1; device_printf(sc->dev, "Assuming aligned completions (ECRC)\n"); } } /* see if the upstream bridge is known to provided aligned completions */ if (/* HT2000 */ (pvend == 0x1166 && pdid == 0x0132) || /* Ontario */ (pvend == 0x10b5 && pdid == 0x8532)) { device_printf(sc->dev, "Assuming aligned completions (0x%x:0x%x)\n", pvend, pdid); } abort: if (aligned) { - sc->fw_name = myri10ge_fw_aligned; + sc->fw_name = mxge_fw_aligned; sc->tx.boundary = 4096; } else { - sc->fw_name = myri10ge_fw_unaligned; + sc->fw_name = mxge_fw_unaligned; sc->tx.boundary = 2048; } } union qualhack { const char *ro_char; char *rw_char; }; static int -myri10ge_load_firmware_helper(myri10ge_softc_t *sc, uint32_t *limit) +mxge_load_firmware_helper(mxge_softc_t *sc, uint32_t *limit) { struct firmware *fw; const mcp_gen_header_t *hdr; unsigned hdr_offset; const char *fw_data; union qualhack hack; int status; fw = firmware_get(sc->fw_name); if (fw == NULL) { device_printf(sc->dev, "Could not find firmware image %s\n", sc->fw_name); return ENOENT; } if (fw->datasize > *limit || fw->datasize < MCP_HEADER_PTR_OFFSET + 4) { device_printf(sc->dev, "Firmware image %s too large (%d/%d)\n", sc->fw_name, (int)fw->datasize, (int) *limit); status = ENOSPC; goto abort_with_fw; } *limit = fw->datasize; /* check id */ fw_data = (const char *)fw->data; hdr_offset = htobe32(*(const uint32_t *) (fw_data + MCP_HEADER_PTR_OFFSET)); if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->datasize) { device_printf(sc->dev, "Bad firmware file"); status = EIO; goto abort_with_fw; } hdr = (const void*)(fw_data + hdr_offset); if (be32toh(hdr->mcp_type) != MCP_TYPE_ETH) { device_printf(sc->dev, "Bad firmware type: 0x%x\n", be32toh(hdr->mcp_type)); status = EIO; goto abort_with_fw; } /* save firmware version for sysctl */ strncpy(sc->fw_version, hdr->version, sizeof (sc->fw_version)); device_printf(sc->dev, "firmware id: %s\n", hdr->version); hack.ro_char = fw_data; /* Copy the inflated firmware to NIC SRAM. */ - myri10ge_pio_copy(&sc->sram[MYRI10GE_FW_OFFSET], - hack.rw_char, *limit); + mxge_pio_copy(&sc->sram[MXGE_FW_OFFSET], hack.rw_char, *limit); status = 0; abort_with_fw: firmware_put(fw, FIRMWARE_UNLOAD); return status; } /* * Enable or disable periodic RDMAs from the host to make certain * chipsets resend dropped PCIe messages */ static void -myri10ge_dummy_rdma(myri10ge_softc_t *sc, int enable) +mxge_dummy_rdma(mxge_softc_t *sc, int enable) { char buf_bytes[72]; volatile uint32_t *confirm; volatile char *submit; uint32_t *buf, dma_low, dma_high; int i; buf = (uint32_t *)((unsigned long)(buf_bytes + 7) & ~7UL); /* clear confirmation addr */ confirm = (volatile uint32_t *)sc->cmd; *confirm = 0; mb(); /* send an rdma command to the PCIe engine, and wait for the response in the confirmation address. The firmware should write a -1 there to indicate it is alive and well */ - dma_low = MYRI10GE_LOWPART_TO_U32(sc->cmd_dma.bus_addr); - dma_high = MYRI10GE_HIGHPART_TO_U32(sc->cmd_dma.bus_addr); + dma_low = MXGE_LOWPART_TO_U32(sc->cmd_dma.bus_addr); + dma_high = MXGE_HIGHPART_TO_U32(sc->cmd_dma.bus_addr); buf[0] = htobe32(dma_high); /* confirm addr MSW */ buf[1] = htobe32(dma_low); /* confirm addr LSW */ buf[2] = htobe32(0xffffffff); /* confirm data */ - dma_low = MYRI10GE_LOWPART_TO_U32(sc->zeropad_dma.bus_addr); - dma_high = MYRI10GE_HIGHPART_TO_U32(sc->zeropad_dma.bus_addr); + dma_low = MXGE_LOWPART_TO_U32(sc->zeropad_dma.bus_addr); + dma_high = MXGE_HIGHPART_TO_U32(sc->zeropad_dma.bus_addr); buf[3] = htobe32(dma_high); /* dummy addr MSW */ buf[4] = htobe32(dma_low); /* dummy addr LSW */ buf[5] = htobe32(enable); /* enable? */ submit = (volatile char *)(sc->sram + 0xfc01c0); - myri10ge_pio_copy(submit, buf, 64); + mxge_pio_copy(submit, buf, 64); mb(); DELAY(1000); mb(); i = 0; while (*confirm != 0xffffffff && i < 20) { DELAY(1000); i++; } if (*confirm != 0xffffffff) { device_printf(sc->dev, "dummy rdma %s failed (%p = 0x%x)", (enable ? "enable" : "disable"), confirm, *confirm); } return; } static int -myri10ge_send_cmd(myri10ge_softc_t *sc, uint32_t cmd, - myri10ge_cmd_t *data) +mxge_send_cmd(mxge_softc_t *sc, uint32_t cmd, mxge_cmd_t *data) { mcp_cmd_t *buf; char buf_bytes[sizeof(*buf) + 8]; volatile mcp_cmd_response_t *response = sc->cmd; - volatile char *cmd_addr = sc->sram + MYRI10GE_MCP_CMD_OFFSET; + volatile char *cmd_addr = sc->sram + MXGE_MCP_CMD_OFFSET; uint32_t dma_low, dma_high; int sleep_total = 0; /* ensure buf is aligned to 8 bytes */ buf = (mcp_cmd_t *)((unsigned long)(buf_bytes + 7) & ~7UL); buf->data0 = htobe32(data->data0); buf->data1 = htobe32(data->data1); buf->data2 = htobe32(data->data2); buf->cmd = htobe32(cmd); - dma_low = MYRI10GE_LOWPART_TO_U32(sc->cmd_dma.bus_addr); - dma_high = MYRI10GE_HIGHPART_TO_U32(sc->cmd_dma.bus_addr); + dma_low = MXGE_LOWPART_TO_U32(sc->cmd_dma.bus_addr); + dma_high = MXGE_HIGHPART_TO_U32(sc->cmd_dma.bus_addr); buf->response_addr.low = htobe32(dma_low); buf->response_addr.high = htobe32(dma_high); mtx_lock(&sc->cmd_lock); response->result = 0xffffffff; mb(); - myri10ge_pio_copy((volatile void *)cmd_addr, buf, sizeof (*buf)); + mxge_pio_copy((volatile void *)cmd_addr, buf, sizeof (*buf)); /* wait up to 2 seconds */ for (sleep_total = 0; sleep_total < (2 * 1000); sleep_total += 10) { bus_dmamap_sync(sc->cmd_dma.dmat, sc->cmd_dma.map, BUS_DMASYNC_POSTREAD); mb(); if (response->result != 0xffffffff) { if (response->result == 0) { data->data0 = be32toh(response->data); mtx_unlock(&sc->cmd_lock); return 0; } else { device_printf(sc->dev, - "myri10ge: command %d " + "mxge: command %d " "failed, result = %d\n", cmd, be32toh(response->result)); mtx_unlock(&sc->cmd_lock); return ENXIO; } } DELAY(1000 * 10); } mtx_unlock(&sc->cmd_lock); - device_printf(sc->dev, "myri10ge: command %d timed out" + device_printf(sc->dev, "mxge: command %d timed out" "result = %d\n", cmd, be32toh(response->result)); return EAGAIN; } static int -myri10ge_load_firmware(myri10ge_softc_t *sc) +mxge_load_firmware(mxge_softc_t *sc) { volatile uint32_t *confirm; volatile char *submit; char buf_bytes[72]; uint32_t *buf, size, dma_low, dma_high; int status, i; buf = (uint32_t *)((unsigned long)(buf_bytes + 7) & ~7UL); size = sc->sram_size; - status = myri10ge_load_firmware_helper(sc, &size); + status = mxge_load_firmware_helper(sc, &size); if (status) { device_printf(sc->dev, "firmware loading failed\n"); return status; } /* clear confirmation addr */ confirm = (volatile uint32_t *)sc->cmd; *confirm = 0; mb(); /* send a reload command to the bootstrap MCP, and wait for the response in the confirmation address. The firmware should write a -1 there to indicate it is alive and well */ - dma_low = MYRI10GE_LOWPART_TO_U32(sc->cmd_dma.bus_addr); - dma_high = MYRI10GE_HIGHPART_TO_U32(sc->cmd_dma.bus_addr); + dma_low = MXGE_LOWPART_TO_U32(sc->cmd_dma.bus_addr); + dma_high = MXGE_HIGHPART_TO_U32(sc->cmd_dma.bus_addr); buf[0] = htobe32(dma_high); /* confirm addr MSW */ buf[1] = htobe32(dma_low); /* confirm addr LSW */ buf[2] = htobe32(0xffffffff); /* confirm data */ /* FIX: All newest firmware should un-protect the bottom of the sram before handoff. However, the very first interfaces do not. Therefore the handoff copy must skip the first 8 bytes */ /* where the code starts*/ - buf[3] = htobe32(MYRI10GE_FW_OFFSET + 8); + buf[3] = htobe32(MXGE_FW_OFFSET + 8); buf[4] = htobe32(size - 8); /* length of code */ buf[5] = htobe32(8); /* where to copy to */ buf[6] = htobe32(0); /* where to jump to */ submit = (volatile char *)(sc->sram + 0xfc0000); - myri10ge_pio_copy(submit, buf, 64); + mxge_pio_copy(submit, buf, 64); mb(); DELAY(1000); mb(); i = 0; while (*confirm != 0xffffffff && i < 20) { DELAY(1000*10); i++; bus_dmamap_sync(sc->cmd_dma.dmat, sc->cmd_dma.map, BUS_DMASYNC_POSTREAD); } if (*confirm != 0xffffffff) { device_printf(sc->dev,"handoff failed (%p = 0x%x)", confirm, *confirm); return ENXIO; } - myri10ge_dummy_rdma(sc, 1); + mxge_dummy_rdma(sc, 1); return 0; } static int -myri10ge_update_mac_address(myri10ge_softc_t *sc) +mxge_update_mac_address(mxge_softc_t *sc) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; uint8_t *addr = sc->mac_addr; int status; cmd.data0 = ((addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]); cmd.data1 = ((addr[4] << 8) | (addr[5])); - status = myri10ge_send_cmd(sc, MYRI10GE_MCP_SET_MAC_ADDRESS, &cmd); + status = mxge_send_cmd(sc, MXGE_MCP_SET_MAC_ADDRESS, &cmd); return status; } static int -myri10ge_change_pause(myri10ge_softc_t *sc, int pause) +mxge_change_pause(mxge_softc_t *sc, int pause) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; int status; if (pause) - status = myri10ge_send_cmd(sc, - MYRI10GE_MCP_ENABLE_FLOW_CONTROL, - &cmd); + status = mxge_send_cmd(sc, MXGE_MCP_ENABLE_FLOW_CONTROL, + &cmd); else - status = myri10ge_send_cmd(sc, - MYRI10GE_MCP_DISABLE_FLOW_CONTROL, - &cmd); + status = mxge_send_cmd(sc, MXGE_MCP_DISABLE_FLOW_CONTROL, + &cmd); if (status) { device_printf(sc->dev, "Failed to set flow control mode\n"); return ENXIO; } sc->pause = pause; return 0; } static void -myri10ge_change_promisc(myri10ge_softc_t *sc, int promisc) +mxge_change_promisc(mxge_softc_t *sc, int promisc) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; int status; if (promisc) - status = myri10ge_send_cmd(sc, - MYRI10GE_MCP_ENABLE_PROMISC, - &cmd); + status = mxge_send_cmd(sc, MXGE_MCP_ENABLE_PROMISC, + &cmd); else - status = myri10ge_send_cmd(sc, - MYRI10GE_MCP_DISABLE_PROMISC, - &cmd); + status = mxge_send_cmd(sc, MXGE_MCP_DISABLE_PROMISC, + &cmd); if (status) { device_printf(sc->dev, "Failed to set promisc mode\n"); } } static int -myri10ge_reset(myri10ge_softc_t *sc) +mxge_reset(mxge_softc_t *sc) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; int status, i; /* try to send a reset command to the card to see if it is alive */ memset(&cmd, 0, sizeof (cmd)); - status = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_RESET, &cmd); + status = mxge_send_cmd(sc, MXGE_MCP_CMD_RESET, &cmd); if (status != 0) { device_printf(sc->dev, "failed reset\n"); return ENXIO; } /* Now exchange information about interrupts */ cmd.data0 = (uint32_t) - (myri10ge_max_intr_slots * sizeof (*sc->intr.q[0])); - status = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_SET_INTRQ_SIZE, &cmd); - for (i = 0; (status == 0) && (i < MYRI10GE_NUM_INTRQS); i++) { - cmd.data0 = MYRI10GE_LOWPART_TO_U32(sc->intr.dma[i].bus_addr); - cmd.data1 = MYRI10GE_HIGHPART_TO_U32(sc->intr.dma[i].bus_addr); + (mxge_max_intr_slots * sizeof (*sc->intr.q[0])); + status = mxge_send_cmd(sc, MXGE_MCP_CMD_SET_INTRQ_SIZE, &cmd); + for (i = 0; (status == 0) && (i < MXGE_NUM_INTRQS); i++) { + cmd.data0 = MXGE_LOWPART_TO_U32(sc->intr.dma[i].bus_addr); + cmd.data1 = MXGE_HIGHPART_TO_U32(sc->intr.dma[i].bus_addr); status |= - myri10ge_send_cmd(sc, (i + - MYRI10GE_MCP_CMD_SET_INTRQ0_DMA), - &cmd); + mxge_send_cmd(sc, (i + MXGE_MCP_CMD_SET_INTRQ0_DMA), + &cmd); } - cmd.data0 = sc->intr_coal_delay = myri10ge_intr_coal_delay; - status |= myri10ge_send_cmd(sc, - MYRI10GE_MCP_CMD_SET_INTR_COAL_DELAY, &cmd); + cmd.data0 = sc->intr_coal_delay = mxge_intr_coal_delay; + status |= mxge_send_cmd(sc, MXGE_MCP_CMD_SET_INTR_COAL_DELAY, &cmd); if (sc->msi_enabled) { - status |= myri10ge_send_cmd - (sc, MYRI10GE_MCP_CMD_GET_IRQ_ACK_OFFSET, &cmd); + status |= mxge_send_cmd(sc, + MXGE_MCP_CMD_GET_IRQ_ACK_OFFSET, + &cmd); } else { - status |= myri10ge_send_cmd - (sc, MYRI10GE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET, + status |= mxge_send_cmd + (sc, MXGE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET, &cmd); } if (status != 0) { device_printf(sc->dev, "failed set interrupt parameters\n"); return status; } sc->irq_claim = (volatile uint32_t *)(sc->sram + cmd.data0); /* reset mcp/driver shared state back to 0 */ sc->intr.seqnum = 0; sc->intr.intrq = 0; sc->intr.slot = 0; sc->tx.req = 0; sc->tx.done = 0; sc->rx_big.cnt = 0; sc->rx_small.cnt = 0; sc->rdma_tags_available = 15; - status = myri10ge_update_mac_address(sc); - myri10ge_change_promisc(sc, 0); - myri10ge_change_pause(sc, sc->pause); + status = mxge_update_mac_address(sc); + mxge_change_promisc(sc, 0); + mxge_change_pause(sc, sc->pause); return status; } static int -myri10ge_change_intr_coal(SYSCTL_HANDLER_ARGS) +mxge_change_intr_coal(SYSCTL_HANDLER_ARGS) { - myri10ge_cmd_t cmd; - myri10ge_softc_t *sc; + mxge_cmd_t cmd; + mxge_softc_t *sc; unsigned int intr_coal_delay; int err; sc = arg1; intr_coal_delay = sc->intr_coal_delay; err = sysctl_handle_int(oidp, &intr_coal_delay, arg2, req); if (err != 0) { return err; } if (intr_coal_delay == sc->intr_coal_delay) return 0; if (intr_coal_delay == 0 || intr_coal_delay > 1000*1000) return EINVAL; sx_xlock(&sc->driver_lock); cmd.data0 = intr_coal_delay; - err = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_SET_INTR_COAL_DELAY, - &cmd); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_SET_INTR_COAL_DELAY, + &cmd); if (err == 0) { sc->intr_coal_delay = intr_coal_delay; } sx_xunlock(&sc->driver_lock); return err; } static int -myri10ge_change_flow_control(SYSCTL_HANDLER_ARGS) +mxge_change_flow_control(SYSCTL_HANDLER_ARGS) { - myri10ge_softc_t *sc; + mxge_softc_t *sc; unsigned int enabled; int err; sc = arg1; enabled = sc->pause; err = sysctl_handle_int(oidp, &enabled, arg2, req); if (err != 0) { return err; } if (enabled == sc->pause) return 0; sx_xlock(&sc->driver_lock); - err = myri10ge_change_pause(sc, enabled); + err = mxge_change_pause(sc, enabled); sx_xunlock(&sc->driver_lock); return err; } static int -myri10ge_handle_be32(SYSCTL_HANDLER_ARGS) +mxge_handle_be32(SYSCTL_HANDLER_ARGS) { int err; if (arg1 == NULL) return EFAULT; arg2 = be32toh(*(int *)arg1); arg1 = NULL; err = sysctl_handle_int(oidp, arg1, arg2, req); return err; } static void -myri10ge_add_sysctls(myri10ge_softc_t *sc) +mxge_add_sysctls(mxge_softc_t *sc) { struct sysctl_ctx_list *ctx; struct sysctl_oid_list *children; mcp_stats_t *fw; ctx = device_get_sysctl_ctx(sc->dev); children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)); fw = sc->fw_stats; SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "intr_coal_delay", CTLTYPE_INT|CTLFLAG_RW, sc, - 0, myri10ge_change_intr_coal, + 0, mxge_change_intr_coal, "I", "interrupt coalescing delay in usecs"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "flow_control_enabled", CTLTYPE_INT|CTLFLAG_RW, sc, - 0, myri10ge_change_flow_control, + 0, mxge_change_flow_control, "I", "interrupt coalescing delay in usecs"); SYSCTL_ADD_INT(ctx, children, OID_AUTO, "skip_pio_read", - CTLFLAG_RW, &myri10ge_skip_pio_read, + CTLFLAG_RW, &mxge_skip_pio_read, 0, "Skip pio read in interrupt handler"); /* stats block from firmware is in network byte order. Need to swap it */ SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "link_up", CTLTYPE_INT|CTLFLAG_RD, &fw->link_up, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "link up"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "rdma_tags_available", CTLTYPE_INT|CTLFLAG_RD, &fw->rdma_tags_available, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "rdma_tags_available"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_link_overflow", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_link_overflow, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_link_overflow"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_link_error_or_filtered", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_link_error_or_filtered, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_link_error_or_filtered"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_runt", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_runt, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_runt"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_overrun", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_overrun, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_overrun"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_no_small_buffer", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_no_small_buffer, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_no_small_buffer"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_no_big_buffer", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_no_big_buffer, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_no_big_buffer"); SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "dropped_interrupt_busy", CTLTYPE_INT|CTLFLAG_RD, &fw->dropped_interrupt_busy, - 0, myri10ge_handle_be32, + 0, mxge_handle_be32, "I", "dropped_interrupt_busy"); /* host counters exported for debugging */ SYSCTL_ADD_INT(ctx, children, OID_AUTO, "tx_req", CTLFLAG_RD, &sc->tx.req, 0, "tx_req"); SYSCTL_ADD_INT(ctx, children, OID_AUTO, "tx_done", CTLFLAG_RD, &sc->tx.done, 0, "tx_done"); SYSCTL_ADD_INT(ctx, children, OID_AUTO, "rx_small_cnt", CTLFLAG_RD, &sc->rx_small.cnt, 0, "rx_small_cnt"); SYSCTL_ADD_INT(ctx, children, OID_AUTO, "rx_big_cnt", CTLFLAG_RD, &sc->rx_big.cnt, 0, "rx_small_cnt"); } /* copy an array of mcp_kreq_ether_send_t's to the mcp. Copy backwards one at a time and handle ring wraps */ static inline void -myri10ge_submit_req_backwards(myri10ge_tx_buf_t *tx, +mxge_submit_req_backwards(mxge_tx_buf_t *tx, mcp_kreq_ether_send_t *src, int cnt) { int idx, starting_slot; starting_slot = tx->req; while (cnt > 1) { cnt--; idx = (starting_slot + cnt) & tx->mask; - myri10ge_pio_copy(&tx->lanai[idx], - &src[cnt], sizeof(*src)); + mxge_pio_copy(&tx->lanai[idx], + &src[cnt], sizeof(*src)); mb(); } } /* * copy an array of mcp_kreq_ether_send_t's to the mcp. Copy * at most 32 bytes at a time, so as to avoid involving the software * pio handler in the nic. We re-write the first segment's flags * to mark them valid only after writing the entire chain */ static inline void -myri10ge_submit_req(myri10ge_tx_buf_t *tx, mcp_kreq_ether_send_t *src, +mxge_submit_req(mxge_tx_buf_t *tx, mcp_kreq_ether_send_t *src, int cnt) { int idx, i; uint32_t *src_ints; volatile uint32_t *dst_ints; mcp_kreq_ether_send_t *srcp; volatile mcp_kreq_ether_send_t *dstp, *dst; idx = tx->req & tx->mask; - src->flags &= ~(htobe16(MYRI10GE_MCP_ETHER_FLAGS_VALID)); + src->flags &= ~(htobe16(MXGE_MCP_ETHER_FLAGS_VALID)); mb(); dst = dstp = &tx->lanai[idx]; srcp = src; if ((idx + cnt) < tx->mask) { for (i = 0; i < (cnt - 1); i += 2) { - myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src)); + mxge_pio_copy(dstp, srcp, 2 * sizeof(*src)); mb(); /* force write every 32 bytes */ srcp += 2; dstp += 2; } } else { /* submit all but the first request, and ensure that it is submitted below */ - myri10ge_submit_req_backwards(tx, src, cnt); + mxge_submit_req_backwards(tx, src, cnt); i = 0; } if (i < cnt) { /* submit the first request */ - myri10ge_pio_copy(dstp, srcp, sizeof(*src)); + mxge_pio_copy(dstp, srcp, sizeof(*src)); mb(); /* barrier before setting valid flag */ } /* re-write the last 32-bits with the valid flags */ - src->flags |= htobe16(MYRI10GE_MCP_ETHER_FLAGS_VALID); + src->flags |= htobe16(MXGE_MCP_ETHER_FLAGS_VALID); src_ints = (uint32_t *)src; src_ints+=3; dst_ints = (volatile uint32_t *)dst; dst_ints+=3; *dst_ints = *src_ints; tx->req += cnt; mb(); } static inline void -myri10ge_submit_req_wc(myri10ge_tx_buf_t *tx, - mcp_kreq_ether_send_t *src, int cnt) +mxge_submit_req_wc(mxge_tx_buf_t *tx, mcp_kreq_ether_send_t *src, int cnt) { tx->req += cnt; mb(); while (cnt >= 4) { - myri10ge_pio_copy((volatile char *)tx->wc_fifo, src, 64); + mxge_pio_copy((volatile char *)tx->wc_fifo, src, 64); mb(); src += 4; cnt -= 4; } if (cnt > 0) { /* pad it to 64 bytes. The src is 64 bytes bigger than it needs to be so that we don't overrun it */ - myri10ge_pio_copy(tx->wc_fifo + (cnt<<18), src, 64); + mxge_pio_copy(tx->wc_fifo + (cnt<<18), src, 64); mb(); } } static void -myri10ge_encap(myri10ge_softc_t *sc, struct mbuf *m) +mxge_encap(mxge_softc_t *sc, struct mbuf *m) { mcp_kreq_ether_send_t *req; - bus_dma_segment_t seg_list[MYRI10GE_MCP_ETHER_MAX_SEND_DESC]; + bus_dma_segment_t seg_list[MXGE_MCP_ETHER_MAX_SEND_DESC]; bus_dma_segment_t *seg; struct mbuf *m_tmp; struct ifnet *ifp; - myri10ge_tx_buf_t *tx; + mxge_tx_buf_t *tx; struct ether_header *eh; struct ip *ip; int cnt, cum_len, err, i, idx; uint16_t flags, pseudo_hdr_offset; uint8_t cksum_offset; ifp = sc->ifp; tx = &sc->tx; /* (try to) map the frame for DMA */ idx = tx->req & tx->mask; err = bus_dmamap_load_mbuf_sg(tx->dmat, tx->info[idx].map, m, seg_list, &cnt, BUS_DMA_NOWAIT); if (err == EFBIG) { /* Too many segments in the chain. Try to defrag */ m_tmp = m_defrag(m, M_NOWAIT); if (m_tmp == NULL) { goto drop; } m = m_tmp; err = bus_dmamap_load_mbuf_sg(tx->dmat, tx->info[idx].map, m, seg_list, &cnt, BUS_DMA_NOWAIT); } if (err != 0) { device_printf(sc->dev, "bus_dmamap_load_mbuf_sg returned %d\n", err); goto drop; } bus_dmamap_sync(tx->dmat, tx->info[idx].map, BUS_DMASYNC_PREWRITE); req = tx->req_list; cksum_offset = 0; - flags = htobe16(MYRI10GE_MCP_ETHER_FLAGS_VALID | - MYRI10GE_MCP_ETHER_FLAGS_NOT_LAST); + flags = htobe16(MXGE_MCP_ETHER_FLAGS_VALID | + MXGE_MCP_ETHER_FLAGS_NOT_LAST); /* checksum offloading? */ if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { eh = mtod(m, struct ether_header *); ip = (struct ip *) (eh + 1); cksum_offset = sizeof(*eh) + (ip->ip_hl << 2); pseudo_hdr_offset = cksum_offset + m->m_pkthdr.csum_data; req->pseudo_hdr_offset = htobe16(pseudo_hdr_offset); req->cksum_offset = cksum_offset; - flags |= htobe16(MYRI10GE_MCP_ETHER_FLAGS_CKSUM); + flags |= htobe16(MXGE_MCP_ETHER_FLAGS_CKSUM); } if (m->m_pkthdr.len < 512) - req->flags = htobe16(MYRI10GE_MCP_ETHER_FLAGS_FIRST | - MYRI10GE_MCP_ETHER_FLAGS_SMALL); + req->flags = htobe16(MXGE_MCP_ETHER_FLAGS_FIRST | + MXGE_MCP_ETHER_FLAGS_SMALL); else - req->flags = htobe16(MYRI10GE_MCP_ETHER_FLAGS_FIRST); + req->flags = htobe16(MXGE_MCP_ETHER_FLAGS_FIRST); /* convert segments into a request list */ cum_len = 0; seg = seg_list; for (i = 0; i < cnt; i++) { req->addr_low = - htobe32(MYRI10GE_LOWPART_TO_U32(seg->ds_addr)); + htobe32(MXGE_LOWPART_TO_U32(seg->ds_addr)); req->addr_high = - htobe32(MYRI10GE_HIGHPART_TO_U32(seg->ds_addr)); + htobe32(MXGE_HIGHPART_TO_U32(seg->ds_addr)); req->length = htobe16(seg->ds_len); req->cksum_offset = cksum_offset; if (cksum_offset > seg->ds_len) cksum_offset -= seg->ds_len; else cksum_offset = 0; req->flags |= flags | ((cum_len & 1) * - htobe16(MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD)); + htobe16(MXGE_MCP_ETHER_FLAGS_ALIGN_ODD)); cum_len += seg->ds_len; seg++; req++; req->flags = 0; } req--; /* pad runts to 60 bytes */ if (cum_len < 60) { req++; req->addr_low = - htobe32(MYRI10GE_LOWPART_TO_U32(sc->zeropad_dma.bus_addr)); + htobe32(MXGE_LOWPART_TO_U32(sc->zeropad_dma.bus_addr)); req->addr_high = - htobe32(MYRI10GE_HIGHPART_TO_U32(sc->zeropad_dma.bus_addr)); + htobe32(MXGE_HIGHPART_TO_U32(sc->zeropad_dma.bus_addr)); req->length = htobe16(60 - cum_len); req->cksum_offset = cksum_offset; req->flags |= flags | ((cum_len & 1) * - htobe16(MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD)); + htobe16(MXGE_MCP_ETHER_FLAGS_ALIGN_ODD)); cnt++; } - req->flags &= ~(htobe16(MYRI10GE_MCP_ETHER_FLAGS_NOT_LAST)); + req->flags &= ~(htobe16(MXGE_MCP_ETHER_FLAGS_NOT_LAST)); tx->info[idx].m = m; if (tx->wc_fifo == NULL) - myri10ge_submit_req(tx, tx->req_list, cnt); + mxge_submit_req(tx, tx->req_list, cnt); else - myri10ge_submit_req_wc(tx, tx->req_list, cnt); + mxge_submit_req_wc(tx, tx->req_list, cnt); return; drop: m_freem(m); ifp->if_oerrors++; return; } static void -myri10ge_start_locked(myri10ge_softc_t *sc) +mxge_start_locked(mxge_softc_t *sc) { int avail; struct mbuf *m; struct ifnet *ifp; ifp = sc->ifp; while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { /* dequeue the packet */ IFQ_DRV_DEQUEUE(&ifp->if_snd, m); /* let BPF see it */ BPF_MTAP(ifp, m); /* give it to the nic */ - myri10ge_encap(sc, m); + mxge_encap(sc, m); /* leave an extra slot keep the ring from wrapping */ avail = sc->tx.mask - (sc->tx.req - sc->tx.done); - if (avail < MYRI10GE_MCP_ETHER_MAX_SEND_DESC) { + if (avail < MXGE_MCP_ETHER_MAX_SEND_DESC) { sc->ifp->if_drv_flags |= IFF_DRV_OACTIVE; return; } } } static void -myri10ge_start(struct ifnet *ifp) +mxge_start(struct ifnet *ifp) { - myri10ge_softc_t *sc = ifp->if_softc; + mxge_softc_t *sc = ifp->if_softc; mtx_lock(&sc->tx_lock); - myri10ge_start_locked(sc); + mxge_start_locked(sc); mtx_unlock(&sc->tx_lock); } static int -myri10ge_get_buf_small(myri10ge_softc_t *sc, bus_dmamap_t map, int idx) +mxge_get_buf_small(mxge_softc_t *sc, bus_dmamap_t map, int idx) { bus_dma_segment_t seg; struct mbuf *m; - myri10ge_rx_buf_t *rx = &sc->rx_small; + mxge_rx_buf_t *rx = &sc->rx_small; int cnt, err; m = m_gethdr(M_DONTWAIT, MT_DATA); if (m == NULL) { rx->alloc_fail++; err = ENOBUFS; goto done; } m->m_len = MHLEN; err = bus_dmamap_load_mbuf_sg(rx->dmat, map, m, &seg, &cnt, BUS_DMA_NOWAIT); if (err != 0) { m_free(m); goto done; } rx->info[idx].m = m; rx->shadow[idx].addr_low = - htobe32(MYRI10GE_LOWPART_TO_U32(seg.ds_addr)); + htobe32(MXGE_LOWPART_TO_U32(seg.ds_addr)); rx->shadow[idx].addr_high = - htobe32(MYRI10GE_HIGHPART_TO_U32(seg.ds_addr)); + htobe32(MXGE_HIGHPART_TO_U32(seg.ds_addr)); done: if ((idx & 7) == 7) { - myri10ge_pio_copy(&rx->lanai[idx - 7], - &rx->shadow[idx - 7], - 8 * sizeof (*rx->lanai)); + mxge_pio_copy(&rx->lanai[idx - 7], &rx->shadow[idx - 7], + 8 * sizeof (*rx->lanai)); mb(); } return err; } static int -myri10ge_get_buf_big(myri10ge_softc_t *sc, bus_dmamap_t map, int idx) +mxge_get_buf_big(mxge_softc_t *sc, bus_dmamap_t map, int idx) { bus_dma_segment_t seg; struct mbuf *m; - myri10ge_rx_buf_t *rx = &sc->rx_big; + mxge_rx_buf_t *rx = &sc->rx_big; int cnt, err; m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, sc->big_bytes); if (m == NULL) { rx->alloc_fail++; err = ENOBUFS; goto done; } m->m_len = sc->big_bytes; err = bus_dmamap_load_mbuf_sg(rx->dmat, map, m, &seg, &cnt, BUS_DMA_NOWAIT); if (err != 0) { m_free(m); goto done; } rx->info[idx].m = m; rx->shadow[idx].addr_low = - htobe32(MYRI10GE_LOWPART_TO_U32(seg.ds_addr)); + htobe32(MXGE_LOWPART_TO_U32(seg.ds_addr)); rx->shadow[idx].addr_high = - htobe32(MYRI10GE_HIGHPART_TO_U32(seg.ds_addr)); + htobe32(MXGE_HIGHPART_TO_U32(seg.ds_addr)); done: if ((idx & 7) == 7) { - myri10ge_pio_copy(&rx->lanai[idx - 7], + mxge_pio_copy(&rx->lanai[idx - 7], &rx->shadow[idx - 7], 8 * sizeof (*rx->lanai)); mb(); } return err; } static inline void -myri10ge_rx_done_big(myri10ge_softc_t *sc, int len, int csum, int flags) +mxge_rx_done_big(mxge_softc_t *sc, int len, int csum, int flags) { struct ifnet *ifp; struct mbuf *m = 0; /* -Wunitialized */ struct mbuf *m_prev = 0; /* -Wunitialized */ struct mbuf *m_head = 0; bus_dmamap_t old_map; - myri10ge_rx_buf_t *rx; + mxge_rx_buf_t *rx; int idx; rx = &sc->rx_big; ifp = sc->ifp; while (len > 0) { idx = rx->cnt & rx->mask; rx->cnt++; /* save a pointer to the received mbuf */ m = rx->info[idx].m; /* try to replace the received mbuf */ - if (myri10ge_get_buf_big(sc, rx->extra_map, idx)) { + if (mxge_get_buf_big(sc, rx->extra_map, idx)) { goto drop; } /* unmap the received buffer */ old_map = rx->info[idx].map; bus_dmamap_sync(rx->dmat, old_map, BUS_DMASYNC_POSTREAD); bus_dmamap_unload(rx->dmat, old_map); /* swap the bus_dmamap_t's */ rx->info[idx].map = rx->extra_map; rx->extra_map = old_map; /* chain multiple segments together */ if (!m_head) { m_head = m; /* mcp implicitly skips 1st bytes so that * packet is properly aligned */ - m->m_data += MYRI10GE_MCP_ETHER_PAD; + m->m_data += MXGE_MCP_ETHER_PAD; m->m_pkthdr.len = len; - m->m_len = sc->big_bytes - MYRI10GE_MCP_ETHER_PAD; + m->m_len = sc->big_bytes - MXGE_MCP_ETHER_PAD; } else { m->m_len = sc->big_bytes; m->m_flags &= ~M_PKTHDR; m_prev->m_next = m; } len -= m->m_len; m_prev = m; } /* trim trailing garbage from the last mbuf in the chain. If * there is any garbage, len will be negative */ m->m_len += len; /* if the checksum is valid, mark it in the mbuf header */ if (sc->csum_flag & flags) { m_head->m_pkthdr.csum_data = csum; m_head->m_pkthdr.csum_flags = CSUM_DATA_VALID; } /* pass the frame up the stack */ m_head->m_pkthdr.rcvif = ifp; ifp->if_ipackets++; (*ifp->if_input)(ifp, m_head); return; drop: /* drop the frame -- the old mbuf(s) are re-cycled by running every slot through the allocator */ if (m_head) { len -= sc->big_bytes; m_freem(m_head); } else { - len -= (sc->big_bytes + MYRI10GE_MCP_ETHER_PAD); + len -= (sc->big_bytes + MXGE_MCP_ETHER_PAD); } while ((int)len > 0) { idx = rx->cnt & rx->mask; rx->cnt++; m = rx->info[idx].m; - if (0 == (myri10ge_get_buf_big(sc, rx->extra_map, idx))) { + if (0 == (mxge_get_buf_big(sc, rx->extra_map, idx))) { m_freem(m); /* unmap the received buffer */ old_map = rx->info[idx].map; bus_dmamap_sync(rx->dmat, old_map, BUS_DMASYNC_POSTREAD); bus_dmamap_unload(rx->dmat, old_map); /* swap the bus_dmamap_t's */ rx->info[idx].map = rx->extra_map; rx->extra_map = old_map; } len -= sc->big_bytes; } ifp->if_ierrors++; } static inline void -myri10ge_rx_done_small(myri10ge_softc_t *sc, uint32_t len, - uint32_t csum, uint32_t flags) +mxge_rx_done_small(mxge_softc_t *sc, uint32_t len, + uint32_t csum, uint32_t flags) { struct ifnet *ifp; struct mbuf *m; - myri10ge_rx_buf_t *rx; + mxge_rx_buf_t *rx; bus_dmamap_t old_map; int idx; ifp = sc->ifp; rx = &sc->rx_small; idx = rx->cnt & rx->mask; rx->cnt++; /* save a pointer to the received mbuf */ m = rx->info[idx].m; /* try to replace the received mbuf */ - if (myri10ge_get_buf_small(sc, rx->extra_map, idx)) { + if (mxge_get_buf_small(sc, rx->extra_map, idx)) { /* drop the frame -- the old mbuf is re-cycled */ ifp->if_ierrors++; return; } /* unmap the received buffer */ old_map = rx->info[idx].map; bus_dmamap_sync(rx->dmat, old_map, BUS_DMASYNC_POSTREAD); bus_dmamap_unload(rx->dmat, old_map); /* swap the bus_dmamap_t's */ rx->info[idx].map = rx->extra_map; rx->extra_map = old_map; /* mcp implicitly skips 1st 2 bytes so that packet is properly * aligned */ - m->m_data += MYRI10GE_MCP_ETHER_PAD; + m->m_data += MXGE_MCP_ETHER_PAD; /* if the checksum is valid, mark it in the mbuf header */ if (sc->csum_flag & flags) { m->m_pkthdr.csum_data = csum; m->m_pkthdr.csum_flags = CSUM_DATA_VALID; } /* pass the frame up the stack */ m->m_pkthdr.rcvif = ifp; m->m_len = m->m_pkthdr.len = len; ifp->if_ipackets++; (*ifp->if_input)(ifp, m); } static inline void -myri10ge_tx_done(myri10ge_softc_t *sc, uint32_t mcp_idx) +mxge_tx_done(mxge_softc_t *sc, uint32_t mcp_idx) { struct ifnet *ifp; - myri10ge_tx_buf_t *tx; + mxge_tx_buf_t *tx; struct mbuf *m; bus_dmamap_t map; int idx; tx = &sc->tx; ifp = sc->ifp; while (tx->done != mcp_idx) { idx = tx->done & tx->mask; tx->done++; m = tx->info[idx].m; /* mbuf and DMA map only attached to the first segment per-mbuf */ if (m != NULL) { ifp->if_opackets++; tx->info[idx].m = NULL; map = tx->info[idx].map; bus_dmamap_unload(tx->dmat, map); m_freem(m); } } /* If we have space, clear IFF_OACTIVE to tell the stack that its OK to send packets */ if (ifp->if_drv_flags & IFF_DRV_OACTIVE && tx->req - tx->done < (tx->mask + 1)/4) { mtx_lock(&sc->tx_lock); ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - myri10ge_start_locked(sc); + mxge_start_locked(sc); mtx_unlock(&sc->tx_lock); } } static void -myri10ge_dump_interrupt_queues(myri10ge_softc_t *sc, int maxslot) +mxge_dump_interrupt_queues(mxge_softc_t *sc, int maxslot) { int intrq, slot, type; static int call_cnt = 0; /* only do it a few times to avoid filling the message buffer */ if (call_cnt > 10) return; call_cnt++; device_printf(sc->dev, "--------- Dumping interrupt queue state ----- \n"); device_printf(sc->dev, "currently expecting interrupts on queue %d\n", sc->intr.intrq); device_printf(sc->dev, " q slot status \n"); device_printf(sc->dev, "--- ---- -------- \n"); for (intrq = 0; intrq < 2; intrq++) { for (slot = 0; slot <= maxslot; slot++) { type = sc->intr.q[intrq][slot].type; #if 0 if (type == 0 && slot != 0) continue; #endif device_printf(sc->dev, "[%d]:[%d]: type = 0x%x\n", intrq, slot, type); device_printf(sc->dev, "[%d]:[%d]: flag = 0x%x\n", intrq, slot, sc->intr.q[intrq][slot].flag); device_printf(sc->dev, "[%d]:[%d]: index = 0x%x\n", intrq, slot, be16toh(sc->intr.q[intrq][slot].index)); device_printf(sc->dev, "[%d]:[%d]: seqnum = 0x%x\n", intrq, slot, (unsigned int)be32toh(sc->intr.q[intrq][slot].seqnum)); device_printf(sc->dev, "[%d]:[%d]: data0 = 0x%x\n", intrq, slot, (unsigned int)be32toh(sc->intr.q[intrq][slot].data0)); device_printf(sc->dev, "[%d]:[%d]: data1 = 0x%x\n", intrq, slot, (unsigned int)be32toh(sc->intr.q[intrq][slot].data1)); } } } static inline void -myri10ge_claim_irq(myri10ge_softc_t *sc) +mxge_claim_irq(mxge_softc_t *sc) { volatile uint32_t dontcare; *sc->irq_claim = 0; mb(); /* do a PIO read to ensure that PIO write to claim the irq has hit the nic before we exit the interrupt handler */ - if (!myri10ge_skip_pio_read) { + if (!mxge_skip_pio_read) { dontcare = *(volatile uint32_t *)sc->sram; mb(); } } static void -myri10ge_intr(void *arg) +mxge_intr(void *arg) { - myri10ge_softc_t *sc = arg; + mxge_softc_t *sc = arg; int intrq, claimed, flags, count, length, ip_csum; uint32_t raw, slot; uint8_t type; intrq = sc->intr.intrq; claimed = 0; bus_dmamap_sync(sc->intr.dma[intrq].dmat, sc->intr.dma[intrq].map, BUS_DMASYNC_POSTREAD); if (sc->msi_enabled) { /* We know we can immediately claim the interrupt */ - myri10ge_claim_irq(sc); + mxge_claim_irq(sc); claimed = 1; } else { /* Check to see if we have the last event in the queue ready. If so, ack it as early as possible. This allows more time to get the interrupt line de-asserted prior to the EOI and reduces the chance of seeing a spurious irq caused by the interrupt line remaining high after EOI */ slot = be16toh(sc->intr.q[intrq][0].index) - 1; - if (slot < myri10ge_max_intr_slots && + if (slot < mxge_max_intr_slots && sc->intr.q[intrq][slot].type != 0 && sc->intr.q[intrq][slot].flag != 0) { - myri10ge_claim_irq(sc); + mxge_claim_irq(sc); claimed = 1; } } /* walk each slot in the current queue, processing events until we reach an event with a zero type */ - for (slot = sc->intr.slot; slot < myri10ge_max_intr_slots; slot++) { + for (slot = sc->intr.slot; slot < mxge_max_intr_slots; slot++) { type = sc->intr.q[intrq][slot].type; /* check for partially completed DMA of events when using non-MSI interrupts */ if (__predict_false(!claimed)) { mb(); /* look if there is somscing in the queue */ if (type == 0) { /* save the current slot for the next * time we (re-)enter this routine */ if (sc->intr.slot == slot) { sc->intr.spurious++; } sc->intr.slot = slot; return; } } if (__predict_false(htobe32(sc->intr.q[intrq][slot].seqnum) != sc->intr.seqnum++)) { device_printf(sc->dev, "Bad interrupt!\n"); device_printf(sc->dev, "bad irq seqno" "(got 0x%x, expected 0x%x) \n", (unsigned int)htobe32(sc->intr.q[intrq][slot].seqnum), sc->intr.seqnum); device_printf(sc->dev, "intrq = %d, slot = %d\n", intrq, slot); - myri10ge_dump_interrupt_queues(sc, slot); + mxge_dump_interrupt_queues(sc, slot); device_printf(sc->dev, "Disabling futher interrupt handling\n"); bus_teardown_intr(sc->dev, sc->irq_res, sc->ih); sc->ih = NULL; return; } switch (type) { - case MYRI10GE_MCP_INTR_ETHER_SEND_DONE: - myri10ge_tx_done(sc, be32toh(sc->intr.q[intrq][slot].data0)); + case MXGE_MCP_INTR_ETHER_SEND_DONE: + mxge_tx_done(sc, be32toh(sc->intr.q[intrq][slot].data0)); if (__predict_true(sc->intr.q[intrq][slot].data1 == 0)) break; /* check the link state. Don't bother to * byteswap, since it can just be 0 or 1 */ if (sc->link_state != sc->fw_stats->link_up) { sc->link_state = sc->fw_stats->link_up; if (sc->link_state) { if_link_state_change(sc->ifp, LINK_STATE_UP); device_printf(sc->dev, "link up\n"); } else { if_link_state_change(sc->ifp, LINK_STATE_DOWN); device_printf(sc->dev, "link down\n"); } } if (sc->rdma_tags_available != be32toh(sc->fw_stats->rdma_tags_available)) { sc->rdma_tags_available = be32toh(sc->fw_stats->rdma_tags_available); device_printf(sc->dev, "RDMA timed out!" " %d tags left\n", sc->rdma_tags_available); } break; - case MYRI10GE_MCP_INTR_ETHER_RECV_SMALL: + case MXGE_MCP_INTR_ETHER_RECV_SMALL: raw = be32toh(sc->intr.q[intrq][slot].data0); count = 0xff & raw; flags = raw >> 8; raw = be32toh(sc->intr.q[intrq][slot].data1); ip_csum = raw >> 16; length = 0xffff & raw; - myri10ge_rx_done_small(sc, length, ip_csum, + mxge_rx_done_small(sc, length, ip_csum, flags); break; - case MYRI10GE_MCP_INTR_ETHER_RECV_BIG: + case MXGE_MCP_INTR_ETHER_RECV_BIG: raw = be32toh(sc->intr.q[intrq][slot].data0); count = 0xff & raw; flags = raw >> 8; raw = be32toh(sc->intr.q[intrq][slot].data1); ip_csum = raw >> 16; length = 0xffff & raw; - myri10ge_rx_done_big(sc, length, ip_csum, + mxge_rx_done_big(sc, length, ip_csum, flags); break; - case MYRI10GE_MCP_INTR_LINK_CHANGE: + case MXGE_MCP_INTR_LINK_CHANGE: /* not yet implemented in firmware */ break; - case MYRI10GE_MCP_INTR_ETHER_DOWN: + case MXGE_MCP_INTR_ETHER_DOWN: sc->down_cnt++; wakeup(&sc->down_cnt); break; default: device_printf(sc->dev, "Unknown interrupt type %d\n", type); } sc->intr.q[intrq][slot].type = 0; if (sc->intr.q[intrq][slot].flag != 0) { if (!claimed) { - myri10ge_claim_irq(sc); + mxge_claim_irq(sc); } sc->intr.slot = 0; sc->intr.q[intrq][slot].flag = 0; sc->intr.intrq = ((intrq + 1) & 1); return; } } /* we should never be here unless we're on a shared irq and we have not finished setting up the device */ return; } static void -myri10ge_watchdog(struct ifnet *ifp) +mxge_watchdog(struct ifnet *ifp) { printf("%s called\n", __FUNCTION__); } static void -myri10ge_init(void *arg) +mxge_init(void *arg) { } static void -myri10ge_free_mbufs(myri10ge_softc_t *sc) +mxge_free_mbufs(mxge_softc_t *sc) { int i; for (i = 0; i <= sc->rx_big.mask; i++) { if (sc->rx_big.info[i].m == NULL) continue; bus_dmamap_unload(sc->rx_big.dmat, sc->rx_big.info[i].map); m_freem(sc->rx_big.info[i].m); sc->rx_big.info[i].m = NULL; } for (i = 0; i <= sc->rx_big.mask; i++) { if (sc->rx_big.info[i].m == NULL) continue; bus_dmamap_unload(sc->rx_big.dmat, sc->rx_big.info[i].map); m_freem(sc->rx_big.info[i].m); sc->rx_big.info[i].m = NULL; } for (i = 0; i <= sc->tx.mask; i++) { if (sc->tx.info[i].m == NULL) continue; bus_dmamap_unload(sc->tx.dmat, sc->tx.info[i].map); m_freem(sc->tx.info[i].m); sc->tx.info[i].m = NULL; } } static void -myri10ge_free_rings(myri10ge_softc_t *sc) +mxge_free_rings(mxge_softc_t *sc) { int i; if (sc->tx.req_bytes != NULL) { free(sc->tx.req_bytes, M_DEVBUF); } if (sc->rx_small.shadow != NULL) free(sc->rx_small.shadow, M_DEVBUF); if (sc->rx_big.shadow != NULL) free(sc->rx_big.shadow, M_DEVBUF); if (sc->tx.info != NULL) { for (i = 0; i <= sc->tx.mask; i++) { if (sc->tx.info[i].map != NULL) bus_dmamap_destroy(sc->tx.dmat, sc->tx.info[i].map); } free(sc->tx.info, M_DEVBUF); } if (sc->rx_small.info != NULL) { for (i = 0; i <= sc->rx_small.mask; i++) { if (sc->rx_small.info[i].map != NULL) bus_dmamap_destroy(sc->rx_small.dmat, sc->rx_small.info[i].map); } free(sc->rx_small.info, M_DEVBUF); } if (sc->rx_big.info != NULL) { for (i = 0; i <= sc->rx_big.mask; i++) { if (sc->rx_big.info[i].map != NULL) bus_dmamap_destroy(sc->rx_big.dmat, sc->rx_big.info[i].map); } free(sc->rx_big.info, M_DEVBUF); } if (sc->rx_big.extra_map != NULL) bus_dmamap_destroy(sc->rx_big.dmat, sc->rx_big.extra_map); if (sc->rx_small.extra_map != NULL) bus_dmamap_destroy(sc->rx_small.dmat, sc->rx_small.extra_map); if (sc->tx.dmat != NULL) bus_dma_tag_destroy(sc->tx.dmat); if (sc->rx_small.dmat != NULL) bus_dma_tag_destroy(sc->rx_small.dmat); if (sc->rx_big.dmat != NULL) bus_dma_tag_destroy(sc->rx_big.dmat); } static int -myri10ge_alloc_rings(myri10ge_softc_t *sc) +mxge_alloc_rings(mxge_softc_t *sc) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; int tx_ring_size, rx_ring_size; int tx_ring_entries, rx_ring_entries; int i, err; unsigned long bytes; /* get ring sizes */ - err = myri10ge_send_cmd(sc, - MYRI10GE_MCP_CMD_GET_SEND_RING_SIZE, - &cmd); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_GET_SEND_RING_SIZE, &cmd); tx_ring_size = cmd.data0; - err |= myri10ge_send_cmd(sc, - MYRI10GE_MCP_CMD_GET_RX_RING_SIZE, - &cmd); + err |= mxge_send_cmd(sc, MXGE_MCP_CMD_GET_RX_RING_SIZE, &cmd); if (err != 0) { device_printf(sc->dev, "Cannot determine ring sizes\n"); goto abort_with_nothing; } rx_ring_size = cmd.data0; tx_ring_entries = tx_ring_size / sizeof (mcp_kreq_ether_send_t); rx_ring_entries = rx_ring_size / sizeof (mcp_dma_addr_t); sc->ifp->if_snd.ifq_maxlen = tx_ring_entries - 1; sc->ifp->if_snd.ifq_drv_maxlen = sc->ifp->if_snd.ifq_maxlen; sc->tx.mask = tx_ring_entries - 1; sc->rx_small.mask = sc->rx_big.mask = rx_ring_entries - 1; err = ENOMEM; /* allocate the tx request copy block */ bytes = 8 + - sizeof (*sc->tx.req_list) * (MYRI10GE_MCP_ETHER_MAX_SEND_DESC + 4); + sizeof (*sc->tx.req_list) * (MXGE_MCP_ETHER_MAX_SEND_DESC + 4); sc->tx.req_bytes = malloc(bytes, M_DEVBUF, M_WAITOK); if (sc->tx.req_bytes == NULL) goto abort_with_nothing; /* ensure req_list entries are aligned to 8 bytes */ sc->tx.req_list = (mcp_kreq_ether_send_t *) ((unsigned long)(sc->tx.req_bytes + 7) & ~7UL); /* allocate the rx shadow rings */ bytes = rx_ring_entries * sizeof (*sc->rx_small.shadow); sc->rx_small.shadow = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK); if (sc->rx_small.shadow == NULL) goto abort_with_alloc; bytes = rx_ring_entries * sizeof (*sc->rx_big.shadow); sc->rx_big.shadow = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK); if (sc->rx_big.shadow == NULL) goto abort_with_alloc; /* allocate the host info rings */ bytes = tx_ring_entries * sizeof (*sc->tx.info); sc->tx.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK); if (sc->tx.info == NULL) goto abort_with_alloc; bytes = rx_ring_entries * sizeof (*sc->rx_small.info); sc->rx_small.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK); if (sc->rx_small.info == NULL) goto abort_with_alloc; bytes = rx_ring_entries * sizeof (*sc->rx_big.info); sc->rx_big.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK); if (sc->rx_big.info == NULL) goto abort_with_alloc; /* allocate the busdma resources */ err = bus_dma_tag_create(sc->parent_dmat, /* parent */ 1, /* alignment */ sc->tx.boundary, /* boundary */ BUS_SPACE_MAXADDR, /* low */ BUS_SPACE_MAXADDR, /* high */ NULL, NULL, /* filter */ - MYRI10GE_MAX_ETHER_MTU,/* maxsize */ - MYRI10GE_MCP_ETHER_MAX_SEND_DESC,/* num segs */ + MXGE_MAX_ETHER_MTU, /* maxsize */ + MXGE_MCP_ETHER_MAX_SEND_DESC,/* num segs */ sc->tx.boundary, /* maxsegsize */ BUS_DMA_ALLOCNOW, /* flags */ NULL, NULL, /* lock */ &sc->tx.dmat); /* tag */ if (err != 0) { device_printf(sc->dev, "Err %d allocating tx dmat\n", err); goto abort_with_alloc; } err = bus_dma_tag_create(sc->parent_dmat, /* parent */ 1, /* alignment */ 4096, /* boundary */ BUS_SPACE_MAXADDR, /* low */ BUS_SPACE_MAXADDR, /* high */ NULL, NULL, /* filter */ MHLEN, /* maxsize */ 1, /* num segs */ MHLEN, /* maxsegsize */ BUS_DMA_ALLOCNOW, /* flags */ NULL, NULL, /* lock */ &sc->rx_small.dmat); /* tag */ if (err != 0) { device_printf(sc->dev, "Err %d allocating rx_small dmat\n", err); goto abort_with_alloc; } err = bus_dma_tag_create(sc->parent_dmat, /* parent */ 1, /* alignment */ 4096, /* boundary */ BUS_SPACE_MAXADDR, /* low */ BUS_SPACE_MAXADDR, /* high */ NULL, NULL, /* filter */ 4096, /* maxsize */ 1, /* num segs */ 4096, /* maxsegsize */ BUS_DMA_ALLOCNOW, /* flags */ NULL, NULL, /* lock */ &sc->rx_big.dmat); /* tag */ if (err != 0) { device_printf(sc->dev, "Err %d allocating rx_big dmat\n", err); goto abort_with_alloc; } /* now use these tags to setup dmamaps for each slot in each ring */ for (i = 0; i <= sc->tx.mask; i++) { err = bus_dmamap_create(sc->tx.dmat, 0, &sc->tx.info[i].map); if (err != 0) { device_printf(sc->dev, "Err %d tx dmamap\n", err); goto abort_with_alloc; } } for (i = 0; i <= sc->rx_small.mask; i++) { err = bus_dmamap_create(sc->rx_small.dmat, 0, &sc->rx_small.info[i].map); if (err != 0) { device_printf(sc->dev, "Err %d rx_small dmamap\n", - err); + err); goto abort_with_alloc; } } err = bus_dmamap_create(sc->rx_small.dmat, 0, &sc->rx_small.extra_map); if (err != 0) { device_printf(sc->dev, "Err %d extra rx_small dmamap\n", err); goto abort_with_alloc; } for (i = 0; i <= sc->rx_big.mask; i++) { err = bus_dmamap_create(sc->rx_big.dmat, 0, &sc->rx_big.info[i].map); if (err != 0) { device_printf(sc->dev, "Err %d rx_big dmamap\n", err); goto abort_with_alloc; } } err = bus_dmamap_create(sc->rx_big.dmat, 0, &sc->rx_big.extra_map); if (err != 0) { device_printf(sc->dev, "Err %d extra rx_big dmamap\n", err); goto abort_with_alloc; } return 0; abort_with_alloc: - myri10ge_free_rings(sc); + mxge_free_rings(sc); abort_with_nothing: return err; } static int -myri10ge_open(myri10ge_softc_t *sc) +mxge_open(mxge_softc_t *sc) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; int i, err; bus_dmamap_t map; - err = myri10ge_reset(sc); + err = mxge_reset(sc); if (err != 0) { device_printf(sc->dev, "failed to reset\n"); return EIO; } if (MCLBYTES >= - sc->ifp->if_mtu + ETHER_HDR_LEN + MYRI10GE_MCP_ETHER_PAD) + sc->ifp->if_mtu + ETHER_HDR_LEN + MXGE_MCP_ETHER_PAD) sc->big_bytes = MCLBYTES; else sc->big_bytes = MJUMPAGESIZE; - err = myri10ge_alloc_rings(sc); + err = mxge_alloc_rings(sc); if (err != 0) { device_printf(sc->dev, "failed to allocate rings\n"); return err; } err = bus_setup_intr(sc->dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, - myri10ge_intr, sc, &sc->ih); + mxge_intr, sc, &sc->ih); if (err != 0) { goto abort_with_rings; } /* get the lanai pointers to the send and receive rings */ - err = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_GET_SEND_OFFSET, &cmd); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_GET_SEND_OFFSET, &cmd); sc->tx.lanai = (volatile mcp_kreq_ether_send_t *)(sc->sram + cmd.data0); - err |= myri10ge_send_cmd(sc, - MYRI10GE_MCP_CMD_GET_SMALL_RX_OFFSET, &cmd); + err |= mxge_send_cmd(sc, + MXGE_MCP_CMD_GET_SMALL_RX_OFFSET, &cmd); sc->rx_small.lanai = (volatile mcp_kreq_ether_recv_t *)(sc->sram + cmd.data0); - err |= myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_GET_BIG_RX_OFFSET, &cmd); + err |= mxge_send_cmd(sc, MXGE_MCP_CMD_GET_BIG_RX_OFFSET, &cmd); sc->rx_big.lanai = (volatile mcp_kreq_ether_recv_t *)(sc->sram + cmd.data0); if (err != 0) { device_printf(sc->dev, "failed to get ring sizes or locations\n"); err = EIO; goto abort_with_irq; } if (sc->wc) { sc->tx.wc_fifo = sc->sram + 0x200000; sc->rx_small.wc_fifo = sc->sram + 0x300000; sc->rx_big.wc_fifo = sc->sram + 0x340000; } else { sc->tx.wc_fifo = 0; sc->rx_small.wc_fifo = 0; sc->rx_big.wc_fifo = 0; } /* stock receive rings */ for (i = 0; i <= sc->rx_small.mask; i++) { map = sc->rx_small.info[i].map; - err = myri10ge_get_buf_small(sc, map, i); + err = mxge_get_buf_small(sc, map, i); if (err) { device_printf(sc->dev, "alloced %d/%d smalls\n", i, sc->rx_small.mask + 1); goto abort; } } for (i = 0; i <= sc->rx_big.mask; i++) { map = sc->rx_big.info[i].map; - err = myri10ge_get_buf_big(sc, map, i); + err = mxge_get_buf_big(sc, map, i); if (err) { device_printf(sc->dev, "alloced %d/%d bigs\n", i, sc->rx_big.mask + 1); goto abort; } } /* Give the firmware the mtu and the big and small buffer sizes. The firmware wants the big buf size to be a power of two. Luckily, FreeBSD's clusters are powers of two */ cmd.data0 = sc->ifp->if_mtu + ETHER_HDR_LEN; - err = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_SET_MTU, &cmd); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_SET_MTU, &cmd); cmd.data0 = MHLEN; - err |= myri10ge_send_cmd(sc, - MYRI10GE_MCP_CMD_SET_SMALL_BUFFER_SIZE, - &cmd); + err |= mxge_send_cmd(sc, MXGE_MCP_CMD_SET_SMALL_BUFFER_SIZE, + &cmd); cmd.data0 = sc->big_bytes; - err |= myri10ge_send_cmd(sc, - MYRI10GE_MCP_CMD_SET_BIG_BUFFER_SIZE, - &cmd); + err |= mxge_send_cmd(sc, MXGE_MCP_CMD_SET_BIG_BUFFER_SIZE, &cmd); /* Now give him the pointer to the stats block */ - cmd.data0 = MYRI10GE_LOWPART_TO_U32(sc->fw_stats_dma.bus_addr); - cmd.data1 = MYRI10GE_HIGHPART_TO_U32(sc->fw_stats_dma.bus_addr); - err = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_SET_STATS_DMA, &cmd); + cmd.data0 = MXGE_LOWPART_TO_U32(sc->fw_stats_dma.bus_addr); + cmd.data1 = MXGE_HIGHPART_TO_U32(sc->fw_stats_dma.bus_addr); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_SET_STATS_DMA, &cmd); if (err != 0) { device_printf(sc->dev, "failed to setup params\n"); goto abort; } /* Finally, start the firmware running */ - err = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_ETHERNET_UP, &cmd); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_ETHERNET_UP, &cmd); if (err) { device_printf(sc->dev, "Couldn't bring up link\n"); goto abort; } sc->ifp->if_drv_flags |= IFF_DRV_RUNNING; sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; return 0; abort: - myri10ge_free_mbufs(sc); + mxge_free_mbufs(sc); abort_with_irq: bus_teardown_intr(sc->dev, sc->irq_res, sc->ih); abort_with_rings: - myri10ge_free_rings(sc); + mxge_free_rings(sc); return err; } static int -myri10ge_close(myri10ge_softc_t *sc) +mxge_close(mxge_softc_t *sc) { - myri10ge_cmd_t cmd; + mxge_cmd_t cmd; int err, old_down_cnt; sc->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; old_down_cnt = sc->down_cnt; mb(); - err = myri10ge_send_cmd(sc, MYRI10GE_MCP_CMD_ETHERNET_DOWN, &cmd); + err = mxge_send_cmd(sc, MXGE_MCP_CMD_ETHERNET_DOWN, &cmd); if (err) { device_printf(sc->dev, "Couldn't bring down link\n"); } if (old_down_cnt == sc->down_cnt) { /* wait for down irq */ - (void)tsleep(&sc->down_cnt, PWAIT, "down myri10ge", hz); + (void)tsleep(&sc->down_cnt, PWAIT, "down mxge", hz); } if (old_down_cnt == sc->down_cnt) { device_printf(sc->dev, "never got down irq\n"); } if (sc->ih != NULL) bus_teardown_intr(sc->dev, sc->irq_res, sc->ih); - myri10ge_free_mbufs(sc); - myri10ge_free_rings(sc); + mxge_free_mbufs(sc); + mxge_free_rings(sc); return 0; } static int -myri10ge_media_change(struct ifnet *ifp) +mxge_media_change(struct ifnet *ifp) { return EINVAL; } static int -myri10ge_change_mtu(myri10ge_softc_t *sc, int mtu) +mxge_change_mtu(mxge_softc_t *sc, int mtu) { struct ifnet *ifp = sc->ifp; int real_mtu, old_mtu; int err = 0; real_mtu = mtu + ETHER_HDR_LEN; - if ((real_mtu > MYRI10GE_MAX_ETHER_MTU) || + if ((real_mtu > MXGE_MAX_ETHER_MTU) || real_mtu < 60) return EINVAL; sx_xlock(&sc->driver_lock); old_mtu = ifp->if_mtu; ifp->if_mtu = mtu; if (ifp->if_drv_flags & IFF_DRV_RUNNING) { - myri10ge_close(sc); - err = myri10ge_open(sc); + mxge_close(sc); + err = mxge_open(sc); if (err != 0) { ifp->if_mtu = old_mtu; - myri10ge_close(sc); - (void) myri10ge_open(sc); + mxge_close(sc); + (void) mxge_open(sc); } } sx_xunlock(&sc->driver_lock); return err; } static void -myri10ge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) +mxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) { - myri10ge_softc_t *sc = ifp->if_softc; + mxge_softc_t *sc = ifp->if_softc; if (sc == NULL) return; ifmr->ifm_status = IFM_AVALID; ifmr->ifm_status |= sc->fw_stats->link_up ? IFM_ACTIVE : 0; ifmr->ifm_active = IFM_AUTO | IFM_ETHER; ifmr->ifm_active |= sc->fw_stats->link_up ? IFM_FDX : 0; } static int -myri10ge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) +mxge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) { - myri10ge_softc_t *sc = ifp->if_softc; + mxge_softc_t *sc = ifp->if_softc; struct ifreq *ifr = (struct ifreq *)data; int err, mask; err = 0; switch (command) { case SIOCSIFADDR: case SIOCGIFADDR: err = ether_ioctl(ifp, command, data); break; case SIOCSIFMTU: - err = myri10ge_change_mtu(sc, ifr->ifr_mtu); + err = mxge_change_mtu(sc, ifr->ifr_mtu); break; case SIOCSIFFLAGS: sx_xlock(&sc->driver_lock); if (ifp->if_flags & IFF_UP) { if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) - err = myri10ge_open(sc); + err = mxge_open(sc); } else { if (ifp->if_drv_flags & IFF_DRV_RUNNING) - myri10ge_close(sc); + mxge_close(sc); } sx_xunlock(&sc->driver_lock); break; case SIOCADDMULTI: case SIOCDELMULTI: err = 0; break; case SIOCSIFCAP: sx_xlock(&sc->driver_lock); mask = ifr->ifr_reqcap ^ ifp->if_capenable; if (mask & IFCAP_TXCSUM) { if (IFCAP_TXCSUM & ifp->if_capenable) { ifp->if_capenable &= ~IFCAP_TXCSUM; ifp->if_hwassist &= ~(CSUM_TCP | CSUM_UDP); } else { ifp->if_capenable |= IFCAP_TXCSUM; ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); } } else if (mask & IFCAP_RXCSUM) { if (IFCAP_RXCSUM & ifp->if_capenable) { ifp->if_capenable &= ~IFCAP_RXCSUM; - sc->csum_flag &= ~MYRI10GE_MCP_ETHER_FLAGS_CKSUM; + sc->csum_flag &= ~MXGE_MCP_ETHER_FLAGS_CKSUM; } else { ifp->if_capenable |= IFCAP_RXCSUM; - sc->csum_flag |= MYRI10GE_MCP_ETHER_FLAGS_CKSUM; + sc->csum_flag |= MXGE_MCP_ETHER_FLAGS_CKSUM; } } sx_xunlock(&sc->driver_lock); break; case SIOCGIFMEDIA: err = ifmedia_ioctl(ifp, (struct ifreq *)data, &sc->media, command); break; default: err = ENOTTY; } return err; } static void -myri10ge_fetch_tunables(myri10ge_softc_t *sc) +mxge_fetch_tunables(mxge_softc_t *sc) { - TUNABLE_INT_FETCH("hw.myri10ge.flow_control_enabled", - &myri10ge_flow_control); - TUNABLE_INT_FETCH("hw.myri10ge.intr_coal_delay", - &myri10ge_intr_coal_delay); - TUNABLE_INT_FETCH("hw.myri10ge.nvidia_ecrc_enable", - &myri10ge_nvidia_ecrc_enable); - TUNABLE_INT_FETCH("hw.myri10ge.skip_pio_read", - &myri10ge_skip_pio_read); + TUNABLE_INT_FETCH("hw.mxge.flow_control_enabled", + &mxge_flow_control); + TUNABLE_INT_FETCH("hw.mxge.intr_coal_delay", + &mxge_intr_coal_delay); + TUNABLE_INT_FETCH("hw.mxge.nvidia_ecrc_enable", + &mxge_nvidia_ecrc_enable); + TUNABLE_INT_FETCH("hw.mxge.skip_pio_read", + &mxge_skip_pio_read); - if (myri10ge_intr_coal_delay < 0 || - myri10ge_intr_coal_delay > 10*1000) - myri10ge_intr_coal_delay = 30; - sc->pause = myri10ge_flow_control; + if (mxge_intr_coal_delay < 0 || mxge_intr_coal_delay > 10*1000) + mxge_intr_coal_delay = 30; + sc->pause = mxge_flow_control; } static int -myri10ge_attach(device_t dev) +mxge_attach(device_t dev) { - myri10ge_softc_t *sc = device_get_softc(dev); + mxge_softc_t *sc = device_get_softc(dev); struct ifnet *ifp; size_t bytes; int rid, err, i; uint16_t cmd; sc->dev = dev; - myri10ge_fetch_tunables(sc); + mxge_fetch_tunables(sc); err = bus_dma_tag_create(NULL, /* parent */ 1, /* alignment */ 4096, /* boundary */ BUS_SPACE_MAXADDR, /* low */ BUS_SPACE_MAXADDR, /* high */ NULL, NULL, /* filter */ - MYRI10GE_MAX_ETHER_MTU,/* maxsize */ - MYRI10GE_MCP_ETHER_MAX_SEND_DESC, /* num segs */ + MXGE_MAX_ETHER_MTU, /* maxsize */ + MXGE_MCP_ETHER_MAX_SEND_DESC, /* num segs */ 4096, /* maxsegsize */ 0, /* flags */ NULL, NULL, /* lock */ &sc->parent_dmat); /* tag */ if (err != 0) { device_printf(sc->dev, "Err %d allocating parent dmat\n", err); goto abort_with_nothing; } ifp = sc->ifp = if_alloc(IFT_ETHER); if (ifp == NULL) { device_printf(dev, "can not if_alloc()\n"); err = ENOSPC; goto abort_with_parent_dmat; } mtx_init(&sc->cmd_lock, NULL, MTX_NETWORK_LOCK, MTX_DEF); mtx_init(&sc->tx_lock, device_get_nameunit(dev), MTX_NETWORK_LOCK, MTX_DEF); sx_init(&sc->driver_lock, device_get_nameunit(dev)); /* Enable DMA and Memory space access */ pci_enable_busmaster(dev); cmd = pci_read_config(dev, PCIR_COMMAND, 2); cmd |= PCIM_CMD_MEMEN; pci_write_config(dev, PCIR_COMMAND, cmd, 2); /* Map the board into the kernel */ rid = PCIR_BARS; sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, RF_ACTIVE); if (sc->mem_res == NULL) { device_printf(dev, "could not map memory\n"); err = ENXIO; goto abort_with_lock; } sc->sram = rman_get_virtual(sc->mem_res); sc->sram_size = 2*1024*1024 - (2*(48*1024)+(32*1024)) - 0x100; if (sc->sram_size > rman_get_size(sc->mem_res)) { device_printf(dev, "impossible memory region size %ld\n", rman_get_size(sc->mem_res)); err = ENXIO; goto abort_with_mem_res; } /* make NULL terminated copy of the EEPROM strings section of lanai SRAM */ - bzero(sc->eeprom_strings, MYRI10GE_EEPROM_STRINGS_SIZE); + bzero(sc->eeprom_strings, MXGE_EEPROM_STRINGS_SIZE); bus_space_read_region_1(rman_get_bustag(sc->mem_res), rman_get_bushandle(sc->mem_res), - sc->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE, + sc->sram_size - MXGE_EEPROM_STRINGS_SIZE, sc->eeprom_strings, - MYRI10GE_EEPROM_STRINGS_SIZE - 2); - err = myri10ge_parse_strings(sc); + MXGE_EEPROM_STRINGS_SIZE - 2); + err = mxge_parse_strings(sc); if (err != 0) goto abort_with_mem_res; /* Enable write combining for efficient use of PCIe bus */ - myri10ge_enable_wc(sc); + mxge_enable_wc(sc); /* Allocate the out of band dma memory */ - err = myri10ge_dma_alloc(sc, &sc->cmd_dma, - sizeof (myri10ge_cmd_t), 64); + err = mxge_dma_alloc(sc, &sc->cmd_dma, + sizeof (mxge_cmd_t), 64); if (err != 0) goto abort_with_mem_res; sc->cmd = (mcp_cmd_response_t *) sc->cmd_dma.addr; - err = myri10ge_dma_alloc(sc, &sc->zeropad_dma, 64, 64); + err = mxge_dma_alloc(sc, &sc->zeropad_dma, 64, 64); if (err != 0) goto abort_with_cmd_dma; - err = myri10ge_dma_alloc(sc, &sc->fw_stats_dma, - sizeof (*sc->fw_stats), 64); + err = mxge_dma_alloc(sc, &sc->fw_stats_dma, + sizeof (*sc->fw_stats), 64); if (err != 0) goto abort_with_zeropad_dma; sc->fw_stats = (mcp_stats_t *)sc->fw_stats_dma.addr; /* allocate interrupt queues */ - bytes = myri10ge_max_intr_slots * sizeof (*sc->intr.q[0]); - for (i = 0; i < MYRI10GE_NUM_INTRQS; i++) { - err = myri10ge_dma_alloc(sc, &sc->intr.dma[i], - bytes, 4096); + bytes = mxge_max_intr_slots * sizeof (*sc->intr.q[0]); + for (i = 0; i < MXGE_NUM_INTRQS; i++) { + err = mxge_dma_alloc(sc, &sc->intr.dma[i], bytes, 4096); if (err != 0) goto abort_with_intrq; sc->intr.q[i] = (mcp_slot_t *)sc->intr.dma[i].addr; } /* Add our ithread */ rid = 0; sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE); if (sc->irq_res == NULL) { device_printf(dev, "could not alloc interrupt\n"); goto abort_with_intrq; } /* load the firmware */ - myri10ge_select_firmware(sc); + mxge_select_firmware(sc); - err = myri10ge_load_firmware(sc); + err = mxge_load_firmware(sc); if (err != 0) goto abort_with_irq_res; - err = myri10ge_reset(sc); + err = mxge_reset(sc); if (err != 0) goto abort_with_irq_res; /* hook into the network stack */ if_initname(ifp, device_get_name(dev), device_get_unit(dev)); ifp->if_baudrate = 100000000; ifp->if_capabilities = IFCAP_RXCSUM | IFCAP_TXCSUM; ifp->if_hwassist = CSUM_TCP | CSUM_UDP; ifp->if_capenable = ifp->if_capabilities; - sc->csum_flag |= MYRI10GE_MCP_ETHER_FLAGS_CKSUM; - ifp->if_init = myri10ge_init; + sc->csum_flag |= MXGE_MCP_ETHER_FLAGS_CKSUM; + ifp->if_init = mxge_init; ifp->if_softc = sc; ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = myri10ge_ioctl; - ifp->if_start = myri10ge_start; - ifp->if_watchdog = myri10ge_watchdog; + ifp->if_ioctl = mxge_ioctl; + ifp->if_start = mxge_start; + ifp->if_watchdog = mxge_watchdog; ether_ifattach(ifp, sc->mac_addr); /* ether_ifattach sets mtu to 1500 */ - ifp->if_mtu = MYRI10GE_MAX_ETHER_MTU - ETHER_HDR_LEN; + ifp->if_mtu = MXGE_MAX_ETHER_MTU - ETHER_HDR_LEN; /* Initialise the ifmedia structure */ - ifmedia_init(&sc->media, 0, myri10ge_media_change, - myri10ge_media_status); + ifmedia_init(&sc->media, 0, mxge_media_change, + mxge_media_status); ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL); - myri10ge_add_sysctls(sc); + mxge_add_sysctls(sc); return 0; abort_with_irq_res: bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); abort_with_intrq: - for (i = 0; i < MYRI10GE_NUM_INTRQS; i++) { + for (i = 0; i < MXGE_NUM_INTRQS; i++) { if (sc->intr.q[i] == NULL) continue; sc->intr.q[i] = NULL; - myri10ge_dma_free(&sc->intr.dma[i]); + mxge_dma_free(&sc->intr.dma[i]); } - myri10ge_dma_free(&sc->fw_stats_dma); + mxge_dma_free(&sc->fw_stats_dma); abort_with_zeropad_dma: - myri10ge_dma_free(&sc->zeropad_dma); + mxge_dma_free(&sc->zeropad_dma); abort_with_cmd_dma: - myri10ge_dma_free(&sc->cmd_dma); + mxge_dma_free(&sc->cmd_dma); abort_with_mem_res: bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BARS, sc->mem_res); abort_with_lock: pci_disable_busmaster(dev); mtx_destroy(&sc->cmd_lock); mtx_destroy(&sc->tx_lock); sx_destroy(&sc->driver_lock); if_free(ifp); abort_with_parent_dmat: bus_dma_tag_destroy(sc->parent_dmat); abort_with_nothing: return err; } static int -myri10ge_detach(device_t dev) +mxge_detach(device_t dev) { - myri10ge_softc_t *sc = device_get_softc(dev); + mxge_softc_t *sc = device_get_softc(dev); int i; sx_xlock(&sc->driver_lock); if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING) - myri10ge_close(sc); + mxge_close(sc); sx_xunlock(&sc->driver_lock); ether_ifdetach(sc->ifp); bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); - for (i = 0; i < MYRI10GE_NUM_INTRQS; i++) { + for (i = 0; i < MXGE_NUM_INTRQS; i++) { if (sc->intr.q[i] == NULL) continue; sc->intr.q[i] = NULL; - myri10ge_dma_free(&sc->intr.dma[i]); + mxge_dma_free(&sc->intr.dma[i]); } - myri10ge_dma_free(&sc->fw_stats_dma); - myri10ge_dma_free(&sc->zeropad_dma); - myri10ge_dma_free(&sc->cmd_dma); + mxge_dma_free(&sc->fw_stats_dma); + mxge_dma_free(&sc->zeropad_dma); + mxge_dma_free(&sc->cmd_dma); bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BARS, sc->mem_res); pci_disable_busmaster(dev); mtx_destroy(&sc->cmd_lock); mtx_destroy(&sc->tx_lock); sx_destroy(&sc->driver_lock); if_free(sc->ifp); bus_dma_tag_destroy(sc->parent_dmat); return 0; } static int -myri10ge_shutdown(device_t dev) +mxge_shutdown(device_t dev) { return 0; } /* This file uses Myri10GE driver indentation. Local Variables: c-file-style:"linux" tab-width:8 End: */ Index: head/sys/dev/mxge/if_mxge_var.h =================================================================== --- head/sys/dev/mxge/if_mxge_var.h (revision 159570) +++ head/sys/dev/mxge/if_mxge_var.h (revision 159571) @@ -1,203 +1,203 @@ /******************************************************************************* Copyright (c) 2006, Myricom Inc. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of the Myricom Inc, nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. $FreeBSD$ ***************************************************************************/ -#define MYRI10GE_MAX_ETHER_MTU 9014 +#define MXGE_MAX_ETHER_MTU 9014 -#define MYRI10GE_ETH_STOPPED 0 -#define MYRI10GE_ETH_STOPPING 1 -#define MYRI10GE_ETH_STARTING 2 -#define MYRI10GE_ETH_RUNNING 3 -#define MYRI10GE_ETH_OPEN_FAILED 4 +#define MXGE_ETH_STOPPED 0 +#define MXGE_ETH_STOPPING 1 +#define MXGE_ETH_STARTING 2 +#define MXGE_ETH_RUNNING 3 +#define MXGE_ETH_OPEN_FAILED 4 -#define MYRI10GE_FW_OFFSET 1024*1024 -#define MYRI10GE_EEPROM_STRINGS_SIZE 256 -#define MYRI10GE_NUM_INTRQS 2 +#define MXGE_FW_OFFSET 1024*1024 +#define MXGE_EEPROM_STRINGS_SIZE 256 +#define MXGE_NUM_INTRQS 2 typedef struct { void *addr; bus_addr_t bus_addr; bus_dma_tag_t dmat; bus_dmamap_t map; -} myri10ge_dma_t; +} mxge_dma_t; -typedef struct myri10ge_intrq +typedef struct mxge_intrq { - mcp_slot_t *q[MYRI10GE_NUM_INTRQS]; + mcp_slot_t *q[MXGE_NUM_INTRQS]; int intrq; int slot; int maxslots; uint32_t seqnum; uint32_t spurious; uint32_t cnt; - myri10ge_dma_t dma[MYRI10GE_NUM_INTRQS]; -} myri10ge_intrq_t; + mxge_dma_t dma[MXGE_NUM_INTRQS]; +} mxge_intrq_t; typedef struct { uint32_t data0; uint32_t data1; uint32_t data2; -} myri10ge_cmd_t; +} mxge_cmd_t; -struct myri10ge_buffer_state { +struct mxge_buffer_state { struct mbuf *m; bus_dmamap_t map; }; typedef struct { volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */ volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */ mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */ - struct myri10ge_buffer_state *info; + struct mxge_buffer_state *info; bus_dma_tag_t dmat; bus_dmamap_t extra_map; int cnt; int alloc_fail; int mask; /* number of rx slots -1 */ -} myri10ge_rx_buf_t; +} mxge_rx_buf_t; typedef struct { volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */ volatile uint8_t *wc_fifo; /* w/c send fifo address */ mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */ char *req_bytes; - struct myri10ge_buffer_state *info; + struct mxge_buffer_state *info; bus_dma_tag_t dmat; int req; /* transmits submitted */ int mask; /* number of transmit slots -1 */ int done; /* transmits completed */ int boundary; /* boundary transmits cannot cross*/ -} myri10ge_tx_buf_t; +} mxge_tx_buf_t; typedef struct { struct ifnet* ifp; int big_bytes; struct mtx tx_lock; int csum_flag; /* rx_csums? */ uint8_t mac_addr[6]; /* eeprom mac address */ - myri10ge_tx_buf_t tx; /* transmit ring */ - myri10ge_rx_buf_t rx_small; - myri10ge_rx_buf_t rx_big; + mxge_tx_buf_t tx; /* transmit ring */ + mxge_rx_buf_t rx_small; + mxge_rx_buf_t rx_big; bus_dma_tag_t parent_dmat; volatile uint8_t *sram; int sram_size; volatile uint32_t *irq_claim; char *mac_addr_string; char *product_code_string; mcp_cmd_response_t *cmd; - myri10ge_dma_t cmd_dma; - myri10ge_dma_t zeropad_dma; + mxge_dma_t cmd_dma; + mxge_dma_t zeropad_dma; mcp_stats_t *fw_stats; - myri10ge_dma_t fw_stats_dma; + mxge_dma_t fw_stats_dma; struct pci_dev *pdev; int msi_enabled; - myri10ge_intrq_t intr; + mxge_intrq_t intr; int link_state; unsigned int rdma_tags_available; int intr_coal_delay; int wc; struct mtx cmd_lock; struct sx driver_lock; int wake_queue; int stop_queue; int down_cnt; int watchdog_resets; int tx_defragged; int pause; struct resource *mem_res; struct resource *irq_res; void *ih; char *fw_name; - char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE]; + char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE]; char fw_version[128]; device_t dev; struct ifmedia media; -} myri10ge_softc_t; +} mxge_softc_t; -#define MYRI10GE_PCI_VENDOR_MYRICOM 0x14c1 -#define MYRI10GE_PCI_DEVICE_Z8E 0x0008 +#define MXGE_PCI_VENDOR_MYRICOM 0x14c1 +#define MXGE_PCI_DEVICE_Z8E 0x0008 -#define MYRI10GE_HIGHPART_TO_U32(X) \ +#define MXGE_HIGHPART_TO_U32(X) \ (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0) -#define MYRI10GE_LOWPART_TO_U32(X) ((uint32_t)(X)) +#define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X)) /* implement our own memory barriers, since bus_space_barrier cannot handle write-combining regions */ #if defined (__GNUC__) #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ #define mb() __asm__ __volatile__ ("sfence;": : :"memory") #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9 #define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") #elif #cpu(sparc) || defined sparc || defined __sparc__ #define mb() __asm__ __volatile__ ("stbar;": : :"memory") #else #define mb() /* XXX just to make this compile */ #endif #else #error "unknown compiler" #endif static inline void -myri10ge_pio_copy(volatile void *to_v, void *from_v, size_t size) +mxge_pio_copy(volatile void *to_v, void *from_v, size_t size) { register volatile uintptr_t *to; volatile uintptr_t *from; size_t i; to = (volatile uintptr_t *) to_v; from = from_v; for (i = (size / sizeof (uintptr_t)); i; i--) { *to = *from; to++; from++; } } /* This file uses Myri10GE driver indentation. Local Variables: c-file-style:"linux" tab-width:8 End: */ Index: head/sys/dev/mxge/mxge_mcp.h =================================================================== --- head/sys/dev/mxge/mxge_mcp.h (revision 159570) +++ head/sys/dev/mxge/mxge_mcp.h (revision 159571) @@ -1,265 +1,265 @@ /******************************************************************************* Copyright (c) 2006, Myricom Inc. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of the Myricom Inc, nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. $FreeBSD$ ***************************************************************************/ -#ifndef _myri10ge_mcp_h -#define _myri10ge_mcp_h +#ifndef _mxge_mcp_h +#define _mxge_mcp_h -#ifdef MYRI10GE_MCP +#ifdef MXGE_MCP typedef signed char int8_t; typedef signed short int16_t; typedef signed int int32_t; typedef signed long long int64_t; typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; typedef unsigned long long uint64_t; #endif /* 8 Bytes */ typedef struct { uint32_t high; uint32_t low; } mcp_dma_addr_t; /* 16 Bytes */ typedef struct { uint32_t data0; uint32_t data1; uint32_t seqnum; uint16_t index; uint8_t flag; uint8_t type; } mcp_slot_t; /* 64 Bytes */ typedef struct { uint32_t cmd; uint32_t data0; /* will be low portion if data > 32 bits */ /* 8 */ uint32_t data1; /* will be high portion if data > 32 bits */ uint32_t data2; /* currently unused.. */ /* 16 */ mcp_dma_addr_t response_addr; /* 24 */ uint8_t pad[40]; } mcp_cmd_t; /* 8 Bytes */ typedef struct { uint32_t data; uint32_t result; } mcp_cmd_response_t; /* flags used in mcp_kreq_ether_send_t: The SMALL flag is only needed in the first segment. It is raised for packets that are total less or equal 512 bytes. The CKSUM flag must be set in all segments. The PADDED flags is set if the packet needs to be padded, and it must be set for all segments. - The MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative + The MXGE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative length of all previous segments was odd. */ -#define MYRI10GE_MCP_ETHER_FLAGS_VALID 0x1 -#define MYRI10GE_MCP_ETHER_FLAGS_FIRST 0x2 -#define MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4 -#define MYRI10GE_MCP_ETHER_FLAGS_CKSUM 0x8 -#define MYRI10GE_MCP_ETHER_FLAGS_SMALL 0x10 -#define MYRI10GE_MCP_ETHER_FLAGS_NOT_LAST 0x100 -#define MYRI10GE_MCP_ETHER_FLAGS_TSO_HDR 0x200 -#define MYRI10GE_MCP_ETHER_FLAGS_TSO 0x400 +#define MXGE_MCP_ETHER_FLAGS_VALID 0x1 +#define MXGE_MCP_ETHER_FLAGS_FIRST 0x2 +#define MXGE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4 +#define MXGE_MCP_ETHER_FLAGS_CKSUM 0x8 +#define MXGE_MCP_ETHER_FLAGS_SMALL 0x10 +#define MXGE_MCP_ETHER_FLAGS_NOT_LAST 0x100 +#define MXGE_MCP_ETHER_FLAGS_TSO_HDR 0x200 +#define MXGE_MCP_ETHER_FLAGS_TSO 0x400 -#define MYRI10GE_MCP_ETHER_SEND_SMALL_SIZE 1520 -#define MYRI10GE_MCP_ETHER_MAX_MTU 9400 +#define MXGE_MCP_ETHER_SEND_SMALL_SIZE 1520 +#define MXGE_MCP_ETHER_MAX_MTU 9400 typedef union mcp_pso_or_cumlen { uint16_t pseudo_hdr_offset; uint16_t cum_len; } mcp_pso_or_cumlen_t; -#define MYRI10GE_MCP_ETHER_MAX_SEND_DESC 12 -#define MYRI10GE_MCP_ETHER_PAD 2 +#define MXGE_MCP_ETHER_MAX_SEND_DESC 12 +#define MXGE_MCP_ETHER_PAD 2 /* 16 Bytes */ typedef struct { uint32_t addr_high; uint32_t addr_low; uint16_t length; uint8_t pad; uint8_t cksum_offset; /* where to start computing cksum */ uint16_t pseudo_hdr_offset; uint16_t flags; /* as defined above */ } mcp_kreq_ether_send_t; /* 8 Bytes */ typedef struct { uint32_t addr_high; uint32_t addr_low; } mcp_kreq_ether_recv_t; /* Commands */ -#define MYRI10GE_MCP_CMD_OFFSET 0xf80000 +#define MXGE_MCP_CMD_OFFSET 0xf80000 typedef enum { - MYRI10GE_MCP_CMD_NONE = 0, + MXGE_MCP_CMD_NONE = 0, /* Reset the mcp, it is left in a safe state, waiting for the driver to set all its parameters */ - MYRI10GE_MCP_CMD_RESET, + MXGE_MCP_CMD_RESET, /* get the version number of the current firmware.. (may be available in the eeprom strings..? */ - MYRI10GE_MCP_GET_MCP_VERSION, + MXGE_MCP_GET_MCP_VERSION, /* Parameters which must be set by the driver before it can - issue MYRI10GE_MCP_CMD_ETHERNET_UP. They persist until the next - MYRI10GE_MCP_CMD_RESET is issued */ + issue MXGE_MCP_CMD_ETHERNET_UP. They persist until the next + MXGE_MCP_CMD_RESET is issued */ - MYRI10GE_MCP_CMD_SET_INTRQ0_DMA, - MYRI10GE_MCP_CMD_SET_INTRQ1_DMA, - MYRI10GE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */ - MYRI10GE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */ + MXGE_MCP_CMD_SET_INTRQ0_DMA, + MXGE_MCP_CMD_SET_INTRQ1_DMA, + MXGE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */ + MXGE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */ /* Parameters which refer to lanai SRAM addresses where the driver must issue PIO writes for various things */ - MYRI10GE_MCP_CMD_GET_SEND_OFFSET, - MYRI10GE_MCP_CMD_GET_SMALL_RX_OFFSET, - MYRI10GE_MCP_CMD_GET_BIG_RX_OFFSET, - MYRI10GE_MCP_CMD_GET_IRQ_ACK_OFFSET, - MYRI10GE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET, - MYRI10GE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET, + MXGE_MCP_CMD_GET_SEND_OFFSET, + MXGE_MCP_CMD_GET_SMALL_RX_OFFSET, + MXGE_MCP_CMD_GET_BIG_RX_OFFSET, + MXGE_MCP_CMD_GET_IRQ_ACK_OFFSET, + MXGE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET, + MXGE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET, /* Parameters which refer to rings stored on the MCP, and whose size is controlled by the mcp */ - MYRI10GE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */ - MYRI10GE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */ + MXGE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */ + MXGE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */ /* Parameters which refer to rings stored in the host, and whose size is controlled by the host. Note that all must be physically contiguous and must contain a power of 2 number of entries. */ - MYRI10GE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */ + MXGE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */ /* command to bring ethernet interface up. Above parameters (plus mtu & mac address) must have been exchanged prior to issuing this command */ - MYRI10GE_MCP_CMD_ETHERNET_UP, + MXGE_MCP_CMD_ETHERNET_UP, /* command to bring ethernet interface down. No further sends - or receives may be processed until an MYRI10GE_MCP_CMD_ETHERNET_UP + or receives may be processed until an MXGE_MCP_CMD_ETHERNET_UP is issued, and all interrupt queues must be flushed prior to ack'ing this command */ - MYRI10GE_MCP_CMD_ETHERNET_DOWN, + MXGE_MCP_CMD_ETHERNET_DOWN, /* commands the driver may issue live, without resetting the nic. Note that increasing the mtu "live" should only be done if the driver has already supplied buffers sufficiently large to handle the new mtu. Decreasing the mtu live is safe */ - MYRI10GE_MCP_CMD_SET_MTU, - MYRI10GE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */ - MYRI10GE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */ - MYRI10GE_MCP_CMD_SET_STATS_DMA, + MXGE_MCP_CMD_SET_MTU, + MXGE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */ + MXGE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */ + MXGE_MCP_CMD_SET_STATS_DMA, - MYRI10GE_MCP_ENABLE_PROMISC, - MYRI10GE_MCP_DISABLE_PROMISC, - MYRI10GE_MCP_SET_MAC_ADDRESS, + MXGE_MCP_ENABLE_PROMISC, + MXGE_MCP_DISABLE_PROMISC, + MXGE_MCP_SET_MAC_ADDRESS, - MYRI10GE_MCP_ENABLE_FLOW_CONTROL, - MYRI10GE_MCP_DISABLE_FLOW_CONTROL -} myri10ge_mcp_cmd_type_t; + MXGE_MCP_ENABLE_FLOW_CONTROL, + MXGE_MCP_DISABLE_FLOW_CONTROL +} mxge_mcp_cmd_type_t; typedef enum { - MYRI10GE_MCP_CMD_OK = 0, - MYRI10GE_MCP_CMD_UNKNOWN, - MYRI10GE_MCP_CMD_ERROR_RANGE, - MYRI10GE_MCP_CMD_ERROR_BUSY, - MYRI10GE_MCP_CMD_ERROR_EMPTY, - MYRI10GE_MCP_CMD_ERROR_CLOSED, - MYRI10GE_MCP_CMD_ERROR_HASH_ERROR, - MYRI10GE_MCP_CMD_ERROR_BAD_PORT, - MYRI10GE_MCP_CMD_ERROR_RESOURCES -} myri10ge_mcp_cmd_status_t; + MXGE_MCP_CMD_OK = 0, + MXGE_MCP_CMD_UNKNOWN, + MXGE_MCP_CMD_ERROR_RANGE, + MXGE_MCP_CMD_ERROR_BUSY, + MXGE_MCP_CMD_ERROR_EMPTY, + MXGE_MCP_CMD_ERROR_CLOSED, + MXGE_MCP_CMD_ERROR_HASH_ERROR, + MXGE_MCP_CMD_ERROR_BAD_PORT, + MXGE_MCP_CMD_ERROR_RESOURCES +} mxge_mcp_cmd_status_t; typedef enum { - MYRI10GE_MCP_INTR_NONE = 0, - MYRI10GE_MCP_INTR_ETHER_SEND_DONE, - MYRI10GE_MCP_INTR_ETHER_RECV_SMALL, - MYRI10GE_MCP_INTR_ETHER_RECV_BIG, - MYRI10GE_MCP_INTR_LINK_CHANGE, - MYRI10GE_MCP_INTR_STATS_UPDATE, - MYRI10GE_MCP_INTR_ETHER_DOWN -} myri10ge_mcp_intr_type_t; + MXGE_MCP_INTR_NONE = 0, + MXGE_MCP_INTR_ETHER_SEND_DONE, + MXGE_MCP_INTR_ETHER_RECV_SMALL, + MXGE_MCP_INTR_ETHER_RECV_BIG, + MXGE_MCP_INTR_LINK_CHANGE, + MXGE_MCP_INTR_STATS_UPDATE, + MXGE_MCP_INTR_ETHER_DOWN +} mxge_mcp_intr_type_t; /* 32 Bytes */ typedef struct { uint32_t link_up; uint32_t dropped_link_overflow; uint32_t dropped_link_error_or_filtered; uint32_t dropped_runt; uint32_t dropped_overrun; uint32_t dropped_no_small_buffer; uint32_t dropped_no_big_buffer; uint32_t dropped_interrupt_busy; uint32_t rdma_tags_available; } mcp_stats_t; -#endif /* _myri10ge_mcp_h */ +#endif /* _mxge_mcp_h */ Index: head/sys/modules/Makefile =================================================================== --- head/sys/modules/Makefile (revision 159570) +++ head/sys/modules/Makefile (revision 159571) @@ -1,556 +1,559 @@ # $FreeBSD$ .include SUBDIR= ${_3dfx} \ ${_3dfx_linux} \ ${_aac} \ accf_data \ accf_http \ ${_acpi} \ ${_agp} \ aha \ ${_ahb} \ ${_aic} \ aic7xxx \ aio \ ${_amd} \ amr \ ${_an} \ ${_aout} \ ${_apm} \ ${_ar} \ ${_arcmsr} \ ${_arcnet} \ ${_arl} \ ${_asr} \ ata \ ath \ ${_ath_hal} \ ath_rate_amrr \ ath_rate_onoe \ ath_rate_sample \ aue \ ${_auxio} \ ${_awi} \ axe \ bfe \ bge \ ${_bios} \ ${_bktr} \ cam \ ${_canbepm} \ ${_canbus} \ ${_cardbus} \ ${_cbb} \ cd9660 \ cd9660_iconv \ cdce \ ${_ce} \ ${_ciss} \ ${_cm} \ coda \ coda5 \ ${_coff} \ ${_cp} \ ${_cpufreq} \ ${_crypto} \ ${_cryptodev} \ ${_cs} \ ${_ctau} \ cue \ ${_cx} \ dc \ dcons \ dcons_crom \ de \ ${_digi} \ ${_dpt} \ ${_drm} \ dummynet \ ${_ed} \ ${_elink} \ ${_em} \ en \ ${_ep} \ ${_ex} \ ${_exca} \ ${_ext2fs} \ fatm \ fdc \ fdescfs \ ${_fe} \ firewire \ firmware \ fxp \ ${_gem} \ geom \ harp \ hatm \ ${_hfa} \ hifn \ hme \ ${_hptmv} \ hwpmc \ ${_i2c} \ ${_ibcs2} \ ${_ichwd} \ ${_ida} \ ${_idt} \ ${_ie} \ if_bridge \ if_disc \ if_ef \ if_faith \ if_gif \ if_gre \ ${_if_ndis} \ if_ppp \ if_sl \ if_stf \ if_tap \ if_tun \ if_vlan \ ${_iir} \ ${_io} \ ipdivert \ ${_ipfilter} \ ipfw \ ip_mroute_mod \ ${_ipmi} \ ${_ips} \ ${_ipw} \ isp \ ispfw \ ${_iwi} \ joy \ kbdmux \ kue \ le \ lge \ libalias \ libiconv \ libmbpool \ libmchain \ ${_linprocfs} \ ${_linsysfs} \ ${_linux} \ lmc \ lpt \ mac_biba \ mac_bsdextended \ mac_ifoff \ mac_lomac \ mac_mls \ mac_none \ mac_partition \ mac_portacl \ mac_seeotheruids \ mac_stub \ mac_test \ mcd \ md \ mem \ mfi \ mii \ mlx \ ${_mly} \ mpt \ mqueue \ msdosfs \ msdosfs_iconv \ ${_mse} \ + ${_mxge} \ my \ ${_ncp} \ ${_ncv} \ ${_ndis} \ netgraph \ nfsclient \ nfsserver \ nge \ nmdm \ ${_nsp} \ ntfs \ ntfs_iconv \ nullfs \ ${_nve} \ ${_nwfs} \ ${_oltr} \ ${_osf1} \ ${_padlock} \ patm \ ${_pccard} \ ${_pcfclock} \ pcn \ ${_pecoff} \ ${_pf} \ ${_pflog} \ plip \ ${_pmc} \ portalfs \ ppbus \ ppi \ pps \ procfs \ pseudofs \ ${_pst} \ ${_puc} \ ral \ ${_random} \ ${_ray} \ rc \ rc4 \ re \ reiserfs \ rl \ rp \ ${_rr232x} \ rue \ ${_s3} \ ${_safe} \ ${_sbni} \ sbsh \ scc \ scd \ ${_scsi_low} \ sf \ ${_sio} \ sis \ sk \ ${_smbfs} \ sn \ ${_snc} \ snp \ ${_sound} \ ${_speaker} \ ${_splash} \ ${_sppp} \ ${_sr} \ ste \ ${_stg} \ ${_streams} \ sym \ ${_syscons} \ sysvipc \ ti \ tl \ trm \ ${_twa} \ twe \ tx \ txp \ uart \ ubsa \ ubsec \ ubser \ ucom \ ucycom \ udav \ udbp \ udf \ udf_iconv \ ufm \ ${_ufs} \ ufoma \ uftdi \ ugen \ uhid \ ukbd \ ulpt \ umass \ umct \ umodem \ ums \ unionfs \ uplcom \ ural \ urio \ usb \ uscanner \ utopia \ uvisor \ uvscom \ ${_vesa} \ vge \ vkbd \ ${_vpo} \ vr \ vx \ wb \ ${_wi} \ wlan \ wlan_acl \ wlan_ccmp \ wlan_tkip \ wlan_wep \ wlan_xauth \ ${_xe} \ xfs \ xl \ zlib .if ${MACHINE_ARCH} != "powerpc" _syscons= syscons _vpo= vpo .endif .if defined(ALL_MODULES) _ufs= ufs .endif .if ${MK_CRYPT} != "no" || defined(ALL_MODULES) .if exists(${.CURDIR}/../opencrypto) _crypto= crypto _cryptodev= cryptodev .endif .if exists(${.CURDIR}/../crypto) _random= random .endif .endif .if ${MK_IPFILTER} != "no" || defined(ALL_MODULES) _ipfilter= ipfilter .endif .if ${MK_PF} != "no" || defined(ALL_MODULES) _pf= pf _pflog= pflog .endif .if ${MACHINE_ARCH} == "i386" # XXX some of these can move to the general case when de-i386'ed # XXX some of these can move now, but are untested on other architectures. _3dfx= 3dfx _3dfx_linux= 3dfx_linux _agp= agp _aic= aic _amd= amd _an= an _aout= aout _apm= apm _ar= ar _arcnet= arcnet _ath_hal= ath_hal _awi= awi _bktr= bktr _cardbus= cardbus _cbb= cbb _ce= ce _coff= coff _cp= cp _cpufreq= cpufreq _cs= cs _digi= digi _drm= drm _ed= ed _elink= elink _em= em _ep= ep _exca= exca _ext2fs= ext2fs _fe= fe _hfa= hfa _i2c= i2c _ibcs2= ibcs2 _ie= ie _if_ndis= if_ndis _io= io _linprocfs= linprocfs _linsysfs= linsysfs _linux= linux _mse= mse .if ${MK_NCP} != "no" _ncp= ncp .endif _ncv= ncv _ndis= ndis _nsp= nsp .if ${MK_NCP} != "no" _nwfs= nwfs .endif _oltr= oltr _pccard= pccard _pcfclock= pcfclock _pecoff= pecoff _pst= pst _puc= puc _ray= ray _safe= safe _sbni= sbni _scsi_low= scsi_low _sio= sio _smbfs= smbfs _sound= sound _speaker= speaker _splash= splash _sppp= sppp _sr= sr _stg= stg _streams= streams _wi= wi _xe= xe .if ${MACHINE} == "i386" _aac= aac _acpi= acpi _ahb= ahb _arcmsr= arcmsr _arl= arl _asr= asr _bios= bios _ciss= ciss _cm= cm _ctau= ctau _cx= cx _dpt= dpt _ex= ex _hptmv= hptmv _ichwd= ichwd _ida= ida _idt= idt _iir= iir _ipmi= ipmi _ips= ips _ipw= ipw _iwi= iwi _mly= mly +_mxge= mxge _nve= nve .if ${MK_CRYPT} != "no" || defined(ALL_MODULES) .if exists(${.CURDIR}/../crypto/via) _padlock= padlock .endif .endif _rr232x= rr232x _s3= s3 _twa= twa _vesa= vesa .elif ${MACHINE} == "pc98" _canbepm= canbepm _canbus= canbus _pmc= pmc _snc= snc .endif .endif .if ${MACHINE_ARCH} == "alpha" _agp= agp _ahb= ahb _ext2fs= ext2fs _osf1= osf1 _sound= sound _sppp= sppp .endif .if ${MACHINE_ARCH} == "amd64" _aac= aac #_acpi= acpi # doesn't work on amd64 yet as module _agp= agp _an= an _arcmsr= arcmsr _ath_hal= ath_hal _cardbus= cardbus _cbb= cbb _ciss= ciss _cpufreq= cpufreq _digi= digi _drm= drm _ed= ed _em= em _exca= exca _ext2fs= ext2fs _hptmv= hptmv _i2c= i2c _ichwd= ichwd _ida= ida _if_ndis= if_ndis _iir= iir _io= io _ipmi= ipmi _ips= ips _ipw= ipw _iwi= iwi _mly= mly +_mxge= mxge _ndis= ndis _nve= nve _pccard= pccard _rr232x= rr232x _safe= safe _scsi_low= scsi_low _smbfs= smbfs _sound= sound _speaker= speaker _sppp= sppp _twa= twa _wi= wi .endif .if ${MACHINE_ARCH} == "ia64" # Modules not enabled on ia64 (as compared to i386) include: # aac acpi aout apm atspeaker drm ibcs2 linprocfs linux ncv # nsp oltr pecoff s3 sbni stg vesa # acpi is not enabled because it is broken as a module on ia64 _aic= aic #_ar= ar not 64-bit clean _arcnet= arcnet _asr= asr _an= an _bktr= bktr _cardbus= cardbus _cbb= cbb _ciss= ciss _cm= cm _coff= coff _cpufreq= cpufreq _em= em _ep= ep _exca= exca _fe= fe _hfa= hfa _iir= iir _mly= mly _pccard= pccard _scsi_low= scsi_low _smbfs= smbfs _sound= sound _splash= splash _sppp= sppp #_sr= sr not 64bit clean _streams= streams _wi= wi _xe= xe .endif .if ${MACHINE_ARCH} == "powerpc" _an= an _ath_hal= ath_hal _gem= gem _smbfs= smbfs .endif .if ${MACHINE_ARCH} == "sparc64" _ath_hal= ath_hal _auxio= auxio _em= em _gem= gem _i2c= i2c _sound= sound .endif .if defined(MODULES_OVERRIDE) && !defined(ALL_MODULES) SUBDIR=${MODULES_OVERRIDE} .endif .for reject in ${WITHOUT_MODULES} SUBDIR:= ${SUBDIR:N${reject}} .endfor # Calling kldxref(8) for each module is expensive. .if !defined(NO_XREF) .MAKEFLAGS+= -DNO_XREF afterinstall: @if type kldxref >/dev/null 2>&1; then \ ${ECHO} kldxref ${DESTDIR}${KMODDIR}; \ kldxref ${DESTDIR}${KMODDIR}; \ fi .endif .include Index: head/sys/modules/mxge/Makefile =================================================================== --- head/sys/modules/mxge/Makefile (revision 159570) +++ head/sys/modules/mxge/Makefile (revision 159571) @@ -1,7 +1,7 @@ # $FreeBSD$ -SUBDIR= myri10ge -SUBDIR+=myri10ge_eth_z8e -SUBDIR+=myri10ge_ethp_z8e +SUBDIR= mxge +SUBDIR+=mxge_eth_z8e +SUBDIR+=mxge_ethp_z8e .include Index: head/sys/modules/mxge/mxge/Makefile =================================================================== --- head/sys/modules/mxge/mxge/Makefile (revision 159570) +++ head/sys/modules/mxge/mxge/Makefile (revision 159571) @@ -1,8 +1,8 @@ #$FreeBSD$ -.PATH: ${.CURDIR}/../../../dev/myri10ge +.PATH: ${.CURDIR}/../../../dev/mxge -KMOD= if_myri10ge -SRCS= if_myri10ge.c device_if.h bus_if.h pci_if.h +KMOD= if_mxge +SRCS= if_mxge.c device_if.h bus_if.h pci_if.h .include Index: head/sys/modules/mxge/mxge_eth_z8e/Makefile =================================================================== --- head/sys/modules/mxge/mxge_eth_z8e/Makefile (revision 159570) +++ head/sys/modules/mxge/mxge_eth_z8e/Makefile (revision 159571) @@ -1,13 +1,13 @@ # $FreeBSD$ -MYRI10GE= ${.CURDIR}/../../../dev/myri10ge -.PATH= ${MYRI10GE} -KMOD= myri10ge_eth_z8e -FIRMWS= eth_z8e.dat:myri10ge_eth_z8e +MXGE= ${.CURDIR}/../../../dev/mxge +.PATH= ${MXGE} +KMOD= mxge_eth_z8e +FIRMWS= eth_z8e.dat:mxge_eth_z8e CLEANFILES+= eth_z8e.dat -eth_z8e.dat: ${MYRI10GE}/eth_z8e.dat.gz.uu - uudecode -p < ${MYRI10GE}/eth_z8e.dat.gz.uu \ +eth_z8e.dat: ${MXGE}/eth_z8e.dat.gz.uu + uudecode -p < ${MXGE}/eth_z8e.dat.gz.uu \ | gzip -dc > ${.TARGET} .include Index: head/sys/modules/mxge/mxge_ethp_z8e/Makefile =================================================================== --- head/sys/modules/mxge/mxge_ethp_z8e/Makefile (revision 159570) +++ head/sys/modules/mxge/mxge_ethp_z8e/Makefile (revision 159571) @@ -1,13 +1,13 @@ # $FreeBSD$ -MYRI10GE= ${.CURDIR}/../../../dev/myri10ge -.PATH= ${MYRI10GE} -KMOD= myri10ge_ethp_z8e -FIRMWS= ethp_z8e.dat:myri10ge_ethp_z8e +MXGE= ${.CURDIR}/../../../dev/mxge +.PATH= ${MXGE} +KMOD= mxge_ethp_z8e +FIRMWS= ethp_z8e.dat:mxge_ethp_z8e CLEANFILES+= ethp_z8e.dat -ethp_z8e.dat: ${MYRI10GE}/ethp_z8e.dat.gz.uu - uudecode -p < ${MYRI10GE}/ethp_z8e.dat.gz.uu \ +ethp_z8e.dat: ${MXGE}/ethp_z8e.dat.gz.uu + uudecode -p < ${MXGE}/ethp_z8e.dat.gz.uu \ | gzip -dc > ${.TARGET} .include