Index: head/sys/dev/ata/ata-all.c =================================================================== --- head/sys/dev/ata/ata-all.c (revision 138042) +++ head/sys/dev/ata/ata-all.c (revision 138043) @@ -1,1096 +1,1100 @@ /*- * Copyright (c) 1998 - 2004 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef __alpha__ #include #endif #include #include #include #include /* device structures */ static d_ioctl_t ata_ioctl; static struct cdevsw ata_cdevsw = { .d_version = D_VERSION, .d_flags = D_NEEDGIANT, .d_ioctl = ata_ioctl, .d_name = "ata", }; /* prototypes */ static void ata_shutdown(void *, int); static void ata_interrupt(void *); static int ata_getparam(struct ata_device *, u_int8_t); static void ata_identify_devices(struct ata_channel *); static void ata_boot_attach(void); static void bswap(int8_t *, int); static void btrim(int8_t *, int); static void bpack(int8_t *, int8_t *, int); static void ata_init(void); /* global vars */ MALLOC_DEFINE(M_ATA, "ATA generic", "ATA driver generic layer"); devclass_t ata_devclass; uma_zone_t ata_zone; int ata_wc = 1; /* local vars */ static struct intr_config_hook *ata_delayed_attach = NULL; static int ata_dma = 1; static int atapi_dma = 1; /* sysctl vars */ SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters"); TUNABLE_INT("hw.ata.ata_dma", &ata_dma); SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma, CTLFLAG_RDTUN, &ata_dma, 0, "ATA disk DMA mode control"); TUNABLE_INT("hw.ata.wc", &ata_wc); SYSCTL_INT(_hw_ata, OID_AUTO, wc, CTLFLAG_RDTUN, &ata_wc, 0, "ATA disk write caching"); TUNABLE_INT("hw.ata.atapi_dma", &atapi_dma); SYSCTL_INT(_hw_ata, OID_AUTO, atapi_dma, CTLFLAG_RDTUN, &atapi_dma, 0, "ATAPI device DMA mode control"); /* * newbus device interface related functions */ int ata_probe(device_t dev) { struct ata_channel *ch; if (!dev || !(ch = device_get_softc(dev))) return ENXIO; if (ch->r_irq) return EEXIST; return 0; } int ata_attach(device_t dev) { struct ata_channel *ch; int error, rid; if (!dev || !(ch = device_get_softc(dev))) return ENXIO; /* initialize the softc basics */ ch->device[MASTER].channel = ch; ch->device[MASTER].unit = ATA_MASTER; ch->device[MASTER].mode = ATA_PIO; ch->device[SLAVE].channel = ch; ch->device[SLAVE].unit = ATA_SLAVE; ch->device[SLAVE].mode = ATA_PIO; ch->dev = dev; ch->state = ATA_IDLE; bzero(&ch->state_mtx, sizeof(struct mtx)); mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF); /* initialise device(s) on this channel */ while (ch->locking(ch, ATA_LF_LOCK) != ch->unit) tsleep(&error, PRIBIO, "ataatch", 1); ch->hw.reset(ch); ch->locking(ch, ATA_LF_UNLOCK); rid = ATA_IRQ_RID; ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); if (!ch->r_irq) { ata_printf(ch, -1, "unable to allocate interrupt\n"); return ENXIO; } if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, ata_interrupt, ch, &ch->ih))) { ata_printf(ch, -1, "unable to setup interrupt\n"); return error; } /* initialize queue and associated lock */ bzero(&ch->queue_mtx, sizeof(struct mtx)); mtx_init(&ch->queue_mtx, "ATA queue lock", NULL, MTX_DEF); TAILQ_INIT(&ch->ata_queue); /* do not attach devices if we are in early boot */ if (ata_delayed_attach) return 0; ata_identify_devices(ch); if (ch->device[MASTER].attach) ch->device[MASTER].attach(&ch->device[MASTER]); if (ch->device[SLAVE].attach) ch->device[SLAVE].attach(&ch->device[SLAVE]); #ifdef DEV_ATAPICAM atapi_cam_attach_bus(ch); #endif return 0; } int ata_detach(device_t dev) { struct ata_channel *ch; if (!dev || !(ch = device_get_softc(dev)) || !ch->r_irq) return ENXIO; /* mark devices on this channel as detaching */ ch->device[MASTER].flags |= ATA_D_DETACHING; ch->device[SLAVE].flags |= ATA_D_DETACHING; /* fail outstanding requests on this channel */ ata_fail_requests(ch, NULL); /* unlock the channel */ mtx_lock(&ch->state_mtx); ch->state = ATA_IDLE; mtx_unlock(&ch->state_mtx); ch->locking(ch, ATA_LF_UNLOCK); /* detach devices on this channel */ if (ch->device[MASTER].detach) ch->device[MASTER].detach(&ch->device[MASTER]); if (ch->device[SLAVE].detach) ch->device[SLAVE].detach(&ch->device[SLAVE]); #ifdef DEV_ATAPICAM atapi_cam_detach_bus(ch); #endif /* flush cache and powerdown device */ if (ch->device[MASTER].param) { if (ch->device[MASTER].param->support.command2 & ATA_SUPPORT_FLUSHCACHE) ata_controlcmd(&ch->device[MASTER], ATA_FLUSHCACHE, 0, 0, 0); ata_controlcmd(&ch->device[MASTER], ATA_SLEEP, 0, 0, 0); free(ch->device[MASTER].param, M_ATA); ch->device[MASTER].param = NULL; } if (ch->device[SLAVE].param) { if (ch->device[SLAVE].param->support.command2 & ATA_SUPPORT_FLUSHCACHE) ata_controlcmd(&ch->device[SLAVE], ATA_FLUSHCACHE, 0, 0, 0); ata_controlcmd(&ch->device[SLAVE], ATA_SLEEP, 0, 0, 0); free(ch->device[SLAVE].param, M_ATA); ch->device[SLAVE].param = NULL; } ch->device[MASTER].mode = ATA_PIO; ch->device[SLAVE].mode = ATA_PIO; ch->devices = 0; bus_teardown_intr(dev, ch->r_irq, ch->ih); bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); ch->r_irq = NULL; mtx_destroy(&ch->queue_mtx); return 0; } int ata_reinit(struct ata_channel *ch) { int devices, misdev, newdev; if (!ch->r_irq) return ENXIO; if (bootverbose) ata_printf(ch, -1, "reiniting channel ..\n"); /* poll for locking of this channel */ while (ch->locking(ch, ATA_LF_LOCK) != ch->unit) tsleep(&devices, PRIBIO, "atarint", 1); ata_catch_inflight(ch); /* grap the channel lock no matter what */ mtx_lock(&ch->state_mtx); ch->state = ATA_ACTIVE; mtx_unlock(&ch->state_mtx); if (ch->flags & ATA_IMMEDIATE_MODE) return EIO; else ch->flags |= ATA_IMMEDIATE_MODE; devices = ch->devices; ch->hw.reset(ch); if (bootverbose) ata_printf(ch, -1, "resetting done ..\n"); /* detach what left the channel during reset */ if ((misdev = devices & ~ch->devices)) { if ((misdev & (ATA_ATA_MASTER | ATA_ATAPI_MASTER)) && ch->device[MASTER].detach) { ata_fail_requests(ch, &ch->device[MASTER]); ch->device[MASTER].detach(&ch->device[MASTER]); free(ch->device[MASTER].param, M_ATA); ch->device[MASTER].param = NULL; } if ((misdev & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE)) && ch->device[SLAVE].detach) { ata_fail_requests(ch, &ch->device[SLAVE]); ch->device[SLAVE].detach(&ch->device[SLAVE]); free(ch->device[SLAVE].param, M_ATA); ch->device[SLAVE].param = NULL; } } /* identify what is present on the channel now */ ata_identify_devices(ch); /* detach what left the channel during identify */ if ((misdev = devices & ~ch->devices)) { if ((misdev & (ATA_ATA_MASTER | ATA_ATAPI_MASTER)) && ch->device[MASTER].detach) { ata_fail_requests(ch, &ch->device[MASTER]); ch->device[MASTER].detach(&ch->device[MASTER]); free(ch->device[MASTER].param, M_ATA); ch->device[MASTER].param = NULL; } if ((misdev & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE)) && ch->device[SLAVE].detach) { ata_fail_requests(ch, &ch->device[SLAVE]); ch->device[SLAVE].detach(&ch->device[SLAVE]); free(ch->device[SLAVE].param, M_ATA); ch->device[SLAVE].param = NULL; } } ch->flags &= ~ATA_IMMEDIATE_MODE; mtx_lock(&ch->state_mtx); ch->state = ATA_IDLE; mtx_unlock(&ch->state_mtx); ch->locking(ch, ATA_LF_UNLOCK); /* attach new devices */ if ((newdev = ~devices & ch->devices)) { if ((newdev & (ATA_ATA_MASTER | ATA_ATAPI_MASTER)) && ch->device[MASTER].attach) ch->device[MASTER].attach(&ch->device[MASTER]); if ((newdev & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE)) && ch->device[SLAVE].attach) ch->device[SLAVE].attach(&ch->device[SLAVE]); } #ifdef DEV_ATAPICAM atapi_cam_reinit_bus(ch); #endif if (bootverbose) ata_printf(ch, -1, "device config done ..\n"); ata_start(ch); return 0; } int ata_suspend(device_t dev) { struct ata_channel *ch; if (!dev || !(ch = device_get_softc(dev))) return ENXIO; while (1) { mtx_lock(&ch->state_mtx); if (ch->state == ATA_IDLE) { ch->state = ATA_ACTIVE; mtx_unlock(&ch->state_mtx); break; } mtx_unlock(&ch->state_mtx); tsleep(ch, PRIBIO, "atasusp", hz/10); } ch->locking(ch, ATA_LF_UNLOCK); return 0; } int ata_resume(device_t dev) { struct ata_channel *ch; int error; if (!dev || !(ch = device_get_softc(dev))) return ENXIO; error = ata_reinit(ch); ata_start(ch); return error; } static void ata_shutdown(void *arg, int howto) { struct ata_channel *ch; int ctlr; /* flush cache on all devices */ for (ctlr = 0; ctlr < devclass_get_maxunit(ata_devclass); ctlr++) { if (!(ch = devclass_get_softc(ata_devclass, ctlr))) continue; if (ch->device[MASTER].param && ch->device[MASTER].param->support.command2 & ATA_SUPPORT_FLUSHCACHE) ata_controlcmd(&ch->device[MASTER], ATA_FLUSHCACHE, 0, 0, 0); if (ch->device[SLAVE].param && ch->device[SLAVE].param->support.command2 & ATA_SUPPORT_FLUSHCACHE) ata_controlcmd(&ch->device[SLAVE], ATA_FLUSHCACHE, 0, 0, 0); } } static void ata_interrupt(void *data) { struct ata_channel *ch = (struct ata_channel *)data; struct ata_request *request; mtx_lock(&ch->state_mtx); do { /* do we have a running request */ if (!(request = ch->running)) break; ATA_DEBUG_RQ(request, "interrupt"); /* ignore interrupt if device is busy */ if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { DELAY(100); if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) break; } /* check for the right state */ if (ch->state == ATA_ACTIVE) { request->flags |= ATA_R_INTR_SEEN; ch->state = ATA_INTERRUPT; } else { ata_prtdev(request->device, "interrupt state=%d unexpected\n", ch->state); break; } if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) { ch->running = NULL; if (ch->flags & ATA_IMMEDIATE_MODE) ch->state = ATA_ACTIVE; else ch->state = ATA_IDLE; mtx_unlock(&ch->state_mtx); ch->locking(ch, ATA_LF_UNLOCK); ata_finish(request); return; } else { request->flags &= ~ATA_R_INTR_SEEN; ch->state = ATA_ACTIVE; } } while (0); mtx_unlock(&ch->state_mtx); } /* * device related interfaces */ static int ata_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, struct thread *td) { struct ata_cmd *iocmd = (struct ata_cmd *)addr; device_t device = devclass_get_device(ata_devclass, iocmd->channel); struct ata_channel *ch; struct ata_device *atadev; struct ata_request *request; caddr_t buf; int error = ENOTTY; if (cmd != IOCATA) return error; DROP_GIANT(); switch (iocmd->cmd) { case ATAGMAXCHANNEL: iocmd->u.maxchan = devclass_get_maxunit(ata_devclass); error = 0; break; case ATAGPARM: if (!device || !(ch = device_get_softc(device))) { error = ENXIO; break; } iocmd->u.param.type[MASTER] = ch->devices & (ATA_ATA_MASTER | ATA_ATAPI_MASTER); iocmd->u.param.type[SLAVE] = ch->devices & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE); if (ch->device[MASTER].name) strcpy(iocmd->u.param.name[MASTER], ch->device[MASTER].name); if (ch->device[SLAVE].name) strcpy(iocmd->u.param.name[SLAVE], ch->device[SLAVE].name); if (ch->device[MASTER].param) bcopy(ch->device[MASTER].param, &iocmd->u.param.params[MASTER], sizeof(struct ata_params)); if (ch->device[SLAVE].param) bcopy(ch->device[SLAVE].param, &iocmd->u.param.params[SLAVE], sizeof(struct ata_params)); error = 0; break; case ATAGMODE: if (!device || !(ch = device_get_softc(device))) { error = ENXIO; break; } iocmd->u.mode.mode[MASTER] = ch->device[MASTER].mode; iocmd->u.mode.mode[SLAVE] = ch->device[SLAVE].mode; error = 0; break; case ATASMODE: if (!device || !(ch = device_get_softc(device))) { error = ENXIO; break; } if (iocmd->u.mode.mode[MASTER] >= 0 && ch->device[MASTER].param) ch->device[MASTER].setmode(&ch->device[MASTER], iocmd->u.mode.mode[MASTER]); iocmd->u.mode.mode[MASTER] = ch->device[MASTER].mode; if (iocmd->u.mode.mode[SLAVE] >= 0 && ch->device[SLAVE].param) ch->device[SLAVE].setmode(&ch->device[SLAVE], iocmd->u.mode.mode[SLAVE]); iocmd->u.mode.mode[SLAVE] = ch->device[SLAVE].mode; error = 0; break; case ATAREQUEST: if (!device || !(ch = device_get_softc(device))) { error = ENXIO; break; } if (!(atadev = &ch->device[iocmd->device])) { error = ENODEV; break; } if (!(buf = malloc(iocmd->u.request.count, M_ATA, M_NOWAIT))) { error = ENOMEM; break; } if (!(request = ata_alloc_request())) { error = ENOMEM; free(buf, M_ATA); break; } if (iocmd->u.request.flags & ATA_CMD_WRITE) { error = copyin(iocmd->u.request.data, buf, iocmd->u.request.count); if (error) { free(buf, M_ATA); ata_free_request(request); break; } } request->device = atadev; if (iocmd->u.request.flags & ATA_CMD_ATAPI) { request->flags = ATA_R_ATAPI; bcopy(iocmd->u.request.u.atapi.ccb, request->u.atapi.ccb, 16); } else { - request->u.ata.command = iocmd->u.request.u.ata.command; - request->u.ata.feature = iocmd->u.request.u.ata.feature; - request->u.ata.lba = iocmd->u.request.u.ata.lba; - request->u.ata.count = iocmd->u.request.u.ata.count; + request->u.ata.command = iocmd->u.request.u.ata.command; + request->u.ata.feature = iocmd->u.request.u.ata.feature; + request->u.ata.lba = iocmd->u.request.u.ata.lba; + request->u.ata.count = iocmd->u.request.u.ata.count; } request->timeout = iocmd->u.request.timeout; request->data = buf; request->bytecount = iocmd->u.request.count; request->transfersize = request->bytecount; if (iocmd->u.request.flags & ATA_CMD_CONTROL) request->flags |= ATA_R_CONTROL; if (iocmd->u.request.flags & ATA_CMD_READ) request->flags |= ATA_R_READ; if (iocmd->u.request.flags & ATA_CMD_WRITE) request->flags |= ATA_R_WRITE; ata_queue_request(request); + iocmd->u.request.u.ata.command = request->u.ata.command; + iocmd->u.request.u.ata.feature = request->u.ata.feature; + iocmd->u.request.u.ata.lba = request->u.ata.lba; + iocmd->u.request.u.ata.count = request->u.ata.count; if (request->result) iocmd->u.request.error = request->result; else { if (iocmd->u.request.flags & ATA_CMD_READ) error = copyout(buf, iocmd->u.request.data, iocmd->u.request.count); else error = 0; } free(buf, M_ATA); ata_free_request(request); break; case ATAREINIT: if (!device || !(ch = device_get_softc(device))) { error = ENXIO; break; } error = ata_reinit(ch); ata_start(ch); break; case ATAATTACH: if (!device) { error = ENXIO; break; } /* SOS should enable channel HW on controller XXX */ error = ata_probe(device); if (!error) error = ata_attach(device); break; case ATADETACH: if (!device) { error = ENXIO; break; } error = ata_detach(device); /* SOS should disable channel HW on controller XXX */ break; #ifdef DEV_ATARAID case ATARAIDCREATE: error = ata_raid_create(&iocmd->u.raid_setup); break; case ATARAIDDELETE: error = ata_raid_delete(iocmd->channel); break; case ATARAIDSTATUS: error = ata_raid_status(iocmd->channel, &iocmd->u.raid_status); break; case ATARAIDADDSPARE: error = ata_raid_addspare(iocmd->channel, iocmd->u.raid_spare.disk); break; case ATARAIDREBUILD: error = ata_raid_rebuild(iocmd->channel); break; #endif } PICKUP_GIANT(); return error; } /* * device probe functions */ static int ata_getparam(struct ata_device *atadev, u_int8_t command) { struct ata_request *request; int error = ENOMEM; if (!atadev->param) atadev->param = malloc(sizeof(struct ata_params), M_ATA, M_NOWAIT); if (atadev->param) { request = ata_alloc_request(); if (request) { int retries = 2; while (retries-- > 0) { request->device = atadev; request->timeout = 5; request->retries = 0; request->u.ata.command = command; request->flags = (ATA_R_READ | ATA_R_IMMEDIATE); request->data = (caddr_t)atadev->param; request->bytecount = sizeof(struct ata_params); request->donecount = 0; request->transfersize = DEV_BSIZE; ata_queue_request(request); if (!(error = request->result)) break; } ata_free_request(request); } if (!error && (isprint(atadev->param->model[0]) || isprint(atadev->param->model[1]))) { struct ata_params *atacap = atadev->param; #if BYTE_ORDER == BIG_ENDIAN int16_t *ptr; for (ptr = (int16_t *)atacap; ptr < (int16_t *)atacap + sizeof(struct ata_params)/2; ptr++) { *ptr = bswap16(*ptr); } #endif if (!(!strncmp(atacap->model, "FX", 2) || !strncmp(atacap->model, "NEC", 3) || !strncmp(atacap->model, "Pioneer", 7) || !strncmp(atacap->model, "SHARP", 5))) { bswap(atacap->model, sizeof(atacap->model)); bswap(atacap->revision, sizeof(atacap->revision)); bswap(atacap->serial, sizeof(atacap->serial)); } btrim(atacap->model, sizeof(atacap->model)); bpack(atacap->model, atacap->model, sizeof(atacap->model)); btrim(atacap->revision, sizeof(atacap->revision)); bpack(atacap->revision, atacap->revision, sizeof(atacap->revision)); btrim(atacap->serial, sizeof(atacap->serial)); bpack(atacap->serial, atacap->serial, sizeof(atacap->serial)); if (bootverbose) ata_prtdev(atadev, "pio=0x%02x wdma=0x%02x udma=0x%02x cable=%spin\n", ata_pmode(atacap), ata_wmode(atacap), ata_umode(atacap), (atacap->hwres & ATA_CABLE_ID) ? "80":"40"); } else { if (!error) error = ENXIO; if (atadev->param) { free(atadev->param, M_ATA); atadev->param = NULL; } } } return error; } static void ata_identify_devices(struct ata_channel *ch) { if (ch->devices & ATA_ATA_SLAVE) { if (ata_getparam(&ch->device[SLAVE], ATA_ATA_IDENTIFY)) ch->devices &= ~ATA_ATA_SLAVE; #ifdef DEV_ATADISK else ch->device[SLAVE].attach = ad_attach; #endif } if (ch->devices & ATA_ATAPI_SLAVE) { if (ata_getparam(&ch->device[SLAVE], ATA_ATAPI_IDENTIFY)) ch->devices &= ~ATA_ATAPI_SLAVE; else { ata_controlcmd(&ch->device[SLAVE], ATA_ATAPI_RESET, 0, 0, 0); switch (ch->device[SLAVE].param->config & ATA_ATAPI_TYPE_MASK) { #ifdef DEV_ATAPICD case ATA_ATAPI_TYPE_CDROM: ch->device[SLAVE].attach = acd_attach; break; #endif #ifdef DEV_ATAPIFD case ATA_ATAPI_TYPE_DIRECT: ch->device[SLAVE].attach = afd_attach; break; #endif #ifdef DEV_ATAPIST case ATA_ATAPI_TYPE_TAPE: ch->device[SLAVE].attach = ast_attach; break; #endif } } } if (ch->devices & ATA_ATA_MASTER) { if (ata_getparam(&ch->device[MASTER], ATA_ATA_IDENTIFY)) ch->devices &= ~ATA_ATA_MASTER; #ifdef DEV_ATADISK else ch->device[MASTER].attach = ad_attach; #endif } if (ch->devices & ATA_ATAPI_MASTER) { if (ata_getparam(&ch->device[MASTER], ATA_ATAPI_IDENTIFY)) ch->devices &= ~ATA_ATAPI_MASTER; else { ata_controlcmd(&ch->device[MASTER], ATA_ATAPI_RESET, 0, 0, 0); switch (ch->device[MASTER].param->config & ATA_ATAPI_TYPE_MASK) { #ifdef DEV_ATAPICD case ATA_ATAPI_TYPE_CDROM: ch->device[MASTER].attach = acd_attach; break; #endif #ifdef DEV_ATAPIFD case ATA_ATAPI_TYPE_DIRECT: ch->device[MASTER].attach = afd_attach; break; #endif #ifdef DEV_ATAPIST case ATA_ATAPI_TYPE_TAPE: ch->device[MASTER].attach = ast_attach; break; #endif } } } /* setup basic transfer mode by setting PIO mode and DMA if supported */ if (ch->device[MASTER].param) { ch->device[MASTER].setmode(&ch->device[MASTER], ATA_PIO_MAX); if ((((ch->devices & ATA_ATAPI_MASTER) && atapi_dma && (ch->device[MASTER].param->config&ATA_DRQ_MASK) != ATA_DRQ_INTR && ata_umode(ch->device[MASTER].param) >= ATA_UDMA2) || ((ch->devices & ATA_ATA_MASTER) && ata_dma)) && ch->dma) ch->device[MASTER].setmode(&ch->device[MASTER], ATA_DMA_MAX); } if (ch->device[SLAVE].param) { ch->device[SLAVE].setmode(&ch->device[SLAVE], ATA_PIO_MAX); if ((((ch->devices & ATA_ATAPI_SLAVE) && atapi_dma && (ch->device[SLAVE].param->config&ATA_DRQ_MASK) != ATA_DRQ_INTR && ata_umode(ch->device[SLAVE].param) >= ATA_UDMA2) || ((ch->devices & ATA_ATA_SLAVE) && ata_dma)) && ch->dma) ch->device[SLAVE].setmode(&ch->device[SLAVE], ATA_DMA_MAX); } } static void ata_boot_attach(void) { struct ata_channel *ch; int ctlr; if (ata_delayed_attach) { config_intrhook_disestablish(ata_delayed_attach); free(ata_delayed_attach, M_TEMP); ata_delayed_attach = NULL; } /* * run through all ata devices and look for real ATA & ATAPI devices * using the hints we found in the early probe, this avoids some of * the delays probing of non-exsistent devices can cause. */ for (ctlr=0; ctlrdevice[MASTER].attach) ch->device[MASTER].attach(&ch->device[MASTER]); if (ch->device[SLAVE].attach) ch->device[SLAVE].attach(&ch->device[SLAVE]); #ifdef DEV_ATAPICAM atapi_cam_attach_bus(ch); #endif } #ifdef DEV_ATARAID ata_raid_attach(); #endif } /* * misc support functions */ void ata_udelay(int interval) { if (interval < (1000000/hz) || ata_delayed_attach) DELAY(interval); else tsleep(&interval, PRIBIO, "ataslp", interval/(1000000/hz)); } static void bswap(int8_t *buf, int len) { u_int16_t *ptr = (u_int16_t*)(buf + len); while (--ptr >= (u_int16_t*)buf) *ptr = ntohs(*ptr); } static void btrim(int8_t *buf, int len) { int8_t *ptr; for (ptr = buf; ptr < buf+len; ++ptr) if (!*ptr || *ptr == '_') *ptr = ' '; for (ptr = buf + len - 1; ptr >= buf && *ptr == ' '; --ptr) *ptr = 0; } static void bpack(int8_t *src, int8_t *dst, int len) { int i, j, blank; for (i = j = blank = 0 ; i < len; i++) { if (blank && src[i] == ' ') continue; if (blank && src[i] != ' ') { dst[j++] = src[i]; blank = 0; continue; } if (src[i] == ' ') { blank = 1; if (i == 0) continue; } dst[j++] = src[i]; } if (j < len) dst[j] = 0x00; } int ata_printf(struct ata_channel *ch, int device, const char * fmt, ...) { va_list ap; int ret; if (device == -1) ret = printf("ata%d: ", device_get_unit(ch->dev)); else { if (ch->device[ATA_DEV(device)].name) ret = printf("%s: ", ch->device[ATA_DEV(device)].name); else ret = printf("ata%d-%s: ", device_get_unit(ch->dev), (device == ATA_MASTER) ? "master" : "slave"); } va_start(ap, fmt); ret += vprintf(fmt, ap); va_end(ap); return ret; } int ata_prtdev(struct ata_device *atadev, const char * fmt, ...) { va_list ap; int ret; if (atadev->name) ret = printf("%s: ", atadev->name); else ret = printf("ata%d-%s: ", device_get_unit(atadev->channel->dev), (atadev->unit == ATA_MASTER) ? "master" : "slave"); va_start(ap, fmt); ret += vprintf(fmt, ap); va_end(ap); return ret; } void ata_set_name(struct ata_device *atadev, char *name, int lun) { atadev->name = malloc(strlen(name) + 4, M_ATA, M_NOWAIT); if (atadev->name) sprintf(atadev->name, "%s%d", name, lun); } void ata_free_name(struct ata_device *atadev) { if (atadev->name) free(atadev->name, M_ATA); atadev->name = NULL; } int ata_get_lun(u_int32_t *map) { int lun = ffs(~*map) - 1; *map |= (1 << lun); return lun; } int ata_test_lun(u_int32_t *map, int lun) { return (*map & (1 << lun)); } void ata_free_lun(u_int32_t *map, int lun) { *map &= ~(1 << lun); } char * ata_mode2str(int mode) { switch (mode) { case ATA_PIO: return "BIOSPIO"; case ATA_PIO0: return "PIO0"; case ATA_PIO1: return "PIO1"; case ATA_PIO2: return "PIO2"; case ATA_PIO3: return "PIO3"; case ATA_PIO4: return "PIO4"; case ATA_DMA: return "BIOSDMA"; case ATA_WDMA0: return "WDMA0"; case ATA_WDMA1: return "WDMA1"; case ATA_WDMA2: return "WDMA2"; case ATA_UDMA0: return "UDMA16"; case ATA_UDMA1: return "UDMA25"; case ATA_UDMA2: return "UDMA33"; case ATA_UDMA3: return "UDMA40"; case ATA_UDMA4: return "UDMA66"; case ATA_UDMA5: return "UDMA100"; case ATA_UDMA6: return "UDMA133"; case ATA_SA150: return "SATA150"; default: return "???"; } } int ata_pmode(struct ata_params *ap) { if (ap->atavalid & ATA_FLAG_64_70) { if (ap->apiomodes & 0x02) return ATA_PIO4; if (ap->apiomodes & 0x01) return ATA_PIO3; } if (ap->mwdmamodes & 0x04) return ATA_PIO4; if (ap->mwdmamodes & 0x02) return ATA_PIO3; if (ap->mwdmamodes & 0x01) return ATA_PIO2; if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x200) return ATA_PIO2; if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x100) return ATA_PIO1; if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x000) return ATA_PIO0; return ATA_PIO0; } int ata_wmode(struct ata_params *ap) { if (ap->mwdmamodes & 0x04) return ATA_WDMA2; if (ap->mwdmamodes & 0x02) return ATA_WDMA1; if (ap->mwdmamodes & 0x01) return ATA_WDMA0; return -1; } int ata_umode(struct ata_params *ap) { if (ap->atavalid & ATA_FLAG_88) { if (ap->udmamodes & 0x40) return ATA_UDMA6; if (ap->udmamodes & 0x20) return ATA_UDMA5; if (ap->udmamodes & 0x10) return ATA_UDMA4; if (ap->udmamodes & 0x08) return ATA_UDMA3; if (ap->udmamodes & 0x04) return ATA_UDMA2; if (ap->udmamodes & 0x02) return ATA_UDMA1; if (ap->udmamodes & 0x01) return ATA_UDMA0; } return -1; } int ata_limit_mode(struct ata_device *atadev, int mode, int maxmode) { if (maxmode && mode > maxmode) mode = maxmode; if (mode >= ATA_UDMA0 && ata_umode(atadev->param) > 0) return min(mode, ata_umode(atadev->param)); if (mode >= ATA_WDMA0 && ata_wmode(atadev->param) > 0) return min(mode, ata_wmode(atadev->param)); if (mode > ata_pmode(atadev->param)) return min(mode, ata_pmode(atadev->param)); return mode; } static void ata_init(void) { /* register controlling device */ make_dev(&ata_cdevsw, 0, UID_ROOT, GID_OPERATOR, 0600, "ata"); /* register boot attach to be run when interrupts are enabled */ if (!(ata_delayed_attach = (struct intr_config_hook *) malloc(sizeof(struct intr_config_hook), M_TEMP, M_NOWAIT | M_ZERO))) { printf("ata: malloc of delayed attach hook failed\n"); return; } ata_delayed_attach->ich_func = (void*)ata_boot_attach; if (config_intrhook_establish(ata_delayed_attach) != 0) { printf("ata: config_intrhook_establish failed\n"); free(ata_delayed_attach, M_TEMP); } /* register handler to flush write caches on shutdown */ if ((EVENTHANDLER_REGISTER(shutdown_post_sync, ata_shutdown, NULL, SHUTDOWN_PRI_DEFAULT)) == NULL) printf("ata: shutdown event registration failed!\n"); /* init our UMA zone for ATA requests */ ata_zone = uma_zcreate("ata_request", sizeof(struct ata_request), NULL, NULL, NULL, NULL, 0, 0); } SYSINIT(atadev, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_init, NULL) Index: head/sys/dev/ata/ata-lowlevel.c =================================================================== --- head/sys/dev/ata/ata-lowlevel.c (revision 138042) +++ head/sys/dev/ata/ata-lowlevel.c (revision 138043) @@ -1,812 +1,813 @@ /*- * Copyright (c) 1998 - 2004 Søren Schmidt * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_ata.h" #include #include #include #include #include #include #include #include #include #include #include #include /* prototypes */ static int ata_begin_transaction(struct ata_request *); static int ata_end_transaction(struct ata_request *); static void ata_generic_reset(struct ata_channel *); static int ata_wait(struct ata_device *, u_int8_t); static void ata_pio_read(struct ata_request *, int); static void ata_pio_write(struct ata_request *, int); /* local vars */ static int atadebug = 0; /* * low level ATA functions */ void ata_generic_hw(struct ata_channel *ch) { ch->hw.begin_transaction = ata_begin_transaction; ch->hw.end_transaction = ata_end_transaction; ch->hw.reset = ata_generic_reset; ch->hw.command = ata_generic_command; } /* must be called with ATA channel locked */ static int ata_begin_transaction(struct ata_request *request) { struct ata_channel *ch = request->device->channel; /* safetybelt for HW that went away */ if (!request->device->param || request->device->channel->flags&ATA_HWGONE) { request->retries = 0; request->result = ENXIO; return ATA_OP_FINISHED; } ATA_DEBUG_RQ(request, "begin transaction"); /* disable ATAPI DMA writes if HW doesn't support it */ if ((ch->flags & ATA_ATAPI_DMA_RO) && ((request->flags & (ATA_R_ATAPI | ATA_R_DMA | ATA_R_WRITE)) == (ATA_R_ATAPI | ATA_R_DMA | ATA_R_WRITE))) request->flags &= ~ATA_R_DMA; switch (request->flags & (ATA_R_ATAPI | ATA_R_DMA)) { /* ATA PIO data transfer and control commands */ default: { /* record command direction here as our request might be gone later */ int write = (request->flags & ATA_R_WRITE); /* issue command */ if (ch->hw.command(request->device, request->u.ata.command, request->u.ata.lba, request->u.ata.count, request->u.ata.feature)) { ata_prtdev(request->device, "error issueing %s command\n", ata_cmd2str(request)); request->result = EIO; break; } /* device reset doesn't interrupt */ if (request->u.ata.command == ATA_ATAPI_RESET) { int timeout = 1000000; do { DELAY(10); request->status = ATA_IDX_INB(ch, ATA_STATUS); } while (request->status & ATA_S_BUSY && timeout--); if (request->status & ATA_S_ERROR) request->error = ATA_IDX_INB(ch, ATA_ERROR); break; } /* if write command output the data */ if (write) { if (ata_wait(request->device, (ATA_S_READY | ATA_S_DSC | ATA_S_DRQ)) < 0) { ata_prtdev(request->device,"timeout waiting for write DRQ"); request->result = EIO; break; } ata_pio_write(request, request->transfersize); } } return ATA_OP_CONTINUES; /* ATA DMA data transfer commands */ case ATA_R_DMA: /* check sanity, setup SG list and DMA engine */ if (ch->dma->load(request->device, request->data, request->bytecount, request->flags & ATA_R_READ)) { ata_prtdev(request->device, "setting up DMA failed\n"); request->result = EIO; break; } /* issue command */ if (ch->hw.command(request->device, request->u.ata.command, request->u.ata.lba, request->u.ata.count, request->u.ata.feature)) { ata_prtdev(request->device, "error issueing %s command\n", ata_cmd2str(request)); request->result = EIO; break; } /* start DMA engine */ if (ch->dma->start(ch)) { ata_prtdev(request->device, "error starting DMA\n"); request->result = EIO; break; } return ATA_OP_CONTINUES; /* ATAPI PIO commands */ case ATA_R_ATAPI: /* is this just a POLL DSC command ? */ if (request->u.atapi.ccb[0] == ATAPI_POLL_DSC) { ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | request->device->unit); DELAY(10); if (!(ATA_IDX_INB(ch, ATA_ALTSTAT)&ATA_S_DSC)) request->result = EBUSY; break; } /* start ATAPI operation */ if (ch->hw.command(request->device, ATA_PACKET_CMD, request->transfersize << 8, 0, 0)) { ata_prtdev(request->device, "error issuing ATA PACKET command\n"); request->result = EIO; break; } /* command interrupt device ? just return and wait for interrupt */ if ((request->device->param->config & ATA_DRQ_MASK) == ATA_DRQ_INTR) return ATA_OP_CONTINUES; /* wait for ready to write ATAPI command block */ { int timeout = 5000; /* might be less for fast devices */ while (timeout--) { int reason = ATA_IDX_INB(ch, ATA_IREASON); int status = ATA_IDX_INB(ch, ATA_STATUS); if (((reason & (ATA_I_CMD | ATA_I_IN)) | (status & (ATA_S_DRQ | ATA_S_BUSY))) == ATAPI_P_CMDOUT) break; DELAY(20); } if (timeout <= 0) { ata_prtdev(request->device, "timeout waiting for ATAPI ready\n"); request->result = EIO; break; } } /* this seems to be needed for some (slow) devices */ DELAY(10); /* output actual command block */ ATA_IDX_OUTSW_STRM(ch, ATA_DATA, (int16_t *)request->u.atapi.ccb, (request->device->param->config & ATA_PROTO_MASK) == ATA_PROTO_ATAPI_12 ? 6 : 8); return ATA_OP_CONTINUES; case ATA_R_ATAPI|ATA_R_DMA: /* is this just a POLL DSC command ? */ if (request->u.atapi.ccb[0] == ATAPI_POLL_DSC) { ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | request->device->unit); DELAY(10); if (!(ATA_IDX_INB(ch, ATA_ALTSTAT)&ATA_S_DSC)) request->result = EBUSY; break; } /* check sanity, setup SG list and DMA engine */ if (ch->dma->load(request->device, request->data, request->bytecount, request->flags & ATA_R_READ)) { ata_prtdev(request->device, "setting up DMA failed\n"); request->result = EIO; break; } /* start ATAPI operation */ if (ch->hw.command(request->device, ATA_PACKET_CMD, 0, 0, ATA_F_DMA)) { ata_prtdev(request->device, "error issuing ATAPI packet command\n"); request->result = EIO; break; } /* wait for ready to write ATAPI command block */ { int timeout = 5000; /* might be less for fast devices */ while (timeout--) { int reason = ATA_IDX_INB(ch, ATA_IREASON); int status = ATA_IDX_INB(ch, ATA_STATUS); if (((reason & (ATA_I_CMD | ATA_I_IN)) | (status & (ATA_S_DRQ | ATA_S_BUSY))) == ATAPI_P_CMDOUT) break; DELAY(20); } if (timeout <= 0) { ata_prtdev(request->device,"timeout waiting for ATAPI ready\n"); request->result = EIO; break; } } /* this seems to be needed for some (slow) devices */ DELAY(10); /* output actual command block */ ATA_IDX_OUTSW_STRM(ch, ATA_DATA, (int16_t *)request->u.atapi.ccb, (request->device->param->config & ATA_PROTO_MASK) == ATA_PROTO_ATAPI_12 ? 6 : 8); /* start DMA engine */ if (ch->dma->start(ch)) { request->result = EIO; break; } return ATA_OP_CONTINUES; } /* request finish here */ if (ch->dma && ch->dma->flags & ATA_DMA_LOADED) ch->dma->unload(ch); return ATA_OP_FINISHED; } static int ata_end_transaction(struct ata_request *request) { struct ata_channel *ch = request->device->channel; int length; ATA_DEBUG_RQ(request, "end transaction"); /* clear interrupt and get status */ request->status = ATA_IDX_INB(ch, ATA_STATUS); switch (request->flags & (ATA_R_ATAPI | ATA_R_DMA | ATA_R_CONTROL)) { /* ATA PIO data transfer and control commands */ default: /* on control commands read back registers to the request struct */ if (request->flags & ATA_R_CONTROL) { request->u.ata.count = ATA_IDX_INB(ch, ATA_COUNT); request->u.ata.lba = ATA_IDX_INB(ch, ATA_SECTOR) | (ATA_IDX_INB(ch, ATA_CYL_LSB) << 8) | - (ATA_IDX_INB(ch, ATA_CYL_MSB) << 16); + (ATA_IDX_INB(ch, ATA_CYL_MSB) << 16) | + ((ATA_IDX_INB(ch, ATA_DRIVE) & 0x0f) << 24); } /* if we got an error we are done with the HW */ if (request->status & ATA_S_ERROR) { request->error = ATA_IDX_INB(ch, ATA_ERROR); return ATA_OP_FINISHED; } /* are we moving data ? */ if (request->flags & (ATA_R_READ | ATA_R_WRITE)) { /* if read data get it */ if (request->flags & ATA_R_READ) ata_pio_read(request, request->transfersize); /* update how far we've gotten */ request->donecount += request->transfersize; /* do we need a scoop more ? */ if (request->bytecount > request->donecount) { /* set this transfer size according to HW capabilities */ request->transfersize = min((request->bytecount - request->donecount), request->transfersize); /* clear interrupt seen flag as we need to wait again */ request->flags &= ~ATA_R_INTR_SEEN; /* if data write command, output the data */ if (request->flags & ATA_R_WRITE) { /* if we get an error here we are done with the HW */ if (ata_wait(request->device, (ATA_S_READY | ATA_S_DSC | ATA_S_DRQ)) < 0) { ata_prtdev(request->device, "timeout waiting for write DRQ"); request->status = ATA_IDX_INB(ch, ATA_STATUS); return ATA_OP_FINISHED; } /* output data and return waiting for new interrupt */ ata_pio_write(request, request->transfersize); return ATA_OP_CONTINUES; } /* if data read command, return & wait for interrupt */ if (request->flags & ATA_R_READ) return ATA_OP_CONTINUES; } } /* done with HW */ return ATA_OP_FINISHED; /* ATA DMA data transfer commands */ case ATA_R_DMA: /* stop DMA engine and get status */ if (ch->dma->stop) request->dmastat = ch->dma->stop(ch); /* did we get error or data */ if (request->status & ATA_S_ERROR) request->error = ATA_IDX_INB(ch, ATA_ERROR); else if (request->dmastat & ATA_BMSTAT_ERROR) request->status |= ATA_S_ERROR; else request->donecount = request->bytecount; /* release SG list etc */ ch->dma->unload(ch); /* done with HW */ return ATA_OP_FINISHED; /* ATAPI PIO commands */ case ATA_R_ATAPI: length = ATA_IDX_INB(ch, ATA_CYL_LSB)|(ATA_IDX_INB(ch, ATA_CYL_MSB)<<8); switch ((ATA_IDX_INB(ch, ATA_IREASON) & (ATA_I_CMD | ATA_I_IN)) | (request->status & ATA_S_DRQ)) { case ATAPI_P_CMDOUT: /* this seems to be needed for some (slow) devices */ DELAY(10); if (!(request->status & ATA_S_DRQ)) { ata_prtdev(request->device, "command interrupt without DRQ\n"); request->status = ATA_S_ERROR; return ATA_OP_FINISHED; } ATA_IDX_OUTSW_STRM(ch, ATA_DATA, (int16_t *)request->u.atapi.ccb, (request->device->param->config & ATA_PROTO_MASK)== ATA_PROTO_ATAPI_12 ? 6 : 8); /* return wait for interrupt */ return ATA_OP_CONTINUES; case ATAPI_P_WRITE: if (request->flags & ATA_R_READ) { request->status = ATA_S_ERROR; ata_prtdev(request->device, "%s trying to write on read buffer\n", ata_cmd2str(request)); return ATA_OP_FINISHED; } ata_pio_write(request, length); request->donecount += length; /* set next transfer size according to HW capabilities */ request->transfersize = min((request->bytecount-request->donecount), request->transfersize); /* return wait for interrupt */ return ATA_OP_CONTINUES; case ATAPI_P_READ: if (request->flags & ATA_R_WRITE) { request->status = ATA_S_ERROR; ata_prtdev(request->device, "%s trying to read on write buffer\n", ata_cmd2str(request)); return ATA_OP_FINISHED; } ata_pio_read(request, length); request->donecount += length; /* set next transfer size according to HW capabilities */ request->transfersize = min((request->bytecount-request->donecount), request->transfersize); /* return wait for interrupt */ return ATA_OP_CONTINUES; case ATAPI_P_DONEDRQ: ata_prtdev(request->device, "WARNING - %s DONEDRQ non conformant device\n", ata_cmd2str(request)); if (request->flags & ATA_R_READ) { ata_pio_read(request, length); request->donecount += length; } else if (request->flags & ATA_R_WRITE) { ata_pio_write(request, length); request->donecount += length; } else request->status = ATA_S_ERROR; /* FALLTHROUGH */ case ATAPI_P_ABORT: case ATAPI_P_DONE: if (request->status & (ATA_S_ERROR | ATA_S_DWF)) request->error = ATA_IDX_INB(ch, ATA_ERROR); return ATA_OP_FINISHED; default: ata_prtdev(request->device, "unknown transfer phase\n"); request->status = ATA_S_ERROR; } /* done with HW */ return ATA_OP_FINISHED; /* ATAPI DMA commands */ case ATA_R_ATAPI|ATA_R_DMA: /* stop the engine and get engine status */ if (ch->dma->stop) request->dmastat = ch->dma->stop(ch); /* did we get error or data */ if (request->status & (ATA_S_ERROR | ATA_S_DWF)) request->error = ATA_IDX_INB(ch, ATA_ERROR); else if (request->dmastat & ATA_BMSTAT_ERROR) request->status |= ATA_S_ERROR; else request->donecount = request->bytecount; /* release SG list etc */ ch->dma->unload(ch); /* done with HW */ return ATA_OP_FINISHED; } } /* must be called with ATA channel locked */ static void ata_generic_reset(struct ata_channel *ch) { u_int8_t err, lsb, msb, ostat0, ostat1; u_int8_t stat0 = 0, stat1 = 0; int mask = 0, timeout; /* if DMA functionality present stop it */ if (ch->dma) { if (ch->dma->stop) ch->dma->stop(ch); if (ch->dma->flags & ATA_DMA_LOADED) ch->dma->unload(ch); } /* reset host end of channel (if supported) */ if (ch->reset) ch->reset(ch); /* do we have any signs of ATA/ATAPI HW being present ? */ ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_MASTER); DELAY(10); ostat0 = ATA_IDX_INB(ch, ATA_STATUS); if ((ostat0 & 0xf8) != 0xf8 && ostat0 != 0xa5) { stat0 = ATA_S_BUSY; mask |= 0x01; } ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_SLAVE); DELAY(10); ostat1 = ATA_IDX_INB(ch, ATA_STATUS); /* in some setups we dont want to test for a slave */ if (!(ch->flags & ATA_NO_SLAVE)) { if ((ostat1 & 0xf8) != 0xf8 && ostat1 != 0xa5) { stat1 = ATA_S_BUSY; mask |= 0x02; } } if (bootverbose) ata_printf(ch, -1, "reset tp1 mask=%02x ostat0=%02x ostat1=%02x\n", mask, ostat0, ostat1); /* if nothing showed up there is no need to get any further */ /* SOS is that too strong?, we just might loose devices here XXX */ ch->devices = 0; if (!mask) return; /* reset (both) devices on this channel */ ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_MASTER); DELAY(10); ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS | ATA_A_RESET); ata_udelay(10000); ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS); ata_udelay(100000); ATA_IDX_INB(ch, ATA_ERROR); /* wait for BUSY to go inactive */ for (timeout = 0; timeout < 310; timeout++) { if (stat0 & ATA_S_BUSY) { ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_MASTER); DELAY(10); err = ATA_IDX_INB(ch, ATA_ERROR); lsb = ATA_IDX_INB(ch, ATA_CYL_LSB); msb = ATA_IDX_INB(ch, ATA_CYL_MSB); stat0 = ATA_IDX_INB(ch, ATA_STATUS); if (bootverbose) ata_printf(ch, ATA_MASTER, "stat=0x%02x err=0x%02x lsb=0x%02x msb=0x%02x\n", stat0, err, lsb, msb); if (!(stat0 & ATA_S_BUSY)) { if ((err & 0x7f) == ATA_E_ILI) { if (lsb == ATAPI_MAGIC_LSB && msb == ATAPI_MAGIC_MSB) { ch->devices |= ATA_ATAPI_MASTER; } else if (stat0 & ATA_S_READY) { ch->devices |= ATA_ATA_MASTER; } } else if ((stat0 & 0x4f) && err == lsb && err == msb) { stat0 |= ATA_S_BUSY; } } } if (!((mask == 0x03) && (stat0 & ATA_S_BUSY)) && (stat1 & ATA_S_BUSY)) { ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_SLAVE); DELAY(10); err = ATA_IDX_INB(ch, ATA_ERROR); lsb = ATA_IDX_INB(ch, ATA_CYL_LSB); msb = ATA_IDX_INB(ch, ATA_CYL_MSB); stat1 = ATA_IDX_INB(ch, ATA_STATUS); if (bootverbose) ata_printf(ch, ATA_SLAVE, " stat=0x%02x err=0x%02x lsb=0x%02x msb=0x%02x\n", stat1, err, lsb, msb); if (!(stat1 & ATA_S_BUSY)) { if ((err & 0x7f) == ATA_E_ILI) { if (lsb == ATAPI_MAGIC_LSB && msb == ATAPI_MAGIC_MSB) { ch->devices |= ATA_ATAPI_SLAVE; } else if (stat1 & ATA_S_READY) { ch->devices |= ATA_ATA_SLAVE; } } else if ((stat1 & 0x4f) && err == lsb && err == msb) { stat1 |= ATA_S_BUSY; } } } if (mask == 0x01) /* wait for master only */ if (!(stat0 & ATA_S_BUSY) || (stat0 == 0xff && timeout > 5)) break; if (mask == 0x02) /* wait for slave only */ if (!(stat1 & ATA_S_BUSY) || (stat1 == 0xff && timeout > 5)) break; if (mask == 0x03) { /* wait for both master & slave */ if (!(stat0 & ATA_S_BUSY) && !(stat1 & ATA_S_BUSY)) break; if (stat0 == 0xff && timeout > 5) mask &= ~0x01; if (stat1 == 0xff && timeout > 5) mask &= ~0x02; } ata_udelay(100000); } if (bootverbose) ata_printf(ch, -1, "reset tp2 stat0=%02x stat1=%02x devices=0x%b\n", stat0, stat1, ch->devices, "\20\4ATAPI_SLAVE\3ATAPI_MASTER\2ATA_SLAVE\1ATA_MASTER"); } static int ata_wait(struct ata_device *atadev, u_int8_t mask) { u_int8_t status; int timeout = 0; DELAY(1); /* wait 5 seconds for device to get !BUSY */ while (timeout < 5000000) { status = ATA_IDX_INB(atadev->channel, ATA_STATUS); /* if drive fails status, reselect the drive just to be sure */ if (status == 0xff) { ata_prtdev(atadev, "WARNING no status, reselecting device\n"); ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_IBM | atadev->unit); DELAY(10); status = ATA_IDX_INB(atadev->channel, ATA_STATUS); if (status == 0xff) return -1; } /* are we done ? */ if (!(status & ATA_S_BUSY)) break; if (timeout > 1000) { timeout += 1000; DELAY(1000); } else { timeout += 10; DELAY(10); } } if (timeout >= 5000000) return -1; if (!mask) return (status & ATA_S_ERROR); DELAY(1); /* wait 50 msec for bits wanted */ timeout = 5000; while (timeout--) { status = ATA_IDX_INB(atadev->channel, ATA_STATUS); if ((status & mask) == mask) return (status & ATA_S_ERROR); DELAY (10); } return -1; } int ata_generic_command(struct ata_device *atadev, u_int8_t command, u_int64_t lba, u_int16_t count, u_int16_t feature) { if (atadebug) ata_prtdev(atadev, "ata_command: addr=%04lx, command=%02x, " "lba=%jd, count=%d, feature=%d\n", rman_get_start(atadev->channel->r_io[ATA_DATA].res), command, (intmax_t)lba, count, feature); /* select device */ ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_IBM | atadev->unit); /* ready to issue command ? */ if (ata_wait(atadev, 0) < 0) { ata_prtdev(atadev, "timeout sending command=%02x\n", command); return -1; } /* enable interrupt */ ATA_IDX_OUTB(atadev->channel, ATA_ALTSTAT, ATA_A_4BIT); /* only use 48bit addressing if needed (avoid bugs and overhead) */ if ((lba > 268435455 || count > 256) && atadev->param && atadev->param->support.command2 & ATA_SUPPORT_ADDRESS48) { /* translate command into 48bit version */ switch (command) { case ATA_READ: command = ATA_READ48; break; case ATA_READ_MUL: command = ATA_READ_MUL48; break; case ATA_READ_DMA: command = ATA_READ_DMA48; break; case ATA_READ_DMA_QUEUED: command = ATA_READ_DMA_QUEUED48; break; case ATA_WRITE: command = ATA_WRITE48; break; case ATA_WRITE_MUL: command = ATA_WRITE_MUL48; break; case ATA_WRITE_DMA: command = ATA_WRITE_DMA48; break; case ATA_WRITE_DMA_QUEUED: command = ATA_WRITE_DMA_QUEUED48; break; case ATA_FLUSHCACHE: command = ATA_FLUSHCACHE48; break; default: ata_prtdev(atadev, "can't translate cmd to 48bit version\n"); return -1; } ATA_IDX_OUTB(atadev->channel, ATA_FEATURE, (feature>>8) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_FEATURE, feature & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_COUNT, (count>>8) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_COUNT, count & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_SECTOR, (lba>>24) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_SECTOR, lba & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_CYL_LSB, (lba>>32) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_CYL_LSB, (lba>>8) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_CYL_MSB, (lba>>40) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_CYL_MSB, (lba>>16) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_LBA | atadev->unit); atadev->channel->flags |= ATA_48BIT_ACTIVE; } else { ATA_IDX_OUTB(atadev->channel, ATA_FEATURE, feature); ATA_IDX_OUTB(atadev->channel, ATA_COUNT, count); ATA_IDX_OUTB(atadev->channel, ATA_SECTOR, lba & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_CYL_LSB, (lba>>8) & 0xff); ATA_IDX_OUTB(atadev->channel, ATA_CYL_MSB, (lba>>16) & 0xff); if (atadev->flags & ATA_D_USE_CHS) ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_IBM | atadev->unit | ((lba>>24) & 0xf)); else ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | atadev->unit|((lba>>24)&0xf)); atadev->channel->flags &= ~ATA_48BIT_ACTIVE; } /* issue command to controller */ ATA_IDX_OUTB(atadev->channel, ATA_CMD, command); return 0; } static void ata_pio_read(struct ata_request *request, int length) { int size = min(request->transfersize, length); struct ata_channel *ch = request->device->channel; int resid; if (ch->flags & ATA_USE_16BIT || (size % sizeof(int32_t))) ATA_IDX_INSW_STRM(ch, ATA_DATA, (void*)((uintptr_t)request->data+request->donecount), size / sizeof(int16_t)); else ATA_IDX_INSL_STRM(ch, ATA_DATA, (void*)((uintptr_t)request->data+request->donecount), size / sizeof(int32_t)); if (request->transfersize < length) { ata_prtdev(request->device, "WARNING - %s read data overrun %d>%d\n", ata_cmd2str(request), length, request->transfersize); for (resid = request->transfersize; resid < length; resid += sizeof(int16_t)) ATA_IDX_INW(ch, ATA_DATA); } } static void ata_pio_write(struct ata_request *request, int length) { int size = min(request->transfersize, length); struct ata_channel *ch = request->device->channel; int resid; if (ch->flags & ATA_USE_16BIT || (size % sizeof(int32_t))) ATA_IDX_OUTSW_STRM(ch, ATA_DATA, (void*)((uintptr_t)request->data+request->donecount), size / sizeof(int16_t)); else ATA_IDX_OUTSL_STRM(ch, ATA_DATA, (void*)((uintptr_t)request->data+request->donecount), size / sizeof(int32_t)); if (request->transfersize < length) { ata_prtdev(request->device, "WARNING - %s write data underrun %d>%d\n", ata_cmd2str(request), length, request->transfersize); for (resid = request->transfersize; resid < length; resid += sizeof(int16_t)) ATA_IDX_OUTW(ch, ATA_DATA, 0); } }