Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah.h =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah.h (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah.h (revision 123043) @@ -0,0 +1,547 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: ah.h,v 1.43 2003/11/25 22:17:40 sam Exp $ + */ + +#ifndef _ATH_AH_H_ +#define _ATH_AH_H_ +/* + * Atheros Hardware Access Layer + * + * Clients of the HAL call ath_hal_attach to obtain a reference to an ath_hal + * structure for use with the device. Hardware-related operations that + * follow must call back into the HAL through interface, supplying the + * reference as the first parameter. + */ +#include "ah_osdep.h" + +/* + * Status codes that may be returned by the HAL. Note that + * interfaces that return a status code set it only when an + * error occurs--i.e. you cannot check it for success. + */ +typedef enum { + HAL_OK = 0, /* No error */ + HAL_ENXIO = 1, /* No hardware present */ + HAL_ENOMEM = 2, /* Memory allocation failed */ + HAL_EIO = 3, /* Hardware didn't respond as expected */ + HAL_EEMAGIC = 4, /* EEPROM magic number invalid */ + HAL_EEVERSION = 5, /* EEPROM version invalid */ + HAL_EELOCKED = 6, /* EEPROM unreadable */ + HAL_EEBADSUM = 7, /* EEPROM checksum invalid */ + HAL_EEREAD = 8, /* EEPROM read problem */ + HAL_EEBADMAC = 9, /* EEPROM mac address invalid */ + HAL_EESIZE = 10, /* EEPROM size not supported */ + HAL_EEWRITE = 11, /* Attempt to change write-locked EEPROM */ + HAL_EINVAL = 12, /* Invalid parameter to function */ + HAL_ENOTSUPP = 13, /* Hardware revision not supported */ + HAL_ESELFTEST = 14, /* Hardware self-test failed */ + HAL_EINPROGRESS = 15, /* Operation incomplete */ +} HAL_STATUS; + +typedef enum { + AH_FALSE = 0, /* NB: lots of code assumes false is zero */ + AH_TRUE = 1, +} HAL_BOOL; + +/* + * "States" for setting the LED. These correspond to + * the possible 802.11 operational states and there may + * be a many-to-one mapping between these states and the + * actual hardware states for the LED's (i.e. the hardware + * may have fewer states). + */ +typedef enum { + HAL_LED_INIT = 0, + HAL_LED_SCAN = 1, + HAL_LED_AUTH = 2, + HAL_LED_ASSOC = 3, + HAL_LED_RUN = 4 +} HAL_LED_STATE; + +/* + * Transmit queue types/numbers. These are used to tag + * each transmit queue in the hardware and to identify a set + * of transmit queues for operations such as start/stop dma. + */ +typedef enum { + HAL_TX_QUEUE_INACTIVE = 0, /* queue is inactive/unused */ + HAL_TX_QUEUE_DATA = 1, /* data xmit q's */ + HAL_TX_QUEUE_BEACON = 2, /* beacon xmit q */ + HAL_TX_QUEUE_CAB = 3, /* "crap after beacon" xmit q */ + HAL_TX_QUEUE_PSPOLL = 4, /* power-save poll xmit q */ +} HAL_TX_QUEUE; + +#define HAL_NUM_TX_QUEUES 10 /* max possible # of queues */ + +/* + * Transmit packet types. This belongs in ah_desc.h, but + * is here so we can give a proper type to various parameters + * (and not require everyone include the file). + * + * NB: These values are intentionally assigned for + * direct use when setting up h/w descriptors. + */ +typedef enum { + HAL_PKT_TYPE_NORMAL = 0, + HAL_PKT_TYPE_ATIM = 1, + HAL_PKT_TYPE_PSPOLL = 2, + HAL_PKT_TYPE_BEACON = 3, + HAL_PKT_TYPE_PROBE_RESP = 4, +} HAL_PKT_TYPE; + +/* Rx Filter Frame Types */ +typedef enum { + HAL_RX_FILTER_UCAST = 0x00000001, /* Allow unicast frames */ + HAL_RX_FILTER_MCAST = 0x00000002, /* Allow multicast frames */ + HAL_RX_FILTER_BCAST = 0x00000004, /* Allow broadcast frames */ + HAL_RX_FILTER_CONTROL = 0x00000008, /* Allow control frames */ + HAL_RX_FILTER_BEACON = 0x00000010, /* Allow beacon frames */ + HAL_RX_FILTER_PROM = 0x00000020, /* Promiscuous mode */ + HAL_RX_FILTER_PROBEREQ = 0x00000080, /* Allow probe request frames */ + HAL_RX_FILTER_PHYERR = 0x00000100, /* Allow phy errors */ + HAL_RX_FILTER_PHYRADAR = 0x00000200, /* Allow phy radar errors*/ +} HAL_RX_FILTER; + +typedef enum { + HAL_PM_UNDEFINED = 0, + HAL_PM_AUTO = 1, + HAL_PM_AWAKE = 2, + HAL_PM_FULL_SLEEP = 3, + HAL_PM_NETWORK_SLEEP = 4 +} HAL_POWER_MODE; + +/* + * NOTE WELL: + * These are mapped to take advantage of the common locations for many of + * the bits on all of the currently supported MAC chips. This is to make + * the ISR as efficient as possible, while still abstracting HW differences. + * When new hardware breaks this commonality this enumerated type, as well + * as the HAL functions using it, must be modified. All values are directly + * mapped unless commented otherwise. + */ +typedef enum { + HAL_INT_RX = 0x00000001, /* Non-common mapping */ + HAL_INT_RXDESC = 0x00000002, + HAL_INT_RXNOFRM = 0x00000008, + HAL_INT_RXEOL = 0x00000010, + HAL_INT_RXORN = 0x00000020, + HAL_INT_TX = 0x00000040, /* Non-common mapping */ + HAL_INT_TXDESC = 0x00000080, + HAL_INT_TXURN = 0x00000800, + HAL_INT_MIB = 0x00001000, + HAL_INT_RXPHY = 0x00004000, + HAL_INT_RXKCM = 0x00008000, + HAL_INT_SWBA = 0x00010000, + HAL_INT_BMISS = 0x00040000, + HAL_INT_BNR = 0x00100000, /* Non-common mapping */ + HAL_INT_GPIO = 0x01000000, + HAL_INT_FATAL = 0x40000000, /* Non-common mapping */ + HAL_INT_GLOBAL = 0x80000000, /* Set/clear IER */ + + /* Interrupt bits that map directly to ISR/IMR bits */ + HAL_INT_COMMON = HAL_INT_RXNOFRM + | HAL_INT_RXDESC + | HAL_INT_RXEOL + | HAL_INT_RXORN + | HAL_INT_TXURN + | HAL_INT_TXDESC + | HAL_INT_MIB + | HAL_INT_RXPHY + | HAL_INT_RXKCM + | HAL_INT_SWBA + | HAL_INT_BMISS + | HAL_INT_GPIO, + HAL_INT_NOCARD = 0xffffffff /* To signal the card was removed */ +} HAL_INT; + +typedef enum { + HAL_RFGAIN_INACTIVE = 0, + HAL_RFGAIN_READ_REQUESTED = 1, + HAL_RFGAIN_NEED_CHANGE = 2 +} HAL_RFGAIN; + +/* + * Channels are specified by frequency. + */ +typedef struct { + u_int16_t channel; /* setting in Mhz */ + u_int16_t channelFlags; /* see below */ +} HAL_CHANNEL; + +#define CHANNEL_RAD_INT 0x0001 /* Radar interference detected on channel */ +#define CHANNEL_CW_INT 0x0002 /* CW interference detected on channel */ +#define CHANNEL_BUSY 0x0004 /* Busy, occupied or overlap with adjoin chan */ +#define CHANNEL_TURBO 0x0010 /* Turbo Channel */ +#define CHANNEL_CCK 0x0020 /* CCK channel */ +#define CHANNEL_OFDM 0x0040 /* OFDM channel */ +#define CHANNEL_2GHZ 0x0080 /* 2 GHz spectrum channel. */ +#define CHANNEL_5GHZ 0x0100 /* 5 GHz spectrum channel */ +#define CHANNEL_PASSIVE 0x0200 /* Only passive scan allowed in the channel */ +#define CHANNEL_DYN 0x0400 /* dynamic CCK-OFDM channel */ + +#define CHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM) +#define CHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK) +#define CHANNEL_PUREG (CHANNEL_2GHZ|CHANNEL_OFDM) +#ifdef notdef +#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_DYN) +#else +#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM) +#endif +#define CHANNEL_T (CHANNEL_5GHZ|CHANNEL_OFDM|CHANNEL_TURBO) +#define CHANNEL_ALL \ + (CHANNEL_OFDM|CHANNEL_CCK|CHANNEL_5GHZ|CHANNEL_2GHZ|CHANNEL_TURBO) +#define CHANNEL_ALL_NOTURBO (CHANNEL_ALL &~ CHANNEL_TURBO) + +typedef struct { + u_int32_t ackrcv_bad; + u_int32_t rts_bad; + u_int32_t rts_good; + u_int32_t fcs_bad; + u_int32_t beacons; +} HAL_MIB_STATS; + +typedef u_int16_t HAL_CTRY_CODE; /* country code */ +typedef u_int16_t HAL_REG_DOMAIN; /* regulatory domain code */ + +enum { + CTRY_DEBUG = 0x1ff, /* debug country code */ + CTRY_DEFAULT = 0 /* default country code */ +}; + +enum { + HAL_MODE_11A = 0x001, + HAL_MODE_TURBO = 0x002, + HAL_MODE_11B = 0x004, + HAL_MODE_PUREG = 0x008, +#ifdef notdef + HAL_MODE_11G = 0x010, +#else + HAL_MODE_11G = 0x008, +#endif + HAL_MODE_ALL = 0xfff +}; + +typedef struct { + u_int16_t rateCount; + u_int8_t rateCodeToIndex[32]; /* back mapping */ + struct { + u_int8_t valid; /* valid for rate control use */ + u_int8_t phy; /* CCK/OFDM/XR */ + u_int16_t rateKbps; /* transfer rate in kbs */ + u_int8_t rateCode; /* rate for h/w descriptors */ + u_int8_t shortPreamble; /* mask for enabling short + * preamble in CCK rate code */ + u_int8_t dot11Rate; /* value for supported rates + * info element of MLME */ + u_int8_t controlRate; /* index of next lower basic + * rate; used for dur. calcs */ + } info[32]; +} HAL_RATE_TABLE; + +typedef struct { + u_int rs_count; /* number of valid entries */ + u_int8_t rs_rates[32]; /* rates */ +} HAL_RATE_SET; + +typedef enum { + HAL_ANT_VARIABLE = 0, /* variable by programming */ + HAL_ANT_FIXED_A = 1, /* fixed to 11a frequencies */ + HAL_ANT_FIXED_B = 2, /* fixed to 11b frequencies */ +} HAL_ANT_SETTING; + +typedef enum { + HAL_M_STA = 1, /* infrastructure station */ + HAL_M_IBSS = 0, /* IBSS (adhoc) station */ + HAL_M_HOSTAP = 6, /* Software Access Point */ + HAL_M_MONITOR = 8 /* Monitor mode */ +} HAL_OPMODE; + +typedef struct { + int wk_len; + u_int8_t wk_key[16]; /* XXX big enough for WEP */ +} HAL_KEYVAL; + +typedef enum { + HAL_CIPHER_WEP = 0, + HAL_CIPHER_AES_CCM = 1, + HAL_CIPHER_CKIP = 2 +} HAL_CIPHER; + +enum { + HAL_SLOT_TIME_9 = 9, + HAL_SLOT_TIME_20 = 20, +}; + +/* + * Per-station beacon timer state. + */ +typedef struct { + u_int32_t bs_nexttbtt; /* next beacon in TU */ + u_int32_t bs_nextdtim; /* next DTIM in TU */ + u_int16_t bs_intval; /* beacon interval/period */ + u_int8_t bs_dtimperiod; + u_int8_t bs_cfpperiod; /* # of DTIMs between CFPs */ + u_int16_t bs_cfpmaxduration; /* max CFP duration in TU */ + u_int16_t bs_cfpduremain; /* remaining CFP duration */ + u_int16_t bs_timoffset; + u_int16_t bs_sleepduration; /* max sleep duration */ + u_int16_t bs_bmissthreshold; /* beacon miss threshold */ +} HAL_BEACON_STATE; + +struct ath_desc; + +/* + * Hardware Access Layer (HAL) API. + * + * Clients of the HAL call ath_hal_attach to obtain a reference to an + * ath_hal structure for use with the device. Hardware-related operations + * that follow must call back into the HAL through interface, supplying + * the reference as the first parameter. Note that before using the + * reference returned by ath_hal_attach the caller should verify the + * ABI version number. + */ +struct ath_hal { + u_int32_t ah_magic; /* consistency check magic number */ + u_int32_t ah_abi; /* HAL ABI version */ +#define HAL_ABI_VERSION 0x03112500 /* YYMMDDnn */ + u_int16_t ah_devid; /* PCI device ID */ + u_int16_t ah_subvendorid; /* PCI subvendor ID */ + HAL_SOFTC ah_sc; /* back pointer to driver/os state */ + HAL_BUS_TAG ah_st; /* params for register r+w */ + HAL_BUS_HANDLE ah_sh; + HAL_CTRY_CODE ah_countryCode; + + u_int32_t ah_macVersion; /* MAC version id */ + u_int16_t ah_macRev; /* MAC revision */ + u_int16_t ah_phyRev; /* PHY revision */ + u_int16_t ah_analog5GhzRev;/* 2GHz radio revision */ + u_int16_t ah_analog2GhzRev;/* 5GHz radio revision */ + + const HAL_RATE_TABLE *(*ah_getRateTable)(struct ath_hal *, u_int mode); + void (*ah_detach)(struct ath_hal*); + + /* Reset functions */ + HAL_BOOL (*ah_reset)(struct ath_hal *, HAL_OPMODE, + HAL_CHANNEL *, HAL_BOOL bChannelChange, + HAL_STATUS *status); + HAL_BOOL (*ah_setPCUConfig)(struct ath_hal *, HAL_OPMODE); + HAL_BOOL (*ah_perCalibration)(struct ath_hal*, HAL_CHANNEL *); + + /* Transmit functions */ + HAL_BOOL (*ah_updateTxTrigLevel)(struct ath_hal*, + HAL_BOOL incTrigLevel); + int (*ah_setupTxQueue)(struct ath_hal *, HAL_TX_QUEUE type, + HAL_BOOL irq); + HAL_BOOL (*ah_releaseTxQueue)(struct ath_hal *ah, u_int q); + HAL_BOOL (*ah_resetTxQueue)(struct ath_hal *ah, u_int q); + u_int32_t (*ah_getTxDP)(struct ath_hal*, u_int); + HAL_BOOL (*ah_setTxDP)(struct ath_hal*, u_int, u_int32_t txdp); + HAL_BOOL (*ah_startTxDma)(struct ath_hal*, u_int); + HAL_BOOL (*ah_stopTxDma)(struct ath_hal*, u_int); + HAL_BOOL (*ah_setupTxDesc)(struct ath_hal *, struct ath_desc *, + u_int pktLen, u_int hdrLen, + HAL_PKT_TYPE type, u_int txPower, + u_int txRate0, u_int txTries0, + u_int keyIx, u_int antMode, u_int flags, + u_int rtsctsRate, u_int rtsctsDuration); + HAL_BOOL (*ah_setupXTxDesc)(struct ath_hal *, struct ath_desc *, + HAL_BOOL shortPreamble, + u_int txRate1, u_int txTries1, + u_int txRate2, u_int txTries2, + u_int txRate3, u_int txTries3); + HAL_BOOL (*ah_fillTxDesc)(struct ath_hal *, struct ath_desc *, + u_int segLen, HAL_BOOL firstSeg, + HAL_BOOL lastSeg); + HAL_STATUS (*ah_procTxDesc)(struct ath_hal *, struct ath_desc *); + HAL_BOOL (*ah_hasVEOL)(struct ath_hal *); + + /* Receive Functions */ + u_int32_t (*ah_getRxDP)(struct ath_hal*); + void (*ah_setRxDP)(struct ath_hal*, u_int32_t rxdp); + void (*ah_enableReceive)(struct ath_hal*); + HAL_BOOL (*ah_stopDmaReceive)(struct ath_hal*); + void (*ah_startPcuReceive)(struct ath_hal*); + void (*ah_stopPcuReceive)(struct ath_hal*); + void (*ah_setMulticastFilter)(struct ath_hal*, + u_int32_t filter0, u_int32_t filter1); + HAL_BOOL (*ah_setMulticastFilterIndex)(struct ath_hal*, + u_int32_t index); + HAL_BOOL (*ah_clrMulticastFilterIndex)(struct ath_hal*, + u_int32_t index); + u_int32_t (*ah_getRxFilter)(struct ath_hal*); + void (*ah_setRxFilter)(struct ath_hal*, u_int32_t); + HAL_BOOL (*ah_setupRxDesc)(struct ath_hal *, struct ath_desc *, + u_int32_t size, u_int flags); + HAL_STATUS (*ah_procRxDesc)(struct ath_hal *, struct ath_desc *, + u_int32_t phyAddr, struct ath_desc *next); + void (*ah_rxMonitor)(struct ath_hal *); + + /* Misc Functions */ + void (*ah_dumpState)(struct ath_hal *); + HAL_BOOL (*ah_getDiagState)(struct ath_hal *, + int, void **, u_int *); + void (*ah_getMacAddress)(struct ath_hal *, u_int8_t *); + HAL_BOOL (*ah_setMacAddress)(struct ath_hal *, const u_int8_t *); + HAL_BOOL (*ah_setRegulatoryDomain)(struct ath_hal*, + u_int16_t, HAL_STATUS *); + void (*ah_setLedState)(struct ath_hal*, HAL_LED_STATE); + void (*ah_writeAssocid)(struct ath_hal*, + const u_int8_t *bssid, u_int16_t assocId, + u_int16_t timOffset); + u_int32_t (*ah_gpioGet)(struct ath_hal*, u_int32_t gpio); + void (*ah_gpioSetIntr)(struct ath_hal*, u_int, u_int32_t); + u_int32_t (*ah_getTsf32)(struct ath_hal*); + u_int64_t (*ah_getTsf64)(struct ath_hal*); + void (*ah_resetTsf)(struct ath_hal*); + u_int16_t (*ah_getRegDomain)(struct ath_hal*); + HAL_BOOL (*ah_detectCardPresent)(struct ath_hal*); + void (*ah_updateMibCounters)(struct ath_hal*, HAL_MIB_STATS*); + HAL_BOOL (*ah_isHwCipherSupported)(struct ath_hal*, HAL_CIPHER); + HAL_RFGAIN (*ah_getRfGain)(struct ath_hal*); +#if 0 + u_int32_t (*ah_getCurRssi)(struct ath_hal*); + u_int32_t (*ah_getDefAntenna)(struct ath_hal*); + void (*ah_setDefAntenna)(struct ath_hal*, u_int32_t antenna); +#endif + HAL_BOOL (*ah_setSlotTime)(struct ath_hal*, u_int); + + /* Key Cache Functions */ + u_int32_t (*ah_getKeyCacheSize)(struct ath_hal*); + HAL_BOOL (*ah_resetKeyCacheEntry)(struct ath_hal*, u_int16_t); + HAL_BOOL (*ah_isKeyCacheEntryValid)(struct ath_hal *, u_int16_t); + HAL_BOOL (*ah_setKeyCacheEntry)(struct ath_hal*, + u_int16_t, const HAL_KEYVAL *, + const u_int8_t *, int); + HAL_BOOL (*ah_setKeyCacheEntryMac)(struct ath_hal*, + u_int16_t, const u_int8_t *); + + /* Power Management Functions */ + HAL_BOOL (*ah_setPowerMode)(struct ath_hal*, + HAL_POWER_MODE mode, int setChip, + u_int16_t sleepDuration); + HAL_POWER_MODE (*ah_getPowerMode)(struct ath_hal*); + HAL_BOOL (*ah_queryPSPollSupport)(struct ath_hal*); + HAL_BOOL (*ah_initPSPoll)(struct ath_hal*); + HAL_BOOL (*ah_enablePSPoll)(struct ath_hal *, + u_int8_t *, u_int16_t); + HAL_BOOL (*ah_disablePSPoll)(struct ath_hal *); + + /* Beacon Management Functions */ + void (*ah_beaconInit)(struct ath_hal *, HAL_OPMODE, + u_int32_t, u_int32_t); + void (*ah_setStationBeaconTimers)(struct ath_hal*, + const HAL_BEACON_STATE *, u_int32_t tsf, + u_int32_t dtimCount, u_int32_t cfpCcount); + void (*ah_resetStationBeaconTimers)(struct ath_hal*); + HAL_BOOL (*ah_waitForBeaconDone)(struct ath_hal *, + HAL_BUS_ADDR); + + /* Interrupt functions */ + HAL_BOOL (*ah_isInterruptPending)(struct ath_hal*); + HAL_BOOL (*ah_getPendingInterrupts)(struct ath_hal*, HAL_INT *); + HAL_INT (*ah_getInterrupts)(struct ath_hal*); + HAL_INT (*ah_setInterrupts)(struct ath_hal*, HAL_INT); +}; + +/* + * Check the PCI vendor ID and device ID against Atheros' values + * and return a printable description for any Atheros hardware. + * AH_NULL is returned if the ID's do not describe Atheros hardware. + */ +extern const char *ath_hal_probe(u_int16_t vendorid, u_int16_t devid); + +/* + * Attach the HAL for use with the specified device. The device is + * defined by the PCI device ID. The caller provides an opaque pointer + * to an upper-layer data structure (HAL_SOFTC) that is stored in the + * HAL state block for later use. Hardware register accesses are done + * using the specified bus tag and handle. On successful return a + * reference to a state block is returned that must be supplied in all + * subsequent HAL calls. Storage associated with this reference is + * dynamically allocated and must be freed by calling the ah_detach + * method when the client is done. If the attach operation fails a + * null (AH_NULL) reference will be returned and a status code will + * be returned if the status parameter is non-zero. + */ +extern struct ath_hal *ath_hal_attach(u_int16_t devid, HAL_SOFTC, + HAL_BUS_TAG, HAL_BUS_HANDLE, HAL_STATUS* status); + +/* + * Return a list of channels available for use with the hardware. + * The list is based on what the hardware is capable of, the specified + * country code, the modeSelect mask, and whether or not outdoor + * channels are to be permitted. + * + * The channel list is returned in the supplied array. maxchans + * defines the maximum size of this array. nchans contains the actual + * number of channels returned. If a problem occurred or there were + * no channels that met the criteria then AH_FALSE is returned. + */ +extern HAL_BOOL ath_hal_init_channels(struct ath_hal *, + HAL_CHANNEL *chans, u_int maxchans, u_int *nchans, + HAL_CTRY_CODE cc, u_int16_t modeSelect, int enableOutdoor); + +/* + * Return bit mask of wireless modes supported by the hardware. + */ +extern u_int ath_hal_getwirelessmodes(struct ath_hal *ah, HAL_CTRY_CODE cc); + +/* + * Return rate table for specified mode (11a, 11b, 11g, etc). + */ +extern const HAL_RATE_TABLE *ath_hal_getratetable(struct ath_hal *, + u_int mode); + +/* + * Calculate the transmit duration of a frame. + */ +extern u_int16_t ath_hal_computetxtime(struct ath_hal *, + const HAL_RATE_TABLE *rates, u_int32_t frameLen, + u_int16_t rateix, HAL_BOOL shortPreamble); + +/* + * Convert between IEEE channel number and channel frequency + * using the specified channel flags; e.g. CHANNEL_2GHZ. + */ +extern u_int ath_hal_mhz2ieee(u_int mhz, u_int flags); +extern u_int ath_hal_ieee2mhz(u_int ieee, u_int flags); + +/* + * Return a version string for the HAL release. + */ +extern char ath_hal_version[]; +#endif /* _ATH_AH_H_ */ Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/i386-elf.hal.o.uu =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/i386-elf.hal.o.uu (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/i386-elf.hal.o.uu (revision 123043) @@ -0,0 +1,3559 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: i386-elf.hal.o.uu,v 1.10 2003/11/29 00:14:18 sam Exp $ + */ +begin 644 hal.o +M?T5,1@$!`0D```````````$``P`!``````````````#D%P(``````#0````` +M`"@`#0`*`````````````````%6)Y0^W50B!^A00``!T<8'Z%!```'\9@_H2 +M?PR#^A%]5(/Z!W1(ZU^#^A-T4^M8D('Z$Q$``'1(@?H3$0``?Q*!^@<1``!T +M)H'Z$A$``'0EZS6X`````('Z$_```'0QN!0```"!^AOQ``!T).L9N"@```#K +M&[@U````ZQ2-="8`N$(```#K";@`````C70F`%W#C;0F`````(V\)P````!5 +MB>6#[`0/MU4(#[=-#&:!^HP6=`RX`````&:!^B>G=0B)#"3H-____XGL7<.- +M=@!5B>564X/L%(MU#(M=$(M5%(M-&`^W10@]%!```'13/100``!_((/X$G\* +M@_@1?6&#^`?K"H/X$W0]/0<"``!T:NF.````/1,1``!T*CT3$0``?PX]!Q$` +M`'10/1(1``#K##T3\```=`X]&_$``'0AZV*X$P```(E,)!")5"0,B5PD"(ET +M)`2)!"3H_/___^L_B4PD$(E4)`R)7"0(B70D!(D$).C\____ZR6)3"00B50D +M#(E<)`B)="0$B00DZ/S___^-M@````"-O"<`````B<+K#+H`````QP$!```` +MD(72=$L/MX),`0``9HE""`^W@DX!``!FB4(*BX)0`0``B4(<#[>"5`$``&:) +M0B`/MX)6`0``9HE"(@^W@E@!``!FB4(D#[>"6@$``&:)0B:)T(/$%%M>7<.0 +MC;0F`````%6)Y5=64X/L!(M]"+L`````BW4,C;8`````C;\`````BT<4@W\0 +M`'4'C10&[>L$D(L$!B-%$+H!````.T44=!K'!"0*````Z/S___]#@?OG`P`` +M?LNZ`````(G0@\0$6UY?7<.-M@````"-OP````!5B>564XM-"(MU#+L````` +MN``````Y\',8C;0F`````(T4`(G(@^`!"=#1Z4,Y\W+O6UY=PXUT)@"-O"<` +M````58GE@^P,B1PDB70D!(E\)`B+30R+=1`/MU44#[=H/X!`^$F````.G(````D(UT)@"_P````(-] +M&`!T%8!\T2<`=`Z_8````(GVC;PG`````(T$]0````!IP.@#``"Z`````/?S +MC40X"NF+````C78`C12=`````+C336(0]^+!Z@:-1/(5B=&Z`````/?QC02% +M)````.MAC13=`````+C336(0]^+!Z@:-1/(5B=&Z`````/?QC02%%@```.LZ +MC12=`````+C336(0]^+!Z@:-1/(5B=&Z`````/?QP>`"@?OG`P``=P<%O0`` +M`.L*@\!Q=PXVV`````%6)Y8M-#/9! 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+M`P``F#$```$#``"@,0```0,``*@Q```!`P``L#$```$#``"X,0```0,``,`Q +M```!`P``R#$```$#``#0,0```0,``-@Q```!`P``X#$```$#``#H,0```0,` +M`/`Q```!`P``^#$```$#````,@```0,```@R```!`P``$#(```$#```8,@`` +M`0,``"`R```!`P``*#(```$#```P,@```0,``#@R```!`P``0#(```$#``!( +M,@```0,``%`R```!`P``6#(```$#``!@,@```0,``&@R```!`P``<#(```$# +M``!X,@```0,``(`R```!`P``B#(```$#``"0,@```0,``)@R```!`P``H#(` +M``$#``"H,@```0,``+`R```!`P``N#(```$#``#`,@```0,``,@R```!`P`` +MT#(```$#``#8,@```0,``.`R```!`P``Z#(```$#``#P,@```0,``/@R```! +M`P```#,```$#```(,P```0,``!`S```!`P``&#,```$#```@,P```0,``"@S +M```!`P``,#,```$#```X,P```0$``#PS```!`0``0#,```$!``!$,P```0$` +M`$@S```!`0``3#,```$!``!0,P```0$``%0S```!`0``6#,```$!``!<,P`` +M`0$``&`S```!`0``9#,```$!``!H,P```0$``&PS```!`0``<#,```$!``!T +M,P```0$``'@S```!`0``?#,```$!``"`,P```0$``(0S```!`0``B#,```$! +M``",,P```0$``)`S```!`0``E#,```$!``"8,P```0$``)PS```!`0``H#,` +M``$!``"D,P```0$``*@S```!`0``K#,```$!``"P,P```0$``+0S```!`0`` +MN#,```$!``"X4P```0$``+Q3```!`0``P%,```$!``#$4P```0$``,A3```! +M`0``S%,```$!```060```0$``!19```!`0``&%D```$!```<60```0$``"!9 +M```!`0``)%D```$!```H60```0$``"Q9```!`0``,%D```$!```T60```0$` +M`#A9```!`0``/%D```$!``!`60```0$``$19```!`0``2%D```$!``!,60`` +M`0$``-@````!!```X`````$$``#H`````00``/`````!!```^`````$$```` +M`0```00```@!```!!```$`$```$$```8`0```00``"`!```!!```*`$```$$ +J```P`0```00``#@!```!!```0`$```$$``!(`0```00``%`!```!!``` +` +end Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/i386-elf.hal.o.uu ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.c =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.c (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.c (revision 123043) @@ -0,0 +1,394 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: ah_osdep.c,v 1.28 2003/11/01 01:43:21 sam Exp $ + */ +#include "opt_ah.h" + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include /* XXX for ether_sprintf */ + +#include + +extern void ath_hal_printf(struct ath_hal *, const char*, ...) + __printflike(2,3); +extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) + __printflike(2, 0); +extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); +extern void *ath_hal_malloc(size_t); +extern void ath_hal_free(void *); +#ifdef AH_ASSERT +extern void ath_hal_assert_failed(const char* filename, + int lineno, const char* msg); +#endif +#ifdef AH_DEBUG +extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); +extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); +#endif /* AH_DEBUG */ + +/* NB: put this here instead of the driver to avoid circular references */ +SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); +SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); + +#ifdef AH_DEBUG +static int ath_hal_debug = 0; /* XXX */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, + 0, "Atheros HAL debugging printfs"); +#endif /* AH_DEBUG */ + +SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0, + "Atheros HAL version"); + +int ath_hal_dma_beacon_response_time = 2; /* in TU's */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW, + &ath_hal_dma_beacon_response_time, 0, + "Atheros HAL DMA beacon response time"); +int ath_hal_sw_beacon_response_time = 10; /* in TU's */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW, + &ath_hal_sw_beacon_response_time, 0, + "Atheros HAL software beacon response time"); +int ath_hal_additional_swba_backoff = 0; /* in TU's */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW, + &ath_hal_additional_swba_backoff, 0, + "Atheros HAL additional SWBA backoff time"); + +void* +ath_hal_malloc(size_t size) +{ + return malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); +} + +void +ath_hal_free(void* p) +{ + return free(p, M_DEVBUF); +} + +void +ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) +{ + vprintf(fmt, ap); +} + +void +ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + ath_hal_vprintf(ah, fmt, ap); + va_end(ap); +} + +const char* +ath_hal_ether_sprintf(const u_int8_t *mac) +{ + return ether_sprintf(mac); +} + +#ifdef AH_DEBUG +void +HALDEBUG(struct ath_hal *ah, const char* fmt, ...) +{ + if (ath_hal_debug) { + __va_list ap; + va_start(ap, fmt); + ath_hal_vprintf(ah, fmt, ap); + va_end(ap); + } +} + +void +HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) +{ + if (ath_hal_debug >= level) { + __va_list ap; + va_start(ap, fmt); + ath_hal_vprintf(ah, fmt, ap); + va_end(ap); + } +} +#endif /* AH_DEBUG */ + +#ifdef AH_DEBUG_ALQ +/* + * ALQ register tracing support. + * + * Setting hw.ath.hal.alq=1 enables tracing of all register reads and + * writes to the file /tmp/ath_hal.log. The file format is a simple + * fixed-size array of records. When done logging set hw.ath.hal.alq=0 + * and then decode the file with the arcode program (that is part of the + * HAL). If you start+stop tracing the data will be appended to an + * existing file. + * + * NB: doesn't handle multiple devices properly; only one DEVICE record + * is emitted and the different devices are not identified. + */ +#include +#include +#include + +static struct alq *ath_hal_alq; +static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ +static u_int ath_hal_alq_lost; /* count of lost records */ +static const char *ath_hal_logfile = "/tmp/ath_hal.log"; +static u_int ath_hal_alq_qsize = 64*1024; + +static int +ath_hal_setlogging(int enable) +{ + int error; + + if (enable) { + error = suser(curthread); + if (error == 0) { + error = alq_open(&ath_hal_alq, ath_hal_logfile, + curthread->td_ucred, + sizeof (struct athregrec), ath_hal_alq_qsize); + ath_hal_alq_lost = 0; + ath_hal_alq_emitdev = 1; + printf("ath_hal: logging to %s enabled\n", + ath_hal_logfile); + } + } else { + if (ath_hal_alq) + alq_close(ath_hal_alq); + ath_hal_alq = NULL; + printf("ath_hal: logging disabled\n"); + error = 0; + } + return (error); +} + +static int +sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) +{ + int error, enable; + + enable = (ath_hal_alq != NULL); + error = sysctl_handle_int(oidp, &enable, 0, req); + if (error || !req->newptr) + return (error); + else + return (ath_hal_setlogging(enable)); +} +SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, + 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); +SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, + &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); +SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, + &ath_hal_alq_lost, 0, "Register operations not logged"); + +static struct ale * +ath_hal_alq_get(struct ath_hal *ah) +{ + struct ale *ale; + + if (ath_hal_alq_emitdev) { + ale = alq_get(ath_hal_alq, ALQ_NOWAIT); + if (ale) { + struct athregrec *r = + (struct athregrec *) ale->ae_data; + r->op = OP_DEVICE; + r->reg = 0; + r->val = ah->ah_devid; + alq_post(ath_hal_alq, ale); + ath_hal_alq_emitdev = 0; + } else + ath_hal_alq_lost++; + } + ale = alq_get(ath_hal_alq, ALQ_NOWAIT); + if (!ale) + ath_hal_alq_lost++; + return ale; +} + +void +ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) +{ + if (ath_hal_alq) { + struct ale *ale = ath_hal_alq_get(ah); + if (ale) { + struct athregrec *r = (struct athregrec *) ale->ae_data; + r->op = OP_WRITE; + r->reg = reg; + r->val = val; + alq_post(ath_hal_alq, ale); + } + } +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + bus_space_write_4(ah->ah_st, ah->ah_sh, reg, htole32(val)); + else +#endif + bus_space_write_4(ah->ah_st, ah->ah_sh, reg, val); +} + +u_int32_t +ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) +{ + u_int32_t val; + + val = bus_space_read_4(ah->ah_st, ah->ah_sh, reg); +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + val = le32toh(val); +#endif + if (ath_hal_alq) { + struct ale *ale = ath_hal_alq_get(ah); + if (ale) { + struct athregrec *r = (struct athregrec *) ale->ae_data; + r->op = OP_READ; + r->reg = reg; + r->val = val; + alq_post(ath_hal_alq, ale); + } + } + return val; +} + +void +OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) +{ + if (ath_hal_alq) { + struct ale *ale = ath_hal_alq_get(ah); + if (ale) { + struct athregrec *r = (struct athregrec *) ale->ae_data; + r->op = OP_MARK; + r->reg = id; + r->val = v; + alq_post(ath_hal_alq, ale); + } + } +} +#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) +/* + * Memory-mapped device register read/write. These are here + * as routines when debugging support is enabled and/or when + * explicitly configured to use function calls. The latter is + * for architectures that might need to do something before + * referencing memory (e.g. remap an i/o window). + * + * NB: see the comments in ah_osdep.h about byte-swapping register + * reads and writes to understand what's going on below. + */ + +void +ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) +{ +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + bus_space_write_4(ah->ah_st, ah->ah_sh, reg, htole32(val)); + else +#endif + bus_space_write_4(ah->ah_st, ah->ah_sh, reg, val); +} + +u_int32_t +ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) +{ + u_int32_t val; + + val = bus_space_read_4(ah->ah_st, ah->ah_sh, reg); +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + val = le32toh(val); +#endif + return val; +} +#endif /* AH_DEBUG || AH_REGOPS_FUNC */ + +#ifdef AH_ASSERT +void +ath_hal_assert_failed(const char* filename, int lineno, const char *msg) +{ + printf("Atheros HAL assertion failure: %s: line %u: %s\n", + filename, lineno, msg); + panic("ath_hal_assert"); +} +#endif /* AH_ASSERT */ + +/* + * Delay n microseconds. + */ +void +ath_hal_delay(int n) +{ + DELAY(n); +} + +u_int32_t +ath_hal_getuptime(struct ath_hal *ah) +{ + struct bintime bt; + getbinuptime(&bt); + return (bt.sec * 1000) + + (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); +} + +/* + * Module glue. + */ + +static int +ath_hal_modevent(module_t mod, int type, void *unused) +{ + switch (type) { + case MOD_LOAD: + if (bootverbose) + printf("ath_hal: " + "version %s\n", ath_hal_version); + return 0; + case MOD_UNLOAD: + return 0; + } + return EINVAL; +} + +static moduledata_t ath_hal_mod = { + "ath_hal", + ath_hal_modevent, + 0 +}; +DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); +MODULE_VERSION(ath_hal, 1); Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.c ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.h =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.h (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.h (revision 123043) @@ -0,0 +1,125 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: ah_osdep.h,v 1.10 2003/11/01 01:21:31 sam Exp $ + */ +#ifndef _ATH_AH_OSDEP_H_ +#define _ATH_AH_OSDEP_H_ +/* + * Atheros Hardware Access Layer (HAL) OS Dependent Definitions. + */ +#include +#include +#include + +#include + +typedef void* HAL_SOFTC; +typedef bus_space_tag_t HAL_BUS_TAG; +typedef bus_space_handle_t HAL_BUS_HANDLE; +typedef bus_addr_t HAL_BUS_ADDR; + +/* + * Delay n microseconds. + */ +extern void ath_hal_delay(int); +#define OS_DELAY(_n) ath_hal_delay(_n) + +#define OS_INLINE __inline +#define OS_MEMZERO(_a, _size) bzero((_a), (_size)) +#define OS_MEMCPY(_dst, _src, _size) bcopy((_src), (_dst), (_size)) +#define OS_MACEQU(_a, _b) \ + (bcmp((_a), (_b), IEEE80211_ADDR_LEN) == 0) + +struct ath_hal; +extern u_int32_t ath_hal_getuptime(struct ath_hal *); +#define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah) + +/* + * Register read/write; we assume the registers will always + * be memory-mapped. Note that register accesses are done + * using target-specific functions when debugging is enabled + * (AH_DEBUG) or we are explicitly configured this way. The + * latter is used on some platforms where the full i/o space + * cannot be directly mapped. + */ +#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ) +#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) +#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg) + +extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val); +extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg); +#else +/* + * The hardware registers are native little-endian byte order. + * Big-endian hosts are handled by enabling hardware byte-swap + * of register reads and writes at reset. But the PCI clock + * domain registers are not byte swapped! Thus, on big-endian + * platforms we have to byte-swap thoese registers specifically. + * Most of this code is collapsed at compile time because the + * register values are constants. + */ +#define AH_LITTLE_ENDIAN 1234 +#define AH_BIG_ENDIAN 4321 + +#if _BYTE_ORDER == _BIG_ENDIAN +#define OS_REG_WRITE(_ah, _reg, _val) do { \ + if ( (_reg) >= 0x4000 && (_reg) < 0x5000) \ + bus_space_write_4((_ah)->ah_st, (_ah)->ah_sh, \ + (_reg), htole32(_val)); \ + else \ + bus_space_write_4((_ah)->ah_st, (_ah)->ah_sh, \ + (_reg), (_val)); \ +} while (0) +#define OS_REG_READ(_ah, _reg) \ + (((_reg) >= 0x4000 && (_reg) < 0x5000) ? \ + le32toh(bus_space_read_4((_ah)->ah_st, (_ah)->ah_sh, \ + (_reg))) : \ + bus_space_read_4((_ah)->ah_st, (_ah)->ah_sh, (_reg))) +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define OS_REG_WRITE(_ah, _reg, _val) \ + bus_space_write_4((_ah)->ah_st, (_ah)->ah_sh, (_reg), (_val)) +#define OS_REG_READ(_ah, _reg) \ + ((u_int32_t) bus_space_read_4((_ah)->ah_st, (_ah)->ah_sh, (_reg))) +#endif /* _BYTE_ORDER */ +#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */ + +#ifdef AH_DEBUG_ALQ +extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value); +#else +#define OS_MARK(_ah, _id, _v) +#endif + +#endif /* _ATH_AH_OSDEP_H_ */ Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_osdep.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_if.m =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_if.m (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_if.m (revision 123043) @@ -0,0 +1,90 @@ +# +# Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros +# Communications, Inc. All rights reserved. +# +# Redistribution and use in source and binary forms are permitted +# provided that the following conditions are met: +# 1. The materials contained herein are unmodified and are used +# unmodified. +# 2. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following NO +# ''WARRANTY'' disclaimer below (''Disclaimer''), without +# modification. +# 3. Redistributions in binary form must reproduce at minimum a +# disclaimer similar to the Disclaimer below and any redistribution +# must be conditioned upon including a substantially similar +# Disclaimer requirement for further binary redistribution. +# 4. Neither the names of the above-listed copyright holders nor the +# names of any contributors may be used to endorse or promote +# product derived from this software without specific prior written +# permission. +# +# NO WARRANTY +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, +# MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE +# FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF +# USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +# OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGES. +# +# $Id: ah_if.m,v 1.4 2003/06/25 04:55:02 sam Exp $ +# + +INTERFACE ath_hal; + +METHOD const char* ath_hal_probe { + u_int16_t vendorID; + u_int16_ deviceID; +}; + +METHOD struct ath_hal* ath_hal_attach { + u_int16_t deviceID; + HAL_SOFTC sc; + HAL_BUS_TAG st; + HAL_BUS_HANDLE sh; + HAL_STATUS* error; +}; + +METHOD u_int ath_hal_init_channels { + struct ath_hal* ah; + HAL_CHANNEL* chans; + u_int maxchans; + u_int* nchans; + HAL_CTRY_CODE cc; + u_int16_t modeSelect; + int enableOutdoor; +}; + +METHOD u_int ath_hal_getwirelessmodes { + struct ath_hal* ah; + HAL_CTRY_CODE cc; +}; + +METHOD const HAL_RATE_TABLE* ath_hal_getratetable { + struct ath_hal* ah; + u_int mode; +}; + +METHOD u_int16_t ath_hal_computetxtime { + struct ath_hal* ah; + const HAL_RATE_TABLE* rates; + u_int32_t frameLength; + u_int16_t rateIndex; + HAL_BOOL shortPreamble; +}; + +METHOD u_int ath_hal_mhz2ieee { + u_int mhz; + u_int flags; +}; + +METHOD u_int ath_hal_ieee2mhz { + u_int ieee; + u_int flags; +}; Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/ah_if.m ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/opt_ah.h =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/opt_ah.h (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/opt_ah.h (revision 123043) @@ -0,0 +1,3 @@ +#define AH_SUPPORT_AR5210 1 +#define AH_SUPPORT_AR5211 1 +#define AH_SUPPORT_AR5212 1 Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/freebsd/opt_ah.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/version.h =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/version.h (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/version.h (revision 123043) @@ -0,0 +1,38 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer, + * without modification. + * 2. Redistributions in binary form must reproduce at minimum a disclaimer + * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any + * redistribution must be conditioned upon including a substantially + * similar Disclaimer requirement for further binary redistribution. + * 3. Neither the names of the above-listed copyright holders nor the names + * of any contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGES. + * + * $Id: version.h,v 1.25 2003/11/25 22:17:40 sam Exp $ + */ +#define ATH_HAL_VERSION "0.9.6.1" Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/version.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_devid.h =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_devid.h (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_devid.h (revision 123043) @@ -0,0 +1,69 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: ah_devid.h,v 1.7 2003/10/22 21:17:40 sam Exp $ + */ + +#ifndef _DEV_ATH_DEVID_H_ +#define _DEV_ATH_DEVID_H_ + +#define ATHEROS_VENDOR_ID 0x168c /* Atheros PCI vendor ID */ +/* + * NB: all Atheros-based devices should have a PCI vendor ID + * of 0x168c, but some vendors, in their infinite wisdom + * do not follow this so we must handle them specially. + */ +#define ATHEROS_3COM_VENDOR_ID 0xa727 /* 3Com PCI vendor ID */ + +/* AR5210 (for reference) */ +#define AR5210_DEFAULT 0x1107 /* No eeprom HW default */ +#define AR5210_PROD 0x0007 /* Final device ID */ +#define AR5210_AP 0x0207 /* Early AP11s */ + +/* AR5211 */ +#define AR5211_DEFAULT 0x1112 /* No eeprom HW default */ +#define AR5311_DEVID 0x0011 /* Final ar5311 devid */ +#define AR5211_DEVID 0x0012 /* Final ar5211 devid */ +#define AR5211_LEGACY 0xff12 /* Original emulation board */ +#define AR5211_FPGA11B 0xf11b /* 11b emulation board */ + +/* AR5212 */ +#define AR5212_DEFAULT 0x1113 /* No eeprom HW default */ +#define AR5212_DEVID 0x0013 /* Final ar5212 devid */ +#define AR5212_FPGA 0xf013 /* Emulation board */ +#define AR5212_DEVID_IBM 0x1014 /* IBM minipci ID */ + +#define AR_SUBVENDOR_ID_NOG 0x0e11 /* No 11G subvendor ID */ +#endif /* _DEV_ATH_DEVID_H */ Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_devid.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/README =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/README (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/README (revision 123043) @@ -0,0 +1,64 @@ +$Id: README,v 1.2 2003/07/02 01:55:27 sam Exp $ + + +WARNING: THIS IS A BETA DISTRIBUTION. THIS SOFTWARE HAS KNOWN PROBLEMS AND +WARNING: LIMITATIONS THAT WILL BE CORRECTED BEFORE A PRODUCTION RELEASE. +WARNING: USE AT YOUR OWN RISK! + + +Atheros Hardware Access Layer (HAL) +=================================== + +* Copyright (c) 2002, 2003 Sam Leffler. +* Copyright (c) 2002, 2003 Atheros Communications, Inc. +* All rights reserved. + +Read the file COPYRIGHT for the complete copyright. + +This code manages much of the chip-specific operation of the Atheros driver. +The HAL is provided in a binary-only form in order to comply with FCC +regulations. In particular, a radio transmitter can only be operated at +power levels and on frequency channels for which it is approved. The FCC +requires that a software-defined radio cannot be configured by a user +to operate outside the approved power levels and frequency channels. +This makes it difficult to open-source code that enforces limits on +the power levels, frequency channels and other parameters of the radio +transmitter. See + +http://ftp.fcc.gov/Bureaus/Engineering_Technology/Orders/2001/fcc01264.pdf + +for the specific FCC regulation. Because the module is provided in a +binary-only form it is marked "Proprietary"; this means when you load +it you will see messages that your system is now "tainted". + +If you wish to use this driver on a platform for which an ath_hal +module is not already provided please contact the author. Note that +this is only necessary for new _architectures_; the HAL is not tied to +any specific version of your operating system. + + +Atheros Hardware +================ +There are currently 3 generations of Atheros 802.11 wireless devices: + +5210 supports 11a only +5211 supports both 11a and 11b +5212 supports 11a, 11b, and 11g + +These parts have been incorporated in a variety of retail products +including cardbus cards from DLink, Linksys, Netgear, and Proxim; and +mini-pci cards from some of these same vendors. In addition many +laptop vendors use Atheros mini-pci cards for their builtin wireless +support. An (incomplete) list of products that use Atheros parts is: + +Netgear WAG511 D-Link DWL-AG520 Linksys WPC55AG +Netgear WAB501 D-Link DWL-AG650 Linksys WMP55AG + D-Link DWL-AB650 Linksys WPC51AB + +In general, if a device is identified as ``11a only'' it is almost +certain to contain an Atheros 5210 part in it. All retail a+b +products use the 5211. The latest generation of universal a+b+g +combo products use the 5212. When in doubt check the PCI vendor +id with a tool like lspci, the Atheros vendor id is 0x168c; e.g. + + 00:13.0 Ethernet controller: Unknown device 168c:0012 (rev 01) Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/README ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/COPYRIGHT =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/COPYRIGHT (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/COPYRIGHT (revision 123043) @@ -0,0 +1,42 @@ +All files contained in this distribution are covered by the following +copyright unless explicitly identified otherwise. Note that this +copyright does _NOT_ contain a "or GPL" clause and does _NOT_ permit +redistribution with changes. + +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: COPYRIGHT,v 1.2 2003/06/25 04:50:21 sam Exp $ + */ Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/COPYRIGHT ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_desc.h =================================================================== --- vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_desc.h (nonexistent) +++ vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_desc.h (revision 123043) @@ -0,0 +1,172 @@ +/*- + * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting, Atheros + * Communications, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the following conditions are met: + * 1. The materials contained herein are unmodified and are used + * unmodified. + * 2. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following NO + * ''WARRANTY'' disclaimer below (''Disclaimer''), without + * modification. + * 3. Redistributions in binary form must reproduce at minimum a + * disclaimer similar to the Disclaimer below and any redistribution + * must be conditioned upon including a substantially similar + * Disclaimer requirement for further binary redistribution. + * 4. Neither the names of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote + * product derived from this software without specific prior written + * permission. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, + * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE + * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGES. + * + * $Id: ah_desc.h,v 1.11 2003/06/25 04:50:22 sam Exp $ + */ + +#ifndef _DEV_ATH_DESC_H +#define _DEV_ATH_DESC_H + +/* + * Transmit descriptor status. This structure is filled + * in only after the tx descriptor process method finds a + * ``done'' descriptor; at which point it returns something + * other than HAL_EINPROGRESS. + * + * Note that ts_antenna may not be valid for all h/w. It + * should be used only if non-zero. + */ +struct ath_tx_status { + u_int16_t ts_seqnum; /* h/w assigned sequence number */ + u_int16_t ts_tstamp; /* h/w assigned timestamp */ + u_int8_t ts_status; /* frame status, 0 => xmit ok */ + u_int8_t ts_rate; /* h/w transmit rate index */ + int8_t ts_rssi; /* tx ack RSSI */ + u_int8_t ts_shortretry; /* # short retries */ + u_int8_t ts_longretry; /* # long retries */ + u_int8_t ts_virtcol; /* virtual collision count */ + u_int8_t ts_antenna; /* antenna information */ +}; + +#define HAL_TXERR_XRETRY 0x01 /* excessive retries */ +#define HAL_TXERR_FILT 0x02 /* blocked by tx filtering */ +#define HAL_TXERR_FIFO 0x04 /* fifo underrun */ + +/* + * Receive descriptor status. This structure is filled + * in only after the rx descriptor process method finds a + * ``done'' descriptor; at which point it returns something + * other than HAL_EINPROGRESS. + * + * If rx_status is zero, then the frame was received ok; + * otherwise the error information is indicated and rs_phyerr + * contains a phy error code if HAL_RXERR_PHY is set. + * + * Note that the receive timestamp is expanded using the TSF to + * a full 16 bits (regardless of what the h/w provides directly). + */ +struct ath_rx_status { + u_int16_t rs_datalen; /* rx frame length */ + u_int16_t rs_tstamp; /* h/w assigned timestamp */ + u_int8_t rs_status; /* rx status, 0 => recv ok */ + u_int8_t rs_phyerr; /* phy error code */ + int8_t rs_rssi; /* rx frame RSSI */ + u_int8_t rs_keyix; /* key cache index */ + u_int8_t rs_rate; /* h/w receive rate index */ + u_int8_t rs_antenna; /* antenna information */ + u_int8_t rs_more; /* more descriptors follow */ +}; + +#define HAL_RXERR_CRC 0x01 /* CRC error on frame */ +#define HAL_RXERR_PHY 0x02 /* PHY error, rs_phyerr is valid */ +#define HAL_RXERR_FIFO 0x04 /* fifo overrun */ +#define HAL_RXERR_DECRYPT 0x08 /* non-Michael decrypt error */ +#define HAL_RXERR_MIC 0x10 /* Michael MIC decrypt error */ + +enum { + HAL_PHYERR_UNDERRUN = 0, /* Transmit underrun */ + HAL_PHYERR_TIMING = 1, /* Timing error */ + HAL_PHYERR_PARITY = 2, /* Illegal parity */ + HAL_PHYERR_RATE = 3, /* Illegal rate */ + HAL_PHYERR_LENGTH = 4, /* Illegal length */ + HAL_PHYERR_RADAR = 5, /* Radar detect */ + HAL_PHYERR_SERVICE = 6, /* Illegal service */ + HAL_PHYERR_TOR = 7, /* Transmit override receive */ + /* NB: these are specific to the 5212 */ + HAL_PHYERR_OFDM_TIMING = 17, /* */ + HAL_PHYERR_OFDM_SIGNAL_PARITY = 18, /* */ + HAL_PHYERR_OFDM_RATE_ILLEGAL = 19, /* */ + HAL_PHYERR_OFDM_LENGTH_ILLEGAL = 20, /* */ + HAL_PHYERR_OFDM_POWER_DROP = 21, /* */ + HAL_PHYERR_OFDM_SERVICE = 22, /* */ + HAL_PHYERR_OFDM_RESTART = 23, /* */ + HAL_PHYERR_CCK_TIMING = 25, /* */ + HAL_PHYERR_CCK_HEADER_CRC = 26, /* */ + HAL_PHYERR_CCK_RATE_ILLEGAL = 27, /* */ + HAL_PHYERR_CCK_SERVICE = 30, /* */ + HAL_PHYERR_CCK_RESTART = 31, /* */ +}; + +/* value found in rs_keyix to mark invalid entries */ +#define HAL_RXKEYIX_INVALID ((u_int8_t) -1) +/* value used to specify no encryption key for xmit */ +#define HAL_TXKEYIX_INVALID ((u_int) -1) + +/* XXX rs_antenna definitions */ + +/* + * Definitions for the software frame/packet descriptors used by + * the Atheros HAL. This definition obscures hardware-specific + * details from the driver. Drivers are expected to fillin the + * portions of a descriptor that are not opaque then use HAL calls + * to complete the work. Status for completed frames is returned + * in a device-independent format. + */ +struct ath_desc { + /* + * The following definitions are passed directly + * the hardware and managed by the HAL. Drivers + * should not touch those elements marked opaque. + */ + u_int32_t ds_link; /* phys address of next descriptor */ + u_int32_t ds_data; /* phys address of data buffer */ + u_int32_t ds_ctl0; /* opaque DMA control 0 */ + u_int32_t ds_ctl1; /* opaque DMA control 1 */ + u_int32_t ds_hw[4]; /* opaque h/w region */ + /* + * The remaining definitions are managed by software; + * these are valid only after the rx/tx process descriptor + * methods return a non-EINPROGRESS code. + */ + union { + struct ath_tx_status tx;/* xmit status */ + struct ath_rx_status rx;/* recv status */ + } ds_us; +} __attribute__((__packed__)); + +#define ds_txstat ds_us.tx +#define ds_rxstat ds_us.rx + +/* flags passed to tx descriptor setup methods */ +#define HAL_TXDESC_CLRDMASK 0x0001 /* clear destination filter mask */ +#define HAL_TXDESC_NOACK 0x0002 /* don't wait for ACK */ +#define HAL_TXDESC_RTSENA 0x0004 /* enable RTS */ +#define HAL_TXDESC_CTSENA 0x0008 /* enable CTS */ +#define HAL_TXDESC_INTREQ 0x0010 /* enable per-descriptor interrupt */ +#define HAL_TXDESC_VEOL 0x0020 /* mark virtual EOL */ + +/* flags passed to rx descriptor setup methods */ +#define HAL_RXDESC_INTREQ 0x0020 /* enable per-descriptor interrupt */ +#endif /* _DEV_ATH_AR521XDMA_H */ Property changes on: vendor-sys/ath/0.9.6.1/sys/contrib/dev/ath/ah_desc.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property