Index: head/cad/iverilog/Makefile
===================================================================
--- head/cad/iverilog/Makefile	(revision 66672)
+++ head/cad/iverilog/Makefile	(revision 66673)
@@ -1,24 +1,24 @@
 # ex:ts=8
 # New ports collection makefile for:	iverilog
 # Date created:		Feb 13, 2001
 # Whom:			Ying-Chieh Liao <ijliao@FreeBSD.org>
 #
 # $FreeBSD$
 #
 
 PORTNAME=	iverilog
 PORTVERSION=	0.6
 CATEGORIES=	cad
 MASTER_SITES=	ftp://icarus.com/pub/eda/verilog/v${PORTVERSION}/
 DISTNAME=	verilog-${PORTVERSION}
 
 MAINTAINER=	keichii@FreeBSD.org
 
 GNU_CONFIGURE=	yes
 
 USE_BISON=	yes
 USE_GMAKE=	yes
 
-MAN1=	iverilog.1
+MAN1=		iverilog.1 vvp.1
 
 .include <bsd.port.mk>

Property changes on: head/cad/iverilog/Makefile
___________________________________________________________________
Modified: cvs2svn:cvs-rev
## -1 +1 ##
-1.4
\ No newline at end of property
+1.5
\ No newline at end of property
Index: head/cad/iverilog/pkg-plist
===================================================================
--- head/cad/iverilog/pkg-plist	(revision 66672)
+++ head/cad/iverilog/pkg-plist	(revision 66673)
@@ -1,19 +1,23 @@
 bin/iverilog
+bin/vvp
 include/ivl_target.h
 include/vvm.h
 include/vpi_priv.h
 include/vvm_func.h
 include/vvm_gates.h
 include/vvm_nexus.h
 include/vvm_signal.h
 include/vvm_thread.h
 include/vvm_calltf.h
 include/vpi_user.h
+lib/ivl/fpga.tgt
 lib/ivl/ivl
 lib/ivl/iverilog.conf
 lib/ivl/system.vpi
 lib/ivl/ivlpp
 lib/ivl/null.tgt
+lib/ivl/vvp.tgt
 lib/libvvm.a
+lib/libvpi.a
 lib/libvpip.a
 @dirrm lib/ivl

Property changes on: head/cad/iverilog/pkg-plist
___________________________________________________________________
Modified: cvs2svn:cvs-rev
## -1 +1 ##
-1.1
\ No newline at end of property
+1.2
\ No newline at end of property