Index: head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c
===================================================================
--- head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c	(revision 528249)
+++ head/www/chromium/files/patch-third__party_boringssl_src_crypto_cpu-aarch64-linux.c	(revision 528250)
@@ -1,63 +1,73 @@
 --- third_party/boringssl/src/crypto/cpu-aarch64-linux.c.orig	2020-03-03 18:55:22 UTC
 +++ third_party/boringssl/src/crypto/cpu-aarch64-linux.c
-@@ -14,49 +14,35 @@
+@@ -14,49 +14,45 @@
  
  #include <openssl/cpu.h>
  
 -#if defined(OPENSSL_AARCH64) && defined(OPENSSL_LINUX) && \
 -    !defined(OPENSSL_STATIC_ARMCAP)
 +#if defined(OPENSSL_AARCH64)
  
 -#include <sys/auxv.h>
 -
  #include <openssl/arm_arch.h>
  
  #include "internal.h"
  
 -
  extern uint32_t OPENSSL_armcap_P;
  
+-void OPENSSL_cpuid_setup(void) {
+-  unsigned long hwcap = getauxval(AT_HWCAP);
 +#include <sys/types.h>
 +#include <machine/armreg.h>
-+
- void OPENSSL_cpuid_setup(void) {
--  unsigned long hwcap = getauxval(AT_HWCAP);
-+  uint64_t id_aa64isar0;
  
 -  // See /usr/include/asm/hwcap.h on an aarch64 installation for the source of
 -  // these values.
 -  static const unsigned long kNEON = 1 << 1;
 -  static const unsigned long kAES = 1 << 3;
 -  static const unsigned long kPMULL = 1 << 4;
 -  static const unsigned long kSHA1 = 1 << 5;
 -  static const unsigned long kSHA256 = 1 << 6;
-+  id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
++#ifndef ID_AA64ISAR0_AES_VAL
++#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
++#endif
++#ifndef ID_AA64ISAR0_SHA1_VAL
++#define ID_AA64ISAR0_SHA1_VAL ID_AA64ISAR0_SHA1
++#endif
++#ifndef ID_AA64ISAR0_SHA2_VAL
++#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2
++#endif
  
 -  if ((hwcap & kNEON) == 0) {
 -    // Matching OpenSSL, if NEON is missing, don't report other features
 -    // either.
 -    return;
 -  }
--
++void OPENSSL_cpuid_setup(void) {
++  uint64_t id_aa64isar0;
+ 
++  id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
++
    OPENSSL_armcap_P |= ARMV7_NEON;
  
 -  if (hwcap & kAES) {
-+  if (ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) {
++  if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) {
      OPENSSL_armcap_P |= ARMV8_AES;
    }
 -  if (hwcap & kPMULL) {
-+  if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) {
++  if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) {
      OPENSSL_armcap_P |= ARMV8_PMULL;
    }
 -  if (hwcap & kSHA1) {
-+  if (ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE) {
++  if (ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE) {
      OPENSSL_armcap_P |= ARMV8_SHA1;
    }
 -  if (hwcap & kSHA256) {
-+  if(ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) {
++  if(ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) {
      OPENSSL_armcap_P |= ARMV8_SHA256;
    }
  }
 -
 -#endif  // OPENSSL_AARCH64 && !OPENSSL_STATIC_ARMCAP
 +#endif  // OPENSSL_AARCH64
Index: head/www/chromium/files/patch-third__party_crc32c_src_src_crc32c__arm64__linux__check.h
===================================================================
--- head/www/chromium/files/patch-third__party_crc32c_src_src_crc32c__arm64__linux__check.h	(revision 528249)
+++ head/www/chromium/files/patch-third__party_crc32c_src_src_crc32c__arm64__linux__check.h	(revision 528250)
@@ -1,53 +1,57 @@
 --- third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig	2020-03-03 18:55:23 UTC
 +++ third_party/crc32c/src/src/crc32c_arm64_linux_check.h
 @@ -7,8 +7,6 @@
  #ifndef CRC32C_CRC32C_ARM_LINUX_CHECK_H_
  #define CRC32C_CRC32C_ARM_LINUX_CHECK_H_
  
 -// X86-specific code checking for the availability of SSE4.2 instructions.
 -
  #include <cstddef>
  #include <cstdint>
  
-@@ -16,30 +14,19 @@
+@@ -16,30 +14,25 @@
  
  #if HAVE_ARM64_CRC32C
  
 -#if HAVE_STRONG_GETAUXVAL
 -#include <sys/auxv.h>
 -#elif HAVE_WEAK_GETAUXVAL
 -// getauxval() is not available on Android until API level 20. Link it as a weak
 -// symbol.
 -extern "C" unsigned long getauxval(unsigned long type) __attribute__((weak));
--
++#include <sys/types.h>
++#include <machine/armreg.h>
+ 
 -#define AT_HWCAP 16
 -#endif  // HAVE_STRONG_GETAUXVAL || HAVE_WEAK_GETAUXVAL
--
-+#include <machine/armreg.h>
-+#include <sys/types.h>
++#ifndef ID_AA64ISAR0_AES_VAL
++#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
++#endif
++#ifndef ID_AA64ISAR0_CRC32_VAL
++#define ID_AA64ISAR0_CRC32_VAL ID_AA64ISAR0_CRC32
++#endif
+ 
  namespace crc32c {
  
 -inline bool CanUseArm64Linux() {
 -#if HAVE_STRONG_GETAUXVAL || HAVE_WEAK_GETAUXVAL
 -  // From 'arch/arm64/include/uapi/asm/hwcap.h' in Linux kernel source code.
 -  constexpr unsigned long kHWCAP_PMULL = 1 << 4;
 -  constexpr unsigned long kHWCAP_CRC32 = 1 << 7;
 -  unsigned long hwcap = (&getauxval != nullptr) ? getauxval(AT_HWCAP) : 0;
 -  return (hwcap & (kHWCAP_PMULL | kHWCAP_CRC32)) ==
 -         (kHWCAP_PMULL | kHWCAP_CRC32);
 -#else
 -  return false;
 -#endif  // HAVE_STRONG_GETAUXVAL || HAVE_WEAK_GETAUXVAL
 -}
 +  inline bool CanUseArm64Linux() {
 +    uint64_t id_aa64isar0;
 +  
-+    id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
-+    if ((ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) && \
-+       (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE))
-+      return true;
-+    return false;
++    id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
++    return ((ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) &&
++      (ID_AA64ISAR0_CRC32_VAL(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE));
 +  }
  
  }  // namespace crc32c
  
Index: head/www/chromium/files/patch-third__party_zlib_arm__features.c
===================================================================
--- head/www/chromium/files/patch-third__party_zlib_arm__features.c	(revision 528249)
+++ head/www/chromium/files/patch-third__party_zlib_arm__features.c	(revision 528250)
@@ -1,46 +1,60 @@
 --- third_party/zlib/arm_features.c.orig	2020-03-03 18:54:06 UTC
 +++ third_party/zlib/arm_features.c
-@@ -16,6 +16,10 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+@@ -12,10 +12,24 @@
+ int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
+ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+ 
++/*
++ * FreeBSD: we implicitly inherit ARMV8_OS_LINUX via zlib/BUILD.gn and
++ * "is_linux," which is true for FreeBSD builds.
++ */
+ #if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA)
  #include <pthread.h>
  #endif
  
 +#if defined(__FreeBSD__)
-+#include <machine/armreg.h>
 +#include <sys/types.h>
-+#else
++#include <machine/armreg.h>
++#ifndef ID_AA64ISAR0_AES_VAL
++#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
++#endif
++#ifndef ID_AA64ISAR0_CRC32_VAL
++#define ID_AA64ISAR0_CRC32_VAL ID_AA64ISAR0_CRC32
++#endif
++#else /* !__FreeBSD__ */
  #if defined(ARMV8_OS_ANDROID)
  #include <cpu-features.h>
  #elif defined(ARMV8_OS_LINUX)
-@@ -30,6 +34,7 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+@@ -30,6 +44,7 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
  #else
  #error arm_features.c ARM feature detection in not defined for your platform
  #endif
-+#endif
++#endif /* __FreeBSD__ */
  
  static void _arm_check_features(void);
  
-@@ -68,14 +73,24 @@ static void _arm_check_features(void)
+@@ -68,14 +83,24 @@ static void _arm_check_features(void)
      arm_cpu_enable_crc32 = !!(features & ANDROID_CPU_ARM_FEATURE_CRC32);
      arm_cpu_enable_pmull = !!(features & ANDROID_CPU_ARM_FEATURE_PMULL);
  #elif defined(ARMV8_OS_LINUX) && defined(__aarch64__)
 +#if defined(__FreeBSD__)
-+    uint64_t id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
-+    if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
-+        arm_cpu_enable_pmull = 1;
-+    if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
-+        arm_cpu_enable_crc32 = 1;
++    uint64_t id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
++    arm_cpu_enable_pmull =
++        (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL);
++    arm_cpu_enable_crc32 =
++        (ID_AA64ISAR0_CRC32_VAL(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE);
 +#else
      unsigned long features = getauxval(AT_HWCAP);
      arm_cpu_enable_crc32 = !!(features & HWCAP_CRC32);
      arm_cpu_enable_pmull = !!(features & HWCAP_PMULL);
-+#endif
++#endif /* __FreeBSD__ */
  #elif defined(ARMV8_OS_LINUX) && (defined(__ARM_NEON) || defined(__ARM_NEON__))
 +#if !defined(__FreeBSD__)
      /* Query HWCAP2 for ARMV8-A SoCs running in aarch32 mode */
      unsigned long features = getauxval(AT_HWCAP2);
      arm_cpu_enable_crc32 = !!(features & HWCAP2_CRC32);
      arm_cpu_enable_pmull = !!(features & HWCAP2_PMULL);
 +#endif
  #elif defined(ARMV8_OS_FUCHSIA)
      uint32_t features;
      zx_status_t rc = zx_system_get_features(ZX_FEATURE_KIND_CPU, &features);