Index: head/devel/yosys/Makefile =================================================================== --- head/devel/yosys/Makefile (revision 484925) +++ head/devel/yosys/Makefile (revision 484926) @@ -1,40 +1,39 @@ # Created by: Johnny Sorocil # $FreeBSD$ PORTNAME= yosys -DISTVERSION= 0.7-783 -DISTVERSIONSUFFIX= -gbab39eac +DISTVERSIONPREFIX= yosys- +DISTVERSION= 0.8 CATEGORIES= devel MAINTAINER= jsorocil@gmail.com COMMENT= Yosys Open SYnthesis Suite LICENSE= ISCL LICENSE_FILE= ${WRKSRC}/COPYING BUILD_DEPENDS= abc:cad/abc \ bash:shells/bash \ gawk:lang/gawk LIB_DEPENDS= libffi.so:devel/libffi USES= bison compiler:c++11-lang gmake pkgconfig python:3.6+ readline \ shebangfix tcl SHEBANG_FILES= backends/smt2/smtbmc.py \ misc/yosys-config.in USE_GITHUB= yes GH_ACCOUNT= YosysHQ -GH_TAGNAME= bab39eacce5c17c42d50a3a60a67cc8a9ee52d98 BINARY_ALIAS= python3=${PYTHON_CMD} tclsh=${TCLSH} MAKE_ARGS= ABCEXTERNAL=abc post-patch: ${REINPLACE_CMD} -e '/^CXX =/d; s/^LD = .*/LD = $$(CXX)/' \ -e '/^CONFIG/s/clang/${CHOSEN_COMPILER_TYPE}/' \ ${WRKSRC}/Makefile post-install: ${STRIP_CMD} ${STAGEDIR}${PREFIX}/bin/yosys .include Index: head/devel/yosys/distinfo =================================================================== --- head/devel/yosys/distinfo (revision 484925) +++ head/devel/yosys/distinfo (revision 484926) @@ -1,3 +1,3 @@ -TIMESTAMP = 1527191683 -SHA256 (YosysHQ-yosys-0.7-783-gbab39eac-bab39eacce5c17c42d50a3a60a67cc8a9ee52d98_GH0.tar.gz) = 1c97050a19f653fc957550cb5a505e1ebcb5722eade487bd86e8a5f9681ae09c -SIZE (YosysHQ-yosys-0.7-783-gbab39eac-bab39eacce5c17c42d50a3a60a67cc8a9ee52d98_GH0.tar.gz) = 1089933 +TIMESTAMP = 1540309364 +SHA256 (YosysHQ-yosys-yosys-0.8_GH0.tar.gz) = 07760fe732003585b26d97f9e02bcddf242ff7fc33dbd415446ac7c70e85c66f +SIZE (YosysHQ-yosys-yosys-0.8_GH0.tar.gz) = 1118433 Index: head/devel/yosys/pkg-plist =================================================================== --- head/devel/yosys/pkg-plist (revision 484925) +++ head/devel/yosys/pkg-plist (revision 484926) @@ -1,86 +1,91 @@ bin/yosys bin/yosys-config bin/yosys-filterlib bin/yosys-smtbmc %%DATADIR%%/achronix/speedster22i/cells_map.v %%DATADIR%%/achronix/speedster22i/cells_sim.v %%DATADIR%%/adff2dff.v %%DATADIR%%/cells.lib %%DATADIR%%/coolrunner2/cells_latch.v %%DATADIR%%/coolrunner2/cells_sim.v %%DATADIR%%/coolrunner2/tff_extract.v %%DATADIR%%/coolrunner2/xc2_dff.lib %%DATADIR%%/dff2ff.v +%%DATADIR%%/ecp5/arith_map.v +%%DATADIR%%/ecp5/cells_map.v +%%DATADIR%%/ecp5/cells_sim.v +%%DATADIR%%/ecp5/dram.txt +%%DATADIR%%/ecp5/drams_map.v %%DATADIR%%/gowin/cells_map.v %%DATADIR%%/gowin/cells_sim.v %%DATADIR%%/greenpak4/cells_blackbox.v %%DATADIR%%/greenpak4/cells_latch.v %%DATADIR%%/greenpak4/cells_map.v +%%DATADIR%%/greenpak4/cells_sim.v %%DATADIR%%/greenpak4/cells_sim_ams.v %%DATADIR%%/greenpak4/cells_sim_digital.v %%DATADIR%%/greenpak4/cells_sim_wip.v -%%DATADIR%%/greenpak4/cells_sim.v %%DATADIR%%/greenpak4/gp_dff.lib %%DATADIR%%/ice40/arith_map.v +%%DATADIR%%/ice40/brams.txt %%DATADIR%%/ice40/brams_init1.vh %%DATADIR%%/ice40/brams_init2.vh %%DATADIR%%/ice40/brams_init3.vh %%DATADIR%%/ice40/brams_map.v -%%DATADIR%%/ice40/brams.txt %%DATADIR%%/ice40/cells_map.v %%DATADIR%%/ice40/cells_sim.v %%DATADIR%%/ice40/latches_map.v %%DATADIR%%/include/backends/ilang/ilang_backend.h %%DATADIR%%/include/frontends/ast/ast.h %%DATADIR%%/include/kernel/celledges.h %%DATADIR%%/include/kernel/celltypes.h %%DATADIR%%/include/kernel/consteval.h %%DATADIR%%/include/kernel/hashlib.h %%DATADIR%%/include/kernel/log.h %%DATADIR%%/include/kernel/macc.h %%DATADIR%%/include/kernel/modtools.h %%DATADIR%%/include/kernel/register.h %%DATADIR%%/include/kernel/rtlil.h %%DATADIR%%/include/kernel/satgen.h %%DATADIR%%/include/kernel/sigtools.h %%DATADIR%%/include/kernel/utils.h %%DATADIR%%/include/kernel/yosys.h %%DATADIR%%/include/libs/ezsat/ezminisat.h %%DATADIR%%/include/libs/ezsat/ezsat.h %%DATADIR%%/include/libs/sha1/sha1.h %%DATADIR%%/include/passes/fsm/fsmdata.h %%DATADIR%%/intel/a10gx/cells_map.v %%DATADIR%%/intel/a10gx/cells_sim.v %%DATADIR%%/intel/common/altpll_bb.v -%%DATADIR%%/intel/common/brams_map.v %%DATADIR%%/intel/common/brams.txt +%%DATADIR%%/intel/common/brams_map.v %%DATADIR%%/intel/common/m9k_bb.v %%DATADIR%%/intel/cyclone10/cells_map.v %%DATADIR%%/intel/cyclone10/cells_sim.v %%DATADIR%%/intel/cycloneiv/cells_map.v %%DATADIR%%/intel/cycloneiv/cells_sim.v %%DATADIR%%/intel/cycloneive/cells_map.v %%DATADIR%%/intel/cycloneive/cells_sim.v %%DATADIR%%/intel/cyclonev/cells_map.v %%DATADIR%%/intel/cyclonev/cells_sim.v %%DATADIR%%/intel/max10/cells_map.v %%DATADIR%%/intel/max10/cells_sim.v %%DATADIR%%/pmux2mux.v %%DATADIR%%/python3/smtio.py %%DATADIR%%/simcells.v %%DATADIR%%/simlib.v %%DATADIR%%/techmap.v %%DATADIR%%/xilinx/arith_map.v +%%DATADIR%%/xilinx/brams.txt %%DATADIR%%/xilinx/brams_bb.v %%DATADIR%%/xilinx/brams_init_%%PYTHON_SUFFIX%%.vh %%DATADIR%%/xilinx/brams_init_16.vh %%DATADIR%%/xilinx/brams_init_18.vh %%DATADIR%%/xilinx/brams_init_32.vh %%DATADIR%%/xilinx/brams_map.v -%%DATADIR%%/xilinx/brams.txt %%DATADIR%%/xilinx/cells_map.v %%DATADIR%%/xilinx/cells_sim.v %%DATADIR%%/xilinx/cells_xtra.v -%%DATADIR%%/xilinx/drams_map.v %%DATADIR%%/xilinx/drams.txt +%%DATADIR%%/xilinx/drams_map.v %%DATADIR%%/xilinx/lut2lut.v