diff --git a/sys/alpha/alpha/api_up1000.c b/sys/alpha/alpha/api_up1000.c index cdd68a372d46..86218b1a523a 100644 --- a/sys/alpha/alpha/api_up1000.c +++ b/sys/alpha/alpha/api_up1000.c @@ -1,129 +1,127 @@ /*- * Copyright (c) 2000 Andrew Gallatin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" #ifndef CONSPEED #define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void api_up1000_init __P((void)); static void api_up1000_cons_init __P((void)); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); void api_up1000_init() { platform.family = "UP1000"; if ((platform.model = alpha_dsr_sysname()) == NULL) { /* XXX Don't know the system variations, yet. */ platform.model = alpha_unknown_sysname(); } platform.iobus = "irongate"; platform.cons_init = api_up1000_cons_init; } extern int comconsole; static void api_up1000_cons_init() { struct ctb *ctb; irongate_init(); #ifdef DDB siogdbattach(0x2f8, 57600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %ld\n", ctb->ctb_term_type); } } - - diff --git a/sys/alpha/alpha/dec_1000a.c b/sys/alpha/alpha/dec_1000a.c index 9525b26b3d79..ba8b27fb50ef 100644 --- a/sys/alpha/alpha/dec_1000a.c +++ b/sys/alpha/alpha/dec_1000a.c @@ -1,393 +1,405 @@ /* $NetBSD: dec_1000a.c,v 1.5 1999/04/15 22:06:47 thorpej Exp $ */ /* * Copyright (c) 1998 The NetBSD Foundation, Inc. * All rights reserved. * * This code is based on dec_kn20aa.c, written by Chris G. Demetriou at * Carnegie-Mellon University. Platform support for Noritake, Pintake, and * Corelle by Ross Harvey with copyright assignment by permission of Avalon * Computer Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the NetBSD * Foundation, Inc. and its contributors. * 4. Neither the name of The NetBSD Foundation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ /* - * Additional Copyright (c) 1999 by Andrew Gallatin + * Additional Copyright (c) 1999 by Andrew Gallatin * * $FreeBSD$ */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" #ifndef CONSPEED #define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_1000a_init __P((int)); static void dec_1000a_cons_init __P((void)); static void dec_1000_intr_map __P((void *)); static void dec_1000_intr_disable __P((int)); static void dec_1000_intr_enable __P((int)); static void dec_1000_intr_init __P((void)); static void dec_1000a_intr_map __P((void *)); static void dec_1000a_intr_disable __P((int)); static void dec_1000a_intr_enable __P((int)); static void dec_1000a_intr_init __P((void)); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); static const struct alpha_variation_table dec_1000_variations[] = { { 0, "AlphaServer 1000" }, { 0, NULL }, }; static const struct alpha_variation_table dec_1000a_variations[] = { { 0, "AlphaServer 1000A" }, { 0, NULL }, }; void dec_1000a_init(int cputype) { u_int64_t variation; platform.family = "AlphaServer 1000/1000A"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, cputype == ST_DEC_1000 ? dec_1000_variations : dec_1000a_variations)) == NULL) platform.model = alpha_unknown_sysname(); } switch(LOCATE_PCS(hwrpb, 0)->pcs_proc_type & PCS_PROC_MAJOR) { case PCS_PROC_EV4: case PCS_PROC_EV45: platform.iobus = "apecs"; platform.pci_intr_map = dec_1000_intr_map; platform.pci_intr_disable = dec_1000_intr_disable; platform.pci_intr_enable = dec_1000_intr_enable; platform.pci_intr_init = dec_1000_intr_init; break; default: platform.iobus = "cia"; platform.pci_intr_map = dec_1000a_intr_map; platform.pci_intr_disable = dec_1000a_intr_disable; platform.pci_intr_enable = dec_1000a_intr_enable; platform.pci_intr_init = dec_1000a_intr_init; break; } platform.cons_init = dec_1000a_cons_init; } -extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ +/* XXX for forcing comconsole when srm serial console is used */ +extern int comconsole; + static void dec_1000a_cons_init() { struct ctb *ctb; if(strcmp(platform.iobus, "cia") == 0) { cia_init(); } else { apecs_init(); } #ifdef DDB siogdbattach(0x2f8, 57600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, - * character time = (1000000 / (defaultrate / 10)) + * character time = (1000000 / (defaultrate / 10)). */ DELAY(160000000 / comcnrate); - /* - * force a comconsole on com1 if the SRM has a serial - * console + /* + * Force a comconsole on com1 if the SRM has a serial + * console. */ comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %d\n", - (int) ctb->ctb_term_type); + (int)ctb->ctb_term_type); } } static void dec_1000_intr_map(arg) void *arg; { - pcicfgregs *cfg = (pcicfgregs *)arg; + pcicfgregs *cfg; + cfg = (pcicfgregs *)arg; if (cfg->intpin == 0) /* No IRQ used. */ return; if (!(1 <= cfg->intpin && cfg->intpin <= 4)) goto bad; switch(cfg->slot) { case 6: if(cfg->intpin != 1) break; cfg->intline = 0xc; /* integrated ncr scsi */ return; break; case 11: case 12: case 13: cfg->intline = (cfg->slot - 11) * 4 + cfg->intpin - 1; return; break; } bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", - cfg->slot, cfg->intpin); + cfg->slot, cfg->intpin); } /* * Read and write the mystery ICU IMR registers - * on the AlphaServer 1000 + * on the AlphaServer 1000. */ #define IR() inw(0x536) #define IW(x) outw(0x536, (x)) /* - * Enable and disable interrupts at the ICU level + * Enable and disable interrupts at the ICU level. */ static void dec_1000_intr_enable(irq) int irq; { + IW(IR() | 1 << irq); } static void dec_1000_intr_disable(irq) int irq; { + IW(IR() & ~(1 << irq)); } static void dec_1000_intr_init() { -/* - * Initialize mystery ICU - */ + /* + * Initialize mystery ICU. + */ IW(0); /* XXX ?? */ -/* - * Enable cascade interrupt. - */ + + /* + * Enable cascade interrupt. + */ dec_1000_intr_enable(2); } /* * Read and write the mystery ICU IMR registers - * on the AlphaServer 1000a + * on the AlphaServer 1000a. */ #define IRA(o) inw(0x54a + 2*(o)) #define IWA(o, v) outw(0x54a + 2*(o), (v)) #define IMR2IRQ(bn) ((bn) - 1) #define IRQ2IMR(irq) ((irq) + 1) -static void +static void dec_1000a_intr_map(arg) void *arg; { - pcicfgregs *cfg = (pcicfgregs *)arg; - int device = cfg->slot; - int imrbit; + pcicfgregs *cfg; + int device, imrbit; /* - * Get bit number in mystery ICU imr + * Get bit number in mystery ICU imr. */ static const signed char imrmap[][4] = { # define IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 } # define IRQNONE { 0, 0, 0, 0 } /* 0 */ { 1, 0, 0, 0 }, /* Noritake and Pintake */ /* 1 */ IRQSPLIT(8), /* 2 */ IRQSPLIT(10), /* 3 */ IRQSPLIT(12), /* 4 */ IRQSPLIT(14), /* 5 */ { 1, 0, 0, 0 }, /* Corelle */ /* 6 */ { 10, 0, 0, 0 }, /* Corelle */ /* 7 */ IRQNONE, /* 8 */ { 1, 0, 0, 0 }, /* isp behind ppb */ /* 9 */ IRQNONE, /* 10 */ IRQNONE, /* 11 */ IRQSPLIT(2), /* 12 */ IRQSPLIT(4), /* 13 */ IRQSPLIT(6), /* 14 */ IRQSPLIT(8) /* Corelle */ }; + cfg = (pcicfgregs *)arg; + device = cfg->slot; + if (cfg->intpin == 0) /* No IRQ used. */ return; if (!(1 <= cfg->intpin && cfg->intpin <= 4)) goto bad; if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) { imrbit = imrmap[device][cfg->intpin - 1]; if (imrbit) { cfg->intline = IMR2IRQ(imrbit); return; } } -bad: printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, cfg->intpin); +bad: printf("dec_1000a_intr_map: can't map dev %d pin %d\n", + device, cfg->intpin); } static void dec_1000a_intr_enable(irq) int irq; { - int imrval = IRQ2IMR(irq); - int i = imrval >= 16; + int imrval, i; + + imrval = IRQ2IMR(irq); + i = imrval >= 16; IWA(i, IRA(i) | 1 << (imrval & 0xf)); } -static void +static void dec_1000a_intr_disable(irq) int irq; { - int imrval = IRQ2IMR(irq); - int i = imrval >= 16; + int imrval, i; + + imrval = IRQ2IMR(irq); + i = imrval >= 16; IWA(i, IRA(i) & ~(1 << (imrval & 0xf))); } static void dec_1000a_intr_init() { /* - * Initialize mystery ICU + * Initialize mystery ICU. */ + IWA(0, IRA(0) & 1); + IWA(1, IRA(0) & 3); - IWA(0, IRA(0) & 1); - IWA(1, IRA(0) & 3); /* * Enable cascade interrupt. - */ + */ dec_1000_intr_enable(2); } - diff --git a/sys/alpha/alpha/dec_2100_a50.c b/sys/alpha/alpha/dec_2100_a50.c index f4e9e97d54e2..bafb34bb5abe 100644 --- a/sys/alpha/alpha/dec_2100_a50.c +++ b/sys/alpha/alpha/dec_2100_a50.c @@ -1,252 +1,257 @@ /* $NetBSD: dec_2100_a50.c,v 1.39 1998/04/17 02:45:19 mjacob Exp $ */ /* $FreeBSD$ */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ /* - * Additional Copyright (c) 1998 by Andrew Gallatin for Duke University + * Additional Copyright (c) 1998 by Andrew Gallatin for Duke University. */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_2100_a50_init __P((void)); static void dec_2100_a50_cons_init __P((void)); static void dec_2100_a50_intr_map __P((void *)); -void sio_intr_establish __P((int)); -void sio_intr_disestablish __P((int)); -void sio_intr_setup __P((void)); +void sio_intr_establish __P((int)); +void sio_intr_disestablish __P((int)); +void sio_intr_setup __P((void)); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); const struct alpha_variation_table dec_2100_a50_variations[] = { { SV_ST_AVANTI, "AlphaStation 400 4/233 (\"Avanti\")" }, { SV_ST_MUSTANG2_4_166, "AlphaStation 200 4/166 (\"Mustang II\")" }, { SV_ST_MUSTANG2_4_233, "AlphaStation 200 4/233 (\"Mustang II\")" }, { SV_ST_AVANTI_4_266, "AlphaStation 250 4/266" }, { SV_ST_MUSTANG2_4_100, "AlphaStation 200 4/100 (\"Mustang II\")" }, { SV_ST_AVANTI_4_233, "AlphaStation 255/233" }, { 0, NULL }, }; void dec_2100_a50_init() { u_int64_t variation; platform.family = "AlphaStation 200/400 (\"Avanti\")"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if (variation == SV_ST_AVANTI_XXX) { /* XXX apparently the same? */ variation = SV_ST_AVANTI; } if ((platform.model = alpha_variation_name(variation, dec_2100_a50_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "apecs"; platform.cons_init = dec_2100_a50_cons_init; platform.pci_intr_map = dec_2100_a50_intr_map; } -extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ +/* XXX for forcing comconsole when srm serial console is used */ +extern int comconsole; static void dec_2100_a50_cons_init() { struct ctb *ctb; apecs_init(); #ifdef DDB siogdbattach(0x2f8, 9600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, - * character time = (1000000 / (defaultrate / 10)) + * character time = (1000000 / (defaultrate / 10)). */ DELAY(160000000 / comcnrate); /* - * force a comconsole on com1 if the SRM has a serial console + * Force a comconsole on com1 if the SRM has a serial console. */ comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %ld\n", ctb->ctb_term_type); } } -#define SIO_PCIREG_PIRQ_RTCTRL 0x60 /* PIRQ0 Route Control */ +#define SIO_PCIREG_PIRQ_RTCTRL 0x60 /* PIRQ0 Route Control */ void dec_2100_a50_intr_map(void *arg) { u_int8_t pirqline; u_int32_t pirqreg; - int pirq=0; /* gcc -Wuninitialized XXX */ - pcicfgregs *cfg = (pcicfgregs *)arg; + int pirq; + pcicfgregs *cfg; - /* - * Slot->interrupt translation. Taken from NetBSD - */ + pirq = 0; /* gcc -Wuninitialized XXX */ + cfg = (pcicfgregs *)arg; + + /* + * Slot->interrupt translation. Taken from NetBSD. + */ if(cfg->intpin == 0) return; if(cfg->intpin > 4) panic("dec_2100_a50_intr_map: bad intpin %d",cfg->intpin); switch (cfg->slot) { - case 6: /* NCR SCSI */ - pirq = 3; - break; + case 6: /* NCR SCSI */ + pirq = 3; + break; - case 11: /* slot 1 */ - case 14: /* slot 3 */ - switch(cfg->intpin){ + case 11: /* slot 1 */ + case 14: /* slot 3 */ + switch(cfg->intpin) { case 1: case 4: pirq = 0; break; case 2: pirq = 2; break; case 3: pirq = 1; break; - default: - panic("dec_2100_a50_intr_map bogus PCI pin %d\n", - cfg->intpin); + default: + panic("dec_2100_a50_intr_map bogus PCI pin %d\n", + cfg->intpin); } - break; - case 12: /* slot 2 */ - switch (cfg->intpin) { - case 1: - case 4: - pirq = 1; - break; - case 2: - pirq = 0; - break; - case 3: - pirq = 2; - break; - default: - panic("dec_2100_a50_intr_map bogus PCI pin %d\n", - cfg->intpin); - - }; - break; - - case 13: /* slot 3 */ - switch (cfg->intpin) { - case 1: - case 4: - pirq = 2; - break; - case 2: - pirq = 1; - break; - case 3: - pirq = 0; - break; + break; + case 12: /* slot 2 */ + switch (cfg->intpin) { + case 1: + case 4: + pirq = 1; + break; + case 2: + pirq = 0; + break; + case 3: + pirq = 2; + break; + default: + panic("dec_2100_a50_intr_map bogus PCI pin %d\n", + cfg->intpin); + + }; + break; + + case 13: /* slot 3 */ + switch (cfg->intpin) { + case 1: + case 4: + pirq = 2; + break; + case 2: + pirq = 1; + break; + case 3: + pirq = 0; + break; }; break; - default: - printf("dec_2100_a50_intr_map: weird slot %d\n", - cfg->slot); -/* return;*/ +default: + printf("dec_2100_a50_intr_map: weird slot %d\n", + cfg->slot); + + /* return; */ } - /* - * read the SIO IRQ routing register to determine where the - * interrupt will actually be routed. Thank you, NetBSD + /* + * Read the SIO IRQ routing register to determine where the + * interrupt will actually be routed. Thank you, NetBSD. */ - + pirqreg = chipset.cfgreadl(0, 0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL); pirqline = (pirqreg >> (pirq * 8)) & 0xff; if ((pirqline & 0x80) != 0) panic("bad pirqline %d",pirqline); - pirqline &= 0xf; + pirqline &= 0xf; cfg->intline = pirqline; } diff --git a/sys/alpha/alpha/dec_2100_a500.c b/sys/alpha/alpha/dec_2100_a500.c index 6e66d7535afa..e8c92a3704e4 100644 --- a/sys/alpha/alpha/dec_2100_a500.c +++ b/sys/alpha/alpha/dec_2100_a500.c @@ -1,158 +1,158 @@ /* * Copyright (c) 2000 Andrew Gallatin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_2100_a500_init __P((int)); static void dec_2100_a500_cons_init __P((void)); static void dec_2100_a500_intr_map __P((void *)); static void dec_2100_a500_intr_init __P((void )); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); extern vm_offset_t t2_csr_base; void dec_2100_a500_init(cputype) { - - /* - * see if we're a Sable or a Lynx - */ - if (cputype == ST_DEC_2100_A500) { - t2_csr_base = SABLE_BASE; - platform.family = "DEC AlphaServer 2100"; - } else if (cputype == ST_DEC_2100A_A500) { - t2_csr_base = LYNX_BASE; - platform.family = "DEC AlphaServer 2100A"; - } else { - t2_csr_base = SABLE_BASE; - platform.family = "DEC AlphaServer 2100?????"; - } - - - if ((platform.model = alpha_dsr_sysname()) == NULL) { - platform.model = alpha_unknown_sysname(); - } - - platform.iobus = "t2"; - platform.cons_init = dec_2100_a500_cons_init; - platform.pci_intr_map = dec_2100_a500_intr_map; - platform.pci_intr_init = dec_2100_a500_intr_init; - - - t2_init(); + /* + * See if we're a `Sable' or a `Lynx'. + */ + if (cputype == ST_DEC_2100_A500) { + t2_csr_base = SABLE_BASE; + platform.family = "DEC AlphaServer 2100"; + } else if (cputype == ST_DEC_2100A_A500) { + t2_csr_base = LYNX_BASE; + platform.family = "DEC AlphaServer 2100A"; + } else { + t2_csr_base = SABLE_BASE; + platform.family = "DEC AlphaServer 2100?????"; + } + + if ((platform.model = alpha_dsr_sysname()) == NULL) { + platform.model = alpha_unknown_sysname(); + } + + platform.iobus = "t2"; + platform.cons_init = dec_2100_a500_cons_init; + platform.pci_intr_map = dec_2100_a500_intr_map; + platform.pci_intr_init = dec_2100_a500_intr_init; + + t2_init(); } -extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ +/* XXX for forcing comconsole when srm serial console is used */ +extern int comconsole; static void dec_2100_a500_cons_init() { - struct ctb *ctb; - t2_init(); + struct ctb *ctb; + t2_init(); #ifdef DDB - siogdbattach(0x2f8, 9600); + siogdbattach(0x2f8, 9600); #endif - ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); - - switch (ctb->ctb_term_type) { - case 2: - /* serial console ... */ - /* XXX */ - /* - * Delay to allow PROM putchars to complete. - * FIFO depth * character time, - * character time = (1000000 / (defaultrate / 10)) - */ - DELAY(160000000 / comcnrate); - /* - * force a comconsole on com1 if the SRM has a serial console - */ - comconsole = 0; - if (siocnattach(0x3f8, comcnrate)) - panic("can't init serial console"); - - boothowto |= RB_SERIAL; - break; - - case 3: - /* display console ... */ - /* XXX */ + ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); + + switch (ctb->ctb_term_type) { + case 2: + /* serial console ... */ + /* XXX */ + /* + * Delay to allow PROM putchars to complete. + * FIFO depth * character time, + * character time = (1000000 / (defaultrate / 10)) + */ + DELAY(160000000 / comcnrate); + /* + * force a comconsole on com1 if the SRM has a serial console + */ + comconsole = 0; + if (siocnattach(0x3f8, comcnrate)) + panic("can't init serial console"); + + boothowto |= RB_SERIAL; + break; + + case 3: + /* display console ... */ + /* XXX */ #if NSC > 0 - sccnattach(); + sccnattach(); #else - panic("not configured to use display && keyboard console"); + panic("not configured to use display && keyboard console"); #endif - break; + break; - default: - printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); - panic("consinit: unknown console type"); - } + default: + printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); + panic("consinit: unknown console type"); + } } void dec_2100_a500_intr_map(void *arg) { - pcicfgregs *cfg = (pcicfgregs *)arg; + pcicfgregs *cfg; - cfg->intline += 32; + cfg = (pcicfgregs *)arg; + cfg->intline += 32; } void dec_2100_a500_intr_init(void ) { + outb(SLAVE0_ICU, 0); outb(SLAVE1_ICU, 0); outb(SLAVE2_ICU, 0); outb(MASTER_ICU, 0x44); } diff --git a/sys/alpha/alpha/dec_3000_300.c b/sys/alpha/alpha/dec_3000_300.c index f1355601f4a6..469eee03f37a 100644 --- a/sys/alpha/alpha/dec_3000_300.c +++ b/sys/alpha/alpha/dec_3000_300.c @@ -1,82 +1,83 @@ /* $FreeBSD$ */ /* * Copyright (c) 1997 by Matthew Jacob * NASA AMES Research Center. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice immediately at the beginning of the file, without modification, * this list of conditions, and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_cpu.h" #include #include #include #include #include #include #include #include void dec_3000_300_init(int); static void dec_3000_300_cons_init(void); static const struct alpha_variation_table dec_3000_300_variations[] = { - { SV_ST_PELICAN, "DEC 3000/300 (\"Pelican\")" }, - { SV_ST_PELICA, "DEC 3000/300L (\"Pelica\")" }, - { SV_ST_PELICANPLUS, "DEC 3000/300X (\"Pelican+\")" }, - { SV_ST_PELICAPLUS, "DEC 3000/300LX (\"Pelica+\")" }, + { SV_ST_PELICAN, "DEC 3000/300 (\"Pelican\")" }, + { SV_ST_PELICA, "DEC 3000/300L (\"Pelica\")" }, + { SV_ST_PELICANPLUS, "DEC 3000/300X (\"Pelican+\")" }, + { SV_ST_PELICAPLUS, "DEC 3000/300LX (\"Pelica+\")" }, { 0, NULL }, }; void dec_3000_300_init(int cputype) { u_int64_t variation; platform.family = "DEC 3000/300 (\"Pelican\")"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, dec_3000_300_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "tcasic"; platform.cons_init = dec_3000_300_cons_init; } /* * dec_3000_300_cons_init- not needed right now. * */ static void dec_3000_300_cons_init(void) { + return; } diff --git a/sys/alpha/alpha/dec_3000_500.c b/sys/alpha/alpha/dec_3000_500.c index e4f68bf6d094..c9b8d1dd1466 100644 --- a/sys/alpha/alpha/dec_3000_500.c +++ b/sys/alpha/alpha/dec_3000_500.c @@ -1,102 +1,103 @@ /* $FreeBSD$ */ /* * Copyright (c) 1997 by Matthew Jacob * NASA AMES Research Center. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice immediately at the beginning of the file, without modification, * this list of conditions, and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_cpu.h" #include #include #include #include #include #include #include #include void dec_3000_500_init(int); static void dec_3000_500_cons_init(void); static const char dec_3000_500_sp[] = "DEC 3000/400 (\"Sandpiper\")"; static const char dec_3000_500_sf[] = "DEC 3000/500 (\"Flamingo\")"; const struct alpha_variation_table dec_3000_500_variations[] = { - { SV_ST_SANDPIPER, dec_3000_500_sp }, - { SV_ST_FLAMINGO, dec_3000_500_sf }, - { SV_ST_HOTPINK, "DEC 3000/500X (\"Hot Pink\")" }, - { SV_ST_FLAMINGOPLUS, "DEC 3000/800 (\"Flamingo+\")" }, - { SV_ST_SANDPLUS, "DEC 3000/600 (\"Sandpiper+\")" }, - { SV_ST_SANDPIPER45, "DEC 3000/700 (\"Sandpiper45\")" }, - { SV_ST_FLAMINGO45, "DEC 3000/900 (\"Flamingo45\")" }, - { 0, NULL }, + { SV_ST_SANDPIPER, dec_3000_500_sp }, + { SV_ST_FLAMINGO, dec_3000_500_sf }, + { SV_ST_HOTPINK, "DEC 3000/500X (\"Hot Pink\")" }, + { SV_ST_FLAMINGOPLUS, "DEC 3000/800 (\"Flamingo+\")" }, + { SV_ST_SANDPLUS, "DEC 3000/600 (\"Sandpiper+\")" }, + { SV_ST_SANDPIPER45, "DEC 3000/700 (\"Sandpiper45\")" }, + { SV_ST_FLAMINGO45, "DEC 3000/900 (\"Flamingo45\")" }, + { 0, NULL }, }; void dec_3000_500_init(int cputype) { u_int64_t variation; platform.family = "DEC 3000/500 (\"Flamingo\")"; - if ((platform.model = alpha_dsr_sysname()) == NULL) { - variation = hwrpb->rpb_variation & SV_ST_MASK; - if (variation == SV_ST_ULTRA) { - /* These are really the same. */ - variation = SV_ST_FLAMINGOPLUS; - } - if ((platform.model = alpha_variation_name(variation, - dec_3000_500_variations)) == NULL) { - /* - * This is how things used to be done. - */ - if (variation == SV_ST_RESERVED) { - if (hwrpb->rpb_variation & SV_GRAPHICS) - platform.model = dec_3000_500_sf; - else - platform.model = dec_3000_500_sp; - } else - platform.model = alpha_unknown_sysname(); - } - } + if ((platform.model = alpha_dsr_sysname()) == NULL) { + variation = hwrpb->rpb_variation & SV_ST_MASK; + if (variation == SV_ST_ULTRA) { + /* These are really the same. */ + variation = SV_ST_FLAMINGOPLUS; + } + if ((platform.model = alpha_variation_name(variation, + dec_3000_500_variations)) == NULL) { + /* + * This is how things used to be done. + */ + if (variation == SV_ST_RESERVED) { + if (hwrpb->rpb_variation & SV_GRAPHICS) + platform.model = dec_3000_500_sf; + else + platform.model = dec_3000_500_sp; + } else + platform.model = alpha_unknown_sysname(); + } + } platform.iobus = "tcasic"; platform.cons_init = dec_3000_500_cons_init; } /* * dec_3000_500_cons_init- not needed right now. * */ static void dec_3000_500_cons_init(void) { + return; } diff --git a/sys/alpha/alpha/dec_axppci_33.c b/sys/alpha/alpha/dec_axppci_33.c index f212f5ca784c..54984a809014 100644 --- a/sys/alpha/alpha/dec_axppci_33.c +++ b/sys/alpha/alpha/dec_axppci_33.c @@ -1,281 +1,284 @@ /* $FreeBSD$ */ /* $NetBSD: dec_axppci_33.c,v 1.38 1998/07/07 08:49:12 ross Exp $ */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_axppci_33_init __P((void)); static void dec_axppci_33_cons_init __P((void)); static void dec_axppci_33_intr_map __P((void *)); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); const struct alpha_variation_table dec_axppci_33_variations[] = { { 0, "Alpha PC AXPpci33 (\"NoName\")" }, { 0, NULL }, }; -#define NSIO_PORT 0x26e /* Hardware enabled option: 0x398 */ -#define NSIO_BASE 0 -#define NSIO_INDEX NSIO_BASE -#define NSIO_DATA 1 -#define NSIO_SIZE 2 -#define NSIO_CFG0 0 -#define NSIO_CFG1 1 -#define NSIO_CFG2 2 -#define NSIO_IDE_ENABLE 0x40 +#define NSIO_PORT 0x26e /* Hardware enabled option: 0x398 */ +#define NSIO_BASE 0 +#define NSIO_INDEX NSIO_BASE +#define NSIO_DATA 1 +#define NSIO_SIZE 2 +#define NSIO_CFG0 0 +#define NSIO_CFG1 1 +#define NSIO_CFG2 2 +#define NSIO_IDE_ENABLE 0x40 void dec_axppci_33_init() { int cfg0val; u_int64_t variation; platform.family = "DEC AXPpci"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, dec_axppci_33_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "lca"; platform.cons_init = dec_axppci_33_cons_init; platform.pci_intr_map = dec_axppci_33_intr_map; lca_init(); outb(NSIO_PORT + NSIO_INDEX, NSIO_CFG0); alpha_mb(); cfg0val = inb(NSIO_PORT + NSIO_DATA); cfg0val |= NSIO_IDE_ENABLE; outb(NSIO_PORT + NSIO_INDEX, NSIO_CFG0); alpha_mb(); outb(NSIO_PORT + NSIO_DATA, cfg0val); alpha_mb(); outb(NSIO_PORT + NSIO_DATA, cfg0val); } -extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ +/* XXX for forcing comconsole when srm serial console is used */ +extern int comconsole; static void dec_axppci_33_cons_init() { struct ctb *ctb; lca_init(); #ifdef DDB siogdbattach(0x2f8, 9600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); /* * force a comconsole on com1 if the SRM has a serial console */ comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type"); } } -#define SIO_PCIREG_PIRQ_RTCTRL 0x60 /* PIRQ0 Route Control */ +#define SIO_PCIREG_PIRQ_RTCTRL 0x60 /* PIRQ0 Route Control */ void dec_axppci_33_intr_map(void *arg) { - pcicfgregs *cfg = (pcicfgregs *)arg; + pcicfgregs *cfg; int pirq; u_int32_t pirqreg; u_int8_t pirqline; + cfg = (pcicfgregs *)arg; + #ifndef DIAGNOSTIC pirq = 0; /* XXX gcc -Wuninitialized */ #endif - /* - * Slot->interrupt translation. Taken from NetBSD - */ + /* + * Slot->interrupt translation. Taken from NetBSD. + */ if (cfg->intpin == 0) { /* No IRQ used. */ return; } if (cfg->intpin > 4) { printf("dec_axppci_33_intr_map: bad interrupt pin %d\n", - cfg->intpin); + cfg->intpin); return; } switch (cfg->slot) { case 6: /* NCR SCSI */ pirq = 3; break; case 11: /* slot 1 */ switch (cfg->intpin) { case 1: case 4: pirq = 0; break; case 2: pirq = 2; break; case 3: pirq = 1; break; #ifdef DIAGNOSTIC default: /* XXX gcc -Wuninitialized */ panic("dec_axppci_33_intr_map: bogus PCI pin %d\n", cfg->intpin); #endif }; break; case 12: /* slot 2 */ switch (cfg->intpin) { case 1: case 4: pirq = 1; break; case 2: pirq = 0; break; case 3: pirq = 2; break; #ifdef DIAGNOSTIC default: /* XXX gcc -Wuninitialized */ panic("dec_axppci_33_intr_map: bogus PCI pin %d\n", cfg->intpin); #endif }; break; case 8: /* slot 3 */ switch (cfg->intpin) { case 1: case 4: pirq = 2; break; case 2: pirq = 1; break; case 3: pirq = 0; break; #ifdef DIAGNOSTIC default: /* XXX gcc -Wuninitialized */ panic("dec_axppci_33_intr_map bogus: PCI pin %d\n", cfg->intpin); #endif }; break; default: - printf("dec_axppci_33_intr_map: weird device number %d\n", + printf("dec_axppci_33_intr_map: weird device number %d\n", cfg->slot); - return; + return; } pirqreg = chipset.cfgreadl(0, 0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL); #if 0 printf("dec_axppci_33_intr_map: device %d pin %c: pirq %d, reg = %x\n", device, '@' + cfg->intpin, pirq, pirqreg); #endif pirqline = (pirqreg >> (pirq * 8)) & 0xff; if ((pirqline & 0x80) != 0) panic("bad pirqline %d",pirqline); pirqline &= 0xf; #if 0 printf("dec_axppci_33_intr_map: device %d pin %c: mapped to line %d\n", device, '@' + cfg->intpin, pirqline); #endif cfg->intline = pirqline; } diff --git a/sys/alpha/alpha/dec_eb164.c b/sys/alpha/alpha/dec_eb164.c index 4293d3786a46..e1efa03166da 100644 --- a/sys/alpha/alpha/dec_eb164.c +++ b/sys/alpha/alpha/dec_eb164.c @@ -1,147 +1,147 @@ /* $FreeBSD$ */ /* $NetBSD: dec_eb164.c,v 1.26 1998/04/17 02:45:19 mjacob Exp $ */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_eb164_init __P((void)); static void dec_eb164_cons_init __P((void)); static void eb164_intr_init(void); extern void eb164_intr_enable(int irq); extern void eb164_intr_disable(int irq); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); void dec_eb164_init() { platform.family = "EB164"; if ((platform.model = alpha_dsr_sysname()) == NULL) { /* XXX Don't know the system variations, yet. */ platform.model = alpha_unknown_sysname(); } platform.iobus = "cia"; platform.cons_init = dec_eb164_cons_init; platform.pci_intr_init = eb164_intr_init; platform.pci_intr_map = NULL; platform.pci_intr_disable = eb164_intr_disable; platform.pci_intr_enable = eb164_intr_enable; } extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ static void dec_eb164_cons_init() { struct ctb *ctb; cia_init(); #ifdef DDB siogdbattach(0x2f8, 57600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); - /* - * force a comconsole on com1 if the SRM has a serial - * console - */ - comconsole = 0; + /* + * Force a comconsole on com1 if the SRM has a serial + * console. + */ + comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %d\n", - (int) ctb->ctb_term_type); + (int)ctb->ctb_term_type); } } static void eb164_intr_init() { /* * Enable ISA-PCI cascade interrupt. */ eb164_intr_enable(4); } diff --git a/sys/alpha/alpha/dec_eb64plus.c b/sys/alpha/alpha/dec_eb64plus.c index 6b2015306217..fd68f5dff570 100644 --- a/sys/alpha/alpha/dec_eb64plus.c +++ b/sys/alpha/alpha/dec_eb64plus.c @@ -1,187 +1,189 @@ /* $FreeBSD$ */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ -/* - * Port to based on NetBSD/axp by Wilko Bulte - * FreeBSD version based on: +/* + * Port to based on NetBSD/axp by Wilko Bulte + * FreeBSD version based on: * NetBSD: dec_eb64plus.c,v 1.15 1998/11/19 02:20:07 ross Exp * * Some info on the Aspen Alpine as this might be hard to come by: - * - Hardware is close enough to the DEC EB64+ design to allow it to run + * - Hardware is close enough to the DEC EB64+ design to allow it to run * the EB64+ SRM console f/w * - 3 PCI slots, closest to the SIMMs: Alpine calls this slot C * the middle one Alpine calls this slot B * the 3rd one is Alpine calls this slot A * (A, B, C is silkscreened on the PCB) * - embedded NCR810, located at PCI slot 5 * - 3 ISA slots, hanging off an Intel 82378IB PCI-ISA bridge at PCI slot 8 * - embedded floppy, PC keyboard interface, PS/2 mouse interface, 2x serial * ports and a parallel port. All of this hiding after the ISA bridge */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_eb64plus_init __P((void)); static void dec_eb64plus_cons_init __P((void)); static void dec_eb64plus_intr_init __P((void)); extern void eb64plus_intr_enable(int irq); /* ../pci/pci_eb64plus_intr.s */ extern void eb64plus_intr_disable(int irq); /* ../pci/pci_eb64plus_intr.s */ extern const char * bootdev_protocol(void); extern int bootdev_boot_dev_type(void); extern int siocnattach __P((int, int)); extern int sccnattach __P((void)); const struct alpha_variation_table dec_eb64plus_variations[] = { { 0, "DEC EB64-plus" }, { 0, NULL }, }; void dec_eb64plus_init() { u_int64_t variation; platform.family = "EB64+"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, dec_eb64plus_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "apecs"; platform.cons_init = dec_eb64plus_cons_init; platform.pci_intr_init = dec_eb64plus_intr_init; /* SRM handles PCI interrupt mapping */ platform.pci_intr_map = NULL; /* see ../pci/pci_eb64plus_intr.s for intr. dis/enable */ platform.pci_intr_disable = eb64plus_intr_disable; platform.pci_intr_enable = eb64plus_intr_enable; } -extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ +/* XXX for forcing comconsole when srm serial console is used */ +extern int comconsole; + /* init the console, serial or graphics */ static void dec_eb64plus_cons_init() { struct ctb *ctb; apecs_init(); ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); - /* - * force a comconsole on com1 if the SRM has a serial - * console - */ + /* + * force a comconsole on com1 if the SRM has a serial + * console. + */ comconsole = 0; if (siocnattach(0x3f8, comcnrate)) - panic("can't init serial console"); + panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: #if NSC > 0 /* graphics adapter console */ sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %d\n", (int)ctb->ctb_term_type); } } -/* +/* * The SRM console may have left some some interrupts enabled. */ static void dec_eb64plus_intr_init() { - int i; + int i; - /* disable all PCI interrupts */ - for(i = 0; i <= 32; i++) /* 32 ?? NetBSD sez so */ - eb64plus_intr_disable(i); + /* disable all PCI interrupts */ + for(i = 0; i <= 32; i++) /* 32 ?? NetBSD sez so */ + eb64plus_intr_disable(i); - /* Enable ISA-PCI cascade interrupt */ - eb64plus_intr_enable(4); + /* Enable ISA-PCI cascade interrupt */ + eb64plus_intr_enable(4); } diff --git a/sys/alpha/alpha/dec_kn20aa.c b/sys/alpha/alpha/dec_kn20aa.c index ff2c6cb6c894..9151be6f1725 100644 --- a/sys/alpha/alpha/dec_kn20aa.c +++ b/sys/alpha/alpha/dec_kn20aa.c @@ -1,355 +1,357 @@ /* $NetBSD: dec_kn20aa.c,v 1.38 1998/04/17 02:45:19 mjacob Exp $ */ /* $FreeBSD$ */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_kn20aa_init __P((void)); static void dec_kn20aa_cons_init __P((void)); static void dec_kn20aa_intr_init __P((void)); static void dec_kn20aa_intr_map __P((void *)); static void dec_kn20aa_intr_disable __P((int)); static void dec_kn20aa_intr_enable __P((int)); extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); #if 0 static void dec_kn20aa_device_register __P((struct device *, void *)); #endif const struct alpha_variation_table dec_kn20aa_variations[] = { { 0, "AlphaStation 500 or 600 (KN20AA)" }, { 0, NULL }, }; extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */ void dec_kn20aa_init() { u_int64_t variation; platform.family = "AlphaStation 500 or 600 (KN20AA)"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, dec_kn20aa_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "cia"; platform.cons_init = dec_kn20aa_cons_init; platform.pci_intr_init = dec_kn20aa_intr_init; platform.pci_intr_map = dec_kn20aa_intr_map; platform.pci_intr_disable = dec_kn20aa_intr_disable; platform.pci_intr_enable = dec_kn20aa_intr_enable; } static void dec_kn20aa_cons_init() { struct ctb *ctb; cia_init(); #ifdef DDB siogdbattach(0x2f8, 9600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %d\n", (int)ctb->ctb_term_type); } } #if 0 static void dec_kn20aa_device_register(dev, aux) struct device *dev; void *aux; { static int found, initted, scsiboot, netboot; static struct device *pcidev, *scsidev; struct bootdev_data *b = bootdev_data; struct device *parent = dev->dv_parent; struct cfdata *cf = dev->dv_cfdata; struct cfdriver *cd = cf->cf_driver; if (found) return; if (!initted) { scsiboot = (strcmp(b->protocol, "SCSI") == 0); netboot = (strcmp(b->protocol, "BOOTP") == 0); #if 0 printf("scsiboot = %d, netboot = %d\n", scsiboot, netboot); #endif initted =1; } if (pcidev == NULL) { if (strcmp(cd->cd_name, "pci")) return; else { struct pcibus_attach_args *pba = aux; if ((b->slot / 1000) != pba->pba_bus) return; pcidev = dev; #if 0 printf("\npcidev = %s\n", pcidev->dv_xname); #endif return; } } if (scsiboot && (scsidev == NULL)) { if (parent != pcidev) return; else { struct pci_attach_args *pa = aux; if ((b->slot % 1000) != pa->pa_device) return; /* XXX function? */ scsidev = dev; #if 0 printf("\nscsidev = %s\n", scsidev->dv_xname); #endif return; } } if (scsiboot && (!strcmp(cd->cd_name, "sd") || !strcmp(cd->cd_name, "st") || !strcmp(cd->cd_name, "cd"))) { struct scsipibus_attach_args *sa = aux; if (parent->dv_parent != scsidev) return; if (b->unit / 100 != sa->sa_sc_link->scsipi_scsi.target) return; /* XXX LUN! */ switch (b->boot_dev_type) { case 0: if (strcmp(cd->cd_name, "sd") && strcmp(cd->cd_name, "cd")) return; break; case 1: if (strcmp(cd->cd_name, "st")) return; break; default: return; } /* we've found it! */ booted_device = dev; #if 0 printf("\nbooted_device = %s\n", booted_device->dv_xname); #endif found = 1; } if (netboot) { if (parent != pcidev) return; else { struct pci_attach_args *pa = aux; if ((b->slot % 1000) != pa->pa_device) return; /* XXX function? */ booted_device = dev; #if 0 printf("\nbooted_device = %s\n", booted_device->dv_xname); #endif found = 1; return; } } } #endif #define KN20AA_MAX_IRQ 32 void dec_kn20aa_intr_init() { - /* - * Enable ISA-PCI cascade interrupt. - */ - dec_kn20aa_intr_enable(31); + + /* + * Enable ISA-PCI cascade interrupt. + */ + dec_kn20aa_intr_enable(31); } void dec_kn20aa_intr_map(void *arg) { - pcicfgregs *cfg = (pcicfgregs *)arg; - /* - * Slot->interrupt translation. Appears to work, though it - * may not hold up forever. - * - * The DEC engineers who did this hardware obviously engaged - * in random drug testing. - */ + pcicfgregs *cfg; + + cfg = (pcicfgregs *)arg; + /* + * Slot->interrupt translation. Appears to work, though it + * may not hold up forever. + * + * The DEC engineers who did this hardware obviously engaged + * in random drug testing. + */ switch (cfg->slot) { - case 11: - case 12: - cfg->intline = ((cfg->slot - 11) + 0) * 4; - break; + case 11: + case 12: + cfg->intline = ((cfg->slot - 11) + 0) * 4; + break; - case 7: - cfg->intline = 8; - break; + case 7: + cfg->intline = 8; + break; - case 9: - cfg->intline = 12; - break; + case 9: + cfg->intline = 12; + break; - case 6: /* 21040 on AlphaStation 500 */ - cfg->intline = 13; - break; + case 6: /* 21040 on AlphaStation 500 */ + cfg->intline = 13; + break; - case 8: - cfg->intline = 16; - break; + case 8: + cfg->intline = 16; + break; - case 10: /* 8275EB on AlphaStation 500 */ + case 10: /* 8275EB on AlphaStation 500 */ return; - default: + default: if(!cfg->bus){ printf("dec_kn20aa_intr_map: weird slot %d\n", - cfg->slot); + cfg->slot); return; } else { cfg->intline = cfg->slot; } - } - - cfg->intline += cfg->bus*16; - if (cfg->intline > KN20AA_MAX_IRQ) - panic("dec_kn20aa_intr_map: cfg->intline too large (%d)\n", - cfg->intline); + } + cfg->intline += cfg->bus*16; + if (cfg->intline > KN20AA_MAX_IRQ) + panic("dec_kn20aa_intr_map: cfg->intline too large (%d)\n", + cfg->intline); } void dec_kn20aa_intr_enable(irq) - int irq; + int irq; { - /* - * From disassembling small bits of the OSF/1 kernel: - * the following appears to enable a given interrupt request. - * "blech." I'd give valuable body parts for better docs or - * for a good decompiler. - */ - alpha_mb(); - REGVAL(0x8780000000L + 0x40L) |= (1 << irq); /* XXX */ - alpha_mb(); + /* + * From disassembling small bits of the OSF/1 kernel: + * the following appears to enable a given interrupt request. + * "blech." I'd give valuable body parts for better docs or + * for a good decompiler. + */ + alpha_mb(); + REGVAL(0x8780000000L + 0x40L) |= (1 << irq); /* XXX */ + alpha_mb(); } void dec_kn20aa_intr_disable(irq) - int irq; + int irq; { - alpha_mb(); - REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq); /* XXX */ - alpha_mb(); + alpha_mb(); + REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq); /* XXX */ + alpha_mb(); } diff --git a/sys/alpha/alpha/dec_kn300.c b/sys/alpha/alpha/dec_kn300.c index 9c31662cdbb6..eabe4e016bc1 100644 --- a/sys/alpha/alpha/dec_kn300.c +++ b/sys/alpha/alpha/dec_kn300.c @@ -1,144 +1,144 @@ /* $FreeBSD$ */ /* * Copyright (c) 2000 by Matthew Jacob * NASA AMES Research Center. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice immediately at the beginning of the file, without modification, * this list of conditions, and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #if 0 #include #include #include #endif #include "sio.h" #include "sc.h" #ifndef CONSPEED #define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void dec_kn300_init __P((void)); void dec_kn300_cons_init __P((void)); #define ALPHASERVER_4100 "AlphaServer 4100" const struct alpha_variation_table dec_kn300_variations[] = { { 0, ALPHASERVER_4100 }, { 0, NULL }, }; #if NSC > 0 extern int siocnattach __P((int, int)); #endif #ifdef DDB extern int siogdbattach __P((int, int)); #endif extern int sccnattach __P((void)); void dec_kn300_init() { u_int64_t variation; platform.family = ALPHASERVER_4100; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, dec_kn300_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "mcbus"; } extern int comconsole; void dec_kn300_cons_init() { struct ctb *ctb; #ifdef DDB siogdbattach(0x2f8, 57600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; case 3: #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown cons type %ld\n", ctb->ctb_term_type); } } diff --git a/sys/alpha/alpha/dec_kn8ae.c b/sys/alpha/alpha/dec_kn8ae.c index e31cba1a85d2..8a28c57e762e 100644 --- a/sys/alpha/alpha/dec_kn8ae.c +++ b/sys/alpha/alpha/dec_kn8ae.c @@ -1,89 +1,88 @@ /* $FreeBSD$ */ /* $NetBSD: dec_kn8ae.c,v 1.15 1998/02/13 00:12:50 thorpej Exp $ */ /* * Copyright (c) 1997 by Matthew Jacob * NASA AMES Research Center. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice immediately at the beginning of the file, without modification, * this list of conditions, and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_simos.h" #include #include #include #include #include #include #include #include #include #include void dec_kn8ae_init(int); static void dec_kn8ae_cons_init(void); static const struct alpha_variation_table dec_kn8ae_variations[] = { { 0, "AlphaServer 8400" }, { 0, NULL }, }; void dec_kn8ae_init(int cputype) { u_int64_t variation; platform.family = "AlphaServer 8400"; if ((platform.model = alpha_dsr_sysname()) == NULL) { variation = hwrpb->rpb_variation & SV_ST_MASK; if ((platform.model = alpha_variation_name(variation, dec_kn8ae_variations)) == NULL) platform.model = alpha_unknown_sysname(); } platform.iobus = "tlsb"; platform.cons_init = dec_kn8ae_cons_init; } /* - * dec_kn8ae_cons_init- not needed right now. XXX hack in SimOS console - * * Info to retain: * * The AXP 8X00 seems to encode the * type of console in the ctb_type field, * not the ctb_term_type field. */ static void dec_kn8ae_cons_init(void) { + boothowto |= RB_SERIAL; zs_cnattach(TLSB_GBUS_BASE, GBUS_DUART0_OFFSET); } diff --git a/sys/alpha/alpha/dec_st550.c b/sys/alpha/alpha/dec_st550.c index b1a3167b07d5..cb341b1d80fc 100644 --- a/sys/alpha/alpha/dec_st550.c +++ b/sys/alpha/alpha/dec_st550.c @@ -1,271 +1,275 @@ /* $FreeBSD$ */ /* * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University. * All rights reserved. * * Author: Chris G. Demetriou - * + * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to * * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 * * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ /* * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center */ /* * Additional Copyright (c) 1998 by Andrew Gallatin for Duke University */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void st550_init __P((void)); static void st550_cons_init __P((void)); static void st550_intr_init __P((void)); static void pyxis_intr_enable __P((int)); static void pyxis_intr_disable __P((int)); static void st550_intr_enable __P((int)); static void st550_intr_disable __P((int)); static void st550_intr_map __P((void *)); #define ST550_PCI_IRQ_BEGIN 8 #define ST550_PCI_MAX_IRQ 47 extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); void st550_init() { + platform.family = "Digital Personal Workstation (Miata)"; if ((platform.model = alpha_dsr_sysname()) == NULL) { /* XXX Don't know the system variations, yet. */ platform.model = alpha_unknown_sysname(); } platform.iobus = "cia"; platform.cons_init = st550_cons_init; platform.pci_intr_init = st550_intr_init; platform.pci_intr_map = st550_intr_map; platform.pci_intr_disable = st550_intr_disable; platform.pci_intr_enable = st550_intr_enable; } extern int comconsole; static void st550_cons_init() { struct ctb *ctb; cia_init(); #ifdef DDB siogdbattach(0x2f8, 57600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ - { - /* - * Delay to allow PROM putchars to complete. - * FIFO depth * character time, - * character time = (1000000 / (defaultrate / 10)) - */ - DELAY(160000000 / comcnrate); - comconsole = 0; - if (siocnattach(0x3f8, comcnrate)) - panic("can't init serial console"); - - boothowto |= RB_SERIAL; - break; - } + /* + * Delay to allow PROM putchars to complete. + * FIFO depth * character time, + * character time = (1000000 / (defaultrate / 10)) + */ + DELAY(160000000 / comcnrate); + comconsole = 0; + if (siocnattach(0x3f8, comcnrate)) + panic("can't init serial console"); + + boothowto |= RB_SERIAL; + break; case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %ld\n", ctb->ctb_term_type); } } static void st550_intr_init() { + /* This is here because we need to disable extraneous pci interrupts. */ int i; for(i = ST550_PCI_IRQ_BEGIN; i <= ST550_PCI_MAX_IRQ; i++) pyxis_intr_disable(i); /* From Linux... */ pyxis_intr_enable(2); /* enable HALT switch */ pyxis_intr_enable(6); /* enable timer */ pyxis_intr_enable(7); /* enable ISA PIC cascade */ } static void st550_intr_map(void *arg) { - pcicfgregs *cfg = (pcicfgregs *)arg; - - /* There are two main variants of Miata: Miata 1 (Intel SIO) - * and Miata {1.5,2} (Cypress). - * - * The Miata 1 has a CMD PCI IDE wired to compatibility mode at - * slot 4 of bus 0. This variant has the Pyxis DMA bug. - * - * On the Miata 1.5 and Miata 2, the Cypress PCI-ISA bridge lives - * on device 7 of bus 0. This device has PCI IDE wired to - * compatibility mode on functions 1 and 2. - * - * There will be no interrupt mapping for these devices, so just - * bail out now. - */ + pcicfgregs *cfg; + + cfg = (pcicfgregs *)arg; + + /* There are two main variants of Miata: Miata 1 (Intel SIO) + * and Miata {1.5,2} (Cypress). + * + * The Miata 1 has a CMD PCI IDE wired to compatibility mode at + * slot 4 of bus 0. This variant has the Pyxis DMA bug. + * + * On the Miata 1.5 and Miata 2, the Cypress PCI-ISA bridge lives + * on device 7 of bus 0. This device has PCI IDE wired to + * compatibility mode on functions 1 and 2. + * + * There will be no interrupt mapping for these devices, so just + * bail out now. + */ if(cfg->bus == 0) { if ((hwrpb->rpb_variation & SV_ST_MASK) < SV_ST_MIATA_1_5) { - /* Miata 1 */ - if (cfg->slot == 7) + /* Miata 1 */ + if (cfg->slot == 7) return; - else if (cfg->func == 4) + else if (cfg->func == 4) return; } else { /* Miata 1.5 or Miata 2 */ - if (cfg->slot == 7) { - if (cfg->func == 0) + if (cfg->slot == 7) { + if (cfg->func == 0) return; - return; - } - } - } - /* Account for the PCI interrupt offset. */ - /* cfg->intline += ST550_PCI_IRQ_BEGIN; */ + return; + } + } + } + /* Account for the PCI interrupt offset. */ + /* cfg->intline += ST550_PCI_IRQ_BEGIN; */ return; } /* - * The functions below were written based on a draft copy of the - * 21174 TRM. + * The functions below were written based on a draft copy of the + * 21174 TRM. */ static void pyxis_intr_enable(irq) int irq; { - volatile u_int64_t temp; + volatile u_int64_t temp; - alpha_mb(); - temp = REGVAL64(PYXIS_INT_MASK); - alpha_mb(); + alpha_mb(); + temp = REGVAL64(PYXIS_INT_MASK); + alpha_mb(); - temp |= ( 1L << irq ); - REGVAL64(PYXIS_INT_MASK) = temp; - alpha_mb(); - temp = REGVAL64(PYXIS_INT_MASK); + temp |= ( 1L << irq ); + REGVAL64(PYXIS_INT_MASK) = temp; + alpha_mb(); + temp = REGVAL64(PYXIS_INT_MASK); #if 0 printf("pyxis_intr_enable: enabling %d, current mask= ", irq); - { - int i; - for ( i = 0; i < 61; i++) - if (temp & (1 << i)){ - printf("%d " ,i); - } - printf("\n"); - } + { + int i; + for ( i = 0; i < 61; i++) + if (temp & (1 << i)) { + printf("%d " , i); + } + printf("\n"); + } #endif } static void pyxis_intr_disable(irq) int irq; { volatile u_int64_t temp; alpha_mb(); temp = REGVAL64(PYXIS_INT_MASK); temp &= ~(1L << irq ); REGVAL64(PYXIS_INT_MASK) = temp; alpha_mb(); temp = REGVAL64(PYXIS_INT_MASK); #if 0 - printf("pyxis_intr_disable: disabled %d, current mask ", irq); - { - int i; - for ( i = 0; i < 61; i++) - if (temp & (1 << i)){ - printf("%d ",i); - } - printf("\n"); - } + printf("pyxis_intr_disable: disabled %d, current mask ", irq); + { + int i; + for ( i = 0; i < 61; i++) + if (temp & (1 << i)) { + printf("%d ", i); + } + printf("\n"); + } #endif } static void st550_intr_enable(irq) - int irq; + int irq; { + pyxis_intr_enable(irq + ST550_PCI_IRQ_BEGIN); } static void st550_intr_disable(irq) - int irq; + int irq; { + pyxis_intr_disable(irq + ST550_PCI_IRQ_BEGIN); } diff --git a/sys/alpha/alpha/dec_st6600.c b/sys/alpha/alpha/dec_st6600.c index 124f09c065d2..22e94559df9e 100644 --- a/sys/alpha/alpha/dec_st6600.c +++ b/sys/alpha/alpha/dec_st6600.c @@ -1,155 +1,155 @@ /*- * Copyright (c) 1999 Andrew Gallatin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include "opt_ddb.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "sio.h" #include "sc.h" -#ifndef CONSPEED -#define CONSPEED TTYDEF_SPEED +#ifndef CONSPEED +#define CONSPEED TTYDEF_SPEED #endif static int comcnrate = CONSPEED; void st6600_init __P((void)); static void st6600_cons_init __P((void)); static void st6600_intr_init __P((void)); static void st6600_intr_map __P((void *)); #define ST6600_PCI_IRQ_BEGIN 8 #define ST6600_PCI_MAX_IRQ 63 extern int siocnattach __P((int, int)); extern int siogdbattach __P((int, int)); extern int sccnattach __P((void)); void st6600_init() { platform.family = "ST6600"; if ((platform.model = alpha_dsr_sysname()) == NULL) { /* XXX Don't know the system variations, yet. */ platform.model = alpha_unknown_sysname(); } platform.iobus = "tsunami"; platform.cons_init = st6600_cons_init; platform.pci_intr_init = st6600_intr_init; platform.pci_intr_map = st6600_intr_map; } extern int comconsole; static void st6600_cons_init() { struct ctb *ctb; tsunami_init(); #ifdef DDB siogdbattach(0x2f8, 57600); #endif ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off); switch (ctb->ctb_term_type) { - case 2: + case 2: /* serial console ... */ /* XXX */ { /* * Delay to allow PROM putchars to complete. * FIFO depth * character time, * character time = (1000000 / (defaultrate / 10)) */ DELAY(160000000 / comcnrate); comconsole = 0; if (siocnattach(0x3f8, comcnrate)) panic("can't init serial console"); boothowto |= RB_SERIAL; break; } case 3: /* display console ... */ /* XXX */ #if NSC > 0 sccnattach(); #else panic("not configured to use display && keyboard console"); #endif break; default: printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type); printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot); panic("consinit: unknown console type %ld\n", ctb->ctb_term_type); } } static void st6600_intr_init() { - int i; + for(i = ST6600_PCI_IRQ_BEGIN; i <= ST6600_PCI_MAX_IRQ; i++) platform.pci_intr_disable(i); /* From Linux... */ platform.pci_intr_enable(55); platform.pci_intr_enable(2); - } static void st6600_intr_map(void *arg) { + return; }