diff --git a/share/man/man4/axp.4 b/share/man/man4/axp.4
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 .\"    this software without specific prior written permission.
 .\"
 .\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-.Dd January 24, 2021
+.Dd February 19, 2021
 .Dt AXP 4
 .Os
 .Sh NAME
 .Nm axp
 .Nd "Advanced Micro Devices 10G Ethernet driver"
 .Sh SYNOPSIS
 To compile this driver into the kernel,
 place the following lines in your
 kernel configuration file:
 .Bd -ragged -offset indent
 .Cd "device iflib"
 .Cd "device axp"
 .Ed
 .Pp
 Alternatively, to load the driver as a
 module at boot time, place the following line in
 .Xr loader.conf 5 :
 .Bd -literal -offset indent
 if_axp_load="YES"
 .Ed
 .Sh DESCRIPTION
 The
 .Nm
 driver enables PCI-E based 10G Ethernet controller inbuilt in the
 AMD EPYC processors.
 .Pp
 The following features are supported.
 .Pp
 .Bl -bullet -compact
 .It
 1G/10G SFP+ Link
 .It
 Jumbo frames (9000 Bytes)
 .It
 Transmit and Receive checksum offload
 .It
 TCP segmentation offload (TSO)
 .It
 VLAN tag insertion/extraction
 .It
 VLAN checksum offload
 .It
 VLAN TSO
 .It
 Receive side steering (RSS)
 .It
 IPV4 and IPV6 capable
 .It
 MSI-X interrupts
 .It
 Split header
 .El
 .Pp
 All the above mentioned features are enabled by default.
 .Pp
 For hardware related questions, please refer the documentation supplied
 along with AMD EPYC processors.
 .Sh SYSCTL VARIABLES
 The following variables are available as
 .Xr sysctl 8
 variables:
 .Bl -tag -width indent
 .It Va dev.ax.X.mac_stats
 Dumps the transmit and receive statistics counter values for the controller.
 This includes statistics specific to each transmit and receive queue.
 .It Va dev.ax.X.channels_info
 Dumps the permissible and default configured transmit and receive channel
 information.
 .It Va dev.ax.X.ringparam_info
 Dumps the permissible and default configured descriptor information for the
 transmit and receive queue.
 .It Va dev.ax.X.link_ksettings_info
 Dumps the current link setting like link mode, speed, duplex settings.
 .It Va dev.ax.X.pauseparam_info
 Dumps the current flow-control settings.
 .It Va dev.ax.X.coalesce_info
 Dumps the current interrupt coalescing settings.
 .It Va dev.ax.X.link_info
 Dumps the current state of the Link.
 .It Va dev.ax.X.drv_info
 Dumps the driver and controller firmware version information.
 .It Va dev.ax.X.YYYY_register
 .It Va dev.ax.X.YYYY_register_values
 Sysctl to dump a specific register from a specific block of the controller.
 YYYY specifies the block.
 The following blocks are supported.
 .Bl -bullet -compact
 .It
 xpcs
 .It
 xgmac
 .It
 xprop
 .It
 xi2c
 .El
 .Pp
 Set the offset of the register to the first variable, and then read the value
 of the register by reading the second variable.
 .It Va dev.ax.X.axgbe_debug_level
 Configure the log-level for the driver.
 Default is 0.
 Supports 0-3.
-.It Va dev.ax.X.single_fl
-This variable must be set before loading the driver, either via
-.Xr loader.conf 5
-or through the use of
-.Xr kenv 1 .
-This cannot be modified when driver is loaded.
-.Pp
-Setting this variable in
+.It Va dev.ax.X.link_workaround
+This variable enables the workaround for an intermittent link issue.
+When link does not come up for long time, this variable can be set to 1 to
+reset the phy and bring up the link.
+.El
+.Sh LOADER TUNABLES
+The following variable is available as
 .Xr loader.conf 5
-needs the system to be restarted to take effect.
-When using
-.Xr kenv 1 ,
-use the wrapper variable
-.Va dev.ax.single_fl\&,
-which will configure all AMD interfaces with single freelist per receive queue.
-Default is 2 freelist per receive queue.
-.Pp
-This variable is to configure the interface when single freelist is needed.
-(For Eg. netmap).
-Basically, this will control the software behavior of how the receive
-descriptors are used.
-.Pp
-Setting this variable to 1, will use 1 Freelist per receive queue.
-.Pp
-Setting this variable to 0, will use 2 Freelist per receive queue.
-.Pp
-Based on the setting, the receive buffers are programmed accordingly on the
-received descriptors.
+tunable.
+.Bl -tag -width indent
+.It Va dev.ax.X.sph_enable
+This variable controls split header feature for the interface.
+Default is 1, meaning the split header support is enabled.
 .Pp
-By default, this variable will be set to 0, meaning the interfaces will be
-configured for regular data traffic (not netmap traffic).
-.It Va dev.ax.X.sph_enabled
 This variable must be set before loading the driver, either via
 .Xr loader.conf 5
-or through the use of
+or through
 .Xr kenv 1 .
 This cannot be modified when driver is loaded.
 .Pp
 Setting this variable in
 .Xr loader.conf 5
 needs the system to be restarted to take effect.
 When using
 .Xr kenv 1 ,
 use the wrapper variable
-.Va dev.ax.sph_enable\&,
-which will configure(enable/disable) split header support in all
-AMD interfaces.
-.Pp
-This variable is to control enable/disable of the split header feature in
-the interface.
-.Pp
-Setting this variable to 1, will enable split header feature.
-.Pp
-Setting this variable to 0, will disable split header feature.
-.Pp
-By default, this variable will be set to 1, meaning the Split header support be
-enabled.
+.Va dev.ax.sph_enable ,
+which will configure(enable/disable) split header support for all
+.Nm
+interfaces.
 .Pp
-NOTE: It is recommended to use this variable only when
-.Va single_fl\&
-is configured.
-Otherwise let it be default value.
+To use netmap with this device, split header support must be disabled
+(set this variable to 0).
 .El
 .Sh SEE ALSO
 .Xr arp 4 ,
 .Xr iflib 4 ,
 .Xr netmap 4 ,
 .Xr vlan 4 ,
 .Xr ifconfig 8
 .Sh HISTORY
 The
 .Nm
 device driver first appeared in
 .Fx 13.0 .
 .Pp
 Another version of the driver is already present in
 .Fx .
 This driver was named as "axgbe" earlier, which is renamed as "axa" now.
 This driver is for the ACPI based Ethernet controllers in the previous/older
 version of the hardware.
 This driver is authored by
 .Aq Mt andrew@FreeBSD.org .
 .Sh AUTHORS
 The
 .Nm
 device driver was written by
 .An Advanced Micro Devices Inc .
 .Pp
 For any issues and support requirements, email the details to
 .Aq Mt rajesh1.kumar@amd.com .