diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64 index 2362c7817025..0d33e315db65 100644 --- a/sys/conf/files.arm64 +++ b/sys/conf/files.arm64 @@ -1,560 +1,561 @@ # $FreeBSD$ ## ## Kernel ## kern/msi_if.m optional intrng kern/pic_if.m optional intrng kern/subr_devmap.c standard kern/subr_intr.c optional intrng kern/subr_physmem.c standard libkern/memcmp.c standard \ compile-with "${NORMAL_C:N-fsanitize*}" libkern/memset.c standard \ compile-with "${NORMAL_C:N-fsanitize*}" libkern/strlen.c standard libkern/arm64/crc32c_armv8.S standard arm/arm/generic_timer.c standard arm/arm/gic.c standard arm/arm/gic_acpi.c optional acpi arm/arm/gic_fdt.c optional fdt arm/arm/pmu.c standard arm/arm/pmu_fdt.c optional fdt arm64/acpica/acpi_iort.c optional acpi arm64/acpica/acpi_machdep.c optional acpi arm64/acpica/OsdEnvironment.c optional acpi arm64/acpica/acpi_wakeup.c optional acpi arm64/acpica/pci_cfgreg.c optional acpi pci arm64/arm64/autoconf.c standard arm64/arm64/bus_machdep.c standard arm64/arm64/bus_space_asm.S standard arm64/arm64/busdma_bounce.c standard arm64/arm64/busdma_machdep.c standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard arm64/arm64/cpu_errata.c standard arm64/arm64/cpufunc_asm.S standard arm64/arm64/db_disasm.c optional ddb arm64/arm64/db_interface.c optional ddb arm64/arm64/db_trace.c optional ddb arm64/arm64/debug_monitor.c standard arm64/arm64/disassem.c optional ddb arm64/arm64/dump_machdep.c standard arm64/arm64/efirt_machdep.c optional efirt arm64/arm64/elf32_machdep.c optional compat_freebsd32 arm64/arm64/elf_machdep.c standard arm64/arm64/exception.S standard arm64/arm64/freebsd32_machdep.c optional compat_freebsd32 arm64/arm64/gdb_machdep.c optional gdb arm64/arm64/gicv3_its.c optional intrng fdt arm64/arm64/gic_v3.c standard arm64/arm64/gic_v3_acpi.c optional acpi arm64/arm64/gic_v3_fdt.c optional fdt arm64/arm64/identcpu.c standard arm64/arm64/in_cksum.c optional inet | inet6 arm64/arm64/locore.S standard no-obj arm64/arm64/machdep.c standard arm64/arm64/machdep_boot.c standard arm64/arm64/mem.c standard arm64/arm64/memcpy.S standard arm64/arm64/memmove.S standard arm64/arm64/minidump_machdep.c standard arm64/arm64/mp_machdep.c optional smp arm64/arm64/nexus.c standard arm64/arm64/ofw_machdep.c optional fdt arm64/arm64/pmap.c standard arm64/arm64/stack_machdep.c optional ddb | stack arm64/arm64/support.S standard arm64/arm64/swtch.S standard arm64/arm64/sys_machdep.c standard arm64/arm64/trap.c standard arm64/arm64/uio_machdep.c standard arm64/arm64/uma_machdep.c standard arm64/arm64/undefined.c standard arm64/arm64/unwind.c optional ddb | kdtrace_hooks | stack arm64/arm64/vfp.c standard arm64/arm64/vm_machdep.c standard arm64/coresight/coresight.c standard arm64/coresight/coresight_acpi.c optional acpi arm64/coresight/coresight_fdt.c optional fdt arm64/coresight/coresight_if.m standard arm64/coresight/coresight_cmd.c standard arm64/coresight/coresight_cpu_debug.c standard arm64/coresight/coresight_etm4x.c standard arm64/coresight/coresight_etm4x_acpi.c optional acpi arm64/coresight/coresight_etm4x_fdt.c optional fdt arm64/coresight/coresight_funnel.c standard arm64/coresight/coresight_funnel_acpi.c optional acpi arm64/coresight/coresight_funnel_fdt.c optional fdt arm64/coresight/coresight_replicator.c standard arm64/coresight/coresight_replicator_acpi.c optional acpi arm64/coresight/coresight_replicator_fdt.c optional fdt arm64/coresight/coresight_tmc.c standard arm64/coresight/coresight_tmc_acpi.c optional acpi arm64/coresight/coresight_tmc_fdt.c optional fdt arm64/iommu/iommu.c optional iommu arm64/iommu/iommu_if.m optional iommu arm64/iommu/iommu_pmap.c optional iommu arm64/iommu/smmu.c optional iommu arm64/iommu/smmu_acpi.c optional acpi iommu arm64/iommu/smmu_quirks.c optional iommu dev/iommu/busdma_iommu.c optional iommu dev/iommu/iommu_gas.c optional iommu crypto/armv8/armv8_crypto.c optional armv8crypto armv8_crypto_wrap.o optional armv8crypto \ dependency "$S/crypto/armv8/armv8_crypto_wrap.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "armv8_crypto_wrap.o" aesv8-armx.o optional armv8crypto \ dependency "$S/crypto/openssl/aarch64/aesv8-armx.S" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "aesv8-armx.o" ghashv8-armx.o optional armv8crypto \ dependency "$S/crypto/openssl/aarch64/ghashv8-armx.S" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "ghashv8-armx.o" crypto/des/des_enc.c optional netsmb crypto/openssl/ossl_aarch64.c optional ossl crypto/openssl/aarch64/chacha-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/poly1305-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/sha1-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/sha256-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/sha512-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" dev/acpica/acpi_bus_if.m optional acpi dev/acpica/acpi_if.m optional acpi dev/acpica/acpi_pci_link.c optional acpi pci dev/acpica/acpi_pcib.c optional acpi pci dev/acpica/acpi_pxm.c optional acpi dev/ahci/ahci_generic.c optional ahci cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" ## ## ASoC support ## dev/sound/fdt/audio_dai_if.m optional sound fdt dev/sound/fdt/audio_soc.c optional sound fdt dev/sound/fdt/dummy_codec.c optional sound fdt dev/sound/fdt/simple_amplifier.c optional sound fdt ## ## Device drivers ## dev/axgbe/if_axgbe.c optional axa dev/axgbe/xgbe-desc.c optional axa dev/axgbe/xgbe-dev.c optional axa dev/axgbe/xgbe-drv.c optional axa dev/axgbe/xgbe-mdio.c optional axa dev/axgbe/xgbe-sysctl.c optional axa dev/axgbe/xgbe-txrx.c optional axa dev/axgbe/xgbe_osdep.c optional axa dev/axgbe/xgbe-phy-v1.c optional axa dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/dwc/if_dwc.c optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 | fdt dwc_socfpga soc_intel_stratix10 dev/dwc/if_dwc_if.m optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 | fdt dwc_socfpga soc_intel_stratix10 dev/enetc/enetc_mdio.c optional enetc soc_nxp_ls | enetc_mdio soc_nxp_ls dev/enetc/enetc_mdio_pci.c optional enetc_mdio pci soc_nxp_ls dev/enetc/if_enetc.c optional enetc iflib pci fdt soc_nxp_ls dev/etherswitch/felix/felix.c optional enetc etherswitch fdt felix pci soc_nxp_ls dev/gpio/pl061.c optional pl061 gpio dev/gpio/pl061_acpi.c optional pl061 gpio acpi dev/gpio/pl061_fdt.c optional pl061 gpio fdt dev/gpio/qoriq_gpio.c optional SOC_NXP_LS gpio fdt dev/hwpmc/hwpmc_arm64.c optional hwpmc dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/ice/if_ice_iflib.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_lib.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_osdep.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_resmgr.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_strings.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_iflib_recovery_txrx.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_iflib_txrx.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_common.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_controlq.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_dcb.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_flex_pipe.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_flow.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_nvm.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_sched.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_sriov.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_switch.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_vlan_mode.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" ice_ddp.c optional ice_ddp \ compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01031800 -mice_ddp -c${.TARGET}" \ no-ctfconvert no-implicit-rule before-depend local \ clean "ice_ddp.c" ice_ddp.fwo optional ice_ddp \ dependency "ice_ddp.fw" \ compile-with "${NORMAL_FWO}" \ no-implicit-rule \ clean "ice_ddp.fwo" ice_ddp.fw optional ice_ddp \ dependency "$S/contrib/dev/ice/ice-1.3.24.0.pkg" \ compile-with "${CP} $S/contrib/dev/ice/ice-1.3.24.0.pkg ice_ddp.fw" \ no-obj no-implicit-rule \ clean "ice_ddp.fw" dev/iicbus/sy8106a.c optional sy8106a fdt dev/iicbus/twsi/mv_twsi.c optional twsi fdt dev/iicbus/twsi/a10_twsi.c optional twsi fdt dev/iicbus/twsi/twsi.c optional twsi fdt dev/ipmi/ipmi.c optional ipmi dev/ipmi/ipmi_acpi.c optional ipmi acpi dev/ipmi/ipmi_kcs.c optional ipmi dev/ipmi/ipmi_smic.c optional ipmi dev/mbox/mbox_if.m optional soc_brcm_bcm2837 dev/mmc/host/dwmmc.c optional dwmmc fdt dev/mmc/host/dwmmc_altera.c optional dwmmc dwmmc_altera fdt dev/mmc/host/dwmmc_hisi.c optional dwmmc dwmmc_hisi fdt dev/mmc/host/dwmmc_rockchip.c optional dwmmc rk_dwmmc fdt dev/neta/if_mvneta_fdt.c optional neta fdt dev/neta/if_mvneta.c optional neta mdio mii dev/ofw/ofw_cpu.c optional fdt dev/ofw/ofw_pci.c optional fdt pci dev/ofw/ofw_pcib.c optional fdt pci dev/pci/controller/pci_n1sdp.c optional pci_n1sdp acpi dev/pci/pci_host_generic.c optional pci dev/pci/pci_host_generic_acpi.c optional pci acpi dev/pci/pci_host_generic_fdt.c optional pci fdt dev/pci/pci_dw_mv.c optional pci fdt dev/pci/pci_dw.c optional pci fdt dev/pci/pci_dw_if.m optional pci fdt dev/psci/psci.c standard dev/psci/smccc_arm64.S standard dev/psci/smccc.c standard dev/safexcel/safexcel.c optional safexcel fdt -dev/sdhci/sdhci_xenon.c optional sdhci_xenon sdhci fdt +dev/sdhci/sdhci_xenon.c optional sdhci_xenon sdhci +dev/sdhci/sdhci_xenon_fdt.c optional sdhci_xenon sdhci fdt dev/uart/uart_cpu_arm64.c optional uart dev/uart/uart_dev_mu.c optional uart uart_mu dev/uart/uart_dev_pl011.c optional uart pl011 dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220 dev/usb/controller/dwc3.c optional fdt dwc3 dev/usb/controller/ehci_mv.c optional ehci_mv fdt dev/usb/controller/generic_ehci.c optional ehci dev/usb/controller/generic_ehci_acpi.c optional ehci acpi dev/usb/controller/generic_ehci_fdt.c optional ehci fdt dev/usb/controller/generic_ohci.c optional ohci fdt dev/usb/controller/generic_usb_if.m optional ohci fdt dev/usb/controller/musb_otg_allwinner.c optional musb fdt soc_allwinner_a64 dev/usb/controller/usb_nop_xceiv.c optional fdt ext_resources dev/usb/controller/generic_xhci.c optional xhci dev/usb/controller/generic_xhci_acpi.c optional xhci acpi dev/usb/controller/generic_xhci_fdt.c optional xhci fdt dev/vnic/mrml_bridge.c optional vnic fdt dev/vnic/nic_main.c optional vnic pci dev/vnic/nicvf_main.c optional vnic pci pci_iov dev/vnic/nicvf_queues.c optional vnic pci pci_iov dev/vnic/thunder_bgx_fdt.c optional soc_cavm_thunderx pci vnic fdt dev/vnic/thunder_bgx.c optional soc_cavm_thunderx pci vnic pci dev/vnic/thunder_mdio_fdt.c optional soc_cavm_thunderx pci vnic fdt dev/vnic/thunder_mdio.c optional soc_cavm_thunderx pci vnic dev/vnic/lmac_if.m optional inet | inet6 | vnic ## ## SoC Support ## # Allwinner common files arm/allwinner/a10_timer.c optional a10_timer fdt arm/allwinner/a10_codec.c optional sound a10_codec arm/allwinner/a31_dmac.c optional a31_dmac arm/allwinner/a33_codec.c optional fdt sound a33_codec arm/allwinner/a64/sun50i_a64_acodec.c optional fdt sound a64_codec arm/allwinner/sunxi_dma_if.m optional a31_dmac arm/allwinner/aw_cir.c optional evdev aw_cir fdt arm/allwinner/aw_dwc3.c optional aw_dwc3 fdt arm/allwinner/aw_i2s.c optional fdt sound aw_i2s arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt | mmccam aw_mmc fdt arm/allwinner/aw_nmi.c optional aw_nmi fdt \ compile-with "${NORMAL_C} -I$S/contrib/device-tree/include" arm/allwinner/aw_pwm.c optional aw_pwm fdt arm/allwinner/aw_r_intc.c optional aw_r_intc fdt arm/allwinner/aw_rsb.c optional aw_rsb fdt arm/allwinner/aw_rtc.c optional aw_rtc fdt arm/allwinner/aw_sid.c optional aw_sid nvmem fdt arm/allwinner/aw_spi.c optional aw_spi fdt arm/allwinner/aw_syscon.c optional aw_syscon ext_resources syscon fdt arm/allwinner/aw_thermal.c optional aw_thermal nvmem fdt arm/allwinner/aw_usbphy.c optional ehci aw_usbphy fdt arm/allwinner/aw_usb3phy.c optional xhci aw_usbphy fdt arm/allwinner/aw_wdog.c optional aw_wdog fdt arm/allwinner/axp81x.c optional axp81x fdt arm/allwinner/if_awg.c optional awg ext_resources syscon aw_sid nvmem fdt # Allwinner clock driver arm/allwinner/clkng/aw_ccung.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_frac.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_m.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_mipi.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nkmp.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nm.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nmm.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_np.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_prediv_mux.c optional aw_ccu fdt arm/allwinner/clkng/ccu_a64.c optional soc_allwinner_a64 aw_ccu fdt arm/allwinner/clkng/ccu_h3.c optional soc_allwinner_h5 aw_ccu fdt arm/allwinner/clkng/ccu_h6.c optional soc_allwinner_h6 aw_ccu fdt arm/allwinner/clkng/ccu_h6_r.c optional soc_allwinner_h6 aw_ccu fdt arm/allwinner/clkng/ccu_sun8i_r.c optional aw_ccu fdt arm/allwinner/clkng/ccu_de2.c optional aw_ccu fdt # Allwinner padconf files arm/allwinner/a64/a64_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/h3/h3_padconf.c optional soc_allwinner_h5 fdt arm/allwinner/h3/h3_r_padconf.c optional soc_allwinner_h5 fdt arm/allwinner/h6/h6_padconf.c optional soc_allwinner_h6 fdt arm/allwinner/h6/h6_r_padconf.c optional soc_allwinner_h6 fdt # Altera/Intel dev/altera/dwc/if_dwc_socfpga.c optional fdt dwc_socfpga arm64/intel/firmware.c optional soc_intel_stratix10 arm64/intel/stratix10-soc-fpga-mgr.c optional soc_intel_stratix10 arm64/intel/stratix10-svc.c optional soc_intel_stratix10 # Annapurna arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt arm/annapurna/alpine/alpine_pci.c optional al_pci fdt arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt arm/annapurna/alpine/alpine_serdes.c optional al_serdes fdt \ no-depend \ compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}" # Broadcom arm64/broadcom/brcmmdio/mdio_mux_iproc.c optional soc_brcm_ns2 fdt arm64/broadcom/brcmmdio/mdio_nexus_iproc.c optional soc_brcm_ns2 fdt arm64/broadcom/brcmmdio/mdio_ns2_pcie_phy.c optional soc_brcm_ns2 fdt pci arm64/broadcom/genet/if_genet.c optional SOC_BRCM_BCM2838 fdt genet arm/broadcom/bcm2835/bcm2835_audio.c optional sound vchiq fdt \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc fdt arm/broadcom/bcm2835/bcm2835_clkman.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_cpufreq.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_dma.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_fbd.c optional vt soc_brcm_bcm2837 fdt | vt soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_firmware.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_ft5406.c optional evdev bcm2835_ft5406 fdt arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio soc_brcm_bcm2837 fdt | gpio soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_intr.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_mbox.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_rng.c optional !random_loadable soc_brcm_bcm2837 fdt | !random_loadable soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_sdhost.c optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi fdt arm/broadcom/bcm2835/bcm2835_vcbus.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837 | dwcotg fdt soc_brcm_bcm2838 arm/broadcom/bcm2835/bcm2838_pci.c optional soc_brcm_bcm2838 fdt pci arm/broadcom/bcm2835/bcm2838_xhci.c optional soc_brcm_bcm2838 fdt pci xhci arm/broadcom/bcm2835/raspberrypi_gpio.c optional soc_brcm_bcm2837 gpio | soc_brcm_bcm2838 gpio contrib/vchiq/interface/compat/vchi_bsd.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_connected.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_core.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_shim.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_util.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" # Cavium arm64/cavium/thunder_pcie_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_pem.c optional soc_cavm_thunderx pci arm64/cavium/thunder_pcie_pem_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_common.c optional soc_cavm_thunderx pci # i.MX8 Clock support arm64/freescale/imx/imx8mq_ccm.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_gate.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_mux.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_composite.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_sscg_pll.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_frac_pll.c optional fdt soc_freescale_imx8 # iMX drivers arm/freescale/imx/imx_gpio.c optional gpio soc_freescale_imx8 arm/freescale/imx/imx_i2c.c optional fsliic arm/freescale/imx/imx_machdep.c optional fdt soc_freescale_imx8 arm64/freescale/imx/imx7gpc.c optional fdt soc_freescale_imx8 dev/ffec/if_ffec.c optional ffec # Marvell arm/mv/a37x0_gpio.c optional a37x0_gpio gpio fdt arm/mv/a37x0_iic.c optional a37x0_iic iicbus fdt arm/mv/a37x0_spi.c optional a37x0_spi spibus fdt arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt arm/mv/gpio.c optional mv_gpio fdt arm/mv/mvebu_gpio.c optional mv_gpio fdt arm/mv/mvebu_pinctrl.c optional mvebu_pinctrl fdt arm/mv/mv_ap806_clock.c optional SOC_MARVELL_8K fdt arm/mv/mv_ap806_gicp.c optional mv_ap806_gicp fdt arm/mv/mv_ap806_sei.c optional mv_ap806_sei fdt arm/mv/mv_cp110_clock.c optional SOC_MARVELL_8K fdt arm/mv/mv_cp110_icu.c optional mv_cp110_icu fdt arm/mv/mv_cp110_icu_bus.c optional mv_cp110_icu fdt arm/mv/mv_thermal.c optional SOC_MARVELL_8K mv_thermal fdt # NVidia arm/nvidia/tegra_abpmisc.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_ahci.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_efuse.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_ehci.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_gpio.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_i2c.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_lic.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_mc.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_pcie.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_sdhci.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_soctherm_if.m optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_soctherm.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_uart.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_usbphy.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_xhci.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620_gpio.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620_regulators.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620_rtc.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_car.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_clk_per.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_clk_pll.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_clk_super.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_coretemp.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_cpufreq.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_pinmux.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_pmc.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_xusbpadctl.c optional fdt soc_nvidia_tegra210 # Nvidia firmware for Tegra tegra210_xusb_fw.c optional tegra210_xusb_fw \ dependency "$S/conf/files.arm64" \ compile-with "${AWK} -f $S/tools/fw_stub.awk tegra210_xusb.fw:tegra210_xusb_fw -mtegra210_xusb_fw -c${.TARGET}" \ no-ctfconvert no-implicit-rule before-depend local \ clean "tegra210_xusb_fw.c" tegra210_xusb.fwo optional tegra210_xusb_fw \ dependency "tegra210_xusb.fw" \ compile-with "${NORMAL_FWO}" \ no-implicit-rule \ clean "tegra210_xusb.fwo" tegra210_xusb.fw optional tegra210_xusb_fw \ dependency "$S/contrib/dev/nvidia/tegra210_xusb.bin.uu" \ compile-with "${NORMAL_FW}" \ no-obj no-implicit-rule \ clean "tegra210_xusb.fw" # NXP arm/freescale/vybrid/vf_i2c.c optional vf_i2c iicbus SOC_NXP_LS arm64/qoriq/qoriq_dw_pci.c optional pci fdt SOC_NXP_LS arm64/qoriq/qoriq_therm.c optional pci fdt SOC_NXP_LS arm64/qoriq/qoriq_therm_if.m optional pci fdt SOC_NXP_LS arm64/qoriq/clk/ls1028a_clkgen.c optional clk SOC_NXP_LS arm64/qoriq/clk/ls1046a_clkgen.c optional clk SOC_NXP_LS arm64/qoriq/clk/lx2160a_clkgen.c optional clk SOC_NXP_LS arm64/qoriq/clk/qoriq_clk_pll.c optional clk SOC_NXP_LS arm64/qoriq/clk/qoriq_clkgen.c optional clk SOC_NXP_LS dev/ahci/ahci_fsl_fdt.c optional SOC_NXP_LS ahci fdt # Qualcomm arm64/qualcomm/qcom_gcc.c optional qcom_gcc fdt # RockChip Drivers arm64/rockchip/rk3399_emmcphy.c optional fdt rk_emmcphy soc_rockchip_rk3399 arm64/rockchip/rk_dwc3.c optional fdt rk_dwc3 soc_rockchip_rk3399 arm64/rockchip/rk_i2c.c optional fdt rk_i2c soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399 arm64/rockchip/rk805.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/rk_pinctrl.c optional fdt rk_pinctrl soc_rockchip_rk3328 | fdt rk_pinctrl soc_rockchip_rk3399 arm64/rockchip/rk_gpio.c optional fdt rk_gpio soc_rockchip_rk3328 | fdt rk_gpio soc_rockchip_rk3399 arm64/rockchip/rk_iodomain.c optional fdt rk_iodomain arm64/rockchip/rk_spi.c optional fdt rk_spi arm64/rockchip/rk_usb2phy.c optional fdt rk_usb2phy soc_rockchip_rk3328 | soc_rockchip_rk3399 arm64/rockchip/rk_typec_phy.c optional fdt rk_typec_phy soc_rockchip_rk3399 arm64/rockchip/if_dwc_rk.c optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 arm64/rockchip/rk_tsadc_if.m optional fdt soc_rockchip_rk3399 arm64/rockchip/rk_tsadc.c optional fdt soc_rockchip_rk3399 arm64/rockchip/rk_pwm.c optional fdt rk_pwm arm64/rockchip/rk_pcie.c optional fdt pci soc_rockchip_rk3399 arm64/rockchip/rk_pcie_phy.c optional fdt pci soc_rockchip_rk3399 # RockChip Clock support arm64/rockchip/clk/rk_cru.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_armclk.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_composite.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_fract.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_gate.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_mux.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_pll.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk3328_cru.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk3399_cru.c optional fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk3399_pmucru.c optional fdt soc_rockchip_rk3399 # Xilinx arm/xilinx/uart_dev_cdnc.c optional uart soc_xilinx_zynq diff --git a/sys/dev/sdhci/sdhci_xenon.c b/sys/dev/sdhci/sdhci_xenon.c index d88514d8fd8f..6dc0974c4e4e 100644 --- a/sys/dev/sdhci/sdhci_xenon.c +++ b/sys/dev/sdhci/sdhci_xenon.c @@ -1,730 +1,644 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2018 Rubicon Communications, LLC (Netgate) * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Marvell Xenon SDHCI controller driver. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include -#include -#include -#include #include -#include #include #include #include -#include #include #include "mmcbr_if.h" #include "sdhci_if.h" #include "opt_mmccam.h" #include "opt_soc.h" #define MAX_SLOTS 6 -static struct ofw_compat_data compat_data[] = { - { "marvell,armada-3700-sdhci", 1 }, -#ifdef SOC_MARVELL_8K - { "marvell,armada-cp110-sdhci", 1 }, - { "marvell,armada-ap806-sdhci", 1 }, - { "marvell,armada-ap807-sdhci", 1 }, -#endif - { NULL, 0 } -}; - -struct sdhci_xenon_softc { - device_t dev; /* Controller device */ - int slot_id; /* Controller ID */ - phandle_t node; /* FDT node */ - struct resource *irq_res; /* IRQ resource */ - void *intrhand; /* Interrupt handle */ - struct sdhci_fdt_gpio *gpio; /* GPIO pins for CD detection. */ - - struct sdhci_slot *slot; /* SDHCI internal data */ - struct resource *mem_res; /* Memory resource */ - - uint8_t znr; /* PHY ZNR */ - uint8_t zpr; /* PHY ZPR */ - bool slow_mode; /* PHY slow mode */ - - struct mmc_helper mmc_helper; /* MMC helper for parsing FDT */ -}; - static uint8_t sdhci_xenon_read_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) { struct sdhci_xenon_softc *sc = device_get_softc(dev); return (bus_read_1(sc->mem_res, off)); } static void sdhci_xenon_write_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off, uint8_t val) { struct sdhci_xenon_softc *sc = device_get_softc(dev); bus_write_1(sc->mem_res, off, val); } static uint16_t sdhci_xenon_read_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) { struct sdhci_xenon_softc *sc = device_get_softc(dev); return (bus_read_2(sc->mem_res, off)); } static void sdhci_xenon_write_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off, uint16_t val) { struct sdhci_xenon_softc *sc = device_get_softc(dev); bus_write_2(sc->mem_res, off, val); } static uint32_t sdhci_xenon_read_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) { struct sdhci_xenon_softc *sc = device_get_softc(dev); return bus_read_4(sc->mem_res, off); } static void sdhci_xenon_write_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off, uint32_t val) { struct sdhci_xenon_softc *sc = device_get_softc(dev); bus_write_4(sc->mem_res, off, val); } static void sdhci_xenon_read_multi_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off, uint32_t *data, bus_size_t count) { struct sdhci_xenon_softc *sc = device_get_softc(dev); bus_read_multi_4(sc->mem_res, off, data, count); } static void sdhci_xenon_write_multi_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off, uint32_t *data, bus_size_t count) { struct sdhci_xenon_softc *sc = device_get_softc(dev); bus_write_multi_4(sc->mem_res, off, data, count); } static void sdhci_xenon_intr(void *arg) { struct sdhci_xenon_softc *sc = (struct sdhci_xenon_softc *)arg; sdhci_generic_intr(sc->slot); } static int sdhci_xenon_get_ro(device_t bus, device_t dev) { struct sdhci_xenon_softc *sc = device_get_softc(bus); - return (sdhci_generic_get_ro(bus, dev) ^ - (sc->mmc_helper.props & MMC_PROP_WP_INVERTED)); -} - -static bool -sdhci_xenon_get_card_present(device_t dev, struct sdhci_slot *slot) -{ - struct sdhci_xenon_softc *sc = device_get_softc(dev); - - return (sdhci_fdt_gpio_get_present(sc->gpio)); + return (sdhci_generic_get_ro(bus, dev) ^ sc->wp_inverted); } static void sdhci_xenon_set_uhs_timing(device_t brdev, struct sdhci_slot *slot) { const struct mmc_ios *ios; uint16_t hostctrl2; if (slot->version < SDHCI_SPEC_300) return; mtx_assert(&slot->mtx, MA_OWNED); ios = &slot->host.ios; /* Update timing parameteres in SDHCI_HOST_CONTROL2 register. */ hostctrl2 = sdhci_xenon_read_2(brdev, slot, SDHCI_HOST_CONTROL2); hostctrl2 &= ~SDHCI_CTRL2_UHS_MASK; if (ios->clock > SD_SDR50_MAX) { if (ios->timing == bus_timing_mmc_hs400 || ios->timing == bus_timing_mmc_hs400es) hostctrl2 |= XENON_CTRL2_MMC_HS400; else if (ios->timing == bus_timing_mmc_hs200) hostctrl2 |= XENON_CTRL2_MMC_HS200; else hostctrl2 |= SDHCI_CTRL2_UHS_SDR104; } else if (ios->clock > SD_SDR25_MAX) hostctrl2 |= SDHCI_CTRL2_UHS_SDR50; else if (ios->clock > SD_SDR12_MAX) { if (ios->timing == bus_timing_uhs_ddr50 || ios->timing == bus_timing_mmc_ddr52) hostctrl2 |= SDHCI_CTRL2_UHS_DDR50; else hostctrl2 |= SDHCI_CTRL2_UHS_SDR25; } else if (ios->clock > SD_MMC_CARD_ID_FREQUENCY) hostctrl2 |= SDHCI_CTRL2_UHS_SDR12; sdhci_xenon_write_2(brdev, slot, SDHCI_HOST_CONTROL2, hostctrl2); } static int sdhci_xenon_phy_init(device_t brdev, struct mmc_ios *ios) { int i; struct sdhci_xenon_softc *sc; uint32_t reg; sc = device_get_softc(brdev); reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); reg |= XENON_SAMPL_INV_QSP_PHASE_SELECT; switch (ios->timing) { case bus_timing_normal: case bus_timing_hs: case bus_timing_uhs_sdr12: case bus_timing_uhs_sdr25: case bus_timing_uhs_sdr50: reg |= XENON_TIMING_ADJUST_SLOW_MODE; break; default: reg &= ~XENON_TIMING_ADJUST_SLOW_MODE; } if (sc->slow_mode) reg |= XENON_TIMING_ADJUST_SLOW_MODE; bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); reg |= XENON_PHY_INITIALIZATION; bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); /* Wait for the eMMC PHY init. */ for (i = 100; i > 0; i--) { DELAY(100); reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); if ((reg & XENON_PHY_INITIALIZATION) == 0) break; } if (i == 0) { device_printf(brdev, "eMMC PHY failed to initialize\n"); return (ETIMEDOUT); } return (0); } static int sdhci_xenon_phy_set(device_t brdev, struct mmc_ios *ios) { struct sdhci_xenon_softc *sc; uint32_t reg; sc = device_get_softc(brdev); /* Setup pad, set bit[28] and bits[26:24] */ reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL); reg |= (XENON_FC_DQ_RECEN | XENON_FC_CMD_RECEN | XENON_FC_QSP_RECEN | XENON_OEN_QSN); /* All FC_XX_RECEIVCE should be set as CMOS Type */ reg |= XENON_FC_ALL_CMOS_RECEIVER; bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL, reg); /* Set CMD and DQ Pull Up */ reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1); reg |= (XENON_EMMC_FC_CMD_PU | XENON_EMMC_FC_DQ_PU); reg &= ~(XENON_EMMC_FC_CMD_PD | XENON_EMMC_FC_DQ_PD); bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1, reg); if (ios->timing == bus_timing_normal) return (sdhci_xenon_phy_init(brdev, ios)); /* Clear SDIO mode, no SDIO support for now. */ reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); reg &= ~XENON_TIMING_ADJUST_SDIO_MODE; bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); /* * Set preferred ZNR and ZPR value. * The ZNR and ZPR value vary between different boards. * Define them both in the DTS for the board! */ reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2); reg &= ~((XENON_ZNR_MASK << XENON_ZNR_SHIFT) | XENON_ZPR_MASK); reg |= ((sc->znr << XENON_ZNR_SHIFT) | sc->zpr); bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2, reg); /* Disable the SD clock to set EMMC_PHY_FUNC_CONTROL. */ reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL); reg &= ~SDHCI_CLOCK_CARD_EN; bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg); reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL); switch (ios->timing) { case bus_timing_mmc_hs400: reg |= (XENON_DQ_DDR_MODE_MASK << XENON_DQ_DDR_MODE_SHIFT) | XENON_CMD_DDR_MODE; reg &= ~XENON_DQ_ASYNC_MODE; break; case bus_timing_uhs_ddr50: case bus_timing_mmc_ddr52: reg |= (XENON_DQ_DDR_MODE_MASK << XENON_DQ_DDR_MODE_SHIFT) | XENON_CMD_DDR_MODE | XENON_DQ_ASYNC_MODE; break; default: reg &= ~((XENON_DQ_DDR_MODE_MASK << XENON_DQ_DDR_MODE_SHIFT) | XENON_CMD_DDR_MODE); reg |= XENON_DQ_ASYNC_MODE; } bus_write_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL, reg); /* Enable SD clock. */ reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL); reg |= SDHCI_CLOCK_CARD_EN; bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg); if (ios->timing == bus_timing_mmc_hs400) bus_write_4(sc->mem_res, XENON_EMMC_PHY_LOGIC_TIMING_ADJUST, XENON_LOGIC_TIMING_VALUE); else { /* Disable both SDHC Data Strobe and Enhanced Strobe. */ reg = bus_read_4(sc->mem_res, XENON_SLOT_EMMC_CTRL); reg &= ~(XENON_ENABLE_DATA_STROBE | XENON_ENABLE_RESP_STROBE); bus_write_4(sc->mem_res, XENON_SLOT_EMMC_CTRL, reg); /* Clear Strobe line Pull down or Pull up. */ reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1); reg &= ~(XENON_EMMC_FC_QSP_PD | XENON_EMMC_FC_QSP_PU); bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1, reg); } return (sdhci_xenon_phy_init(brdev, ios)); } static int sdhci_xenon_update_ios(device_t brdev, device_t reqdev) { int err; struct sdhci_xenon_softc *sc; struct mmc_ios *ios; struct sdhci_slot *slot; uint32_t reg; err = sdhci_generic_update_ios(brdev, reqdev); if (err != 0) return (err); sc = device_get_softc(brdev); slot = device_get_ivars(reqdev); ios = &slot->host.ios; switch (ios->power_mode) { case power_on: break; case power_off: if (bootverbose) device_printf(sc->dev, "Powering down sd/mmc\n"); - if (sc->mmc_helper.vmmc_supply) - regulator_disable(sc->mmc_helper.vmmc_supply); - if (sc->mmc_helper.vqmmc_supply) - regulator_disable(sc->mmc_helper.vqmmc_supply); + if (sc->vmmc_supply) + regulator_disable(sc->vmmc_supply); + if (sc->vqmmc_supply) + regulator_disable(sc->vqmmc_supply); break; case power_up: if (bootverbose) device_printf(sc->dev, "Powering up sd/mmc\n"); - if (sc->mmc_helper.vmmc_supply) - regulator_enable(sc->mmc_helper.vmmc_supply); - if (sc->mmc_helper.vqmmc_supply) - regulator_enable(sc->mmc_helper.vqmmc_supply); + if (sc->vmmc_supply) + regulator_enable(sc->vmmc_supply); + if (sc->vqmmc_supply) + regulator_enable(sc->vqmmc_supply); break; }; /* Update the PHY settings. */ if (ios->clock != 0) sdhci_xenon_phy_set(brdev, ios); if (ios->clock > SD_MMC_CARD_ID_FREQUENCY) { /* Enable SDCLK_IDLEOFF. */ reg = bus_read_4(sc->mem_res, XENON_SYS_OP_CTRL); reg |= 1 << (XENON_SDCLK_IDLEOFF_ENABLE_SHIFT + sc->slot_id); bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg); } return (0); } static int sdhci_xenon_switch_vccq(device_t brdev, device_t reqdev) { struct sdhci_xenon_softc *sc; struct sdhci_slot *slot; uint16_t hostctrl2; int uvolt, err; slot = device_get_ivars(reqdev); if (slot->version < SDHCI_SPEC_300) return (0); sc = device_get_softc(brdev); - if (sc->mmc_helper.vqmmc_supply == NULL) - return EOPNOTSUPP; + if (sc->vqmmc_supply == NULL && !sc->skip_regulators) + return (EOPNOTSUPP); err = 0; hostctrl2 = bus_read_2(sc->mem_res, SDHCI_HOST_CONTROL2); switch (slot->host.ios.vccq) { case vccq_330: if (!(hostctrl2 & SDHCI_CTRL2_S18_ENABLE)) return (0); hostctrl2 &= ~SDHCI_CTRL2_S18_ENABLE; bus_write_2(sc->mem_res, SDHCI_HOST_CONTROL2, hostctrl2); - uvolt = 3300000; - err = regulator_set_voltage(sc->mmc_helper.vqmmc_supply, - uvolt, uvolt); - if (err != 0) { - device_printf(sc->dev, - "Cannot set vqmmc to %d<->%d\n", - uvolt, - uvolt); - return (err); + if (!sc->skip_regulators) { + uvolt = 3300000; + err = regulator_set_voltage(sc->vqmmc_supply, + uvolt, uvolt); + if (err != 0) { + device_printf(sc->dev, + "Cannot set vqmmc to %d<->%d\n", + uvolt, + uvolt); + return (err); + } } /* * According to the 'SD Host Controller Simplified * Specification 4.20 the host driver should take more * than 5ms for stable time of host voltage regulator * from changing 1.8V Signaling Enable. */ DELAY(5000); hostctrl2 = bus_read_2(sc->mem_res, SDHCI_HOST_CONTROL2); if (!(hostctrl2 & SDHCI_CTRL2_S18_ENABLE)) return (0); - return EAGAIN; + return (EAGAIN); case vccq_180: if (!(slot->host.caps & MMC_CAP_SIGNALING_180)) { - return EINVAL; + return (EINVAL); } if (hostctrl2 & SDHCI_CTRL2_S18_ENABLE) return (0); hostctrl2 |= SDHCI_CTRL2_S18_ENABLE; bus_write_2(sc->mem_res, SDHCI_HOST_CONTROL2, hostctrl2); - uvolt = 1800000; - err = regulator_set_voltage(sc->mmc_helper.vqmmc_supply, - uvolt, uvolt); - if (err != 0) { - device_printf(sc->dev, - "Cannot set vqmmc to %d<->%d\n", - uvolt, - uvolt); - return (err); + if (!sc->skip_regulators) { + uvolt = 1800000; + err = regulator_set_voltage(sc->vqmmc_supply, + uvolt, uvolt); + if (err != 0) { + device_printf(sc->dev, + "Cannot set vqmmc to %d<->%d\n", + uvolt, + uvolt); + return (err); + } } /* * According to the 'SD Host Controller Simplified * Specification 4.20 the host driver should take more * than 5ms for stable time of host voltage regulator * from changing 1.8V Signaling Enable. */ DELAY(5000); hostctrl2 = bus_read_2(sc->mem_res, SDHCI_HOST_CONTROL2); if (hostctrl2 & SDHCI_CTRL2_S18_ENABLE) return (0); - return EAGAIN; + return (EAGAIN); default: device_printf(brdev, "Attempt to set unsupported signaling voltage\n"); - return EINVAL; + return (EINVAL); } } static void -sdhci_xenon_fdt_parse(device_t dev, struct sdhci_slot *slot) +sdhci_xenon_parse_prop(device_t dev) { - struct sdhci_xenon_softc *sc = device_get_softc(dev); - pcell_t cid; + struct sdhci_xenon_softc *sc; + uint64_t val; - mmc_fdt_parse(dev, 0, &sc->mmc_helper, &slot->host); + sc = device_get_softc(dev); + val = 0; - /* Allow dts to patch quirks, slots, and max-frequency. */ - if ((OF_getencprop(sc->node, "quirks", &cid, sizeof(cid))) > 0) - slot->quirks = cid; - if (OF_hasprop(sc->node, "marvell,xenon-phy-slow-mode")) - sc->slow_mode = true; + if (device_get_property(dev, "quirks", &val, sizeof(val)) > 0) + sc->slot->quirks = val; sc->znr = XENON_ZNR_DEF_VALUE; - if ((OF_getencprop(sc->node, "marvell,xenon-phy-znr", &cid, - sizeof(cid))) > 0) - sc->znr = cid & XENON_ZNR_MASK; + if (device_get_property(dev, "marvell,xenon-phy-znr", + &val, sizeof(val)) > 0) + sc->znr = val & XENON_ZNR_MASK; sc->zpr = XENON_ZPR_DEF_VALUE; - if ((OF_getencprop(sc->node, "marvell,xenon-phy-zpr", &cid, - sizeof(cid))) > 0) - sc->zpr = cid & XENON_ZPR_MASK; -} - -static int -sdhci_xenon_probe(device_t dev) -{ - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "Armada Xenon SDHCI controller"); - - return (0); + if (device_get_property(dev, "marvell,xenon-phy-zpr", + &val, sizeof(val)) > 0) + sc->zpr = val & XENON_ZPR_MASK; + if (device_has_property(dev, "marvell,xenon-phy-slow-mode")) + sc->slow_mode = true; } -static int +int sdhci_xenon_attach(device_t dev) { struct sdhci_xenon_softc *sc = device_get_softc(dev); - struct sdhci_slot *slot; int err, rid; uint32_t reg; sc->dev = dev; sc->slot_id = 0; - sc->node = ofw_bus_get_node(dev); /* Allocate IRQ. */ rid = 0; sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); if (sc->irq_res == NULL) { device_printf(dev, "Can't allocate IRQ\n"); return (ENOMEM); } /* Allocate memory. */ rid = 0; sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->mem_res == NULL) { bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res), sc->irq_res); device_printf(dev, "Can't allocate memory for slot\n"); return (ENOMEM); } - slot = malloc(sizeof(*slot), M_DEVBUF, M_ZERO | M_WAITOK); - - /* - * Set up any gpio pin handling described in the FDT data. This cannot - * fail; see comments in sdhci_fdt_gpio.h for details. - */ - sc->gpio = sdhci_fdt_gpio_setup(dev, slot); + sdhci_xenon_parse_prop(dev); - sdhci_xenon_fdt_parse(dev, slot); - - slot->max_clk = XENON_MMC_MAX_CLK; - if (slot->host.f_max > 0) - slot->max_clk = slot->host.f_max; - /* Check if the device is flagged as non-removable. */ - if (sc->mmc_helper.props & MMC_PROP_NON_REMOVABLE) { - slot->opt |= SDHCI_NON_REMOVABLE; - if (bootverbose) - device_printf(dev, "Non-removable media\n"); - } - - sc->slot = slot; + sc->slot->max_clk = XENON_MMC_MAX_CLK; + if (sc->slot->host.f_max > 0) + sc->slot->max_clk = sc->slot->host.f_max; if (sdhci_init_slot(dev, sc->slot, 0)) goto fail; /* 1.2V signaling is not supported. */ sc->slot->host.caps &= ~MMC_CAP_SIGNALING_120; /* Disable UHS in case of the PHY slow mode. */ if (sc->slow_mode) sc->slot->host.caps &= ~MMC_CAP_SIGNALING_180; /* Activate the interrupt */ err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, NULL, sdhci_xenon_intr, sc, &sc->intrhand); if (err) { device_printf(dev, "Cannot setup IRQ\n"); goto fail; } /* Disable Auto Clock Gating. */ reg = bus_read_4(sc->mem_res, XENON_SYS_OP_CTRL); reg |= XENON_AUTO_CLKGATE_DISABLE; bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg); /* Enable this SD controller. */ reg |= (1 << sc->slot_id); bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg); /* Enable Parallel Transfer. */ reg = bus_read_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL); reg |= (1 << sc->slot_id); bus_write_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL, reg); /* Enable Auto Clock Gating. */ reg &= ~XENON_AUTO_CLKGATE_DISABLE; bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg); /* Disable SDCLK_IDLEOFF before the card initialization. */ reg = bus_read_4(sc->mem_res, XENON_SYS_OP_CTRL); reg &= ~(1 << (XENON_SDCLK_IDLEOFF_ENABLE_SHIFT + sc->slot_id)); bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg); /* Mask command conflict errors. */ reg = bus_read_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL); reg |= XENON_MASK_CMD_CONFLICT_ERR; bus_write_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL, reg); /* Process cards detection. */ sdhci_start_slot(sc->slot); return (0); fail: bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res), sc->irq_res); bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->mem_res), sc->mem_res); free(sc->slot, M_DEVBUF); sc->slot = NULL; return (ENXIO); } -static int +int sdhci_xenon_detach(device_t dev) { struct sdhci_xenon_softc *sc = device_get_softc(dev); - if (sc->gpio != NULL) - sdhci_fdt_gpio_teardown(sc->gpio); - bus_generic_detach(dev); bus_teardown_intr(dev, sc->irq_res, sc->intrhand); bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res), sc->irq_res); sdhci_cleanup_slot(sc->slot); bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->mem_res), sc->mem_res); free(sc->slot, M_DEVBUF); sc->slot = NULL; return (0); } static device_method_t sdhci_xenon_methods[] = { - /* device_if */ - DEVMETHOD(device_probe, sdhci_xenon_probe), - DEVMETHOD(device_attach, sdhci_xenon_attach), - DEVMETHOD(device_detach, sdhci_xenon_detach), - /* Bus interface */ DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar), DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar), /* mmcbr_if */ DEVMETHOD(mmcbr_update_ios, sdhci_xenon_update_ios), DEVMETHOD(mmcbr_request, sdhci_generic_request), DEVMETHOD(mmcbr_get_ro, sdhci_xenon_get_ro), DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host), DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host), DEVMETHOD(mmcbr_switch_vccq, sdhci_xenon_switch_vccq), DEVMETHOD(mmcbr_tune, sdhci_generic_tune), DEVMETHOD(mmcbr_retune, sdhci_generic_retune), /* SDHCI registers accessors */ DEVMETHOD(sdhci_read_1, sdhci_xenon_read_1), DEVMETHOD(sdhci_read_2, sdhci_xenon_read_2), DEVMETHOD(sdhci_read_4, sdhci_xenon_read_4), DEVMETHOD(sdhci_read_multi_4, sdhci_xenon_read_multi_4), DEVMETHOD(sdhci_write_1, sdhci_xenon_write_1), DEVMETHOD(sdhci_write_2, sdhci_xenon_write_2), DEVMETHOD(sdhci_write_4, sdhci_xenon_write_4), DEVMETHOD(sdhci_write_multi_4, sdhci_xenon_write_multi_4), - DEVMETHOD(sdhci_get_card_present, sdhci_xenon_get_card_present), DEVMETHOD(sdhci_set_uhs_timing, sdhci_xenon_set_uhs_timing), DEVMETHOD_END }; -static driver_t sdhci_xenon_driver = { - "sdhci_xenon", - sdhci_xenon_methods, - sizeof(struct sdhci_xenon_softc), -}; -static devclass_t sdhci_xenon_devclass; - -DRIVER_MODULE(sdhci_xenon, simplebus, sdhci_xenon_driver, sdhci_xenon_devclass, - NULL, NULL); +DEFINE_CLASS_0(sdhci_xenon, sdhci_xenon_driver, sdhci_xenon_methods, + sizeof(struct sdhci_xenon_softc)); SDHCI_DEPEND(sdhci_xenon); #ifndef MMCCAM MMC_DECLARE_BRIDGE(sdhci_xenon); #endif diff --git a/sys/dev/sdhci/sdhci_xenon.h b/sys/dev/sdhci/sdhci_xenon.h index 07ed99339b8d..9d8449b90c82 100644 --- a/sys/dev/sdhci/sdhci_xenon.h +++ b/sys/dev/sdhci/sdhci_xenon.h @@ -1,104 +1,133 @@ /*- * Copyright (c) 2018 Rubicon Communications, LLC (Netgate) * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ /* * Marvel Xenon SDHCI driver defines. */ #ifndef _SDHCI_XENON_H_ #define _SDHCI_XENON_H_ #define XENON_LOWEST_SDCLK_FREQ 100000 #define XENON_MMC_MAX_CLK 400000000 #define XENON_SYS_OP_CTRL 0x0108 #define XENON_AUTO_CLKGATE_DISABLE (1 << 20) #define XENON_SDCLK_IDLEOFF_ENABLE_SHIFT 8 #define XENON_SYS_EXT_OP_CTRL 0x010C #define XENON_MASK_CMD_CONFLICT_ERR (1 << 8) #define XENON_SLOT_EMMC_CTRL 0x0130 #define XENON_ENABLE_DATA_STROBE (1 << 24) #define XENON_ENABLE_RESP_STROBE (1 << 25) /* Custom HS200 / HS400 Mode Select values in SDHCI_HOST_CONTROL2 register. */ #define XENON_CTRL2_MMC_HS200 0x5 #define XENON_CTRL2_MMC_HS400 0x6 /* eMMC PHY */ #define XENON_EMMC_PHY_REG_BASE 0x170 #define XENON_EMMC_PHY_TIMING_ADJUST XENON_EMMC_PHY_REG_BASE #define XENON_SAMPL_INV_QSP_PHASE_SELECT (1 << 18) #define XENON_TIMING_ADJUST_SDIO_MODE (1 << 28) #define XENON_TIMING_ADJUST_SLOW_MODE (1 << 29) #define XENON_PHY_INITIALIZATION (1U << 31) #define XENON_WAIT_CYCLE_BEFORE_USING_MASK 0xF #define XENON_WAIT_CYCLE_BEFORE_USING_SHIFT 12 #define XENON_FC_SYNC_EN_DURATION_MASK 0xF #define XENON_FC_SYNC_EN_DURATION_SHIFT 8 #define XENON_FC_SYNC_RST_EN_DURATION_MASK 0xF #define XENON_FC_SYNC_RST_EN_DURATION_SHIFT 4 #define XENON_FC_SYNC_RST_DURATION_MASK 0xF #define XENON_FC_SYNC_RST_DURATION_SHIFT 0 #define XENON_EMMC_PHY_FUNC_CONTROL (XENON_EMMC_PHY_REG_BASE + 0x4) #define XENON_DQ_ASYNC_MODE (1 << 4) #define XENON_CMD_DDR_MODE (1 << 16) #define XENON_DQ_DDR_MODE_SHIFT 8 #define XENON_DQ_DDR_MODE_MASK 0xFF #define XENON_ASYNC_DDRMODE_MASK (1 << 23) #define XENON_ASYNC_DDRMODE_SHIFT 23 #define XENON_EMMC_PHY_PAD_CONTROL (XENON_EMMC_PHY_REG_BASE + 0x8) #define XENON_FC_DQ_RECEN (1 << 24) #define XENON_FC_CMD_RECEN (1 << 25) #define XENON_FC_QSP_RECEN (1 << 26) #define XENON_FC_QSN_RECEN (1 << 27) #define XENON_OEN_QSN (1 << 28) #define XENON_FC_ALL_CMOS_RECEIVER 0xF000 #define XENON_EMMC_PHY_PAD_CONTROL1 (XENON_EMMC_PHY_REG_BASE + 0xC) #define XENON_EMMC_FC_CMD_PD (1 << 8) #define XENON_EMMC_FC_QSP_PD (1 << 9) #define XENON_EMMC_FC_CMD_PU (1 << 24) #define XENON_EMMC_FC_QSP_PU (1 << 25) #define XENON_EMMC_FC_DQ_PD 0xFF #define XENON_EMMC_FC_DQ_PU (0xFF << 16) #define XENON_EMMC_PHY_PAD_CONTROL2 (XENON_EMMC_PHY_REG_BASE + 0x10) #define XENON_ZNR_MASK 0x1F #define XENON_ZNR_SHIFT 8 #define XENON_ZPR_MASK 0x1F #define XENON_ZNR_DEF_VALUE 0xF #define XENON_ZPR_DEF_VALUE 0xF #define XENON_EMMC_PHY_LOGIC_TIMING_ADJUST (XENON_EMMC_PHY_REG_BASE + 0x18) #define XENON_LOGIC_TIMING_VALUE 0x00AA8977 +DECLARE_CLASS(sdhci_xenon_driver); + +struct sdhci_xenon_softc { + device_t dev; /* Controller device */ + int slot_id; /* Controller ID */ + + struct resource *mem_res; /* Memory resource */ + struct resource *irq_res; /* IRQ resource */ + void *intrhand; /* Interrupt handle */ + + struct sdhci_slot *slot; /* SDHCI internal data */ + + uint8_t znr; /* PHY ZNR */ + uint8_t zpr; /* PHY ZPR */ + bool slow_mode; /* PHY slow mode */ + bool wp_inverted; + bool skip_regulators; /* Don't switch regulators */ + + regulator_t vmmc_supply; + regulator_t vqmmc_supply; + +#ifdef FDT + struct sdhci_fdt_gpio *gpio; /* GPIO pins for CD detection. */ +#endif +}; + +device_attach_t sdhci_xenon_attach; +device_detach_t sdhci_xenon_detach; + #endif /* _SDHCI_XENON_H_ */ diff --git a/sys/dev/sdhci/sdhci_xenon_fdt.c b/sys/dev/sdhci/sdhci_xenon_fdt.c new file mode 100644 index 000000000000..2d96105bd7e9 --- /dev/null +++ b/sys/dev/sdhci/sdhci_xenon_fdt.c @@ -0,0 +1,173 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2021 Semihalf + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "mmcbr_if.h" +#include "sdhci_if.h" + +#include "opt_mmccam.h" +#include "opt_soc.h" + +static struct ofw_compat_data compat_data[] = { + { "marvell,armada-3700-sdhci", 1 }, +#ifdef SOC_MARVELL_8K + { "marvell,armada-cp110-sdhci", 1 }, + { "marvell,armada-ap806-sdhci", 1 }, + { "marvell,armada-ap807-sdhci", 1 }, +#endif + { NULL, 0 } +}; + +static bool +sdhci_xenon_fdt_get_card_present(device_t dev, struct sdhci_slot *slot) +{ + struct sdhci_xenon_softc *sc; + + sc = device_get_softc(dev); + + return (sdhci_fdt_gpio_get_present(sc->gpio)); +} + +static int +sdhci_xenon_fdt_probe(device_t dev) +{ + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) + return (ENXIO); + + device_set_desc(dev, "Armada Xenon SDHCI controller"); + + return (BUS_PROBE_SPECIFIC); +} + +static void +sdhci_xenon_fdt_parse(device_t dev, struct sdhci_slot *slot) +{ + struct sdhci_xenon_softc *sc; + struct mmc_helper mmc_helper; + + sc = device_get_softc(dev); + memset(&mmc_helper, 0, sizeof(mmc_helper)); + + /* MMC helper for parsing FDT */ + mmc_fdt_parse(dev, 0, &mmc_helper, &slot->host); + + sc->skip_regulators = false; + sc->vmmc_supply = mmc_helper.vmmc_supply; + sc->vqmmc_supply = mmc_helper.vqmmc_supply; + sc->wp_inverted = mmc_helper.props & MMC_PROP_WP_INVERTED; + + /* Check if the device is flagged as non-removable. */ + if (mmc_helper.props & MMC_PROP_NON_REMOVABLE) { + slot->opt |= SDHCI_NON_REMOVABLE; + if (bootverbose) + device_printf(dev, "Non-removable media\n"); + } +} + +static int +sdhci_xenon_fdt_attach(device_t dev) +{ + struct sdhci_xenon_softc *sc; + struct sdhci_slot *slot; + + sc = device_get_softc(dev); + slot = malloc(sizeof(*slot), M_DEVBUF, M_ZERO | M_WAITOK); + + sdhci_xenon_fdt_parse(dev, slot); + + /* + * Set up any gpio pin handling described in the FDT data. This cannot + * fail; see comments in sdhci_fdt_gpio.h for details. + */ + sc->gpio = sdhci_fdt_gpio_setup(dev, slot); + sc->slot = slot; + + return (sdhci_xenon_attach(dev)); +} + +static int +sdhci_xenon_fdt_detach(device_t dev) +{ + struct sdhci_xenon_softc *sc; + + sc = device_get_softc(dev); + if (sc->gpio != NULL) + sdhci_fdt_gpio_teardown(sc->gpio); + + return (sdhci_xenon_detach(dev)); +} + +static device_method_t sdhci_xenon_fdt_methods[] = { + /* device_if */ + DEVMETHOD(device_probe, sdhci_xenon_fdt_probe), + DEVMETHOD(device_attach, sdhci_xenon_fdt_attach), + DEVMETHOD(device_detach, sdhci_xenon_fdt_detach), + + DEVMETHOD(sdhci_get_card_present, sdhci_xenon_fdt_get_card_present), + + DEVMETHOD_END +}; + +DEFINE_CLASS_1(sdhci_xenon, sdhci_xenon_fdt_driver, sdhci_xenon_fdt_methods, + sizeof(struct sdhci_xenon_softc), sdhci_xenon_driver); + +static devclass_t sdhci_xenon_fdt_devclass; + +DRIVER_MODULE(sdhci_xenon, simplebus, sdhci_xenon_fdt_driver, + sdhci_xenon_fdt_devclass, NULL, NULL); + +#ifndef MMCCAM +MMC_DECLARE_BRIDGE(sdhci_xenon_fdt); +#endif