diff --git a/sys/conf/files b/sys/conf/files
index 4e981a135b0c..e94652462a17 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -1,5221 +1,5223 @@
 # $FreeBSD$
 #
 # The long compile-with and dependency lines are required because of
 # limitations in config: backslash-newline doesn't work in strings, and
 # dependency lines other than the first are silently ignored.
 #
 acpi_quirks.h			optional acpi				   \
 	dependency	"$S/tools/acpi_quirks2h.awk $S/dev/acpica/acpi_quirks" \
 	compile-with	"${AWK} -f $S/tools/acpi_quirks2h.awk $S/dev/acpica/acpi_quirks" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"acpi_quirks.h"
 bhnd_nvram_map.h		optional bhnd				   \
 	dependency	"$S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/tools/nvram_map_gen.awk $S/dev/bhnd/nvram/nvram_map" \
 	compile-with	"sh $S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/nvram/nvram_map -h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"bhnd_nvram_map.h"
 bhnd_nvram_map_data.h		optional bhnd				   \
 	dependency	"$S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/tools/nvram_map_gen.awk $S/dev/bhnd/nvram/nvram_map" \
 	compile-with	"sh $S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/nvram/nvram_map -d" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"bhnd_nvram_map_data.h"
 fdt_static_dtb.h		optional fdt fdt_dtb_static \
 	compile-with "sh -c 'MACHINE=${MACHINE} $S/tools/fdt/make_dtbh.sh ${FDT_DTS_FILE} ${.CURDIR}'" \
 	dependency	"${FDT_DTS_FILE:T:R}.dtb" \
 	no-obj no-implicit-rule before-depend \
 	clean		"fdt_static_dtb.h"
 feeder_eq_gen.h			optional sound				   \
 	dependency	"$S/tools/sound/feeder_eq_mkfilter.awk"		   \
 	compile-with	"${AWK} -f $S/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > feeder_eq_gen.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"feeder_eq_gen.h"
 feeder_rate_gen.h		optional sound				   \
 	dependency	"$S/tools/sound/feeder_rate_mkfilter.awk"	   \
 	compile-with	"${AWK} -f $S/tools/sound/feeder_rate_mkfilter.awk -- ${FEEDER_RATE_PRESETS} > feeder_rate_gen.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"feeder_rate_gen.h"
 font.h				optional	sc_dflt_font		\
 	compile-with	"uudecode < ${SRCTOP}/share/syscons/fonts/${SC_DFLT_FONT}-8x16.fnt && file2c 'u_char dflt_font_16[16*256] = {' '};' < ${SC_DFLT_FONT}-8x16 > font.h && uudecode < ${SRCTOP}/share/syscons/fonts/${SC_DFLT_FONT}-8x14.fnt && file2c 'u_char dflt_font_14[14*256] = {' '};' < ${SC_DFLT_FONT}-8x14 >> font.h && uudecode < ${SRCTOP}/share/syscons/fonts/${SC_DFLT_FONT}-8x8.fnt && file2c 'u_char dflt_font_8[8*256] = {' '};' < ${SC_DFLT_FONT}-8x8 >> font.h"									\
 	no-obj no-implicit-rule before-depend				\
 	clean		"font.h ${SC_DFLT_FONT}-8x14 ${SC_DFLT_FONT}-8x16 ${SC_DFLT_FONT}-8x8"
 snd_fxdiv_gen.h			optional sound				   \
 	dependency	"$S/tools/sound/snd_fxdiv_gen.awk"		   \
 	compile-with	"${AWK} -f $S/tools/sound/snd_fxdiv_gen.awk -- > snd_fxdiv_gen.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"snd_fxdiv_gen.h"
 miidevs.h			optional miibus | mii			   \
 	dependency	"$S/tools/miidevs2h.awk $S/dev/mii/miidevs"	   \
 	compile-with	"${AWK} -f $S/tools/miidevs2h.awk $S/dev/mii/miidevs" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"miidevs.h"
 kbdmuxmap.h			optional	kbdmux_dflt_keymap 	   \
 	compile-with	"${KEYMAP} -L ${KBDMUX_DFLT_KEYMAP} | ${KEYMAP_FIX} > ${.TARGET}" \
 	no-obj no-implicit-rule before-depend				\
 	clean		"kbdmuxmap.h"
 teken_state.h		optional sc | vt				   \
 	dependency	"$S/teken/gensequences $S/teken/sequences" \
 	compile-with	"${AWK} -f $S/teken/gensequences $S/teken/sequences > teken_state.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"teken_state.h"
 ukbdmap.h			optional	ukbd_dflt_keymap	\
 	compile-with	"${KEYMAP} -L ${UKBD_DFLT_KEYMAP} | ${KEYMAP_FIX} > ${.TARGET}" \
 	no-obj no-implicit-rule before-depend				\
 	clean		"ukbdmap.h"
 usbdevs.h			optional usb | hid			   \
 	dependency	"$S/tools/usbdevs2h.awk $S/dev/usb/usbdevs" \
 	compile-with	"${AWK} -f $S/tools/usbdevs2h.awk $S/dev/usb/usbdevs -h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"usbdevs.h"
 usbdevs_data.h			optional usb				   \
 	dependency	"$S/tools/usbdevs2h.awk $S/dev/usb/usbdevs" \
 	compile-with	"${AWK} -f $S/tools/usbdevs2h.awk $S/dev/usb/usbdevs -d" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"usbdevs_data.h"
 sdiodevs.h			optional mmccam				   \
 	dependency	"$S/tools/sdiodevs2h.awk $S/dev/sdio/sdiodevs" \
 	compile-with	"${AWK} -f $S/tools/sdiodevs2h.awk $S/dev/sdio/sdiodevs -h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"sdiodevs.h"
 sdiodevs_data.h			optional mmccam				   \
 	dependency	"$S/tools/sdiodevs2h.awk $S/dev/sdio/sdiodevs" \
 	compile-with	"${AWK} -f $S/tools/sdiodevs2h.awk $S/dev/sdio/sdiodevs -d" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"sdiodevs_data.h"
 cam/cam.c			optional scbus
 cam/cam_compat.c		optional scbus
 cam/cam_iosched.c		optional scbus
 cam/cam_periph.c		optional scbus
 cam/cam_queue.c			optional scbus
 cam/cam_sim.c			optional scbus
 cam/cam_xpt.c			optional scbus
 cam/ata/ata_all.c		optional scbus
 cam/ata/ata_xpt.c		optional scbus
 cam/ata/ata_pmp.c		optional scbus
 cam/nvme/nvme_all.c		optional scbus
 cam/nvme/nvme_da.c		optional nda | da
 cam/nvme/nvme_xpt.c		optional scbus
 cam/scsi/scsi_xpt.c		optional scbus
 cam/scsi/scsi_all.c		optional scbus
 cam/scsi/scsi_cd.c		optional cd
 cam/scsi/scsi_ch.c		optional ch
 cam/ata/ata_da.c		optional ada | da
 cam/ctl/ctl.c			optional ctl
 cam/ctl/ctl_backend.c		optional ctl
 cam/ctl/ctl_backend_block.c	optional ctl
 cam/ctl/ctl_backend_ramdisk.c	optional ctl
 cam/ctl/ctl_cmd_table.c		optional ctl
 cam/ctl/ctl_frontend.c		optional ctl
 cam/ctl/ctl_frontend_cam_sim.c	optional ctl
 cam/ctl/ctl_frontend_ioctl.c	optional ctl
 cam/ctl/ctl_frontend_iscsi.c	optional ctl cfiscsi
 cam/ctl/ctl_ha.c		optional ctl
 cam/ctl/ctl_scsi_all.c		optional ctl
 cam/ctl/ctl_tpc.c		optional ctl
 cam/ctl/ctl_tpc_local.c		optional ctl
 cam/ctl/ctl_error.c		optional ctl
 cam/ctl/ctl_util.c		optional ctl
 cam/ctl/scsi_ctl.c		optional ctl
 cam/mmc/mmc_xpt.c		optional scbus mmccam
 cam/mmc/mmc_sim.c		optional scbus mmccam
 cam/mmc/mmc_sim_if.m		optional scbus mmccam
 cam/mmc/mmc_da.c		optional scbus mmccam da
 cam/scsi/scsi_da.c		optional da
 cam/scsi/scsi_pass.c		optional pass
 cam/scsi/scsi_pt.c		optional pt
 cam/scsi/scsi_sa.c		optional sa
 cam/scsi/scsi_enc.c		optional ses
 cam/scsi/scsi_enc_ses.c		optional ses
 cam/scsi/scsi_enc_safte.c	optional ses
 cam/scsi/scsi_sg.c		optional sg
 cam/scsi/scsi_targ_bh.c		optional targbh
 cam/scsi/scsi_target.c		optional targ
 cam/scsi/smp_all.c		optional scbus
 
 # shared between zfs and dtrace
 cddl/compat/opensolaris/kern/opensolaris.c		optional dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_proc.c		optional zfs | dtrace compile-with "${CDDL_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_misc.c		optional zfs | dtrace compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_cmn_err.c		optional zfs | dtrace compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_taskq.c		optional zfs | dtrace compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_kmem.c		optional zfs | dtrace compile-with "${ZFS_C}"
 
 #zfs solaris portability layer
 contrib/openzfs/module/os/freebsd/spl/acl_common.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/callb.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/list.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_acl.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_dtrace.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_kstat.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_policy.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_procfs_list.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_string.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_sunddi.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_sysevent.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_uio.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_vfs.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_vm.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_zlib.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/spl/spl_zone.c		optional zfs compile-with "${ZFS_C}"
 
 
 
 # zfs specific
 
 #zfs avl
 contrib/openzfs/module/avl/avl.c				optional zfs compile-with "${ZFS_C}"
 
 # zfs lua support
 contrib/openzfs/module/lua/lapi.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lauxlib.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lbaselib.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lcode.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lcompat.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lcorolib.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lctype.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/ldebug.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/ldo.c			optional zfs compile-with "${ZFS_C} ${NO_WINFINITE_RECURSION}"
 contrib/openzfs/module/lua/lfunc.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lgc.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/llex.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lmem.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lobject.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lopcodes.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lparser.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lstate.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lstring.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lstrlib.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/ltable.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/ltablib.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/ltm.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lvm.c			optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/lua/lzio.c			optional zfs compile-with "${ZFS_C}"
 
 # zfs nvpair support
 contrib/openzfs/module/nvpair/fnvpair.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/nvpair/nvpair.c		optional zfs compile-with "${ZFS_RPC_C} ${NO_WSTRINGOP_OVERREAD}"
 contrib/openzfs/module/nvpair/nvpair_alloc_fixed.c	optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/nvpair/nvpair_alloc_spl.c	optional zfs compile-with "${ZFS_C}"
 
 #zfs platform compatibility code
 contrib/openzfs/module/os/freebsd/zfs/abd_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/arc_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/crypto_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/dmu_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/event_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/hkdf.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/kmod_core.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/spa_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/sysctl_os.c		optional zfs compile-with "${ZFS_C}  -include $S/modules/zfs/zfs_config.h"
 contrib/openzfs/module/os/freebsd/zfs/vdev_file.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/vdev_label_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/vdev_geom.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_acl.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_ctldir.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_debug.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_dir.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_file_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_ioctl_compat.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_ioctl_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_racct.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_vfsops.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_vnops_os.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zfs_znode.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zio_crypt.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/os/freebsd/zfs/zvol_os.c		optional zfs compile-with "${ZFS_C}"
 
 #zfs unicode support
 contrib/openzfs/module/unicode/uconv.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/unicode/u8_textprep.c		optional zfs compile-with "${ZFS_C}"
 
 #zfs checksums / zcommon
 contrib/openzfs/module/zcommon/cityhash.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfeature_common.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_comutil.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_deleg.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_fletcher.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_fletcher_superscalar.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_fletcher_superscalar4.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_namecheck.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zfs_prop.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zpool_prop.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zcommon/zprop_common.c		optional zfs compile-with "${ZFS_C}"
 
 # zfs edon-r hash support
 contrib/openzfs/module/icp/algs/edonr/edonr.c		optional zfs compile-with "${ZFS_C}"
 
 # zfs blake3 hash support
 contrib/openzfs/module/icp/algs/blake3/blake3.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/icp/algs/blake3/blake3_generic.c	optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/icp/algs/blake3/blake3_impl.c	optional zfs compile-with "${ZFS_C}"
 
 # zfs sha2 hash support
 contrib/openzfs/module/icp/algs/sha2/sha2_generic.c	optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/icp/algs/sha2/sha256_impl.c	optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/icp/algs/sha2/sha512_impl.c	optional zfs compile-with "${ZFS_C}"
 
 #zfs core common code
 contrib/openzfs/module/zfs/abd.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/aggsum.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/arc.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/blake3_zfs.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/blkptr.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/bplist.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/bpobj.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/bptree.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/brt.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/btree.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/bqueue.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dbuf.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dbuf_stats.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dataset_kstats.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/ddt.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/ddt_zap.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_diff.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_object.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_objset.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_recv.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_redact.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_send.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_traverse.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_tx.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dmu_zfetch.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dnode.c		optional zfs compile-with "${ZFS_C} ${NO_WUNUSED_BUT_SET_VARIABLE}" \
 	warning "kernel contains CDDL licensed ZFS filesystem"
 contrib/openzfs/module/zfs/dnode_sync.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_bookmark.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_crypt.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_dataset.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_deadlist.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_deleg.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_destroy.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_dir.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_pool.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_prop.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_scan.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_synctask.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/dsl_userhold.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/edonr_zfs.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/fm.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/gzip.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/lzjb.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/lz4.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/lz4_zfs.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/metaslab.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/mmp.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/multilist.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/objlist.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/pathname.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/range_tree.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/refcount.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/rrwlock.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/sa.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/sha2_zfs.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/skein_zfs.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_checkpoint.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_config.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_errlog.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_history.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_log_spacemap.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_misc.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/spa_stats.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/space_map.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/space_reftree.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/txg.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/uberblock.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/unique.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_cache.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_draid.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_draid_rand.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_indirect.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_indirect_births.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_indirect_mapping.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_initialize.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_label.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_mirror.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_missing.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_queue.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_raidz.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_raidz_math.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_raidz_math_scalar.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_rebuild.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_removal.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_root.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/vdev_trim.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zap.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zap_leaf.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zap_micro.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zcp.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zcp_get.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zcp_global.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zcp_iter.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zcp_set.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zcp_synctask.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfeature.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_byteswap.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_chksum.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_fm.c		optional zfs compile-with "${ZFS_C} ${NO_WUNUSED_BUT_SET_VARIABLE}"
 contrib/openzfs/module/zfs/zfs_fuid.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_impl.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_ioctl.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_log.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_onexit.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_quota.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_ratelimit.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_replay.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_rlock.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_sa.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zfs_vnops.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zstd/zfs_zstd.c		optional zfs zstdio compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zil.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zio.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zio_checksum.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zio_compress.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zio_inject.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zle.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zrlock.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zthr.c		optional zfs compile-with "${ZFS_C}"
 contrib/openzfs/module/zfs/zvol.c		optional zfs compile-with "${ZFS_C}"
 
 # dtrace specific
 cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c	optional dtrace compile-with "${DTRACE_C}" \
 							warning "kernel contains CDDL licensed DTRACE"
 cddl/contrib/opensolaris/uts/common/dtrace/dtrace_xoroshiro128_plus.c	optional dtrace compile-with "${DTRACE_C}"
 cddl/dev/dtmalloc/dtmalloc.c		optional dtmalloc        | dtraceall compile-with "${CDDL_C}"
 cddl/dev/profile/profile.c		optional dtrace_profile  | dtraceall compile-with "${CDDL_C}"
 cddl/dev/sdt/sdt.c			optional dtrace_sdt      | dtraceall compile-with "${CDDL_C}"
 cddl/dev/fbt/fbt.c			optional dtrace_fbt      | dtraceall compile-with "${FBT_C}"
 cddl/dev/systrace/systrace.c		optional dtrace_systrace | dtraceall compile-with "${CDDL_C}"
 cddl/dev/prototype.c			optional dtrace_prototype | dtraceall compile-with "${CDDL_C}"
 fs/nfsclient/nfs_clkdtrace.c		optional dtnfscl nfscl   | dtraceall nfscl compile-with "${CDDL_C}"
 compat/freebsd32/freebsd32_abort2.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_capability.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_ioctl.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_misc.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_syscalls.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_sysent.c	optional compat_freebsd32
 contrib/ck/src/ck_array.c				standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_centralized.c			standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_combining.c			standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_dissemination.c		standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_mcs.c				standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_tournament.c			standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_epoch.c				standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_hp.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_hs.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_ht.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_rhs.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/dev/acpica/common/ahids.c			optional acpi acpi_debug
 contrib/dev/acpica/common/ahuuids.c			optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbcmds.c		optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbconvert.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbdisply.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbexec.c		optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbhistry.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbinput.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbmethod.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbnames.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbobject.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbstats.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbtest.c		optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbutils.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbxface.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmbuffer.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmcstyle.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmdeferred.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmnames.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmopcode.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrc.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrcl.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrcl2.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrcs.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmutils.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmwalk.c	optional acpi acpi_debug
 contrib/dev/acpica/components/dispatcher/dsargs.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dscontrol.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsdebug.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsfield.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsinit.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsmethod.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsmthdat.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsobject.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsopcode.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dspkginit.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsutils.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswexec.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswload.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswload2.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswscope.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswstate.c	optional acpi
 contrib/dev/acpica/components/events/evevent.c		optional acpi
 contrib/dev/acpica/components/events/evglock.c		optional acpi
 contrib/dev/acpica/components/events/evgpe.c		optional acpi
 contrib/dev/acpica/components/events/evgpeblk.c		optional acpi
 contrib/dev/acpica/components/events/evgpeinit.c	optional acpi
 contrib/dev/acpica/components/events/evgpeutil.c	optional acpi
 contrib/dev/acpica/components/events/evhandler.c	optional acpi
 contrib/dev/acpica/components/events/evmisc.c		optional acpi
 contrib/dev/acpica/components/events/evregion.c		optional acpi
 contrib/dev/acpica/components/events/evrgnini.c		optional acpi
 contrib/dev/acpica/components/events/evsci.c		optional acpi
 contrib/dev/acpica/components/events/evxface.c		optional acpi
 contrib/dev/acpica/components/events/evxfevnt.c		optional acpi
 contrib/dev/acpica/components/events/evxfgpe.c		optional acpi
 contrib/dev/acpica/components/events/evxfregn.c		optional acpi
 contrib/dev/acpica/components/executer/exconcat.c	optional acpi
 contrib/dev/acpica/components/executer/exconfig.c	optional acpi
 contrib/dev/acpica/components/executer/exconvrt.c	optional acpi
 contrib/dev/acpica/components/executer/excreate.c	optional acpi
 contrib/dev/acpica/components/executer/exdebug.c	optional acpi
 contrib/dev/acpica/components/executer/exdump.c		optional acpi
 contrib/dev/acpica/components/executer/exfield.c	optional acpi
 contrib/dev/acpica/components/executer/exfldio.c	optional acpi
 contrib/dev/acpica/components/executer/exmisc.c		optional acpi
 contrib/dev/acpica/components/executer/exmutex.c	optional acpi
 contrib/dev/acpica/components/executer/exnames.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg1.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg2.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg3.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg6.c	optional acpi
 contrib/dev/acpica/components/executer/exprep.c		optional acpi
 contrib/dev/acpica/components/executer/exregion.c	optional acpi
 contrib/dev/acpica/components/executer/exresnte.c	optional acpi
 contrib/dev/acpica/components/executer/exresolv.c	optional acpi
 contrib/dev/acpica/components/executer/exresop.c	optional acpi
 contrib/dev/acpica/components/executer/exserial.c	optional acpi
 contrib/dev/acpica/components/executer/exstore.c	optional acpi
 contrib/dev/acpica/components/executer/exstoren.c	optional acpi
 contrib/dev/acpica/components/executer/exstorob.c	optional acpi
 contrib/dev/acpica/components/executer/exsystem.c	optional acpi
 contrib/dev/acpica/components/executer/extrace.c	optional acpi
 contrib/dev/acpica/components/executer/exutils.c	optional acpi
 contrib/dev/acpica/components/hardware/hwacpi.c		optional acpi
 contrib/dev/acpica/components/hardware/hwesleep.c	optional acpi
 contrib/dev/acpica/components/hardware/hwgpe.c		optional acpi
 contrib/dev/acpica/components/hardware/hwpci.c		optional acpi
 contrib/dev/acpica/components/hardware/hwregs.c		optional acpi
 contrib/dev/acpica/components/hardware/hwsleep.c	optional acpi
 contrib/dev/acpica/components/hardware/hwtimer.c	optional acpi
 contrib/dev/acpica/components/hardware/hwvalid.c	optional acpi
 contrib/dev/acpica/components/hardware/hwxface.c	optional acpi
 contrib/dev/acpica/components/hardware/hwxfsleep.c	optional acpi
 contrib/dev/acpica/components/namespace/nsaccess.c	optional acpi \
 	compile-with "${NORMAL_C} ${NO_WUNUSED_BUT_SET_VARIABLE}"
 contrib/dev/acpica/components/namespace/nsalloc.c	optional acpi
 contrib/dev/acpica/components/namespace/nsarguments.c	optional acpi
 contrib/dev/acpica/components/namespace/nsconvert.c	optional acpi
 contrib/dev/acpica/components/namespace/nsdump.c	optional acpi
 contrib/dev/acpica/components/namespace/nseval.c	optional acpi
 contrib/dev/acpica/components/namespace/nsinit.c	optional acpi
 contrib/dev/acpica/components/namespace/nsload.c	optional acpi
 contrib/dev/acpica/components/namespace/nsnames.c	optional acpi
 contrib/dev/acpica/components/namespace/nsobject.c	optional acpi
 contrib/dev/acpica/components/namespace/nsparse.c	optional acpi
 contrib/dev/acpica/components/namespace/nspredef.c	optional acpi
 contrib/dev/acpica/components/namespace/nsprepkg.c	optional acpi
 contrib/dev/acpica/components/namespace/nsrepair.c	optional acpi
 contrib/dev/acpica/components/namespace/nsrepair2.c	optional acpi
 contrib/dev/acpica/components/namespace/nssearch.c	optional acpi
 contrib/dev/acpica/components/namespace/nsutils.c	optional acpi
 contrib/dev/acpica/components/namespace/nswalk.c	optional acpi
 contrib/dev/acpica/components/namespace/nsxfeval.c	optional acpi
 contrib/dev/acpica/components/namespace/nsxfname.c	optional acpi
 contrib/dev/acpica/components/namespace/nsxfobj.c	optional acpi
 contrib/dev/acpica/components/parser/psargs.c		optional acpi
 contrib/dev/acpica/components/parser/psloop.c		optional acpi
 contrib/dev/acpica/components/parser/psobject.c		optional acpi
 contrib/dev/acpica/components/parser/psopcode.c		optional acpi
 contrib/dev/acpica/components/parser/psopinfo.c		optional acpi
 contrib/dev/acpica/components/parser/psparse.c		optional acpi
 contrib/dev/acpica/components/parser/psscope.c		optional acpi
 contrib/dev/acpica/components/parser/pstree.c		optional acpi
 contrib/dev/acpica/components/parser/psutils.c		optional acpi
 contrib/dev/acpica/components/parser/pswalk.c		optional acpi
 contrib/dev/acpica/components/parser/psxface.c		optional acpi
 contrib/dev/acpica/components/resources/rsaddr.c	optional acpi
 contrib/dev/acpica/components/resources/rscalc.c	optional acpi
 contrib/dev/acpica/components/resources/rscreate.c	optional acpi
 contrib/dev/acpica/components/resources/rsdump.c	optional acpi acpi_debug
 contrib/dev/acpica/components/resources/rsdumpinfo.c	optional acpi
 contrib/dev/acpica/components/resources/rsinfo.c	optional acpi
 contrib/dev/acpica/components/resources/rsio.c		optional acpi
 contrib/dev/acpica/components/resources/rsirq.c		optional acpi
 contrib/dev/acpica/components/resources/rslist.c	optional acpi
 contrib/dev/acpica/components/resources/rsmemory.c	optional acpi
 contrib/dev/acpica/components/resources/rsmisc.c	optional acpi
 contrib/dev/acpica/components/resources/rsserial.c	optional acpi
 contrib/dev/acpica/components/resources/rsutils.c	optional acpi
 contrib/dev/acpica/components/resources/rsxface.c	optional acpi
 contrib/dev/acpica/components/tables/tbdata.c		optional acpi
 contrib/dev/acpica/components/tables/tbfadt.c		optional acpi
 contrib/dev/acpica/components/tables/tbfind.c		optional acpi
 contrib/dev/acpica/components/tables/tbinstal.c		optional acpi
 contrib/dev/acpica/components/tables/tbprint.c		optional acpi
 contrib/dev/acpica/components/tables/tbutils.c		optional acpi
 contrib/dev/acpica/components/tables/tbxface.c		optional acpi
 contrib/dev/acpica/components/tables/tbxfload.c		optional acpi
 contrib/dev/acpica/components/tables/tbxfroot.c		optional acpi
 contrib/dev/acpica/components/utilities/utaddress.c	optional acpi
 contrib/dev/acpica/components/utilities/utalloc.c	optional acpi
 contrib/dev/acpica/components/utilities/utascii.c	optional acpi
 contrib/dev/acpica/components/utilities/utbuffer.c	optional acpi
 contrib/dev/acpica/components/utilities/utcache.c	optional acpi
 contrib/dev/acpica/components/utilities/utcksum.c	optional acpi
 contrib/dev/acpica/components/utilities/utcopy.c	optional acpi
 contrib/dev/acpica/components/utilities/utdebug.c	optional acpi
 contrib/dev/acpica/components/utilities/utdecode.c	optional acpi
 contrib/dev/acpica/components/utilities/utdelete.c	optional acpi
 contrib/dev/acpica/components/utilities/uterror.c	optional acpi
 contrib/dev/acpica/components/utilities/uteval.c	optional acpi
 contrib/dev/acpica/components/utilities/utexcep.c	optional acpi
 contrib/dev/acpica/components/utilities/utglobal.c	optional acpi
 contrib/dev/acpica/components/utilities/uthex.c		optional acpi
 contrib/dev/acpica/components/utilities/utids.c		optional acpi
 contrib/dev/acpica/components/utilities/utinit.c	optional acpi
 contrib/dev/acpica/components/utilities/utlock.c	optional acpi
 contrib/dev/acpica/components/utilities/utmath.c	optional acpi
 contrib/dev/acpica/components/utilities/utmisc.c	optional acpi
 contrib/dev/acpica/components/utilities/utmutex.c	optional acpi
 contrib/dev/acpica/components/utilities/utnonansi.c	optional acpi
 contrib/dev/acpica/components/utilities/utobject.c	optional acpi
 contrib/dev/acpica/components/utilities/utosi.c		optional acpi
 contrib/dev/acpica/components/utilities/utownerid.c	optional acpi
 contrib/dev/acpica/components/utilities/utpredef.c	optional acpi
 contrib/dev/acpica/components/utilities/utresdecode.c	optional acpi acpi_debug
 contrib/dev/acpica/components/utilities/utresrc.c	optional acpi
 contrib/dev/acpica/components/utilities/utstate.c	optional acpi
 contrib/dev/acpica/components/utilities/utstring.c	optional acpi
 contrib/dev/acpica/components/utilities/utstrsuppt.c	optional acpi
 contrib/dev/acpica/components/utilities/utstrtoul64.c	optional acpi
 contrib/dev/acpica/components/utilities/utuuid.c	optional acpi acpi_debug
 contrib/dev/acpica/components/utilities/utxface.c	optional acpi
 contrib/dev/acpica/components/utilities/utxferror.c	optional acpi
 contrib/dev/acpica/components/utilities/utxfinit.c	optional acpi
 contrib/dev/acpica/os_specific/service_layers/osgendbg.c	optional acpi acpi_debug
 netpfil/ipfilter/netinet/fil.c	optional ipfilter inet \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_auth.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_fil_freebsd.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_frag.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_log.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_nat.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_proxy.c optional ipfilter inet \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_state.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_lookup.c optional ipfilter inet \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN} -Wno-unused -Wno-error -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_pool.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_htable.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter ${NO_WTAUTOLOGICAL_POINTER_COMPARE}"
 netpfil/ipfilter/netinet/ip_sync.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/mlfk_ipl.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_nat6.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_rules.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_scan.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/ip_dstlist.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/netpfil/ipfilter"
 netpfil/ipfilter/netinet/radix_ipf.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/netpfil/ipfilter"
 contrib/libfdt/fdt.c		optional fdt
 contrib/libfdt/fdt_ro.c		optional fdt
 contrib/libfdt/fdt_rw.c		optional fdt
 contrib/libfdt/fdt_strerror.c	optional fdt
 contrib/libfdt/fdt_sw.c		optional fdt
 contrib/libfdt/fdt_wip.c	optional fdt
 contrib/libnv/cnvlist.c		standard
 contrib/libnv/dnvlist.c		standard
 contrib/libnv/nvlist.c		standard
 contrib/libnv/bsd_nvpair.c		standard
 # xz
 dev/xz/xz_mod.c	optional xz \
 	compile-with "${NORMAL_C} -DXZ_USE_CRC64 -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_crc32.c	optional xz \
 	compile-with "${NORMAL_C} -DXZ_USE_CRC64 -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_crc64.c	optional xz \
 	compile-with "${NORMAL_C} -DXZ_USE_CRC64 -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_dec_bcj.c	optional xz \
 	compile-with "${NORMAL_C} -DXZ_USE_CRC64 -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_dec_lzma2.c	optional xz \
 	compile-with "${NORMAL_C} -DXZ_USE_CRC64 -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_dec_stream.c optional xz \
 	compile-with "${NORMAL_C} -DXZ_USE_CRC64 -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 # Zstd
 contrib/zstd/lib/freebsd/zstd_kmalloc.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/common/zstd_common.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/common/fse_decompress.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/common/entropy_common.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/common/error_private.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/common/xxhash.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_compress.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_compress_literals.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_compress_sequences.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_compress_superblock.c	optional zstdio compile-with "${ZSTD_C} ${NO_WUNUSED_BUT_SET_VARIABLE}"
 contrib/zstd/lib/compress/fse_compress.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/hist.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/huf_compress.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_double_fast.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_fast.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_lazy.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_ldm.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/compress/zstd_opt.c		optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/decompress/zstd_ddict.c	optional zstdio compile-with ${ZSTD_C}
 contrib/zstd/lib/decompress/zstd_decompress.c	optional zstdio compile-with ${ZSTD_C}
 # See comment in sys/conf/kern.pre.mk
 contrib/zstd/lib/decompress/zstd_decompress_block.c	optional zstdio \
 	compile-with "${ZSTD_C} ${ZSTD_DECOMPRESS_BLOCK_FLAGS}"
 contrib/zstd/lib/decompress/huf_decompress.c	optional zstdio compile-with "${ZSTD_C} ${NO_WBITWISE_INSTEAD_OF_LOGICAL}"
 # Blake 2
 contrib/libb2/blake2b-ref.c	optional crypto | !random_loadable random_fenestrasx \
 	compile-with "${NORMAL_C} -I$S/crypto/blake2 -Wno-cast-qual -DSUFFIX=_ref -Wno-unused-function"
 contrib/libb2/blake2s-ref.c	optional crypto \
 	compile-with "${NORMAL_C} -I$S/crypto/blake2 -Wno-cast-qual -DSUFFIX=_ref -Wno-unused-function"
 crypto/blake2/blake2-sw.c	optional crypto \
 	compile-with "${NORMAL_C} -I$S/crypto/blake2 -Wno-cast-qual"
 crypto/camellia/camellia.c	optional crypto
 crypto/camellia/camellia-api.c	optional crypto
 crypto/chacha20/chacha.c	standard
 crypto/chacha20/chacha-sw.c	optional crypto
 crypto/chacha20_poly1305.c	optional crypto
 crypto/curve25519.c		optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include -I$S/crypto/libsodium"
 crypto/des/des_ecb.c		optional netsmb
 crypto/des/des_setkey.c		optional netsmb
 crypto/openssl/ossl.c		optional ossl
 crypto/openssl/ossl_aes.c	optional ossl
 crypto/openssl/ossl_chacha20.c	optional ossl
 crypto/openssl/ossl_poly1305.c	optional ossl
 crypto/openssl/ossl_sha1.c	optional ossl
 crypto/openssl/ossl_sha256.c	optional ossl
 crypto/openssl/ossl_sha512.c	optional ossl
 crypto/rc4/rc4.c		optional netgraph_mppc_encryption
 crypto/rijndael/rijndael-alg-fst.c optional crypto | ekcd | geom_bde | \
 	!random_loadable | wlan_ccmp
 crypto/rijndael/rijndael-api-fst.c optional ekcd | geom_bde | !random_loadable
 crypto/rijndael/rijndael-api.c	optional crypto | wlan_ccmp
 crypto/sha1.c			optional carp | crypto | ether | \
 	netgraph_mppc_encryption | sctp
 crypto/sha2/sha256c.c		optional crypto | ekcd | geom_bde | \
 	!random_loadable | sctp | zfs
 crypto/sha2/sha512c.c		optional crypto | geom_bde | zfs
 crypto/skein/skein.c		optional crypto | zfs
 crypto/skein/skein_block.c	optional crypto | zfs
 crypto/siphash/siphash.c	optional inet | inet6 | wg
 crypto/siphash/siphash_test.c	optional inet | inet6 | wg
 ddb/db_access.c			optional ddb
 ddb/db_break.c			optional ddb
 ddb/db_capture.c		optional ddb
 ddb/db_command.c		optional ddb
 ddb/db_examine.c		optional ddb
 ddb/db_expr.c			optional ddb
 ddb/db_input.c			optional ddb
 ddb/db_lex.c			optional ddb
 ddb/db_main.c			optional ddb
 ddb/db_output.c			optional ddb
 ddb/db_print.c			optional ddb
 ddb/db_ps.c			optional ddb
 ddb/db_run.c			optional ddb
 ddb/db_script.c			optional ddb
 ddb/db_sym.c			optional ddb
 ddb/db_thread.c			optional ddb
 ddb/db_textdump.c		optional ddb
 ddb/db_variables.c		optional ddb
 ddb/db_watch.c			optional ddb
 ddb/db_write_cmd.c		optional ddb
 dev/aac/aac.c			optional aac
 dev/aac/aac_cam.c		optional aacp aac
 dev/aac/aac_debug.c		optional aac
 dev/aac/aac_disk.c		optional aac
 dev/aac/aac_pci.c		optional aac pci
 dev/aacraid/aacraid.c		optional aacraid
 dev/aacraid/aacraid_cam.c	optional aacraid scbus
 dev/aacraid/aacraid_debug.c	optional aacraid
 dev/aacraid/aacraid_pci.c	optional aacraid pci
 dev/acpi_support/acpi_wmi.c	optional acpi_wmi acpi
 dev/acpi_support/acpi_asus.c	optional acpi_asus acpi
 dev/acpi_support/acpi_asus_wmi.c	optional acpi_asus_wmi acpi
 dev/acpi_support/acpi_fujitsu.c	optional acpi_fujitsu acpi
 dev/acpi_support/acpi_hp.c	optional acpi_hp acpi
 dev/acpi_support/acpi_ibm.c	optional acpi_ibm acpi
 dev/acpi_support/acpi_panasonic.c optional acpi_panasonic acpi
 dev/acpi_support/acpi_sony.c	optional acpi_sony acpi
 dev/acpi_support/acpi_toshiba.c	optional acpi_toshiba acpi
 dev/acpi_support/atk0110.c	optional aibs acpi
 dev/acpica/Osd/OsdDebug.c	optional acpi
 dev/acpica/Osd/OsdHardware.c	optional acpi
 dev/acpica/Osd/OsdInterrupt.c	optional acpi
 dev/acpica/Osd/OsdMemory.c	optional acpi
 dev/acpica/Osd/OsdSchedule.c	optional acpi
 dev/acpica/Osd/OsdStream.c	optional acpi
 dev/acpica/Osd/OsdSynch.c	optional acpi
 dev/acpica/Osd/OsdTable.c	optional acpi
 dev/acpica/acpi.c		optional acpi
 dev/acpica/acpi_acad.c		optional acpi
 dev/acpica/acpi_apei.c		optional acpi
 dev/acpica/acpi_battery.c	optional acpi
 dev/acpica/acpi_button.c	optional acpi
 dev/acpica/acpi_cmbat.c		optional acpi
 dev/acpica/acpi_cpu.c		optional acpi
 dev/acpica/acpi_ec.c		optional acpi
 dev/acpica/acpi_ged.c		optional acpi_ged acpi
 dev/acpica/acpi_isab.c		optional acpi isa
 dev/acpica/acpi_lid.c		optional acpi
 dev/acpica/acpi_package.c	optional acpi
 dev/acpica/acpi_perf.c		optional acpi
 dev/acpica/acpi_powerres.c	optional acpi
 dev/acpica/acpi_quirk.c		optional acpi
 dev/acpica/acpi_resource.c	optional acpi
 dev/acpica/acpi_container.c	optional acpi
 dev/acpica/acpi_smbat.c		optional acpi
 dev/acpica/acpi_thermal.c	optional acpi
 dev/acpica/acpi_throttle.c	optional acpi
 dev/acpica/acpi_video.c		optional acpi_video acpi
 dev/acpica/acpi_dock.c		optional acpi_dock acpi
 dev/adlink/adlink.c		optional adlink
 dev/ae/if_ae.c			optional ae pci
 dev/age/if_age.c		optional age pci
 dev/agp/agp.c			optional agp pci
 dev/agp/agp_if.m		optional agp pci
 dev/ahci/ahci.c			optional ahci
 dev/ahci/ahciem.c		optional ahci
 dev/ahci/ahci_pci.c		optional ahci pci
 dev/aic7xxx/ahc_isa.c		optional ahc isa
 dev/aic7xxx/ahc_pci.c		optional ahc pci \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/aic7xxx/ahd_pci.c		optional ahd pci \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/aic7xxx/aic7770.c		optional ahc
 dev/aic7xxx/aic79xx.c		optional ahd pci
 dev/aic7xxx/aic79xx_osm.c	optional ahd pci
 dev/aic7xxx/aic79xx_pci.c	optional ahd pci
 dev/aic7xxx/aic79xx_reg_print.c	optional ahd pci ahd_reg_pretty_print
 dev/aic7xxx/aic7xxx.c		optional ahc
 dev/aic7xxx/aic7xxx_93cx6.c	optional ahc
 dev/aic7xxx/aic7xxx_osm.c	optional ahc
 dev/aic7xxx/aic7xxx_pci.c	optional ahc pci
 dev/aic7xxx/aic7xxx_reg_print.c	optional ahc ahc_reg_pretty_print
 dev/al_eth/al_eth.c				optional al_eth	fdt	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 dev/al_eth/al_init_eth_lm.c			optional al_eth	fdt	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 dev/al_eth/al_init_eth_kr.c			optional al_eth	fdt	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_iofic.c		optional al_iofic	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_serdes_25g.c		optional al_serdes	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_serdes_hssp.c		optional al_serdes	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_config.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_debug.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_iofic.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_main.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/al_serdes.c			optional al_serdes	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/eth/al_hal_eth_kr.c		optional al_eth		\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 contrib/alpine-hal/eth/al_hal_eth_main.c	optional al_eth		\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 dev/alc/if_alc.c		optional alc pci
 dev/ale/if_ale.c		optional ale pci
 dev/alpm/alpm.c			optional alpm pci
 dev/altera/avgen/altera_avgen.c		optional altera_avgen
 dev/altera/avgen/altera_avgen_fdt.c	optional altera_avgen fdt
 dev/altera/avgen/altera_avgen_nexus.c	optional altera_avgen
 dev/altera/msgdma/msgdma.c		optional altera_msgdma xdma
 dev/altera/sdcard/altera_sdcard.c	optional altera_sdcard
 dev/altera/sdcard/altera_sdcard_disk.c	optional altera_sdcard
 dev/altera/sdcard/altera_sdcard_io.c	optional altera_sdcard
 dev/altera/sdcard/altera_sdcard_fdt.c	optional altera_sdcard fdt
 dev/altera/sdcard/altera_sdcard_nexus.c	optional altera_sdcard
 dev/altera/softdma/softdma.c	optional altera_softdma xdma fdt
 dev/altera/pio/pio.c		optional altera_pio
 dev/altera/pio/pio_if.m		optional altera_pio
 dev/amdpm/amdpm.c		optional amdpm pci | nfpm pci
 dev/amdsmb/amdsmb.c		optional amdsmb pci
 #
 dev/ata/ata_if.m		optional ata | atacore
 dev/ata/ata-all.c		optional ata | atacore
 dev/ata/ata-dma.c		optional ata | atacore
 dev/ata/ata-lowlevel.c		optional ata | atacore
 dev/ata/ata-sata.c		optional ata | atacore
 dev/ata/ata-isa.c		optional ata isa | ataisa
 dev/ata/ata-pci.c		optional ata pci | atapci
 dev/ata/chipsets/ata-acard.c	optional ata pci | ataacard
 dev/ata/chipsets/ata-acerlabs.c	optional ata pci | ataacerlabs
 dev/ata/chipsets/ata-amd.c	optional ata pci | ataamd
 dev/ata/chipsets/ata-ati.c	optional ata pci | ataati
 dev/ata/chipsets/ata-cenatek.c	optional ata pci | atacenatek
 dev/ata/chipsets/ata-cypress.c	optional ata pci | atacypress
 dev/ata/chipsets/ata-cyrix.c	optional ata pci | atacyrix
 dev/ata/chipsets/ata-highpoint.c	optional ata pci | atahighpoint
 dev/ata/chipsets/ata-intel.c	optional ata pci | ataintel
 dev/ata/chipsets/ata-ite.c	optional ata pci | ataite
 dev/ata/chipsets/ata-jmicron.c	optional ata pci | atajmicron
 dev/ata/chipsets/ata-marvell.c	optional ata pci | atamarvell
 dev/ata/chipsets/ata-micron.c	optional ata pci | atamicron
 dev/ata/chipsets/ata-national.c	optional ata pci | atanational
 dev/ata/chipsets/ata-netcell.c	optional ata pci | atanetcell
 dev/ata/chipsets/ata-nvidia.c	optional ata pci | atanvidia
 dev/ata/chipsets/ata-promise.c	optional ata pci | atapromise
 dev/ata/chipsets/ata-serverworks.c	optional ata pci | ataserverworks
 dev/ata/chipsets/ata-siliconimage.c	optional ata pci | atasiliconimage | ataati
 dev/ata/chipsets/ata-sis.c	optional ata pci | atasis
 dev/ata/chipsets/ata-via.c	optional ata pci | atavia
 #
 dev/ath/if_ath_pci.c		optional ath_pci pci \
 	compile-with "${ATH_C}"
 #
 dev/ath/if_ath_ahb.c		optional ath_ahb \
 	compile-with "${ATH_C}"
 #
 dev/ath/if_ath.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_alq.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_beacon.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_btcoex.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_btcoex_mci.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_debug.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_descdma.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_keycache.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_ioctl.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_led.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_lna_div.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_tx.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_tx_edma.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_tx_ht.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_tdma.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_sysctl.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_rx.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_rx_edma.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/if_ath_spectral.c	optional ath \
 	compile-with "${ATH_C}"
 dev/ath/ah_osdep.c		optional ath \
 	compile-with "${ATH_C}"
 #
 dev/ath/ath_hal/ah.c		optional ath \
 	compile-with "${ATH_C}"
 dev/ath/ath_hal/ah_eeprom_v1.c	optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C}"
 dev/ath/ath_hal/ah_eeprom_v3.c	optional ath_hal | ath_ar5211 | ath_ar5212 \
 	compile-with "${ATH_C}"
 dev/ath/ath_hal/ah_eeprom_v14.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 \
 	compile-with "${ATH_C}"
 dev/ath/ath_hal/ah_eeprom_v4k.c \
 	optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C}"
 dev/ath/ath_hal/ah_eeprom_9287.c \
 	optional ath_hal | ath_ar9287 \
 	compile-with "${ATH_C}"
 dev/ath/ath_hal/ah_regdomain.c	optional ath \
 	compile-with "${ATH_C} ${NO_WSHIFT_COUNT_NEGATIVE} ${NO_WSHIFT_COUNT_OVERFLOW}"
 # ar5210
 dev/ath/ath_hal/ar5210/ar5210_attach.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_beacon.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_interrupts.c	optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_keycache.c	optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_misc.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_phy.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_power.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_recv.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_reset.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_xmit.c		optional ath_hal | ath_ar5210 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar5211
 dev/ath/ath_hal/ar5211/ar5211_attach.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_beacon.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_interrupts.c	optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_keycache.c	optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_misc.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_phy.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_power.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_recv.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_reset.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_xmit.c		optional ath_hal | ath_ar5211 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar5212
 dev/ath/ath_hal/ar5212/ar5212_ani.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_attach.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_beacon.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_eeprom.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_gpio.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_interrupts.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_keycache.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_misc.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_phy.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_power.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_recv.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_reset.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_rfgain.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_xmit.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar5416 (depends on ar5212)
 dev/ath/ath_hal/ar5416/ar5416_ani.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_attach.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_beacon.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_btcoex.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal_iq.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_eeprom.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_gpio.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_interrupts.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_keycache.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_misc.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_phy.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_power.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_radar.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_recv.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_reset.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_spectral.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_xmit.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar9130 (depends upon ar5416) - also requires AH_SUPPORT_AR9130
 #
 # Since this is an embedded MAC SoC, there's no need to compile it into the
 # default HAL.
 dev/ath/ath_hal/ar9001/ar9130_attach.c optional ath_ar9130 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9001/ar9130_phy.c optional ath_ar9130 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9001/ar9130_eeprom.c optional ath_ar9130 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar9160 (depends on ar5416)
 dev/ath/ath_hal/ar9001/ar9160_attach.c optional ath_hal | ath_ar9160 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar9280 (depends on ar5416)
 dev/ath/ath_hal/ar9002/ar9280_attach.c optional ath_hal | ath_ar9280 | \
 	ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9280_olc.c optional ath_hal | ath_ar9280 | \
 	ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar9285 (depends on ar5416 and ar9280)
 dev/ath/ath_hal/ar9002/ar9285_attach.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_btcoex.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_reset.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_cal.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_phy.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_diversity.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 # ar9287 (depends on ar5416)
 dev/ath/ath_hal/ar9002/ar9287_attach.c optional ath_hal | ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287_reset.c optional ath_hal | ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287_cal.c optional ath_hal | ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287_olc.c optional ath_hal | ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 
 # ar9300
 contrib/dev/ath/ath_hal/ar9300/ar9300_ani.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_beacon.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal ${NO_WCONSTANT_CONVERSION}"
 contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_gpio.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_interrupts.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_keycache.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_mci.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_misc.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_paprd.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_phy.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_power.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_radar.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_radio.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_recv.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_recv_ds.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal ${NO_WSOMETIMES_UNINITIALIZED} -Wno-unused-function"
 contrib/dev/ath/ath_hal/ar9300/ar9300_stub.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_spectral.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_timer.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_xmit.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_xmit_ds.c optional ath_hal | ath_ar9300 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 
 # rf backends
 dev/ath/ath_hal/ar5212/ar2316.c	optional ath_rf2316 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar2317.c	optional ath_rf2317 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar2413.c	optional ath_hal | ath_rf2413 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar2425.c	optional ath_hal | ath_rf2425 | ath_rf2417 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5111.c	optional ath_hal | ath_rf5111 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5112.c	optional ath_hal | ath_rf5112 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5413.c	optional ath_hal | ath_rf5413 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar2133.c optional ath_hal | ath_ar5416 | \
 	ath_ar9130 | ath_ar9160 | ath_ar9280 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9280.c optional ath_hal | ath_ar9280 | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285.c optional ath_hal | ath_ar9285 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287.c optional ath_hal | ath_ar9287 \
 	compile-with "${ATH_C} -I$S/dev/ath/ath_hal"
 
 # ath rate control algorithms
 dev/ath/ath_rate/amrr/amrr.c	optional ath_rate_amrr \
 	compile-with "${ATH_C}"
 dev/ath/ath_rate/onoe/onoe.c	optional ath_rate_onoe \
 	compile-with "${ATH_C}"
 dev/ath/ath_rate/sample/sample.c	optional ath_rate_sample \
 	compile-with "${ATH_C}"
 # ath DFS modules
 dev/ath/ath_dfs/null/dfs_null.c	optional ath \
 	compile-with "${ATH_C}"
 #
 dev/backlight/backlight_if.m		optional backlight | compat_linuxkpi
 dev/backlight/backlight.c		optional backlight | compat_linuxkpi
 dev/bce/if_bce.c			optional bce
 dev/bfe/if_bfe.c			optional bfe
 dev/bge/if_bge.c			optional bge
 dev/bhnd/bhnd.c				optional bhnd
 dev/bhnd/bhnd_erom.c			optional bhnd
 dev/bhnd/bhnd_erom_if.m			optional bhnd
 dev/bhnd/bhnd_subr.c			optional bhnd
 dev/bhnd/bhnd_bus_if.m			optional bhnd
 dev/bhnd/bhndb/bhnd_bhndb.c		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb.c			optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_bus_if.m		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_hwdata.c		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_if.m		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_pci.c		optional bhndb_pci bhndb bhnd pci
 dev/bhnd/bhndb/bhndb_pci_hwdata.c 	optional bhndb_pci bhndb bhnd pci
 dev/bhnd/bhndb/bhndb_pci_sprom.c	optional bhndb_pci bhndb bhnd pci
 dev/bhnd/bhndb/bhndb_subr.c		optional bhndb bhnd
 dev/bhnd/bcma/bcma.c			optional bcma bhnd
 dev/bhnd/bcma/bcma_bhndb.c		optional bcma bhnd bhndb
 dev/bhnd/bcma/bcma_erom.c		optional bcma bhnd
 dev/bhnd/bcma/bcma_subr.c		optional bcma bhnd
 dev/bhnd/cores/chipc/bhnd_chipc_if.m	optional bhnd
 dev/bhnd/cores/chipc/bhnd_sprom_chipc.c	optional bhnd
 dev/bhnd/cores/chipc/bhnd_pmu_chipc.c	optional bhnd
 dev/bhnd/cores/chipc/chipc.c		optional bhnd
 dev/bhnd/cores/chipc/chipc_cfi.c	optional bhnd cfi 
 dev/bhnd/cores/chipc/chipc_gpio.c	optional bhnd gpio
 dev/bhnd/cores/chipc/chipc_slicer.c	optional bhnd cfi | bhnd spibus
 dev/bhnd/cores/chipc/chipc_spi.c	optional bhnd spibus
 dev/bhnd/cores/chipc/chipc_subr.c	optional bhnd
 dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl.c	optional bhnd
 dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_if.m	optional bhnd
 dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_hostb_if.m	optional bhnd
 dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c	optional bhnd
 dev/bhnd/cores/pci/bhnd_pci.c		optional bhnd pci
 dev/bhnd/cores/pci/bhnd_pci_hostb.c	optional bhndb bhnd pci
 dev/bhnd/cores/pci/bhnd_pcib.c		optional bhnd_pcib bhnd pci
 dev/bhnd/cores/pcie2/bhnd_pcie2.c	optional bhnd pci
 dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c	optional bhndb bhnd pci
 dev/bhnd/cores/pcie2/bhnd_pcie2b.c	optional bhnd_pcie2b bhnd pci
 dev/bhnd/cores/pmu/bhnd_pmu.c		optional bhnd
 dev/bhnd/cores/pmu/bhnd_pmu_core.c	optional bhnd
 dev/bhnd/cores/pmu/bhnd_pmu_if.m	optional bhnd
 dev/bhnd/cores/pmu/bhnd_pmu_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_bcm.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_bcmraw.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_btxt.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_sprom.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_tlv.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_if.m		optional bhnd
 dev/bhnd/nvram/bhnd_nvram_io.c		optional bhnd
 dev/bhnd/nvram/bhnd_nvram_iobuf.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_ioptr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_iores.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_plist.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_store.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_store_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value_fmts.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value_prf.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_sprom.c		optional bhnd
 dev/bhnd/siba/siba.c			optional siba bhnd
 dev/bhnd/siba/siba_bhndb.c		optional siba bhnd bhndb
 dev/bhnd/siba/siba_erom.c		optional siba bhnd
 dev/bhnd/siba/siba_subr.c		optional siba bhnd
 #
 dev/bnxt/bnxt_hwrm.c		optional bnxt iflib pci
 dev/bnxt/bnxt_mgmt.c		optional bnxt iflib pci
 dev/bnxt/bnxt_sysctl.c		optional bnxt iflib pci
 dev/bnxt/bnxt_txrx.c		optional bnxt iflib pci
 dev/bnxt/if_bnxt.c		optional bnxt iflib pci
 dev/bwi/bwimac.c		optional bwi
 dev/bwi/bwiphy.c		optional bwi
 dev/bwi/bwirf.c			optional bwi
 dev/bwi/if_bwi.c		optional bwi
 dev/bwi/if_bwi_pci.c		optional bwi pci
 dev/bwn/if_bwn.c		optional bwn bhnd
 dev/bwn/if_bwn_pci.c		optional bwn pci bhnd bhndb bhndb_pci
 dev/bwn/if_bwn_phy_common.c	optional bwn bhnd
 dev/bwn/if_bwn_phy_g.c		optional bwn bhnd
 dev/bwn/if_bwn_phy_lp.c		optional bwn bhnd
 dev/bwn/if_bwn_phy_n.c		optional bwn bhnd
 dev/bwn/if_bwn_util.c		optional bwn bhnd
 dev/cadence/if_cgem.c		optional cgem fdt
 dev/cardbus/card_if.m		standard
 dev/cardbus/cardbus.c		optional cardbus
 dev/cardbus/cardbus_cis.c	optional cardbus
 dev/cardbus/cardbus_device.c	optional cardbus
 dev/cardbus/power_if.m		standard
 dev/cas/if_cas.c		optional cas
 dev/cfi/cfi_bus_fdt.c		optional cfi fdt
 dev/cfi/cfi_bus_nexus.c		optional cfi
 dev/cfi/cfi_core.c		optional cfi
 dev/cfi/cfi_dev.c		optional cfi
 dev/cfi/cfi_disk.c		optional cfid
 dev/chromebook_platform/chromebook_platform.c	optional chromebook_platform
 dev/ciss/ciss.c			optional ciss
 dev/cpufreq/ichss.c		optional cpufreq pci
 dev/cxgb/cxgb_main.c		optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/cxgb_sge.c		optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_mc5.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_vsc7323.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_vsc8211.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_ael1002.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_aq100x.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_mv88e1xxx.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_xgmac.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_t3_hw.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_tn1010.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/sys/uipc_mvec.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/cxgb_t3fw.c		optional cxgb cxgb_t3fw \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgbe/t4_clip.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_filter.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_if.m		optional cxgbe pci
 dev/cxgbe/t4_iov.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_mp_ring.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_main.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_netmap.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_sched.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_sge.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_smt.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_l2t.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_tracer.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_vf.c		optional cxgbev pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/common/t4_hw.c	optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/common/t4vf_hw.c	optional cxgbev pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/crypto/t6_kern_tls.c	optional cxgbe pci kern_tls \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/crypto/t4_keyctx.c	optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/cudbg/cudbg_common.c	optional cxgbe \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/cudbg/cudbg_flash_utils.c	optional cxgbe \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/cudbg/cudbg_lib.c	optional cxgbe \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/cudbg/cudbg_wtp.c	optional cxgbe \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/cudbg/fastlz.c	optional cxgbe \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/cudbg/fastlz_api.c	optional cxgbe \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 t4fw_cfg.c		optional cxgbe					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk t4fw_cfg.fw:t4fw_cfg t4fw_cfg_uwire.fw:t4fw_cfg_uwire t4fw.fw:t4fw -mt4fw_cfg -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"t4fw_cfg.c"
 t4fw_cfg.fwo		optional cxgbe					\
 	dependency	"t4fw_cfg.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t4fw_cfg.fwo"
 t4fw_cfg.fw		optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t4fw_cfg.txt"		\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t4fw_cfg.fw"
 t4fw_cfg_uwire.fwo	optional cxgbe					\
 	dependency	"t4fw_cfg_uwire.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t4fw_cfg_uwire.fwo"
 t4fw_cfg_uwire.fw	optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t4fw_cfg_uwire.txt"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t4fw_cfg_uwire.fw"
 t4fw.fwo		optional cxgbe					\
 	dependency	"t4fw.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t4fw.fwo"
 t4fw.fw			optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t4fw-1.27.0.0.bin"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t4fw.fw"
 t5fw_cfg.c		optional cxgbe					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk t5fw_cfg.fw:t5fw_cfg t5fw_cfg_uwire.fw:t5fw_cfg_uwire t5fw.fw:t5fw -mt5fw_cfg -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"t5fw_cfg.c"
 t5fw_cfg.fwo		optional cxgbe					\
 	dependency	"t5fw_cfg.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t5fw_cfg.fwo"
 t5fw_cfg.fw		optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t5fw_cfg.txt"		\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t5fw_cfg.fw"
 t5fw_cfg_uwire.fwo	optional cxgbe					\
 	dependency	"t5fw_cfg_uwire.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t5fw_cfg_uwire.fwo"
 t5fw_cfg_uwire.fw	optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t5fw_cfg_uwire.txt"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t5fw_cfg_uwire.fw"
 t5fw.fwo		optional cxgbe					\
 	dependency	"t5fw.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t5fw.fwo"
 t5fw.fw			optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t5fw-1.27.0.0.bin"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t5fw.fw"
 t6fw_cfg.c		optional cxgbe					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk t6fw_cfg.fw:t6fw_cfg t6fw_cfg_uwire.fw:t6fw_cfg_uwire t6fw.fw:t6fw -mt6fw_cfg -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"t6fw_cfg.c"
 t6fw_cfg.fwo		optional cxgbe					\
 	dependency	"t6fw_cfg.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t6fw_cfg.fwo"
 t6fw_cfg.fw		optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t6fw_cfg.txt"		\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t6fw_cfg.fw"
 t6fw_cfg_uwire.fwo	optional cxgbe					\
 	dependency	"t6fw_cfg_uwire.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t6fw_cfg_uwire.fwo"
 t6fw_cfg_uwire.fw	optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t6fw_cfg_uwire.txt"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t6fw_cfg_uwire.fw"
 t6fw.fwo		optional cxgbe					\
 	dependency	"t6fw.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t6fw.fwo"
 t6fw.fw			optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t6fw-1.27.0.0.bin"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t6fw.fw"
 dev/cxgbe/crypto/t4_crypto.c	optional ccr \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cyapa/cyapa.c		optional cyapa iicbus
 dev/dc/if_dc.c			optional dc pci
 dev/dc/dcphy.c			optional dc pci
 dev/dc/pnphy.c			optional dc pci
 dev/dcons/dcons.c		optional dcons
 dev/dcons/dcons_crom.c		optional dcons_crom
 dev/dcons/dcons_os.c		optional dcons
 dev/dialog/da9063/da9063_if.m	optional da9063_pmic
 dev/dialog/da9063/da9063_iic.c	optional da9063_pmic iicbus fdt
 dev/dialog/da9063/da9063_rtc.c	optional da9063_rtc fdt
 dev/drm2/drm_agpsupport.c	optional drm2
 dev/drm2/drm_auth.c		optional drm2
 dev/drm2/drm_bufs.c		optional drm2
 dev/drm2/drm_buffer.c		optional drm2
 dev/drm2/drm_context.c		optional drm2
 dev/drm2/drm_crtc.c		optional drm2
 dev/drm2/drm_crtc_helper.c	optional drm2
 dev/drm2/drm_dma.c		optional drm2
 dev/drm2/drm_dp_helper.c	optional drm2
 dev/drm2/drm_dp_iic_helper.c	optional drm2
 dev/drm2/drm_drv.c		optional drm2
 dev/drm2/drm_edid.c		optional drm2
 dev/drm2/drm_fb_helper.c	optional drm2
 dev/drm2/drm_fops.c		optional drm2
 dev/drm2/drm_gem.c		optional drm2
 dev/drm2/drm_gem_names.c	optional drm2
 dev/drm2/drm_global.c		optional drm2
 dev/drm2/drm_hashtab.c		optional drm2
 dev/drm2/drm_ioctl.c		optional drm2
 dev/drm2/drm_irq.c		optional drm2
 dev/drm2/drm_linux_list_sort.c	optional drm2
 dev/drm2/drm_lock.c		optional drm2
 dev/drm2/drm_memory.c		optional drm2
 dev/drm2/drm_mm.c		optional drm2
 dev/drm2/drm_modes.c		optional drm2
 dev/drm2/drm_pci.c		optional drm2
 dev/drm2/drm_platform.c		optional drm2
 dev/drm2/drm_scatter.c		optional drm2
 dev/drm2/drm_stub.c		optional drm2
 dev/drm2/drm_sysctl.c		optional drm2
 dev/drm2/drm_vm.c		optional drm2
 dev/drm2/drm_os_freebsd.c	optional drm2
 dev/drm2/ttm/ttm_agp_backend.c	optional drm2
 dev/drm2/ttm/ttm_lock.c		optional drm2
 dev/drm2/ttm/ttm_object.c	optional drm2
 dev/drm2/ttm/ttm_tt.c		optional drm2
 dev/drm2/ttm/ttm_bo_util.c	optional drm2
 dev/drm2/ttm/ttm_bo.c		optional drm2
 dev/drm2/ttm/ttm_bo_manager.c	optional drm2
 dev/drm2/ttm/ttm_execbuf_util.c	optional drm2
 dev/drm2/ttm/ttm_memory.c	optional drm2
 dev/drm2/ttm/ttm_page_alloc.c	optional drm2
 dev/drm2/ttm/ttm_bo_vm.c	optional drm2
 dev/efidev/efidev.c		optional efirt
 dev/efidev/efirt.c		optional efirt
 dev/efidev/efirtc.c		optional efirt
 dev/e1000/if_em.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/em_txrx.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/igb_txrx.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_80003es2lan.c	optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82540.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82541.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82542.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82543.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82571.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82575.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_ich8lan.c	optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_i210.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_api.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_base.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_mac.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_manage.c	optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_nvm.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_phy.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_vf.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_mbx.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_osdep.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/et/if_et.c			optional et
 dev/ena/ena.c			optional ena \
 	compile-with "${NORMAL_C} -I$S/contrib"
 dev/ena/ena_datapath.c		optional ena \
 	compile-with "${NORMAL_C} -I$S/contrib"
 dev/ena/ena_netmap.c		optional ena \
 	compile-with "${NORMAL_C} -I$S/contrib"
 dev/ena/ena_rss.c		optional ena \
 	compile-with "${NORMAL_C} -I$S/contrib"
 dev/ena/ena_sysctl.c 		optional ena \
 	compile-with "${NORMAL_C} -I$S/contrib"
 contrib/ena-com/ena_com.c	optional ena
 contrib/ena-com/ena_eth_com.c	optional ena
 dev/etherswitch/arswitch/arswitch.c		optional arswitch
 dev/etherswitch/arswitch/arswitch_reg.c		optional arswitch
 dev/etherswitch/arswitch/arswitch_phy.c		optional arswitch
 dev/etherswitch/arswitch/arswitch_8216.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_8226.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_8316.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_8327.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_7240.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_9340.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_vlans.c	optional arswitch
 dev/etherswitch/etherswitch.c		optional etherswitch
 dev/etherswitch/etherswitch_if.m	optional etherswitch
 dev/etherswitch/ip17x/ip17x.c		optional ip17x
 dev/etherswitch/ip17x/ip175c.c		optional ip17x
 dev/etherswitch/ip17x/ip175d.c		optional ip17x
 dev/etherswitch/ip17x/ip17x_phy.c	optional ip17x
 dev/etherswitch/ip17x/ip17x_vlans.c	optional ip17x
 dev/etherswitch/miiproxy.c		optional miiproxy
 dev/etherswitch/rtl8366/rtl8366rb.c	optional rtl8366rb
 dev/etherswitch/e6000sw/e6000sw.c	optional e6000sw fdt
 dev/etherswitch/e6000sw/e6060sw.c	optional e6060sw
 dev/etherswitch/infineon/adm6996fc.c	optional adm6996fc
 dev/etherswitch/micrel/ksz8995ma.c	optional ksz8995ma
 dev/etherswitch/ukswitch/ukswitch.c	optional ukswitch
 dev/evdev/cdev.c			optional evdev
 dev/evdev/evdev.c			optional evdev
 dev/evdev/evdev_mt.c			optional evdev
 dev/evdev/evdev_utils.c			optional evdev
 dev/evdev/uinput.c			optional evdev uinput
 dev/exca/exca.c			optional cbb
 dev/extres/clk/clk.c		optional clk
 dev/extres/clk/clkdev_if.m	optional clk
 dev/extres/clk/clknode_if.m	optional clk
 dev/extres/clk/clk_bus.c	optional clk fdt
 dev/extres/clk/clk_div.c	optional clk
 dev/extres/clk/clk_fixed.c	optional clk
 dev/extres/clk/clk_gate.c	optional clk
 dev/extres/clk/clk_link.c	optional clk
 dev/extres/clk/clk_mux.c	optional clk
 dev/extres/phy/phy.c		optional phy
 dev/extres/phy/phydev_if.m	optional phy fdt
 dev/extres/phy/phynode_if.m	optional phy
 dev/extres/phy/phy_usb.c	optional phy
 dev/extres/phy/phynode_usb_if.m	optional phy
 dev/extres/hwreset/hwreset.c	optional hwreset
 dev/extres/hwreset/hwreset_array.c	optional hwreset
 dev/extres/hwreset/hwreset_if.m	optional hwreset
 dev/extres/nvmem/nvmem.c	optional nvmem fdt
 dev/extres/nvmem/nvmem_if.m	optional nvmem
 dev/extres/regulator/regdev_if.m	optional regulator fdt
 dev/extres/regulator/regnode_if.m	optional regulator
 dev/extres/regulator/regulator.c	optional regulator
 dev/extres/regulator/regulator_bus.c	optional regulator fdt
 dev/extres/regulator/regulator_fixed.c	optional regulator
 dev/extres/syscon/syscon.c		optional syscon
 dev/extres/syscon/syscon_generic.c	optional syscon fdt
 dev/extres/syscon/syscon_if.m		optional syscon
 dev/extres/syscon/syscon_power.c	optional syscon syscon_power
 dev/fb/fbd.c			optional fbd | vt
 dev/fb/fb_if.m			standard
 dev/fb/splash.c			optional sc splash
 dev/fdt/fdt_clock.c		optional fdt fdt_clock
 dev/fdt/fdt_clock_if.m		optional fdt fdt_clock
 dev/fdt/fdt_common.c		optional fdt
 dev/fdt/fdt_pinctrl.c		optional fdt fdt_pinctrl
 dev/fdt/fdt_pinctrl_if.m	optional fdt fdt_pinctrl
 dev/fdt/fdt_slicer.c		optional fdt cfi | fdt mx25l | fdt n25q | fdt at45d
 dev/fdt/fdt_static_dtb.S	optional fdt fdt_dtb_static \
 	dependency	"${FDT_DTS_FILE:T:R}.dtb"
 dev/fdt/simplebus.c		optional fdt
 dev/fdt/simple_mfd.c		optional syscon fdt
 dev/filemon/filemon.c		optional filemon
 dev/firewire/firewire.c		optional firewire
 dev/firewire/fwcrom.c		optional firewire
 dev/firewire/fwdev.c		optional firewire
 dev/firewire/fwdma.c		optional firewire
 dev/firewire/fwmem.c		optional firewire
 dev/firewire/fwohci.c		optional firewire
 dev/firewire/fwohci_pci.c	optional firewire pci
 dev/firewire/if_fwe.c		optional fwe
 dev/firewire/if_fwip.c		optional fwip
 dev/firewire/sbp.c		optional sbp
 dev/firewire/sbp_targ.c		optional sbp_targ
 dev/flash/at45d.c		optional at45d
 dev/flash/cqspi.c		optional cqspi fdt xdma
 dev/flash/mx25l.c		optional mx25l
 dev/flash/n25q.c		optional n25q fdt
 dev/flash/qspi_if.m		optional cqspi fdt | n25q fdt
 dev/fxp/if_fxp.c		optional fxp
 dev/fxp/inphy.c			optional fxp
 dev/gem/if_gem.c		optional gem
 dev/gem/if_gem_pci.c		optional gem pci
 dev/goldfish/goldfish_rtc.c	optional goldfish_rtc fdt
 dev/gpio/dwgpio/dwgpio.c	optional gpio dwgpio fdt
 dev/gpio/dwgpio/dwgpio_bus.c	optional gpio dwgpio fdt
 dev/gpio/dwgpio/dwgpio_if.m	optional gpio dwgpio fdt
 dev/gpio/gpiobacklight.c	optional gpiobacklight fdt
 dev/gpio/gpiokeys.c		optional gpiokeys fdt
 dev/gpio/gpiokeys_codes.c	optional gpiokeys fdt
 dev/gpio/gpiobus.c		optional gpio				\
 	dependency	"gpiobus_if.h"
 dev/gpio/gpioc.c		optional gpio				\
 	dependency	"gpio_if.h"
 dev/gpio/gpioiic.c		optional gpioiic
 dev/gpio/gpioled.c		optional gpioled !fdt
 dev/gpio/gpioled_fdt.c		optional gpioled fdt
 dev/gpio/gpiomdio.c		optional gpiomdio mii_bitbang
 dev/gpio/gpiopower.c		optional gpiopower fdt
 dev/gpio/gpioregulator.c	optional gpioregulator fdt
 dev/gpio/gpiospi.c		optional gpiospi
 dev/gpio/gpioths.c		optional gpioths
 dev/gpio/gpio_if.m		optional gpio
 dev/gpio/gpiobus_if.m		optional gpio
 dev/gpio/gpiopps.c		optional gpiopps fdt
 dev/gpio/ofw_gpiobus.c		optional fdt gpio
 dev/hid/bcm5974.c		optional bcm5974
 dev/hid/hconf.c			optional hconf
 dev/hid/hcons.c			optional hcons
 dev/hid/hgame.c			optional hgame
 dev/hid/hid.c			optional hid
 dev/hid/hid_if.m		optional hid
 dev/hid/hidbus.c		optional hidbus
 dev/hid/hidmap.c		optional hidmap
 dev/hid/hidquirk.c		optional hid
 dev/hid/hidraw.c		optional hidraw
 dev/hid/hkbd.c			optional hkbd
 dev/hid/hms.c			optional hms
 dev/hid/hmt.c			optional hmt hconf
 dev/hid/hpen.c			optional hpen
 dev/hid/hsctrl.c		optional hsctrl
 dev/hid/ietp.c			optional ietp
 dev/hid/ps4dshock.c		optional ps4dshock
 dev/hid/xb360gp.c		optional xb360gp
 dev/hifn/hifn7751.c		optional hifn
 dev/hptiop/hptiop.c		optional hptiop scbus
 dev/hwpmc/hwpmc_logging.c	optional hwpmc
 dev/hwpmc/hwpmc_mod.c		optional hwpmc
 dev/hwpmc/hwpmc_soft.c		optional hwpmc
 dev/ichiic/ig4_acpi.c		optional ig4 acpi iicbus
 dev/ichiic/ig4_iic.c		optional ig4 iicbus
 dev/ichiic/ig4_pci.c		optional ig4 pci iicbus
 dev/ichsmb/ichsmb.c		optional ichsmb
 dev/ichsmb/ichsmb_pci.c		optional ichsmb pci
 dev/ida/ida.c			optional ida
 dev/ida/ida_disk.c		optional ida
 dev/ida/ida_pci.c		optional ida pci
 dev/iicbus/acpi_iicbus.c	optional acpi iicbus | acpi compat_linuxkpi
 dev/iicbus/ad7418.c		optional ad7418
 dev/iicbus/ads111x.c		optional ads111x
 dev/iicbus/ds1307.c		optional ds1307
 dev/iicbus/ds13rtc.c		optional ds13rtc | ds133x | ds1374
 dev/iicbus/ds1672.c		optional ds1672
 dev/iicbus/ds3231.c		optional ds3231
 dev/iicbus/htu21.c		optional htu21
 dev/iicbus/icee.c		optional icee
 dev/iicbus/if_ic.c		optional ic
 dev/iicbus/iic.c		optional iic
 dev/iicbus/iic_recover_bus.c	optional iicbus | compat_linuxkpi
 dev/iicbus/iicbb.c		optional iicbb | compat_linuxkpi
 dev/iicbus/iicbb_if.m		optional iicbb | compat_linuxkpi
 dev/iicbus/iicbus.c		optional iicbus | compat_linuxkpi
 dev/iicbus/iicbus_if.m		optional iicbus | compat_linuxkpi
 dev/iicbus/iichid.c		optional iichid acpi hid iicbus
 dev/iicbus/iiconf.c		optional iicbus | compat_linuxkpi
 dev/iicbus/iicsmb.c		optional iicsmb				\
 	dependency	"iicbus_if.h"
 dev/iicbus/iicoc.c		optional iicoc
 dev/iicbus/iicoc_fdt.c		optional iicoc fdt
 dev/iicbus/iicoc_pci.c		optional iicoc pci
 dev/iicbus/isl12xx.c		optional isl12xx
 dev/iicbus/lm75.c		optional lm75
 dev/iicbus/max44009.c		optional max44009
 dev/iicbus/mux/iicmux.c		optional iicmux
 dev/iicbus/mux/iicmux_if.m	optional iicmux
 dev/iicbus/mux/iic_gpiomux.c	optional iic_gpiomux fdt
 dev/iicbus/mux/ltc430x.c	optional ltc430x
 dev/iicbus/mux/pca954x.c	optional pca954x iicbus iicmux
 dev/iicbus/nxprtc.c		optional nxprtc | pcf8563
 dev/iicbus/ofw_iicbus.c		optional fdt iicbus
 dev/iicbus/ofw_iicbus_if.m	optional fdt iicbus
 dev/iicbus/pcf8574.c		optional pcf8574
 dev/iicbus/pcf8591.c		optional pcf8591
 dev/iicbus/rtc8583.c		optional rtc8583
 dev/iicbus/rtc/pcf85063.c	optional pcf85063 iicbus fdt
 dev/iicbus/rtc/rx8803.c		optional rx8803 iicbus fdt
 dev/iicbus/s35390a.c		optional s35390a
 dev/iicbus/sy8106a.c		optional sy8106a fdt
 dev/iicbus/syr827.c		optional syr827 fdt
 dev/iicbus/gpio/tca64xx.c	optional tca64xx fdt gpio
 dev/iicbus/pmic/fan53555.c	optional fan53555 fdt | tcs4525 fdt
 dev/igc/if_igc.c		optional igc iflib pci
 dev/igc/igc_api.c		optional igc iflib pci
 dev/igc/igc_base.c		optional igc iflib pci
 dev/igc/igc_i225.c		optional igc iflib pci
 dev/igc/igc_mac.c		optional igc iflib pci
 dev/igc/igc_nvm.c		optional igc iflib pci
 dev/igc/igc_phy.c		optional igc iflib pci
 dev/igc/igc_txrx.c		optional igc iflib pci
 dev/intpm/intpm.c		optional intpm pci
 # XXX Work around clang warning, until maintainer approves fix.
 dev/ips/ips.c			optional ips \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/ips/ips_commands.c		optional ips
 dev/ips/ips_disk.c		optional ips
 dev/ips/ips_ioctl.c		optional ips
 dev/ips/ips_pci.c		optional ips pci
 dev/ipw/if_ipw.c		optional ipw
 ipwbssfw.c			optional ipwbssfw | ipwfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ipw_bss.fw:ipw_bss:130 -lintel_ipw -mipw_bss -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"ipwbssfw.c"
 ipw_bss.fwo			optional ipwbssfw | ipwfw		\
 	dependency	"ipw_bss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"ipw_bss.fwo"
 ipw_bss.fw			optional ipwbssfw | ipwfw		\
 	dependency	"$S/contrib/dev/ipw/ipw2100-1.3.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"ipw_bss.fw"
 ipwibssfw.c			optional ipwibssfw | ipwfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ipw_ibss.fw:ipw_ibss:130 -lintel_ipw -mipw_ibss -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"ipwibssfw.c"
 ipw_ibss.fwo			optional ipwibssfw | ipwfw		\
 	dependency	"ipw_ibss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"ipw_ibss.fwo"
 ipw_ibss.fw			optional ipwibssfw | ipwfw		\
 	dependency	"$S/contrib/dev/ipw/ipw2100-1.3-i.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"ipw_ibss.fw"
 ipwmonitorfw.c			optional ipwmonitorfw | ipwfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ipw_monitor.fw:ipw_monitor:130 -lintel_ipw -mipw_monitor -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"ipwmonitorfw.c"
 ipw_monitor.fwo			optional ipwmonitorfw | ipwfw		\
 	dependency	"ipw_monitor.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"ipw_monitor.fwo"
 ipw_monitor.fw			optional ipwmonitorfw | ipwfw		\
 	dependency	"$S/contrib/dev/ipw/ipw2100-1.3-p.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"ipw_monitor.fw"
 dev/iscsi/icl.c			optional iscsi
 dev/iscsi/icl_conn_if.m		optional cfiscsi | iscsi
 dev/iscsi/icl_soft.c		optional iscsi
 dev/iscsi/icl_soft_proxy.c	optional iscsi
 dev/iscsi/iscsi.c		optional iscsi scbus
 dev/ismt/ismt.c			optional ismt
 dev/isl/isl.c			optional isl iicbus
 dev/isp/isp.c			optional isp
 dev/isp/isp_freebsd.c		optional isp
 dev/isp/isp_library.c		optional isp
 dev/isp/isp_pci.c		optional isp pci
 dev/isp/isp_target.c		optional isp
 dev/ispfw/ispfw.c		optional ispfw
 dev/iwi/if_iwi.c		optional iwi
 iwibssfw.c			optional iwibssfw | iwifw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwi_bss.fw:iwi_bss:300 -lintel_iwi -miwi_bss -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwibssfw.c"
 iwi_bss.fwo			optional iwibssfw | iwifw		\
 	dependency	"iwi_bss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwi_bss.fwo"
 iwi_bss.fw			optional iwibssfw | iwifw		\
 	dependency	"$S/contrib/dev/iwi/ipw2200-bss.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwi_bss.fw"
 iwiibssfw.c			optional iwiibssfw | iwifw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwi_ibss.fw:iwi_ibss:300 -lintel_iwi -miwi_ibss -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwiibssfw.c"
 iwi_ibss.fwo			optional iwiibssfw | iwifw		\
 	dependency	"iwi_ibss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwi_ibss.fwo"
 iwi_ibss.fw			optional iwiibssfw | iwifw		\
 	dependency	"$S/contrib/dev/iwi/ipw2200-ibss.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwi_ibss.fw"
 iwimonitorfw.c			optional iwimonitorfw | iwifw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwi_monitor.fw:iwi_monitor:300 -lintel_iwi -miwi_monitor -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwimonitorfw.c"
 iwi_monitor.fwo			optional iwimonitorfw | iwifw		\
 	dependency	"iwi_monitor.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwi_monitor.fwo"
 iwi_monitor.fw			optional iwimonitorfw | iwifw		\
 	dependency	"$S/contrib/dev/iwi/ipw2200-sniffer.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwi_monitor.fw"
 dev/iwm/if_iwm.c		optional iwm
 dev/iwm/if_iwm_7000.c		optional iwm
 dev/iwm/if_iwm_8000.c		optional iwm
 dev/iwm/if_iwm_9000.c		optional iwm
 dev/iwm/if_iwm_9260.c		optional iwm
 dev/iwm/if_iwm_binding.c	optional iwm
 dev/iwm/if_iwm_fw.c		optional iwm
 dev/iwm/if_iwm_led.c		optional iwm
 dev/iwm/if_iwm_mac_ctxt.c	optional iwm
 dev/iwm/if_iwm_notif_wait.c	optional iwm
 dev/iwm/if_iwm_pcie_trans.c	optional iwm
 dev/iwm/if_iwm_phy_ctxt.c	optional iwm
 dev/iwm/if_iwm_phy_db.c		optional iwm
 dev/iwm/if_iwm_power.c		optional iwm
 dev/iwm/if_iwm_scan.c		optional iwm
 dev/iwm/if_iwm_sf.c		optional iwm
 dev/iwm/if_iwm_sta.c		optional iwm
 dev/iwm/if_iwm_time_event.c	optional iwm
 dev/iwm/if_iwm_util.c		optional iwm
 iwm3160fw.c			optional iwm3160fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm3160.fw:iwm3160fw -miwm3160fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm3160fw.c"
 iwm3160fw.fwo			optional iwm3160fw | iwmfw		\
 	dependency	"iwm3160.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm3160fw.fwo"
 iwm3160.fw			optional iwm3160fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-3160-17.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm3160.fw"
 iwm3168fw.c			optional iwm3168fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm3168.fw:iwm3168fw -miwm3168fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm3168fw.c"
 iwm3168fw.fwo			optional iwm3168fw | iwmfw		\
 	dependency	"iwm3168.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm3168fw.fwo"
 iwm3168.fw			optional iwm3168fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-3168-22.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm3168.fw"
 iwm7260fw.c			optional iwm7260fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm7260.fw:iwm7260fw -miwm7260fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm7260fw.c"
 iwm7260fw.fwo			optional iwm7260fw | iwmfw		\
 	dependency	"iwm7260.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm7260fw.fwo"
 iwm7260.fw			optional iwm7260fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-7260-17.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm7260.fw"
 iwm7265fw.c			optional iwm7265fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm7265.fw:iwm7265fw -miwm7265fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm7265fw.c"
 iwm7265fw.fwo			optional iwm7265fw | iwmfw		\
 	dependency	"iwm7265.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm7265fw.fwo"
 iwm7265.fw			optional iwm7265fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-7265-17.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm7265.fw"
 iwm7265Dfw.c			optional iwm7265Dfw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm7265D.fw:iwm7265Dfw -miwm7265Dfw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm7265Dfw.c"
 iwm7265Dfw.fwo			optional iwm7265Dfw | iwmfw		\
 	dependency	"iwm7265D.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm7265Dfw.fwo"
 iwm7265D.fw			optional iwm7265Dfw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-7265D-17.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm7265D.fw"
 iwm8000Cfw.c			optional iwm8000Cfw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm8000C.fw:iwm8000Cfw -miwm8000Cfw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm8000Cfw.c"
 iwm8000Cfw.fwo			optional iwm8000Cfw | iwmfw		\
 	dependency	"iwm8000C.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm8000Cfw.fwo"
 iwm8000C.fw			optional iwm8000Cfw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-8000C-16.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm8000C.fw"
 iwm8265.fw			optional iwm8265fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-8265-22.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm8265.fw"
 iwm8265fw.c			optional iwm8265fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm8265.fw:iwm8265fw -miwm8265fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwm8265fw.c"
 iwm8265fw.fwo			optional iwm8265fw | iwmfw		\
 	dependency	"iwm8265.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm8265fw.fwo"
 dev/iwn/if_iwn.c		optional iwn
 iwn1000fw.c			optional iwn1000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn1000.fw:iwn1000fw -miwn1000fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn1000fw.c"
 iwn1000fw.fwo			optional iwn1000fw | iwnfw		\
 	dependency	"iwn1000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn1000fw.fwo"
 iwn1000.fw			optional iwn1000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-1000-39.31.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn1000.fw"
 iwn100fw.c			optional iwn100fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn100.fw:iwn100fw -miwn100fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn100fw.c"
 iwn100fw.fwo			optional iwn100fw | iwnfw		\
 	dependency	"iwn100.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn100fw.fwo"
 iwn100.fw			optional iwn100fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-100-39.31.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn100.fw"
 iwn105fw.c			optional iwn105fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn105.fw:iwn105fw -miwn105fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn105fw.c"
 iwn105fw.fwo			optional iwn105fw | iwnfw		\
 	dependency	"iwn105.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn105fw.fwo"
 iwn105.fw			optional iwn105fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-105-6-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn105.fw"
 iwn135fw.c			optional iwn135fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn135.fw:iwn135fw -miwn135fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn135fw.c"
 iwn135fw.fwo			optional iwn135fw | iwnfw		\
 	dependency	"iwn135.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn135fw.fwo"
 iwn135.fw			optional iwn135fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-135-6-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn135.fw"
 iwn2000fw.c			optional iwn2000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn2000.fw:iwn2000fw -miwn2000fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn2000fw.c"
 iwn2000fw.fwo			optional iwn2000fw | iwnfw		\
 	dependency	"iwn2000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn2000fw.fwo"
 iwn2000.fw			optional iwn2000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-2000-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn2000.fw"
 iwn2030fw.c			optional iwn2030fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn2030.fw:iwn2030fw -miwn2030fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn2030fw.c"
 iwn2030fw.fwo			optional iwn2030fw | iwnfw		\
 	dependency	"iwn2030.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn2030fw.fwo"
 iwn2030.fw			optional iwn2030fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwnwifi-2030-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn2030.fw"
 iwn4965fw.c			optional iwn4965fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn4965.fw:iwn4965fw -miwn4965fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn4965fw.c"
 iwn4965fw.fwo			optional iwn4965fw | iwnfw		\
 	dependency	"iwn4965.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn4965fw.fwo"
 iwn4965.fw			optional iwn4965fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-4965-228.61.2.24.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn4965.fw"
 iwn5000fw.c			optional iwn5000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn5000.fw:iwn5000fw -miwn5000fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn5000fw.c"
 iwn5000fw.fwo		optional iwn5000fw | iwnfw			\
 	dependency	"iwn5000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn5000fw.fwo"
 iwn5000.fw			optional iwn5000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-5000-8.83.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn5000.fw"
 iwn5150fw.c			optional iwn5150fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn5150.fw:iwn5150fw -miwn5150fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn5150fw.c"
 iwn5150fw.fwo			optional iwn5150fw | iwnfw		\
 	dependency	"iwn5150.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn5150fw.fwo"
 iwn5150.fw			optional iwn5150fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-5150-8.24.2.2.fw.uu"\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn5150.fw"
 iwn6000fw.c			optional iwn6000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6000.fw:iwn6000fw -miwn6000fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn6000fw.c"
 iwn6000fw.fwo			optional iwn6000fw | iwnfw		\
 	dependency	"iwn6000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6000fw.fwo"
 iwn6000.fw			optional iwn6000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6000-9.221.4.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6000.fw"
 iwn6000g2afw.c			optional iwn6000g2afw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6000g2a.fw:iwn6000g2afw -miwn6000g2afw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn6000g2afw.c"
 iwn6000g2afw.fwo		optional iwn6000g2afw | iwnfw		\
 	dependency	"iwn6000g2a.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6000g2afw.fwo"
 iwn6000g2a.fw			optional iwn6000g2afw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6000g2a-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6000g2a.fw"
 iwn6000g2bfw.c			optional iwn6000g2bfw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6000g2b.fw:iwn6000g2bfw -miwn6000g2bfw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn6000g2bfw.c"
 iwn6000g2bfw.fwo		optional iwn6000g2bfw | iwnfw		\
 	dependency	"iwn6000g2b.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6000g2bfw.fwo"
 iwn6000g2b.fw			optional iwn6000g2bfw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6000g2b-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6000g2b.fw"
 iwn6050fw.c			optional iwn6050fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6050.fw:iwn6050fw -miwn6050fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"iwn6050fw.c"
 iwn6050fw.fwo			optional iwn6050fw | iwnfw		\
 	dependency	"iwn6050.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6050fw.fwo"
 iwn6050.fw			optional iwn6050fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6050-41.28.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6050.fw"
 dev/ixgbe/if_ix.c		optional ix inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe -DSMP"
 dev/ixgbe/if_ixv.c		optional ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe -DSMP"
 dev/ixgbe/if_bypass.c		optional ix inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/if_fdir.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/if_sriov.c		optional ix inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ix_txrx.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_osdep.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_phy.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_api.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_common.c	optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_mbx.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_vf.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_82598.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_82599.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_x540.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_x550.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_dcb.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_dcb_82598.c	optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_dcb_82599.c	optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/jedec_dimm/jedec_dimm.c	optional jedec_dimm smbus
 dev/jme/if_jme.c		optional jme pci
 dev/kbd/kbd.c			optional atkbd | pckbd | sc | ukbd | vt | hkbd
 dev/kbdmux/kbdmux.c		optional kbdmux
 dev/ksyms/ksyms.c		optional ksyms
 dev/le/am7990.c			optional le
 dev/le/am79900.c		optional le
 dev/le/if_le_pci.c		optional le pci
 dev/le/lance.c			optional le
 dev/led/led.c			standard
 dev/lge/if_lge.c		optional lge
 dev/liquidio/base/cn23xx_pf_device.c		optional lio	\
 	compile-with "${NORMAL_C}				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_console.c			optional lio	\
 	compile-with "${NORMAL_C}				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_ctrl.c			optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_device.c			optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_droq.c			optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_mem_ops.c			optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_request_manager.c		optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/base/lio_response_manager.c	optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/lio_core.c				optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/lio_ioctl.c			optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/lio_main.c				optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/lio_rss.c				optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/lio_rxtx.c				optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 dev/liquidio/lio_sysctl.c			optional lio	\
 	compile-with "${NORMAL_C} 				\
 	-I$S/dev/liquidio -I$S/dev/liquidio/base -DSMP"
 lio.c	optional lio						\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk lio_23xx_nic.bin.fw:lio_23xx_nic.bin -mlio_23xx_nic.bin -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local	\
 	clean		"lio.c"
 lio_23xx_nic.bin.fw.fwo optional lio				\
 	dependency	"lio_23xx_nic.bin.fw"			\
 	compile-with	"${NORMAL_FWO}"				\
 	no-implicit-rule					\
 	clean		"lio_23xx_nic.bin.fw.fwo"
 lio_23xx_nic.bin.fw	optional lio					\
 	dependency	"$S/contrib/dev/liquidio/lio_23xx_nic.bin.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"lio_23xx_nic.bin.fw"
 dev/malo/if_malo.c		optional malo
 dev/malo/if_malohal.c		optional malo
 dev/malo/if_malo_pci.c		optional malo pci
 dev/md/md.c			optional md
 dev/mdio/mdio_if.m		optional miiproxy | mdio
 dev/mdio/mdio.c			optional miiproxy | mdio
 dev/mem/memdev.c		optional mem
 dev/mem/memutil.c		optional mem
 dev/mfi/mfi.c			optional mfi
 dev/mfi/mfi_debug.c		optional mfi
 dev/mfi/mfi_pci.c		optional mfi pci
 dev/mfi/mfi_disk.c		optional mfi
 dev/mfi/mfi_syspd.c		optional mfi
 dev/mfi/mfi_tbolt.c		optional mfi
 dev/mfi/mfi_cam.c		optional mfip scbus
 dev/mii/acphy.c			optional miibus | acphy
 dev/mii/amphy.c			optional miibus | amphy
 dev/mii/atphy.c			optional miibus | atphy
 dev/mii/axphy.c			optional miibus | axphy
 dev/mii/bmtphy.c		optional miibus | bmtphy
 dev/mii/brgphy.c		optional miibus | brgphy
 dev/mii/ciphy.c			optional miibus | ciphy
 dev/mii/dp83822phy.c		optional miibus | dp83822phy
 dev/mii/dp83867phy.c		optional miibus | dp83867phy
 dev/mii/e1000phy.c		optional miibus | e1000phy
 dev/mii/gentbi.c		optional miibus | gentbi
 dev/mii/icsphy.c		optional miibus | icsphy
 dev/mii/ip1000phy.c		optional miibus | ip1000phy
 dev/mii/jmphy.c			optional miibus | jmphy
 dev/mii/lxtphy.c		optional miibus | lxtphy
 dev/mii/mcommphy.c		optional miibus | mcommphy
 dev/mii/micphy.c		optional miibus fdt | micphy fdt
 dev/mii/mii.c			optional miibus | mii
 dev/mii/mii_bitbang.c		optional miibus | mii_bitbang
 dev/mii/mii_physubr.c		optional miibus | mii
 dev/mii/mii_fdt.c		optional miibus fdt | mii fdt
 dev/mii/miibus_if.m		optional miibus | mii
 dev/mii/mv88e151x.c		optional miibus | mv88e151x
 dev/mii/nsgphy.c		optional miibus | nsgphy
 dev/mii/nsphy.c			optional miibus | nsphy
 dev/mii/nsphyter.c		optional miibus | nsphyter
 dev/mii/pnaphy.c		optional miibus | pnaphy
 dev/mii/qsphy.c			optional miibus | qsphy
 dev/mii/rdcphy.c		optional miibus | rdcphy
 dev/mii/rgephy.c		optional miibus | rgephy
 dev/mii/rlphy.c			optional miibus | rlphy
 dev/mii/rlswitch.c		optional rlswitch
 dev/mii/smcphy.c		optional miibus | smcphy
 dev/mii/smscphy.c		optional miibus | smscphy
 dev/mii/tdkphy.c		optional miibus | tdkphy
 dev/mii/truephy.c		optional miibus | truephy
 dev/mii/ukphy.c			optional miibus | mii
 dev/mii/ukphy_subr.c		optional miibus | mii
 dev/mii/vscphy.c		optional miibus | vscphy
 dev/mii/xmphy.c			optional miibus | xmphy
 dev/mlxfw/mlxfw_fsm.c			optional mlxfw \
 	compile-with "${MLXFW_C}"
 dev/mlxfw/mlxfw_mfa2.c			optional mlxfw \
 	compile-with "${MLXFW_C}"
 dev/mlxfw/mlxfw_mfa2_tlv_multi.c	optional mlxfw \
 	compile-with "${MLXFW_C}"
 dev/mlx/mlx.c			optional mlx
 dev/mlx/mlx_disk.c		optional mlx
 dev/mlx/mlx_pci.c		optional mlx pci
 dev/mmc/mmc_subr.c		optional mmc | mmcsd !mmccam
 dev/mmc/mmc.c			optional mmc !mmccam
 dev/mmc/mmcbr_if.m		standard
 dev/mmc/mmcbus_if.m		standard
 dev/mmc/mmcsd.c			optional mmcsd !mmccam
 dev/mmc/mmc_fdt_helpers.c	optional mmc regulator clk fdt | mmccam regulator clk fdt
 dev/mmc/mmc_helpers.c		optional mmc gpio regulator clk | mmccam gpio regulator clk
 dev/mmc/mmc_pwrseq.c		optional mmc clk regulator fdt | mmccam clk regulator fdt
 dev/mmc/mmc_pwrseq_if.m		optional mmc clk regulator fdt | mmccam clk regulator fdt
 dev/mmcnull/mmcnull.c		optional mmcnull
 dev/mpr/mpr.c			optional mpr
 dev/mpr/mpr_config.c		optional mpr
 # XXX Work around clang warning, until maintainer approves fix.
 dev/mpr/mpr_mapping.c		optional mpr \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/mpr/mpr_pci.c		optional mpr pci
 dev/mpr/mpr_sas.c		optional mpr \
 	compile-with "${NORMAL_C} ${NO_WUNNEEDED_INTERNAL_DECL}"
 dev/mpr/mpr_sas_lsi.c		optional mpr
 dev/mpr/mpr_table.c		optional mpr
 dev/mpr/mpr_user.c		optional mpr
 dev/mps/mps.c			optional mps
 dev/mps/mps_config.c		optional mps
 # XXX Work around clang warning, until maintainer approves fix.
 dev/mps/mps_mapping.c		optional mps \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/mps/mps_pci.c		optional mps pci
 dev/mps/mps_sas.c		optional mps \
 	compile-with "${NORMAL_C} ${NO_WUNNEEDED_INTERNAL_DECL}"
 dev/mps/mps_sas_lsi.c		optional mps
 dev/mps/mps_table.c		optional mps
 dev/mps/mps_user.c		optional mps
 dev/mpt/mpt.c			optional mpt
 dev/mpt/mpt_cam.c		optional mpt
 dev/mpt/mpt_debug.c		optional mpt
 dev/mpt/mpt_pci.c		optional mpt pci
 dev/mpt/mpt_raid.c		optional mpt
 dev/mpt/mpt_user.c		optional mpt
 dev/mrsas/mrsas.c		optional mrsas
 dev/mrsas/mrsas_cam.c		optional mrsas
 dev/mrsas/mrsas_ioctl.c		optional mrsas
 dev/mrsas/mrsas_fp.c		optional mrsas
 dev/msk/if_msk.c		optional msk
 dev/mvs/mvs.c			optional mvs
 dev/mvs/mvs_if.m		optional mvs
 dev/mvs/mvs_pci.c		optional mvs pci
 dev/mwl/if_mwl.c		optional mwl
 dev/mwl/if_mwl_pci.c		optional mwl pci
 dev/mwl/mwlhal.c		optional mwl
 mwlfw.c				optional mwlfw				\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk mw88W8363.fw:mw88W8363fw mwlboot.fw:mwlboot -mmwl -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"mwlfw.c"
 mw88W8363.fwo		optional mwlfw					\
 	dependency	"mw88W8363.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"mw88W8363.fwo"
 mw88W8363.fw		optional mwlfw					\
 	dependency	"$S/contrib/dev/mwl/mw88W8363.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"mw88W8363.fw"
 mwlboot.fwo		optional mwlfw					\
 	dependency	"mwlboot.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"mwlboot.fwo"
 mwlboot.fw		optional mwlfw					\
 	dependency	"$S/contrib/dev/mwl/mwlboot.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"mwlboot.fw"
 dev/mxge/if_mxge.c		optional mxge pci
 dev/mxge/mxge_eth_z8e.c		optional mxge pci
 dev/mxge/mxge_ethp_z8e.c	optional mxge pci
 dev/mxge/mxge_rss_eth_z8e.c	optional mxge pci
 dev/mxge/mxge_rss_ethp_z8e.c	optional mxge pci
 dev/my/if_my.c			optional my
 dev/netmap/if_ptnet.c		optional netmap inet
 dev/netmap/netmap.c		optional netmap
 dev/netmap/netmap_bdg.c		optional netmap
 dev/netmap/netmap_freebsd.c	optional netmap
 dev/netmap/netmap_generic.c	optional netmap
 dev/netmap/netmap_kloop.c	optional netmap
 dev/netmap/netmap_legacy.c	optional netmap
 dev/netmap/netmap_mbq.c		optional netmap
 dev/netmap/netmap_mem2.c	optional netmap
 dev/netmap/netmap_monitor.c	optional netmap
 dev/netmap/netmap_null.c	optional netmap
 dev/netmap/netmap_offloadings.c	optional netmap
 dev/netmap/netmap_pipe.c	optional netmap
 dev/netmap/netmap_vale.c	optional netmap
 # compile-with "${NORMAL_C} -Wconversion -Wextra"
 dev/nfsmb/nfsmb.c		optional nfsmb pci
 dev/nge/if_nge.c		optional nge
 dev/nmdm/nmdm.c			optional nmdm
 dev/null/null.c			standard
 dev/nvd/nvd.c			optional nvd nvme
 dev/nvme/nvme.c			optional nvme
 dev/nvme/nvme_ahci.c		optional nvme ahci
 dev/nvme/nvme_ctrlr.c		optional nvme
 dev/nvme/nvme_ctrlr_cmd.c	optional nvme
 dev/nvme/nvme_ns.c		optional nvme
 dev/nvme/nvme_ns_cmd.c		optional nvme
 dev/nvme/nvme_pci.c		optional nvme pci
 dev/nvme/nvme_qpair.c		optional nvme
 dev/nvme/nvme_sim.c		optional nvme scbus
 dev/nvme/nvme_sysctl.c		optional nvme
 dev/nvme/nvme_test.c		optional nvme
 dev/nvme/nvme_util.c		optional nvme
 dev/oce/oce_hw.c		optional oce pci
 dev/oce/oce_if.c		optional oce pci
 dev/oce/oce_mbox.c		optional oce pci
 dev/oce/oce_queue.c		optional oce pci
 dev/oce/oce_sysctl.c		optional oce pci
 dev/oce/oce_util.c		optional oce pci
 dev/ocs_fc/ocs_gendump.c	optional ocs_fc pci
 dev/ocs_fc/ocs_pci.c		optional ocs_fc pci
 dev/ocs_fc/ocs_ioctl.c		optional ocs_fc pci
 dev/ocs_fc/ocs_os.c		optional ocs_fc pci
 dev/ocs_fc/ocs_utils.c		optional ocs_fc pci
 dev/ocs_fc/ocs_hw.c		optional ocs_fc pci
 dev/ocs_fc/ocs_hw_queues.c	optional ocs_fc pci
 dev/ocs_fc/sli4.c		optional ocs_fc pci
 dev/ocs_fc/ocs_sm.c		optional ocs_fc pci
 dev/ocs_fc/ocs_device.c		optional ocs_fc pci
 dev/ocs_fc/ocs_xport.c		optional ocs_fc pci
 dev/ocs_fc/ocs_domain.c		optional ocs_fc pci
 dev/ocs_fc/ocs_sport.c		optional ocs_fc pci
 dev/ocs_fc/ocs_els.c		optional ocs_fc pci
 dev/ocs_fc/ocs_fabric.c		optional ocs_fc pci
 dev/ocs_fc/ocs_io.c		optional ocs_fc pci
 dev/ocs_fc/ocs_node.c		optional ocs_fc pci
 dev/ocs_fc/ocs_scsi.c		optional ocs_fc pci
 dev/ocs_fc/ocs_unsol.c		optional ocs_fc pci
 dev/ocs_fc/ocs_ddump.c		optional ocs_fc pci
 dev/ocs_fc/ocs_mgmt.c		optional ocs_fc pci
 dev/ocs_fc/ocs_cam.c		optional ocs_fc pci
 dev/ofw/ofw_bus_if.m		optional fdt
 dev/ofw/ofw_bus_subr.c		optional fdt
 dev/ofw/ofw_cpu.c		optional fdt
 dev/ofw/ofw_fdt.c		optional fdt
 dev/ofw/ofw_if.m		optional fdt
 dev/ofw/ofw_graph.c		optional fdt
 dev/ofw/ofw_subr.c		optional fdt
 dev/ofw/ofwbus.c		optional fdt
 dev/ofw/openfirm.c		optional fdt
 dev/ofw/openfirmio.c		optional fdt
 dev/ow/ow.c			optional ow				\
 	dependency	"owll_if.h"					\
 	dependency	"own_if.h"
 dev/ow/owll_if.m		optional ow
 dev/ow/own_if.m			optional ow
 dev/ow/ow_temp.c		optional ow_temp
 dev/ow/owc_gpiobus.c		optional owc gpio
 dev/pbio/pbio.c			optional pbio isa
 dev/pccbb/pccbb.c		optional cbb
 dev/pccbb/pccbb_pci.c		optional cbb pci
 dev/pcf/pcf.c			optional pcf
 dev/pci/fixup_pci.c		optional pci
 dev/pci/hostb_pci.c		optional pci
 dev/pci/ignore_pci.c		optional pci
 dev/pci/isa_pci.c		optional pci isa
 dev/pci/pci.c			optional pci
 dev/pci/pci_if.m		standard
 dev/pci/pci_iov.c		optional pci pci_iov
 dev/pci/pci_iov_if.m		standard
 dev/pci/pci_iov_schema.c	optional pci pci_iov
 dev/pci/pci_pci.c		optional pci
 dev/pci/pci_subr.c		optional pci
 dev/pci/pci_user.c		optional pci
 dev/pci/pcib_if.m		standard
 dev/pci/pcib_support.c		standard
 dev/pci/vga_pci.c		optional pci
 dev/pms/freebsd/driver/ini/src/agtiapi.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sadisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/mpi.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saframe.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sahw.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sainit.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saint.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sampicmd.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sampirsp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saphy.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saport.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sasata.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sasmp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sassp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/satimer.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sautil.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/mpidebug.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dminit.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmsmp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmdisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmport.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmtimer.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmmisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/sminit.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smmisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smsat.c				optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smsatcb.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smsathw.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smtimer.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdinit.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdmisc.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdesgl.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdport.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdint.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdioctl.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdhw.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/ossacmnapi.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tddmcmnapi.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdsmcmnapi.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdtimers.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itdio.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itdcb.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itdinit.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itddisc.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sata/host/sat.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sata/host/ossasat.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sata/host/sathw.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/ppbus/if_plip.c		optional plip
 dev/ppbus/lpbb.c		optional lpbb
 dev/ppbus/lpt.c			optional lpt
 dev/ppbus/pcfclock.c		optional pcfclock
 dev/ppbus/ppb_1284.c		optional ppbus
 dev/ppbus/ppb_base.c		optional ppbus
 dev/ppbus/ppb_msq.c		optional ppbus
 dev/ppbus/ppbconf.c		optional ppbus
 dev/ppbus/ppbus_if.m		optional ppbus
 dev/ppbus/ppi.c			optional ppi
 dev/ppbus/pps.c			optional pps
 dev/ppc/ppc.c			optional ppc
 dev/ppc/ppc_acpi.c		optional ppc acpi
 dev/ppc/ppc_isa.c		optional ppc isa
 dev/ppc/ppc_pci.c		optional ppc pci
 dev/ppc/ppc_puc.c		optional ppc puc
 dev/proto/proto_bus_isa.c	optional proto acpi | proto isa
 dev/proto/proto_bus_pci.c	optional proto pci
 dev/proto/proto_busdma.c	optional proto
 dev/proto/proto_core.c		optional proto
 dev/pst/pst-iop.c		optional pst
 dev/pst/pst-pci.c		optional pst pci
 dev/pst/pst-raid.c		optional pst
 dev/pty/pty.c			optional pty
 dev/puc/puc.c			optional puc
 dev/puc/puc_cfg.c		optional puc
 dev/puc/puc_pci.c		optional puc pci
 dev/pwm/pwmc.c			optional pwm | pwmc
 dev/pwm/pwmbus.c		optional pwm | pwmbus
 dev/pwm/pwmbus_if.m		optional pwm | pwmbus
 dev/pwm/ofw_pwm.c		optional pwm fdt | pwmbus fdt
 dev/pwm/ofw_pwmbus.c		optional pwm fdt | pwmbus fdt
 dev/pwm/pwm_backlight.c		optional pwm pwm_backlight fdt
 dev/quicc/quicc_core.c		optional quicc
 dev/ral/rt2560.c		optional ral
 dev/ral/rt2661.c		optional ral
 dev/ral/rt2860.c		optional ral
 dev/ral/if_ral_pci.c		optional ral pci
 rt2561fw.c			optional rt2561fw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2561.fw:rt2561fw -mrt2561 -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rt2561fw.c"
 rt2561fw.fwo			optional rt2561fw | ralfw		\
 	dependency	"rt2561.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2561fw.fwo"
 rt2561.fw			optional rt2561fw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2561.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2561.fw"
 rt2561sfw.c			optional rt2561sfw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2561s.fw:rt2561sfw -mrt2561s -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rt2561sfw.c"
 rt2561sfw.fwo			optional rt2561sfw | ralfw		\
 	dependency	"rt2561s.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2561sfw.fwo"
 rt2561s.fw			optional rt2561sfw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2561s.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2561s.fw"
 rt2661fw.c			optional rt2661fw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2661.fw:rt2661fw -mrt2661 -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rt2661fw.c"
 rt2661fw.fwo			optional rt2661fw | ralfw		\
 	dependency	"rt2661.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2661fw.fwo"
 rt2661.fw			optional rt2661fw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2661.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2661.fw"
 rt2860fw.c			optional rt2860fw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2860.fw:rt2860fw -mrt2860 -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rt2860fw.c"
 rt2860fw.fwo			optional rt2860fw | ralfw		\
 	dependency	"rt2860.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2860fw.fwo"
 rt2860.fw			optional rt2860fw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2860.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2860.fw"
 dev/random/random_infra.c	standard
 dev/random/random_harvestq.c	standard
 dev/random/randomdev.c		optional !random_loadable
 dev/random/fenestrasX/fx_brng.c	optional !random_loadable random_fenestrasx
 dev/random/fenestrasX/fx_main.c	optional !random_loadable random_fenestrasx \
 	compile-with "${NORMAL_C} -I$S/crypto/blake2"
 dev/random/fenestrasX/fx_pool.c	optional !random_loadable random_fenestrasx \
 	compile-with "${NORMAL_C} -I$S/crypto/blake2"
 dev/random/fenestrasX/fx_rng.c	optional !random_loadable random_fenestrasx \
 	compile-with "${NORMAL_C} -I$S/crypto/blake2"
 dev/random/fortuna.c		optional !random_loadable !random_fenestrasx
 dev/random/hash.c		optional !random_loadable
 dev/rccgpio/rccgpio.c		optional rccgpio gpio
 dev/re/if_re.c			optional re
 dev/rl/if_rl.c			optional rl pci
 dev/rndtest/rndtest.c		optional rndtest
 #
 dev/rtsx/rtsx.c			optional rtsx pci
 #
 dev/rtwn/if_rtwn.c		optional rtwn
 dev/rtwn/if_rtwn_beacon.c	optional rtwn
 dev/rtwn/if_rtwn_calib.c	optional rtwn
 dev/rtwn/if_rtwn_cam.c		optional rtwn
 dev/rtwn/if_rtwn_efuse.c	optional rtwn
 dev/rtwn/if_rtwn_fw.c		optional rtwn
 dev/rtwn/if_rtwn_rx.c		optional rtwn
 dev/rtwn/if_rtwn_task.c		optional rtwn
 dev/rtwn/if_rtwn_tx.c		optional rtwn
 #
 dev/rtwn/pci/rtwn_pci_attach.c	optional rtwn_pci pci
 dev/rtwn/pci/rtwn_pci_reg.c	optional rtwn_pci pci
 dev/rtwn/pci/rtwn_pci_rx.c	optional rtwn_pci pci
 dev/rtwn/pci/rtwn_pci_tx.c	optional rtwn_pci pci
 #
 dev/rtwn/usb/rtwn_usb_attach.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_ep.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_reg.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_rx.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_tx.c	optional rtwn_usb
 # RTL8188E
 dev/rtwn/rtl8188e/r88e_beacon.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_calib.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_chan.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_fw.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_init.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_led.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_tx.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_rf.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_rom.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_rx.c	optional rtwn
 dev/rtwn/rtl8188e/pci/r88ee_attach.c	optional rtwn_pci pci
 dev/rtwn/rtl8188e/pci/r88ee_init.c	optional rtwn_pci pci
 dev/rtwn/rtl8188e/pci/r88ee_rx.c	optional rtwn_pci pci
 dev/rtwn/rtl8188e/usb/r88eu_attach.c	optional rtwn_usb
 dev/rtwn/rtl8188e/usb/r88eu_init.c	optional rtwn_usb
 # RTL8192C
 dev/rtwn/rtl8192c/r92c_attach.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_beacon.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_calib.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_chan.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_fw.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_init.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_llt.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_rf.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_rom.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_rx.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_tx.c	optional rtwn
 dev/rtwn/rtl8192c/pci/r92ce_attach.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_calib.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_fw.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_init.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_led.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_rx.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_tx.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/usb/r92cu_attach.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_init.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_led.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_rx.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_tx.c	optional rtwn_usb
 # RTL8192E
 dev/rtwn/rtl8192e/r92e_chan.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_fw.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_init.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_led.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_rf.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_rom.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_rx.c	optional rtwn
 dev/rtwn/rtl8192e/usb/r92eu_attach.c	optional rtwn_usb
 dev/rtwn/rtl8192e/usb/r92eu_init.c	optional rtwn_usb
 # RTL8812A
 dev/rtwn/rtl8812a/r12a_beacon.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_calib.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_caps.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_chan.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_fw.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_init.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_led.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_rf.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_rom.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_rx.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_tx.c	optional rtwn
 dev/rtwn/rtl8812a/usb/r12au_attach.c	optional rtwn_usb
 dev/rtwn/rtl8812a/usb/r12au_init.c	optional rtwn_usb
 dev/rtwn/rtl8812a/usb/r12au_rx.c	optional rtwn_usb
 dev/rtwn/rtl8812a/usb/r12au_tx.c	optional rtwn_usb
 # RTL8821A
 dev/rtwn/rtl8821a/r21a_beacon.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_calib.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_chan.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_fw.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_init.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_led.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_rom.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_rx.c	optional rtwn
 dev/rtwn/rtl8821a/usb/r21au_attach.c	optional rtwn_usb
 dev/rtwn/rtl8821a/usb/r21au_dfs.c	optional rtwn_usb
 dev/rtwn/rtl8821a/usb/r21au_init.c	optional rtwn_usb
 rtwn-rtl8188eefw.c		optional rtwn-rtl8188eefw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8188eefw.fw:rtwn-rtl8188eefw:111 -mrtwn-rtl8188eefw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8188eefw.c"
 rtwn-rtl8188eefw.fwo		optional rtwn-rtl8188eefw | rtwnfw	\
 	dependency	"rtwn-rtl8188eefw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8188eefw.fwo"
 rtwn-rtl8188eefw.fw		optional rtwn-rtl8188eefw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8188eefw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8188eefw.fw"
 rtwn-rtl8188eufw.c		optional rtwn-rtl8188eufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8188eufw.fw:rtwn-rtl8188eufw:111 -mrtwn-rtl8188eufw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8188eufw.c"
 rtwn-rtl8188eufw.fwo		optional rtwn-rtl8188eufw | rtwnfw	\
 	dependency	"rtwn-rtl8188eufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8188eufw.fwo"
 rtwn-rtl8188eufw.fw		optional rtwn-rtl8188eufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8188eufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8188eufw.fw"
 rtwn-rtl8192cfwE.c		optional rtwn-rtl8192cfwE | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwE.fw:rtwn-rtl8192cfwE:111 -mrtwn-rtl8192cfwE -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8192cfwE.c"
 rtwn-rtl8192cfwE.fwo		optional rtwn-rtl8192cfwE | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwE.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE.fwo"
 rtwn-rtl8192cfwE.fw		optional rtwn-rtl8192cfwE | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwE.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE.fw"
 rtwn-rtl8192cfwE_B.c		optional rtwn-rtl8192cfwE_B | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwE_B.fw:rtwn-rtl8192cfwE_B:111 -mrtwn-rtl8192cfwE_B -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8192cfwE_B.c"
 rtwn-rtl8192cfwE_B.fwo		optional rtwn-rtl8192cfwE_B | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwE_B.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE_B.fwo"
 rtwn-rtl8192cfwE_B.fw		optional rtwn-rtl8192cfwE_B | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwE_B.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE_B.fw"
 rtwn-rtl8192cfwT.c		optional rtwn-rtl8192cfwT | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwT.fw:rtwn-rtl8192cfwT:111 -mrtwn-rtl8192cfwT -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8192cfwT.c"
 rtwn-rtl8192cfwT.fwo		optional rtwn-rtl8192cfwT | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwT.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwT.fwo"
 rtwn-rtl8192cfwT.fw		optional rtwn-rtl8192cfwT | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwT.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwT.fw"
 rtwn-rtl8192cfwU.c		optional rtwn-rtl8192cfwU | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwU.fw:rtwn-rtl8192cfwU:111 -mrtwn-rtl8192cfwU -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8192cfwU.c"
 rtwn-rtl8192cfwU.fwo		optional rtwn-rtl8192cfwU | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwU.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwU.fwo"
 rtwn-rtl8192cfwU.fw		optional rtwn-rtl8192cfwU | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwU.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwU.fw"
 rtwn-rtl8192eufw.c		optional rtwn-rtl8192eufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192eufw.fw:rtwn-rtl8192eufw:111 -mrtwn-rtl8192eufw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8192eufw.c"
 rtwn-rtl8192eufw.fwo		optional rtwn-rtl8192eufw | rtwnfw	\
 	dependency	"rtwn-rtl8192eufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192eufw.fwo"
 rtwn-rtl8192eufw.fw		optional rtwn-rtl8192eufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192eufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192eufw.fw"
 rtwn-rtl8812aufw.c		optional rtwn-rtl8812aufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8812aufw.fw:rtwn-rtl8812aufw:111 -mrtwn-rtl8812aufw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8812aufw.c"
 rtwn-rtl8812aufw.fwo		optional rtwn-rtl8812aufw | rtwnfw	\
 	dependency	"rtwn-rtl8812aufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8812aufw.fwo"
 rtwn-rtl8812aufw.fw		optional rtwn-rtl8812aufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8812aufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8812aufw.fw"
 rtwn-rtl8821aufw.c		optional rtwn-rtl8821aufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8821aufw.fw:rtwn-rtl8821aufw:111 -mrtwn-rtl8821aufw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rtwn-rtl8821aufw.c"
 rtwn-rtl8821aufw.fwo		optional rtwn-rtl8821aufw | rtwnfw	\
 	dependency	"rtwn-rtl8821aufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8821aufw.fwo"
 rtwn-rtl8821aufw.fw		optional rtwn-rtl8821aufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8821aufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8821aufw.fw"
 dev/safe/safe.c			optional safe
 dev/scc/scc_if.m		optional scc
 dev/scc/scc_bfe_quicc.c		optional scc quicc
 dev/scc/scc_core.c		optional scc
 dev/scc/scc_dev_quicc.c		optional scc quicc
 dev/scc/scc_dev_z8530.c		optional scc
 dev/sdhci/sdhci.c		optional sdhci
 dev/sdhci/sdhci_fdt.c		optional sdhci fdt regulator clk
 dev/sdhci/sdhci_fdt_gpio.c	optional sdhci fdt gpio
 dev/sdhci/sdhci_fsl_fdt.c	optional sdhci fdt gpio regulator clk
 dev/sdhci/sdhci_if.m		optional sdhci
 dev/sdhci/sdhci_acpi.c		optional sdhci acpi
 dev/sdhci/sdhci_pci.c		optional sdhci pci
 dev/sdio/sdio_if.m		optional mmccam
 dev/sdio/sdio_subr.c		optional mmccam
 dev/sdio/sdiob.c		optional mmccam
 dev/sge/if_sge.c		optional sge pci
 dev/siis/siis.c			optional siis pci
 dev/sis/if_sis.c		optional sis pci
 dev/sk/if_sk.c			optional sk pci
 dev/smbios/smbios.c		optional smbios
 dev/smbus/smb.c			optional smb
 dev/smbus/smbconf.c		optional smbus
 dev/smbus/smbus.c		optional smbus
 dev/smbus/smbus_if.m		optional smbus
 dev/smc/if_smc.c		optional smc
 dev/smc/if_smc_acpi.c		optional smc acpi
 dev/smc/if_smc_fdt.c		optional smc fdt
 dev/snp/snp.c			optional snp
 dev/sound/clone.c		optional sound
 dev/sound/unit.c		optional sound
 dev/sound/pci/als4000.c		optional snd_als4000 pci
 dev/sound/pci/atiixp.c		optional snd_atiixp pci
 dev/sound/pci/cmi.c		optional snd_cmi pci
 dev/sound/pci/cs4281.c		optional snd_cs4281 pci
 dev/sound/pci/csa.c		optional snd_csa pci
 dev/sound/pci/csapcm.c		optional snd_csa pci
 dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
 dev/sound/pci/emu10kx.c		optional snd_emu10kx pci
 dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci
 dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci
 dev/sound/pci/envy24.c		optional snd_envy24 pci
 dev/sound/pci/envy24ht.c	optional snd_envy24ht pci
 dev/sound/pci/es137x.c		optional snd_es137x pci
 dev/sound/pci/fm801.c		optional snd_fm801 pci
 dev/sound/pci/ich.c		optional snd_ich pci
 dev/sound/pci/maestro3.c	optional snd_maestro3 pci
 dev/sound/pci/neomagic.c	optional snd_neomagic pci
 dev/sound/pci/solo.c		optional snd_solo pci
 dev/sound/pci/spicds.c		optional snd_spicds pci
 dev/sound/pci/t4dwave.c		optional snd_t4dwave pci
 dev/sound/pci/via8233.c		optional snd_via8233 pci
 dev/sound/pci/via82c686.c	optional snd_via82c686 pci
 dev/sound/pci/vibes.c		optional snd_vibes pci
 dev/sound/pci/hda/hdaa.c	optional snd_hda pci
 dev/sound/pci/hda/hdaa_patches.c	optional snd_hda pci
 dev/sound/pci/hda/hdac.c	optional snd_hda pci
 dev/sound/pci/hda/hdac_if.m	optional snd_hda pci
 dev/sound/pci/hda/hdacc.c	optional snd_hda pci
 dev/sound/pci/hdspe.c		optional snd_hdspe pci
 dev/sound/pci/hdspe-pcm.c	optional snd_hdspe pci
 dev/sound/pcm/ac97.c		optional sound
 dev/sound/pcm/ac97_if.m		optional sound
 dev/sound/pcm/ac97_patch.c	optional sound
 dev/sound/pcm/buffer.c		optional sound	\
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/channel.c		optional sound
 dev/sound/pcm/channel_if.m	optional sound
 dev/sound/pcm/dsp.c		optional sound
 dev/sound/pcm/feeder.c		optional sound
 dev/sound/pcm/feeder_chain.c	optional sound
 dev/sound/pcm/feeder_eq.c	optional sound	\
 	dependency	"feeder_eq_gen.h"	\
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_if.m	optional sound
 dev/sound/pcm/feeder_format.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_matrix.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_mixer.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_rate.c	optional sound	\
 	dependency	"feeder_rate_gen.h"	\
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_volume.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/mixer.c		optional sound
 dev/sound/pcm/mixer_if.m	optional sound
 dev/sound/pcm/sndstat.c		optional sound
 dev/sound/pcm/sound.c		optional sound
 dev/sound/pcm/vchan.c		optional sound
 dev/sound/usb/uaudio.c		optional snd_uaudio usb
 dev/sound/usb/uaudio_pcm.c	optional snd_uaudio usb
 dev/sound/midi/midi.c		optional sound
 dev/sound/midi/mpu401.c		optional sound
 dev/sound/midi/mpu_if.m		optional sound
 dev/sound/midi/mpufoi_if.m	optional sound
 dev/sound/midi/sequencer.c	optional sound
 dev/sound/midi/synth_if.m	optional sound
 dev/spibus/ofw_spibus.c		optional fdt spibus
 dev/spibus/spibus.c		optional spibus				\
 	dependency	"spibus_if.h"
 dev/spibus/spigen.c		optional spigen
 dev/spibus/spibus_if.m		optional spibus
 dev/ste/if_ste.c		optional ste pci
 dev/stge/if_stge.c		optional stge
 dev/sym/sym_hipd.c		optional sym				\
 	dependency	"$S/dev/sym/sym_{conf,defs}.h"
 dev/syscons/blank/blank_saver.c	optional blank_saver
 dev/syscons/daemon/daemon_saver.c optional daemon_saver
 dev/syscons/dragon/dragon_saver.c optional dragon_saver
 dev/syscons/fade/fade_saver.c	optional fade_saver
 dev/syscons/fire/fire_saver.c	optional fire_saver
 dev/syscons/green/green_saver.c	optional green_saver
 dev/syscons/logo/logo.c		optional logo_saver
 dev/syscons/logo/logo_saver.c	optional logo_saver
 dev/syscons/rain/rain_saver.c	optional rain_saver
 dev/syscons/schistory.c		optional sc
 dev/syscons/scmouse.c		optional sc
 dev/syscons/scterm.c		optional sc
 dev/syscons/scterm-dumb.c	optional sc !SC_NO_TERM_DUMB
 dev/syscons/scterm-sc.c		optional sc !SC_NO_TERM_SC
 dev/syscons/scterm-teken.c	optional sc !SC_NO_TERM_TEKEN
 dev/syscons/scvidctl.c		optional sc
 dev/syscons/scvtb.c		optional sc
 dev/syscons/snake/snake_saver.c	optional snake_saver
 dev/syscons/star/star_saver.c	optional star_saver
 dev/syscons/syscons.c		optional sc
 dev/syscons/sysmouse.c		optional sc
 dev/syscons/warp/warp_saver.c	optional warp_saver
 dev/tcp_log/tcp_log_dev.c	optional tcp_blackbox inet | tcp_blackbox inet6
 dev/tdfx/tdfx_pci.c		optional tdfx pci
 dev/ti/if_ti.c			optional ti pci
 dev/twe/twe.c			optional twe
 dev/twe/twe_freebsd.c		optional twe
 dev/tws/tws.c			optional tws
 dev/tws/tws_cam.c		optional tws
 dev/tws/tws_hdm.c		optional tws
 dev/tws/tws_services.c		optional tws
 dev/tws/tws_user.c		optional tws
 dev/uart/uart_bus_acpi.c	optional uart acpi
 dev/uart/uart_bus_fdt.c		optional uart fdt
 dev/uart/uart_bus_isa.c		optional uart isa
 dev/uart/uart_bus_pci.c		optional uart pci
 dev/uart/uart_bus_puc.c		optional uart puc
 dev/uart/uart_bus_scc.c		optional uart scc
 dev/uart/uart_core.c		optional uart
 dev/uart/uart_cpu_acpi.c	optional uart acpi
 dev/uart/uart_dbg.c		optional uart gdb
 dev/uart/uart_dev_imx.c		optional uart uart_imx fdt
 dev/uart/uart_dev_msm.c		optional uart uart_msm fdt
 dev/uart/uart_dev_mvebu.c	optional uart uart_mvebu fdt
 dev/uart/uart_dev_ns8250.c	optional uart uart_ns8250 | uart uart_snps
 dev/uart/uart_dev_pl011.c	optional uart pl011
 dev/uart/uart_dev_quicc.c	optional uart quicc
 dev/uart/uart_dev_snps.c	optional uart uart_snps fdt
 dev/uart/uart_dev_z8530.c	optional uart uart_z8530 | uart scc
 dev/uart/uart_if.m		optional uart
 dev/uart/uart_subr.c		optional uart
 dev/uart/uart_tty.c		optional uart
 #
 # USB controller drivers
 #
 dev/usb/controller/musb_otg.c		optional musb
 dev/usb/controller/dwc_otg.c		optional dwcotg
 dev/usb/controller/dwc_otg_fdt.c	optional dwcotg fdt
 dev/usb/controller/dwc_otg_acpi.c	optional dwcotg acpi
 dev/usb/controller/ehci.c		optional ehci
 dev/usb/controller/ehci_msm.c		optional ehci_msm fdt
 dev/usb/controller/ehci_pci.c		optional ehci pci
 dev/usb/controller/ohci.c		optional ohci
 dev/usb/controller/ohci_pci.c		optional ohci pci
 dev/usb/controller/uhci.c		optional uhci
 dev/usb/controller/uhci_pci.c		optional uhci pci
 dev/usb/controller/xhci.c		optional xhci
 dev/usb/controller/xhci_pci.c		optional xhci pci
 dev/usb/controller/saf1761_otg.c	optional saf1761otg
 dev/usb/controller/saf1761_otg_fdt.c	optional saf1761otg fdt
 dev/usb/controller/uss820dci.c		optional uss820dci
 dev/usb/controller/usb_controller.c	optional usb
 #
 # USB storage drivers
 #
 dev/usb/storage/cfumass.c	optional cfumass ctl
 dev/usb/storage/umass.c		optional umass
 dev/usb/storage/urio.c		optional urio
 dev/usb/storage/ustorage_fs.c	optional usfs
 #
 # USB core
 #
 dev/usb/usb_busdma.c		optional usb
 dev/usb/usb_core.c		optional usb
 dev/usb/usb_debug.c		optional usb
 dev/usb/usb_dev.c		optional usb
 dev/usb/usb_device.c		optional usb
 dev/usb/usb_dynamic.c		optional usb
 dev/usb/usb_error.c		optional usb
 dev/usb/usb_fdt_support.c	optional usb fdt
 dev/usb/usb_generic.c		optional usb
 dev/usb/usb_handle_request.c	optional usb
 dev/usb/usb_hid.c		optional usb
 dev/usb/usb_hub.c		optional usb
 dev/usb/usb_hub_acpi.c		optional uacpi acpi
 dev/usb/usb_if.m		optional usb
 dev/usb/usb_lookup.c		optional usb
 dev/usb/usb_mbuf.c		optional usb
 dev/usb/usb_msctest.c		optional usb
 dev/usb/usb_parse.c		optional usb
 dev/usb/usb_pf.c		optional usb
 dev/usb/usb_process.c		optional usb
 dev/usb/usb_request.c		optional usb
 dev/usb/usb_transfer.c		optional usb
 dev/usb/usb_util.c		optional usb
 #
 # USB network drivers
 #
 dev/usb/net/if_aue.c		optional aue
 dev/usb/net/if_axe.c		optional axe
 dev/usb/net/if_axge.c		optional axge
 dev/usb/net/if_cdce.c		optional cdce
 dev/usb/net/if_cdceem.c		optional cdceem
 dev/usb/net/if_cue.c		optional cue
 dev/usb/net/if_ipheth.c		optional ipheth
 dev/usb/net/if_kue.c		optional kue
 dev/usb/net/if_mos.c		optional mos
 dev/usb/net/if_muge.c		optional muge
 dev/usb/net/if_rue.c		optional rue
 dev/usb/net/if_smsc.c		optional smsc
 dev/usb/net/if_udav.c		optional udav
 dev/usb/net/if_ure.c		optional ure
 dev/usb/net/if_usie.c		optional usie
 dev/usb/net/if_urndis.c		optional urndis
 dev/usb/net/ruephy.c		optional rue
 dev/usb/net/usb_ethernet.c	optional uether | aue | axe | axge | cdce | \
 					 cdceem | cue | ipheth | kue | mos | \
 					 rue | smsc | udav | ure | urndis | muge
 dev/usb/net/uhso.c		optional uhso
 #
 # USB WLAN drivers
 #
 dev/usb/wlan/if_rsu.c		optional rsu
 rsu-rtl8712fw.c			optional rsu-rtl8712fw | rsufw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rsu-rtl8712fw.fw:rsu-rtl8712fw:120 -mrsu-rtl8712fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"rsu-rtl8712fw.c"
 rsu-rtl8712fw.fwo		optional rsu-rtl8712fw | rsufw		\
 	dependency	"rsu-rtl8712fw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rsu-rtl8712fw.fwo"
 rsu-rtl8712fw.fw		optional rsu-rtl8712.fw | rsufw		\
 	dependency	"$S/contrib/dev/rsu/rsu-rtl8712fw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rsu-rtl8712fw.fw"
 dev/usb/wlan/if_rum.c		optional rum
 dev/usb/wlan/if_run.c		optional run
 runfw.c				optional runfw							\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk run.fw:runfw -mrunfw -c${.TARGET}"	\
 	no-ctfconvert no-implicit-rule before-depend local					\
 	clean		"runfw.c"
 runfw.fwo			optional runfw							\
 	dependency	"run.fw"								\
 	compile-with	"${NORMAL_FWO}"								\
 	no-implicit-rule									\
 	clean		"runfw.fwo"
 run.fw				optional runfw							\
 	dependency	"$S/contrib/dev/run/rt2870.fw.uu"					\
 	compile-with	"${NORMAL_FW}"								\
 	no-obj no-implicit-rule									\
 	clean		"run.fw"
 dev/usb/wlan/if_uath.c		optional uath
 dev/usb/wlan/if_upgt.c		optional upgt
 dev/usb/wlan/if_ural.c		optional ural
 dev/usb/wlan/if_urtw.c		optional urtw
 dev/usb/wlan/if_zyd.c		optional zyd
 #
 # USB serial and parallel port drivers
 #
 dev/usb/serial/u3g.c		optional u3g
 dev/usb/serial/uark.c		optional uark
 dev/usb/serial/ubsa.c		optional ubsa
 dev/usb/serial/ubser.c		optional ubser
 dev/usb/serial/uchcom.c		optional uchcom
 dev/usb/serial/ucycom.c		optional ucycom
 dev/usb/serial/ufoma.c		optional ufoma
 dev/usb/serial/uftdi.c		optional uftdi
 dev/usb/serial/ugensa.c		optional ugensa
 dev/usb/serial/uipaq.c		optional uipaq
 dev/usb/serial/ulpt.c		optional ulpt
 dev/usb/serial/umcs.c		optional umcs
 dev/usb/serial/umct.c		optional umct
 dev/usb/serial/umodem.c		optional umodem
 dev/usb/serial/umoscom.c	optional umoscom
 dev/usb/serial/uplcom.c		optional uplcom
 dev/usb/serial/uslcom.c		optional uslcom
 dev/usb/serial/uvisor.c		optional uvisor
 dev/usb/serial/uvscom.c		optional uvscom
 dev/usb/serial/usb_serial.c 	optional ucom | u3g | uark | ubsa | ubser | \
 					 uchcom | ucycom | ufoma | uftdi | \
 					 ugensa | uipaq | umcs | umct | \
 					 umodem | umoscom | uplcom | usie | \
 					 uslcom | uvisor | uvscom
 #
 # USB misc drivers
 #
 dev/usb/misc/cp2112.c		optional cp2112
 dev/usb/misc/udbp.c		optional udbp
 dev/usb/misc/ugold.c		optional ugold
 dev/usb/misc/uled.c		optional uled
 #
 # USB input drivers
 #
 dev/usb/input/atp.c		optional atp
 dev/usb/input/uep.c		optional uep
 dev/usb/input/uhid.c		optional uhid
 dev/usb/input/uhid_snes.c	optional uhid_snes
 dev/usb/input/ukbd.c		optional ukbd
 dev/usb/input/ums.c		optional ums
 dev/usb/input/usbhid.c		optional usbhid
 dev/usb/input/wmt.c		optional wmt
 dev/usb/input/wsp.c		optional wsp
 #
 # USB quirks
 #
 dev/usb/quirk/usb_quirk.c	optional usb
 #
 # USB templates
 #
 dev/usb/template/usb_template.c		optional usb_template
 dev/usb/template/usb_template_audio.c	optional usb_template
 dev/usb/template/usb_template_cdce.c	optional usb_template
 dev/usb/template/usb_template_kbd.c	optional usb_template
 dev/usb/template/usb_template_modem.c	optional usb_template
 dev/usb/template/usb_template_mouse.c	optional usb_template
 dev/usb/template/usb_template_msc.c	optional usb_template
 dev/usb/template/usb_template_mtp.c	optional usb_template
 dev/usb/template/usb_template_phone.c	optional usb_template
 dev/usb/template/usb_template_serialnet.c	optional usb_template
 dev/usb/template/usb_template_midi.c	optional usb_template
 dev/usb/template/usb_template_multi.c	optional usb_template
 dev/usb/template/usb_template_cdceem.c	optional usb_template
 #
 # USB video drivers
 #
 dev/usb/video/udl.c			optional udl
 #
 # USB END
 #
 dev/videomode/videomode.c		optional videomode
 dev/videomode/edid.c			optional videomode
 dev/videomode/pickmode.c		optional videomode
 dev/videomode/vesagtf.c			optional videomode
 dev/veriexec/verified_exec.c	optional mac_veriexec
 dev/vge/if_vge.c		optional vge
 dev/viapm/viapm.c		optional viapm pci
 dev/virtio/virtio.c			optional	virtio
 dev/virtio/virtqueue.c			optional	virtio
 dev/virtio/virtio_bus_if.m		optional	virtio
 dev/virtio/virtio_if.m			optional	virtio
 dev/virtio/pci/virtio_pci.c		optional	virtio_pci
 dev/virtio/pci/virtio_pci_if.m		optional	virtio_pci
 dev/virtio/pci/virtio_pci_legacy.c	optional	virtio_pci
 dev/virtio/pci/virtio_pci_modern.c	optional	virtio_pci
 dev/virtio/mmio/virtio_mmio.c		optional	virtio_mmio
 dev/virtio/mmio/virtio_mmio_acpi.c	optional	virtio_mmio acpi
 dev/virtio/mmio/virtio_mmio_cmdline.c	optional	virtio_mmio
 dev/virtio/mmio/virtio_mmio_fdt.c	optional	virtio_mmio fdt
 dev/virtio/mmio/virtio_mmio_if.m	optional	virtio_mmio
 dev/virtio/network/if_vtnet.c		optional	vtnet
 dev/virtio/block/virtio_blk.c		optional	virtio_blk
 dev/virtio/balloon/virtio_balloon.c	optional	virtio_balloon
 dev/virtio/scsi/virtio_scsi.c		optional	virtio_scsi
 dev/virtio/random/virtio_random.c	optional	virtio_random
 dev/virtio/console/virtio_console.c	optional	virtio_console
 dev/vkbd/vkbd.c			optional vkbd
 dev/vmgenc/vmgenc_acpi.c	optional acpi
 dev/vmware/vmxnet3/if_vmx.c		optional vmx
 dev/vmware/vmci/vmci.c			optional vmci
 dev/vmware/vmci/vmci_datagram.c		optional vmci
 dev/vmware/vmci/vmci_doorbell.c		optional vmci
 dev/vmware/vmci/vmci_driver.c		optional vmci
 dev/vmware/vmci/vmci_event.c		optional vmci
 dev/vmware/vmci/vmci_hashtable.c	optional vmci
 dev/vmware/vmci/vmci_kernel_if.c	optional vmci
 dev/vmware/vmci/vmci_qpair.c		optional vmci
 dev/vmware/vmci/vmci_queue_pair.c	optional vmci
 dev/vmware/vmci/vmci_resource.c		optional vmci
 dev/vmware/pvscsi/pvscsi.c		optional pvscsi
 dev/vr/if_vr.c			optional vr pci
 dev/vt/colors/vt_termcolors.c	optional vt
 dev/vt/font/vt_font_default.c	optional vt
 dev/vt/font/vt_mouse_cursor.c	optional vt
 dev/vt/hw/efifb/efifb.c		optional vt_efifb
 dev/vt/hw/vbefb/vbefb.c		optional vt_vbefb
 dev/vt/hw/fb/vt_fb.c		optional vt
 dev/vt/hw/vga/vt_vga.c		optional vt vt_vga
 dev/vt/logo/logo_freebsd.c	optional vt splash
 dev/vt/logo/logo_beastie.c	optional vt splash
 dev/vt/vt_buf.c			optional vt
 dev/vt/vt_consolectl.c		optional vt
 dev/vt/vt_core.c		optional vt
 dev/vt/vt_cpulogos.c		optional vt splash
 dev/vt/vt_font.c		optional vt
 dev/vt/vt_sysmouse.c		optional vt
 dev/vte/if_vte.c		optional vte pci
 dev/watchdog/watchdog.c		standard
 dev/wg/if_wg.c			optional wg				\
 	compile-with "${NORMAL_C} -include $S/dev/wg/compat.h"
 dev/wg/wg_cookie.c		optional wg				\
 	compile-with "${NORMAL_C} -include $S/dev/wg/compat.h"
 dev/wg/wg_crypto.c		optional wg				\
 	compile-with "${NORMAL_C} -include $S/dev/wg/compat.h"
 dev/wg/wg_noise.c		optional wg				\
 	compile-with "${NORMAL_C} -include $S/dev/wg/compat.h"
 dev/wpi/if_wpi.c		optional wpi pci
 wpifw.c			optional wpifw					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk wpi.fw:wpifw:153229 -mwpi -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean		"wpifw.c"
 wpifw.fwo			optional wpifw				\
 	dependency	"wpi.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"wpifw.fwo"
 wpi.fw			optional wpifw					\
 	dependency	"$S/contrib/dev/wpi/iwlwifi-3945-15.32.2.9.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"wpi.fw"
 dev/xdma/controller/pl330.c	optional xdma pl330 fdt
 dev/xdma/xdma.c			optional xdma
 dev/xdma/xdma_bank.c		optional xdma
 dev/xdma/xdma_bio.c		optional xdma
 dev/xdma/xdma_fdt_test.c	optional xdma xdma_test fdt
 dev/xdma/xdma_if.m		optional xdma
 dev/xdma/xdma_iommu.c		optional xdma
 dev/xdma/xdma_mbuf.c		optional xdma
 dev/xdma/xdma_queue.c		optional xdma
 dev/xdma/xdma_sg.c		optional xdma
 dev/xdma/xdma_sglist.c		optional xdma
 dev/xen/balloon/balloon.c	optional xenhvm
 dev/xen/blkfront/blkfront.c	optional xenhvm
 dev/xen/blkback/blkback.c	optional xenhvm
 dev/xen/bus/xen_intr.c		optional xenhvm
 dev/xen/bus/xenpv.c		optional xenhvm
 dev/xen/console/xen_console.c	optional xenhvm
 dev/xen/control/control.c	optional xenhvm
 dev/xen/cpu/xen_acpi_cpu.c	optional xenhvm
 dev/xen/efi/pvefi.c		optional xenhvm xenefi efirt
 dev/xen/grant_table/grant_table.c	optional xenhvm
 dev/xen/netback/netback.c	optional xenhvm
 dev/xen/netfront/netfront.c	optional xenhvm
 dev/xen/timer/xen_timer.c	optional xenhvm xentimer
 dev/xen/xenpci/xenpci.c		optional xenpci
 dev/xen/xenstore/xenstore.c	optional xenhvm
 dev/xen/xenstore/xenstore_dev.c	optional xenhvm
 dev/xen/xenstore/xenstored_dev.c	optional xenhvm
 dev/xen/evtchn/evtchn_dev.c	optional xenhvm
 dev/xen/privcmd/privcmd.c	optional xenhvm
 dev/xen/gntdev/gntdev.c		optional xenhvm
 dev/xen/debug/debug.c		optional xenhvm
 dev/xl/if_xl.c			optional xl pci
 dev/xl/xlphy.c			optional xl pci
 fs/autofs/autofs.c		optional autofs
 fs/autofs/autofs_vfsops.c	optional autofs
 fs/autofs/autofs_vnops.c	optional autofs
 fs/deadfs/dead_vnops.c		standard
 fs/devfs/devfs_devs.c		standard
 fs/devfs/devfs_dir.c		standard
 fs/devfs/devfs_rule.c		standard
 fs/devfs/devfs_vfsops.c		standard
 fs/devfs/devfs_vnops.c		standard
 fs/fdescfs/fdesc_vfsops.c	optional fdescfs
 fs/fdescfs/fdesc_vnops.c	optional fdescfs
 fs/fifofs/fifo_vnops.c		standard
 fs/cuse/cuse.c			optional cuse
 fs/fuse/fuse_device.c		optional fusefs
 fs/fuse/fuse_file.c		optional fusefs
 fs/fuse/fuse_internal.c		optional fusefs
 fs/fuse/fuse_io.c		optional fusefs
 fs/fuse/fuse_ipc.c		optional fusefs
 fs/fuse/fuse_main.c		optional fusefs
 fs/fuse/fuse_node.c		optional fusefs
 fs/fuse/fuse_vfsops.c		optional fusefs
 fs/fuse/fuse_vnops.c		optional fusefs
 fs/mntfs/mntfs_vnops.c		standard
 fs/msdosfs/msdosfs_conv.c	optional msdosfs
 fs/msdosfs/msdosfs_denode.c	optional msdosfs
 fs/msdosfs/msdosfs_fat.c	optional msdosfs
 fs/msdosfs/msdosfs_iconv.c	optional msdosfs_iconv
 fs/msdosfs/msdosfs_lookup.c	optional msdosfs
 fs/msdosfs/msdosfs_vfsops.c	optional msdosfs
 fs/msdosfs/msdosfs_vnops.c	optional msdosfs
 fs/nfs/nfs_commonkrpc.c		optional nfscl | nfslockd | nfsd
 fs/nfs/nfs_commonsubs.c		optional nfscl | nfslockd | nfsd
 fs/nfs/nfs_commonport.c		optional nfscl | nfslockd | nfsd
 fs/nfs/nfs_commonacl.c		optional nfscl | nfslockd | nfsd
 fs/nfsclient/nfs_clcomsubs.c	optional nfscl
 fs/nfsclient/nfs_clsubs.c	optional nfscl
 fs/nfsclient/nfs_clstate.c	optional nfscl
 fs/nfsclient/nfs_clkrpc.c	optional nfscl
 fs/nfsclient/nfs_clrpcops.c	optional nfscl
 fs/nfsclient/nfs_clvnops.c	optional nfscl
 fs/nfsclient/nfs_clnode.c	optional nfscl
 fs/nfsclient/nfs_clvfsops.c	optional nfscl
 fs/nfsclient/nfs_clport.c	optional nfscl
 fs/nfsclient/nfs_clbio.c	optional nfscl
 fs/nfsclient/nfs_clnfsiod.c	optional nfscl
 fs/nfsserver/nfs_fha_new.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdsocket.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdsubs.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdstate.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdkrpc.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdserv.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdport.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdcache.c	optional nfsd inet
 fs/nullfs/null_subr.c		optional nullfs
 fs/nullfs/null_vfsops.c		optional nullfs
 fs/nullfs/null_vnops.c		optional nullfs
 fs/procfs/procfs.c		optional procfs
 fs/procfs/procfs_dbregs.c	optional procfs
 fs/procfs/procfs_fpregs.c	optional procfs
 fs/procfs/procfs_map.c		optional procfs
 fs/procfs/procfs_mem.c		optional procfs
 fs/procfs/procfs_note.c		optional procfs
 fs/procfs/procfs_osrel.c	optional procfs
 fs/procfs/procfs_regs.c		optional procfs
 fs/procfs/procfs_rlimit.c	optional procfs
 fs/procfs/procfs_status.c	optional procfs
 fs/procfs/procfs_type.c		optional procfs
 fs/pseudofs/pseudofs.c		optional pseudofs
 fs/pseudofs/pseudofs_fileno.c	optional pseudofs
 fs/pseudofs/pseudofs_vncache.c	optional pseudofs
 fs/pseudofs/pseudofs_vnops.c	optional pseudofs
 fs/smbfs/smbfs_io.c		optional smbfs
 fs/smbfs/smbfs_node.c		optional smbfs
 fs/smbfs/smbfs_smb.c		optional smbfs
 fs/smbfs/smbfs_subr.c		optional smbfs
 fs/smbfs/smbfs_vfsops.c		optional smbfs
 fs/smbfs/smbfs_vnops.c		optional smbfs
 fs/tarfs/tarfs_io.c		optional tarfs compile-with "${NORMAL_C} -I$S/contrib/zstd/lib/freebsd"
 fs/tarfs/tarfs_subr.c		optional tarfs
 fs/tarfs/tarfs_vfsops.c		optional tarfs
 fs/tarfs/tarfs_vnops.c		optional tarfs
 fs/udf/osta.c			optional udf
 fs/udf/udf_iconv.c		optional udf_iconv
 fs/udf/udf_vfsops.c		optional udf
 fs/udf/udf_vnops.c		optional udf
 fs/unionfs/union_subr.c		optional unionfs
 fs/unionfs/union_vfsops.c	optional unionfs
 fs/unionfs/union_vnops.c	optional unionfs
 fs/tmpfs/tmpfs_vnops.c		optional tmpfs
 fs/tmpfs/tmpfs_fifoops.c 	optional tmpfs
 fs/tmpfs/tmpfs_vfsops.c 	optional tmpfs
 fs/tmpfs/tmpfs_subr.c 		optional tmpfs
 gdb/gdb_cons.c			optional gdb
 gdb/gdb_main.c			optional gdb
 gdb/gdb_packet.c		optional gdb
 gdb/netgdb.c			optional ddb debugnet gdb netgdb inet
 geom/bde/g_bde.c		optional geom_bde
 geom/bde/g_bde_crypt.c		optional geom_bde
 geom/bde/g_bde_lock.c		optional geom_bde
 geom/bde/g_bde_work.c		optional geom_bde
 geom/cache/g_cache.c		optional geom_cache
 geom/concat/g_concat.c		optional geom_concat
 geom/eli/g_eli.c		optional geom_eli
 geom/eli/g_eli_crypto.c		optional geom_eli
 geom/eli/g_eli_ctl.c		optional geom_eli
 geom/eli/g_eli_hmac.c		optional geom_eli
 geom/eli/g_eli_integrity.c	optional geom_eli
 geom/eli/g_eli_key.c		optional geom_eli
 geom/eli/g_eli_key_cache.c	optional geom_eli
 geom/eli/g_eli_privacy.c	optional geom_eli
 geom/eli/pkcs5v2.c		optional geom_eli
 geom/gate/g_gate.c		optional geom_gate
 geom/geom_bsd_enc.c		optional geom_part_bsd
 geom/geom_ccd.c			optional ccd | geom_ccd
 geom/geom_ctl.c			standard
 geom/geom_dev.c			standard
 geom/geom_disk.c		standard
 geom/geom_dump.c		standard
 geom/geom_event.c		standard
 geom/geom_flashmap.c		optional fdt cfi | fdt mx25l | mmcsd | fdt n25q | fdt at45d
 geom/geom_io.c			standard
 geom/geom_kern.c		standard
 geom/geom_map.c			optional geom_map
 geom/geom_redboot.c		optional geom_redboot
 geom/geom_slice.c		standard
 geom/geom_subr.c		standard
 geom/geom_vfs.c			standard
 geom/journal/g_journal.c	optional geom_journal
 geom/journal/g_journal_ufs.c	optional geom_journal
 geom/label/g_label.c		optional geom_label | geom_label_gpt
 geom/label/g_label_ext2fs.c	optional geom_label
 geom/label/g_label_flashmap.c	optional geom_label
 geom/label/g_label_iso9660.c	optional geom_label
 geom/label/g_label_msdosfs.c	optional geom_label
 geom/label/g_label_ntfs.c	optional geom_label
 geom/label/g_label_reiserfs.c	optional geom_label
 geom/label/g_label_ufs.c	optional geom_label
 geom/label/g_label_gpt.c	optional geom_label | geom_label_gpt
 geom/label/g_label_disk_ident.c	optional geom_label
 geom/linux_lvm/g_linux_lvm.c	optional geom_linux_lvm
 geom/mirror/g_mirror.c		optional geom_mirror
 geom/mirror/g_mirror_ctl.c	optional geom_mirror
 geom/mountver/g_mountver.c	optional geom_mountver
 geom/multipath/g_multipath.c	optional geom_multipath
 geom/nop/g_nop.c		optional geom_nop
 geom/part/g_part.c		standard
 geom/part/g_part_if.m		standard
 geom/part/g_part_apm.c		optional geom_part_apm
 geom/part/g_part_bsd.c		optional geom_part_bsd
 geom/part/g_part_bsd64.c	optional geom_part_bsd64
 geom/part/g_part_ebr.c		optional geom_part_ebr
 geom/part/g_part_gpt.c		optional geom_part_gpt
 geom/part/g_part_ldm.c		optional geom_part_ldm
 geom/part/g_part_mbr.c		optional geom_part_mbr
 geom/part/g_part_vtoc8.c	optional geom_part_vtoc8
 geom/raid/g_raid.c		optional geom_raid
 geom/raid/g_raid_ctl.c		optional geom_raid
 geom/raid/g_raid_md_if.m	optional geom_raid
 geom/raid/g_raid_tr_if.m	optional geom_raid
 geom/raid/md_ddf.c		optional geom_raid
 geom/raid/md_intel.c		optional geom_raid
 geom/raid/md_jmicron.c		optional geom_raid
 geom/raid/md_nvidia.c		optional geom_raid
 geom/raid/md_promise.c		optional geom_raid
 geom/raid/md_sii.c		optional geom_raid
 geom/raid/tr_concat.c		optional geom_raid
 geom/raid/tr_raid0.c		optional geom_raid
 geom/raid/tr_raid1.c		optional geom_raid
 geom/raid/tr_raid1e.c		optional geom_raid
 geom/raid/tr_raid5.c		optional geom_raid
 geom/raid3/g_raid3.c		optional geom_raid3
 geom/raid3/g_raid3_ctl.c	optional geom_raid3
 geom/shsec/g_shsec.c		optional geom_shsec
 geom/stripe/g_stripe.c		optional geom_stripe
 geom/union/g_union.c		optional geom_union
 geom/uzip/g_uzip.c		optional geom_uzip
 geom/uzip/g_uzip_lzma.c		optional geom_uzip
 geom/uzip/g_uzip_wrkthr.c	optional geom_uzip
 geom/uzip/g_uzip_zlib.c		optional geom_uzip
 geom/uzip/g_uzip_zstd.c		optional geom_uzip zstdio \
 	compile-with "${NORMAL_C} -I$S/contrib/zstd/lib/freebsd"
 geom/vinum/geom_vinum.c		optional geom_vinum
 geom/vinum/geom_vinum_create.c	optional geom_vinum
 geom/vinum/geom_vinum_drive.c	optional geom_vinum
 geom/vinum/geom_vinum_plex.c	optional geom_vinum
 geom/vinum/geom_vinum_volume.c	optional geom_vinum
 geom/vinum/geom_vinum_subr.c	optional geom_vinum
 geom/vinum/geom_vinum_raid5.c	optional geom_vinum
 geom/vinum/geom_vinum_share.c	optional geom_vinum
 geom/vinum/geom_vinum_list.c	optional geom_vinum
 geom/vinum/geom_vinum_rm.c	optional geom_vinum
 geom/vinum/geom_vinum_init.c	optional geom_vinum
 geom/vinum/geom_vinum_state.c	optional geom_vinum
 geom/vinum/geom_vinum_rename.c	optional geom_vinum
 geom/vinum/geom_vinum_move.c	optional geom_vinum
 geom/vinum/geom_vinum_events.c	optional geom_vinum
 geom/virstor/binstream.c	optional geom_virstor
 geom/virstor/g_virstor.c	optional geom_virstor
 geom/virstor/g_virstor_md.c	optional geom_virstor
 geom/zero/g_zero.c		optional geom_zero
 fs/ext2fs/ext2_acl.c		optional ext2fs
 fs/ext2fs/ext2_alloc.c		optional ext2fs
 fs/ext2fs/ext2_balloc.c		optional ext2fs
 fs/ext2fs/ext2_bmap.c		optional ext2fs
 fs/ext2fs/ext2_csum.c		optional ext2fs
 fs/ext2fs/ext2_extattr.c	optional ext2fs
 fs/ext2fs/ext2_extents.c	optional ext2fs
 fs/ext2fs/ext2_inode.c		optional ext2fs
 fs/ext2fs/ext2_inode_cnv.c	optional ext2fs
 fs/ext2fs/ext2_hash.c		optional ext2fs
 fs/ext2fs/ext2_htree.c		optional ext2fs
 fs/ext2fs/ext2_lookup.c		optional ext2fs
 fs/ext2fs/ext2_subr.c		optional ext2fs
 fs/ext2fs/ext2_vfsops.c		optional ext2fs
 fs/ext2fs/ext2_vnops.c		optional ext2fs
 #
 isa/isa_if.m			standard
 isa/isa_common.c		optional isa
 isa/isahint.c			optional isa
 isa/pnp.c			optional isa isapnp
 isa/pnpparse.c			optional isa isapnp
 fs/cd9660/cd9660_bmap.c	optional cd9660
 fs/cd9660/cd9660_lookup.c	optional cd9660
 fs/cd9660/cd9660_node.c	optional cd9660
 fs/cd9660/cd9660_rrip.c	optional cd9660
 fs/cd9660/cd9660_util.c	optional cd9660
 fs/cd9660/cd9660_vfsops.c	optional cd9660
 fs/cd9660/cd9660_vnops.c	optional cd9660
 fs/cd9660/cd9660_iconv.c	optional cd9660_iconv
 gnu/gcov/gcc_4_7.c		optional gcov  \
 	warning "kernel contains GPL licensed gcov support"
 gnu/gcov/gcov_fs.c		optional gcov  lindebugfs \
 	compile-with "${LINUXKPI_C}"
 gnu/gcov/gcov_subr.c		optional gcov
 
 kern/bus_if.m			standard
 kern/clock_if.m			standard
 kern/cpufreq_if.m		standard
 kern/device_if.m		standard
 kern/imgact_binmisc.c		optional imgact_binmisc
 kern/imgact_elf.c		standard
 kern/imgact_elf32.c		optional compat_freebsd32
 kern/imgact_shell.c		standard
 kern/init_main.c		standard
 kern/init_sysent.c		standard
 kern/ksched.c			optional _kposix_priority_scheduling
 kern/kern_acct.c		standard
 kern/kern_alq.c			optional alq
 kern/kern_boottrace.c		standard
 kern/kern_clock.c		standard
 kern/kern_clocksource.c		standard
 kern/kern_condvar.c		standard
 kern/kern_conf.c		standard
 kern/kern_cons.c		standard
 kern/kern_cpu.c			standard
 kern/kern_cpuset.c		standard
 kern/kern_context.c		standard
 kern/kern_descrip.c		standard
 kern/kern_devctl.c		standard
 kern/kern_dtrace.c		optional kdtrace_hooks
 kern/kern_dump.c		standard
 kern/kern_environment.c		standard
 kern/kern_et.c			standard
 kern/kern_event.c		standard
 kern/kern_exec.c		standard
 kern/kern_exit.c		standard
 kern/kern_fail.c		standard
 kern/kern_ffclock.c		standard
 kern/kern_fork.c		standard
 kern/kern_hhook.c		standard
 kern/kern_idle.c		standard
 kern/kern_intr.c		standard
 kern/kern_jail.c		standard
 kern/kern_kcov.c		optional kcov			\
 	compile-with "${NORMAL_C:N-fsanitize*} ${NORMAL_C:M-fsanitize=kernel-memory}"
 kern/kern_khelp.c		standard
 kern/kern_kthread.c		standard
 kern/kern_ktr.c			optional ktr
 kern/kern_ktrace.c		standard
 kern/kern_linker.c		standard
 kern/kern_lock.c		standard
 kern/kern_lockf.c		standard
 kern/kern_lockstat.c		optional kdtrace_hooks
 kern/kern_loginclass.c		standard
 kern/kern_malloc.c		standard
 kern/kern_mbuf.c		standard
 kern/kern_mib.c			standard
 kern/kern_module.c		standard
 kern/kern_mtxpool.c		standard
 kern/kern_mutex.c		standard
 kern/kern_ntptime.c		standard
 kern/kern_osd.c			standard
 kern/kern_physio.c		standard
 kern/kern_pmc.c			standard
 kern/kern_poll.c		optional device_polling
 kern/kern_priv.c		standard
 kern/kern_proc.c		standard
 kern/kern_procctl.c		standard
 kern/kern_prot.c		standard
 kern/kern_racct.c		standard
 kern/kern_rangelock.c		standard
 kern/kern_rctl.c		standard
 kern/kern_resource.c		standard
 kern/kern_rmlock.c		standard
 kern/kern_rwlock.c		standard
 kern/kern_sdt.c			optional kdtrace_hooks
 kern/kern_sema.c		standard
 kern/kern_sendfile.c		standard
 kern/kern_sharedpage.c		standard
 kern/kern_shutdown.c		standard
 kern/kern_sig.c			standard
 kern/kern_switch.c		standard
 kern/kern_sx.c			standard
 kern/kern_synch.c		standard
 kern/kern_syscalls.c		standard
 kern/kern_sysctl.c		standard
 kern/kern_tc.c			standard
 kern/kern_thr.c			standard
 kern/kern_thread.c		standard
 kern/kern_time.c		standard
 kern/kern_timeout.c		standard
 kern/kern_tslog.c		optional tslog
 kern/kern_ubsan.c		optional kubsan
 kern/kern_umtx.c		standard
 kern/kern_uuid.c		standard
 kern/kern_vnodedumper.c		standard
 kern/kern_xxx.c			standard
 kern/link_elf.c			standard
 kern/linker_if.m		standard
 kern/md4c.c			optional netsmb
 kern/md5c.c			standard
 kern/p1003_1b.c			standard
 kern/posix4_mib.c		standard
 kern/sched_4bsd.c		optional sched_4bsd
 kern/sched_ule.c		optional sched_ule
 kern/serdev_if.m		standard
 kern/stack_protector.c		standard \
 	compile-with "${NORMAL_C:N-fstack-protector*}"
 kern/subr_acl_nfs4.c		optional ufs_acl | zfs
 kern/subr_acl_posix1e.c		optional ufs_acl
 kern/subr_asan.c		optional kasan \
 	compile-with "${NORMAL_C:N-fsanitize*:N-fstack-protector*}"
 kern/subr_autoconf.c		standard
 kern/subr_blist.c		standard
 kern/subr_boot.c		standard
 kern/subr_bus.c			standard
 kern/subr_bus_dma.c		standard
 kern/subr_bufring.c		standard
 kern/subr_capability.c		standard
 kern/subr_clock.c		standard
 kern/subr_compressor.c		standard \
 	compile-with "${NORMAL_C} -I$S/contrib/zstd/lib/freebsd"
 kern/subr_coverage.c		optional coverage \
 	compile-with "${NORMAL_C:N-fsanitize*}"
 kern/subr_counter.c		standard
 kern/subr_csan.c		optional kcsan \
 	compile-with "${NORMAL_C:N-fsanitize*:N-fstack-protector*}"
 kern/subr_devstat.c		standard
 kern/subr_disk.c		standard
 kern/subr_early.c		standard
 kern/subr_epoch.c		standard
 kern/subr_eventhandler.c	standard
 kern/subr_fattime.c		standard
 kern/subr_firmware.c		optional firmware
 kern/subr_filter.c		standard
 kern/subr_gtaskqueue.c		standard
 kern/subr_hash.c		standard
 kern/subr_hints.c		standard
 kern/subr_kdb.c			standard
 kern/subr_kobj.c		standard
 kern/subr_lock.c		standard
 kern/subr_log.c			standard
 kern/subr_mchain.c		optional libmchain
 kern/subr_module.c		standard
 kern/subr_msan.c		optional kmsan \
 	compile-with "${NORMAL_C:N-fsanitize*:N-fstack-protector*}"
 kern/subr_msgbuf.c		standard
 kern/subr_param.c		standard
 kern/subr_pcpu.c		standard
 kern/subr_pctrie.c		standard
 kern/subr_pidctrl.c		standard
 kern/subr_power.c		standard
 kern/subr_prf.c			standard
 kern/subr_prng.c		standard
 kern/subr_prof.c		standard
 kern/subr_rangeset.c		standard
 kern/subr_rman.c		standard
 kern/subr_rtc.c			standard
 kern/subr_sbuf.c		standard
 kern/subr_scanf.c		standard
 kern/subr_sglist.c		standard
 kern/subr_sleepqueue.c		standard
 kern/subr_smp.c			standard
 kern/subr_smr.c			standard
 kern/subr_stack.c		optional ddb | stack | ktr
 kern/subr_stats.c		optional stats
 kern/subr_taskqueue.c		standard
 kern/subr_terminal.c		optional vt
 kern/subr_trap.c		standard
 kern/subr_turnstile.c		standard
 kern/subr_uio.c			standard
 kern/subr_unit.c		standard
 kern/subr_vmem.c		standard
 kern/subr_witness.c		optional witness
 kern/sys_capability.c		standard
 kern/sys_eventfd.c		standard
 kern/sys_generic.c		standard
 kern/sys_getrandom.c		standard
 kern/sys_pipe.c			standard
 kern/sys_procdesc.c		standard
 kern/sys_process.c		standard
 kern/sys_socket.c		standard
 kern/syscalls.c			standard
 kern/sysv_ipc.c			standard
 kern/sysv_msg.c			optional sysvmsg
 kern/sysv_sem.c			optional sysvsem
 kern/sysv_shm.c			optional sysvshm
 kern/tty.c			standard
 kern/tty_compat.c		optional compat_43tty
 kern/tty_info.c			standard
 kern/tty_inq.c			standard
 kern/tty_outq.c			standard
 kern/tty_pts.c			standard
 kern/tty_tty.c			standard
 kern/tty_ttydisc.c		standard
 kern/uipc_accf.c		standard
 kern/uipc_debug.c		optional ddb
 kern/uipc_domain.c		standard
 kern/uipc_ktls.c		optional kern_tls
 kern/uipc_mbuf.c		standard
 kern/uipc_mbuf2.c		standard
 kern/uipc_mbufhash.c		standard
 kern/uipc_mqueue.c		optional p1003_1b_mqueue
 kern/uipc_sem.c			optional p1003_1b_semaphores
 kern/uipc_shm.c			standard
 kern/uipc_sockbuf.c		standard
 kern/uipc_socket.c		standard
 kern/uipc_syscalls.c		standard
 kern/uipc_usrreq.c		standard
 kern/vfs_acl.c			standard
 kern/vfs_aio.c			standard
 kern/vfs_bio.c			standard
 kern/vfs_cache.c		standard
 kern/vfs_cluster.c		standard
 kern/vfs_default.c		standard
 kern/vfs_export.c		standard
 kern/vfs_extattr.c		standard
 kern/vfs_hash.c			standard
 kern/vfs_init.c			standard
 kern/vfs_lookup.c		standard
 kern/vfs_mount.c		standard
 kern/vfs_mountroot.c		standard
 kern/vfs_subr.c			standard
 kern/vfs_syscalls.c		standard
 kern/vfs_vnops.c		standard
 #
 # Kernel GSS-API
 #
 gssd.h				optional kgssapi			\
 	dependency		"$S/kgssapi/gssd.x"			\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -hM $S/kgssapi/gssd.x | grep -v pthread.h > gssd.h" \
 	no-obj no-implicit-rule before-depend local			\
 	clean			"gssd.h"
 gssd_xdr.c			optional kgssapi			\
 	dependency		"$S/kgssapi/gssd.x gssd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -c $S/kgssapi/gssd.x -o gssd_xdr.c" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean			"gssd_xdr.c"
 gssd_clnt.c			optional kgssapi			\
 	dependency		"$S/kgssapi/gssd.x gssd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -lM $S/kgssapi/gssd.x | grep -v string.h > gssd_clnt.c" \
 	no-ctfconvert no-implicit-rule before-depend local		\
 	clean			"gssd_clnt.c"
 kgssapi/gss_accept_sec_context.c optional kgssapi
 kgssapi/gss_add_oid_set_member.c optional kgssapi
 kgssapi/gss_acquire_cred.c	optional kgssapi
 kgssapi/gss_canonicalize_name.c	optional kgssapi
 kgssapi/gss_create_empty_oid_set.c optional kgssapi
 kgssapi/gss_delete_sec_context.c optional kgssapi
 kgssapi/gss_display_status.c	optional kgssapi
 kgssapi/gss_export_name.c	optional kgssapi
 kgssapi/gss_get_mic.c		optional kgssapi
 kgssapi/gss_init_sec_context.c	optional kgssapi
 kgssapi/gss_impl.c		optional kgssapi
 kgssapi/gss_import_name.c	optional kgssapi
 kgssapi/gss_names.c		optional kgssapi
 kgssapi/gss_pname_to_uid.c	optional kgssapi
 kgssapi/gss_release_buffer.c	optional kgssapi
 kgssapi/gss_release_cred.c	optional kgssapi
 kgssapi/gss_release_name.c	optional kgssapi
 kgssapi/gss_release_oid_set.c	optional kgssapi
 kgssapi/gss_set_cred_option.c	optional kgssapi
 kgssapi/gss_test_oid_set_member.c optional kgssapi
 kgssapi/gss_unwrap.c		optional kgssapi
 kgssapi/gss_verify_mic.c	optional kgssapi
 kgssapi/gss_wrap.c		optional kgssapi
 kgssapi/gss_wrap_size_limit.c	optional kgssapi
 kgssapi/gssd_prot.c		optional kgssapi
 kgssapi/krb5/krb5_mech.c	optional kgssapi
 kgssapi/krb5/kcrypto.c		optional kgssapi
 kgssapi/krb5/kcrypto_aes.c	optional kgssapi
 kgssapi/kgss_if.m		optional kgssapi
 kgssapi/gsstest.c		optional kgssapi_debug
 # These files in libkern/ are those needed by all architectures.  Some
 # of the files in libkern/ are only needed on some architectures, e.g.,
 # libkern/divdi3.c is needed by i386 but not alpha.  Also, some of these
 # routines may be optimized for a particular platform.  In either case,
 # the file should be moved to conf/files.<arch> from here.
 #
 libkern/arc4random.c		standard
 libkern/arc4random_uniform.c	standard
 libkern/asprintf.c		standard
 libkern/bcd.c			standard
 libkern/bsearch.c		standard
 libkern/explicit_bzero.c	standard
 libkern/fnmatch.c		standard
 libkern/gsb_crc32.c		standard
 libkern/iconv.c			optional libiconv
 libkern/iconv_converter_if.m	optional libiconv
 libkern/iconv_ucs.c		optional libiconv
 libkern/iconv_xlat.c		optional libiconv
 libkern/iconv_xlat16.c		optional libiconv
 libkern/inet_aton.c		standard
 libkern/inet_ntoa.c		standard
 libkern/inet_ntop.c		standard
 libkern/inet_pton.c		standard
 libkern/jenkins_hash.c		standard
 libkern/murmur3_32.c		standard
 libkern/memcchr.c		standard
 libkern/memchr.c		standard
 libkern/memmem.c		optional gdb
 libkern/qsort.c			standard
 libkern/qsort_r.c		standard
 libkern/random.c		standard
 libkern/scanc.c			standard
 libkern/strcasecmp.c		standard
 libkern/strcasestr.c		standard
 libkern/strcat.c		standard
 libkern/strchr.c		standard
 libkern/strchrnul.c		optional gdb
 libkern/strcpy.c		standard
 libkern/strcspn.c		standard
 libkern/strdup.c		standard
 libkern/strndup.c		standard
 libkern/strlcat.c		standard
 libkern/strlcpy.c		standard
 libkern/strncat.c		standard
 libkern/strncpy.c		standard
 libkern/strnlen.c		standard
 libkern/strnstr.c		standard
 libkern/strrchr.c		standard
 libkern/strsep.c		standard
 libkern/strspn.c		standard
 libkern/strstr.c		standard
 libkern/strtol.c		standard
 libkern/strtoq.c		standard
 libkern/strtoul.c		standard
 libkern/strtouq.c		standard
 libkern/strvalid.c		standard
 libkern/timingsafe_bcmp.c	standard
 contrib/zlib/adler32.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/compress.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/crc32.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/deflate.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/inffast.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/inflate.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/inftrees.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/trees.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/uncompr.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 contrib/zlib/zutil.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib \
 	compile-with "${ZLIB_C}"
 dev/zlib/zlib_mod.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib
 dev/zlib/zcalloc.c		optional crypto | geom_uzip | \
 	mxge | ddb_ctf | gzio | zfs | zlib
 net/altq/altq_cbq.c		optional altq
 net/altq/altq_codel.c		optional altq
 net/altq/altq_hfsc.c		optional altq
 net/altq/altq_fairq.c		optional altq
 net/altq/altq_priq.c		optional altq
 net/altq/altq_red.c		optional altq
 net/altq/altq_rio.c		optional altq
 net/altq/altq_rmclass.c		optional altq
 net/altq/altq_subr.c		optional altq
 net/bpf.c			standard
 net/bpf_buffer.c		optional bpf
 net/bpf_jitter.c		optional bpf_jitter
 net/bpf_filter.c		optional bpf | netgraph_bpf
 net/bpf_zerocopy.c		optional bpf
 net/bridgestp.c			optional bridge | if_bridge
 net/ieee8023ad_lacp.c		optional lagg
 net/if.c			standard
 net/ifq.c			standard
 net/if_bridge.c			optional bridge inet | if_bridge inet
 net/if_clone.c			standard
 net/if_dead.c			standard
 net/if_disc.c			optional disc
 net/if_edsc.c			optional edsc
 net/if_enc.c			optional enc inet | enc inet6
 net/if_epair.c			optional epair
 net/if_ethersubr.c		optional ether
 net/if_fwsubr.c			optional fwip
 net/if_gif.c			optional gif inet | gif inet6 | \
 					 netgraph_gif inet | netgraph_gif inet6
 net/if_gre.c			optional gre inet | gre inet6
 net/if_ipsec.c			optional inet ipsec | inet6 ipsec
 net/if_lagg.c			optional lagg
 net/if_loop.c			optional loop
 net/if_llatbl.c			standard
 net/if_me.c			optional me inet
 net/if_media.c			standard
 net/if_mib.c			standard
 net/if_ovpn.c			optional ovpn inet | ovpn inet6
 net/if_stf.c			optional stf inet inet6
 net/if_tuntap.c			optional tuntap
 net/if_vlan.c			optional vlan
 net/if_vxlan.c			optional vxlan inet | vxlan inet6
 net/ifdi_if.m			optional ether pci iflib
 net/iflib.c			optional ether pci iflib
 net/iflib_clone.c		optional ether pci iflib
 net/mp_ring.c			optional ether iflib
 net/mppcc.c			optional netgraph_mppc_compression
 net/mppcd.c			optional netgraph_mppc_compression
 net/netisr.c			standard
 net/debugnet.c			optional inet debugnet
 net/debugnet_inet.c		optional inet debugnet
 net/pfil.c			optional ether | inet
 net/radix.c			standard
 net/route.c			standard
 net/route/nhgrp.c		optional route_mpath
 net/route/nhgrp_ctl.c		optional route_mpath
 net/route/nhop.c		standard
 net/route/nhop_ctl.c		standard
 net/route/nhop_utils.c		standard
 net/route/fib_algo.c		optional fib_algo
 net/route/route_ctl.c		standard
 net/route/route_ddb.c		optional ddb
 net/route/route_helpers.c	standard
 net/route/route_ifaddrs.c	standard
 net/route/route_rtentry.c	standard
 net/route/route_subscription.c	standard
 net/route/route_tables.c	standard
 net/route/route_temporal.c	standard
 net/rss_config.c		optional inet rss | inet6 rss
 net/rtsock.c			standard
 net/slcompress.c		optional netgraph_vjc
 net/toeplitz.c			optional inet rss | inet6 rss | route_mpath
 net/vnet.c			optional vimage
 net80211/ieee80211.c		optional wlan
 net80211/ieee80211_acl.c	optional wlan wlan_acl
 net80211/ieee80211_action.c	optional wlan
 net80211/ieee80211_adhoc.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_ageq.c	optional wlan
 net80211/ieee80211_amrr.c	optional wlan | wlan_amrr
 net80211/ieee80211_crypto.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_crypto_ccmp.c optional wlan wlan_ccmp
 net80211/ieee80211_crypto_none.c optional wlan
 net80211/ieee80211_crypto_tkip.c optional wlan wlan_tkip
 net80211/ieee80211_crypto_wep.c	optional wlan wlan_wep
 net80211/ieee80211_ddb.c	optional wlan ddb
 net80211/ieee80211_dfs.c	optional wlan
 net80211/ieee80211_freebsd.c	optional wlan
 net80211/ieee80211_hostap.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_ht.c		optional wlan
 net80211/ieee80211_hwmp.c	optional wlan ieee80211_support_mesh
 net80211/ieee80211_input.c	optional wlan
 net80211/ieee80211_ioctl.c	optional wlan
 net80211/ieee80211_mesh.c	optional wlan ieee80211_support_mesh \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_monitor.c	optional wlan
 net80211/ieee80211_node.c	optional wlan
 net80211/ieee80211_output.c	optional wlan
 net80211/ieee80211_phy.c	optional wlan
 net80211/ieee80211_power.c	optional wlan
 net80211/ieee80211_proto.c	optional wlan
 net80211/ieee80211_radiotap.c	optional wlan
 net80211/ieee80211_ratectl.c	optional wlan
 net80211/ieee80211_ratectl_none.c optional wlan
 net80211/ieee80211_regdomain.c	optional wlan
 net80211/ieee80211_rssadapt.c	optional wlan wlan_rssadapt
 net80211/ieee80211_scan.c	optional wlan
 net80211/ieee80211_scan_sta.c	optional wlan
 net80211/ieee80211_sta.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_superg.c	optional wlan ieee80211_support_superg
 net80211/ieee80211_scan_sw.c	optional wlan
 net80211/ieee80211_tdma.c	optional wlan ieee80211_support_tdma
 net80211/ieee80211_vht.c	optional wlan
 net80211/ieee80211_wds.c	optional wlan
 net80211/ieee80211_xauth.c	optional wlan wlan_xauth
 net80211/ieee80211_alq.c	optional wlan ieee80211_alq
 netgraph/bluetooth/common/ng_bluetooth.c optional netgraph_bluetooth
 netgraph/bluetooth/drivers/ubt/ng_ubt.c optional netgraph_bluetooth_ubt usb
 netgraph/bluetooth/drivers/ubt/ng_ubt_intel.c optional netgraph_bluetooth_ubt usb
 netgraph/bluetooth/drivers/ubtbcmfw/ubtbcmfw.c optional netgraph_bluetooth_ubtbcmfw usb
 netgraph/bluetooth/hci/ng_hci_cmds.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_evnt.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_main.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_misc.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_ulpi.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/l2cap/ng_l2cap_cmds.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_evnt.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_llpi.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_main.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_misc.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_ulpi.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/socket/ng_btsocket.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_hci_raw.c	optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_l2cap.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_l2cap_raw.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_rfcomm.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_sco.c optional netgraph_bluetooth_socket
 netgraph/netflow/netflow.c	optional netgraph_netflow
 netgraph/netflow/netflow_v9.c	optional netgraph_netflow
 netgraph/netflow/ng_netflow.c	optional netgraph_netflow
 netgraph/ng_UI.c		optional netgraph_UI
 netgraph/ng_async.c		optional netgraph_async
 netgraph/ng_base.c		optional netgraph
 netgraph/ng_bpf.c		optional netgraph_bpf
 netgraph/ng_bridge.c		optional netgraph_bridge
 netgraph/ng_car.c		optional netgraph_car
 netgraph/ng_checksum.c		optional netgraph_checksum
 netgraph/ng_cisco.c		optional netgraph_cisco
 netgraph/ng_deflate.c		optional netgraph_deflate
 netgraph/ng_device.c		optional netgraph_device
 netgraph/ng_echo.c		optional netgraph_echo
 netgraph/ng_eiface.c		optional netgraph_eiface
 netgraph/ng_ether.c		optional netgraph_ether
 netgraph/ng_ether_echo.c	optional netgraph_ether_echo
 netgraph/ng_frame_relay.c	optional netgraph_frame_relay
 netgraph/ng_gif.c		optional netgraph_gif inet6 | netgraph_gif inet
 netgraph/ng_gif_demux.c		optional netgraph_gif_demux
 netgraph/ng_hole.c		optional netgraph_hole
 netgraph/ng_iface.c		optional netgraph_iface
 netgraph/ng_ip_input.c		optional netgraph_ip_input
 netgraph/ng_ipfw.c		optional netgraph_ipfw inet ipfirewall
 netgraph/ng_ksocket.c		optional netgraph_ksocket
 netgraph/ng_l2tp.c		optional netgraph_l2tp
 netgraph/ng_lmi.c		optional netgraph_lmi
 netgraph/ng_macfilter.c		optional netgraph_macfilter
 netgraph/ng_mppc.c		optional netgraph_mppc_compression | \
 					 netgraph_mppc_encryption
 netgraph/ng_nat.c		optional netgraph_nat inet libalias
 netgraph/ng_one2many.c		optional netgraph_one2many
 netgraph/ng_parse.c		optional netgraph
 netgraph/ng_patch.c		optional netgraph_patch
 netgraph/ng_pipe.c		optional netgraph_pipe
 netgraph/ng_ppp.c		optional netgraph_ppp
 netgraph/ng_pppoe.c		optional netgraph_pppoe
 netgraph/ng_pptpgre.c		optional netgraph_pptpgre
 netgraph/ng_pred1.c		optional netgraph_pred1
 netgraph/ng_rfc1490.c		optional netgraph_rfc1490
 netgraph/ng_socket.c		optional netgraph_socket
 netgraph/ng_split.c		optional netgraph_split
 netgraph/ng_tag.c		optional netgraph_tag
 netgraph/ng_tcpmss.c		optional netgraph_tcpmss
 netgraph/ng_tee.c		optional netgraph_tee
 netgraph/ng_tty.c		optional netgraph_tty
 netgraph/ng_vjc.c		optional netgraph_vjc
 netgraph/ng_vlan.c		optional netgraph_vlan
 netgraph/ng_vlan_rotate.c	optional netgraph_vlan_rotate
 netinet/accf_data.c		optional accept_filter_data inet
 netinet/accf_dns.c		optional accept_filter_dns inet
 netinet/accf_http.c		optional accept_filter_http inet
 netinet/if_ether.c		optional inet ether
 netinet/igmp.c			optional inet
 netinet/in.c			optional inet
 netinet/in_cksum.c		optional inet | inet6
 netinet/in_debug.c		optional inet ddb
 netinet/in_kdtrace.c		optional inet | inet6
 netinet/ip_carp.c		optional inet carp | inet6 carp
 netinet/in_fib.c		optional inet
 netinet/in_fib_algo.c		optional inet fib_algo
 netinet/in_gif.c		optional gif inet | netgraph_gif inet
 netinet/ip_gre.c		optional gre inet
 netinet/ip_id.c			optional inet
 netinet/in_jail.c		optional inet
 netinet/in_mcast.c		optional inet
 netinet/in_pcb.c		optional inet | inet6
 netinet/in_prot.c		optional inet | inet6
 netinet/in_proto.c		optional inet | inet6
 netinet/in_rmx.c		optional inet
 netinet/in_rss.c		optional inet rss
 netinet/ip_divert.c		optional ipdivert inet | ipdivert inet6
 netinet/ip_ecn.c		optional inet | inet6
 netinet/ip_encap.c		optional inet | inet6
 netinet/ip_fastfwd.c		optional inet
 netinet/ip_icmp.c		optional inet | inet6
 netinet/ip_input.c		optional inet
 netinet/ip_mroute.c		optional mrouting inet
 netinet/ip_options.c		optional inet
 netinet/ip_output.c		optional inet
 netinet/ip_reass.c		optional inet
 netinet/raw_ip.c		optional inet | inet6
 netinet/cc/cc.c			optional cc_newreno inet | cc_vegas inet | \
 	cc_htcp inet | cc_hd inet | cc_dctcp inet | cc_cubic inet | \
 	cc_chd inet | cc_cdg inet | cc_newreno inet6 | cc_vegas inet6 | \
 	cc_htcp inet6 | cc_hd inet6 |cc_dctcp inet6 | cc_cubic inet6 | \
 	cc_chd inet6 | cc_cdg inet6
 netinet/cc/cc_cdg.c		optional inet cc_cdg tcp_hhook
 netinet/cc/cc_chd.c		optional inet cc_chd tcp_hhook
 netinet/cc/cc_cubic.c		optional inet cc_cubic | inet6 cc_cubic
 netinet/cc/cc_dctcp.c		optional inet cc_dctcp | inet6 cc_dctcp
 netinet/cc/cc_hd.c		optional inet cc_hd tcp_hhook
 netinet/cc/cc_htcp.c		optional inet cc_htcp | inet6 cc_htcp
 netinet/cc/cc_newreno.c		optional inet cc_newreno | inet6 cc_newreno
 netinet/cc/cc_vegas.c		optional inet cc_vegas tcp_hhook
 netinet/khelp/h_ertt.c		optional inet tcp_hhook
 netinet/sctp_asconf.c		optional inet sctp | inet6 sctp
 netinet/sctp_auth.c		optional inet sctp | inet6 sctp
 netinet/sctp_bsd_addr.c		optional inet sctp | inet6 sctp
 netinet/sctp_cc_functions.c	optional inet sctp | inet6 sctp
 netinet/sctp_crc32.c		optional inet | inet6
 netinet/sctp_indata.c		optional inet sctp | inet6 sctp
 netinet/sctp_input.c		optional inet sctp | inet6 sctp
 netinet/sctp_kdtrace.c		optional inet sctp | inet6 sctp
 netinet/sctp_output.c		optional inet sctp | inet6 sctp
 netinet/sctp_pcb.c		optional inet sctp | inet6 sctp
 netinet/sctp_peeloff.c		optional inet sctp | inet6 sctp
 netinet/sctp_ss_functions.c	optional inet sctp | inet6 sctp
 netinet/sctp_syscalls.c		optional inet sctp | inet6 sctp
 netinet/sctp_sysctl.c		optional inet sctp | inet6 sctp
 netinet/sctp_timer.c		optional inet sctp | inet6 sctp
 netinet/sctp_usrreq.c		optional inet sctp | inet6 sctp
 netinet/sctputil.c		optional inet sctp | inet6 sctp
 netinet/siftr.c			optional inet siftr alq | inet6 siftr alq
 netinet/tcp_ecn.c		optional inet | inet6
 netinet/tcp_fastopen.c		optional inet tcp_rfc7413 | inet6 tcp_rfc7413
 netinet/tcp_hostcache.c		optional inet | inet6
 netinet/tcp_input.c		optional inet | inet6
 netinet/tcp_log_buf.c		optional tcp_blackbox inet | tcp_blackbox inet6
 netinet/tcp_lro.c		optional inet | inet6
 netinet/tcp_output.c		optional inet | inet6
 netinet/tcp_offload.c		optional tcp_offload inet | tcp_offload inet6
 netinet/tcp_hpts.c		optional tcphpts inet | tcphpts inet6
 netinet/tcp_ratelimit.c		optional ratelimit inet | ratelimit inet6
 netinet/tcp_pcap.c		optional inet tcppcap | inet6 tcppcap \
 	compile-with "${NORMAL_C} ${NO_WNONNULL}"
 netinet/tcp_reass.c		optional inet | inet6
 netinet/tcp_sack.c		optional inet | inet6
 netinet/tcp_stats.c		optional stats inet | stats inet6
 netinet/tcp_subr.c		optional inet | inet6
 netinet/tcp_syncache.c		optional inet | inet6
 netinet/tcp_timer.c		optional inet | inet6
 netinet/tcp_timewait.c		optional inet | inet6
 netinet/tcp_usrreq.c		optional inet | inet6
 netinet/udp_usrreq.c		optional inet | inet6
 netinet/libalias/alias.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_db.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_mod.c	optional libalias | netgraph_nat
 netinet/libalias/alias_proxy.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_util.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_sctp.c	optional libalias inet | netgraph_nat inet
 netinet/netdump/netdump_client.c optional inet debugnet netdump
 netinet6/dest6.c		optional inet6
 netinet6/frag6.c		optional inet6
 netinet6/icmp6.c		optional inet6
 netinet6/in6.c			optional inet6
 netinet6/in6_cksum.c		optional inet6
 netinet6/in6_fib.c		optional inet6
 netinet6/in6_fib_algo.c		optional inet6 fib_algo
 netinet6/in6_gif.c		optional gif inet6 | netgraph_gif inet6
 netinet6/in6_ifattach.c		optional inet6
 netinet6/in6_jail.c		optional inet6
 netinet6/in6_mcast.c		optional inet6
 netinet6/in6_pcb.c		optional inet6
 netinet6/in6_proto.c		optional inet6
 netinet6/in6_rmx.c		optional inet6
 netinet6/in6_rss.c		optional inet6 rss
 netinet6/in6_src.c		optional inet6
 netinet6/ip6_fastfwd.c		optional inet6
 netinet6/ip6_forward.c		optional inet6
 netinet6/ip6_gre.c		optional gre inet6
 netinet6/ip6_id.c		optional inet6
 netinet6/ip6_input.c		optional inet6
 netinet6/ip6_mroute.c		optional mrouting inet6
 netinet6/ip6_output.c		optional inet6
 netinet6/mld6.c			optional inet6
 netinet6/nd6.c			optional inet6
 netinet6/nd6_nbr.c		optional inet6
 netinet6/nd6_rtr.c		optional inet6
 netinet6/raw_ip6.c		optional inet6
 netinet6/route6.c		optional inet6
 netinet6/scope6.c		optional inet6
 netinet6/sctp6_usrreq.c		optional inet6 sctp
 netinet6/udp6_usrreq.c		optional inet6
 netipsec/ipsec.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_input.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_mbuf.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_mod.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_output.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_pcb.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/key.c			optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/key_debug.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/keysock.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/subr_ipsec.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/udpencap.c		optional ipsec inet
 netipsec/xform_ah.c		optional ipsec inet | ipsec inet6
 netipsec/xform_esp.c		optional ipsec inet | ipsec inet6
 netipsec/xform_ipcomp.c		optional ipsec inet | ipsec inet6
 netipsec/xform_tcp.c		optional ipsec inet tcp_signature | \
 	 ipsec inet6 tcp_signature | ipsec_support inet tcp_signature | \
 	 ipsec_support inet6 tcp_signature
 netlink/netlink_generic_kpi.c	standard
 netlink/netlink_glue.c		standard
 netlink/netlink_message_parser.c	standard
 netlink/netlink_domain.c	optional netlink
 netlink/netlink_generic.c	optional netlink
 netlink/netlink_io.c		optional netlink
 netlink/netlink_message_writer.c	optional netlink
 netlink/netlink_module.c	optional netlink
 netlink/netlink_route.c		optional netlink
 netlink/route/iface_drivers.c	optional netlink
 netlink/route/iface.c		optional netlink
 netlink/route/neigh.c		optional netlink
 netlink/route/nexthop.c		optional netlink
 netlink/route/rt.c		optional netlink
 netpfil/ipfw/dn_aqm_codel.c	optional inet dummynet
 netpfil/ipfw/dn_aqm_pie.c	optional inet dummynet
 netpfil/ipfw/dn_heap.c		optional inet dummynet
 netpfil/ipfw/dn_sched_fifo.c	optional inet dummynet
 netpfil/ipfw/dn_sched_fq_codel.c	optional inet dummynet
 netpfil/ipfw/dn_sched_fq_pie.c	optional inet dummynet
 netpfil/ipfw/dn_sched_prio.c	optional inet dummynet
 netpfil/ipfw/dn_sched_qfq.c	optional inet dummynet
 netpfil/ipfw/dn_sched_rr.c	optional inet dummynet
 netpfil/ipfw/dn_sched_wf2q.c	optional inet dummynet
 netpfil/ipfw/ip_dummynet.c	optional inet dummynet
 netpfil/ipfw/ip_dn_io.c		optional inet dummynet
 netpfil/ipfw/ip_dn_glue.c	optional inet dummynet
 netpfil/ipfw/ip_fw2.c		optional inet ipfirewall
 netpfil/ipfw/ip_fw_bpf.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_dynamic.c	optional inet ipfirewall \
 	compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 netpfil/ipfw/ip_fw_eaction.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_log.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_pfil.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_sockopt.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_table.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_table_algo.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_table_value.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_iface.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_nat.c	optional inet ipfirewall_nat
 netpfil/ipfw/nat64/ip_fw_nat64.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64clat.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64clat_control.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64lsn.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64 compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 netpfil/ipfw/nat64/nat64lsn_control.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64 compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 netpfil/ipfw/nat64/nat64stl.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64stl_control.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64_translate.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nptv6/ip_fw_nptv6.c	optional inet inet6 ipfirewall \
 	ipfirewall_nptv6
 netpfil/ipfw/nptv6/nptv6.c	optional inet inet6 ipfirewall \
 	ipfirewall_nptv6
 netpfil/ipfw/pmod/ip_fw_pmod.c	optional inet ipfirewall_pmod
 netpfil/ipfw/pmod/tcpmod.c	optional inet ipfirewall_pmod
 netpfil/pf/if_pflog.c		optional pflog pf inet
 netpfil/pf/if_pfsync.c		optional pfsync pf inet
 netpfil/pf/pf.c			optional pf inet
 netpfil/pf/pf_if.c		optional pf inet
 netpfil/pf/pf_ioctl.c		optional pf inet
 netpfil/pf/pf_lb.c		optional pf inet
 netpfil/pf/pf_norm.c		optional pf inet
 netpfil/pf/pf_nv.c		optional pf inet
 netpfil/pf/pf_osfp.c		optional pf inet
 netpfil/pf/pf_ruleset.c		optional pf inet
 netpfil/pf/pf_syncookies.c	optional pf inet
 netpfil/pf/pf_table.c		optional pf inet
 netpfil/pf/pfsync_nv.c		optional pfsync pf inet
 netpfil/pf/in4_cksum.c		optional pf inet
 netsmb/smb_conn.c		optional netsmb
 netsmb/smb_crypt.c		optional netsmb
 netsmb/smb_dev.c		optional netsmb
 netsmb/smb_iod.c		optional netsmb
 netsmb/smb_rq.c			optional netsmb
 netsmb/smb_smb.c		optional netsmb
 netsmb/smb_subr.c		optional netsmb
 netsmb/smb_trantcp.c		optional netsmb
 netsmb/smb_usr.c		optional netsmb
 nfs/bootp_subr.c		optional bootp nfscl
 nfs/krpc_subr.c			optional bootp nfscl
 nfs/nfs_diskless.c		optional nfscl nfs_root
 nfs/nfs_nfssvc.c		optional nfscl | nfslockd | nfsd
 nlm/nlm_advlock.c		optional nfslockd | nfsd
 nlm/nlm_prot_clnt.c		optional nfslockd | nfsd
 nlm/nlm_prot_impl.c		optional nfslockd | nfsd
 nlm/nlm_prot_server.c		optional nfslockd | nfsd
 nlm/nlm_prot_svc.c		optional nfslockd | nfsd
 nlm/nlm_prot_xdr.c		optional nfslockd | nfsd
 nlm/sm_inter_xdr.c		optional nfslockd | nfsd
 
 # Linux Kernel Programming Interface
 compat/linuxkpi/common/src/linux_80211.c	optional compat_linuxkpi wlan \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_80211_macops.c	optional compat_linuxkpi wlan \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_kmod.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_acpi.c		optional compat_linuxkpi acpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_compat.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_current.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_devres.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_dmi.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_domain.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_firmware.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_fpu.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_hrtimer.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_i2c.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_i2cbb.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_interrupt.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_kthread.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_lock.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_netdev.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_page.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_pci.c		optional compat_linuxkpi pci \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_tasklet.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_idr.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_radix.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_rcu.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C} -I$S/contrib/ck/include"
 compat/linuxkpi/common/src/linux_schedule.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_shmemfs.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_shrinker.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_skbuff.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_slab.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_usb.c		optional compat_linuxkpi usb \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_work.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_xarray.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/lkpi_iic_if.m	optional compat_linuxkpi
 
 compat/linuxkpi/common/src/linux_seq_file.c	optional compat_linuxkpi | lindebugfs \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_simple_attr.c	optional compat_linuxkpi | lindebugfs \
 	compile-with "${LINUXKPI_C}"
 compat/lindebugfs/lindebugfs.c			optional lindebugfs \
 	compile-with "${LINUXKPI_C}"
 
 # OpenFabrics Enterprise Distribution (Infiniband)
 net/if_infiniband.c					optional ofed | lagg
 ofed/drivers/infiniband/core/ib_addr.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_agent.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_cache.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_cm.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_cma.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_core_uverbs.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_cq.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_device.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_fmr_pool.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_iwcm.c			optional ofed	\
 	compile-with "${OFED_C} ${NO_WUNUSED_BUT_SET_VARIABLE}"
 ofed/drivers/infiniband/core/ib_iwpm_msg.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_iwpm_util.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_mad.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_mad_rmpp.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_multicast.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_packer.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_rdma_core.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_roce_gid_mgmt.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_sa_query.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_smi.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_sysfs.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_ucm.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_ucma.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_ud_header.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_umem.c			optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_user_mad.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_cmd.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_ioctl.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_main.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_marshall.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_async_fd.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_counters.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_cq.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_dm.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_flow_action.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_std_types_mr.c	optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_uverbs_uapi.c		optional ofed	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/core/ib_verbs.c			optional ofed	\
 	compile-with "${OFED_C}"
 
 ofed/drivers/infiniband/ulp/ipoib/ipoib_cm.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 #ofed/drivers/infiniband/ulp/ipoib/ipoib_fs.c	optional ipoib		\
 #	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_ib.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_main.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_multicast.c	optional ipoib	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_verbs.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 #ofed/drivers/infiniband/ulp/ipoib/ipoib_vlan.c	optional ipoib		\
 #	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 
 ofed/drivers/infiniband/ulp/sdp/sdp_bcopy.c	optional sdp inet	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_main.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_rx.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/ ${NO_WUNUSED_BUT_SET_VARIABLE}"
 ofed/drivers/infiniband/ulp/sdp/sdp_cma.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_tx.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/ ${NO_WUNUSED_BUT_SET_VARIABLE}"
 
 dev/irdma/icrdma.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_cm.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_ctrl.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_hmc.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_hw.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/icrdma_hw.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/fbsd_kcompat.c	optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_kcompat.c	optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_pble.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_puda.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_uda.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_uk.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_utils.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_verbs.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 dev/irdma/irdma_ws.c		optional irdma ice inet inet6 pci ofed \
 	compile-with "${OFED_C} -I$S/dev/ice/"
 
 dev/mthca/mthca_allocator.c		optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_av.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_catas.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_cmd.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_cq.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_eq.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_mad.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_main.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_mcg.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_memfree.c		optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_mr.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_pd.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_profile.c		optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_provider.c		optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_qp.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_reset.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_srq.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 dev/mthca/mthca_uar.c			optional mthca pci ofed \
 	compile-with "${OFED_C}"
 
 dev/mlx4/mlx4_ib/mlx4_ib_alias_GUID.c		optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_mcg.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_sysfs.c		optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_cm.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_ah.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_cq.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_doorbell.c		optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_mad.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_main.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_mr.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_qp.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_srq.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_wc.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 
 dev/mlx4/mlx4_core/mlx4_alloc.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_catas.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_cmd.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_cq.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_eq.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_fw.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_fw_qos.c		optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_icm.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_intf.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_main.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_mcg.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_mr.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_pd.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_port.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_profile.c		optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_qp.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_reset.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_sense.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_srq.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_resource_tracker.c	optional mlx4 pci \
 	compile-with "${OFED_C}"
 
 dev/mlx4/mlx4_en/mlx4_en_cq.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_main.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_netdev.c		optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_port.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_resources.c		optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_rx.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_tx.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 
 dev/mlx5/mlx5_ib/mlx5_ib_ah.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_cong.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_cq.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_devx.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_doorbell.c		optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_gsi.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_mad.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_main.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_mem.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_mr.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_qp.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_srq.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_ib/mlx5_ib_virt.c			optional mlx5ib pci ofed \
 	compile-with "${OFED_C}"
 
 dev/mlx5/mlx5_core/mlx5_alloc.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_cmd.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_cq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
+dev/mlx5/mlx5_core/mlx5_diag_cnt.c		optional mlx5 pci	\
+	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_diagnostics.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_eq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_eswitch.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_fs_cmd.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_fs_tcp.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_fs_tree.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_fw.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_fwdump.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_health.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mad.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_main.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mcg.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mpfs.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mr.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_pagealloc.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_pd.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_port.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_qp.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_rl.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_srq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_tls.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_transobj.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_uar.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_vport.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_vsc.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_wq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_lib/mlx5_gid.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 
 dev/mlx5/mlx5_en/mlx5_en_dim.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_ethtool.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_main.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_tx.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_flow_table.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_hw_tls.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_iq.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_rx.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_rl.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_txrx.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_port_buffer.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 
 # crypto support
 opencrypto/cbc_mac.c		optional crypto
 opencrypto/criov.c		optional crypto
 opencrypto/crypto.c		optional crypto
 opencrypto/cryptodev.c		optional cryptodev
 opencrypto/cryptodev_if.m	optional crypto
 opencrypto/cryptosoft.c		optional crypto
 opencrypto/cryptodeflate.c	optional crypto
 opencrypto/gmac.c		optional crypto
 opencrypto/gfmult.c		optional crypto
 opencrypto/ktls_ocf.c		optional kern_tls
 opencrypto/rmd160.c		optional crypto
 opencrypto/xform_aes_cbc.c	optional crypto
 opencrypto/xform_aes_icm.c	optional crypto
 opencrypto/xform_aes_xts.c	optional crypto
 opencrypto/xform_cbc_mac.c	optional crypto
 opencrypto/xform_chacha20_poly1305.c	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include -I$S/crypto/libsodium"
 opencrypto/xform_cml.c		optional crypto
 opencrypto/xform_deflate.c	optional crypto
 opencrypto/xform_gmac.c		optional crypto
 opencrypto/xform_null.c		optional crypto
 opencrypto/xform_poly1305.c	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include -I$S/crypto/libsodium"
 opencrypto/xform_rmd160.c	optional crypto
 opencrypto/xform_sha1.c		optional crypto
 opencrypto/xform_sha2.c		optional crypto
 contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/ed25519_ref10.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium -Wno-unused-function"
 contrib/libsodium/src/libsodium/crypto_core/hchacha20/core_hchacha20.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/onetimeauth_poly1305.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/donna/poly1305_donna.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 contrib/libsodium/src/libsodium/crypto_scalarmult/curve25519/scalarmult_curve25519.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 contrib/libsodium/src/libsodium/crypto_scalarmult/curve25519/ref10/x25519_ref10.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium -Wno-unused-function"
 contrib/libsodium/src/libsodium/crypto_stream/chacha20/stream_chacha20.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 contrib/libsodium/src/libsodium/crypto_stream/chacha20/ref/chacha20_ref.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 contrib/libsodium/src/libsodium/crypto_verify/sodium/verify.c \
 	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include/sodium -I$S/crypto/libsodium"
 crypto/libsodium/randombytes.c	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include -I$S/crypto/libsodium"
 crypto/libsodium/utils.c	optional crypto \
 	compile-with "${NORMAL_C} -I$S/contrib/libsodium/src/libsodium/include -I$S/crypto/libsodium"
 
 rpc/auth_none.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/auth_unix.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/authunix_prot.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_bck.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_dg.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_rc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_vc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/getnetconfig.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/replay.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpc_callmsg.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/rpc_generic.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/rpc_prot.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcb_clnt.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcb_prot.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_auth.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_auth_unix.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_dg.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_generic.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_vc.c			optional krpc | nfslockd | nfscl | nfsd
 #
 # Kernel RPC-over-TLS
 #
 rpctlscd.h			optional krpc | nfslockd | nfscl | nfsd	\
 	dependency		"$S/rpc/rpcsec_tls/rpctlscd.x"			\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -hM $S/rpc/rpcsec_tls/rpctlscd.x | grep -v pthread.h > rpctlscd.h" \
 	no-obj no-implicit-rule before-depend local			\
 	clean			"rpctlscd.h"
 rpctlscd_xdr.c			optional krpc | nfslockd | nfscl | nfsd	\
 	dependency		"$S/rpc/rpcsec_tls/rpctlscd.x rpctlscd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -c $S/rpc/rpcsec_tls/rpctlscd.x -o rpctlscd_xdr.c" no-ctfconvert \
 	no-implicit-rule before-depend local				\
 	clean			"rpctlscd_xdr.c"
 rpctlscd_clnt.c			optional krpc | nfslockd | nfscl | nfsd	\
 	dependency		"$S/rpc/rpcsec_tls/rpctlscd.x rpctlscd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -lM $S/rpc/rpcsec_tls/rpctlscd.x | grep -v string.h > rpctlscd_clnt.c" no-ctfconvert \
 	no-implicit-rule before-depend local				\
 	clean			"rpctlscd_clnt.c"
 rpctlssd.h			optional krpc | nfslockd | nfscl | nfsd	\
 	dependency		"$S/rpc/rpcsec_tls/rpctlssd.x"			\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -hM $S/rpc/rpcsec_tls/rpctlssd.x | grep -v pthread.h > rpctlssd.h" \
 	no-obj no-implicit-rule before-depend local			\
 	clean			"rpctlssd.h"
 rpctlssd_xdr.c			optional krpc | nfslockd | nfscl | nfsd	\
 	dependency		"$S/rpc/rpcsec_tls/rpctlssd.x rpctlssd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -c $S/rpc/rpcsec_tls/rpctlssd.x -o rpctlssd_xdr.c" no-ctfconvert \
 	no-implicit-rule before-depend local				\
 	clean			"rpctlssd_xdr.c"
 rpctlssd_clnt.c			optional krpc | nfslockd | nfscl | nfsd	\
 	dependency		"$S/rpc/rpcsec_tls/rpctlssd.x rpctlssd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -lM $S/rpc/rpcsec_tls/rpctlssd.x | grep -v string.h > rpctlssd_clnt.c" no-ctfconvert \
 	no-implicit-rule before-depend local				\
 	clean			"rpctlssd_clnt.c"
 rpc/rpcsec_tls/rpctls_impl.c	optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcsec_tls/auth_tls.c	optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcsec_gss/rpcsec_gss.c	optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/rpcsec_gss_conf.c optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/rpcsec_gss_misc.c optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/rpcsec_gss_prot.c optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/svc_rpcsec_gss.c	optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 security/audit/audit.c		optional audit
 security/audit/audit_arg.c	optional audit
 security/audit/audit_bsm.c	optional audit
 security/audit/audit_bsm_db.c	optional audit
 security/audit/audit_bsm_klib.c	optional audit
 security/audit/audit_dtrace.c	optional dtaudit audit | dtraceall audit compile-with "${CDDL_C}"
 security/audit/audit_pipe.c	optional audit
 security/audit/audit_syscalls.c	standard
 security/audit/audit_trigger.c	optional audit
 security/audit/audit_worker.c	optional audit
 security/audit/bsm_domain.c	optional audit
 security/audit/bsm_errno.c	optional audit
 security/audit/bsm_fcntl.c	optional audit
 security/audit/bsm_socket_type.c	optional audit
 security/audit/bsm_token.c	optional audit
 security/mac/mac_audit.c	optional mac audit
 security/mac/mac_cred.c		optional mac
 security/mac/mac_kdb.c		optional mac
 security/mac/mac_framework.c	optional mac
 security/mac/mac_inet.c		optional mac inet | mac inet6
 security/mac/mac_inet6.c	optional mac inet6
 security/mac/mac_label.c	optional mac
 security/mac/mac_net.c		optional mac
 security/mac/mac_pipe.c		optional mac
 security/mac/mac_posix_sem.c	optional mac
 security/mac/mac_posix_shm.c	optional mac
 security/mac/mac_priv.c		optional mac
 security/mac/mac_process.c	optional mac
 security/mac/mac_socket.c	optional mac
 security/mac/mac_syscalls.c	standard
 security/mac/mac_system.c	optional mac
 security/mac/mac_sysv_msg.c	optional mac
 security/mac/mac_sysv_sem.c	optional mac
 security/mac/mac_sysv_shm.c	optional mac
 security/mac/mac_vfs.c		optional mac
 security/mac_biba/mac_biba.c	optional mac_biba
 security/mac_ddb/mac_ddb.c	optional mac_ddb
 security/mac_bsdextended/mac_bsdextended.c	optional mac_bsdextended
 security/mac_bsdextended/ugidfw_system.c	optional mac_bsdextended
 security/mac_bsdextended/ugidfw_vnode.c		optional mac_bsdextended
 security/mac_ifoff/mac_ifoff.c	optional mac_ifoff
 security/mac_lomac/mac_lomac.c	optional mac_lomac
 security/mac_mls/mac_mls.c	optional mac_mls
 security/mac_none/mac_none.c	optional mac_none
 security/mac_ntpd/mac_ntpd.c	optional mac_ntpd
 security/mac_partition/mac_partition.c optional mac_partition
 security/mac_portacl/mac_portacl.c optional mac_portacl
 security/mac_priority/mac_priority.c	optional mac_priority
 security/mac_seeotheruids/mac_seeotheruids.c optional mac_seeotheruids
 security/mac_stub/mac_stub.c	optional mac_stub
 security/mac_test/mac_test.c	optional mac_test
 security/mac_veriexec/mac_veriexec.c			optional mac_veriexec
 security/mac_veriexec/veriexec_fingerprint.c		optional mac_veriexec
 security/mac_veriexec/veriexec_metadata.c		optional mac_veriexec
 security/mac_veriexec_parser/mac_veriexec_parser.c	optional mac_veriexec mac_veriexec_parser
 security/mac_veriexec/mac_veriexec_rmd160.c		optional mac_veriexec_rmd160
 security/mac_veriexec/mac_veriexec_sha1.c		optional mac_veriexec_sha1
 security/mac_veriexec/mac_veriexec_sha256.c		optional mac_veriexec_sha256
 security/mac_veriexec/mac_veriexec_sha384.c		optional mac_veriexec_sha384
 security/mac_veriexec/mac_veriexec_sha512.c		optional mac_veriexec_sha512
 teken/teken.c			optional sc !SC_NO_TERM_TEKEN | vt
 ufs/ffs/ffs_alloc.c		optional ffs
 ufs/ffs/ffs_balloc.c		optional ffs
 ufs/ffs/ffs_inode.c		optional ffs
 ufs/ffs/ffs_snapshot.c		optional ffs
 ufs/ffs/ffs_softdep.c		optional ffs
 ufs/ffs/ffs_subr.c		optional ffs | geom_label
 ufs/ffs/ffs_tables.c		optional ffs | geom_label
 ufs/ffs/ffs_vfsops.c		optional ffs
 ufs/ffs/ffs_vnops.c		optional ffs
 ufs/ffs/ffs_rawread.c		optional ffs directio
 ufs/ffs/ffs_suspend.c		optional ffs
 ufs/ufs/ufs_acl.c		optional ffs
 ufs/ufs/ufs_bmap.c		optional ffs
 ufs/ufs/ufs_dirhash.c		optional ffs
 ufs/ufs/ufs_extattr.c		optional ffs
 ufs/ufs/ufs_gjournal.c		optional ffs UFS_GJOURNAL
 ufs/ufs/ufs_inode.c		optional ffs
 ufs/ufs/ufs_lookup.c		optional ffs
 ufs/ufs/ufs_quota.c		optional ffs
 ufs/ufs/ufs_vfsops.c		optional ffs
 ufs/ufs/ufs_vnops.c		optional ffs
 vm/device_pager.c		standard
 vm/phys_pager.c			standard
 vm/redzone.c			optional DEBUG_REDZONE
 vm/sg_pager.c			standard
 vm/swap_pager.c			standard
 vm/uma_core.c			standard
 vm/uma_dbg.c			standard
 vm/memguard.c			optional DEBUG_MEMGUARD
 vm/vm_domainset.c		standard
 vm/vm_fault.c			standard
 vm/vm_glue.c			standard
 vm/vm_init.c			standard
 vm/vm_kern.c			standard
 vm/vm_map.c			standard
 vm/vm_meter.c			standard
 vm/vm_mmap.c			standard
 vm/vm_object.c			standard
 vm/vm_page.c			standard
 vm/vm_pageout.c			standard
 vm/vm_pager.c			standard
 vm/vm_phys.c			standard
 vm/vm_radix.c			standard
 vm/vm_reserv.c			standard
 vm/vm_swapout.c			optional !NO_SWAPPING
 vm/vm_swapout_dummy.c		optional NO_SWAPPING
 vm/vm_unix.c			standard
 vm/vnode_pager.c		standard
 xen/features.c			optional xenhvm
 xen/xen_common.c		optional xenhvm
 xen/xenbus/xenbus_if.m		optional xenhvm
 xen/xenbus/xenbus.c		optional xenhvm
 xen/xenbus/xenbusb_if.m		optional xenhvm
 xen/xenbus/xenbusb.c		optional xenhvm
 xen/xenbus/xenbusb_front.c	optional xenhvm
 xen/xenbus/xenbusb_back.c	optional xenhvm
 xen/xenmem/xenmem_if.m		optional xenhvm
 xdr/xdr.c			optional xdr | krpc | nfslockd | nfscl | nfsd
 xdr/xdr_array.c			optional xdr | krpc | nfslockd | nfscl | nfsd
 xdr/xdr_mbuf.c			optional xdr | krpc | nfslockd | nfscl | nfsd
 xdr/xdr_mem.c			optional xdr | krpc | nfslockd | nfscl | nfsd
 xdr/xdr_reference.c		optional xdr | krpc | nfslockd | nfscl | nfsd
 xdr/xdr_sizeof.c		optional xdr | krpc | nfslockd | nfscl | nfsd
diff --git a/sys/dev/mlx5/driver.h b/sys/dev/mlx5/driver.h
index 47ed4a9d73f3..12e6de958371 100644
--- a/sys/dev/mlx5/driver.h
+++ b/sys/dev/mlx5/driver.h
@@ -1,1231 +1,1253 @@
 /*-
  * Copyright (c) 2013-2019, Mellanox Technologies, Ltd.  All rights reserved.
+ * Copyright (c) 2022 NVIDIA corporation & affiliates.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
  * $FreeBSD$
  */
 
 #ifndef MLX5_DRIVER_H
 #define MLX5_DRIVER_H
 
 #include "opt_ratelimit.h"
 
 #include <linux/kernel.h>
 #include <linux/completion.h>
 #include <linux/pci.h>
 #include <linux/cache.h>
 #include <linux/rbtree.h>
 #include <linux/if_ether.h>
 #include <linux/semaphore.h>
 #include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/radix-tree.h>
 #include <linux/idr.h>
 #include <linux/wait.h>
 
 #include <dev/mlx5/device.h>
 #include <dev/mlx5/doorbell.h>
 #include <dev/mlx5/srq.h>
 
 #define MLX5_QCOUNTER_SETS_NETDEV 64
 #define MLX5_MAX_NUMBER_OF_VFS 128
 
 #define MLX5_INVALID_QUEUE_HANDLE 0xffffffff
 
 enum {
 	MLX5_BOARD_ID_LEN = 64,
 	MLX5_MAX_NAME_LEN = 16,
 };
 
 enum {
 	MLX5_CMD_TIMEOUT_MSEC	= 60 * 1000,
 };
 
 enum {
 	CMD_OWNER_SW		= 0x0,
 	CMD_OWNER_HW		= 0x1,
 	CMD_STATUS_SUCCESS	= 0,
 };
 
 enum mlx5_sqp_t {
 	MLX5_SQP_SMI		= 0,
 	MLX5_SQP_GSI		= 1,
 	MLX5_SQP_IEEE_1588	= 2,
 	MLX5_SQP_SNIFFER	= 3,
 	MLX5_SQP_SYNC_UMR	= 4,
 };
 
 enum {
 	MLX5_MAX_PORTS	= 2,
 };
 
 enum {
 	MLX5_EQ_VEC_PAGES	 = 0,
 	MLX5_EQ_VEC_CMD		 = 1,
 	MLX5_EQ_VEC_ASYNC	 = 2,
 	MLX5_EQ_VEC_COMP_BASE,
 };
 
 enum {
 	MLX5_ATOMIC_MODE_OFF		= 16,
 	MLX5_ATOMIC_MODE_NONE		= 0 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_IB_COMP	= 1 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_CX		= 2 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_8B		= 3 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_16B		= 4 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_32B		= 5 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_64B		= 6 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_128B		= 7 << MLX5_ATOMIC_MODE_OFF,
 	MLX5_ATOMIC_MODE_256B		= 8 << MLX5_ATOMIC_MODE_OFF,
 };
 
 enum {
 	MLX5_ATOMIC_MODE_DCT_OFF	= 20,
 	MLX5_ATOMIC_MODE_DCT_NONE	= 0 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_IB_COMP	= 1 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_CX		= 2 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_8B		= 3 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_16B	= 4 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_32B	= 5 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_64B	= 6 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_128B	= 7 << MLX5_ATOMIC_MODE_DCT_OFF,
 	MLX5_ATOMIC_MODE_DCT_256B	= 8 << MLX5_ATOMIC_MODE_DCT_OFF,
 };
 
 enum {
 	MLX5_ATOMIC_OPS_CMP_SWAP		= 1 << 0,
 	MLX5_ATOMIC_OPS_FETCH_ADD		= 1 << 1,
 	MLX5_ATOMIC_OPS_MASKED_CMP_SWAP		= 1 << 2,
 	MLX5_ATOMIC_OPS_MASKED_FETCH_ADD	= 1 << 3,
 };
 
 enum {
 	MLX5_REG_QPTS		 = 0x4002,
 	MLX5_REG_QETCR		 = 0x4005,
 	MLX5_REG_QPDP		 = 0x4007,
 	MLX5_REG_QTCT		 = 0x400A,
 	MLX5_REG_QPDPM		 = 0x4013,
 	MLX5_REG_QHLL		 = 0x4016,
 	MLX5_REG_QCAM		 = 0x4019,
 	MLX5_REG_DCBX_PARAM	 = 0x4020,
 	MLX5_REG_DCBX_APP	 = 0x4021,
 	MLX5_REG_FPGA_CAP	 = 0x4022,
 	MLX5_REG_FPGA_CTRL	 = 0x4023,
 	MLX5_REG_FPGA_ACCESS_REG = 0x4024,
 	MLX5_REG_FPGA_SHELL_CNTR = 0x4025,
 	MLX5_REG_PCAP		 = 0x5001,
 	MLX5_REG_PMLP		 = 0x5002,
 	MLX5_REG_PMTU		 = 0x5003,
 	MLX5_REG_PTYS		 = 0x5004,
 	MLX5_REG_PAOS		 = 0x5006,
 	MLX5_REG_PFCC		 = 0x5007,
 	MLX5_REG_PPCNT		 = 0x5008,
 	MLX5_REG_PUDE		 = 0x5009,
 	MLX5_REG_PPTB		 = 0x500B,
 	MLX5_REG_PBMC		 = 0x500C,
 	MLX5_REG_PELC		 = 0x500E,
 	MLX5_REG_PVLC		 = 0x500F,
 	MLX5_REG_PMPE		 = 0x5010,
 	MLX5_REG_PMAOS		 = 0x5012,
 	MLX5_REG_PPLM		 = 0x5023,
 	MLX5_REG_PDDR		 = 0x5031,
 	MLX5_REG_PBSR		 = 0x5038,
 	MLX5_REG_PCAM		 = 0x507f,
 	MLX5_REG_NODE_DESC	 = 0x6001,
 	MLX5_REG_HOST_ENDIANNESS = 0x7004,
 	MLX5_REG_MTMP		 = 0x900a,
 	MLX5_REG_MCIA		 = 0x9014,
 	MLX5_REG_MFRL		 = 0x9028,
 	MLX5_REG_MPCNT		 = 0x9051,
 	MLX5_REG_MCQI		 = 0x9061,
 	MLX5_REG_MCC		 = 0x9062,
 	MLX5_REG_MCDA		 = 0x9063,
 	MLX5_REG_MCAM		 = 0x907f,
 };
 
 enum dbg_rsc_type {
 	MLX5_DBG_RSC_QP,
 	MLX5_DBG_RSC_EQ,
 	MLX5_DBG_RSC_CQ,
 };
 
 enum {
 	MLX5_INTERFACE_PROTOCOL_IB  = 0,
 	MLX5_INTERFACE_PROTOCOL_ETH = 1,
 	MLX5_INTERFACE_NUMBER       = 2,
 };
 
 struct mlx5_field_desc {
 	struct dentry	       *dent;
 	int			i;
 };
 
 struct mlx5_rsc_debug {
 	struct mlx5_core_dev   *dev;
 	void		       *object;
 	enum dbg_rsc_type	type;
 	struct dentry	       *root;
 	struct mlx5_field_desc	fields[0];
 };
 
 enum mlx5_dev_event {
 	MLX5_DEV_EVENT_SYS_ERROR,
 	MLX5_DEV_EVENT_PORT_UP,
 	MLX5_DEV_EVENT_PORT_DOWN,
 	MLX5_DEV_EVENT_PORT_INITIALIZED,
 	MLX5_DEV_EVENT_LID_CHANGE,
 	MLX5_DEV_EVENT_PKEY_CHANGE,
 	MLX5_DEV_EVENT_GUID_CHANGE,
 	MLX5_DEV_EVENT_CLIENT_REREG,
 	MLX5_DEV_EVENT_VPORT_CHANGE,
 	MLX5_DEV_EVENT_ERROR_STATE_DCBX,
 	MLX5_DEV_EVENT_REMOTE_CONFIG_CHANGE,
 	MLX5_DEV_EVENT_LOCAL_OPER_CHANGE,
 	MLX5_DEV_EVENT_REMOTE_CONFIG_APPLICATION_PRIORITY_CHANGE,
 };
 
 enum mlx5_port_status {
 	MLX5_PORT_UP        = 1 << 0,
 	MLX5_PORT_DOWN      = 1 << 1,
 };
 
 enum {
 	MLX5_VSC_SPACE_SUPPORTED = 0x1,
 	MLX5_VSC_SPACE_OFFSET	 = 0x4,
 	MLX5_VSC_COUNTER_OFFSET	 = 0x8,
 	MLX5_VSC_SEMA_OFFSET	 = 0xC,
 	MLX5_VSC_ADDR_OFFSET	 = 0x10,
 	MLX5_VSC_DATA_OFFSET	 = 0x14,
 	MLX5_VSC_MAX_RETRIES	 = 0x1000,
 };
 
 #define MLX5_PROT_MASK(link_mode) (1 << link_mode)
 
 struct mlx5_cmd_first {
 	__be32		data[4];
 };
 
 struct cache_ent;
 struct mlx5_fw_page {
 	union {
 		struct rb_node rb_node;
 		struct list_head list;
 	};
 	struct mlx5_cmd_first first;
 	struct mlx5_core_dev *dev;
 	bus_dmamap_t dma_map;
 	bus_addr_t dma_addr;
 	void *virt_addr;
 	struct cache_ent *cache;
 	u32 numpages;
 	u16 load_done;
 #define	MLX5_LOAD_ST_NONE 0
 #define	MLX5_LOAD_ST_SUCCESS 1
 #define	MLX5_LOAD_ST_FAILURE 2
 	u16 func_id;
 };
 #define	mlx5_cmd_msg mlx5_fw_page
 
 struct mlx5_cmd_debug {
 	struct dentry	       *dbg_root;
 	struct dentry	       *dbg_in;
 	struct dentry	       *dbg_out;
 	struct dentry	       *dbg_outlen;
 	struct dentry	       *dbg_status;
 	struct dentry	       *dbg_run;
 	void		       *in_msg;
 	void		       *out_msg;
 	u8			status;
 	u16			inlen;
 	u16			outlen;
 };
 
 struct cache_ent {
 	/* protect block chain allocations
 	 */
 	spinlock_t		lock;
 	struct list_head	head;
 };
 
 struct cmd_msg_cache {
 	struct cache_ent	large;
 	struct cache_ent	med;
 
 };
 
 struct mlx5_traffic_counter {
 	u64         packets;
 	u64         octets;
 };
 
 enum mlx5_cmd_mode {
 	MLX5_CMD_MODE_POLLING,
 	MLX5_CMD_MODE_EVENTS
 };
 
 struct mlx5_cmd_stats {
 	u64		sum;
 	u64		n;
 	struct dentry  *root;
 	struct dentry  *avg;
 	struct dentry  *count;
 	/* protect command average calculations */
 	spinlock_t	lock;
 };
 
 struct mlx5_cmd {
 	struct mlx5_fw_page *cmd_page;
 	bus_dma_tag_t dma_tag;
 	struct sx dma_sx;
 	struct mtx dma_mtx;
 #define	MLX5_DMA_OWNED(dev) mtx_owned(&(dev)->cmd.dma_mtx)
 #define	MLX5_DMA_LOCK(dev) mtx_lock(&(dev)->cmd.dma_mtx)
 #define	MLX5_DMA_UNLOCK(dev) mtx_unlock(&(dev)->cmd.dma_mtx)
 	struct cv dma_cv;
 #define	MLX5_DMA_DONE(dev) cv_broadcast(&(dev)->cmd.dma_cv)
 #define	MLX5_DMA_WAIT(dev) cv_wait(&(dev)->cmd.dma_cv, &(dev)->cmd.dma_mtx)
 	void	       *cmd_buf;
 	dma_addr_t	dma;
 	u16		cmdif_rev;
 	u8		log_sz;
 	u8		log_stride;
 	int		max_reg_cmds;
 	int		events;
 	u32 __iomem    *vector;
 
 	/* protect command queue allocations
 	 */
 	spinlock_t	alloc_lock;
 
 	/* protect token allocations
 	 */
 	spinlock_t	token_lock;
 	u8		token;
 	unsigned long	bitmask;
 	struct semaphore sem;
 	struct semaphore pages_sem;
 	enum mlx5_cmd_mode mode;
 	struct mlx5_cmd_work_ent * volatile ent_arr[MLX5_MAX_COMMANDS];
 	volatile enum mlx5_cmd_mode ent_mode[MLX5_MAX_COMMANDS];
 	struct mlx5_cmd_debug dbg;
 	struct cmd_msg_cache cache;
 	int checksum_disabled;
 	struct mlx5_cmd_stats stats[MLX5_CMD_OP_MAX];
 };
 
 struct mlx5_port_caps {
 	int	gid_table_len;
 	int	pkey_table_len;
 	u8	ext_port_cap;
 };
 
 struct mlx5_buf {
 	bus_dma_tag_t		dma_tag;
 	bus_dmamap_t		dma_map;
 	struct mlx5_core_dev   *dev;
 	struct {
 		void	       *buf;
 	} direct;
 	u64		       *page_list;
 	int			npages;
 	int			size;
 	u8			page_shift;
 	u8			load_done;
 };
 
 struct mlx5_frag_buf {
 	struct mlx5_buf_list	*frags;
 	int			npages;
 	int			size;
 	u8			page_shift;
 };
 
 struct mlx5_eq {
 	struct mlx5_core_dev   *dev;
 	__be32 __iomem	       *doorbell;
 	u32			cons_index;
 	struct mlx5_buf		buf;
 	int			size;
 	u8			irqn;
 	u8			eqn;
 	int			nent;
 	u64			mask;
 	struct list_head	list;
 	int			index;
 	struct mlx5_rsc_debug	*dbg;
 };
 
 struct mlx5_core_psv {
 	u32	psv_idx;
 	struct psv_layout {
 		u32	pd;
 		u16	syndrome;
 		u16	reserved;
 		u16	bg;
 		u16	app_tag;
 		u32	ref_tag;
 	} psv;
 };
 
 struct mlx5_core_sig_ctx {
 	struct mlx5_core_psv	psv_memory;
 	struct mlx5_core_psv	psv_wire;
 	struct ib_sig_err       err_item;
 	bool			sig_status_checked;
 	bool			sig_err_exists;
 	u32			sigerr_count;
 };
 
 enum {
 	MLX5_MKEY_MR = 1,
 	MLX5_MKEY_MW,
 	MLX5_MKEY_INDIRECT_DEVX,
 };
 
 struct mlx5_core_mkey {
 	u64			iova;
 	u64			size;
 	u32			key;
 	u32			pd;
 	u32			type;
 };
 
 enum mlx5_res_type {
 	MLX5_RES_QP	= MLX5_EVENT_QUEUE_TYPE_QP,
 	MLX5_RES_RQ	= MLX5_EVENT_QUEUE_TYPE_RQ,
 	MLX5_RES_SQ	= MLX5_EVENT_QUEUE_TYPE_SQ,
 	MLX5_RES_SRQ	= 3,
 	MLX5_RES_XSRQ	= 4,
 	MLX5_RES_XRQ	= 5,
 	MLX5_RES_DCT	= MLX5_EVENT_QUEUE_TYPE_DCT,
 };
 
 struct mlx5_core_rsc_common {
 	enum mlx5_res_type	res;
 	atomic_t		refcount;
 	struct completion	free;
 };
 
 struct mlx5_uars_page {
 	void __iomem	       *map;
 	bool			wc;
 	u32			index;
 	struct list_head	list;
 	unsigned int		bfregs;
 	unsigned long	       *reg_bitmap; /* for non fast path bf regs */
 	unsigned long	       *fp_bitmap;
 	unsigned int		reg_avail;
 	unsigned int		fp_avail;
 	struct kref		ref_count;
 	struct mlx5_core_dev   *mdev;
 };
 
 struct mlx5_bfreg_head {
 	/* protect blue flame registers allocations */
 	struct mutex		lock;
 	struct list_head	list;
 };
 
 struct mlx5_bfreg_data {
 	struct mlx5_bfreg_head	reg_head;
 	struct mlx5_bfreg_head	wc_head;
 };
 
 struct mlx5_sq_bfreg {
 	void __iomem	       *map;
 	struct mlx5_uars_page  *up;
 	bool			wc;
 	u32			index;
 	unsigned int		offset;
 };
 
 struct mlx5_core_srq {
 	struct mlx5_core_rsc_common	common; /* must be first */
 	u32				srqn;
 	int				max;
 	size_t				max_gs;
 	size_t				max_avail_gather;
 	int				wqe_shift;
 	void				(*event)(struct mlx5_core_srq *, int);
 	atomic_t			refcount;
 	struct completion		free;
 };
 
 struct mlx5_ib_dev;
 struct mlx5_eq_table {
 	void __iomem	       *update_ci;
 	void __iomem	       *update_arm_ci;
 	struct list_head	comp_eqs_list;
 	struct mlx5_eq		pages_eq;
 	struct mlx5_eq		async_eq;
 	struct mlx5_eq		cmd_eq;
 	int			num_comp_vectors;
 	spinlock_t		lock;	/* protect EQs list */
 	struct mlx5_ib_dev	*dev;	/* for devx event notifier */
 	bool (*cb)(struct mlx5_core_dev *mdev,
 		   uint8_t event_type, void *data);
 };
 
 struct mlx5_core_health {
 	struct mlx5_health_buffer __iomem	*health;
 	__be32 __iomem		       *health_counter;
 	struct timer_list		timer;
 	u32				prev;
 	int				miss_counter;
 	u32				fatal_error;
 	struct workqueue_struct	       *wq_watchdog;
 	struct work_struct		work_watchdog;
 	/* wq spinlock to synchronize draining */
 	spinlock_t			wq_lock;
 	struct workqueue_struct	       *wq;
 	unsigned long			flags;
 	struct work_struct		work;
 	struct delayed_work		recover_work;
 	unsigned int			last_reset_req;
 	struct work_struct		work_cmd_completion;
 	struct workqueue_struct	       *wq_cmd;
 };
 
 #define	MLX5_CQ_LINEAR_ARRAY_SIZE	1024
 
 struct mlx5_cq_linear_array_entry {
 	struct mlx5_core_cq * volatile cq;
 };
 
 struct mlx5_cq_table {
 	/* protect radix tree
 	 */
 	spinlock_t		writerlock;
 	atomic_t		writercount;
 	struct radix_tree_root	tree;
 	struct mlx5_cq_linear_array_entry linear_array[MLX5_CQ_LINEAR_ARRAY_SIZE];
 };
 
 struct mlx5_qp_table {
 	/* protect radix tree
 	 */
 	spinlock_t		lock;
 	struct radix_tree_root	tree;
 };
 
 struct mlx5_srq_table {
 	/* protect radix tree
 	 */
 	spinlock_t		lock;
 	struct radix_tree_root	tree;
 };
 
 struct mlx5_mr_table {
 	/* protect radix tree
 	 */
 	spinlock_t		lock;
 	struct radix_tree_root	tree;
 };
 
 #ifdef RATELIMIT
 struct mlx5_rl_entry {
 	u32			rate;
 	u16			burst;
 	u16			index;
 	u32			qos_handle; /* schedule queue handle */
 	u32			refcount;
 };
 
 struct mlx5_rl_table {
 	struct mutex		rl_lock;
 	u16			max_size;
 	u32			max_rate;
 	u32			min_rate;
 	struct mlx5_rl_entry   *rl_entry;
 };
 #endif
 
 struct mlx5_pme_stats {
 	u64			status_counters[MLX5_MODULE_STATUS_NUM];
 	u64			error_counters[MLX5_MODULE_EVENT_ERROR_NUM];
 };
 
 struct mlx5_priv {
 	char			name[MLX5_MAX_NAME_LEN];
 	struct mlx5_eq_table	eq_table;
 	struct msix_entry	*msix_arr;
 	MLX5_DECLARE_DOORBELL_LOCK(cq_uar_lock);
 	int			disable_irqs;
 
 	/* pages stuff */
 	struct workqueue_struct *pg_wq;
 	struct rb_root		page_root;
 	s64			fw_pages;
 	atomic_t		reg_pages;
 	s64			pages_per_func[MLX5_MAX_NUMBER_OF_VFS];
 	struct mlx5_core_health health;
 
 	struct mlx5_srq_table	srq_table;
 
 	/* start: qp staff */
 	struct mlx5_qp_table	qp_table;
 	struct dentry	       *qp_debugfs;
 	struct dentry	       *eq_debugfs;
 	struct dentry	       *cq_debugfs;
 	struct dentry	       *cmdif_debugfs;
 	/* end: qp staff */
 
 	/* start: cq staff */
 	struct mlx5_cq_table	cq_table;
 	/* end: cq staff */
 
 	/* start: mr staff */
 	struct mlx5_mr_table	mr_table;
 	/* end: mr staff */
 
 	/* start: alloc staff */
 	int			numa_node;
 
 	struct mutex   pgdir_mutex;
 	struct list_head        pgdir_list;
 	/* end: alloc staff */
 	struct dentry	       *dbg_root;
 
 	/* protect mkey key part */
 	spinlock_t		mkey_lock;
 	u8			mkey_key;
 
 	struct list_head        dev_list;
 	struct list_head        ctx_list;
 	spinlock_t              ctx_lock;
 	unsigned long		pci_dev_data;
 #ifdef RATELIMIT
 	struct mlx5_rl_table	rl_table;
 #endif
 	struct mlx5_pme_stats pme_stats;
 
 	struct mlx5_eswitch	*eswitch;
 
 	struct mlx5_bfreg_data		bfregs;
 	struct mlx5_uars_page	       *uar;
 };
 
 enum mlx5_device_state {
 	MLX5_DEVICE_STATE_UP,
 	MLX5_DEVICE_STATE_INTERNAL_ERROR,
 };
 
 enum mlx5_interface_state {
 	MLX5_INTERFACE_STATE_UP = 0x1,
 	MLX5_INTERFACE_STATE_TEARDOWN = 0x2,
 };
 
 enum mlx5_pci_status {
 	MLX5_PCI_STATUS_DISABLED,
 	MLX5_PCI_STATUS_ENABLED,
 };
 
 #define	MLX5_MAX_RESERVED_GIDS	8
 
 struct mlx5_rsvd_gids {
 	unsigned int start;
 	unsigned int count;
 	struct ida ida;
 };
 
 struct mlx5_special_contexts {
 	int resd_lkey;
 };
 
+struct mlx5_diag_cnt_id {
+	u16	id;
+	bool	enabled;
+};
+
+struct mlx5_diag_cnt {
+#define	DIAG_LOCK(dc) mutex_lock(&(dc)->lock)
+#define	DIAG_UNLOCK(dc) mutex_unlock(&(dc)->lock)
+	struct mutex lock;
+	struct sysctl_ctx_list sysctl_ctx;
+	struct mlx5_diag_cnt_id *cnt_id;
+	u16	num_of_samples;
+	u16	sample_index;
+	u8	num_cnt_id;
+	u8	log_num_of_samples;
+	u8	log_sample_period;
+	u8	flag;
+	u8	ready;
+};
+
 struct mlx5_flow_root_namespace;
 struct mlx5_core_dev {
 	struct pci_dev	       *pdev;
 	/* sync pci state */
 	struct mutex		pci_status_mutex;
 	enum mlx5_pci_status	pci_status;
 	char			board_id[MLX5_BOARD_ID_LEN];
 	struct mlx5_cmd		cmd;
 	struct mlx5_port_caps	port_caps[MLX5_MAX_PORTS];
 	u32 hca_caps_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
 	u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
 	struct {
 		u32 pcam[MLX5_ST_SZ_DW(pcam_reg)];
 		u32 mcam[MLX5_ST_SZ_DW(mcam_reg)];
 		u32 qcam[MLX5_ST_SZ_DW(qcam_reg)];
 		u32 fpga[MLX5_ST_SZ_DW(fpga_cap)];
 	} caps;
 	phys_addr_t		iseg_base;
 	struct mlx5_init_seg __iomem *iseg;
 	enum mlx5_device_state	state;
 	/* sync interface state */
 	struct mutex		intf_state_mutex;
 	unsigned long		intf_state;
 	void			(*event) (struct mlx5_core_dev *dev,
 					  enum mlx5_dev_event event,
 					  unsigned long param);
 	struct mlx5_priv	priv;
 	struct mlx5_profile	*profile;
 	atomic_t		num_qps;
+	struct mlx5_diag_cnt	diag_cnt;
 	u32			vsc_addr;
 	u32			issi;
 	struct mlx5_special_contexts special_contexts;
 	unsigned int module_status[MLX5_MAX_PORTS];
 	struct mlx5_flow_root_namespace *root_ns;
 	struct mlx5_flow_root_namespace *fdb_root_ns;
 	struct mlx5_flow_root_namespace *esw_egress_root_ns;
 	struct mlx5_flow_root_namespace *esw_ingress_root_ns;
 	struct mlx5_flow_root_namespace *sniffer_rx_root_ns;
 	struct mlx5_flow_root_namespace *sniffer_tx_root_ns;
 	u32 num_q_counter_allocated[MLX5_INTERFACE_NUMBER];
 	struct mlx5_crspace_regmap *dump_rege;
 	uint32_t *dump_data;
 	unsigned dump_size;
 	bool dump_valid;
 	bool dump_copyout;
 	struct mtx dump_lock;
 
 	struct sysctl_ctx_list	sysctl_ctx;
 	int			msix_eqvec;
 	int			pwr_status;
 	int			pwr_value;
 
 	struct {
 		struct mlx5_rsvd_gids	reserved_gids;
 		atomic_t		roce_en;
 	} roce;
 
 	struct {
 		spinlock_t	spinlock;
 #define	MLX5_MPFS_TABLE_MAX 32
 		long		bitmap[BITS_TO_LONGS(MLX5_MPFS_TABLE_MAX)];
 	} mpfs;
 #ifdef CONFIG_MLX5_FPGA
 	struct mlx5_fpga_device	*fpga;
 #endif
 };
 
 enum {
 	MLX5_WOL_DISABLE       = 0,
 	MLX5_WOL_SECURED_MAGIC = 1 << 1,
 	MLX5_WOL_MAGIC         = 1 << 2,
 	MLX5_WOL_ARP           = 1 << 3,
 	MLX5_WOL_BROADCAST     = 1 << 4,
 	MLX5_WOL_MULTICAST     = 1 << 5,
 	MLX5_WOL_UNICAST       = 1 << 6,
 	MLX5_WOL_PHY_ACTIVITY  = 1 << 7,
 };
 
 struct mlx5_db {
 	__be32			*db;
 	union {
 		struct mlx5_db_pgdir		*pgdir;
 		struct mlx5_ib_user_db_page	*user_page;
 	}			u;
 	dma_addr_t		dma;
 	int			index;
 };
 
 struct mlx5_net_counters {
 	u64	packets;
 	u64	octets;
 };
 
 struct mlx5_ptys_reg {
 	u8	an_dis_admin;
 	u8	an_dis_ap;
 	u8	local_port;
 	u8	proto_mask;
 	u32	eth_proto_cap;
 	u16	ib_link_width_cap;
 	u16	ib_proto_cap;
 	u32	eth_proto_admin;
 	u16	ib_link_width_admin;
 	u16	ib_proto_admin;
 	u32	eth_proto_oper;
 	u16	ib_link_width_oper;
 	u16	ib_proto_oper;
 	u32	eth_proto_lp_advertise;
 };
 
 struct mlx5_pvlc_reg {
 	u8	local_port;
 	u8	vl_hw_cap;
 	u8	vl_admin;
 	u8	vl_operational;
 };
 
 struct mlx5_pmtu_reg {
 	u8	local_port;
 	u16	max_mtu;
 	u16	admin_mtu;
 	u16	oper_mtu;
 };
 
 struct mlx5_vport_counters {
 	struct mlx5_net_counters	received_errors;
 	struct mlx5_net_counters	transmit_errors;
 	struct mlx5_net_counters	received_ib_unicast;
 	struct mlx5_net_counters	transmitted_ib_unicast;
 	struct mlx5_net_counters	received_ib_multicast;
 	struct mlx5_net_counters	transmitted_ib_multicast;
 	struct mlx5_net_counters	received_eth_broadcast;
 	struct mlx5_net_counters	transmitted_eth_broadcast;
 	struct mlx5_net_counters	received_eth_unicast;
 	struct mlx5_net_counters	transmitted_eth_unicast;
 	struct mlx5_net_counters	received_eth_multicast;
 	struct mlx5_net_counters	transmitted_eth_multicast;
 };
 
 enum {
 	MLX5_DB_PER_PAGE = MLX5_ADAPTER_PAGE_SIZE / L1_CACHE_BYTES,
 };
 
 struct mlx5_core_dct {
 	struct mlx5_core_rsc_common	common; /* must be first */
 	void (*event)(struct mlx5_core_dct *, int);
 	int			dctn;
 	struct completion	drained;
 	struct mlx5_rsc_debug	*dbg;
 	int			pid;
 	u16			uid;
 };
 
 enum {
 	MLX5_PTYS_IB = 1 << 0,
 	MLX5_PTYS_EN = 1 << 2,
 };
 
 struct mlx5_db_pgdir {
 	struct list_head	list;
 	DECLARE_BITMAP(bitmap, MLX5_DB_PER_PAGE);
 	struct mlx5_fw_page    *fw_page;
 	__be32		       *db_page;
 	dma_addr_t		db_dma;
 };
 
 typedef void (*mlx5_cmd_cbk_t)(int status, void *context);
 
 struct mlx5_cmd_work_ent {
 	struct mlx5_cmd_msg    *in;
 	struct mlx5_cmd_msg    *out;
 	int			uin_size;
 	void		       *uout;
 	int			uout_size;
 	mlx5_cmd_cbk_t		callback;
         struct delayed_work     cb_timeout_work;
 	void		       *context;
 	int			idx;
 	struct completion	done;
 	struct mlx5_cmd        *cmd;
 	struct work_struct	work;
 	struct mlx5_cmd_layout *lay;
 	int			ret;
 	int			page_queue;
 	u8			status;
 	u8			token;
 	u64			ts1;
 	u64			ts2;
 	u16			op;
 	u8			busy;
 	bool			polling;
 };
 
 struct mlx5_pas {
 	u64	pa;
 	u8	log_sz;
 };
 
 enum port_state_policy {
 	MLX5_POLICY_DOWN        = 0,
 	MLX5_POLICY_UP          = 1,
 	MLX5_POLICY_FOLLOW      = 2,
 	MLX5_POLICY_INVALID     = 0xffffffff
 };
 
 static inline void *
 mlx5_buf_offset(struct mlx5_buf *buf, int offset)
 {
 	return ((char *)buf->direct.buf + offset);
 }
 
 
 extern struct workqueue_struct *mlx5_core_wq;
 
 #define STRUCT_FIELD(header, field) \
 	.struct_offset_bytes = offsetof(struct ib_unpacked_ ## header, field),      \
 	.struct_size_bytes   = sizeof((struct ib_unpacked_ ## header *)0)->field
 
 static inline struct mlx5_core_dev *pci2mlx5_core_dev(struct pci_dev *pdev)
 {
 	return pci_get_drvdata(pdev);
 }
 
 extern struct dentry *mlx5_debugfs_root;
 
 static inline u16 fw_rev_maj(struct mlx5_core_dev *dev)
 {
 	return ioread32be(&dev->iseg->fw_rev) & 0xffff;
 }
 
 static inline u16 fw_rev_min(struct mlx5_core_dev *dev)
 {
 	return ioread32be(&dev->iseg->fw_rev) >> 16;
 }
 
 static inline u16 fw_rev_sub(struct mlx5_core_dev *dev)
 {
 	return ioread32be(&dev->iseg->cmdif_rev_fw_sub) & 0xffff;
 }
 
 static inline u16 cmdif_rev_get(struct mlx5_core_dev *dev)
 {
 	return ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
 }
 
 static inline int mlx5_get_gid_table_len(u16 param)
 {
 	if (param > 4) {
 		printf("M4_CORE_DRV_NAME: WARN: ""gid table length is zero\n");
 		return 0;
 	}
 
 	return 8 * (1 << param);
 }
 
 static inline void *mlx5_vzalloc(unsigned long size)
 {
 	void *rtn;
 
 	rtn = kzalloc(size, GFP_KERNEL | __GFP_NOWARN);
 	return rtn;
 }
 
 static inline void *mlx5_vmalloc(unsigned long size)
 {
 	void *rtn;
 
 	rtn = kmalloc(size, GFP_KERNEL | __GFP_NOWARN);
 	if (!rtn)
 		rtn = vmalloc(size);
 	return rtn;
 }
 
 static inline u32 mlx5_base_mkey(const u32 key)
 {
 	return key & 0xffffff00u;
 }
 
 int mlx5_cmd_init(struct mlx5_core_dev *dev);
 void mlx5_cmd_cleanup(struct mlx5_core_dev *dev);
 void mlx5_cmd_use_events(struct mlx5_core_dev *dev);
 void mlx5_cmd_use_polling(struct mlx5_core_dev *dev);
 void mlx5_cmd_mbox_status(void *out, u8 *status, u32 *syndrome);
 int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type);
 
 struct mlx5_async_ctx {
 	struct mlx5_core_dev *dev;
 	atomic_t num_inflight;
 	struct wait_queue_head wait;
 };
 
 struct mlx5_async_work;
 
 typedef void (*mlx5_async_cbk_t)(int status, struct mlx5_async_work *context);
 
 struct mlx5_async_work {
 	struct mlx5_async_ctx *ctx;
 	mlx5_async_cbk_t user_callback;
 };
 
 void mlx5_cmd_init_async_ctx(struct mlx5_core_dev *dev,
 			     struct mlx5_async_ctx *ctx);
 void mlx5_cmd_cleanup_async_ctx(struct mlx5_async_ctx *ctx);
 int mlx5_cmd_exec_cb(struct mlx5_async_ctx *ctx, void *in, int in_size,
 		     void *out, int out_size, mlx5_async_cbk_t callback,
 		     struct mlx5_async_work *work);
 int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
 		  int out_size);
 int mlx5_cmd_exec_polling(struct mlx5_core_dev *dev, void *in, int in_size,
 			  void *out, int out_size);
 int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn);
 int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn);
 int mlx5_alloc_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg,
 		     bool map_wc, bool fast_path);
 void mlx5_free_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg);
 struct mlx5_uars_page *mlx5_get_uars_page(struct mlx5_core_dev *mdev);
 void mlx5_put_uars_page(struct mlx5_core_dev *mdev, struct mlx5_uars_page *up);
 void mlx5_health_cleanup(struct mlx5_core_dev *dev);
 int mlx5_health_init(struct mlx5_core_dev *dev);
 void mlx5_start_health_poll(struct mlx5_core_dev *dev);
 void mlx5_stop_health_poll(struct mlx5_core_dev *dev, bool disable_health);
 void mlx5_drain_health_wq(struct mlx5_core_dev *dev);
 void mlx5_drain_health_recovery(struct mlx5_core_dev *dev);
 void mlx5_trigger_health_work(struct mlx5_core_dev *dev);
 void mlx5_trigger_health_watchdog(struct mlx5_core_dev *dev);
 
 int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, int max_direct,
 		   struct mlx5_buf *buf);
 void mlx5_buf_free(struct mlx5_core_dev *dev, struct mlx5_buf *buf);
 int mlx5_core_create_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
 			 struct mlx5_srq_attr *in);
 int mlx5_core_destroy_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq);
 int mlx5_core_query_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
 			struct mlx5_srq_attr *out);
 int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id);
 int mlx5_core_arm_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
 		      u16 lwm, int is_srq);
 void mlx5_init_mr_table(struct mlx5_core_dev *dev);
 void mlx5_cleanup_mr_table(struct mlx5_core_dev *dev);
 int mlx5_core_create_mkey_cb(struct mlx5_core_dev *dev,
 			     struct mlx5_core_mkey *mkey,
 			     struct mlx5_async_ctx *async_ctx, u32 *in,
 			     int inlen, u32 *out, int outlen,
 			     mlx5_async_cbk_t callback,
 			     struct mlx5_async_work *context);
 int mlx5_core_create_mkey(struct mlx5_core_dev *dev,
 			  struct mlx5_core_mkey *mr,
 			  u32 *in, int inlen);
 int mlx5_core_destroy_mkey(struct mlx5_core_dev *dev, struct mlx5_core_mkey *mkey);
 int mlx5_core_query_mkey(struct mlx5_core_dev *dev, struct mlx5_core_mkey *mkey,
 			 u32 *out, int outlen);
 int mlx5_core_dump_fill_mkey(struct mlx5_core_dev *dev, struct mlx5_core_mkey *mr,
 			     u32 *mkey);
 int mlx5_core_alloc_pd(struct mlx5_core_dev *dev, u32 *pdn, u16 uid);
 int mlx5_core_dealloc_pd(struct mlx5_core_dev *dev, u32 pdn, u16 uid);
 int mlx5_core_mad_ifc(struct mlx5_core_dev *dev, const void *inb, void *outb,
 		      u16 opmod, u8 port);
 void mlx5_fwp_flush(struct mlx5_fw_page *fwp);
 void mlx5_fwp_invalidate(struct mlx5_fw_page *fwp);
 struct mlx5_fw_page *mlx5_fwp_alloc(struct mlx5_core_dev *dev, gfp_t flags, unsigned num);
 void mlx5_fwp_free(struct mlx5_fw_page *fwp);
 u64 mlx5_fwp_get_dma(struct mlx5_fw_page *fwp, size_t offset);
 void *mlx5_fwp_get_virt(struct mlx5_fw_page *fwp, size_t offset);
 void mlx5_pagealloc_init(struct mlx5_core_dev *dev);
 void mlx5_pagealloc_cleanup(struct mlx5_core_dev *dev);
 int mlx5_pagealloc_start(struct mlx5_core_dev *dev);
 void mlx5_pagealloc_stop(struct mlx5_core_dev *dev);
 void mlx5_core_req_pages_handler(struct mlx5_core_dev *dev, u16 func_id,
 				 s32 npages);
 int mlx5_satisfy_startup_pages(struct mlx5_core_dev *dev, int boot);
 int mlx5_reclaim_startup_pages(struct mlx5_core_dev *dev);
 s64 mlx5_wait_for_reclaim_vfs_pages(struct mlx5_core_dev *dev);
 void mlx5_register_debugfs(void);
 void mlx5_unregister_debugfs(void);
 int mlx5_eq_init(struct mlx5_core_dev *dev);
 void mlx5_eq_cleanup(struct mlx5_core_dev *dev);
 void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas);
 void mlx5_cq_completion(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe);
 void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type);
 void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type);
 struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn);
 void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vector, enum mlx5_cmd_mode mode);
 void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type);
 int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx,
 		       int nent, u64 mask);
 int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
 int mlx5_start_eqs(struct mlx5_core_dev *dev);
 int mlx5_stop_eqs(struct mlx5_core_dev *dev);
 int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn);
 int mlx5_core_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn);
 int mlx5_core_detach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn);
 int mlx5_core_set_dc_cnak_trace(struct mlx5_core_dev *dev, int enable,
 				u64 addr);
 
 int mlx5_qp_debugfs_init(struct mlx5_core_dev *dev);
 void mlx5_qp_debugfs_cleanup(struct mlx5_core_dev *dev);
 int mlx5_core_access_reg(struct mlx5_core_dev *dev, void *data_in,
 			 int size_in, void *data_out, int size_out,
 			 u16 reg_num, int arg, int write);
 
 void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
 
 int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
 void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
 int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
 		       u32 *out, int outlen);
 int mlx5_eq_debugfs_init(struct mlx5_core_dev *dev);
 void mlx5_eq_debugfs_cleanup(struct mlx5_core_dev *dev);
 int mlx5_cq_debugfs_init(struct mlx5_core_dev *dev);
 void mlx5_cq_debugfs_cleanup(struct mlx5_core_dev *dev);
 int mlx5_db_alloc(struct mlx5_core_dev *dev, struct mlx5_db *db);
 void mlx5_db_free(struct mlx5_core_dev *dev, struct mlx5_db *db);
 
 static inline struct domainset *
 mlx5_dev_domainset(struct mlx5_core_dev *mdev)
 {
 	return (linux_get_vm_domain_set(mdev->priv.numa_node));
 }
 
 const char *mlx5_command_str(int command);
 int mlx5_cmdif_debugfs_init(struct mlx5_core_dev *dev);
 void mlx5_cmdif_debugfs_cleanup(struct mlx5_core_dev *dev);
 int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn,
 			 int npsvs, u32 *sig_index);
 int mlx5_core_destroy_psv(struct mlx5_core_dev *dev, int psv_num);
 void mlx5_core_put_rsc(struct mlx5_core_rsc_common *common);
 u8 mlx5_is_wol_supported(struct mlx5_core_dev *dev);
 int mlx5_set_wol(struct mlx5_core_dev *dev, u8 wol_mode);
 int mlx5_set_dropless_mode(struct mlx5_core_dev *dev, u16 timeout);
 int mlx5_query_dropless_mode(struct mlx5_core_dev *dev, u16 *timeout);
 int mlx5_query_wol(struct mlx5_core_dev *dev, u8 *wol_mode);
 int mlx5_core_access_pvlc(struct mlx5_core_dev *dev,
 			  struct mlx5_pvlc_reg *pvlc, int write);
 int mlx5_core_access_ptys(struct mlx5_core_dev *dev,
 			  struct mlx5_ptys_reg *ptys, int write);
 int mlx5_core_access_pmtu(struct mlx5_core_dev *dev,
 			  struct mlx5_pmtu_reg *pmtu, int write);
 int mlx5_vxlan_udp_port_add(struct mlx5_core_dev *dev, u16 port);
 int mlx5_vxlan_udp_port_delete(struct mlx5_core_dev *dev, u16 port);
 int mlx5_query_port_cong_status(struct mlx5_core_dev *mdev, int protocol,
 				int priority, int *is_enable);
 int mlx5_modify_port_cong_status(struct mlx5_core_dev *mdev, int protocol,
 				 int priority, int enable);
 int mlx5_query_port_cong_params(struct mlx5_core_dev *mdev, int protocol,
 				void *out, int out_size);
 int mlx5_modify_port_cong_params(struct mlx5_core_dev *mdev,
 				 void *in, int in_size);
 int mlx5_query_port_cong_statistics(struct mlx5_core_dev *mdev, int clear,
 				    void *out, int out_size);
 int mlx5_set_diagnostic_params(struct mlx5_core_dev *mdev, void *in,
 			       int in_size);
 int mlx5_query_diagnostic_counters(struct mlx5_core_dev *mdev,
 				   u8 num_of_samples, u16 sample_index,
 				   void *out, int out_size);
 int mlx5_vsc_find_cap(struct mlx5_core_dev *mdev);
 int mlx5_vsc_lock(struct mlx5_core_dev *mdev);
 void mlx5_vsc_unlock(struct mlx5_core_dev *mdev);
 int mlx5_vsc_set_space(struct mlx5_core_dev *mdev, u16 space);
 int mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected);
 int mlx5_vsc_write(struct mlx5_core_dev *mdev, u32 addr, const u32 *data);
 int mlx5_vsc_read(struct mlx5_core_dev *mdev, u32 addr, u32 *data);
 int mlx5_vsc_lock_addr_space(struct mlx5_core_dev *mdev, u32 addr);
 int mlx5_vsc_unlock_addr_space(struct mlx5_core_dev *mdev, u32 addr);
 int mlx5_pci_read_power_status(struct mlx5_core_dev *mdev,
 			       u16 *p_power, u8 *p_status);
 
 static inline u32 mlx5_mkey_to_idx(u32 mkey)
 {
 	return mkey >> 8;
 }
 
 static inline u32 mlx5_idx_to_mkey(u32 mkey_idx)
 {
 	return mkey_idx << 8;
 }
 
 static inline u8 mlx5_mkey_variant(u32 mkey)
 {
 	return mkey & 0xff;
 }
 
 enum {
 	MLX5_PROF_MASK_QP_SIZE		= (u64)1 << 0,
 	MLX5_PROF_MASK_MR_CACHE		= (u64)1 << 1,
 };
 
 enum {
 	MAX_MR_CACHE_ENTRIES    = 15,
 };
 
 struct mlx5_interface {
 	void *			(*add)(struct mlx5_core_dev *dev);
 	void			(*remove)(struct mlx5_core_dev *dev, void *context);
 	void			(*event)(struct mlx5_core_dev *dev, void *context,
 					 enum mlx5_dev_event event, unsigned long param);
 	void *                  (*get_dev)(void *context);
 	int			protocol;
 	struct list_head	list;
 };
 
 void *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol);
 int mlx5_register_interface(struct mlx5_interface *intf);
 void mlx5_unregister_interface(struct mlx5_interface *intf);
 
 unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev);
 int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
     u8 roce_version, u8 roce_l3_type, const u8 *gid,
     const u8 *mac, bool vlan, u16 vlan_id);
 
 struct mlx5_profile {
 	u64	mask;
 	u8	log_max_qp;
 	struct {
 		int	size;
 		int	limit;
 	} mr_cache[MAX_MR_CACHE_ENTRIES];
 };
 
 enum {
 	MLX5_PCI_DEV_IS_VF		= 1 << 0,
 };
 
 enum {
 	MLX5_TRIGGERED_CMD_COMP = (u64)1 << 32,
 };
 
 static inline int mlx5_core_is_pf(struct mlx5_core_dev *dev)
 {
 	return !(dev->priv.pci_dev_data & MLX5_PCI_DEV_IS_VF);
 }
 #ifdef RATELIMIT
 int mlx5_init_rl_table(struct mlx5_core_dev *dev);
 void mlx5_cleanup_rl_table(struct mlx5_core_dev *dev);
 int mlx5_rl_add_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst, u16 *index);
 void mlx5_rl_remove_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst);
 bool mlx5_rl_is_in_range(const struct mlx5_core_dev *dev, u32 rate, u32 burst);
 int mlx5e_query_rate_limit_cmd(struct mlx5_core_dev *dev, u16 index, u32 *scq_handle);
 
 static inline u32 mlx5_rl_get_scq_handle(struct mlx5_core_dev *dev, uint16_t index)
 {
 	KASSERT(index > 0,
 	    ("invalid rate index for sq remap, failed retrieving SCQ handle"));
 
         return (dev->priv.rl_table.rl_entry[index - 1].qos_handle);
 }
 
 static inline bool mlx5_rl_is_supported(struct mlx5_core_dev *dev)
 {
 	return !!(dev->priv.rl_table.max_size);
 }
 #endif
 
 void mlx5_disable_interrupts(struct mlx5_core_dev *);
 void mlx5_poll_interrupts(struct mlx5_core_dev *);
 
 static inline int mlx5_get_qp_default_ts(struct mlx5_core_dev *dev)
 {
         return !MLX5_CAP_ROCE(dev, qp_ts_format) ?
                        MLX5_QPC_TIMESTAMP_FORMAT_FREE_RUNNING :
                        MLX5_QPC_TIMESTAMP_FORMAT_DEFAULT;
 }
 
 static inline int mlx5_get_rq_default_ts(struct mlx5_core_dev *dev)
 {
         return !MLX5_CAP_GEN(dev, rq_ts_format) ?
                        MLX5_RQC_TIMESTAMP_FORMAT_FREE_RUNNING :
                        MLX5_RQC_TIMESTAMP_FORMAT_DEFAULT;
 }
 
 static inline int mlx5_get_sq_default_ts(struct mlx5_core_dev *dev)
 {
         return !MLX5_CAP_GEN(dev, sq_ts_format) ?
                        MLX5_SQC_TIMESTAMP_FORMAT_FREE_RUNNING :
                        MLX5_SQC_TIMESTAMP_FORMAT_DEFAULT;
 }
 
 #endif /* MLX5_DRIVER_H */
diff --git a/sys/dev/mlx5/mlx5_core/diag_cnt.h b/sys/dev/mlx5/mlx5_core/diag_cnt.h
new file mode 100644
index 000000000000..25c460b19382
--- /dev/null
+++ b/sys/dev/mlx5/mlx5_core/diag_cnt.h
@@ -0,0 +1,43 @@
+/*-
+ * Copyright (c) 2018, Mellanox Technologies, Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef __MLX5_DIAG_CNT_H__
+#define	__MLX5_DIAG_CNT_H__
+
+#include <dev/mlx5/driver.h>
+#include <dev/mlx5/mlx5_core/mlx5_core.h>
+
+#define	MLX5_DIAG_CNT_SUPPORTED(mdev) \
+	(MLX5_CAP_GEN(mdev, debug) && \
+	 MLX5_CAP_GEN(mdev, num_of_diagnostic_counters))
+
+int	mlx5_diag_cnt_init(struct mlx5_core_dev *);
+void	mlx5_diag_cnt_cleanup(struct mlx5_core_dev *);
+
+int	mlx5_diag_query_params(struct mlx5_core_dev *);
+int	mlx5_diag_set_params(struct mlx5_core_dev *);
+int	mlx5_diag_query_counters(struct mlx5_core_dev *, u8 * *out_buffer);
+
+#endif					/* __MLX5_DIAG_CNT_H__ */
diff --git a/sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c b/sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
new file mode 100644
index 000000000000..83f8bf2b148f
--- /dev/null
+++ b/sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
@@ -0,0 +1,579 @@
+/*-
+ * Copyright (c) 2018, Mellanox Technologies, Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <dev/mlx5/mlx5_core/diag_cnt.h>
+
+static int get_supported_cnt_ids(struct mlx5_core_dev *dev);
+static int enable_cnt_id(struct mlx5_core_dev *dev, u16 id);
+static void reset_cnt_id(struct mlx5_core_dev *dev);
+static void reset_params(struct mlx5_diag_cnt *diag_cnt);
+
+static int
+mlx5_sysctl_counter_id(SYSCTL_HANDLER_ARGS)
+{
+	struct mlx5_diag_cnt *diag_cnt;
+	struct mlx5_core_dev *dev;
+	uint16_t *ptr;
+	size_t max;
+	size_t num;
+	size_t x;
+	int err;
+
+	dev = arg1;
+	diag_cnt = &dev->diag_cnt;
+
+	max = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
+
+	ptr = kmalloc(sizeof(ptr[0]) * max, GFP_KERNEL);
+
+	DIAG_LOCK(diag_cnt);
+
+	for (x = num = 0; x != max; x++) {
+		if (diag_cnt->cnt_id[x].enabled)
+			ptr[num++] = diag_cnt->cnt_id[x].id;
+	}
+
+	err = SYSCTL_OUT(req, ptr, sizeof(ptr[0]) * num);
+	if (err || !req->newptr)
+		goto done;
+
+	num = req->newlen / sizeof(ptr[0]);
+	if (num > max) {
+		err = ENOMEM;
+		goto done;
+	}
+
+	err = SYSCTL_IN(req, ptr, sizeof(ptr[0]) * num);
+
+	reset_cnt_id(dev);
+
+	for (x = 0; x != num; x++) {
+		err = enable_cnt_id(dev, ptr[x]);
+		if (err)
+			goto done;
+	}
+
+	diag_cnt->num_cnt_id = num;
+done:
+	kfree(ptr);
+
+	if (err != 0 && req->newptr != NULL)
+		reset_cnt_id(dev);
+
+	DIAG_UNLOCK(diag_cnt);
+
+	return (err);
+}
+
+#define	NUM_OF_DIAG_PARAMS 5
+
+static int
+mlx5_sysctl_params(SYSCTL_HANDLER_ARGS)
+{
+	struct mlx5_diag_cnt *diag_cnt;
+	struct mlx5_core_dev *dev;
+	uint32_t temp[NUM_OF_DIAG_PARAMS];
+	int err;
+
+	dev = arg1;
+	diag_cnt = &dev->diag_cnt;
+
+	DIAG_LOCK(diag_cnt);
+
+	temp[0] = diag_cnt->log_num_of_samples;
+	temp[1] = diag_cnt->log_sample_period;
+	temp[2] = diag_cnt->flag;
+	temp[3] = diag_cnt->num_of_samples;
+	temp[4] = diag_cnt->sample_index;
+
+	err = SYSCTL_OUT(req, temp, sizeof(temp));
+	if (err || !req->newptr)
+		goto done;
+
+	err = SYSCTL_IN(req, temp, sizeof(temp));
+	if (err)
+		goto done;
+
+	reset_params(&dev->diag_cnt);
+
+	if (temp[0] > MLX5_CAP_DEBUG(dev, log_max_samples) ||
+	    (1U << (MLX5_CAP_DEBUG(dev, log_max_samples) - temp[0])) <
+	    diag_cnt->num_cnt_id) {
+		err = ERANGE;
+		goto done;
+	} else if (temp[1] < MLX5_CAP_DEBUG(dev, log_min_sample_period)) {
+		err = ERANGE;
+		goto done;
+	} else if (temp[2] >= 0x100) {
+		err = ERANGE;
+		goto done;
+	} else if (temp[3] > (1U << diag_cnt->log_num_of_samples)) {
+		err = ERANGE;
+		goto done;
+	} else if (temp[4] > (1U << diag_cnt->log_num_of_samples)) {
+		err = ERANGE;
+		goto done;
+	}
+
+	diag_cnt->log_num_of_samples = temp[0];
+	diag_cnt->log_sample_period = temp[1];
+	diag_cnt->flag = temp[2];
+	diag_cnt->num_of_samples = temp[3];
+	diag_cnt->sample_index = temp[4];
+done:
+	DIAG_UNLOCK(diag_cnt);
+
+	return (err);
+}
+
+static void
+decode_cnt_buffer(u32 num_of_samples, u8 *out, struct sbuf *sbuf)
+{
+	void *cnt;
+	u64 temp;
+	u32 i;
+
+	for (i = 0; i != num_of_samples; i++) {
+		cnt = MLX5_ADDR_OF(query_diagnostic_counters_out,
+		    out, diag_counter[i]);
+		temp = MLX5_GET(diagnostic_cntr_struct, cnt, counter_value_h);
+		temp = (temp << 32) |
+		    MLX5_GET(diagnostic_cntr_struct, cnt, counter_value_l);
+		sbuf_printf(sbuf,
+		    "0x%04x,0x%04x,0x%08x,0x%016llx\n",
+		    MLX5_GET(diagnostic_cntr_struct, cnt, counter_id),
+		    MLX5_GET(diagnostic_cntr_struct, cnt, sample_id),
+		    MLX5_GET(diagnostic_cntr_struct, cnt, time_stamp_31_0),
+		    (unsigned long long)temp);
+	}
+}
+
+static int
+mlx5_sysctl_dump_set(SYSCTL_HANDLER_ARGS)
+{
+	struct mlx5_diag_cnt *diag_cnt;
+	struct mlx5_core_dev *dev;
+	uint8_t temp;
+	int err;
+
+	dev = arg1;
+	diag_cnt = &dev->diag_cnt;
+
+	DIAG_LOCK(diag_cnt);
+
+	err = SYSCTL_OUT(req, &diag_cnt->ready, sizeof(diag_cnt->ready));
+	if (err || !req->newptr)
+		goto done;
+
+	err = SYSCTL_IN(req, &temp, sizeof(temp));
+	if (err)
+		goto done;
+
+	diag_cnt->ready = (temp != 0);
+	if (diag_cnt->ready != 0)
+		err = -mlx5_diag_set_params(dev);
+done:
+	DIAG_UNLOCK(diag_cnt);
+
+	return (err);
+}
+
+static int
+mlx5_sysctl_dump_get(SYSCTL_HANDLER_ARGS)
+{
+	struct mlx5_diag_cnt *diag_cnt;
+	struct mlx5_core_dev *dev;
+	struct sbuf sbuf;
+	u8 *out;
+	int err;
+
+	dev = arg1;
+	diag_cnt = &dev->diag_cnt;
+
+	err = sysctl_wire_old_buffer(req, 0);
+	if (err != 0)
+		return (err);
+
+	DIAG_LOCK(diag_cnt);
+
+	sbuf_new_for_sysctl(&sbuf, NULL, 65536, req);
+
+	if (diag_cnt->ready != 0) {
+		err = -mlx5_diag_query_counters(dev, &out);
+		if (err) {
+			sbuf_printf(&sbuf, "\nCould not query counters: %d\n", err);
+		} else {
+			sbuf_printf(&sbuf, "\n");
+			decode_cnt_buffer(diag_cnt->num_of_samples *
+			    diag_cnt->num_cnt_id, out, &sbuf);
+			kfree(out);
+		}
+	} else {
+		sbuf_printf(&sbuf, "\nDump was not set.\n");
+	}
+
+	err = sbuf_finish(&sbuf);
+
+	sbuf_delete(&sbuf);
+
+	DIAG_UNLOCK(diag_cnt);
+
+	return (err);
+}
+
+static int
+mlx5_sysctl_cap_read(SYSCTL_HANDLER_ARGS)
+{
+	struct mlx5_diag_cnt *diag_cnt;
+	struct mlx5_core_dev *dev;
+	struct sbuf sbuf;
+	int err;
+	u32 i;
+
+	dev = arg1;
+	diag_cnt = &dev->diag_cnt;
+
+	err = sysctl_wire_old_buffer(req, 0);
+	if (err != 0)
+		return (err);
+
+	DIAG_LOCK(diag_cnt);
+
+	sbuf_new_for_sysctl(&sbuf, NULL, 8192, req);
+
+	sbuf_printf(&sbuf, "\n");
+
+	/* print cap */
+	sbuf_printf(&sbuf, "log_max_samples=%d\n",
+	    MLX5_CAP_DEBUG(dev, log_max_samples));
+	sbuf_printf(&sbuf, "log_min_sample_period=%d\n",
+	    MLX5_CAP_DEBUG(dev, log_min_sample_period));
+	sbuf_printf(&sbuf, "repetitive=%d\n",
+	    MLX5_CAP_DEBUG(dev, repetitive));
+	sbuf_printf(&sbuf, "single=%d\n",
+	    MLX5_CAP_DEBUG(dev, single));
+	sbuf_printf(&sbuf, "num_of_diagnostic_counters=%d\n",
+	    MLX5_CAP_GEN(dev, num_of_diagnostic_counters));
+
+	/* print list of supported counter */
+	sbuf_printf(&sbuf, "supported counter id:\n");
+	for (i = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++)
+		sbuf_printf(&sbuf, "0x%04x,", diag_cnt->cnt_id[i].id);
+	sbuf_printf(&sbuf, "\n");
+
+	err = sbuf_finish(&sbuf);
+	sbuf_delete(&sbuf);
+
+	DIAG_UNLOCK(diag_cnt);
+
+	return (err);
+}
+
+static int
+get_supported_cnt_ids(struct mlx5_core_dev *dev)
+{
+	u32 num_counters = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	u32 i;
+
+	diag_cnt->cnt_id = kzalloc(sizeof(*diag_cnt->cnt_id) * num_counters,
+	    GFP_KERNEL);
+	if (!diag_cnt->cnt_id)
+		return (-ENOMEM);
+
+	for (i = 0; i != num_counters; i++) {
+		diag_cnt->cnt_id[i].id =
+		    MLX5_CAP_DEBUG(dev, diagnostic_counter[i].counter_id);
+	}
+	return (0);
+}
+
+static void
+reset_cnt_id(struct mlx5_core_dev *dev)
+{
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	u32 i;
+
+	diag_cnt->num_cnt_id = 0;
+	for (i = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++)
+		diag_cnt->cnt_id[i].enabled = false;
+}
+
+static int
+enable_cnt_id(struct mlx5_core_dev *dev, u16 id)
+{
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	u32 i;
+
+	for (i = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++) {
+		if (diag_cnt->cnt_id[i].id == id) {
+			if (diag_cnt->cnt_id[i].enabled)
+				return (EINVAL);
+
+			diag_cnt->cnt_id[i].enabled = true;
+			break;
+		}
+	}
+
+	if (i == MLX5_CAP_GEN(dev, num_of_diagnostic_counters))
+		return (ENOENT);
+	else
+		return (0);
+}
+
+static void
+reset_params(struct mlx5_diag_cnt *diag_cnt)
+{
+	diag_cnt->log_num_of_samples = 0;
+	diag_cnt->log_sample_period = 0;
+	diag_cnt->flag = 0;
+	diag_cnt->num_of_samples = 0;
+	diag_cnt->sample_index = 0;
+}
+
+int
+mlx5_diag_set_params(struct mlx5_core_dev *dev)
+{
+	u8 out[MLX5_ST_SZ_BYTES(set_diagnostic_params_out)] = {0};
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	void *cnt_id;
+	void *ctx;
+	u16 in_sz;
+	int err;
+	u8 *in;
+	u32 i;
+	u32 j;
+
+	if (!diag_cnt->num_cnt_id)
+		return (-EINVAL);
+
+	in_sz = MLX5_ST_SZ_BYTES(set_diagnostic_params_in) +
+	    diag_cnt->num_cnt_id * MLX5_ST_SZ_BYTES(counter_id);
+	in = kzalloc(in_sz, GFP_KERNEL);
+	if (!in)
+		return (-ENOMEM);
+
+	MLX5_SET(set_diagnostic_params_in, in, opcode,
+	    MLX5_CMD_OP_SET_DIAGNOSTICS);
+
+	ctx = MLX5_ADDR_OF(set_diagnostic_params_in, in,
+	    diagnostic_params_ctx);
+	MLX5_SET(diagnostic_params_context, ctx, num_of_counters,
+	    diag_cnt->num_cnt_id);
+	MLX5_SET(diagnostic_params_context, ctx, log_num_of_samples,
+	    diag_cnt->log_num_of_samples);
+
+	MLX5_SET(diagnostic_params_context, ctx, single,
+	    (diag_cnt->flag >> 7) & 1);
+	MLX5_SET(diagnostic_params_context, ctx, repetitive,
+	    (diag_cnt->flag >> 6) & 1);
+	MLX5_SET(diagnostic_params_context, ctx, sync,
+	    (diag_cnt->flag >> 5) & 1);
+	MLX5_SET(diagnostic_params_context, ctx, clear,
+	    (diag_cnt->flag >> 4) & 1);
+	MLX5_SET(diagnostic_params_context, ctx, on_demand,
+	    (diag_cnt->flag >> 3) & 1);
+	MLX5_SET(diagnostic_params_context, ctx, enable,
+	    (diag_cnt->flag >> 2) & 1);
+	MLX5_SET(diagnostic_params_context, ctx, log_sample_period,
+	    diag_cnt->log_sample_period);
+
+	for (i = j = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++) {
+		if (diag_cnt->cnt_id[i].enabled) {
+			cnt_id = MLX5_ADDR_OF(diagnostic_params_context,
+			    ctx, counter_id[j]);
+			MLX5_SET(counter_id, cnt_id, counter_id,
+			    diag_cnt->cnt_id[i].id);
+			j++;
+		}
+	}
+
+	err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
+
+	kfree(in);
+	return (err);
+}
+
+/* This function is for debug purpose */
+int
+mlx5_diag_query_params(struct mlx5_core_dev *dev)
+{
+	u8 in[MLX5_ST_SZ_BYTES(query_diagnostic_params_in)] = {0};
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	void *cnt_id;
+	u16 out_sz;
+	void *ctx;
+	int err;
+	u8 *out;
+	u32 i;
+
+	out_sz = MLX5_ST_SZ_BYTES(query_diagnostic_params_out) +
+	    diag_cnt->num_cnt_id * MLX5_ST_SZ_BYTES(counter_id);
+
+	out = kzalloc(out_sz, GFP_KERNEL);
+	if (!out)
+		return (-ENOMEM);
+
+	MLX5_SET(query_diagnostic_params_in, in, opcode,
+	    MLX5_CMD_OP_QUERY_DIAGNOSTIC_PARAMS);
+	err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
+	if (err)
+		goto out;
+
+	ctx = MLX5_ADDR_OF(query_diagnostic_params_out, out,
+	    diagnostic_params_ctx);
+	mlx5_core_dbg(dev, "single=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx, single));
+	mlx5_core_dbg(dev, "repetitive=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx, repetitive));
+	mlx5_core_dbg(dev, "sync=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx, sync));
+	mlx5_core_dbg(dev, "clear=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx, clear));
+	mlx5_core_dbg(dev, "on_demand=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx, on_demand));
+	mlx5_core_dbg(dev, "enable=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx, enable));
+	mlx5_core_dbg(dev, "log_sample_period=%x\n",
+	    MLX5_GET(diagnostic_params_context, ctx,
+	    log_sample_period));
+
+	for (i = 0; i != diag_cnt->num_cnt_id; i++) {
+		cnt_id = MLX5_ADDR_OF(diagnostic_params_context,
+		    ctx, counter_id[i]);
+		mlx5_core_dbg(dev, "counter_id[%d]=%x\n", i,
+		    MLX5_GET(counter_id, cnt_id, counter_id));
+	}
+out:
+	kfree(out);
+	return (err);
+}
+
+int
+mlx5_diag_query_counters(struct mlx5_core_dev *dev, u8 **out_buffer)
+{
+	u8 in[MLX5_ST_SZ_BYTES(query_diagnostic_counters_in)] = {0};
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	u16 out_sz;
+	u8 *out;
+	int err;
+
+	out_sz = MLX5_ST_SZ_BYTES(query_diagnostic_counters_out) +
+	    diag_cnt->num_of_samples * diag_cnt->num_cnt_id *
+	    MLX5_ST_SZ_BYTES(diagnostic_cntr_struct);
+
+	out = kzalloc(out_sz, GFP_KERNEL);
+	if (!out)
+		return (-ENOMEM);
+
+	MLX5_SET(query_diagnostic_counters_in, in, opcode,
+	    MLX5_CMD_OP_QUERY_DIAGNOSTICS);
+	MLX5_SET(query_diagnostic_counters_in, in, num_of_samples,
+	    diag_cnt->num_of_samples);
+	MLX5_SET(query_diagnostic_counters_in, in, sample_index,
+	    diag_cnt->sample_index);
+
+	err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
+
+	if (!err)
+		*out_buffer = out;
+	else
+		kfree(out);
+
+	return (err);
+}
+
+int
+mlx5_diag_cnt_init(struct mlx5_core_dev *dev)
+{
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	struct sysctl_oid *diag_cnt_sysctl_node;
+	int err;
+
+	if (!MLX5_DIAG_CNT_SUPPORTED(dev))
+		return (0);
+
+	mutex_init(&diag_cnt->lock);
+
+	/* Build private data */
+	err = get_supported_cnt_ids(dev);
+	if (err)
+		return (err);
+
+	sysctl_ctx_init(&diag_cnt->sysctl_ctx);
+
+	diag_cnt_sysctl_node = SYSCTL_ADD_NODE(&diag_cnt->sysctl_ctx,
+	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev->pdev->dev.bsddev)),
+	    OID_AUTO, "diag_cnt", CTLFLAG_RW | CTLFLAG_MPSAFE, NULL,
+	    "Diagnostics counters");
+
+	if (diag_cnt_sysctl_node == NULL)
+		return (-ENOMEM);
+
+	SYSCTL_ADD_PROC(&diag_cnt->sysctl_ctx, SYSCTL_CHILDREN(diag_cnt_sysctl_node),
+	    OID_AUTO, "counter_id", CTLTYPE_U16 | CTLFLAG_RW | CTLFLAG_MPSAFE,
+	    dev, 0, mlx5_sysctl_counter_id, "SU", "Selected counter IDs");
+
+	SYSCTL_ADD_PROC(&diag_cnt->sysctl_ctx, SYSCTL_CHILDREN(diag_cnt_sysctl_node),
+	    OID_AUTO, "params", CTLTYPE_U32 | CTLFLAG_RW | CTLFLAG_MPSAFE,
+	    dev, 0, mlx5_sysctl_params, "IU",
+	    "Counter parameters: log_num_of_samples, log_sample_perios, flag, num_of_samples, sample_index");
+
+	SYSCTL_ADD_PROC(&diag_cnt->sysctl_ctx, SYSCTL_CHILDREN(diag_cnt_sysctl_node),
+	    OID_AUTO, "dump_set", CTLTYPE_U8 | CTLFLAG_RW | CTLFLAG_MPSAFE,
+	    dev, 0, mlx5_sysctl_dump_set, "CU",
+	    "Set dump parameters by writing 1 and enable dump_get. Write 0 to disable dump.");
+
+	SYSCTL_ADD_PROC(&diag_cnt->sysctl_ctx, SYSCTL_CHILDREN(diag_cnt_sysctl_node),
+	    OID_AUTO, "dump_get", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
+	    dev, 0, mlx5_sysctl_dump_get, "A",
+	    "Get dump parameters.");
+
+	SYSCTL_ADD_PROC(&diag_cnt->sysctl_ctx, SYSCTL_CHILDREN(diag_cnt_sysctl_node),
+	    OID_AUTO, "cap", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
+	    dev, 0, mlx5_sysctl_cap_read, "A",
+	    "Read capabilities.");
+
+	return (0);
+}
+
+void
+mlx5_diag_cnt_cleanup(struct mlx5_core_dev *dev)
+{
+	struct mlx5_diag_cnt *diag_cnt = &dev->diag_cnt;
+	void *ptr;
+
+	if (!MLX5_DIAG_CNT_SUPPORTED(dev))
+		return;
+
+	sysctl_ctx_free(&diag_cnt->sysctl_ctx);
+
+	ptr = diag_cnt->cnt_id;
+	diag_cnt->cnt_id = NULL;
+
+	kfree(ptr);
+
+	reset_params(diag_cnt);
+}
diff --git a/sys/dev/mlx5/mlx5_core/mlx5_main.c b/sys/dev/mlx5/mlx5_core/mlx5_main.c
index 9e9b7b845528..b258989e601b 100644
--- a/sys/dev/mlx5/mlx5_core/mlx5_main.c
+++ b/sys/dev/mlx5/mlx5_core/mlx5_main.c
@@ -1,2132 +1,2144 @@
 /*-
  * Copyright (c) 2013-2021, Mellanox Technologies, Ltd.  All rights reserved.
+ * Copyright (c) 2022 NVIDIA corporation & affiliates.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
  * $FreeBSD$
  */
 
 #include "opt_rss.h"
 #include "opt_ratelimit.h"
 
 #include <linux/kmod.h>
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
 #include <linux/io-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/hardirq.h>
 #include <dev/mlx5/driver.h>
 #include <dev/mlx5/cq.h>
 #include <dev/mlx5/qp.h>
 #include <dev/mlx5/srq.h>
 #include <dev/mlx5/mpfs.h>
 #include <dev/mlx5/vport.h>
 #include <linux/delay.h>
 #include <dev/mlx5/mlx5_ifc.h>
 #include <dev/mlx5/mlx5_fpga/core.h>
 #include <dev/mlx5/mlx5_lib/mlx5.h>
 #include <dev/mlx5/mlx5_core/mlx5_core.h>
 #include <dev/mlx5/mlx5_core/eswitch.h>
 #include <dev/mlx5/mlx5_core/fs_core.h>
+#include <dev/mlx5/mlx5_core/diag_cnt.h>
 #ifdef PCI_IOV
 #include <sys/nv.h>
 #include <dev/pci/pci_iov.h>
 #include <sys/iov_schema.h>
 #endif
 
 static const char mlx5_version[] = "Mellanox Core driver "
 	DRIVER_VERSION " (" DRIVER_RELDATE ")";
 MODULE_DESCRIPTION("Mellanox ConnectX-4 and onwards core driver");
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1);
 MODULE_DEPEND(mlx5, mlxfw, 1, 1, 1);
 MODULE_DEPEND(mlx5, firmware, 1, 1, 1);
 MODULE_VERSION(mlx5, 1);
 
 SYSCTL_NODE(_hw, OID_AUTO, mlx5, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
     "mlx5 hardware controls");
 
 int mlx5_core_debug_mask;
 SYSCTL_INT(_hw_mlx5, OID_AUTO, debug_mask, CTLFLAG_RWTUN,
     &mlx5_core_debug_mask, 0,
     "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0");
 
 #define MLX5_DEFAULT_PROF	2
 static int mlx5_prof_sel = MLX5_DEFAULT_PROF;
 SYSCTL_INT(_hw_mlx5, OID_AUTO, prof_sel, CTLFLAG_RWTUN,
     &mlx5_prof_sel, 0,
     "profile selector. Valid range 0 - 2");
 
 static int mlx5_fast_unload_enabled = 1;
 SYSCTL_INT(_hw_mlx5, OID_AUTO, fast_unload_enabled, CTLFLAG_RWTUN,
     &mlx5_fast_unload_enabled, 0,
     "Set to enable fast unload. Clear to disable.");
 
 static int mlx5_core_comp_eq_size = 1024;
 SYSCTL_INT(_hw_mlx5, OID_AUTO, comp_eq_size, CTLFLAG_RDTUN | CTLFLAG_MPSAFE,
     &mlx5_core_comp_eq_size, 0,
     "Set default completion EQ size between 1024 and 16384 inclusivly. Value should be power of two.");
 
 static LIST_HEAD(intf_list);
 static LIST_HEAD(dev_list);
 static DEFINE_MUTEX(intf_mutex);
 
 struct mlx5_device_context {
 	struct list_head	list;
 	struct mlx5_interface  *intf;
 	void		       *context;
 };
 
 enum {
 	MLX5_ATOMIC_REQ_MODE_BE = 0x0,
 	MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1,
 };
 
 static struct mlx5_profile profiles[] = {
 	[0] = {
 		.mask           = 0,
 	},
 	[1] = {
 		.mask		= MLX5_PROF_MASK_QP_SIZE,
 		.log_max_qp	= 12,
 	},
 	[2] = {
 		.mask		= MLX5_PROF_MASK_QP_SIZE |
 				  MLX5_PROF_MASK_MR_CACHE,
 		.log_max_qp	= 17,
 		.mr_cache[0]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[1]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[2]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[3]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[4]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[5]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[6]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[7]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[8]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[9]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[10]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[11]	= {
 			.size	= 500,
 			.limit	= 250
 		},
 		.mr_cache[12]	= {
 			.size	= 64,
 			.limit	= 32
 		},
 		.mr_cache[13]	= {
 			.size	= 32,
 			.limit	= 16
 		},
 		.mr_cache[14]	= {
 			.size	= 16,
 			.limit	= 8
 		},
 	},
 	[3] = {
 		.mask		= MLX5_PROF_MASK_QP_SIZE,
 		.log_max_qp	= 17,
 	},
 };
 
 static int
 mlx5_core_get_comp_eq_size(void)
 {
 	int value = mlx5_core_comp_eq_size;
 
 	if (value < 1024)
 		value = 1024;
 	else if (value > 16384)
 		value = 16384;
 
 	/* make value power of two, rounded down */
 	while (value & (value - 1))
 		value &= (value - 1);
 	return (value);
 }
 
 static void mlx5_set_driver_version(struct mlx5_core_dev *dev)
 {
 	const size_t driver_ver_sz =
 	    MLX5_FLD_SZ_BYTES(set_driver_version_in, driver_version);
 	u8 in[MLX5_ST_SZ_BYTES(set_driver_version_in)] = {};
 	u8 out[MLX5_ST_SZ_BYTES(set_driver_version_out)] = {};
 	char *string;
 
 	if (!MLX5_CAP_GEN(dev, driver_version))
 		return;
 
 	string = MLX5_ADDR_OF(set_driver_version_in, in, driver_version);
 
 	snprintf(string, driver_ver_sz, "FreeBSD,mlx5_core,%u.%u.%u," DRIVER_VERSION,
 	    __FreeBSD_version / 100000, (__FreeBSD_version / 1000) % 100,
 	    __FreeBSD_version % 1000);
 
 	/* Send the command */
 	MLX5_SET(set_driver_version_in, in, opcode,
 	    MLX5_CMD_OP_SET_DRIVER_VERSION);
 
 	mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 }
 
 #ifdef PCI_IOV
 static const char iov_mac_addr_name[] = "mac-addr";
 static const char iov_node_guid_name[] = "node-guid";
 static const char iov_port_guid_name[] = "port-guid";
 #endif
 
 static int set_dma_caps(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
 	int err;
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 	if (err) {
 		mlx5_core_warn(dev, "couldn't set 64-bit PCI DMA mask\n");
 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 		if (err) {
 			mlx5_core_err(dev, "Can't set PCI DMA mask, aborting\n");
 			return err;
 		}
 	}
 
 	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
 	if (err) {
 		mlx5_core_warn(dev, "couldn't set 64-bit consistent PCI DMA mask\n");
 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 		if (err) {
 			mlx5_core_err(dev, "Can't set consistent PCI DMA mask, aborting\n");
 			return err;
 		}
 	}
 
 	dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024);
 	return err;
 }
 
 int mlx5_pci_read_power_status(struct mlx5_core_dev *dev,
 			       u16 *p_power, u8 *p_status)
 {
 	u32 in[MLX5_ST_SZ_DW(mpein_reg)] = {};
 	u32 out[MLX5_ST_SZ_DW(mpein_reg)] = {};
 	int err;
 
 	err = mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out),
 	    MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MPEIN, 0, 0);
 
 	*p_status = MLX5_GET(mpein_reg, out, pwr_status);
 	*p_power = MLX5_GET(mpein_reg, out, pci_power);
 	return err;
 }
 
 static int mlx5_pci_enable_device(struct mlx5_core_dev *dev)
 {
 	struct pci_dev *pdev = dev->pdev;
 	int err = 0;
 
 	mutex_lock(&dev->pci_status_mutex);
 	if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) {
 		err = pci_enable_device(pdev);
 		if (!err)
 			dev->pci_status = MLX5_PCI_STATUS_ENABLED;
 	}
 	mutex_unlock(&dev->pci_status_mutex);
 
 	return err;
 }
 
 static void mlx5_pci_disable_device(struct mlx5_core_dev *dev)
 {
 	struct pci_dev *pdev = dev->pdev;
 
 	mutex_lock(&dev->pci_status_mutex);
 	if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) {
 		pci_disable_device(pdev);
 		dev->pci_status = MLX5_PCI_STATUS_DISABLED;
 	}
 	mutex_unlock(&dev->pci_status_mutex);
 }
 
 static int request_bar(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
 	int err = 0;
 
 	if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 		mlx5_core_err(dev, "Missing registers BAR, aborting\n");
 		return -ENODEV;
 	}
 
 	err = pci_request_regions(pdev, DRIVER_NAME);
 	if (err)
 		mlx5_core_err(dev, "Couldn't get PCI resources, aborting\n");
 
 	return err;
 }
 
 static void release_bar(struct pci_dev *pdev)
 {
 	pci_release_regions(pdev);
 }
 
 static int mlx5_enable_msix(struct mlx5_core_dev *dev)
 {
 	struct mlx5_priv *priv = &dev->priv;
 	struct mlx5_eq_table *table = &priv->eq_table;
 	int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq);
 	int limit = dev->msix_eqvec;
 	int nvec = MLX5_EQ_VEC_COMP_BASE;
 	int i;
 
 	if (limit > 0)
 		nvec += limit;
 	else
 		nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus();
 
 	if (nvec > num_eqs)
 		nvec = num_eqs;
 	if (nvec > 256)
 		nvec = 256;	/* limit of firmware API */
 	if (nvec <= MLX5_EQ_VEC_COMP_BASE)
 		return -ENOMEM;
 
 	priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL);
 
 	for (i = 0; i < nvec; i++)
 		priv->msix_arr[i].entry = i;
 
 	nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr,
 				     MLX5_EQ_VEC_COMP_BASE + 1, nvec);
 	if (nvec < 0)
 		return nvec;
 
 	table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE;
 	return 0;
 }
 
 static void mlx5_disable_msix(struct mlx5_core_dev *dev)
 {
 	struct mlx5_priv *priv = &dev->priv;
 
 	pci_disable_msix(dev->pdev);
 	kfree(priv->msix_arr);
 }
 
 struct mlx5_reg_host_endianess {
 	u8	he;
 	u8      rsvd[15];
 };
 
 
 #define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos))
 
 enum {
 	MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) |
 				MLX5_DEV_CAP_FLAG_DCT |
 				MLX5_DEV_CAP_FLAG_DRAIN_SIGERR,
 };
 
 static u16 to_fw_pkey_sz(struct mlx5_core_dev *dev, u32 size)
 {
 	switch (size) {
 	case 128:
 		return 0;
 	case 256:
 		return 1;
 	case 512:
 		return 2;
 	case 1024:
 		return 3;
 	case 2048:
 		return 4;
 	case 4096:
 		return 5;
 	default:
 		mlx5_core_warn(dev, "invalid pkey table size %d\n", size);
 		return 0;
 	}
 }
 
 static int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev,
 				   enum mlx5_cap_type cap_type,
 				   enum mlx5_cap_mode cap_mode)
 {
 	u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)];
 	int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
 	void *out, *hca_caps;
 	u16 opmod = (cap_type << 1) | (cap_mode & 0x01);
 	int err;
 
 	memset(in, 0, sizeof(in));
 	out = kzalloc(out_sz, GFP_KERNEL);
 
 	MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
 	MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
 	err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
 	if (err) {
 		mlx5_core_warn(dev,
 			       "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n",
 			       cap_type, cap_mode, err);
 		goto query_ex;
 	}
 
 	hca_caps =  MLX5_ADDR_OF(query_hca_cap_out, out, capability);
 
 	switch (cap_mode) {
 	case HCA_CAP_OPMOD_GET_MAX:
 		memcpy(dev->hca_caps_max[cap_type], hca_caps,
 		       MLX5_UN_SZ_BYTES(hca_cap_union));
 		break;
 	case HCA_CAP_OPMOD_GET_CUR:
 		memcpy(dev->hca_caps_cur[cap_type], hca_caps,
 		       MLX5_UN_SZ_BYTES(hca_cap_union));
 		break;
 	default:
 		mlx5_core_warn(dev,
 			       "Tried to query dev cap type(%x) with wrong opmode(%x)\n",
 			       cap_type, cap_mode);
 		err = -EINVAL;
 		break;
 	}
 query_ex:
 	kfree(out);
 	return err;
 }
 
 int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type)
 {
 	int ret;
 
 	ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR);
 	if (ret)
 		return ret;
 
 	return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX);
 }
 
 static int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz)
 {
 	u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0};
 
 	MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP);
 
 	return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
 }
 
 static int handle_hca_cap(struct mlx5_core_dev *dev)
 {
 	void *set_ctx = NULL;
 	struct mlx5_profile *prof = dev->profile;
 	int err = -ENOMEM;
 	int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
 	void *set_hca_cap;
 
 	set_ctx = kzalloc(set_sz, GFP_KERNEL);
 
 	err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL);
 	if (err)
 		goto query_ex;
 
 	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx,
 				   capability);
 	memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL],
 	       MLX5_ST_SZ_BYTES(cmd_hca_cap));
 
 	mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n",
 		      mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)),
 		      128);
 	/* we limit the size of the pkey table to 128 entries for now */
 	MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size,
 		 to_fw_pkey_sz(dev, 128));
 
 	if (prof->mask & MLX5_PROF_MASK_QP_SIZE)
 		MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp,
 			 prof->log_max_qp);
 
 	/* disable cmdif checksum */
 	MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0);
 
 	/* Enable 4K UAR only when HCA supports it and page size is bigger
 	 * than 4K.
 	 */
 	if (MLX5_CAP_GEN_MAX(dev, uar_4k) && PAGE_SIZE > 4096)
 		MLX5_SET(cmd_hca_cap, set_hca_cap, uar_4k, 1);
 
 	/* enable drain sigerr */
 	MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1);
 
 	MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12);
 
 	err = set_caps(dev, set_ctx, set_sz);
 
 query_ex:
 	kfree(set_ctx);
 	return err;
 }
 
 static int handle_hca_cap_atomic(struct mlx5_core_dev *dev)
 {
 	void *set_ctx;
 	void *set_hca_cap;
 	int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
 	int req_endianness;
 	int err;
 
 	if (MLX5_CAP_GEN(dev, atomic)) {
 		err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC);
 		if (err)
 			return err;
 	} else {
 		return 0;
 	}
 
 	req_endianness =
 		MLX5_CAP_ATOMIC(dev,
 				supported_atomic_req_8B_endianess_mode_1);
 
 	if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS)
 		return 0;
 
 	set_ctx = kzalloc(set_sz, GFP_KERNEL);
 	if (!set_ctx)
 		return -ENOMEM;
 
 	MLX5_SET(set_hca_cap_in, set_ctx, op_mod,
 		 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1);
 	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
 
 	/* Set requestor to host endianness */
 	MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode,
 		 MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS);
 
 	err = set_caps(dev, set_ctx, set_sz);
 
 	kfree(set_ctx);
 	return err;
 }
 
 static int set_hca_ctrl(struct mlx5_core_dev *dev)
 {
 	struct mlx5_reg_host_endianess he_in;
 	struct mlx5_reg_host_endianess he_out;
 	int err;
 
 	if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH &&
 	    !MLX5_CAP_GEN(dev, roce))
 		return 0;
 
 	memset(&he_in, 0, sizeof(he_in));
 	he_in.he = MLX5_SET_HOST_ENDIANNESS;
 	err = mlx5_core_access_reg(dev, &he_in,  sizeof(he_in),
 					&he_out, sizeof(he_out),
 					MLX5_REG_HOST_ENDIANNESS, 0, 1);
 	return err;
 }
 
 static int mlx5_core_set_hca_defaults(struct mlx5_core_dev *dev)
 {
 	int ret = 0;
 
 	/* Disable local_lb by default */
 	if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH)
 		ret = mlx5_nic_vport_update_local_lb(dev, false);
 
        return ret;
 }
 
 static int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id)
 {
 	u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0};
 	u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0};
 
 	MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA);
 	MLX5_SET(enable_hca_in, in, function_id, func_id);
 	return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
 }
 
 static int mlx5_core_disable_hca(struct mlx5_core_dev *dev)
 {
 	u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0};
 	u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0};
 
 	MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA);
 	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 }
 
 static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
 {
 	u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0};
 	u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0};
 	u32 sup_issi;
 	int err;
 
 	MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI);
 
 	err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), query_out, sizeof(query_out));
 	if (err) {
 		u32 syndrome;
 		u8 status;
 
 		mlx5_cmd_mbox_status(query_out, &status, &syndrome);
 		if (status == MLX5_CMD_STAT_BAD_OP_ERR) {
 			mlx5_core_dbg(dev, "Only ISSI 0 is supported\n");
 			return 0;
 		}
 
 		mlx5_core_err(dev, "failed to query ISSI\n");
 		return err;
 	}
 
 	sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0);
 
 	if (sup_issi & (1 << 1)) {
 		u32 set_in[MLX5_ST_SZ_DW(set_issi_in)]	 = {0};
 		u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0};
 
 		MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI);
 		MLX5_SET(set_issi_in, set_in, current_issi, 1);
 
 		err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out));
 		if (err) {
 			mlx5_core_err(dev, "failed to set ISSI=1 err(%d)\n", err);
 			return err;
 		}
 
 		dev->issi = 1;
 
 		return 0;
 	} else if (sup_issi & (1 << 0)) {
 		return 0;
 	}
 
 	return -ENOTSUPP;
 }
 
 
 int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn)
 {
 	struct mlx5_eq_table *table = &dev->priv.eq_table;
 	struct mlx5_eq *eq;
 	int err = -ENOENT;
 
 	spin_lock(&table->lock);
 	list_for_each_entry(eq, &table->comp_eqs_list, list) {
 		if (eq->index == vector) {
 			*eqn = eq->eqn;
 			*irqn = eq->irqn;
 			err = 0;
 			break;
 		}
 	}
 	spin_unlock(&table->lock);
 
 	return err;
 }
 EXPORT_SYMBOL(mlx5_vector2eqn);
 
 static void free_comp_eqs(struct mlx5_core_dev *dev)
 {
 	struct mlx5_eq_table *table = &dev->priv.eq_table;
 	struct mlx5_eq *eq, *n;
 
 	spin_lock(&table->lock);
 	list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
 		list_del(&eq->list);
 		spin_unlock(&table->lock);
 		if (mlx5_destroy_unmap_eq(dev, eq))
 			mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n",
 				       eq->eqn);
 		kfree(eq);
 		spin_lock(&table->lock);
 	}
 	spin_unlock(&table->lock);
 }
 
 static int alloc_comp_eqs(struct mlx5_core_dev *dev)
 {
 	struct mlx5_eq_table *table = &dev->priv.eq_table;
 	struct mlx5_eq *eq;
 	int ncomp_vec;
 	int nent;
 	int err;
 	int i;
 
 	INIT_LIST_HEAD(&table->comp_eqs_list);
 	ncomp_vec = table->num_comp_vectors;
 	nent = mlx5_core_get_comp_eq_size();
 	for (i = 0; i < ncomp_vec; i++) {
 		eq = kzalloc_node(sizeof(*eq), GFP_KERNEL, dev->priv.numa_node);
 
 		err = mlx5_create_map_eq(dev, eq,
 					 i + MLX5_EQ_VEC_COMP_BASE, nent, 0);
 		if (err) {
 			kfree(eq);
 			goto clean;
 		}
 		mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
 		eq->index = i;
 		spin_lock(&table->lock);
 		list_add_tail(&eq->list, &table->comp_eqs_list);
 		spin_unlock(&table->lock);
 	}
 
 	return 0;
 
 clean:
 	free_comp_eqs(dev);
 	return err;
 }
 
 static inline int fw_initializing(struct mlx5_core_dev *dev)
 {
 	return ioread32be(&dev->iseg->initializing) >> 31;
 }
 
 static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili,
 			u32 warn_time_mili)
 {
 	int warn = jiffies + msecs_to_jiffies(warn_time_mili);
 	int end = jiffies + msecs_to_jiffies(max_wait_mili);
 	int err = 0;
 
 	MPASS(max_wait_mili > warn_time_mili);
 
 	while (fw_initializing(dev) == 1) {
 		if (time_after(jiffies, end)) {
 			err = -EBUSY;
 			break;
 		}
 		if (warn_time_mili && time_after(jiffies, warn)) {
 			mlx5_core_warn(dev,
 			    "Waiting for FW initialization, timeout abort in %u s\n",
 			    (unsigned)(jiffies_to_msecs(end - warn) / 1000));
 			warn = jiffies + msecs_to_jiffies(warn_time_mili);
 		}
 		msleep(FW_INIT_WAIT_MS);
 	}
 
 	if (err != 0)
 		mlx5_core_dbg(dev, "Full initializing bit dword = 0x%x\n",
 		    ioread32be(&dev->iseg->initializing));
 
 	return err;
 }
 
 static void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv)
 {
 	struct mlx5_device_context *dev_ctx;
 	struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv);
 
 	dev_ctx = kzalloc_node(sizeof(*dev_ctx), GFP_KERNEL, priv->numa_node);
 	if (!dev_ctx)
 		return;
 
 	dev_ctx->intf    = intf;
 	CURVNET_SET_QUIET(vnet0);
 	dev_ctx->context = intf->add(dev);
 	CURVNET_RESTORE();
 
 	if (dev_ctx->context) {
 		spin_lock_irq(&priv->ctx_lock);
 		list_add_tail(&dev_ctx->list, &priv->ctx_list);
 		spin_unlock_irq(&priv->ctx_lock);
 	} else {
 		kfree(dev_ctx);
 	}
 }
 
 static void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv)
 {
 	struct mlx5_device_context *dev_ctx;
 	struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv);
 
 	list_for_each_entry(dev_ctx, &priv->ctx_list, list)
 		if (dev_ctx->intf == intf) {
 			spin_lock_irq(&priv->ctx_lock);
 			list_del(&dev_ctx->list);
 			spin_unlock_irq(&priv->ctx_lock);
 
 			intf->remove(dev, dev_ctx->context);
 			kfree(dev_ctx);
 			return;
 		}
 }
 
 int
 mlx5_register_device(struct mlx5_core_dev *dev)
 {
 	struct mlx5_priv *priv = &dev->priv;
 	struct mlx5_interface *intf;
 
 	mutex_lock(&intf_mutex);
 	list_add_tail(&priv->dev_list, &dev_list);
 	list_for_each_entry(intf, &intf_list, list)
 		mlx5_add_device(intf, priv);
 	mutex_unlock(&intf_mutex);
 
 	return 0;
 }
 
 void
 mlx5_unregister_device(struct mlx5_core_dev *dev)
 {
 	struct mlx5_priv *priv = &dev->priv;
 	struct mlx5_interface *intf;
 
 	mutex_lock(&intf_mutex);
 	list_for_each_entry(intf, &intf_list, list)
 		mlx5_remove_device(intf, priv);
 	list_del(&priv->dev_list);
 	mutex_unlock(&intf_mutex);
 }
 
 int mlx5_register_interface(struct mlx5_interface *intf)
 {
 	struct mlx5_priv *priv;
 
 	if (!intf->add || !intf->remove)
 		return -EINVAL;
 
 	mutex_lock(&intf_mutex);
 	list_add_tail(&intf->list, &intf_list);
 	list_for_each_entry(priv, &dev_list, dev_list)
 		mlx5_add_device(intf, priv);
 	mutex_unlock(&intf_mutex);
 
 	return 0;
 }
 EXPORT_SYMBOL(mlx5_register_interface);
 
 void mlx5_unregister_interface(struct mlx5_interface *intf)
 {
 	struct mlx5_priv *priv;
 
 	mutex_lock(&intf_mutex);
 	list_for_each_entry(priv, &dev_list, dev_list)
 		mlx5_remove_device(intf, priv);
 	list_del(&intf->list);
 	mutex_unlock(&intf_mutex);
 }
 EXPORT_SYMBOL(mlx5_unregister_interface);
 
 void *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol)
 {
 	struct mlx5_priv *priv = &mdev->priv;
 	struct mlx5_device_context *dev_ctx;
 	unsigned long flags;
 	void *result = NULL;
 
 	spin_lock_irqsave(&priv->ctx_lock, flags);
 
 	list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list)
 		if ((dev_ctx->intf->protocol == protocol) &&
 		    dev_ctx->intf->get_dev) {
 			result = dev_ctx->intf->get_dev(dev_ctx->context);
 			break;
 		}
 
 	spin_unlock_irqrestore(&priv->ctx_lock, flags);
 
 	return result;
 }
 EXPORT_SYMBOL(mlx5_get_protocol_dev);
 
 static int mlx5_auto_fw_update;
 SYSCTL_INT(_hw_mlx5, OID_AUTO, auto_fw_update, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
     &mlx5_auto_fw_update, 0,
     "Allow automatic firmware update on driver start");
 static int
 mlx5_firmware_update(struct mlx5_core_dev *dev)
 {
 	const struct firmware *fw;
 	int err;
 
 	TUNABLE_INT_FETCH("hw.mlx5.auto_fw_update", &mlx5_auto_fw_update);
 	if (!mlx5_auto_fw_update)
 		return (0);
 	fw = firmware_get("mlx5fw_mfa");
 	if (fw) {
 		err = mlx5_firmware_flash(dev, fw);
 		firmware_put(fw, FIRMWARE_UNLOAD);
 	}
 	else
 		return (-ENOENT);
 
 	return err;
 }
 
 static int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
 {
 	struct pci_dev *pdev = dev->pdev;
 	int err;
 
 	pdev = dev->pdev;
 	pci_set_drvdata(dev->pdev, dev);
 	strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN);
 	priv->name[MLX5_MAX_NAME_LEN - 1] = 0;
 
 	mutex_init(&priv->pgdir_mutex);
 	INIT_LIST_HEAD(&priv->pgdir_list);
 	spin_lock_init(&priv->mkey_lock);
 
 	err = mlx5_pci_enable_device(dev);
 	if (err) {
 		mlx5_core_err(dev, "Cannot enable PCI device, aborting\n");
 		goto err_dbg;
 	}
 
 	err = request_bar(pdev);
 	if (err) {
 		mlx5_core_err(dev, "error requesting BARs, aborting\n");
 		goto err_disable;
 	}
 
 	pci_set_master(pdev);
 
 	err = set_dma_caps(pdev);
 	if (err) {
 		mlx5_core_err(dev, "Failed setting DMA capabilities mask, aborting\n");
 		goto err_clr_master;
 	}
 
 	dev->iseg_base = pci_resource_start(dev->pdev, 0);
 	dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg));
 	if (!dev->iseg) {
 		err = -ENOMEM;
 		mlx5_core_err(dev, "Failed mapping initialization segment, aborting\n");
 		goto err_clr_master;
 	}
 
 	return 0;
 
 err_clr_master:
 	release_bar(dev->pdev);
 err_disable:
 	mlx5_pci_disable_device(dev);
 err_dbg:
 	return err;
 }
 
 static void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
 {
 #ifdef PCI_IOV
 	if (MLX5_CAP_GEN(dev, eswitch_flow_table))
 		pci_iov_detach(dev->pdev->dev.bsddev);
 #endif
 	iounmap(dev->iseg);
 	release_bar(dev->pdev);
 	mlx5_pci_disable_device(dev);
 }
 
 static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
 {
 	int err;
 
 	err = mlx5_vsc_find_cap(dev);
 	if (err)
 		mlx5_core_warn(dev, "Unable to find vendor specific capabilities\n");
 
 	err = mlx5_query_hca_caps(dev);
 	if (err) {
 		mlx5_core_err(dev, "query hca failed\n");
 		goto out;
 	}
 
 	err = mlx5_query_board_id(dev);
 	if (err) {
 		mlx5_core_err(dev, "query board id failed\n");
 		goto out;
 	}
 
 	err = mlx5_eq_init(dev);
 	if (err) {
 		mlx5_core_err(dev, "failed to initialize eq\n");
 		goto out;
 	}
 
 	MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock);
 
 	err = mlx5_init_cq_table(dev);
 	if (err) {
 		mlx5_core_err(dev, "failed to initialize cq table\n");
 		goto err_eq_cleanup;
 	}
 
 	mlx5_init_qp_table(dev);
 	mlx5_init_srq_table(dev);
 	mlx5_init_mr_table(dev);
 
 	mlx5_init_reserved_gids(dev);
 	mlx5_fpga_init(dev);
 
 #ifdef RATELIMIT
 	err = mlx5_init_rl_table(dev);
 	if (err) {
 		mlx5_core_err(dev, "Failed to init rate limiting\n");
 		goto err_tables_cleanup;
 	}
 #endif
 	return 0;
 
 #ifdef RATELIMIT
 err_tables_cleanup:
 	mlx5_cleanup_mr_table(dev);
 	mlx5_cleanup_srq_table(dev);
 	mlx5_cleanup_qp_table(dev);
 	mlx5_cleanup_cq_table(dev);
 #endif
 
 err_eq_cleanup:
 	mlx5_eq_cleanup(dev);
 
 out:
 	return err;
 }
 
 static void mlx5_cleanup_once(struct mlx5_core_dev *dev)
 {
 #ifdef RATELIMIT
 	mlx5_cleanup_rl_table(dev);
 #endif
 	mlx5_fpga_cleanup(dev);
 	mlx5_cleanup_reserved_gids(dev);
 	mlx5_cleanup_mr_table(dev);
 	mlx5_cleanup_srq_table(dev);
 	mlx5_cleanup_qp_table(dev);
 	mlx5_cleanup_cq_table(dev);
 	mlx5_eq_cleanup(dev);
 }
 
 static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
 			 bool boot)
 {
 	int err;
 
 	mutex_lock(&dev->intf_state_mutex);
 	if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
 		mlx5_core_warn(dev, "interface is up, NOP\n");
 		goto out;
 	}
 
 	mlx5_core_dbg(dev, "firmware version: %d.%d.%d\n",
 	    fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev));
 
 	/*
 	 * On load removing any previous indication of internal error,
 	 * device is up
 	 */
 	dev->state = MLX5_DEVICE_STATE_UP;
 
 	/* wait for firmware to accept initialization segments configurations
 	*/
 	err = wait_fw_init(dev, FW_PRE_INIT_TIMEOUT_MILI,
 	    FW_INIT_WARN_MESSAGE_INTERVAL);
 	if (err) {
 		dev_err(&dev->pdev->dev,
 		    "Firmware over %d MS in pre-initializing state, aborting\n",
 		    FW_PRE_INIT_TIMEOUT_MILI);
 		goto out_err;
 	}
 
 	err = mlx5_cmd_init(dev);
 	if (err) {
 		mlx5_core_err(dev,
 		    "Failed initializing command interface, aborting\n");
 		goto out_err;
 	}
 
 	err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI, 0);
 	if (err) {
 		mlx5_core_err(dev,
 		    "Firmware over %d MS in initializing state, aborting\n",
 		    FW_INIT_TIMEOUT_MILI);
 		goto err_cmd_cleanup;
 	}
 
 	err = mlx5_core_enable_hca(dev, 0);
 	if (err) {
 		mlx5_core_err(dev, "enable hca failed\n");
 		goto err_cmd_cleanup;
 	}
 
 	err = mlx5_core_set_issi(dev);
 	if (err) {
 		mlx5_core_err(dev, "failed to set issi\n");
 		goto err_disable_hca;
 	}
 
 	err = mlx5_pagealloc_start(dev);
 	if (err) {
 		mlx5_core_err(dev, "mlx5_pagealloc_start failed\n");
 		goto err_disable_hca;
 	}
 
 	err = mlx5_satisfy_startup_pages(dev, 1);
 	if (err) {
 		mlx5_core_err(dev, "failed to allocate boot pages\n");
 		goto err_pagealloc_stop;
 	}
 
 	err = set_hca_ctrl(dev);
 	if (err) {
 		mlx5_core_err(dev, "set_hca_ctrl failed\n");
 		goto reclaim_boot_pages;
 	}
 
 	err = handle_hca_cap(dev);
 	if (err) {
 		mlx5_core_err(dev, "handle_hca_cap failed\n");
 		goto reclaim_boot_pages;
 	}
 
 	err = handle_hca_cap_atomic(dev);
 	if (err) {
 		mlx5_core_err(dev, "handle_hca_cap_atomic failed\n");
 		goto reclaim_boot_pages;
 	}
 
 	err = mlx5_satisfy_startup_pages(dev, 0);
 	if (err) {
 		mlx5_core_err(dev, "failed to allocate init pages\n");
 		goto reclaim_boot_pages;
 	}
 
 	err = mlx5_cmd_init_hca(dev);
 	if (err) {
 		mlx5_core_err(dev, "init hca failed\n");
 		goto reclaim_boot_pages;
 	}
 
 	mlx5_set_driver_version(dev);
 
 	mlx5_start_health_poll(dev);
 
 	if (boot && (err = mlx5_init_once(dev, priv))) {
 		mlx5_core_err(dev, "sw objs init failed\n");
 		goto err_stop_poll;
 	}
 
 	dev->priv.uar = mlx5_get_uars_page(dev);
 	if (IS_ERR(dev->priv.uar)) {
 		mlx5_core_err(dev, "Failed allocating uar, aborting\n");
 		err = PTR_ERR(dev->priv.uar);
 		goto err_cleanup_once;
 	}
 
 	err = mlx5_enable_msix(dev);
 	if (err) {
 		mlx5_core_err(dev, "enable msix failed\n");
 		goto err_cleanup_uar;
 	}
 
 	err = mlx5_start_eqs(dev);
 	if (err) {
 		mlx5_core_err(dev, "Failed to start pages and async EQs\n");
 		goto err_disable_msix;
 	}
 
 	err = alloc_comp_eqs(dev);
 	if (err) {
 		mlx5_core_err(dev, "Failed to alloc completion EQs\n");
 		goto err_stop_eqs;
 	}
 
 	err = mlx5_init_fs(dev);
 	if (err) {
 		mlx5_core_err(dev, "flow steering init %d\n", err);
 		goto err_free_comp_eqs;
 	}
 
 	err = mlx5_core_set_hca_defaults(dev);
 	if (err) {
 		mlx5_core_err(dev, "Failed to set HCA defaults %d\n", err);
 		goto err_free_comp_eqs;
 	}
 
 	err = mlx5_mpfs_init(dev);
 	if (err) {
 		mlx5_core_err(dev, "mpfs init failed %d\n", err);
 		goto err_fs;
 	}
 
 	err = mlx5_fpga_device_start(dev);
 	if (err) {
 		mlx5_core_err(dev, "fpga device start failed %d\n", err);
 		goto err_mpfs;
 	}
 
+	err = mlx5_diag_cnt_init(dev);
+	if (err) {
+		mlx5_core_err(dev, "diag cnt init failed %d\n", err);
+		goto err_fpga;
+	}
+
 	err = mlx5_register_device(dev);
 	if (err) {
 		mlx5_core_err(dev, "mlx5_register_device failed %d\n", err);
-		goto err_fpga;
+		goto err_diag_cnt;
 	}
 
 	set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
 
 out:
 	mutex_unlock(&dev->intf_state_mutex);
 	return 0;
 
+err_diag_cnt:
+	mlx5_diag_cnt_cleanup(dev);
+
 err_fpga:
 	mlx5_fpga_device_stop(dev);
 
 err_mpfs:
 	mlx5_mpfs_destroy(dev);
 
 err_fs:
 	mlx5_cleanup_fs(dev);
 
 err_free_comp_eqs:
 	free_comp_eqs(dev);
 
 err_stop_eqs:
 	mlx5_stop_eqs(dev);
 
 err_disable_msix:
 	mlx5_disable_msix(dev);
 
 err_cleanup_uar:
 	mlx5_put_uars_page(dev, dev->priv.uar);
 
 err_cleanup_once:
 	if (boot)
 		mlx5_cleanup_once(dev);
 
 err_stop_poll:
 	mlx5_stop_health_poll(dev, boot);
 	if (mlx5_cmd_teardown_hca(dev)) {
 		mlx5_core_err(dev, "tear_down_hca failed, skip cleanup\n");
 		goto out_err;
 	}
 
 reclaim_boot_pages:
 	mlx5_reclaim_startup_pages(dev);
 
 err_pagealloc_stop:
 	mlx5_pagealloc_stop(dev);
 
 err_disable_hca:
 	mlx5_core_disable_hca(dev);
 
 err_cmd_cleanup:
 	mlx5_cmd_cleanup(dev);
 
 out_err:
 	dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
 	mutex_unlock(&dev->intf_state_mutex);
 
 	return err;
 }
 
 static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
 			   bool cleanup)
 {
 	int err = 0;
 
 	if (cleanup)
 		mlx5_drain_health_recovery(dev);
 
 	mutex_lock(&dev->intf_state_mutex);
 	if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
 		mlx5_core_warn(dev, "%s: interface is down, NOP\n", __func__);
                 if (cleanup)
                         mlx5_cleanup_once(dev);
 		goto out;
 	}
 
 	mlx5_unregister_device(dev);
 
 	mlx5_eswitch_cleanup(dev->priv.eswitch);
+	mlx5_diag_cnt_cleanup(dev);
 	mlx5_fpga_device_stop(dev);
 	mlx5_mpfs_destroy(dev);
 	mlx5_cleanup_fs(dev);
 	mlx5_wait_for_reclaim_vfs_pages(dev);
 	free_comp_eqs(dev);
 	mlx5_stop_eqs(dev);
 	mlx5_disable_msix(dev);
 	mlx5_put_uars_page(dev, dev->priv.uar);
         if (cleanup)
                 mlx5_cleanup_once(dev);
 	mlx5_stop_health_poll(dev, cleanup);
 	err = mlx5_cmd_teardown_hca(dev);
 	if (err) {
 		mlx5_core_err(dev, "tear_down_hca failed, skip cleanup\n");
 		goto out;
 	}
 	mlx5_pagealloc_stop(dev);
 	mlx5_reclaim_startup_pages(dev);
 	mlx5_core_disable_hca(dev);
 	mlx5_cmd_cleanup(dev);
 
 out:
 	clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
 	mutex_unlock(&dev->intf_state_mutex);
 	return err;
 }
 
 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
 		     unsigned long param)
 {
 	struct mlx5_priv *priv = &dev->priv;
 	struct mlx5_device_context *dev_ctx;
 	unsigned long flags;
 
 	spin_lock_irqsave(&priv->ctx_lock, flags);
 
 	list_for_each_entry(dev_ctx, &priv->ctx_list, list)
 		if (dev_ctx->intf->event)
 			dev_ctx->intf->event(dev, dev_ctx->context, event, param);
 
 	spin_unlock_irqrestore(&priv->ctx_lock, flags);
 }
 
 struct mlx5_core_event_handler {
 	void (*event)(struct mlx5_core_dev *dev,
 		      enum mlx5_dev_event event,
 		      void *data);
 };
 
 #define	MLX5_STATS_DESC(a, b, c, d, e, ...) d, e,
 
 #define	MLX5_PORT_MODULE_ERROR_STATS(m)				\
 m(+1, u64, power_budget_exceeded, "power_budget", "Module Power Budget Exceeded") \
 m(+1, u64, long_range, "long_range", "Module Long Range for non MLNX cable/module") \
 m(+1, u64, bus_stuck, "bus_stuck", "Module Bus stuck(I2C or data shorted)") \
 m(+1, u64, no_eeprom, "no_eeprom", "No EEPROM/retry timeout") \
 m(+1, u64, enforce_part_number, "enforce_part_number", "Module Enforce part number list") \
 m(+1, u64, unknown_id, "unknown_id", "Module Unknown identifier") \
 m(+1, u64, high_temp, "high_temp", "Module High Temperature") \
 m(+1, u64, cable_shorted, "cable_shorted", "Module Cable is shorted") \
 m(+1, u64, pmd_type_not_enabled, "pmd_type_not_enabled", "PMD type is not enabled") \
 m(+1, u64, laster_tec_failure, "laster_tec_failure", "Laster TEC failure") \
 m(+1, u64, high_current, "high_current", "High current") \
 m(+1, u64, high_voltage, "high_voltage", "High voltage") \
 m(+1, u64, pcie_sys_power_slot_exceeded, "pcie_sys_power_slot_exceeded", "PCIe system power slot Exceeded") \
 m(+1, u64, high_power, "high_power", "High power")			\
 m(+1, u64, module_state_machine_fault, "module_state_machine_fault", "Module State Machine fault")
 
 static const char *mlx5_pme_err_desc[] = {
 	MLX5_PORT_MODULE_ERROR_STATS(MLX5_STATS_DESC)
 };
 
 static int init_one(struct pci_dev *pdev,
 		    const struct pci_device_id *id)
 {
 	struct mlx5_core_dev *dev;
 	struct mlx5_priv *priv;
 	device_t bsddev = pdev->dev.bsddev;
 #ifdef PCI_IOV
 	nvlist_t *pf_schema, *vf_schema;
 	int num_vfs, sriov_pos;
 #endif
 	int i,err;
 	int numa_node;
 	struct sysctl_oid *pme_sysctl_node;
 	struct sysctl_oid *pme_err_sysctl_node;
 	struct sysctl_oid *cap_sysctl_node;
 	struct sysctl_oid *current_cap_sysctl_node;
 	struct sysctl_oid *max_cap_sysctl_node;
 
 	printk_once("mlx5: %s", mlx5_version);
 
 	numa_node = dev_to_node(&pdev->dev);
 
 	dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, numa_node);
 
 	priv = &dev->priv;
 	priv->numa_node = numa_node;
 
 	if (id)
 		priv->pci_dev_data = id->driver_data;
 
 	if (mlx5_prof_sel < 0 || mlx5_prof_sel >= ARRAY_SIZE(profiles)) {
 		device_printf(bsddev,
 		    "WARN: selected profile out of range, selecting default (%d)\n",
 		    MLX5_DEFAULT_PROF);
 		mlx5_prof_sel = MLX5_DEFAULT_PROF;
 	}
 	dev->profile = &profiles[mlx5_prof_sel];
 	dev->pdev = pdev;
 	dev->event = mlx5_core_event;
 
 	/* Set desc */
 	device_set_desc(bsddev, mlx5_version);
 
 	sysctl_ctx_init(&dev->sysctl_ctx);
 	SYSCTL_ADD_INT(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)),
 	    OID_AUTO, "msix_eqvec", CTLFLAG_RDTUN, &dev->msix_eqvec, 0,
 	    "Maximum number of MSIX event queue vectors, if set");
 	SYSCTL_ADD_INT(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)),
 	    OID_AUTO, "power_status", CTLFLAG_RD, &dev->pwr_status, 0,
 	    "0:Invalid 1:Sufficient 2:Insufficient");
 	SYSCTL_ADD_INT(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)),
 	    OID_AUTO, "power_value", CTLFLAG_RD, &dev->pwr_value, 0,
 	    "Current power value in Watts");
 
 	pme_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)),
 	    OID_AUTO, "pme_stats", CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
 	    "Port module event statistics");
 	if (pme_sysctl_node == NULL) {
 		err = -ENOMEM;
 		goto clean_sysctl_ctx;
 	}
 	pme_err_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(pme_sysctl_node),
 	    OID_AUTO, "errors", CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
 	    "Port module event error statistics");
 	if (pme_err_sysctl_node == NULL) {
 		err = -ENOMEM;
 		goto clean_sysctl_ctx;
 	}
 	SYSCTL_ADD_U64(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(pme_sysctl_node), OID_AUTO,
 	    "module_plug", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->priv.pme_stats.status_counters[MLX5_MODULE_STATUS_PLUGGED_ENABLED],
 	    0, "Number of time module plugged");
 	SYSCTL_ADD_U64(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(pme_sysctl_node), OID_AUTO,
 	    "module_unplug", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->priv.pme_stats.status_counters[MLX5_MODULE_STATUS_UNPLUGGED],
 	    0, "Number of time module unplugged");
 	for (i = 0 ; i < MLX5_MODULE_EVENT_ERROR_NUM; i++) {
 		SYSCTL_ADD_U64(&dev->sysctl_ctx,
 		    SYSCTL_CHILDREN(pme_err_sysctl_node), OID_AUTO,
 		    mlx5_pme_err_desc[2 * i], CTLFLAG_RD | CTLFLAG_MPSAFE,
 		    &dev->priv.pme_stats.error_counters[i],
 		    0, mlx5_pme_err_desc[2 * i + 1]);
 	}
 
 	cap_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)),
 	    OID_AUTO, "caps", CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
 	    "hardware capabilities raw bitstrings");
 	if (cap_sysctl_node == NULL) {
 		err = -ENOMEM;
 		goto clean_sysctl_ctx;
 	}
 	current_cap_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(cap_sysctl_node),
 	    OID_AUTO, "current", CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
 	    "");
 	if (current_cap_sysctl_node == NULL) {
 		err = -ENOMEM;
 		goto clean_sysctl_ctx;
 	}
 	max_cap_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(cap_sysctl_node),
 	    OID_AUTO, "max", CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
 	    "");
 	if (max_cap_sysctl_node == NULL) {
 		err = -ENOMEM;
 		goto clean_sysctl_ctx;
 	}
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "general", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_GENERAL],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "general", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_GENERAL],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "ether", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_ETHERNET_OFFLOADS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "ether", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_ETHERNET_OFFLOADS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "odp", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_ODP],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "odp", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_ODP],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "atomic", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_ATOMIC],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "atomic", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_ATOMIC],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "roce", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_ROCE],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "roce", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_ROCE],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "ipoib", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_IPOIB_OFFLOADS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "ipoib", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_IPOIB_OFFLOADS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "eoib", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_EOIB_OFFLOADS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "eoib", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_EOIB_OFFLOADS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "flow_table", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_FLOW_TABLE],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "flow_table", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_FLOW_TABLE],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "eswitch_flow_table", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_ESWITCH_FLOW_TABLE],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "eswitch_flow_table", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_ESWITCH_FLOW_TABLE],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "eswitch", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_ESWITCH],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "eswitch", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_ESWITCH],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "snapshot", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_SNAPSHOT],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "snapshot", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_SNAPSHOT],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "vector_calc", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_VECTOR_CALC],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "vector_calc", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_VECTOR_CALC],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "qos", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_QOS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "qos", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_QOS],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(current_cap_sysctl_node),
 	    OID_AUTO, "debug", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_cur[MLX5_CAP_DEBUG],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(max_cap_sysctl_node),
 	    OID_AUTO, "debug", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->hca_caps_max[MLX5_CAP_DEBUG],
 	    MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(cap_sysctl_node),
 	    OID_AUTO, "pcam", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->caps.pcam, sizeof(dev->caps.pcam), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(cap_sysctl_node),
 	    OID_AUTO, "mcam", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->caps.mcam, sizeof(dev->caps.mcam), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(cap_sysctl_node),
 	    OID_AUTO, "qcam", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->caps.qcam, sizeof(dev->caps.qcam), "IU", "");
 	SYSCTL_ADD_OPAQUE(&dev->sysctl_ctx,
 	    SYSCTL_CHILDREN(cap_sysctl_node),
 	    OID_AUTO, "fpga", CTLFLAG_RD | CTLFLAG_MPSAFE,
 	    &dev->caps.fpga, sizeof(dev->caps.fpga), "IU", "");
 
 	INIT_LIST_HEAD(&priv->ctx_list);
 	spin_lock_init(&priv->ctx_lock);
 	mutex_init(&dev->pci_status_mutex);
 	mutex_init(&dev->intf_state_mutex);
 
 	mutex_init(&priv->bfregs.reg_head.lock);
 	mutex_init(&priv->bfregs.wc_head.lock);
 	INIT_LIST_HEAD(&priv->bfregs.reg_head.list);
 	INIT_LIST_HEAD(&priv->bfregs.wc_head.list);
 
 	mtx_init(&dev->dump_lock, "mlx5dmp", NULL, MTX_DEF | MTX_NEW);
 	err = mlx5_pci_init(dev, priv);
 	if (err) {
 		mlx5_core_err(dev, "mlx5_pci_init failed %d\n", err);
 		goto clean_dev;
 	}
 
 	err = mlx5_health_init(dev);
 	if (err) {
 		mlx5_core_err(dev, "mlx5_health_init failed %d\n", err);
 		goto close_pci;
 	}
 
 	mlx5_pagealloc_init(dev);
 
 	err = mlx5_load_one(dev, priv, true);
 	if (err) {
 		mlx5_core_err(dev, "mlx5_load_one failed %d\n", err);
 		goto clean_health;
 	}
 
 	mlx5_fwdump_prep(dev);
 
 	mlx5_firmware_update(dev);
 
 #ifdef PCI_IOV
 	if (MLX5_CAP_GEN(dev, vport_group_manager)) {
 		if (pci_find_extcap(bsddev, PCIZ_SRIOV, &sriov_pos) == 0) {
 			num_vfs = pci_read_config(bsddev, sriov_pos +
 			    PCIR_SRIOV_TOTAL_VFS, 2);
 		} else {
 			mlx5_core_info(dev, "cannot find SR-IOV PCIe cap\n");
 			num_vfs = 0;
 		}
 		err = mlx5_eswitch_init(dev, 1 + num_vfs);
 		if (err == 0) {
 			pf_schema = pci_iov_schema_alloc_node();
 			vf_schema = pci_iov_schema_alloc_node();
 			pci_iov_schema_add_unicast_mac(vf_schema,
 			    iov_mac_addr_name, 0, NULL);
 			pci_iov_schema_add_uint64(vf_schema, iov_node_guid_name,
 			    0, 0);
 			pci_iov_schema_add_uint64(vf_schema, iov_port_guid_name,
 			    0, 0);
 			err = pci_iov_attach(bsddev, pf_schema, vf_schema);
 			if (err != 0) {
 				device_printf(bsddev,
 			    "Failed to initialize SR-IOV support, error %d\n",
 				    err);
 			}
 		} else {
 			mlx5_core_err(dev, "eswitch init failed, error %d\n",
 			    err);
 		}
 	}
 #endif
 
 	pci_save_state(pdev);
 	return 0;
 
 clean_health:
 	mlx5_pagealloc_cleanup(dev);
 	mlx5_health_cleanup(dev);
 close_pci:
 	mlx5_pci_close(dev, priv);
 clean_dev:
 	mtx_destroy(&dev->dump_lock);
 clean_sysctl_ctx:
 	sysctl_ctx_free(&dev->sysctl_ctx);
 	kfree(dev);
 	return err;
 }
 
 static void remove_one(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev  = pci_get_drvdata(pdev);
 	struct mlx5_priv *priv = &dev->priv;
 
 #ifdef PCI_IOV
 	pci_iov_detach(pdev->dev.bsddev);
 	mlx5_eswitch_disable_sriov(priv->eswitch);
 #endif
 
 	if (mlx5_unload_one(dev, priv, true)) {
 		mlx5_core_err(dev, "mlx5_unload_one() failed, leaked %lld bytes\n",
 		    (long long)(dev->priv.fw_pages * MLX5_ADAPTER_PAGE_SIZE));
 	}
 
 	mlx5_pagealloc_cleanup(dev);
 	mlx5_health_cleanup(dev);
 	mlx5_fwdump_clean(dev);
 	mlx5_pci_close(dev, priv);
 	mtx_destroy(&dev->dump_lock);
 	pci_set_drvdata(pdev, NULL);
 	sysctl_ctx_free(&dev->sysctl_ctx);
 	kfree(dev);
 }
 
 static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev,
 					      pci_channel_state_t state)
 {
 	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
 	struct mlx5_priv *priv = &dev->priv;
 
 	mlx5_core_info(dev, "%s was called\n", __func__);
 	mlx5_enter_error_state(dev, false);
 	mlx5_unload_one(dev, priv, false);
 
 	if (state) {
 		mlx5_drain_health_wq(dev);
 		mlx5_pci_disable_device(dev);
 	}
 
 	return state == pci_channel_io_perm_failure ?
 		PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
 }
 
 static pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
 	int err = 0;
 
 	mlx5_core_info(dev,"%s was called\n", __func__);
 
 	err = mlx5_pci_enable_device(dev);
 	if (err) {
 		mlx5_core_err(dev, "mlx5_pci_enable_device failed with error code: %d\n"
 			,err);
 		return PCI_ERS_RESULT_DISCONNECT;
 	}
 	pci_set_master(pdev);
 	pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0);
 	pci_restore_state(pdev);
 	pci_save_state(pdev);
 
 	return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
 }
 
 /* wait for the device to show vital signs. For now we check
  * that we can read the device ID and that the health buffer
  * shows a non zero value which is different than 0xffffffff
  */
 static void wait_vital(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
 	struct mlx5_core_health *health = &dev->priv.health;
 	const int niter = 100;
 	u32 count;
 	u16 did;
 	int i;
 
 	/* Wait for firmware to be ready after reset */
 	msleep(1000);
 	for (i = 0; i < niter; i++) {
 		if (pci_read_config_word(pdev, 2, &did)) {
 			mlx5_core_warn(dev, "failed reading config word\n");
 			break;
 		}
 		if (did == pdev->device) {
 			mlx5_core_info(dev,
 			    "device ID correctly read after %d iterations\n", i);
 			break;
 		}
 		msleep(50);
 	}
 	if (i == niter)
 		mlx5_core_warn(dev, "could not read device ID\n");
 
 	for (i = 0; i < niter; i++) {
 		count = ioread32be(health->health_counter);
 		if (count && count != 0xffffffff) {
 			mlx5_core_info(dev,
 			"Counter value 0x%x after %d iterations\n", count, i);
 			break;
 		}
 		msleep(50);
 	}
 
 	if (i == niter)
 		mlx5_core_warn(dev, "could not read device ID\n");
 }
 
 static void mlx5_pci_resume(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
 	struct mlx5_priv *priv = &dev->priv;
 	int err;
 
 	mlx5_core_info(dev,"%s was called\n", __func__);
 
 	wait_vital(pdev);
 
 	err = mlx5_load_one(dev, priv, false);
 	if (err)
 		mlx5_core_err(dev,
 		    "mlx5_load_one failed with error code: %d\n" ,err);
 	else
 		mlx5_core_info(dev,"device recovered\n");
 }
 
 static const struct pci_error_handlers mlx5_err_handler = {
 	.error_detected = mlx5_pci_err_detected,
 	.slot_reset	= mlx5_pci_slot_reset,
 	.resume		= mlx5_pci_resume
 };
 
 #ifdef PCI_IOV
 static int
 mlx5_iov_init(device_t dev, uint16_t num_vfs, const nvlist_t *pf_config)
 {
 	struct pci_dev *pdev;
 	struct mlx5_core_dev *core_dev;
 	struct mlx5_priv *priv;
 	int err;
 
 	pdev = device_get_softc(dev);
 	core_dev = pci_get_drvdata(pdev);
 	priv = &core_dev->priv;
 
 	if (priv->eswitch == NULL)
 		return (ENXIO);
 	if (priv->eswitch->total_vports < num_vfs + 1)
 		num_vfs = priv->eswitch->total_vports - 1;
 	err = mlx5_eswitch_enable_sriov(priv->eswitch, num_vfs);
 	return (-err);
 }
 
 static void
 mlx5_iov_uninit(device_t dev)
 {
 	struct pci_dev *pdev;
 	struct mlx5_core_dev *core_dev;
 	struct mlx5_priv *priv;
 
 	pdev = device_get_softc(dev);
 	core_dev = pci_get_drvdata(pdev);
 	priv = &core_dev->priv;
 
 	mlx5_eswitch_disable_sriov(priv->eswitch);
 }
 
 static int
 mlx5_iov_add_vf(device_t dev, uint16_t vfnum, const nvlist_t *vf_config)
 {
 	struct pci_dev *pdev;
 	struct mlx5_core_dev *core_dev;
 	struct mlx5_priv *priv;
 	const void *mac;
 	size_t mac_size;
 	uint64_t node_guid, port_guid;
 	int error;
 
 	pdev = device_get_softc(dev);
 	core_dev = pci_get_drvdata(pdev);
 	priv = &core_dev->priv;
 
 	if (vfnum + 1 >= priv->eswitch->total_vports)
 		return (ENXIO);
 
 	if (nvlist_exists_binary(vf_config, iov_mac_addr_name)) {
 		mac = nvlist_get_binary(vf_config, iov_mac_addr_name,
 		    &mac_size);
 		error = -mlx5_eswitch_set_vport_mac(priv->eswitch,
 		    vfnum + 1, __DECONST(u8 *, mac));
 		if (error != 0) {
 			mlx5_core_err(core_dev,
 			    "setting MAC for VF %d failed, error %d\n",
 			    vfnum + 1, error);
 		}
 	}
 
 	if (nvlist_exists_number(vf_config, iov_node_guid_name)) {
 		node_guid = nvlist_get_number(vf_config, iov_node_guid_name);
 		error = -mlx5_modify_nic_vport_node_guid(core_dev, vfnum + 1,
 		    node_guid);
 		if (error != 0) {
 			mlx5_core_err(core_dev,
 		    "modifying node GUID for VF %d failed, error %d\n",
 			    vfnum + 1, error);
 		}
 	}
 
 	if (nvlist_exists_number(vf_config, iov_port_guid_name)) {
 		port_guid = nvlist_get_number(vf_config, iov_port_guid_name);
 		error = -mlx5_modify_nic_vport_port_guid(core_dev, vfnum + 1,
 		    port_guid);
 		if (error != 0) {
 			mlx5_core_err(core_dev,
 		    "modifying port GUID for VF %d failed, error %d\n",
 			    vfnum + 1, error);
 		}
 	}
 
 	error = -mlx5_eswitch_set_vport_state(priv->eswitch, vfnum + 1,
 	    VPORT_STATE_FOLLOW);
 	if (error != 0) {
 		mlx5_core_err(core_dev,
 		    "upping vport for VF %d failed, error %d\n",
 		    vfnum + 1, error);
 	}
 	error = -mlx5_core_enable_hca(core_dev, vfnum + 1);
 	if (error != 0) {
 		mlx5_core_err(core_dev, "enabling VF %d failed, error %d\n",
 		    vfnum + 1, error);
 	}
 	return (error);
 }
 #endif
 
 static int mlx5_try_fast_unload(struct mlx5_core_dev *dev)
 {
 	bool fast_teardown, force_teardown;
 	int err;
 
 	if (!mlx5_fast_unload_enabled) {
 		mlx5_core_dbg(dev, "fast unload is disabled by user\n");
 		return -EOPNOTSUPP;
 	}
 
 	fast_teardown = MLX5_CAP_GEN(dev, fast_teardown);
 	force_teardown = MLX5_CAP_GEN(dev, force_teardown);
 
 	mlx5_core_dbg(dev, "force teardown firmware support=%d\n", force_teardown);
 	mlx5_core_dbg(dev, "fast teardown firmware support=%d\n", fast_teardown);
 
 	if (!fast_teardown && !force_teardown)
 		return -EOPNOTSUPP;
 
 	if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
 		mlx5_core_dbg(dev, "Device in internal error state, giving up\n");
 		return -EAGAIN;
 	}
 
 	/* Panic tear down fw command will stop the PCI bus communication
 	 * with the HCA, so the health polll is no longer needed.
 	 */
 	mlx5_drain_health_wq(dev);
 	mlx5_stop_health_poll(dev, false);
 
 	err = mlx5_cmd_fast_teardown_hca(dev);
 	if (!err)
 		goto done;
 
 	err = mlx5_cmd_force_teardown_hca(dev);
 	if (!err)
 		goto done;
 
 	mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", err);
 	mlx5_start_health_poll(dev);
 	return err;
 done:
 	mlx5_enter_error_state(dev, true);
 	return 0;
 }
 
 static void mlx5_shutdown_disable_interrupts(struct mlx5_core_dev *mdev)
 {
 	int nvec = mdev->priv.eq_table.num_comp_vectors + MLX5_EQ_VEC_COMP_BASE;
 	int x;
 
 	mdev->priv.disable_irqs = 1;
 
 	/* wait for all IRQ handlers to finish processing */
 	for (x = 0; x != nvec; x++)
 		synchronize_irq(mdev->priv.msix_arr[x].vector);
 }
 
 static void shutdown_one(struct pci_dev *pdev)
 {
 	struct mlx5_core_dev *dev  = pci_get_drvdata(pdev);
 	struct mlx5_priv *priv = &dev->priv;
 	int err;
 
 	/* enter polling mode */
 	mlx5_cmd_use_polling(dev);
 
 	set_bit(MLX5_INTERFACE_STATE_TEARDOWN, &dev->intf_state);
 
 	/* disable all interrupts */
 	mlx5_shutdown_disable_interrupts(dev);
 
 	err = mlx5_try_fast_unload(dev);
 	if (err)
 	        mlx5_unload_one(dev, priv, false);
 	mlx5_pci_disable_device(dev);
 }
 
 static const struct pci_device_id mlx5_core_pci_table[] = {
 	{ PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */
 	{ PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */
 	{ PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */
 	{ PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */
 	{ PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */
 	{ PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */
 	{ PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5, PCIe 3.0 */
 	{ PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */
 	{ PCI_VDEVICE(MELLANOX, 4121) }, /* ConnectX-5 Ex */
 	{ PCI_VDEVICE(MELLANOX, 4122) }, /* ConnectX-5 Ex VF */
 	{ PCI_VDEVICE(MELLANOX, 4123) }, /* ConnectX-6 */
 	{ PCI_VDEVICE(MELLANOX, 4124) }, /* ConnectX-6 VF */
 	{ PCI_VDEVICE(MELLANOX, 4125) }, /* ConnectX-6 Dx */
 	{ PCI_VDEVICE(MELLANOX, 4126) }, /* ConnectX Family mlx5Gen Virtual Function */
 	{ PCI_VDEVICE(MELLANOX, 4127) }, /* ConnectX-6 LX */
 	{ PCI_VDEVICE(MELLANOX, 4128) },
 	{ PCI_VDEVICE(MELLANOX, 4129) }, /* ConnectX-7 */
 	{ PCI_VDEVICE(MELLANOX, 4130) },
 	{ PCI_VDEVICE(MELLANOX, 4131) }, /* ConnectX-8 */
 	{ PCI_VDEVICE(MELLANOX, 4132) },
 	{ PCI_VDEVICE(MELLANOX, 4133) },
 	{ PCI_VDEVICE(MELLANOX, 4134) },
 	{ PCI_VDEVICE(MELLANOX, 4135) },
 	{ PCI_VDEVICE(MELLANOX, 4136) },
 	{ PCI_VDEVICE(MELLANOX, 4137) },
 	{ PCI_VDEVICE(MELLANOX, 4138) },
 	{ PCI_VDEVICE(MELLANOX, 4139) },
 	{ PCI_VDEVICE(MELLANOX, 4140) },
 	{ PCI_VDEVICE(MELLANOX, 4141) },
 	{ PCI_VDEVICE(MELLANOX, 4142) },
 	{ PCI_VDEVICE(MELLANOX, 4143) },
 	{ PCI_VDEVICE(MELLANOX, 4144) },
 	{ PCI_VDEVICE(MELLANOX, 0xa2d2) }, /* BlueField integrated ConnectX-5 network controller */
 	{ PCI_VDEVICE(MELLANOX, 0xa2d3) }, /* BlueField integrated ConnectX-5 network controller VF */
 	{ PCI_VDEVICE(MELLANOX, 0xa2d6) }, /* BlueField-2 integrated ConnectX-6 Dx network controller */
 	{ PCI_VDEVICE(MELLANOX, 0xa2dc) }, /* BlueField-3 integrated ConnectX-7 network controller */
 	{ PCI_VDEVICE(MELLANOX, 0xa2df) }, /* BlueField-4 integrated ConnectX-8 network controller */
 	{ }
 };
 
 MODULE_DEVICE_TABLE(pci, mlx5_core_pci_table);
 
 void mlx5_disable_device(struct mlx5_core_dev *dev)
 {
 	mlx5_pci_err_detected(dev->pdev, 0);
 }
 
 void mlx5_recover_device(struct mlx5_core_dev *dev)
 {
 	mlx5_pci_disable_device(dev);
 	if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED)
 		mlx5_pci_resume(dev->pdev);
 }
 
 struct pci_driver mlx5_core_driver = {
 	.name           = DRIVER_NAME,
 	.id_table       = mlx5_core_pci_table,
 	.shutdown	= shutdown_one,
 	.probe          = init_one,
 	.remove         = remove_one,
 	.err_handler	= &mlx5_err_handler,
 #ifdef PCI_IOV
 	.bsd_iov_init	= mlx5_iov_init,
 	.bsd_iov_uninit	= mlx5_iov_uninit,
 	.bsd_iov_add_vf	= mlx5_iov_add_vf,
 #endif
 };
 
 static int __init init(void)
 {
 	int err;
 
 	err = pci_register_driver(&mlx5_core_driver);
 	if (err)
 		goto err_debug;
 
 	err = mlx5_ctl_init();
 	if (err)
 		goto err_ctl;
  
  	return 0;
  
 err_ctl:
 	pci_unregister_driver(&mlx5_core_driver);
 
 err_debug:
 	return err;
 }
 
 static void __exit cleanup(void)
 {
 	mlx5_ctl_fini();
 	pci_unregister_driver(&mlx5_core_driver);
 }
 
 module_init_order(init, SI_ORDER_FIRST);
 module_exit_order(cleanup, SI_ORDER_FIRST);
diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h
index 52bd65ccdb45..4336e561ecbb 100644
--- a/sys/dev/mlx5/mlx5_ifc.h
+++ b/sys/dev/mlx5/mlx5_ifc.h
@@ -1,11332 +1,11368 @@
 /*-
  * Copyright (c) 2013-2020, Mellanox Technologies.  All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
  * $FreeBSD$
  */
 
 #ifndef MLX5_IFC_H
 #define MLX5_IFC_H
 
 #include <dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h>
 
 enum {
 	MLX5_EVENT_TYPE_NOTIFY_ANY				   = 0x0,
 	MLX5_EVENT_TYPE_COMP                                       = 0x0,
 	MLX5_EVENT_TYPE_PATH_MIG                                   = 0x1,
 	MLX5_EVENT_TYPE_COMM_EST                                   = 0x2,
 	MLX5_EVENT_TYPE_SQ_DRAINED                                 = 0x3,
 	MLX5_EVENT_TYPE_SRQ_LAST_WQE                               = 0x13,
 	MLX5_EVENT_TYPE_SRQ_RQ_LIMIT                               = 0x14,
 	MLX5_EVENT_TYPE_DCT_DRAINED                                = 0x1c,
 	MLX5_EVENT_TYPE_DCT_KEY_VIOLATION                          = 0x1d,
 	MLX5_EVENT_TYPE_CQ_ERROR                                   = 0x4,
 	MLX5_EVENT_TYPE_WQ_CATAS_ERROR                             = 0x5,
 	MLX5_EVENT_TYPE_PATH_MIG_FAILED                            = 0x7,
 	MLX5_EVENT_TYPE_PAGE_FAULT                                 = 0xc,
 	MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR                         = 0x10,
 	MLX5_EVENT_TYPE_WQ_ACCESS_ERROR                            = 0x11,
 	MLX5_EVENT_TYPE_SRQ_CATAS_ERROR                            = 0x12,
 	MLX5_EVENT_TYPE_INTERNAL_ERROR                             = 0x8,
 	MLX5_EVENT_TYPE_PORT_CHANGE                                = 0x9,
 	MLX5_EVENT_TYPE_GPIO_EVENT                                 = 0x15,
 	MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT                   = 0x16,
 	MLX5_EVENT_TYPE_TEMP_WARN_EVENT                            = 0x17,
 	MLX5_EVENT_TYPE_XRQ_ERROR				   = 0x18,
 	MLX5_EVENT_TYPE_REMOTE_CONFIG                              = 0x19,
 	MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT                   = 0x1e,
 	MLX5_EVENT_TYPE_CODING_PPS_EVENT                           = 0x25,
 	MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT          = 0x22,
 	MLX5_EVENT_TYPE_DB_BF_CONGESTION                           = 0x1a,
 	MLX5_EVENT_TYPE_STALL_EVENT                                = 0x1b,
 	MLX5_EVENT_TYPE_DROPPED_PACKET_LOGGED_EVENT                = 0x1f,
 	MLX5_EVENT_TYPE_CMD                                        = 0xa,
 	MLX5_EVENT_TYPE_PAGE_REQUEST                               = 0xb,
 	MLX5_EVENT_TYPE_NIC_VPORT_CHANGE                           = 0xd,
 	MLX5_EVENT_TYPE_FPGA_ERROR                                 = 0x20,
 	MLX5_EVENT_TYPE_FPGA_QP_ERROR                              = 0x21,
 	MLX5_EVENT_TYPE_CODING_GENERAL_OBJ_EVENT                   = 0x27,
 };
 
 enum {
 	MLX5_MODIFY_TIR_BITMASK_LRO                                = 0x0,
 	MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE                     = 0x1,
 	MLX5_MODIFY_TIR_BITMASK_HASH                               = 0x2,
 	MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN                = 0x3,
 	MLX5_MODIFY_TIR_BITMASK_SELF_LB_EN                         = 0x4
 };
 
 enum {
 	MLX5_MODIFY_RQT_BITMASK_RQN_LIST          = 0x1,
 };
 
 enum {
 	MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE        = 0x0,
 	MLX5_SET_HCA_CAP_OP_MOD_ATOMIC                = 0x3,
 };
 
 enum {
 	MLX5_OBJ_TYPE_GENEVE_TLV_OPT = 0x000b,
 	MLX5_OBJ_TYPE_MKEY = 0xff01,
 	MLX5_OBJ_TYPE_QP = 0xff02,
 	MLX5_OBJ_TYPE_PSV = 0xff03,
 	MLX5_OBJ_TYPE_RMP = 0xff04,
 	MLX5_OBJ_TYPE_XRC_SRQ = 0xff05,
 	MLX5_OBJ_TYPE_RQ = 0xff06,
 	MLX5_OBJ_TYPE_SQ = 0xff07,
 	MLX5_OBJ_TYPE_TIR = 0xff08,
 	MLX5_OBJ_TYPE_TIS = 0xff09,
 	MLX5_OBJ_TYPE_DCT = 0xff0a,
 	MLX5_OBJ_TYPE_XRQ = 0xff0b,
 	MLX5_OBJ_TYPE_RQT = 0xff0e,
 	MLX5_OBJ_TYPE_FLOW_COUNTER = 0xff0f,
 	MLX5_OBJ_TYPE_CQ = 0xff10,
 };
 
 enum {
 	MLX5_CMD_OP_QUERY_HCA_CAP                 = 0x100,
 	MLX5_CMD_OP_QUERY_ADAPTER                 = 0x101,
 	MLX5_CMD_OP_INIT_HCA                      = 0x102,
 	MLX5_CMD_OP_TEARDOWN_HCA                  = 0x103,
 	MLX5_CMD_OP_ENABLE_HCA                    = 0x104,
 	MLX5_CMD_OP_DISABLE_HCA                   = 0x105,
 	MLX5_CMD_OP_QUERY_PAGES                   = 0x107,
 	MLX5_CMD_OP_MANAGE_PAGES                  = 0x108,
 	MLX5_CMD_OP_SET_HCA_CAP                   = 0x109,
 	MLX5_CMD_OP_QUERY_ISSI                    = 0x10a,
 	MLX5_CMD_OP_SET_ISSI                      = 0x10b,
 	MLX5_CMD_OP_SET_DRIVER_VERSION            = 0x10d,
 	MLX5_CMD_OP_QUERY_OTHER_HCA_CAP           = 0x10e,
 	MLX5_CMD_OP_MODIFY_OTHER_HCA_CAP          = 0x10f,
 	MLX5_CMD_OP_CREATE_MKEY                   = 0x200,
 	MLX5_CMD_OP_QUERY_MKEY                    = 0x201,
 	MLX5_CMD_OP_DESTROY_MKEY                  = 0x202,
 	MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS        = 0x203,
 	MLX5_CMD_OP_PAGE_FAULT_RESUME             = 0x204,
 	MLX5_CMD_OP_CREATE_EQ                     = 0x301,
 	MLX5_CMD_OP_DESTROY_EQ                    = 0x302,
 	MLX5_CMD_OP_QUERY_EQ                      = 0x303,
 	MLX5_CMD_OP_GEN_EQE                       = 0x304,
 	MLX5_CMD_OP_CREATE_CQ                     = 0x400,
 	MLX5_CMD_OP_DESTROY_CQ                    = 0x401,
 	MLX5_CMD_OP_QUERY_CQ                      = 0x402,
 	MLX5_CMD_OP_MODIFY_CQ                     = 0x403,
 	MLX5_CMD_OP_CREATE_QP                     = 0x500,
 	MLX5_CMD_OP_DESTROY_QP                    = 0x501,
 	MLX5_CMD_OP_RST2INIT_QP                   = 0x502,
 	MLX5_CMD_OP_INIT2RTR_QP                   = 0x503,
 	MLX5_CMD_OP_RTR2RTS_QP                    = 0x504,
 	MLX5_CMD_OP_RTS2RTS_QP                    = 0x505,
 	MLX5_CMD_OP_SQERR2RTS_QP                  = 0x506,
 	MLX5_CMD_OP_2ERR_QP                       = 0x507,
 	MLX5_CMD_OP_2RST_QP                       = 0x50a,
 	MLX5_CMD_OP_QUERY_QP                      = 0x50b,
 	MLX5_CMD_OP_SQD_RTS_QP                    = 0x50c,
 	MLX5_CMD_OP_INIT2INIT_QP                  = 0x50e,
 	MLX5_CMD_OP_CREATE_PSV                    = 0x600,
 	MLX5_CMD_OP_DESTROY_PSV                   = 0x601,
 	MLX5_CMD_OP_CREATE_SRQ                    = 0x700,
 	MLX5_CMD_OP_DESTROY_SRQ                   = 0x701,
 	MLX5_CMD_OP_QUERY_SRQ                     = 0x702,
 	MLX5_CMD_OP_ARM_RQ                        = 0x703,
 	MLX5_CMD_OP_CREATE_XRC_SRQ                = 0x705,
 	MLX5_CMD_OP_DESTROY_XRC_SRQ               = 0x706,
 	MLX5_CMD_OP_QUERY_XRC_SRQ                 = 0x707,
 	MLX5_CMD_OP_ARM_XRC_SRQ                   = 0x708,
 	MLX5_CMD_OP_CREATE_DCT                    = 0x710,
 	MLX5_CMD_OP_DESTROY_DCT                   = 0x711,
 	MLX5_CMD_OP_DRAIN_DCT                     = 0x712,
 	MLX5_CMD_OP_QUERY_DCT                     = 0x713,
 	MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION     = 0x714,
 	MLX5_CMD_OP_SET_DC_CNAK_TRACE             = 0x715,
 	MLX5_CMD_OP_QUERY_DC_CNAK_TRACE           = 0x716,
 	MLX5_CMD_OP_CREATE_XRQ                    = 0x717,
 	MLX5_CMD_OP_DESTROY_XRQ                   = 0x718,
 	MLX5_CMD_OP_QUERY_XRQ                     = 0x719,
 	MLX5_CMD_OP_ARM_XRQ                       = 0x71a,
 	MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY     = 0x725,
 	MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY       = 0x726,
 	MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS        = 0x727,
 	MLX5_CMD_OP_RELEASE_XRQ_ERROR             = 0x729,
 	MLX5_CMD_OP_MODIFY_XRQ                    = 0x72a,
 
 	MLX5_CMD_OP_QUERY_VPORT_STATE             = 0x750,
 	MLX5_CMD_OP_MODIFY_VPORT_STATE            = 0x751,
 	MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT       = 0x752,
 	MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT      = 0x753,
 	MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT       = 0x754,
 	MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT      = 0x755,
 	MLX5_CMD_OP_QUERY_ROCE_ADDRESS            = 0x760,
 	MLX5_CMD_OP_SET_ROCE_ADDRESS              = 0x761,
 	MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT       = 0x762,
 	MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT      = 0x763,
 	MLX5_CMD_OP_QUERY_HCA_VPORT_GID           = 0x764,
 	MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY          = 0x765,
 	MLX5_CMD_OP_QUERY_VNIC_ENV                = 0x76f,
 	MLX5_CMD_OP_QUERY_VPORT_COUNTER           = 0x770,
 	MLX5_CMD_OP_ALLOC_Q_COUNTER               = 0x771,
 	MLX5_CMD_OP_DEALLOC_Q_COUNTER             = 0x772,
 	MLX5_CMD_OP_QUERY_Q_COUNTER               = 0x773,
 	MLX5_CMD_OP_SET_RATE_LIMIT                = 0x780,
 	MLX5_CMD_OP_QUERY_RATE_LIMIT              = 0x781,
 	MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT     = 0x782,
 	MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT    = 0x783,
 	MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT      = 0x784,
 	MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT     = 0x785,
 	MLX5_CMD_OP_CREATE_QOS_PARA_VPORT         = 0x786,
 	MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT        = 0x787,
 	MLX5_CMD_OP_ALLOC_PD                      = 0x800,
 	MLX5_CMD_OP_DEALLOC_PD                    = 0x801,
 	MLX5_CMD_OP_ALLOC_UAR                     = 0x802,
 	MLX5_CMD_OP_DEALLOC_UAR                   = 0x803,
 	MLX5_CMD_OP_CONFIG_INT_MODERATION         = 0x804,
 	MLX5_CMD_OP_ACCESS_REG                    = 0x805,
 	MLX5_CMD_OP_ATTACH_TO_MCG                 = 0x806,
 	MLX5_CMD_OP_DETACH_FROM_MCG               = 0x807,
 	MLX5_CMD_OP_GET_DROPPED_PACKET_LOG        = 0x80a,
 	MLX5_CMD_OP_MAD_IFC                       = 0x50d,
 	MLX5_CMD_OP_QUERY_MAD_DEMUX               = 0x80b,
 	MLX5_CMD_OP_SET_MAD_DEMUX                 = 0x80c,
 	MLX5_CMD_OP_NOP                           = 0x80d,
 	MLX5_CMD_OP_ALLOC_XRCD                    = 0x80e,
 	MLX5_CMD_OP_DEALLOC_XRCD                  = 0x80f,
 	MLX5_CMD_OP_SET_BURST_SIZE                = 0x812,
 	MLX5_CMD_OP_QUERY_BURST_SIZE              = 0x813,
 	MLX5_CMD_OP_ACTIVATE_TRACER               = 0x814,
 	MLX5_CMD_OP_DEACTIVATE_TRACER             = 0x815,
 	MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN        = 0x816,
 	MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN      = 0x817,
+	MLX5_CMD_OP_QUERY_DIAGNOSTIC_PARAMS       = 0x819,
 	MLX5_CMD_OP_SET_DIAGNOSTICS               = 0x820,
 	MLX5_CMD_OP_QUERY_DIAGNOSTICS             = 0x821,
 	MLX5_CMD_OP_QUERY_CONG_STATUS             = 0x822,
 	MLX5_CMD_OP_MODIFY_CONG_STATUS            = 0x823,
 	MLX5_CMD_OP_QUERY_CONG_PARAMS             = 0x824,
 	MLX5_CMD_OP_MODIFY_CONG_PARAMS            = 0x825,
 	MLX5_CMD_OP_QUERY_CONG_STATISTICS         = 0x826,
 	MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT           = 0x827,
 	MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT        = 0x828,
 	MLX5_CMD_OP_SET_L2_TABLE_ENTRY            = 0x829,
 	MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY          = 0x82a,
 	MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY         = 0x82b,
 	MLX5_CMD_OP_SET_WOL_ROL                   = 0x830,
 	MLX5_CMD_OP_QUERY_WOL_ROL                 = 0x831,
 	MLX5_CMD_OP_CREATE_LAG                    = 0x840,
 	MLX5_CMD_OP_MODIFY_LAG                    = 0x841,
 	MLX5_CMD_OP_QUERY_LAG                     = 0x842,
 	MLX5_CMD_OP_DESTROY_LAG                   = 0x843,
 	MLX5_CMD_OP_CREATE_VPORT_LAG              = 0x844,
 	MLX5_CMD_OP_DESTROY_VPORT_LAG             = 0x845,
 	MLX5_CMD_OP_CREATE_TIR                    = 0x900,
 	MLX5_CMD_OP_MODIFY_TIR                    = 0x901,
 	MLX5_CMD_OP_DESTROY_TIR                   = 0x902,
 	MLX5_CMD_OP_QUERY_TIR                     = 0x903,
 	MLX5_CMD_OP_CREATE_SQ                     = 0x904,
 	MLX5_CMD_OP_MODIFY_SQ                     = 0x905,
 	MLX5_CMD_OP_DESTROY_SQ                    = 0x906,
 	MLX5_CMD_OP_QUERY_SQ                      = 0x907,
 	MLX5_CMD_OP_CREATE_RQ                     = 0x908,
 	MLX5_CMD_OP_MODIFY_RQ                     = 0x909,
 	MLX5_CMD_OP_DESTROY_RQ                    = 0x90a,
 	MLX5_CMD_OP_QUERY_RQ                      = 0x90b,
 	MLX5_CMD_OP_CREATE_RMP                    = 0x90c,
 	MLX5_CMD_OP_MODIFY_RMP                    = 0x90d,
 	MLX5_CMD_OP_DESTROY_RMP                   = 0x90e,
 	MLX5_CMD_OP_QUERY_RMP                     = 0x90f,
 	MLX5_CMD_OP_SET_DELAY_DROP_PARAMS         = 0x910,
 	MLX5_CMD_OP_QUERY_DELAY_DROP_PARAMS       = 0x911,
 	MLX5_CMD_OP_CREATE_TIS                    = 0x912,
 	MLX5_CMD_OP_MODIFY_TIS                    = 0x913,
 	MLX5_CMD_OP_DESTROY_TIS                   = 0x914,
 	MLX5_CMD_OP_QUERY_TIS                     = 0x915,
 	MLX5_CMD_OP_CREATE_RQT                    = 0x916,
 	MLX5_CMD_OP_MODIFY_RQT                    = 0x917,
 	MLX5_CMD_OP_DESTROY_RQT                   = 0x918,
 	MLX5_CMD_OP_QUERY_RQT                     = 0x919,
 	MLX5_CMD_OP_SET_FLOW_TABLE_ROOT           = 0x92f,
 	MLX5_CMD_OP_CREATE_FLOW_TABLE             = 0x930,
 	MLX5_CMD_OP_DESTROY_FLOW_TABLE            = 0x931,
 	MLX5_CMD_OP_QUERY_FLOW_TABLE              = 0x932,
 	MLX5_CMD_OP_CREATE_FLOW_GROUP             = 0x933,
 	MLX5_CMD_OP_DESTROY_FLOW_GROUP            = 0x934,
 	MLX5_CMD_OP_QUERY_FLOW_GROUP              = 0x935,
 	MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY          = 0x936,
 	MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY        = 0x937,
 	MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY       = 0x938,
 	MLX5_CMD_OP_ALLOC_FLOW_COUNTER            = 0x939,
 	MLX5_CMD_OP_DEALLOC_FLOW_COUNTER          = 0x93a,
 	MLX5_CMD_OP_QUERY_FLOW_COUNTER            = 0x93b,
 	MLX5_CMD_OP_MODIFY_FLOW_TABLE             = 0x93c,
 	MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT = 0x93d,
 	MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT = 0x93e,
 	MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT = 0x93f,
 	MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT   = 0x940,
 	MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
 	MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT   = 0x942,
 	MLX5_CMD_OP_FPGA_CREATE_QP                = 0x960,
 	MLX5_CMD_OP_FPGA_MODIFY_QP                = 0x961,
 	MLX5_CMD_OP_FPGA_QUERY_QP                 = 0x962,
 	MLX5_CMD_OP_FPGA_DESTROY_QP               = 0x963,
 	MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS        = 0x964,
 	MLX5_CMD_OP_CREATE_GENERAL_OBJ            = 0xa00,
 	MLX5_CMD_OP_MODIFY_GENERAL_OBJ            = 0xa01,
 	MLX5_CMD_OP_QUERY_GENERAL_OBJ             = 0xa02,
 	MLX5_CMD_OP_DESTROY_GENERAL_OBJ           = 0xa03,
 	MLX5_CMD_OP_CREATE_UCTX                   = 0xa04,
 	MLX5_CMD_OP_DESTROY_UCTX                  = 0xa06,
 	MLX5_CMD_OP_CREATE_UMEM                   = 0xa08,
 	MLX5_CMD_OP_DESTROY_UMEM                  = 0xa0a,
 };
 
 /* Valid range for general commands that don't work over an object */
 enum {
 	MLX5_CMD_OP_GENERAL_START = 0xb00,
 	MLX5_CMD_OP_GENERAL_END = 0xd00,
 };
 
 enum {
 	MLX5_ICMD_CMDS_OPCODE_ICMD_OPCODE_QUERY_FW_INFO     = 0x8007,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_CAPABILITY         = 0x8400,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_ACCESS_REGISTER          = 0x9001,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_VIRTUAL_MAC        = 0x9003,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_SET_VIRTUAL_MAC          = 0x9004,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_WOL_ROL            = 0x9005,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_SET_WOL_ROL              = 0x9006,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_INIT                = 0x9007,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_QUERY_HEADER_STATUS = 0x9008,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_QUERY_ETOC_STATUS   = 0x9009,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_SET_EVENT           = 0x900a,
 	MLX5_ICMD_CMDS_OPCODE_ICMD_OPCODE_INIT_OCSD         = 0xf004
 };
 
 enum {
 	MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = 0xc,
 };
 
 enum {
 	MLX5_HCA_CAP_GENERAL_OBJ_TYPES_ENCRYPTION_KEY = 1 << 0xc,
 };
 
 enum {
 	MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_128 = 0x0,
 	MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_256 = 0x1,
 };
 
 enum {
 	MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_TYPE_DEK = 0x1,
 };
 
 struct mlx5_ifc_flow_table_fields_supported_bits {
 	u8         outer_dmac[0x1];
 	u8         outer_smac[0x1];
 	u8         outer_ether_type[0x1];
 	u8         outer_ip_version[0x1];
 	u8         outer_first_prio[0x1];
 	u8         outer_first_cfi[0x1];
 	u8         outer_first_vid[0x1];
 	u8         reserved_1[0x1];
 	u8         outer_second_prio[0x1];
 	u8         outer_second_cfi[0x1];
 	u8         outer_second_vid[0x1];
 	u8         outer_ipv6_flow_label[0x1];
 	u8         outer_sip[0x1];
 	u8         outer_dip[0x1];
 	u8         outer_frag[0x1];
 	u8         outer_ip_protocol[0x1];
 	u8         outer_ip_ecn[0x1];
 	u8         outer_ip_dscp[0x1];
 	u8         outer_udp_sport[0x1];
 	u8         outer_udp_dport[0x1];
 	u8         outer_tcp_sport[0x1];
 	u8         outer_tcp_dport[0x1];
 	u8         outer_tcp_flags[0x1];
 	u8         outer_gre_protocol[0x1];
 	u8         outer_gre_key[0x1];
 	u8         outer_vxlan_vni[0x1];
 	u8         outer_geneve_vni[0x1];
 	u8         outer_geneve_oam[0x1];
 	u8         outer_geneve_protocol_type[0x1];
 	u8         outer_geneve_opt_len[0x1];
 	u8         reserved_2[0x1];
 	u8         source_eswitch_port[0x1];
 
 	u8         inner_dmac[0x1];
 	u8         inner_smac[0x1];
 	u8         inner_ether_type[0x1];
 	u8         inner_ip_version[0x1];
 	u8         inner_first_prio[0x1];
 	u8         inner_first_cfi[0x1];
 	u8         inner_first_vid[0x1];
 	u8         reserved_4[0x1];
 	u8         inner_second_prio[0x1];
 	u8         inner_second_cfi[0x1];
 	u8         inner_second_vid[0x1];
 	u8         inner_ipv6_flow_label[0x1];
 	u8         inner_sip[0x1];
 	u8         inner_dip[0x1];
 	u8         inner_frag[0x1];
 	u8         inner_ip_protocol[0x1];
 	u8         inner_ip_ecn[0x1];
 	u8         inner_ip_dscp[0x1];
 	u8         inner_udp_sport[0x1];
 	u8         inner_udp_dport[0x1];
 	u8         inner_tcp_sport[0x1];
 	u8         inner_tcp_dport[0x1];
 	u8         inner_tcp_flags[0x1];
 	u8         reserved_5[0x9];
 
 	u8         reserved_6[0x1a];
 	u8         bth_dst_qp[0x1];
 	u8         reserved_7[0x4];
 	u8         source_sqn[0x1];
 
 	u8         reserved_8[0x20];
 };
 
 struct mlx5_ifc_eth_discard_cntrs_grp_bits {
 	u8         ingress_general_high[0x20];
 
 	u8         ingress_general_low[0x20];
 
 	u8         ingress_policy_engine_high[0x20];
 
 	u8         ingress_policy_engine_low[0x20];
 
 	u8         ingress_vlan_membership_high[0x20];
 
 	u8         ingress_vlan_membership_low[0x20];
 
 	u8         ingress_tag_frame_type_high[0x20];
 
 	u8         ingress_tag_frame_type_low[0x20];
 
 	u8         egress_vlan_membership_high[0x20];
 
 	u8         egress_vlan_membership_low[0x20];
 
 	u8         loopback_filter_high[0x20];
 
 	u8         loopback_filter_low[0x20];
 
 	u8         egress_general_high[0x20];
 
 	u8         egress_general_low[0x20];
 
 	u8         reserved_at_1c0[0x40];
 
 	u8         egress_hoq_high[0x20];
 
 	u8         egress_hoq_low[0x20];
 
 	u8         port_isolation_high[0x20];
 
 	u8         port_isolation_low[0x20];
 
 	u8         egress_policy_engine_high[0x20];
 
 	u8         egress_policy_engine_low[0x20];
 
 	u8         ingress_tx_link_down_high[0x20];
 
 	u8         ingress_tx_link_down_low[0x20];
 
 	u8         egress_stp_filter_high[0x20];
 
 	u8         egress_stp_filter_low[0x20];
 
 	u8         egress_hoq_stall_high[0x20];
 
 	u8         egress_hoq_stall_low[0x20];
 
 	u8         reserved_at_340[0x440];
 };
 struct mlx5_ifc_flow_table_prop_layout_bits {
 	u8         ft_support[0x1];
 	u8         flow_tag[0x1];
 	u8         flow_counter[0x1];
 	u8         flow_modify_en[0x1];
 	u8         modify_root[0x1];
 	u8         identified_miss_table[0x1];
 	u8         flow_table_modify[0x1];
 	u8         encap[0x1];
 	u8         decap[0x1];
 	u8         reset_root_to_default[0x1];
 	u8         reserved_at_a[0x16];
 
 	u8         reserved_at_20[0x2];
 	u8         log_max_ft_size[0x6];
 	u8         reserved_at_28[0x10];
 	u8         max_ft_level[0x8];
 
 	u8         reserved_at_40[0x20];
 
 	u8         reserved_at_60[0x18];
 	u8         log_max_ft_num[0x8];
 
 	u8         reserved_at_80[0x10];
 	u8         log_max_flow_counter[0x8];
 	u8         log_max_destination[0x8];
 
 	u8         reserved_at_a0[0x18];
 	u8         log_max_flow[0x8];
 
 	u8         reserved_at_c0[0x40];
 
 	struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
 
 	struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
 };
 
 struct mlx5_ifc_odp_per_transport_service_cap_bits {
 	u8         send[0x1];
 	u8         receive[0x1];
 	u8         write[0x1];
 	u8         read[0x1];
 	u8         atomic[0x1];
 	u8         srq_receive[0x1];
 	u8         reserved_0[0x1a];
 };
 
 struct mlx5_ifc_flow_counter_list_bits {
 	u8         reserved_0[0x10];
 	u8         flow_counter_id[0x10];
 
 	u8         reserved_1[0x20];
 };
 
 enum {
 	MLX5_FLOW_CONTEXT_DEST_TYPE_VPORT                    = 0x0,
 	MLX5_FLOW_CONTEXT_DEST_TYPE_FLOW_TABLE               = 0x1,
 	MLX5_FLOW_CONTEXT_DEST_TYPE_TIR                      = 0x2,
 	MLX5_FLOW_CONTEXT_DEST_TYPE_QP                       = 0x3,
 };
 
 struct mlx5_ifc_dest_format_struct_bits {
 	u8         destination_type[0x8];
 	u8         destination_id[0x18];
 
 	u8         reserved_0[0x20];
 };
 
 struct mlx5_ifc_ipv4_layout_bits {
 	u8         reserved_at_0[0x60];
 
 	u8         ipv4[0x20];
 };
 
 struct mlx5_ifc_ipv6_layout_bits {
 	u8         ipv6[16][0x8];
 };
 
 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
 	struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
 	struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
 	u8         reserved_at_0[0x80];
 };
 
 struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
 	u8         smac_47_16[0x20];
 
 	u8         smac_15_0[0x10];
 	u8         ethertype[0x10];
 
 	u8         dmac_47_16[0x20];
 
 	u8         dmac_15_0[0x10];
 	u8         first_prio[0x3];
 	u8         first_cfi[0x1];
 	u8         first_vid[0xc];
 
 	u8         ip_protocol[0x8];
 	u8         ip_dscp[0x6];
 	u8         ip_ecn[0x2];
 	u8         cvlan_tag[0x1];
 	u8         svlan_tag[0x1];
 	u8         frag[0x1];
 	u8         ip_version[0x4];
 	u8         tcp_flags[0x9];
 
 	u8         tcp_sport[0x10];
 	u8         tcp_dport[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         udp_sport[0x10];
 	u8         udp_dport[0x10];
 
 	union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
 
 	union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
 };
 
 struct mlx5_ifc_fte_match_set_misc_bits {
 	u8         reserved_0[0x8];
 	u8         source_sqn[0x18];
 
 	u8         reserved_1[0x10];
 	u8         source_port[0x10];
 
 	u8         outer_second_prio[0x3];
 	u8         outer_second_cfi[0x1];
 	u8         outer_second_vid[0xc];
 	u8         inner_second_prio[0x3];
 	u8         inner_second_cfi[0x1];
 	u8         inner_second_vid[0xc];
 
 	u8         outer_second_vlan_tag[0x1];
 	u8         inner_second_vlan_tag[0x1];
 	u8         reserved_2[0xe];
 	u8         gre_protocol[0x10];
 
 	u8         gre_key_h[0x18];
 	u8         gre_key_l[0x8];
 
 	u8         vxlan_vni[0x18];
 	u8         reserved_3[0x8];
 
 	u8         geneve_vni[0x18];
 	u8         reserved4[0x7];
 	u8         geneve_oam[0x1];
 
 	u8         reserved_5[0xc];
 	u8         outer_ipv6_flow_label[0x14];
 
 	u8         reserved_6[0xc];
 	u8         inner_ipv6_flow_label[0x14];
 
 	u8         reserved_7[0xa];
 	u8         geneve_opt_len[0x6];
 	u8         geneve_protocol_type[0x10];
 
 	u8         reserved_8[0x8];
 	u8         bth_dst_qp[0x18];
 
 	u8         reserved_9[0xa0];
 };
 
 struct mlx5_ifc_cmd_pas_bits {
 	u8         pa_h[0x20];
 
 	u8         pa_l[0x14];
 	u8         reserved_0[0xc];
 };
 
 struct mlx5_ifc_uint64_bits {
 	u8         hi[0x20];
 
 	u8         lo[0x20];
 };
 
 struct mlx5_ifc_application_prio_entry_bits {
 	u8         reserved_0[0x8];
 	u8         priority[0x3];
 	u8         reserved_1[0x2];
 	u8         sel[0x3];
 	u8         protocol_id[0x10];
 };
 
 struct mlx5_ifc_nodnic_ring_doorbell_bits {
 	u8         reserved_0[0x8];
 	u8         ring_pi[0x10];
 	u8         reserved_1[0x8];
 };
 
 enum {
 	MLX5_ADS_STAT_RATE_NO_LIMIT  = 0x0,
 	MLX5_ADS_STAT_RATE_2_5GBPS   = 0x7,
 	MLX5_ADS_STAT_RATE_10GBPS    = 0x8,
 	MLX5_ADS_STAT_RATE_30GBPS    = 0x9,
 	MLX5_ADS_STAT_RATE_5GBPS     = 0xa,
 	MLX5_ADS_STAT_RATE_20GBPS    = 0xb,
 	MLX5_ADS_STAT_RATE_40GBPS    = 0xc,
 	MLX5_ADS_STAT_RATE_60GBPS    = 0xd,
 	MLX5_ADS_STAT_RATE_80GBPS    = 0xe,
 	MLX5_ADS_STAT_RATE_120GBPS   = 0xf,
 };
 
 struct mlx5_ifc_ads_bits {
 	u8         fl[0x1];
 	u8         free_ar[0x1];
 	u8         reserved_0[0xe];
 	u8         pkey_index[0x10];
 
 	u8         reserved_1[0x8];
 	u8         grh[0x1];
 	u8         mlid[0x7];
 	u8         rlid[0x10];
 
 	u8         ack_timeout[0x5];
 	u8         reserved_2[0x3];
 	u8         src_addr_index[0x8];
 	u8         log_rtm[0x4];
 	u8         stat_rate[0x4];
 	u8         hop_limit[0x8];
 
 	u8         reserved_3[0x4];
 	u8         tclass[0x8];
 	u8         flow_label[0x14];
 
 	u8         rgid_rip[16][0x8];
 
 	u8         reserved_4[0x4];
 	u8         f_dscp[0x1];
 	u8         f_ecn[0x1];
 	u8         reserved_5[0x1];
 	u8         f_eth_prio[0x1];
 	u8         ecn[0x2];
 	u8         dscp[0x6];
 	u8         udp_sport[0x10];
 
 	u8         dei_cfi[0x1];
 	u8         eth_prio[0x3];
 	u8         sl[0x4];
 	u8         port[0x8];
 	u8         rmac_47_32[0x10];
 
 	u8         rmac_31_0[0x20];
 };
 
 struct mlx5_ifc_diagnostic_counter_cap_bits {
 	u8         sync[0x1];
 	u8         reserved_0[0xf];
 	u8         counter_id[0x10];
 };
 
 struct mlx5_ifc_debug_cap_bits {
 	u8         reserved_0[0x18];
 	u8         log_max_samples[0x8];
 
 	u8         single[0x1];
 	u8         repetitive[0x1];
 	u8         health_mon_rx_activity[0x1];
 	u8         reserved_1[0x15];
 	u8         log_min_sample_period[0x8];
 
 	u8         reserved_2[0x1c0];
 
 	struct mlx5_ifc_diagnostic_counter_cap_bits diagnostic_counter[0x1f0];
 };
 
 struct mlx5_ifc_qos_cap_bits {
 	u8         packet_pacing[0x1];
 	u8         esw_scheduling[0x1];
 	u8         esw_bw_share[0x1];
 	u8         esw_rate_limit[0x1];
 	u8         hll[0x1];
 	u8         packet_pacing_burst_bound[0x1];
 	u8         packet_pacing_typical_size[0x1];
 	u8         reserved_at_7[0x19];
 
 	u8 	   reserved_at_20[0xA];
 	u8	   qos_remap_pp[0x1];
 	u8         reserved_at_2b[0x15];
 
 	u8         packet_pacing_max_rate[0x20];
 
 	u8         packet_pacing_min_rate[0x20];
 
 	u8         reserved_at_80[0x10];
 	u8         packet_pacing_rate_table_size[0x10];
 
 	u8         esw_element_type[0x10];
 	u8         esw_tsar_type[0x10];
 
 	u8         reserved_at_c0[0x10];
 	u8         max_qos_para_vport[0x10];
 
 	u8         max_tsar_bw_share[0x20];
 
 	u8         reserved_at_100[0x700];
 };
 
 struct mlx5_ifc_snapshot_cap_bits {
 	u8         reserved_0[0x1d];
 	u8         suspend_qp_uc[0x1];
 	u8         suspend_qp_ud[0x1];
 	u8         suspend_qp_rc[0x1];
 
 	u8         reserved_1[0x1c];
 	u8         restore_pd[0x1];
 	u8         restore_uar[0x1];
 	u8         restore_mkey[0x1];
 	u8         restore_qp[0x1];
 
 	u8         reserved_2[0x1e];
 	u8         named_mkey[0x1];
 	u8         named_qp[0x1];
 
 	u8         reserved_3[0x7a0];
 };
 
 struct mlx5_ifc_e_switch_cap_bits {
 	u8         vport_svlan_strip[0x1];
 	u8         vport_cvlan_strip[0x1];
 	u8         vport_svlan_insert[0x1];
 	u8         vport_cvlan_insert_if_not_exist[0x1];
 	u8         vport_cvlan_insert_overwrite[0x1];
 
 	u8         reserved_0[0x19];
 
 	u8         nic_vport_node_guid_modify[0x1];
 	u8         nic_vport_port_guid_modify[0x1];
 
 	u8         reserved_1[0x7e0];
 };
 
 struct mlx5_ifc_flow_table_eswitch_cap_bits {
 	u8         reserved_0[0x200];
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
 
 	u8         reserved_1[0x7800];
 };
 
 struct mlx5_ifc_flow_table_nic_cap_bits {
 	u8         nic_rx_multi_path_tirs[0x1];
 	u8         nic_rx_multi_path_tirs_fts[0x1];
 	u8         allow_sniffer_and_nic_rx_shared_tir[0x1];
 	u8         reserved_at_3[0x1fd];
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_rdma;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_rdma;
 
 	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
 
 	u8         reserved_1[0x7200];
 };
 
 struct mlx5_ifc_pddr_module_info_bits {
 	u8         cable_technology[0x8];
 	u8         cable_breakout[0x8];
 	u8         ext_ethernet_compliance_code[0x8];
 	u8         ethernet_compliance_code[0x8];
 
 	u8         cable_type[0x4];
 	u8         cable_vendor[0x4];
 	u8         cable_length[0x8];
 	u8         cable_identifier[0x8];
 	u8         cable_power_class[0x8];
 
 	u8         reserved_at_40[0x8];
 	u8         cable_rx_amp[0x8];
 	u8         cable_rx_emphasis[0x8];
 	u8         cable_tx_equalization[0x8];
 
 	u8         reserved_at_60[0x8];
 	u8         cable_attenuation_12g[0x8];
 	u8         cable_attenuation_7g[0x8];
 	u8         cable_attenuation_5g[0x8];
 
 	u8         reserved_at_80[0x8];
 	u8         rx_cdr_cap[0x4];
 	u8         tx_cdr_cap[0x4];
 	u8         reserved_at_90[0x4];
 	u8         rx_cdr_state[0x4];
 	u8         reserved_at_98[0x4];
 	u8         tx_cdr_state[0x4];
 
 	u8         vendor_name[16][0x8];
 
 	u8         vendor_pn[16][0x8];
 
 	u8         vendor_rev[0x20];
 
 	u8         fw_version[0x20];
 
 	u8         vendor_sn[16][0x8];
 
 	u8         temperature[0x10];
 	u8         voltage[0x10];
 
 	u8         rx_power_lane0[0x10];
 	u8         rx_power_lane1[0x10];
 
 	u8         rx_power_lane2[0x10];
 	u8         rx_power_lane3[0x10];
 
 	u8         reserved_at_2c0[0x40];
 
 	u8         tx_power_lane0[0x10];
 	u8         tx_power_lane1[0x10];
 
 	u8         tx_power_lane2[0x10];
 	u8         tx_power_lane3[0x10];
 
 	u8         reserved_at_340[0x40];
 
 	u8         tx_bias_lane0[0x10];
 	u8         tx_bias_lane1[0x10];
 
 	u8         tx_bias_lane2[0x10];
 	u8         tx_bias_lane3[0x10];
 
 	u8         reserved_at_3c0[0x40];
 
 	u8         temperature_high_th[0x10];
 	u8         temperature_low_th[0x10];
 
 	u8         voltage_high_th[0x10];
 	u8         voltage_low_th[0x10];
 
 	u8         rx_power_high_th[0x10];
 	u8         rx_power_low_th[0x10];
 
 	u8         tx_power_high_th[0x10];
 	u8         tx_power_low_th[0x10];
 
 	u8         tx_bias_high_th[0x10];
 	u8         tx_bias_low_th[0x10];
 
 	u8         reserved_at_4a0[0x10];
 	u8         wavelength[0x10];
 
 	u8         reserved_at_4c0[0x300];
 };
 
 struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
 	u8         csum_cap[0x1];
 	u8         vlan_cap[0x1];
 	u8         lro_cap[0x1];
 	u8         lro_psh_flag[0x1];
 	u8         lro_time_stamp[0x1];
 	u8         lro_max_msg_sz_mode[0x2];
 	u8         wqe_vlan_insert[0x1];
 	u8         self_lb_en_modifiable[0x1];
 	u8         self_lb_mc[0x1];
 	u8         self_lb_uc[0x1];
 	u8         max_lso_cap[0x5];
 	u8         multi_pkt_send_wqe[0x2];
 	u8         wqe_inline_mode[0x2];
 	u8         rss_ind_tbl_cap[0x4];
 	u8	   reg_umr_sq[0x1];
 	u8         scatter_fcs[0x1];
 	u8	   enhanced_multi_pkt_send_wqe[0x1];
 	u8         tunnel_lso_const_out_ip_id[0x1];
 	u8         tunnel_lro_gre[0x1];
 	u8         tunnel_lro_vxlan[0x1];
 	u8         tunnel_statless_gre[0x1];
 	u8         tunnel_stateless_vxlan[0x1];
 
 	u8         swp[0x1];
 	u8         swp_csum[0x1];
 	u8         swp_lso[0x1];
 	u8         reserved_2[0x1b];
 	u8         max_geneve_opt_len[0x1];
 	u8         tunnel_stateless_geneve_rx[0x1];
 
 	u8         reserved_3[0x10];
 	u8         lro_min_mss_size[0x10];
 
 	u8         reserved_4[0x120];
 
 	u8         lro_timer_supported_periods[4][0x20];
 
 	u8         reserved_5[0x600];
 };
 
 enum {
 	MLX5_ROCE_CAP_L3_TYPE_GRH   = 0x1,
 	MLX5_ROCE_CAP_L3_TYPE_IPV4  = 0x2,
 	MLX5_ROCE_CAP_L3_TYPE_IPV6  = 0x4,
 };
 
 enum {
 	MLX5_QP_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
 	MLX5_QP_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
 	MLX5_QP_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
 };
 
 struct mlx5_ifc_roce_cap_bits {
 	u8         roce_apm[0x1];
 	u8         rts2rts_primary_eth_prio[0x1];
 	u8         roce_rx_allow_untagged[0x1];
 	u8         rts2rts_src_addr_index_for_vlan_valid_vlan_id[0x1];
 	u8         reserved_at_4[0x1a];
 	u8         qp_ts_format[0x2];
 
 	u8         reserved_1[0x60];
 
 	u8         reserved_2[0xc];
 	u8         l3_type[0x4];
 	u8         reserved_3[0x8];
 	u8         roce_version[0x8];
 
 	u8         reserved_4[0x10];
 	u8         r_roce_dest_udp_port[0x10];
 
 	u8         r_roce_max_src_udp_port[0x10];
 	u8         r_roce_min_src_udp_port[0x10];
 
 	u8         reserved_5[0x10];
 	u8         roce_address_table_size[0x10];
 
 	u8         reserved_6[0x700];
 };
 
 struct mlx5_ifc_device_event_cap_bits {
 	u8         user_affiliated_events[4][0x40];
 
 	u8         user_unaffiliated_events[4][0x40];
 };
 
 enum {
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE     = 0x1,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES    = 0x2,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES    = 0x4,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES    = 0x8,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES   = 0x10,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES   = 0x20,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES   = 0x40,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES  = 0x80,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES  = 0x100,
 };
 
 enum {
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE     = 0x1,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES    = 0x2,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES    = 0x4,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES    = 0x8,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES   = 0x10,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES   = 0x20,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES   = 0x40,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES  = 0x80,
 	MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES  = 0x100,
 };
 
 struct mlx5_ifc_atomic_caps_bits {
 	u8         reserved_0[0x40];
 
 	u8         atomic_req_8B_endianess_mode[0x2];
 	u8         reserved_1[0x4];
 	u8         supported_atomic_req_8B_endianess_mode_1[0x1];
 
 	u8         reserved_2[0x19];
 
 	u8         reserved_3[0x20];
 
 	u8         reserved_4[0x10];
 	u8         atomic_operations[0x10];
 
 	u8         reserved_5[0x10];
 	u8         atomic_size_qp[0x10];
 
 	u8         reserved_6[0x10];
 	u8         atomic_size_dc[0x10];
 
 	u8         reserved_7[0x720];
 };
 
 struct mlx5_ifc_odp_cap_bits {
 	u8         reserved_0[0x40];
 
 	u8         sig[0x1];
 	u8         reserved_1[0x1f];
 
 	u8         reserved_2[0x20];
 
 	struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
 
 	struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
 
 	struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
 
 	struct mlx5_ifc_odp_per_transport_service_cap_bits xrc_odp_caps;
 
 	struct mlx5_ifc_odp_per_transport_service_cap_bits dc_odp_caps;
 
 	u8         reserved_3[0x6e0];
 };
 
 enum {
 	MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES    = 0x0,
 	MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES   = 0x1,
 	MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES   = 0x2,
 	MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES   = 0x3,
 	MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES  = 0x4,
 };
 
 enum {
 	MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES  = 0x0,
 	MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES  = 0x1,
 	MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES  = 0x2,
 	MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES   = 0x3,
 	MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES   = 0x4,
 	MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES   = 0x5,
 };
 
 enum {
 	MLX5_CMD_HCA_CAP_PORT_TYPE_IB        = 0x0,
 	MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET  = 0x1,
 };
 
 enum {
 	MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED       = 0x0,
 	MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE  = 0x1,
 	MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED        = 0x3,
 };
 
 enum {
 	MLX5_UCTX_CAP_RAW_TX = 1UL << 0,
 	MLX5_UCTX_CAP_INTERNAL_DEV_RES = 1UL << 1,
 };
 
 enum {
 	MLX5_SQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
 	MLX5_SQ_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
 	MLX5_SQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
 };
 
 enum {
 	MLX5_RQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
 	MLX5_RQ_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
 	MLX5_RQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
 };
 
 struct mlx5_ifc_cmd_hca_cap_bits {
 	u8         reserved_0[0x80];
 
 	u8         log_max_srq_sz[0x8];
 	u8         log_max_qp_sz[0x8];
 	u8         event_cap[0x1];
 	u8         reserved_1[0xa];
 	u8         log_max_qp[0x5];
 
 	u8         reserved_2[0xb];
 	u8         log_max_srq[0x5];
 	u8         reserved_3[0x10];
 
 	u8         reserved_4[0x8];
 	u8         log_max_cq_sz[0x8];
 	u8         relaxed_ordering_write_umr[0x1];
 	u8         relaxed_ordering_read_umr[0x1];
 	u8         reserved_5[0x9];
 	u8         log_max_cq[0x5];
 
 	u8         log_max_eq_sz[0x8];
 	u8         relaxed_ordering_write[0x1];
 	u8         relaxed_ordering_read[0x1];
 	u8         log_max_mkey[0x6];
 	u8         reserved_7[0xb];
 	u8         fast_teardown[0x1];
 	u8         log_max_eq[0x4];
 
 	u8         max_indirection[0x8];
 	u8         reserved_8[0x1];
 	u8         log_max_mrw_sz[0x7];
 	u8	   force_teardown[0x1];
 	u8         reserved_9[0x1];
 	u8         log_max_bsf_list_size[0x6];
 	u8         reserved_10[0x2];
 	u8         log_max_klm_list_size[0x6];
 
 	u8         reserved_11[0xa];
 	u8         log_max_ra_req_dc[0x6];
 	u8         reserved_12[0xa];
 	u8         log_max_ra_res_dc[0x6];
 
 	u8         reserved_13[0xa];
 	u8         log_max_ra_req_qp[0x6];
 	u8         reserved_14[0xa];
 	u8         log_max_ra_res_qp[0x6];
 
 	u8         pad_cap[0x1];
 	u8         cc_query_allowed[0x1];
 	u8         cc_modify_allowed[0x1];
 	u8         start_pad[0x1];
 	u8         cache_line_128byte[0x1];
 	u8         reserved_at_165[0xa];
 	u8         qcam_reg[0x1];
 	u8         gid_table_size[0x10];
 
 	u8         out_of_seq_cnt[0x1];
 	u8         vport_counters[0x1];
 	u8         retransmission_q_counters[0x1];
 	u8         debug[0x1];
 	u8         modify_rq_counters_set_id[0x1];
 	u8         rq_delay_drop[0x1];
 	u8         max_qp_cnt[0xa];
 	u8         pkey_table_size[0x10];
 
 	u8         vport_group_manager[0x1];
 	u8         vhca_group_manager[0x1];
 	u8         ib_virt[0x1];
 	u8         eth_virt[0x1];
 	u8         reserved_17[0x1];
 	u8         ets[0x1];
 	u8         nic_flow_table[0x1];
 	u8         eswitch_flow_table[0x1];
 	u8         reserved_18[0x1];
 	u8         mcam_reg[0x1];
 	u8         pcam_reg[0x1];
 	u8         local_ca_ack_delay[0x5];
 	u8         port_module_event[0x1];
 	u8         reserved_19[0x5];
 	u8         port_type[0x2];
 	u8         num_ports[0x8];
 
 	u8         snapshot[0x1];
 	u8         reserved_20[0x2];
 	u8         log_max_msg[0x5];
 	u8         reserved_21[0x4];
 	u8         max_tc[0x4];
 	u8         temp_warn_event[0x1];
 	u8         dcbx[0x1];
 	u8         general_notification_event[0x1];
 	u8         reserved_at_1d3[0x2];
 	u8         fpga[0x1];
 	u8         rol_s[0x1];
 	u8         rol_g[0x1];
 	u8         reserved_23[0x1];
 	u8         wol_s[0x1];
 	u8         wol_g[0x1];
 	u8         wol_a[0x1];
 	u8         wol_b[0x1];
 	u8         wol_m[0x1];
 	u8         wol_u[0x1];
 	u8         wol_p[0x1];
 
 	u8         stat_rate_support[0x10];
 	u8         reserved_24[0xc];
 	u8         cqe_version[0x4];
 
 	u8         compact_address_vector[0x1];
 	u8         striding_rq[0x1];
 	u8         reserved_25[0x1];
 	u8         ipoib_enhanced_offloads[0x1];
 	u8         ipoib_ipoib_offloads[0x1];
 	u8         reserved_26[0x8];
 	u8         dc_connect_qp[0x1];
 	u8         dc_cnak_trace[0x1];
 	u8         drain_sigerr[0x1];
 	u8         cmdif_checksum[0x2];
 	u8         sigerr_cqe[0x1];
 	u8         reserved_27[0x1];
 	u8         wq_signature[0x1];
 	u8         sctr_data_cqe[0x1];
 	u8         reserved_28[0x1];
 	u8         sho[0x1];
 	u8         tph[0x1];
 	u8         rf[0x1];
 	u8         dct[0x1];
 	u8         qos[0x1];
 	u8         eth_net_offloads[0x1];
 	u8         roce[0x1];
 	u8         atomic[0x1];
 	u8         reserved_30[0x1];
 
 	u8         cq_oi[0x1];
 	u8         cq_resize[0x1];
 	u8         cq_moderation[0x1];
 	u8         cq_period_mode_modify[0x1];
 	u8         cq_invalidate[0x1];
 	u8         reserved_at_225[0x1];
 	u8         cq_eq_remap[0x1];
 	u8         pg[0x1];
 	u8         block_lb_mc[0x1];
 	u8         exponential_backoff[0x1];
 	u8         scqe_break_moderation[0x1];
 	u8         cq_period_start_from_cqe[0x1];
 	u8         cd[0x1];
 	u8         atm[0x1];
 	u8         apm[0x1];
 	u8	   imaicl[0x1];
 	u8         reserved_32[0x6];
 	u8         qkv[0x1];
 	u8         pkv[0x1];
 	u8	   set_deth_sqpn[0x1];
 	u8         reserved_33[0x3];
 	u8         xrc[0x1];
 	u8         ud[0x1];
 	u8         uc[0x1];
 	u8         rc[0x1];
 
 	u8         uar_4k[0x1];
 	u8         reserved_at_241[0x9];
 	u8         uar_sz[0x6];
 	u8         reserved_35[0x8];
 	u8         log_pg_sz[0x8];
 
 	u8         bf[0x1];
 	u8         driver_version[0x1];
 	u8         pad_tx_eth_packet[0x1];
 	u8         reserved_36[0x8];
 	u8         log_bf_reg_size[0x5];
 	u8         reserved_37[0x10];
 
 	u8         num_of_diagnostic_counters[0x10];
 	u8         max_wqe_sz_sq[0x10];
 
 	u8         reserved_38[0x10];
 	u8         max_wqe_sz_rq[0x10];
 
 	u8         reserved_39[0x10];
 	u8         max_wqe_sz_sq_dc[0x10];
 
 	u8         reserved_40[0x7];
 	u8         max_qp_mcg[0x19];
 
 	u8         reserved_41[0x18];
 	u8         log_max_mcg[0x8];
 
 	u8         reserved_42[0x3];
 	u8         log_max_transport_domain[0x5];
 	u8         reserved_43[0x3];
 	u8         log_max_pd[0x5];
 	u8         reserved_44[0xb];
 	u8         log_max_xrcd[0x5];
 
 	u8         nic_receive_steering_discard[0x1];
 	u8	   reserved_45[0x7];
 	u8         log_max_flow_counter_bulk[0x8];
 	u8         max_flow_counter[0x10];
 
 	u8         reserved_46[0x3];
 	u8         log_max_rq[0x5];
 	u8         reserved_47[0x3];
 	u8         log_max_sq[0x5];
 	u8         reserved_48[0x3];
 	u8         log_max_tir[0x5];
 	u8         reserved_49[0x3];
 	u8         log_max_tis[0x5];
 
 	u8         basic_cyclic_rcv_wqe[0x1];
 	u8         reserved_50[0x2];
 	u8         log_max_rmp[0x5];
 	u8         reserved_51[0x3];
 	u8         log_max_rqt[0x5];
 	u8         reserved_52[0x3];
 	u8         log_max_rqt_size[0x5];
 	u8         reserved_53[0x3];
 	u8         log_max_tis_per_sq[0x5];
 
 	u8         reserved_54[0x3];
 	u8         log_max_stride_sz_rq[0x5];
 	u8         reserved_55[0x3];
 	u8         log_min_stride_sz_rq[0x5];
 	u8         reserved_56[0x3];
 	u8         log_max_stride_sz_sq[0x5];
 	u8         reserved_57[0x3];
 	u8         log_min_stride_sz_sq[0x5];
 
 	u8         reserved_58[0x1b];
 	u8         log_max_wq_sz[0x5];
 
 	u8         nic_vport_change_event[0x1];
 	u8         disable_local_lb_uc[0x1];
 	u8         disable_local_lb_mc[0x1];
 	u8         reserved_59[0x8];
 	u8         log_max_vlan_list[0x5];
 	u8         reserved_60[0x3];
 	u8         log_max_current_mc_list[0x5];
 	u8         reserved_61[0x3];
 	u8         log_max_current_uc_list[0x5];
 
 	u8         general_obj_types[0x40];
 
 	u8         sq_ts_format[0x2];
 	u8         rq_ts_format[0x2];
 	u8         reserved_at_444[0x4];
 	u8         create_qp_start_hint[0x18];
 
 	u8         reserved_at_460[0x3];
 	u8         log_max_uctx[0x5];
 	u8         reserved_at_468[0x3];
 	u8         log_max_umem[0x5];
 	u8         max_num_eqs[0x10];
 
 	u8         reserved_at_480[0x1];
 	u8         tls_tx[0x1];
 	u8         tls_rx[0x1];
 	u8         log_max_l2_table[0x5];
 	u8         reserved_64[0x8];
 	u8         log_uar_page_sz[0x10];
 
 	u8         reserved_65[0x20];
 
 	u8         device_frequency_mhz[0x20];
 
 	u8         device_frequency_khz[0x20];
 
 	u8         reserved_at_500[0x20];
 	u8	   num_of_uars_per_page[0x20];
 	u8         reserved_at_540[0x40];
 
 	u8         log_max_atomic_size_qp[0x8];
 	u8         reserved_67[0x10];
 	u8         log_max_atomic_size_dc[0x8];
 
 	u8         reserved_at_5a0[0x13];
 	u8         log_max_dek[0x5];
 	u8         reserved_at_5b8[0x4];
 	u8         mini_cqe_resp_stride_index[0x1];
 	u8         cqe_128_always[0x1];
 	u8         cqe_compression_128b[0x1];
 
 	u8         cqe_compression[0x1];
 
 	u8         cqe_compression_timeout[0x10];
 	u8         cqe_compression_max_num[0x10];
 
 	u8         reserved_5e0[0xc0];
 
 	u8         uctx_cap[0x20];
 
 	u8         reserved_6c0[0xc0];
 
 	u8	   vhca_tunnel_commands[0x40];
 	u8	   reserved_at_7c0[0x40];
 };
 
 enum mlx5_flow_destination_type {
 	MLX5_FLOW_DESTINATION_TYPE_VPORT	= 0x0,
 	MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE	= 0x1,
 	MLX5_FLOW_DESTINATION_TYPE_TIR		= 0x2,
 };
 
 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
 	struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
 	struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
 	u8         reserved_0[0x40];
 };
 
 struct mlx5_ifc_fte_match_param_bits {
 	struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
 
 	struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
 
 	struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
 
 	u8         reserved_0[0xa00];
 };
 
 enum {
 	MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP     = 0x0,
 	MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP     = 0x1,
 	MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT   = 0x2,
 	MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT   = 0x3,
 	MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI  = 0x4,
 };
 
 struct mlx5_ifc_rx_hash_field_select_bits {
 	u8         l3_prot_type[0x1];
 	u8         l4_prot_type[0x1];
 	u8         selected_fields[0x1e];
 };
 
 struct mlx5_ifc_tls_capabilities_bits {
 	u8         tls_1_2_aes_gcm_128[0x1];
 	u8         tls_1_3_aes_gcm_128[0x1];
 	u8         tls_1_2_aes_gcm_256[0x1];
 	u8         tls_1_3_aes_gcm_256[0x1];
 	u8         reserved_at_4[0x1c];
 
 	u8         reserved_at_20[0x7e0];
 };
 
 enum {
 	MLX5_WQ_TYPE_LINKED_LIST                 = 0x0,
 	MLX5_WQ_TYPE_CYCLIC                      = 0x1,
 	MLX5_WQ_TYPE_STRQ_LINKED_LIST            = 0x2,
 	MLX5_WQ_TYPE_STRQ_CYCLIC                 = 0x3,
 };
 
 enum rq_type {
 	RQ_TYPE_NONE,
 	RQ_TYPE_STRIDE,
 };
 
 enum {
 	MLX5_WQ_END_PAD_MODE_NONE               = 0x0,
 	MLX5_WQ_END_PAD_MODE_ALIGN              = 0x1,
 };
 
 struct mlx5_ifc_wq_bits {
 	u8         wq_type[0x4];
 	u8         wq_signature[0x1];
 	u8         end_padding_mode[0x2];
 	u8         cd_slave[0x1];
 	u8         reserved_0[0x18];
 
 	u8         hds_skip_first_sge[0x1];
 	u8         log2_hds_buf_size[0x3];
 	u8         reserved_1[0x7];
 	u8         page_offset[0x5];
 	u8         lwm[0x10];
 
 	u8         reserved_2[0x8];
 	u8         pd[0x18];
 
 	u8         reserved_3[0x8];
 	u8         uar_page[0x18];
 
 	u8         dbr_addr[0x40];
 
 	u8         hw_counter[0x20];
 
 	u8         sw_counter[0x20];
 
 	u8         reserved_4[0xc];
 	u8         log_wq_stride[0x4];
 	u8         reserved_5[0x3];
 	u8         log_wq_pg_sz[0x5];
 	u8         reserved_6[0x3];
 	u8         log_wq_sz[0x5];
 
 	u8         dbr_umem_valid[0x1];
 	u8         wq_umem_valid[0x1];
 	u8         reserved_7[0x13];
 	u8         single_wqe_log_num_of_strides[0x3];
 	u8         two_byte_shift_en[0x1];
 	u8         reserved_8[0x4];
 	u8         single_stride_log_num_of_bytes[0x3];
 
 	u8         reserved_9[0x4c0];
 
 	struct mlx5_ifc_cmd_pas_bits pas[0];
 };
 
 struct mlx5_ifc_rq_num_bits {
 	u8         reserved_0[0x8];
 	u8         rq_num[0x18];
 };
 
 struct mlx5_ifc_mac_address_layout_bits {
 	u8         reserved_0[0x10];
 	u8         mac_addr_47_32[0x10];
 
 	u8         mac_addr_31_0[0x20];
 };
 
 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
 	u8         reserved_0[0xa0];
 
 	u8         min_time_between_cnps[0x20];
 
 	u8         reserved_1[0x12];
 	u8         cnp_dscp[0x6];
 	u8         reserved_2[0x4];
 	u8         cnp_prio_mode[0x1];
 	u8         cnp_802p_prio[0x3];
 
 	u8         reserved_3[0x720];
 };
 
 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
 	u8         reserved_0[0x60];
 
 	u8         reserved_1[0x4];
 	u8         clamp_tgt_rate[0x1];
 	u8         reserved_2[0x3];
 	u8         clamp_tgt_rate_after_time_inc[0x1];
 	u8         reserved_3[0x17];
 
 	u8         reserved_4[0x20];
 
 	u8         rpg_time_reset[0x20];
 
 	u8         rpg_byte_reset[0x20];
 
 	u8         rpg_threshold[0x20];
 
 	u8         rpg_max_rate[0x20];
 
 	u8         rpg_ai_rate[0x20];
 
 	u8         rpg_hai_rate[0x20];
 
 	u8         rpg_gd[0x20];
 
 	u8         rpg_min_dec_fac[0x20];
 
 	u8         rpg_min_rate[0x20];
 
 	u8         reserved_5[0xe0];
 
 	u8         rate_to_set_on_first_cnp[0x20];
 
 	u8         dce_tcp_g[0x20];
 
 	u8         dce_tcp_rtt[0x20];
 
 	u8         rate_reduce_monitor_period[0x20];
 
 	u8         reserved_6[0x20];
 
 	u8         initial_alpha_value[0x20];
 
 	u8         reserved_7[0x4a0];
 };
 
 struct mlx5_ifc_cong_control_802_1qau_rp_bits {
 	u8         reserved_0[0x80];
 
 	u8         rppp_max_rps[0x20];
 
 	u8         rpg_time_reset[0x20];
 
 	u8         rpg_byte_reset[0x20];
 
 	u8         rpg_threshold[0x20];
 
 	u8         rpg_max_rate[0x20];
 
 	u8         rpg_ai_rate[0x20];
 
 	u8         rpg_hai_rate[0x20];
 
 	u8         rpg_gd[0x20];
 
 	u8         rpg_min_dec_fac[0x20];
 
 	u8         rpg_min_rate[0x20];
 
 	u8         reserved_1[0x640];
 };
 
 enum {
 	MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE    = 0x1,
 	MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET    = 0x2,
 	MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE  = 0x4,
 };
 
 struct mlx5_ifc_resize_field_select_bits {
 	u8         resize_field_select[0x20];
 };
 
 enum {
 	MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD     = 0x1,
 	MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT  = 0x2,
 	MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI            = 0x4,
 	MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN         = 0x8,
 	MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD_MODE  = 0x10,
 	MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_STATUS          = 0x20,
 };
 
 struct mlx5_ifc_modify_field_select_bits {
 	u8         modify_field_select[0x20];
 };
 
 struct mlx5_ifc_field_select_r_roce_np_bits {
 	u8         field_select_r_roce_np[0x20];
 };
 
 enum {
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_CLAMP_TGT_RATE                 = 0x2,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_CLAMP_TGT_RATE_AFTER_TIME_INC  = 0x4,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_TIME_RESET                 = 0x8,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_BYTE_RESET                 = 0x10,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_THRESHOLD                  = 0x20,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MAX_RATE                   = 0x40,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_AI_RATE                    = 0x80,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_HAI_RATE                   = 0x100,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MIN_DEC_FAC                = 0x200,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MIN_RATE                   = 0x400,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RATE_TO_SET_ON_FIRST_CNP       = 0x800,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_DCE_TCP_G                      = 0x1000,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_DCE_TCP_RTT                    = 0x2000,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RATE_REDUCE_MONITOR_PERIOD     = 0x4000,
 	MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_INITIAL_ALPHA_VALUE            = 0x8000,
 };
 
 struct mlx5_ifc_field_select_r_roce_rp_bits {
 	u8         field_select_r_roce_rp[0x20];
 };
 
 enum {
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS     = 0x4,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET   = 0x8,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET   = 0x10,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD    = 0x20,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE     = 0x40,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE      = 0x80,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE     = 0x100,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD           = 0x200,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC  = 0x400,
 	MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE     = 0x800,
 };
 
 struct mlx5_ifc_field_select_802_1qau_rp_bits {
 	u8         field_select_8021qaurp[0x20];
 };
 
 struct mlx5_ifc_pptb_reg_bits {
 	u8         reserved_at_0[0x2];
 	u8         mm[0x2];
 	u8         reserved_at_4[0x4];
 	u8         local_port[0x8];
 	u8         reserved_at_10[0x6];
 	u8         cm[0x1];
 	u8         um[0x1];
 	u8         pm[0x8];
 
 	u8         prio_x_buff[0x20];
 
 	u8         pm_msb[0x8];
 	u8         reserved_at_48[0x10];
 	u8         ctrl_buff[0x4];
 	u8         untagged_buff[0x4];
 };
 
 struct mlx5_ifc_dcbx_app_reg_bits {
 	u8         reserved_0[0x8];
 	u8         port_number[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x1a];
 	u8         num_app_prio[0x6];
 
 	u8         reserved_3[0x40];
 
 	struct mlx5_ifc_application_prio_entry_bits app_prio[0];
 };
 
 struct mlx5_ifc_dcbx_param_reg_bits {
 	u8         dcbx_cee_cap[0x1];
 	u8         dcbx_ieee_cap[0x1];
 	u8         dcbx_standby_cap[0x1];
 	u8         reserved_0[0x5];
 	u8         port_number[0x8];
 	u8         reserved_1[0xa];
 	u8         max_application_table_size[0x6];
 
 	u8         reserved_2[0x15];
 	u8         version_oper[0x3];
 	u8         reserved_3[0x5];
 	u8         version_admin[0x3];
 
 	u8         willing_admin[0x1];
 	u8         reserved_4[0x3];
 	u8         pfc_cap_oper[0x4];
 	u8         reserved_5[0x4];
 	u8         pfc_cap_admin[0x4];
 	u8         reserved_6[0x4];
 	u8         num_of_tc_oper[0x4];
 	u8         reserved_7[0x4];
 	u8         num_of_tc_admin[0x4];
 
 	u8         remote_willing[0x1];
 	u8         reserved_8[0x3];
 	u8         remote_pfc_cap[0x4];
 	u8         reserved_9[0x14];
 	u8         remote_num_of_tc[0x4];
 
 	u8         reserved_10[0x18];
 	u8         error[0x8];
 
 	u8         reserved_11[0x160];
 };
 
 struct mlx5_ifc_qhll_bits {
 	u8         reserved_at_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x1b];
 	u8         hll_time[0x5];
 
 	u8         stall_en[0x1];
 	u8         reserved_at_41[0x1c];
 	u8         stall_cnt[0x3];
 };
 
 struct mlx5_ifc_qetcr_reg_bits {
 	u8         operation_type[0x2];
 	u8         cap_local_admin[0x1];
 	u8         cap_remote_admin[0x1];
 	u8         reserved_0[0x4];
 	u8         port_number[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         tc[8][0x40];
 
 	u8         global_configuration[0x40];
 };
 
 struct mlx5_ifc_nodnic_ring_config_reg_bits {
 	u8         queue_address_63_32[0x20];
 
 	u8         queue_address_31_12[0x14];
 	u8         reserved_0[0x6];
 	u8         log_size[0x6];
 
 	struct mlx5_ifc_nodnic_ring_doorbell_bits doorbell;
 
 	u8         reserved_1[0x8];
 	u8         queue_number[0x18];
 
 	u8         q_key[0x20];
 
 	u8         reserved_2[0x10];
 	u8         pkey_index[0x10];
 
 	u8         reserved_3[0x40];
 };
 
 struct mlx5_ifc_nodnic_cq_arming_word_bits {
 	u8         reserved_0[0x8];
 	u8         cq_ci[0x10];
 	u8         reserved_1[0x8];
 };
 
 enum {
 	MLX5_NODNIC_EVENT_WORD_LINK_TYPE_INFINIBAND  = 0x0,
 	MLX5_NODNIC_EVENT_WORD_LINK_TYPE_ETHERNET    = 0x1,
 };
 
 enum {
 	MLX5_NODNIC_EVENT_WORD_PORT_STATE_DOWN        = 0x0,
 	MLX5_NODNIC_EVENT_WORD_PORT_STATE_INITIALIZE  = 0x1,
 	MLX5_NODNIC_EVENT_WORD_PORT_STATE_ARMED       = 0x2,
 	MLX5_NODNIC_EVENT_WORD_PORT_STATE_ACTIVE      = 0x3,
 };
 
 struct mlx5_ifc_nodnic_event_word_bits {
 	u8         driver_reset_needed[0x1];
 	u8         port_management_change_event[0x1];
 	u8         reserved_0[0x19];
 	u8         link_type[0x1];
 	u8         port_state[0x4];
 };
 
 struct mlx5_ifc_nic_vport_change_event_bits {
 	u8         reserved_0[0x10];
 	u8         vport_num[0x10];
 
 	u8         reserved_1[0xc0];
 };
 
 struct mlx5_ifc_pages_req_event_bits {
 	u8         reserved_0[0x10];
 	u8         function_id[0x10];
 
 	u8         num_pages[0x20];
 
 	u8         reserved_1[0xa0];
 };
 
 struct mlx5_ifc_cmd_inter_comp_event_bits {
 	u8         command_completion_vector[0x20];
 
 	u8         reserved_0[0xc0];
 };
 
 struct mlx5_ifc_stall_vl_event_bits {
 	u8         reserved_0[0x18];
 	u8         port_num[0x1];
 	u8         reserved_1[0x3];
 	u8         vl[0x4];
 
 	u8         reserved_2[0xa0];
 };
 
 struct mlx5_ifc_db_bf_congestion_event_bits {
 	u8         event_subtype[0x8];
 	u8         reserved_0[0x8];
 	u8         congestion_level[0x8];
 	u8         reserved_1[0x8];
 
 	u8         reserved_2[0xa0];
 };
 
 struct mlx5_ifc_gpio_event_bits {
 	u8         reserved_0[0x60];
 
 	u8         gpio_event_hi[0x20];
 
 	u8         gpio_event_lo[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_port_state_change_event_bits {
 	u8         reserved_0[0x40];
 
 	u8         port_num[0x4];
 	u8         reserved_1[0x1c];
 
 	u8         reserved_2[0x80];
 };
 
 struct mlx5_ifc_dropped_packet_logged_bits {
 	u8         reserved_0[0xe0];
 };
 
 enum {
 	MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN                 = 0x1,
 	MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR  = 0x2,
 };
 
 struct mlx5_ifc_cq_error_bits {
 	u8         reserved_0[0x8];
 	u8         cqn[0x18];
 
 	u8         reserved_1[0x20];
 
 	u8         reserved_2[0x18];
 	u8         syndrome[0x8];
 
 	u8         reserved_3[0x80];
 };
 
 struct mlx5_ifc_rdma_page_fault_event_bits {
 	u8         bytes_commited[0x20];
 
 	u8         r_key[0x20];
 
 	u8         reserved_0[0x10];
 	u8         packet_len[0x10];
 
 	u8         rdma_op_len[0x20];
 
 	u8         rdma_va[0x40];
 
 	u8         reserved_1[0x5];
 	u8         rdma[0x1];
 	u8         write[0x1];
 	u8         requestor[0x1];
 	u8         qp_number[0x18];
 };
 
 struct mlx5_ifc_wqe_associated_page_fault_event_bits {
 	u8         bytes_committed[0x20];
 
 	u8         reserved_0[0x10];
 	u8         wqe_index[0x10];
 
 	u8         reserved_1[0x10];
 	u8         len[0x10];
 
 	u8         reserved_2[0x60];
 
 	u8         reserved_3[0x5];
 	u8         rdma[0x1];
 	u8         write_read[0x1];
 	u8         requestor[0x1];
 	u8         qpn[0x18];
 };
 
 enum {
 	MLX5_QP_EVENTS_TYPE_QP  = 0x0,
 	MLX5_QP_EVENTS_TYPE_RQ  = 0x1,
 	MLX5_QP_EVENTS_TYPE_SQ  = 0x2,
 };
 
 struct mlx5_ifc_qp_events_bits {
 	u8         reserved_0[0xa0];
 
 	u8         type[0x8];
 	u8         reserved_1[0x18];
 
 	u8         reserved_2[0x8];
 	u8         qpn_rqn_sqn[0x18];
 };
 
 struct mlx5_ifc_dct_events_bits {
 	u8         reserved_0[0xc0];
 
 	u8         reserved_1[0x8];
 	u8         dct_number[0x18];
 };
 
 struct mlx5_ifc_comp_event_bits {
 	u8         reserved_0[0xc0];
 
 	u8         reserved_1[0x8];
 	u8         cq_number[0x18];
 };
 
 struct mlx5_ifc_fw_version_bits {
 	u8         major[0x10];
 	u8         reserved_0[0x10];
 
 	u8         minor[0x10];
 	u8         subminor[0x10];
 
 	u8         second[0x8];
 	u8         minute[0x8];
 	u8         hour[0x8];
 	u8         reserved_1[0x8];
 
 	u8         year[0x10];
 	u8         month[0x8];
 	u8         day[0x8];
 };
 
 enum {
 	MLX5_QPC_STATE_RST        = 0x0,
 	MLX5_QPC_STATE_INIT       = 0x1,
 	MLX5_QPC_STATE_RTR        = 0x2,
 	MLX5_QPC_STATE_RTS        = 0x3,
 	MLX5_QPC_STATE_SQER       = 0x4,
 	MLX5_QPC_STATE_SQD        = 0x5,
 	MLX5_QPC_STATE_ERR        = 0x6,
 	MLX5_QPC_STATE_SUSPENDED  = 0x9,
 };
 
 enum {
 	MLX5_QPC_ST_RC            = 0x0,
 	MLX5_QPC_ST_UC            = 0x1,
 	MLX5_QPC_ST_UD            = 0x2,
 	MLX5_QPC_ST_XRC           = 0x3,
 	MLX5_QPC_ST_DCI           = 0x5,
 	MLX5_QPC_ST_QP0           = 0x7,
 	MLX5_QPC_ST_QP1           = 0x8,
 	MLX5_QPC_ST_RAW_DATAGRAM  = 0x9,
 	MLX5_QPC_ST_REG_UMR       = 0xc,
 };
 
 enum {
 	MLX5_QP_PM_ARMED            = 0x0,
 	MLX5_QP_PM_REARM            = 0x1,
 	MLX5_QPC_PM_STATE_RESERVED  = 0x2,
 	MLX5_QP_PM_MIGRATED         = 0x3,
 };
 
 enum {
 	MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS                = 0x0,
 	MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT  = 0x1,
 };
 
 enum {
 	MLX5_QPC_MTU_256_BYTES        = 0x1,
 	MLX5_QPC_MTU_512_BYTES        = 0x2,
 	MLX5_QPC_MTU_1K_BYTES         = 0x3,
 	MLX5_QPC_MTU_2K_BYTES         = 0x4,
 	MLX5_QPC_MTU_4K_BYTES         = 0x5,
 	MLX5_QPC_MTU_RAW_ETHERNET_QP  = 0x7,
 };
 
 enum {
 	MLX5_QPC_ATOMIC_MODE_IB_SPEC     = 0x1,
 	MLX5_QPC_ATOMIC_MODE_ONLY_8B     = 0x2,
 	MLX5_QPC_ATOMIC_MODE_UP_TO_8B    = 0x3,
 	MLX5_QPC_ATOMIC_MODE_UP_TO_16B   = 0x4,
 	MLX5_QPC_ATOMIC_MODE_UP_TO_32B   = 0x5,
 	MLX5_QPC_ATOMIC_MODE_UP_TO_64B   = 0x6,
 	MLX5_QPC_ATOMIC_MODE_UP_TO_128B  = 0x7,
 	MLX5_QPC_ATOMIC_MODE_UP_TO_256B  = 0x8,
 };
 
 enum {
 	MLX5_QPC_CS_REQ_DISABLE    = 0x0,
 	MLX5_QPC_CS_REQ_UP_TO_32B  = 0x11,
 	MLX5_QPC_CS_REQ_UP_TO_64B  = 0x22,
 };
 
 enum {
 	MLX5_QPC_CS_RES_DISABLE    = 0x0,
 	MLX5_QPC_CS_RES_UP_TO_32B  = 0x1,
 	MLX5_QPC_CS_RES_UP_TO_64B  = 0x2,
 };
 
 enum {
 	MLX5_QPC_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
 	MLX5_QPC_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
 	MLX5_QPC_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
 };
 
 struct mlx5_ifc_qpc_bits {
 	u8         state[0x4];
 	u8         lag_tx_port_affinity[0x4];
 	u8         st[0x8];
 	u8         reserved_1[0x3];
 	u8         pm_state[0x2];
 	u8         reserved_2[0x7];
 	u8         end_padding_mode[0x2];
 	u8         reserved_3[0x2];
 
 	u8         wq_signature[0x1];
 	u8         block_lb_mc[0x1];
 	u8         atomic_like_write_en[0x1];
 	u8         latency_sensitive[0x1];
 	u8         reserved_4[0x1];
 	u8         drain_sigerr[0x1];
 	u8         reserved_5[0x2];
 	u8         pd[0x18];
 
 	u8         mtu[0x3];
 	u8         log_msg_max[0x5];
 	u8         reserved_6[0x1];
 	u8         log_rq_size[0x4];
 	u8         log_rq_stride[0x3];
 	u8         no_sq[0x1];
 	u8         log_sq_size[0x4];
 	u8         reserved_at_55[0x3];
 	u8         ts_format[0x2];
 	u8         reserved_at_5a[0x1];
 	u8         rlky[0x1];
 	u8         ulp_stateless_offload_mode[0x4];
 
 	u8         counter_set_id[0x8];
 	u8         uar_page[0x18];
 
 	u8         reserved_8[0x8];
 	u8         user_index[0x18];
 
 	u8         reserved_9[0x3];
 	u8         log_page_size[0x5];
 	u8         remote_qpn[0x18];
 
 	struct mlx5_ifc_ads_bits primary_address_path;
 
 	struct mlx5_ifc_ads_bits secondary_address_path;
 
 	u8         log_ack_req_freq[0x4];
 	u8         reserved_10[0x4];
 	u8         log_sra_max[0x3];
 	u8         reserved_11[0x2];
 	u8         retry_count[0x3];
 	u8         rnr_retry[0x3];
 	u8         reserved_12[0x1];
 	u8         fre[0x1];
 	u8         cur_rnr_retry[0x3];
 	u8         cur_retry_count[0x3];
 	u8         reserved_13[0x5];
 
 	u8         reserved_14[0x20];
 
 	u8         reserved_15[0x8];
 	u8         next_send_psn[0x18];
 
 	u8         reserved_16[0x8];
 	u8         cqn_snd[0x18];
 
 	u8         reserved_at_400[0x8];
 
 	u8         deth_sqpn[0x18];
 	u8         reserved_17[0x20];
 
 	u8         reserved_18[0x8];
 	u8         last_acked_psn[0x18];
 
 	u8         reserved_19[0x8];
 	u8         ssn[0x18];
 
 	u8         reserved_20[0x8];
 	u8         log_rra_max[0x3];
 	u8         reserved_21[0x1];
 	u8         atomic_mode[0x4];
 	u8         rre[0x1];
 	u8         rwe[0x1];
 	u8         rae[0x1];
 	u8         reserved_22[0x1];
 	u8         page_offset[0x6];
 	u8         reserved_23[0x3];
 	u8         cd_slave_receive[0x1];
 	u8         cd_slave_send[0x1];
 	u8         cd_master[0x1];
 
 	u8         reserved_24[0x3];
 	u8         min_rnr_nak[0x5];
 	u8         next_rcv_psn[0x18];
 
 	u8         reserved_25[0x8];
 	u8         xrcd[0x18];
 
 	u8         reserved_26[0x8];
 	u8         cqn_rcv[0x18];
 
 	u8         dbr_addr[0x40];
 
 	u8         q_key[0x20];
 
 	u8         reserved_27[0x5];
 	u8         rq_type[0x3];
 	u8         srqn_rmpn[0x18];
 
 	u8         reserved_28[0x8];
 	u8         rmsn[0x18];
 
 	u8         hw_sq_wqebb_counter[0x10];
 	u8         sw_sq_wqebb_counter[0x10];
 
 	u8         hw_rq_counter[0x20];
 
 	u8         sw_rq_counter[0x20];
 
 	u8         reserved_29[0x20];
 
 	u8         reserved_30[0xf];
 	u8         cgs[0x1];
 	u8         cs_req[0x8];
 	u8         cs_res[0x8];
 
 	u8         dc_access_key[0x40];
 
 	u8         reserved_at_680[0x3];
 	u8         dbr_umem_valid[0x1];
 
 	u8         reserved_at_684[0xbc];
 };
 
 struct mlx5_ifc_roce_addr_layout_bits {
 	u8         source_l3_address[16][0x8];
 
 	u8         reserved_0[0x3];
 	u8         vlan_valid[0x1];
 	u8         vlan_id[0xc];
 	u8         source_mac_47_32[0x10];
 
 	u8         source_mac_31_0[0x20];
 
 	u8         reserved_1[0x14];
 	u8         roce_l3_type[0x4];
 	u8         roce_version[0x8];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_rdbc_bits {
 	u8         reserved_0[0x1c];
 	u8         type[0x4];
 
 	u8         reserved_1[0x20];
 
 	u8         reserved_2[0x8];
 	u8         psn[0x18];
 
 	u8         rkey[0x20];
 
 	u8         address[0x40];
 
 	u8         byte_count[0x20];
 
 	u8         reserved_3[0x20];
 
 	u8         atomic_resp[32][0x8];
 };
 
 enum {
 	MLX5_FLOW_CONTEXT_ACTION_ALLOW     = 0x1,
 	MLX5_FLOW_CONTEXT_ACTION_DROP      = 0x2,
 	MLX5_FLOW_CONTEXT_ACTION_FWD_DEST  = 0x4,
 	MLX5_FLOW_CONTEXT_ACTION_COUNT     = 0x8,
 };
 
 struct mlx5_ifc_flow_context_bits {
 	u8         reserved_0[0x20];
 
 	u8         group_id[0x20];
 
 	u8         reserved_1[0x8];
 	u8         flow_tag[0x18];
 
 	u8         reserved_2[0x10];
 	u8         action[0x10];
 
 	u8         reserved_3[0x8];
 	u8         destination_list_size[0x18];
 
 	u8         reserved_4[0x8];
 	u8         flow_counter_list_size[0x18];
 
 	u8         reserved_5[0x140];
 
 	struct mlx5_ifc_fte_match_param_bits match_value;
 
 	u8         reserved_6[0x600];
 
 	union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
 };
 
 enum {
 	MLX5_XRC_SRQC_STATE_GOOD   = 0x0,
 	MLX5_XRC_SRQC_STATE_ERROR  = 0x1,
 };
 
 struct mlx5_ifc_xrc_srqc_bits {
 	u8         state[0x4];
 	u8         log_xrc_srq_size[0x4];
 	u8         reserved_0[0x18];
 
 	u8         wq_signature[0x1];
 	u8         cont_srq[0x1];
 	u8         reserved_1[0x1];
 	u8         rlky[0x1];
 	u8         basic_cyclic_rcv_wqe[0x1];
 	u8         log_rq_stride[0x3];
 	u8         xrcd[0x18];
 
 	u8         page_offset[0x6];
 	u8         reserved_at_46[0x1];
 	u8         dbr_umem_valid[0x1];
 	u8         cqn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         reserved_4[0x2];
 	u8         log_page_size[0x6];
 	u8         user_index[0x18];
 
 	u8         reserved_5[0x20];
 
 	u8         reserved_6[0x8];
 	u8         pd[0x18];
 
 	u8         lwm[0x10];
 	u8         wqe_cnt[0x10];
 
 	u8         reserved_7[0x40];
 
 	u8         db_record_addr_h[0x20];
 
 	u8         db_record_addr_l[0x1e];
 	u8         reserved_8[0x2];
 
 	u8         reserved_9[0x80];
 };
 
 struct mlx5_ifc_vnic_diagnostic_statistics_bits {
 	u8         counter_error_queues[0x20];
 
 	u8         total_error_queues[0x20];
 
 	u8         send_queue_priority_update_flow[0x20];
 
 	u8         reserved_at_60[0x20];
 
 	u8         nic_receive_steering_discard[0x40];
 
 	u8         receive_discard_vport_down[0x40];
 
 	u8         transmit_discard_vport_down[0x40];
 
 	u8         reserved_at_140[0xec0];
 };
 
 struct mlx5_ifc_traffic_counter_bits {
 	u8         packets[0x40];
 
 	u8         octets[0x40];
 };
 
 struct mlx5_ifc_tisc_bits {
 	u8         strict_lag_tx_port_affinity[0x1];
 	u8         tls_en[0x1];
 	u8         reserved_at_2[0x2];
 	u8         lag_tx_port_affinity[0x04];
 
 	u8         reserved_at_8[0x4];
 	u8         prio[0x4];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x100];
 
 	u8         reserved_3[0x8];
 	u8         transport_domain[0x18];
 
 	u8         reserved_4[0x8];
 	u8         underlay_qpn[0x18];
 
 	u8         reserved_5[0x8];
 	u8         pd[0x18];
 
 	u8         reserved_6[0x380];
 };
 
 enum {
 	MLX5_TIRC_DISP_TYPE_DIRECT    = 0x0,
 	MLX5_TIRC_DISP_TYPE_INDIRECT  = 0x1,
 };
 
 enum {
 	MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO  = 0x1,
 	MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO  = 0x2,
 };
 
 enum {
 	MLX5_TIRC_RX_HASH_FN_HASH_NONE           = 0x0,
 	MLX5_TIRC_RX_HASH_FN_HASH_INVERTED_XOR8  = 0x1,
 	MLX5_TIRC_RX_HASH_FN_HASH_TOEPLITZ       = 0x2,
 };
 
 enum {
 	MLX5_TIRC_SELF_LB_EN_ENABLE_UNICAST    = 0x1,
 	MLX5_TIRC_SELF_LB_EN_ENABLE_MULTICAST  = 0x2,
 };
 
 struct mlx5_ifc_tirc_bits {
 	u8         reserved_0[0x20];
 
 	u8         disp_type[0x4];
 	u8         tls_en[0x1];
 	u8         reserved_at_25[0x1b];
 
 	u8         reserved_2[0x40];
 
 	u8         reserved_3[0x4];
 	u8         lro_timeout_period_usecs[0x10];
 	u8         lro_enable_mask[0x4];
 	u8         lro_max_msg_sz[0x8];
 
 	u8         reserved_4[0x40];
 
 	u8         reserved_5[0x8];
 	u8         inline_rqn[0x18];
 
 	u8         rx_hash_symmetric[0x1];
 	u8         reserved_6[0x1];
 	u8         tunneled_offload_en[0x1];
 	u8         reserved_7[0x5];
 	u8         indirect_table[0x18];
 
 	u8         rx_hash_fn[0x4];
 	u8         reserved_8[0x2];
 	u8         self_lb_en[0x2];
 	u8         transport_domain[0x18];
 
 	u8         rx_hash_toeplitz_key[10][0x20];
 
 	struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
 
 	struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
 
 	u8         reserved_9[0x4c0];
 };
 
 enum {
 	MLX5_SRQC_STATE_GOOD   = 0x0,
 	MLX5_SRQC_STATE_ERROR  = 0x1,
 };
 
 struct mlx5_ifc_srqc_bits {
 	u8         state[0x4];
 	u8         log_srq_size[0x4];
 	u8         reserved_0[0x18];
 
 	u8         wq_signature[0x1];
 	u8         cont_srq[0x1];
 	u8         reserved_1[0x1];
 	u8         rlky[0x1];
 	u8         reserved_2[0x1];
 	u8         log_rq_stride[0x3];
 	u8         xrcd[0x18];
 
 	u8         page_offset[0x6];
 	u8         reserved_3[0x2];
 	u8         cqn[0x18];
 
 	u8         reserved_4[0x20];
 
 	u8         reserved_5[0x2];
 	u8         log_page_size[0x6];
 	u8         reserved_6[0x18];
 
 	u8         reserved_7[0x20];
 
 	u8         reserved_8[0x8];
 	u8         pd[0x18];
 
 	u8         lwm[0x10];
 	u8         wqe_cnt[0x10];
 
 	u8         reserved_9[0x40];
 
 	u8	   dbr_addr[0x40];
 
 	u8	   reserved_10[0x80];
 };
 
 enum {
 	MLX5_SQC_STATE_RST  = 0x0,
 	MLX5_SQC_STATE_RDY  = 0x1,
 	MLX5_SQC_STATE_ERR  = 0x3,
 };
 
 enum {
 	MLX5_SQC_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
 	MLX5_SQC_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
 	MLX5_SQC_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
 };
 
 struct mlx5_ifc_sqc_bits {
 	u8         rlkey[0x1];
 	u8         cd_master[0x1];
 	u8         fre[0x1];
 	u8         flush_in_error_en[0x1];
 	u8         allow_multi_pkt_send_wqe[0x1];
 	u8         min_wqe_inline_mode[0x3];
 	u8         state[0x4];
 	u8         reg_umr[0x1];
 	u8         allow_swp[0x1];
 	u8         reserved_at_e[0x4];
 	u8	   qos_remap_en[0x1];
 	u8	   reserved_at_d[0x7];
 	u8         ts_format[0x2];
 	u8         reserved_at_1c[0x4];
 
 	u8         reserved_1[0x8];
 	u8         user_index[0x18];
 
 	u8         reserved_2[0x8];
 	u8         cqn[0x18];
 
 	u8         reserved_3[0x80];
 
 	u8         qos_para_vport_number[0x10];
 	u8         packet_pacing_rate_limit_index[0x10];
 
 	u8         tis_lst_sz[0x10];
 	u8         qos_queue_group_id[0x10];
 
 	u8	   reserved_4[0x8];
 	u8	   queue_handle[0x18];
 
 	u8         reserved_5[0x20];
 
 	u8         reserved_6[0x8];
 	u8         tis_num_0[0x18];
 
 	struct mlx5_ifc_wq_bits wq;
 };
 
 struct mlx5_ifc_query_pp_rate_limit_in_bits {
 	u8	   opcode[0x10];
 	u8	   uid[0x10];
 
 	u8	   reserved1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved2[0x10];
         u8         rate_limit_index[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_pp_context_bits {
 	u8	   rate_limit[0x20];
 
 	u8	   burst_upper_bound[0x20];
 
 	u8	   reserved_1[0xc];
 	u8	   rate_mode[0x4];
 	u8	   typical_packet_size[0x10];
 
 	u8	   reserved_2[0x8];
 	u8	   qos_handle[0x18];
 
 	u8	   reserved_3[0x40];
 };
 
 struct mlx5_ifc_query_pp_rate_limit_out_bits {
         u8	   status[0x8];
 	u8         reserved_1[0x18];
 
         u8         syndrome[0x20];
 
         u8         reserved_2[0x40];
 
 	struct mlx5_ifc_pp_context_bits pp_context;
 };
 
 enum {
 	MLX5_TSAR_TYPE_DWRR = 0,
 	MLX5_TSAR_TYPE_ROUND_ROUBIN = 1,
 	MLX5_TSAR_TYPE_ETS = 2
 };
 
 struct mlx5_ifc_tsar_element_attributes_bits {
 	u8         reserved_0[0x8];
 	u8         tsar_type[0x8];
 	u8	   reserved_1[0x10];
 };
 
 struct mlx5_ifc_vport_element_attributes_bits {
 	u8         reserved_0[0x10];
 	u8         vport_number[0x10];
 };
 
 struct mlx5_ifc_vport_tc_element_attributes_bits {
 	u8         traffic_class[0x10];
 	u8         vport_number[0x10];
 };
 
 struct mlx5_ifc_para_vport_tc_element_attributes_bits {
 	u8         reserved_0[0x0C];
 	u8         traffic_class[0x04];
 	u8         qos_para_vport_number[0x10];
 };
 
 enum {
 	MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR           = 0x0,
 	MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT          = 0x1,
 	MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC       = 0x2,
 	MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC  = 0x3,
 };
 
 struct mlx5_ifc_scheduling_context_bits {
 	u8         element_type[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         element_attributes[0x20];
 
 	u8         parent_element_id[0x20];
 
 	u8         reserved_at_60[0x40];
 
 	u8         bw_share[0x20];
 
 	u8         max_average_bw[0x20];
 
 	u8         reserved_at_e0[0x120];
 };
 
 struct mlx5_ifc_rqtc_bits {
 	u8         reserved_0[0xa0];
 
 	u8         reserved_1[0x10];
 	u8         rqt_max_size[0x10];
 
 	u8         reserved_2[0x10];
 	u8         rqt_actual_size[0x10];
 
 	u8         reserved_3[0x6a0];
 
 	struct mlx5_ifc_rq_num_bits rq_num[0];
 };
 
 enum {
 	MLX5_RQC_RQ_TYPE_MEMORY_RQ_INLINE      = 0x0,
 	MLX5_RQC_RQ_TYPE_MEMORY_RQ_RMP         = 0x1,
 };
 
 enum {
 	MLX5_RQC_STATE_RST  = 0x0,
 	MLX5_RQC_STATE_RDY  = 0x1,
 	MLX5_RQC_STATE_ERR  = 0x3,
 };
 
 enum {
 	MLX5_RQC_DROPLESS_MODE_DISABLE        = 0x0,
 	MLX5_RQC_DROPLESS_MODE_ENABLE         = 0x1,
 };
 
 enum {
 	MLX5_RQC_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
 	MLX5_RQC_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
 	MLX5_RQC_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
 };
 
 struct mlx5_ifc_rqc_bits {
 	u8         rlkey[0x1];
 	u8         delay_drop_en[0x1];
 	u8         scatter_fcs[0x1];
 	u8         vlan_strip_disable[0x1];
 	u8         mem_rq_type[0x4];
 	u8         state[0x4];
 	u8         reserved_1[0x1];
 	u8         flush_in_error_en[0x1];
 	u8         reserved_at_e[0xc];
 	u8         ts_format[0x2];
 	u8         reserved_at_1c[0x4];
 
 	u8         reserved_3[0x8];
 	u8         user_index[0x18];
 
 	u8         reserved_4[0x8];
 	u8         cqn[0x18];
 
 	u8         counter_set_id[0x8];
 	u8         reserved_5[0x18];
 
 	u8         reserved_6[0x8];
 	u8         rmpn[0x18];
 
 	u8         reserved_7[0xe0];
 
 	struct mlx5_ifc_wq_bits wq;
 };
 
 enum {
 	MLX5_RMPC_STATE_RDY  = 0x1,
 	MLX5_RMPC_STATE_ERR  = 0x3,
 };
 
 struct mlx5_ifc_rmpc_bits {
 	u8         reserved_0[0x8];
 	u8         state[0x4];
 	u8         reserved_1[0x14];
 
 	u8         basic_cyclic_rcv_wqe[0x1];
 	u8         reserved_2[0x1f];
 
 	u8         reserved_3[0x140];
 
 	struct mlx5_ifc_wq_bits wq;
 };
 
 enum {
 	MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_UC_MAC_ADDRESS  = 0x0,
 	MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_MC_MAC_ADDRESS  = 0x1,
 	MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_VLAN_LIST               = 0x2,
 };
 
 struct mlx5_ifc_nic_vport_context_bits {
 	u8         reserved_0[0x5];
 	u8         min_wqe_inline_mode[0x3];
 	u8         reserved_1[0x15];
 	u8         disable_mc_local_lb[0x1];
 	u8         disable_uc_local_lb[0x1];
 	u8         roce_en[0x1];
 
 	u8         arm_change_event[0x1];
 	u8         reserved_2[0x1a];
 	u8         event_on_mtu[0x1];
 	u8         event_on_promisc_change[0x1];
 	u8         event_on_vlan_change[0x1];
 	u8         event_on_mc_address_change[0x1];
 	u8         event_on_uc_address_change[0x1];
 
 	u8         reserved_3[0xe0];
 
 	u8         reserved_4[0x10];
 	u8         mtu[0x10];
 
 	u8         system_image_guid[0x40];
 
 	u8         port_guid[0x40];
 
 	u8         node_guid[0x40];
 
 	u8         reserved_5[0x140];
 
 	u8         qkey_violation_counter[0x10];
 	u8         reserved_6[0x10];
 
 	u8         reserved_7[0x420];
 
 	u8         promisc_uc[0x1];
 	u8         promisc_mc[0x1];
 	u8         promisc_all[0x1];
 	u8         reserved_8[0x2];
 	u8         allowed_list_type[0x3];
 	u8         reserved_9[0xc];
 	u8         allowed_list_size[0xc];
 
 	struct mlx5_ifc_mac_address_layout_bits permanent_address;
 
 	u8         reserved_10[0x20];
 
 	u8         current_uc_mac_address[0][0x40];
 };
 
 enum {
 	MLX5_ACCESS_MODE_PA        = 0x0,
 	MLX5_ACCESS_MODE_MTT       = 0x1,
 	MLX5_ACCESS_MODE_KLM       = 0x2,
 	MLX5_ACCESS_MODE_KSM       = 0x3,
 	MLX5_ACCESS_MODE_SW_ICM    = 0x4,
 	MLX5_ACCESS_MODE_MEMIC     = 0x5,
 };
 
 struct mlx5_ifc_mkc_bits {
 	u8         reserved_at_0[0x1];
 	u8         free[0x1];
 	u8         reserved_at_2[0x1];
 	u8         access_mode_4_2[0x3];
 	u8         reserved_at_6[0x7];
 	u8         relaxed_ordering_write[0x1];
 	u8         reserved_at_e[0x1];
 	u8         small_fence_on_rdma_read_response[0x1];
 	u8         umr_en[0x1];
 	u8         a[0x1];
 	u8         rw[0x1];
 	u8         rr[0x1];
 	u8         lw[0x1];
 	u8         lr[0x1];
 	u8         access_mode[0x2];
 	u8         reserved_2[0x8];
 
 	u8         qpn[0x18];
 	u8         mkey_7_0[0x8];
 
 	u8         reserved_3[0x20];
 
 	u8         length64[0x1];
 	u8         bsf_en[0x1];
 	u8         sync_umr[0x1];
 	u8         reserved_4[0x2];
 	u8         expected_sigerr_count[0x1];
 	u8         reserved_5[0x1];
 	u8         en_rinval[0x1];
 	u8         pd[0x18];
 
 	u8         start_addr[0x40];
 
 	u8         len[0x40];
 
 	u8         bsf_octword_size[0x20];
 
 	u8         reserved_6[0x80];
 
 	u8         translations_octword_size[0x20];
 
 	u8         reserved_at_1c0[0x19];
 	u8         relaxed_ordering_read[0x1];
 	u8         reserved_at_1d9[0x1];
 	u8         log_page_size[0x5];
 
 	u8         reserved_8[0x20];
 };
 
 struct mlx5_ifc_pkey_bits {
 	u8         reserved_0[0x10];
 	u8         pkey[0x10];
 };
 
 struct mlx5_ifc_array128_auto_bits {
 	u8         array128_auto[16][0x8];
 };
 
 enum {
 	MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_PORT_GUID           = 0x0,
 	MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_NODE_GUID           = 0x1,
 	MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_VPORT_STATE_POLICY  = 0x2,
 };
 
 enum {
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_SLEEP                      = 0x1,
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_POLLING                    = 0x2,
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_DISABLED                   = 0x3,
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_PORTCONFIGURATIONTRAINING  = 0x4,
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_LINKUP                     = 0x5,
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_LINKERRORRECOVERY          = 0x6,
 	MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_PHYTEST                    = 0x7,
 };
 
 enum {
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_DOWN    = 0x0,
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_UP      = 0x1,
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_FOLLOW  = 0x2,
 };
 
 enum {
 	MLX5_HCA_VPORT_CONTEXT_PORT_STATE_DOWN    = 0x1,
 	MLX5_HCA_VPORT_CONTEXT_PORT_STATE_INIT    = 0x2,
 	MLX5_HCA_VPORT_CONTEXT_PORT_STATE_ARM     = 0x3,
 	MLX5_HCA_VPORT_CONTEXT_PORT_STATE_ACTIVE  = 0x4,
 };
 
 enum {
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_DOWN    = 0x1,
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_INIT    = 0x2,
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_ARM     = 0x3,
 	MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_ACTIVE  = 0x4,
 };
 
 struct mlx5_ifc_hca_vport_context_bits {
 	u8         field_select[0x20];
 
 	u8         reserved_0[0xe0];
 
 	u8         sm_virt_aware[0x1];
 	u8         has_smi[0x1];
 	u8         has_raw[0x1];
 	u8         grh_required[0x1];
 	u8         reserved_1[0x1];
 	u8         min_wqe_inline_mode[0x3];
 	u8         reserved_2[0x8];
 	u8         port_physical_state[0x4];
 	u8         vport_state_policy[0x4];
 	u8         port_state[0x4];
 	u8         vport_state[0x4];
 
 	u8         reserved_3[0x20];
 
 	u8         system_image_guid[0x40];
 
 	u8         port_guid[0x40];
 
 	u8         node_guid[0x40];
 
 	u8         cap_mask1[0x20];
 
 	u8         cap_mask1_field_select[0x20];
 
 	u8         cap_mask2[0x20];
 
 	u8         cap_mask2_field_select[0x20];
 
 	u8         reserved_4[0x80];
 
 	u8         lid[0x10];
 	u8         reserved_5[0x4];
 	u8         init_type_reply[0x4];
 	u8         lmc[0x3];
 	u8         subnet_timeout[0x5];
 
 	u8         sm_lid[0x10];
 	u8         sm_sl[0x4];
 	u8         reserved_6[0xc];
 
 	u8         qkey_violation_counter[0x10];
 	u8         pkey_violation_counter[0x10];
 
 	u8         reserved_7[0xca0];
 };
 
 union mlx5_ifc_hca_cap_union_bits {
 	struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
 	struct mlx5_ifc_odp_cap_bits odp_cap;
 	struct mlx5_ifc_atomic_caps_bits atomic_caps;
 	struct mlx5_ifc_roce_cap_bits roce_cap;
 	struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
 	struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
 	struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
 	struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
 	struct mlx5_ifc_snapshot_cap_bits snapshot_cap;
 	struct mlx5_ifc_debug_cap_bits diagnostic_counters_cap;
 	struct mlx5_ifc_qos_cap_bits qos_cap;
 	struct mlx5_ifc_tls_capabilities_bits tls_capabilities;
 	u8         reserved_0[0x8000];
 };
 
 enum {
 	MLX5_FLOW_TABLE_CONTEXT_TABLE_MISS_ACTION_DEFAULT = 0x0,
 	MLX5_FLOW_TABLE_CONTEXT_TABLE_MISS_ACTION_IDENTIFIED = 0x1,
 };
 
 struct mlx5_ifc_flow_table_context_bits {
 	u8         encap_en[0x1];
 	u8         decap_en[0x1];
 	u8         reserved_at_2[0x2];
 	u8         table_miss_action[0x4];
 	u8         level[0x8];
 	u8         reserved_at_10[0x8];
 	u8         log_size[0x8];
 
 	u8         reserved_at_20[0x8];
 	u8         table_miss_id[0x18];
 
 	u8         reserved_at_40[0x8];
 	u8         lag_master_next_table_id[0x18];
 
 	u8         reserved_at_60[0xe0];
 };
 
 struct mlx5_ifc_esw_vport_context_bits {
 	u8         reserved_0[0x3];
 	u8         vport_svlan_strip[0x1];
 	u8         vport_cvlan_strip[0x1];
 	u8         vport_svlan_insert[0x1];
 	u8         vport_cvlan_insert[0x2];
 	u8         reserved_1[0x18];
 
 	u8         reserved_2[0x20];
 
 	u8         svlan_cfi[0x1];
 	u8         svlan_pcp[0x3];
 	u8         svlan_id[0xc];
 	u8         cvlan_cfi[0x1];
 	u8         cvlan_pcp[0x3];
 	u8         cvlan_id[0xc];
 
 	u8         reserved_3[0x7a0];
 };
 
 enum {
 	MLX5_EQC_STATUS_OK                = 0x0,
 	MLX5_EQC_STATUS_EQ_WRITE_FAILURE  = 0xa,
 };
 
 enum {
 	MLX5_EQ_STATE_ARMED = 0x9,
 	MLX5_EQ_STATE_FIRED = 0xa,
 };
 
 struct mlx5_ifc_eqc_bits {
 	u8         status[0x4];
 	u8         reserved_0[0x9];
 	u8         ec[0x1];
 	u8         oi[0x1];
 	u8         reserved_1[0x5];
 	u8         st[0x4];
 	u8         reserved_2[0x8];
 
 	u8         reserved_3[0x20];
 
 	u8         reserved_4[0x14];
 	u8         page_offset[0x6];
 	u8         reserved_5[0x6];
 
 	u8         reserved_6[0x3];
 	u8         log_eq_size[0x5];
 	u8         uar_page[0x18];
 
 	u8         reserved_7[0x20];
 
 	u8         reserved_8[0x18];
 	u8         intr[0x8];
 
 	u8         reserved_9[0x3];
 	u8         log_page_size[0x5];
 	u8         reserved_10[0x18];
 
 	u8         reserved_11[0x60];
 
 	u8         reserved_12[0x8];
 	u8         consumer_counter[0x18];
 
 	u8         reserved_13[0x8];
 	u8         producer_counter[0x18];
 
 	u8         reserved_14[0x80];
 };
 
 enum {
 	MLX5_DCTC_STATE_ACTIVE    = 0x0,
 	MLX5_DCTC_STATE_DRAINING  = 0x1,
 	MLX5_DCTC_STATE_DRAINED   = 0x2,
 };
 
 enum {
 	MLX5_DCTC_CS_RES_DISABLE    = 0x0,
 	MLX5_DCTC_CS_RES_NA         = 0x1,
 	MLX5_DCTC_CS_RES_UP_TO_64B  = 0x2,
 };
 
 enum {
 	MLX5_DCTC_MTU_256_BYTES  = 0x1,
 	MLX5_DCTC_MTU_512_BYTES  = 0x2,
 	MLX5_DCTC_MTU_1K_BYTES   = 0x3,
 	MLX5_DCTC_MTU_2K_BYTES   = 0x4,
 	MLX5_DCTC_MTU_4K_BYTES   = 0x5,
 };
 
 struct mlx5_ifc_dctc_bits {
 	u8         reserved_0[0x4];
 	u8         state[0x4];
 	u8         reserved_1[0x18];
 
 	u8         reserved_2[0x8];
 	u8         user_index[0x18];
 
 	u8         reserved_3[0x8];
 	u8         cqn[0x18];
 
 	u8         counter_set_id[0x8];
 	u8         atomic_mode[0x4];
 	u8         rre[0x1];
 	u8         rwe[0x1];
 	u8         rae[0x1];
 	u8         atomic_like_write_en[0x1];
 	u8         latency_sensitive[0x1];
 	u8         rlky[0x1];
 	u8         reserved_4[0xe];
 
 	u8         reserved_5[0x8];
 	u8         cs_res[0x8];
 	u8         reserved_6[0x3];
 	u8         min_rnr_nak[0x5];
 	u8         reserved_7[0x8];
 
 	u8         reserved_8[0x8];
 	u8         srqn[0x18];
 
 	u8         reserved_9[0x8];
 	u8         pd[0x18];
 
 	u8         tclass[0x8];
 	u8         reserved_10[0x4];
 	u8         flow_label[0x14];
 
 	u8         dc_access_key[0x40];
 
 	u8         reserved_11[0x5];
 	u8         mtu[0x3];
 	u8         port[0x8];
 	u8         pkey_index[0x10];
 
 	u8         reserved_12[0x8];
 	u8         my_addr_index[0x8];
 	u8         reserved_13[0x8];
 	u8         hop_limit[0x8];
 
 	u8         dc_access_key_violation_count[0x20];
 
 	u8         reserved_14[0x14];
 	u8         dei_cfi[0x1];
 	u8         eth_prio[0x3];
 	u8         ecn[0x2];
 	u8         dscp[0x6];
 
 	u8         reserved_15[0x40];
 };
 
 enum {
 	MLX5_CQC_STATUS_OK             = 0x0,
 	MLX5_CQC_STATUS_CQ_OVERFLOW    = 0x9,
 	MLX5_CQC_STATUS_CQ_WRITE_FAIL  = 0xa,
 };
 
 enum {
 	CQE_SIZE_64                = 0x0,
 	CQE_SIZE_128               = 0x1,
 };
 
 enum {
 	MLX5_CQ_PERIOD_MODE_START_FROM_EQE  = 0x0,
 	MLX5_CQ_PERIOD_MODE_START_FROM_CQE  = 0x1,
 };
 
 enum {
 	MLX5_CQ_STATE_SOLICITED_ARMED                     = 0x6,
 	MLX5_CQ_STATE_ARMED                               = 0x9,
 	MLX5_CQ_STATE_FIRED                               = 0xa,
 };
 
 struct mlx5_ifc_cqc_bits {
 	u8         status[0x4];
 	u8         reserved_at_4[0x2];
 	u8         dbr_umem_valid[0x1];
 	u8         reserved_at_7[0x1];
 	u8         cqe_sz[0x3];
 	u8         cc[0x1];
 	u8         reserved_1[0x1];
 	u8         scqe_break_moderation_en[0x1];
 	u8         oi[0x1];
 	u8         cq_period_mode[0x2];
 	u8         cqe_compression_en[0x1];
 	u8         mini_cqe_res_format[0x2];
 	u8         st[0x4];
 	u8         reserved_2[0x8];
 
 	u8         reserved_3[0x20];
 
 	u8         reserved_4[0x14];
 	u8         page_offset[0x6];
 	u8         reserved_5[0x6];
 
 	u8         reserved_6[0x3];
 	u8         log_cq_size[0x5];
 	u8         uar_page[0x18];
 
 	u8         reserved_7[0x4];
 	u8         cq_period[0xc];
 	u8         cq_max_count[0x10];
 
 	u8         reserved_8[0x18];
 	u8         c_eqn[0x8];
 
 	u8         reserved_9[0x3];
 	u8         log_page_size[0x5];
 	u8         reserved_10[0x18];
 
 	u8         reserved_11[0x20];
 
 	u8         reserved_12[0x8];
 	u8         last_notified_index[0x18];
 
 	u8         reserved_13[0x8];
 	u8         last_solicit_index[0x18];
 
 	u8         reserved_14[0x8];
 	u8         consumer_counter[0x18];
 
 	u8         reserved_15[0x8];
 	u8         producer_counter[0x18];
 
 	u8         reserved_16[0x40];
 
 	u8         dbr_addr[0x40];
 };
 
 union mlx5_ifc_cong_control_roce_ecn_auto_bits {
 	struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
 	struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
 	struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
 	u8         reserved_0[0x800];
 };
 
 struct mlx5_ifc_query_adapter_param_block_bits {
 	u8         reserved_0[0xc0];
 
 	u8         reserved_1[0x8];
 	u8         ieee_vendor_id[0x18];
 
 	u8         reserved_2[0x10];
 	u8         vsd_vendor_id[0x10];
 
 	u8         vsd[208][0x8];
 
 	u8         vsd_contd_psid[16][0x8];
 };
 
 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
 	struct mlx5_ifc_modify_field_select_bits modify_field_select;
 	struct mlx5_ifc_resize_field_select_bits resize_field_select;
 	u8         reserved_0[0x20];
 };
 
 union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
 	struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
 	struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
 	struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
 	u8         reserved_0[0x20];
 };
 
 struct mlx5_ifc_bufferx_reg_bits {
 	u8         reserved_0[0x6];
 	u8         lossy[0x1];
 	u8         epsb[0x1];
 	u8         reserved_1[0xc];
 	u8         size[0xc];
 
 	u8         xoff_threshold[0x10];
 	u8         xon_threshold[0x10];
 };
 
 struct mlx5_ifc_config_item_bits {
 	u8         valid[0x2];
 	u8         reserved_0[0x2];
 	u8         header_type[0x2];
 	u8         reserved_1[0x2];
 	u8         default_location[0x1];
 	u8         reserved_2[0x7];
 	u8         version[0x4];
 	u8         reserved_3[0x3];
 	u8         length[0x9];
 
 	u8         type[0x20];
 
 	u8         reserved_4[0x10];
 	u8         crc16[0x10];
 };
 
 enum {
 	MLX5_XRQC_STATE_GOOD   = 0x0,
 	MLX5_XRQC_STATE_ERROR  = 0x1,
 };
 
 enum {
 	MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
 	MLX5_XRQC_TOPOLOGY_TAG_MATCHING        = 0x1,
 };
 
 enum {
 	MLX5_XRQC_OFFLOAD_RNDV = 0x1,
 };
 
 struct mlx5_ifc_tag_matching_topology_context_bits {
 	u8         log_matching_list_sz[0x4];
 	u8         reserved_at_4[0xc];
 	u8         append_next_index[0x10];
 
 	u8         sw_phase_cnt[0x10];
 	u8         hw_phase_cnt[0x10];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_xrqc_bits {
 	u8         state[0x4];
 	u8         rlkey[0x1];
 	u8         reserved_at_5[0xf];
 	u8         topology[0x4];
 	u8         reserved_at_18[0x4];
 	u8         offload[0x4];
 
 	u8         reserved_at_20[0x8];
 	u8         user_index[0x18];
 
 	u8         reserved_at_40[0x8];
 	u8         cqn[0x18];
 
 	u8         reserved_at_60[0xa0];
 
 	struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
 
 	u8         reserved_at_180[0x280];
 
 	struct mlx5_ifc_wq_bits wq;
 };
 
 struct mlx5_ifc_nodnic_port_config_reg_bits {
 	struct mlx5_ifc_nodnic_event_word_bits event;
 
 	u8         network_en[0x1];
 	u8         dma_en[0x1];
 	u8         promisc_en[0x1];
 	u8         promisc_multicast_en[0x1];
 	u8         reserved_0[0x17];
 	u8         receive_filter_en[0x5];
 
 	u8         reserved_1[0x10];
 	u8         mac_47_32[0x10];
 
 	u8         mac_31_0[0x20];
 
 	u8         receive_filters_mgid_mac[64][0x8];
 
 	u8         gid[16][0x8];
 
 	u8         reserved_2[0x10];
 	u8         lid[0x10];
 
 	u8         reserved_3[0xc];
 	u8         sm_sl[0x4];
 	u8         sm_lid[0x10];
 
 	u8         completion_address_63_32[0x20];
 
 	u8         completion_address_31_12[0x14];
 	u8         reserved_4[0x6];
 	u8         log_cq_size[0x6];
 
 	u8         working_buffer_address_63_32[0x20];
 
 	u8         working_buffer_address_31_12[0x14];
 	u8         reserved_5[0xc];
 
 	struct mlx5_ifc_nodnic_cq_arming_word_bits arm_cq;
 
 	u8         pkey_index[0x10];
 	u8         pkey[0x10];
 
 	struct mlx5_ifc_nodnic_ring_config_reg_bits send_ring0;
 
 	struct mlx5_ifc_nodnic_ring_config_reg_bits send_ring1;
 
 	struct mlx5_ifc_nodnic_ring_config_reg_bits receive_ring0;
 
 	struct mlx5_ifc_nodnic_ring_config_reg_bits receive_ring1;
 
 	u8         reserved_6[0x400];
 };
 
 union mlx5_ifc_event_auto_bits {
 	struct mlx5_ifc_comp_event_bits comp_event;
 	struct mlx5_ifc_dct_events_bits dct_events;
 	struct mlx5_ifc_qp_events_bits qp_events;
 	struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
 	struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
 	struct mlx5_ifc_cq_error_bits cq_error;
 	struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
 	struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
 	struct mlx5_ifc_gpio_event_bits gpio_event;
 	struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
 	struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
 	struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
 	struct mlx5_ifc_pages_req_event_bits pages_req_event;
 	struct mlx5_ifc_nic_vport_change_event_bits nic_vport_change_event;
 	u8         reserved_0[0xe0];
 };
 
 struct mlx5_ifc_health_buffer_bits {
 	u8         reserved_0[0x100];
 
 	u8         assert_existptr[0x20];
 
 	u8         assert_callra[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         fw_version[0x20];
 
 	u8         hw_id[0x20];
 
 	u8         reserved_2[0x20];
 
 	u8         irisc_index[0x8];
 	u8         synd[0x8];
 	u8         ext_synd[0x10];
 };
 
 struct mlx5_ifc_register_loopback_control_bits {
 	u8         no_lb[0x1];
 	u8         reserved_0[0x7];
 	u8         port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x60];
 };
 
 struct mlx5_ifc_lrh_bits {
 	u8	vl[4];
 	u8	lver[4];
 	u8	sl[4];
 	u8	reserved2[2];
 	u8	lnh[2];
 	u8	dlid[16];
 	u8	reserved5[5];
 	u8	pkt_len[11];
 	u8	slid[16];
 };
 
 struct mlx5_ifc_icmd_set_wol_rol_out_bits {
 	u8         reserved_0[0x40];
 
 	u8         reserved_1[0x10];
 	u8         rol_mode[0x8];
 	u8         wol_mode[0x8];
 };
 
 struct mlx5_ifc_icmd_set_wol_rol_in_bits {
 	u8         reserved_0[0x40];
 
 	u8         rol_mode_valid[0x1];
 	u8         wol_mode_valid[0x1];
 	u8         reserved_1[0xe];
 	u8         rol_mode[0x8];
 	u8         wol_mode[0x8];
 
 	u8         reserved_2[0x7a0];
 };
 
 struct mlx5_ifc_icmd_set_virtual_mac_in_bits {
 	u8         virtual_mac_en[0x1];
 	u8         mac_aux_v[0x1];
 	u8         reserved_0[0x1e];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_mac_address_layout_bits virtual_mac;
 
 	u8         reserved_2[0x760];
 };
 
 struct mlx5_ifc_icmd_query_virtual_mac_out_bits {
 	u8         virtual_mac_en[0x1];
 	u8         mac_aux_v[0x1];
 	u8         reserved_0[0x1e];
 
 	struct mlx5_ifc_mac_address_layout_bits permanent_mac;
 
 	struct mlx5_ifc_mac_address_layout_bits virtual_mac;
 
 	u8         reserved_1[0x760];
 };
 
 struct mlx5_ifc_icmd_query_fw_info_out_bits {
 	struct mlx5_ifc_fw_version_bits fw_version;
 
 	u8         reserved_0[0x10];
 	u8         hash_signature[0x10];
 
 	u8         psid[16][0x8];
 
 	u8         reserved_1[0x6e0];
 };
 
 struct mlx5_ifc_icmd_query_cap_in_bits {
 	u8         reserved_0[0x10];
 	u8         capability_group[0x10];
 };
 
 struct mlx5_ifc_icmd_query_cap_general_bits {
 	u8         nv_access[0x1];
 	u8         fw_info_psid[0x1];
 	u8         reserved_0[0x1e];
 
 	u8         reserved_1[0x16];
 	u8         rol_s[0x1];
 	u8         rol_g[0x1];
 	u8         reserved_2[0x1];
 	u8         wol_s[0x1];
 	u8         wol_g[0x1];
 	u8         wol_a[0x1];
 	u8         wol_b[0x1];
 	u8         wol_m[0x1];
 	u8         wol_u[0x1];
 	u8         wol_p[0x1];
 };
 
 struct mlx5_ifc_icmd_ocbb_query_header_stats_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         reserved_1[0x7e0];
 };
 
 struct mlx5_ifc_icmd_ocbb_query_etoc_stats_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         reserved_1[0x7e0];
 };
 
 struct mlx5_ifc_icmd_ocbb_init_in_bits {
 	u8         address_hi[0x20];
 
 	u8         address_lo[0x20];
 
 	u8         reserved_0[0x7c0];
 };
 
 struct mlx5_ifc_icmd_init_ocsd_in_bits {
 	u8         reserved_0[0x20];
 
 	u8         address_hi[0x20];
 
 	u8         address_lo[0x20];
 
 	u8         reserved_1[0x7a0];
 };
 
 struct mlx5_ifc_icmd_access_reg_out_bits {
 	u8         reserved_0[0x11];
 	u8         status[0x7];
 	u8         reserved_1[0x8];
 
 	u8         register_id[0x10];
 	u8         reserved_2[0x10];
 
 	u8         reserved_3[0x40];
 
 	u8         reserved_4[0x5];
 	u8         len[0xb];
 	u8         reserved_5[0x10];
 
 	u8         register_data[0][0x20];
 };
 
 enum {
 	MLX5_ICMD_ACCESS_REG_IN_METHOD_QUERY  = 0x1,
 	MLX5_ICMD_ACCESS_REG_IN_METHOD_WRITE  = 0x2,
 };
 
 struct mlx5_ifc_icmd_access_reg_in_bits {
 	u8         constant_1[0x5];
 	u8         constant_2[0xb];
 	u8         reserved_0[0x10];
 
 	u8         register_id[0x10];
 	u8         reserved_1[0x1];
 	u8         method[0x7];
 	u8         constant_3[0x8];
 
 	u8         reserved_2[0x40];
 
 	u8         constant_4[0x5];
 	u8         len[0xb];
 	u8         reserved_3[0x10];
 
 	u8         register_data[0][0x20];
 };
 
 enum {
 	MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
 	MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
 };
 
 struct mlx5_ifc_teardown_hca_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x3f];
 
 	u8	   state[0x1];
 };
 
 enum {
 	MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE  = 0x0,
 	MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE     = 0x1,
 	MLX5_TEARDOWN_HCA_IN_PROFILE_PREPARE_FAST_TEARDOWN = 0x2,
 };
 
 struct mlx5_ifc_teardown_hca_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         profile[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_set_delay_drop_params_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_set_delay_drop_params_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x20];
 
 	u8         reserved_at_60[0x10];
 	u8         delay_drop_timeout[0x10];
 };
 
 struct mlx5_ifc_query_delay_drop_params_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x20];
 
 	u8         reserved_at_60[0x10];
 	u8         delay_drop_timeout[0x10];
 };
 
 struct mlx5_ifc_query_delay_drop_params_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_suspend_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_suspend_qp_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_sqerr2rts_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_sqerr2rts_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_sqd2rts_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_sqd2rts_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_set_wol_rol_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_wol_rol_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         rol_mode_valid[0x1];
 	u8         wol_mode_valid[0x1];
 	u8         reserved_2[0xe];
 	u8         rol_mode[0x8];
 	u8         wol_mode[0x8];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_set_roce_address_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_roce_address_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         roce_address_index[0x10];
 	u8         reserved_2[0x10];
 
 	u8         reserved_3[0x20];
 
 	struct mlx5_ifc_roce_addr_layout_bits roce_address;
 };
 
 struct mlx5_ifc_set_rdb_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_rdb_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x18];
 	u8         rdb_list_size[0x8];
 
 	struct mlx5_ifc_rdbc_bits rdb_context[0];
 };
 
 struct mlx5_ifc_set_mad_demux_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL   = 0x0,
 	MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE  = 0x2,
 };
 
 struct mlx5_ifc_set_mad_demux_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         reserved_3[0x6];
 	u8         demux_mode[0x2];
 	u8         reserved_4[0x18];
 };
 
 struct mlx5_ifc_set_l2_table_entry_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_l2_table_entry_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x60];
 
 	u8         reserved_3[0x8];
 	u8         table_index[0x18];
 
 	u8         reserved_4[0x20];
 
 	u8         reserved_5[0x13];
 	u8         vlan_valid[0x1];
 	u8         vlan[0xc];
 
 	struct mlx5_ifc_mac_address_layout_bits mac_address;
 
 	u8         reserved_6[0xc0];
 };
 
 struct mlx5_ifc_set_issi_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_issi_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         current_issi[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_set_hca_cap_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_hca_cap_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	union mlx5_ifc_hca_cap_union_bits capability;
 };
 
 enum {
 	MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION			= 0x0,
 	MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG		= 0x1,
 	MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST	= 0x2,
 	MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS		= 0x3
 };
 
 struct mlx5_ifc_set_flow_table_root_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_flow_table_root_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x8];
 	u8         underlay_qpn[0x18];
 
 	u8         reserved_7[0x120];
 };
 
 struct mlx5_ifc_set_fte_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_fte_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x18];
 	u8         modify_enable_mask[0x8];
 
 	u8         reserved_7[0x20];
 
 	u8         flow_index[0x20];
 
 	u8         reserved_8[0xe0];
 
 	struct mlx5_ifc_flow_context_bits flow_context;
 };
 
 struct mlx5_ifc_set_driver_version_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_driver_version_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	u8         driver_version[64][0x8];
 };
 
 struct mlx5_ifc_set_dc_cnak_trace_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_dc_cnak_trace_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         enable[0x1];
 	u8         reserved_2[0x1f];
 
 	u8         reserved_3[0x160];
 
 	struct mlx5_ifc_cmd_pas_bits pas;
 };
 
 struct mlx5_ifc_set_burst_size_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_set_burst_size_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         reserved_3[0x9];
 	u8         device_burst_size[0x17];
 };
 
 struct mlx5_ifc_rts2rts_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_rts2rts_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_rtr2rts_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_rtr2rts_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_rst2init_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_rst2init_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_query_xrq_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_xrqc_bits xrq_context;
 };
 
 struct mlx5_ifc_query_xrq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x8];
 	u8         xrqn[0x18];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_resume_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_resume_qp_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_xrc_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
 
 	u8         reserved_2[0x600];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_query_xrc_srq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         xrc_srqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_wol_rol_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x10];
 	u8         rol_mode[0x8];
 	u8         wol_mode[0x8];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_query_wol_rol_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 enum {
 	MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN  = 0x0,
 	MLX5_QUERY_VPORT_STATE_OUT_STATE_UP    = 0x1,
 };
 
 struct mlx5_ifc_query_vport_state_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 
 	u8         reserved_2[0x18];
 	u8         admin_state[0x4];
 	u8         state[0x4];
 };
 
 enum {
 	MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT  = 0x0,
 	MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT   = 0x1,
 	MLX5_QUERY_VPORT_STATE_IN_OP_MOD_UPLINK      = 0x2,
 };
 
 struct mlx5_ifc_query_vport_state_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_vnic_env_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
 };
 
 enum {
 	MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS  = 0x0,
 };
 
 struct mlx5_ifc_query_vnic_env_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_at_41[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_query_vport_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_traffic_counter_bits received_errors;
 
 	struct mlx5_ifc_traffic_counter_bits transmit_errors;
 
 	struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
 
 	struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
 
 	struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
 
 	struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
 
 	struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
 
 	struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
 
 	struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
 
 	struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
 
 	struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
 
 	struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
 
 	u8         reserved_2[0xa00];
 };
 
 enum {
 	MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS  = 0x0,
 };
 
 struct mlx5_ifc_query_vport_counter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xb];
 	u8         port_num[0x4];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x60];
 
 	u8         clear[0x1];
 	u8         reserved_4[0x1f];
 
 	u8         reserved_5[0x20];
 };
 
 struct mlx5_ifc_query_tis_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_tisc_bits tis_context;
 };
 
 struct mlx5_ifc_query_tis_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         tisn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_tir_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xc0];
 
 	struct mlx5_ifc_tirc_bits tir_context;
 };
 
 struct mlx5_ifc_query_tir_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         tirn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_srqc_bits srq_context_entry;
 
 	u8         reserved_2[0x600];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_query_srq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         srqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_sq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xc0];
 
 	struct mlx5_ifc_sqc_bits sq_context;
 };
 
 struct mlx5_ifc_query_sq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         sqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_special_contexts_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8	   dump_fill_mkey[0x20];
 
 	u8         resd_lkey[0x20];
 };
 
 struct mlx5_ifc_query_special_contexts_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_query_scheduling_element_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0xc0];
 
 	struct mlx5_ifc_scheduling_context_bits scheduling_context;
 
 	u8         reserved_at_300[0x100];
 };
 
 enum {
 	MLX5_SCHEDULING_ELEMENT_IN_HIERARCHY_E_SWITCH = 0x2,
 };
 
 struct mlx5_ifc_query_scheduling_element_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         scheduling_hierarchy[0x8];
 	u8         reserved_at_48[0x18];
 
 	u8         scheduling_element_id[0x20];
 
 	u8         reserved_at_80[0x180];
 };
 
 struct mlx5_ifc_query_rqt_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xc0];
 
 	struct mlx5_ifc_rqtc_bits rqt_context;
 };
 
 struct mlx5_ifc_query_rqt_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rqtn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_rq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xc0];
 
 	struct mlx5_ifc_rqc_bits rq_context;
 };
 
 struct mlx5_ifc_query_rq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_roce_address_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_roce_addr_layout_bits roce_address;
 };
 
 struct mlx5_ifc_query_roce_address_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         roce_address_index[0x10];
 	u8         reserved_2[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_rmp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xc0];
 
 	struct mlx5_ifc_rmpc_bits rmp_context;
 };
 
 struct mlx5_ifc_query_rmp_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rmpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_rdb_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 
 	u8         reserved_2[0x18];
 	u8         rdb_list_size[0x8];
 
 	struct mlx5_ifc_rdbc_bits rdb_context[0];
 };
 
 struct mlx5_ifc_query_rdb_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_2[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_3[0x80];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_query_qp_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_q_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         rx_write_requests[0x20];
 
 	u8         reserved_2[0x20];
 
 	u8         rx_read_requests[0x20];
 
 	u8         reserved_3[0x20];
 
 	u8         rx_atomic_requests[0x20];
 
 	u8         reserved_4[0x20];
 
 	u8         rx_dct_connect[0x20];
 
 	u8         reserved_5[0x20];
 
 	u8         out_of_buffer[0x20];
 
 	u8         reserved_7[0x20];
 
 	u8         out_of_sequence[0x20];
 
 	u8         reserved_8[0x20];
 
 	u8         duplicate_request[0x20];
 
 	u8         reserved_9[0x20];
 
 	u8         rnr_nak_retry_err[0x20];
 
 	u8         reserved_10[0x20];
 
 	u8         packet_seq_err[0x20];
 
 	u8         reserved_11[0x20];
 
 	u8         implied_nak_seq_err[0x20];
 
 	u8         reserved_12[0x20];
 
 	u8         local_ack_timeout_err[0x20];
 
 	u8         reserved_13[0x20];
 
 	u8         resp_rnr_nak[0x20];
 
 	u8         reserved_14[0x20];
 
 	u8         req_rnr_retries_exceeded[0x20];
 
 	u8         reserved_15[0x460];
 };
 
 struct mlx5_ifc_query_q_counter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x80];
 
 	u8         clear[0x1];
 	u8         reserved_3[0x1f];
 
 	u8         reserved_4[0x18];
 	u8         counter_set_id[0x8];
 };
 
 struct mlx5_ifc_query_pages_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x10];
 	u8         function_id[0x10];
 
 	u8         num_pages[0x20];
 };
 
 enum {
 	MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES	  = 0x1,
 	MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES	  = 0x2,
 	MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES  = 0x3,
 };
 
 struct mlx5_ifc_query_pages_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         function_id[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_nic_vport_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
 };
 
 struct mlx5_ifc_query_nic_vport_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x5];
 	u8         allowed_list_type[0x3];
 	u8         reserved_4[0x18];
 };
 
 struct mlx5_ifc_query_mkey_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
 
 	u8         reserved_2[0x600];
 
 	u8         bsf0_klm0_pas_mtt0_1[16][0x8];
 
 	u8         bsf1_klm1_pas_mtt2_3[16][0x8];
 };
 
 struct mlx5_ifc_query_mkey_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         mkey_index[0x18];
 
 	u8         pg_access[0x1];
 	u8         reserved_3[0x1f];
 };
 
 struct mlx5_ifc_query_mad_demux_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         mad_dumux_parameters_block[0x20];
 };
 
 struct mlx5_ifc_query_mad_demux_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_query_l2_table_entry_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xa0];
 
 	u8         reserved_2[0x13];
 	u8         vlan_valid[0x1];
 	u8         vlan[0xc];
 
 	struct mlx5_ifc_mac_address_layout_bits mac_address;
 
 	u8         reserved_3[0xc0];
 };
 
 struct mlx5_ifc_query_l2_table_entry_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x60];
 
 	u8         reserved_3[0x8];
 	u8         table_index[0x18];
 
 	u8         reserved_4[0x140];
 };
 
 struct mlx5_ifc_query_issi_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x10];
 	u8         current_issi[0x10];
 
 	u8         reserved_2[0xa0];
 
 	u8         supported_issi_reserved[76][0x8];
 	u8         supported_issi_dw0[0x20];
 };
 
 struct mlx5_ifc_query_issi_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_query_hca_vport_pkey_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_pkey_bits pkey[0];
 };
 
 struct mlx5_ifc_query_hca_vport_pkey_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xb];
 	u8         port_num[0x4];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x10];
 	u8         pkey_index[0x10];
 };
 
 struct mlx5_ifc_query_hca_vport_gid_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 
 	u8         gids_num[0x10];
 	u8         reserved_2[0x10];
 
 	struct mlx5_ifc_array128_auto_bits gid[0];
 };
 
 struct mlx5_ifc_query_hca_vport_gid_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xb];
 	u8         port_num[0x4];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x10];
 	u8         gid_index[0x10];
 };
 
 struct mlx5_ifc_query_hca_vport_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
 };
 
 struct mlx5_ifc_query_hca_vport_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xb];
 	u8         port_num[0x4];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_hca_cap_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	union mlx5_ifc_hca_cap_union_bits capability;
 };
 
 struct mlx5_ifc_query_hca_cap_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_query_flow_table_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x80];
 
 	struct mlx5_ifc_flow_table_context_bits flow_table_context;
 };
 
 struct mlx5_ifc_query_flow_table_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x140];
 };
 
 struct mlx5_ifc_query_fte_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x1c0];
 
 	struct mlx5_ifc_flow_context_bits flow_context;
 };
 
 struct mlx5_ifc_query_fte_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x40];
 
 	u8         flow_index[0x20];
 
 	u8         reserved_7[0xe0];
 };
 
 enum {
 	MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS    = 0x0,
 	MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS  = 0x1,
 	MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS    = 0x2,
 };
 
 struct mlx5_ifc_query_flow_group_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0xa0];
 
 	u8         start_flow_index[0x20];
 
 	u8         reserved_2[0x20];
 
 	u8         end_flow_index[0x20];
 
 	u8         reserved_3[0xa0];
 
 	u8         reserved_4[0x18];
 	u8         match_criteria_enable[0x8];
 
 	struct mlx5_ifc_fte_match_param_bits match_criteria;
 
 	u8         reserved_5[0xe00];
 };
 
 struct mlx5_ifc_query_flow_group_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         group_id[0x20];
 
 	u8         reserved_6[0x120];
 };
 
 struct mlx5_ifc_query_flow_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
 };
 
 struct mlx5_ifc_query_flow_counter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x80];
 
 	u8         clear[0x1];
 	u8         reserved_at_c1[0xf];
 	u8         num_of_counters[0x10];
 
 	u8         reserved_at_e0[0x10];
 	u8         flow_counter_id[0x10];
 };
 
 struct mlx5_ifc_query_esw_vport_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
 };
 
 struct mlx5_ifc_query_esw_vport_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_eq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_eqc_bits eq_context_entry;
 
 	u8         reserved_2[0x40];
 
 	u8         event_bitmask[0x40];
 
 	u8         reserved_3[0x580];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_query_eq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x18];
 	u8         eq_number[0x8];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_dct_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_dctc_bits dct_context_entry;
 
 	u8         reserved_2[0x180];
 };
 
 struct mlx5_ifc_query_dct_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         dctn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_dc_cnak_trace_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         enable[0x1];
 	u8         reserved_1[0x1f];
 
 	u8         reserved_2[0x160];
 
 	struct mlx5_ifc_cmd_pas_bits pas;
 };
 
 struct mlx5_ifc_query_dc_cnak_trace_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_packet_reformat_context_in_bits {
 	u8         reserved_at_0[0x5];
 	u8         reformat_type[0x3];
 	u8         reserved_at_8[0xe];
 	u8         reformat_data_size[0xa];
 
 	u8         reserved_at_20[0x10];
 	u8         reformat_data[2][0x8];
 
 	u8         more_reformat_data[0][0x8];
 };
 
 struct mlx5_ifc_query_packet_reformat_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0xa0];
 
 	struct mlx5_ifc_packet_reformat_context_in_bits packet_reformat_context[0];
 };
 
 struct mlx5_ifc_query_packet_reformat_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         packet_reformat_id[0x20];
 
 	u8         reserved_at_60[0xa0];
 };
 
 struct mlx5_ifc_alloc_packet_reformat_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         packet_reformat_id[0x20];
 
 	u8         reserved_at_60[0x20];
 };
 
 enum mlx5_reformat_ctx_type {
 	MLX5_REFORMAT_TYPE_L2_TO_VXLAN = 0x0,
 	MLX5_REFORMAT_TYPE_L2_TO_NVGRE = 0x1,
 	MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x2,
 	MLX5_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x3,
 	MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x4,
 };
 
 struct mlx5_ifc_alloc_packet_reformat_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0xa0];
 
 	struct mlx5_ifc_packet_reformat_context_in_bits packet_reformat_context;
 };
 
 struct mlx5_ifc_dealloc_packet_reformat_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_dealloc_packet_reformat_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         packet_reformat_id[0x20];
 
 	u8         reserved_60[0x20];
 };
 
+struct mlx5_ifc_diagnostic_cntr_struct_bits {
+	u8         counter_id[0x10];
+	u8         sample_id[0x10];
+
+	u8         time_stamp_31_0[0x20];
+
+	u8         counter_value_h[0x20];
+
+	u8         counter_value_l[0x20];
+};
+
+enum {
+	MLX5_DIAGNOSTIC_PARAMS_CONTEXT_ENABLE_ENABLE   = 0x1,
+	MLX5_DIAGNOSTIC_PARAMS_CONTEXT_ENABLE_DISABLE  = 0x0,
+};
+
 struct mlx5_ifc_query_cq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_cqc_bits cq_context;
 
 	u8         reserved_2[0x600];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_query_cq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         cqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_cong_status_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 
 	u8         enable[0x1];
 	u8         tag_enable[0x1];
 	u8         reserved_2[0x1e];
 };
 
 struct mlx5_ifc_query_cong_status_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x18];
 	u8         priority[0x4];
 	u8         cong_protocol[0x4];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_cong_statistics_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         rp_cur_flows[0x20];
 
 	u8         sum_flows[0x20];
 
 	u8         rp_cnp_ignored_high[0x20];
 
 	u8         rp_cnp_ignored_low[0x20];
 
 	u8         rp_cnp_handled_high[0x20];
 
 	u8         rp_cnp_handled_low[0x20];
 
 	u8         reserved_2[0x100];
 
 	u8         time_stamp_high[0x20];
 
 	u8         time_stamp_low[0x20];
 
 	u8         accumulators_period[0x20];
 
 	u8         np_ecn_marked_roce_packets_high[0x20];
 
 	u8         np_ecn_marked_roce_packets_low[0x20];
 
 	u8         np_cnp_sent_high[0x20];
 
 	u8         np_cnp_sent_low[0x20];
 
 	u8         reserved_3[0x560];
 };
 
 struct mlx5_ifc_query_cong_statistics_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         clear[0x1];
 	u8         reserved_2[0x1f];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_cong_params_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
 };
 
 struct mlx5_ifc_query_cong_params_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x1c];
 	u8         cong_protocol[0x4];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_query_burst_size_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 
 	u8         reserved_2[0x9];
 	u8         device_burst_size[0x17];
 };
 
 struct mlx5_ifc_query_burst_size_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_query_adapter_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
 };
 
 struct mlx5_ifc_query_adapter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_qp_2rst_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_qp_2rst_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_qp_2err_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_qp_2err_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_para_vport_element_bits {
 	u8         reserved_at_0[0xc];
 	u8         traffic_class[0x4];
 	u8         qos_para_vport_number[0x10];
 };
 
 struct mlx5_ifc_page_fault_resume_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_page_fault_resume_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         error[0x1];
 	u8         reserved_2[0x4];
 	u8         rdma[0x1];
 	u8         read_write[0x1];
 	u8         req_res[0x1];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_nop_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_nop_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_modify_vport_state_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_NIC_VPORT  = 0x0,
 	MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_ESW_VPORT  = 0x1,
 	MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_UPLINK     = 0x2,
 };
 
 enum {
 	MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_DOWN    = 0x0,
 	MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_UP      = 0x1,
 	MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_FOLLOW  = 0x2,
 };
 
 struct mlx5_ifc_modify_vport_state_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x18];
 	u8         admin_state[0x4];
 	u8         reserved_4[0x4];
 };
 
 struct mlx5_ifc_modify_tis_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_modify_tis_bitmask_bits {
 	u8         reserved_at_0[0x20];
 
 	u8         reserved_at_20[0x1d];
 	u8         lag_tx_port_affinity[0x1];
 	u8         strict_lag_tx_port_affinity[0x1];
 	u8         prio[0x1];
 };
 
 struct mlx5_ifc_modify_tis_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         tisn[0x18];
 
 	u8         reserved_3[0x20];
 
 	struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
 
 	u8         reserved_4[0x40];
 
 	struct mlx5_ifc_tisc_bits ctx;
 };
 
 struct mlx5_ifc_modify_tir_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum
 {
 	MLX5_MODIFY_SQ_BITMASK_PACKET_PACING_RATE_LIMIT_INDEX = 0x1 << 0,
 	MLX5_MODIFY_SQ_BITMASK_QOS_PARA_VPORT_NUMBER =		0x1 << 1
 };
 
 struct mlx5_ifc_modify_tir_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         tirn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         modify_bitmask[0x40];
 
 	u8         reserved_4[0x40];
 
 	struct mlx5_ifc_tirc_bits tir_context;
 };
 
 struct mlx5_ifc_modify_sq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_modify_sq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         sq_state[0x4];
 	u8         reserved_2[0x4];
 	u8         sqn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         modify_bitmask[0x40];
 
 	u8         reserved_4[0x40];
 
 	struct mlx5_ifc_sqc_bits ctx;
 };
 
 struct mlx5_ifc_modify_scheduling_element_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x1c0];
 };
 
 enum {
 	MLX5_MODIFY_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH  = 0x2,
 };
 
 enum {
 	MLX5_MODIFY_SCHEDULING_ELEMENT_BITMASK_BW_SHARE        = 0x1,
 	MLX5_MODIFY_SCHEDULING_ELEMENT_BITMASK_MAX_AVERAGE_BW  = 0x2,
 };
 
 struct mlx5_ifc_modify_scheduling_element_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         scheduling_hierarchy[0x8];
 	u8         reserved_at_48[0x18];
 
 	u8         scheduling_element_id[0x20];
 
 	u8         reserved_at_80[0x20];
 
 	u8         modify_bitmask[0x20];
 
 	u8         reserved_at_c0[0x40];
 
 	struct mlx5_ifc_scheduling_context_bits scheduling_context;
 
 	u8         reserved_at_300[0x100];
 };
 
 struct mlx5_ifc_modify_rqt_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_rqt_bitmask_bits {
 	u8         reserved_at_0[0x20];
 
 	u8         reserved_at_20[0x1f];
 	u8         rqn_list[0x1];
 };
 
 
 struct mlx5_ifc_modify_rqt_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rqtn[0x18];
 
 	u8         reserved_3[0x20];
 
 	struct mlx5_ifc_rqt_bitmask_bits bitmask;
 
 	u8         reserved_4[0x40];
 
 	struct mlx5_ifc_rqtc_bits ctx;
 };
 
 struct mlx5_ifc_modify_rq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
 	MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_MODIFY_RQ_COUNTER_SET_ID = 1ULL << 3,
 };
 
 struct mlx5_ifc_modify_rq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         rq_state[0x4];
 	u8         reserved_2[0x4];
 	u8         rqn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         modify_bitmask[0x40];
 
 	u8         reserved_4[0x40];
 
 	struct mlx5_ifc_rqc_bits ctx;
 };
 
 struct mlx5_ifc_modify_rmp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_rmp_bitmask_bits {
 	u8	   reserved[0x20];
 
 	u8         reserved1[0x1f];
 	u8         lwm[0x1];
 };
 
 struct mlx5_ifc_modify_rmp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         rmp_state[0x4];
 	u8         reserved_2[0x4];
 	u8         rmpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	struct mlx5_ifc_rmp_bitmask_bits bitmask;
 
 	u8         reserved_4[0x40];
 
 	struct mlx5_ifc_rmpc_bits ctx;
 };
 
 struct mlx5_ifc_modify_nic_vport_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_modify_nic_vport_field_select_bits {
 	u8         reserved_0[0x14];
 	u8         disable_uc_local_lb[0x1];
 	u8         disable_mc_local_lb[0x1];
 	u8         node_guid[0x1];
 	u8         port_guid[0x1];
 	u8         min_wqe_inline_mode[0x1];
 	u8         mtu[0x1];
 	u8         change_event[0x1];
 	u8         promisc[0x1];
 	u8         permanent_address[0x1];
 	u8         addresses_list[0x1];
 	u8         roce_en[0x1];
 	u8         reserved_1[0x1];
 };
 
 struct mlx5_ifc_modify_nic_vport_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
 
 	u8         reserved_3[0x780];
 
 	struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
 };
 
 struct mlx5_ifc_modify_hca_vport_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_grh_bits {
 	u8	ip_version[4];
 	u8	traffic_class[8];
 	u8	flow_label[20];
 	u8	payload_length[16];
 	u8	next_header[8];
 	u8	hop_limit[8];
 	u8	sgid[128];
 	u8	dgid[128];
 };
 
 struct mlx5_ifc_bth_bits {
 	u8	opcode[8];
 	u8	se[1];
 	u8	migreq[1];
 	u8	pad_count[2];
 	u8	tver[4];
 	u8	p_key[16];
 	u8	reserved8[8];
 	u8	dest_qp[24];
 	u8	ack_req[1];
 	u8	reserved7[7];
 	u8	psn[24];
 };
 
 struct mlx5_ifc_aeth_bits {
 	u8	syndrome[8];
 	u8	msn[24];
 };
 
 struct mlx5_ifc_dceth_bits {
 	u8	reserved0[8];
 	u8	session_id[24];
 	u8	reserved1[8];
 	u8	dci_dct[24];
 };
 
 struct mlx5_ifc_modify_hca_vport_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xb];
 	u8         port_num[0x4];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
 };
 
 struct mlx5_ifc_modify_flow_table_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 };
 
 enum {
 	MLX5_MODIFY_FLOW_TABLE_SELECT_MISS_ACTION_AND_ID = 0x1,
 	MLX5_MODIFY_FLOW_TABLE_SELECT_LAG_MASTER_NEXT_TABLE_ID = 0x8000,
 };
 
 struct mlx5_ifc_modify_flow_table_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_at_41[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_at_60[0x10];
 	u8         modify_field_select[0x10];
 
 	u8         table_type[0x8];
 	u8         reserved_at_88[0x18];
 
 	u8         reserved_at_a0[0x8];
 	u8         table_id[0x18];
 
 	struct mlx5_ifc_flow_table_context_bits flow_table_context;
 };
 
 struct mlx5_ifc_modify_esw_vport_context_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_esw_vport_context_fields_select_bits {
 	u8         reserved[0x1c];
 	u8         vport_cvlan_insert[0x1];
 	u8         vport_svlan_insert[0x1];
 	u8         vport_cvlan_strip[0x1];
 	u8         vport_svlan_strip[0x1];
 };
 
 struct mlx5_ifc_modify_esw_vport_context_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
 
 	struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
 };
 
 struct mlx5_ifc_modify_cq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ  = 0x0,
 	MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ  = 0x1,
 };
 
 struct mlx5_ifc_modify_cq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         cqn[0x18];
 
 	union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
 
 	struct mlx5_ifc_cqc_bits cq_context;
 
 	u8         reserved_at_280[0x60];
 
 	u8         cq_umem_valid[0x1];
 	u8         reserved_at_2e1[0x1f];
 
 	u8         reserved_at_300[0x580];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_modify_cong_status_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_modify_cong_status_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x18];
 	u8         priority[0x4];
 	u8         cong_protocol[0x4];
 
 	u8         enable[0x1];
 	u8         tag_enable[0x1];
 	u8         reserved_3[0x1e];
 };
 
 struct mlx5_ifc_modify_cong_params_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_modify_cong_params_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x1c];
 	u8         cong_protocol[0x4];
 
 	union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
 
 	u8         reserved_3[0x80];
 
 	union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
 };
 
 struct mlx5_ifc_manage_pages_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         output_num_entries[0x20];
 
 	u8         reserved_1[0x20];
 
 	u8         pas[0][0x40];
 };
 
 enum {
 	MLX5_PAGES_CANT_GIVE                            = 0x0,
 	MLX5_PAGES_GIVE                                 = 0x1,
 	MLX5_PAGES_TAKE                                 = 0x2,
 };
 
 struct mlx5_ifc_manage_pages_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         function_id[0x10];
 
 	u8         input_num_entries[0x20];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_mad_ifc_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         response_mad_packet[256][0x8];
 };
 
 struct mlx5_ifc_mad_ifc_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         remote_lid[0x10];
 	u8         reserved_2[0x8];
 	u8         port[0x8];
 
 	u8         reserved_3[0x20];
 
 	u8         mad[256][0x8];
 };
 
 struct mlx5_ifc_init_hca_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_INIT_HCA_IN_OP_MOD_INIT      = 0x0,
 	MLX5_INIT_HCA_IN_OP_MOD_PRE_INIT  = 0x1,
 };
 
 struct mlx5_ifc_init_hca_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_init2rtr_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_init2rtr_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_init2init_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_init2init_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_get_dropped_packet_log_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         packet_headers_log[128][0x8];
 
 	u8         packet_syndrome[64][0x8];
 };
 
 struct mlx5_ifc_get_dropped_packet_log_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_encryption_key_obj_bits {
 	u8         modify_field_select[0x40];
 
 	u8         reserved_at_40[0x14];
 	u8         key_size[0x4];
 	u8         reserved_at_58[0x4];
 	u8         key_type[0x4];
 
 	u8         reserved_at_60[0x8];
 	u8         pd[0x18];
 
 	u8         reserved_at_80[0x180];
 
 	u8         key[8][0x20];
 
 	u8         reserved_at_300[0x500];
 };
 
 struct mlx5_ifc_gen_eqe_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x18];
 	u8         eq_number[0x8];
 
 	u8         reserved_3[0x20];
 
 	u8         eqe[64][0x8];
 };
 
 struct mlx5_ifc_gen_eq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_enable_hca_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 };
 
 struct mlx5_ifc_enable_hca_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         function_id[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_drain_dct_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_drain_dct_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         dctn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_disable_hca_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x20];
 };
 
 struct mlx5_ifc_disable_hca_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         function_id[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_detach_from_mcg_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_detach_from_mcg_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         multicast_gid[16][0x8];
 };
 
 struct mlx5_ifc_destroy_xrc_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_xrc_srq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         xrc_srqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_tis_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_tis_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         tisn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_tir_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_tir_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         tirn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_srq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         srqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_sq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_sq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         sqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_scheduling_element_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x1c0];
 };
 
 enum {
 	MLX5_DESTROY_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH  = 0x2,
 };
 
 struct mlx5_ifc_destroy_scheduling_element_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         scheduling_hierarchy[0x8];
 	u8         reserved_at_48[0x18];
 
 	u8         scheduling_element_id[0x20];
 
 	u8         reserved_at_80[0x180];
 };
 
 struct mlx5_ifc_destroy_rqt_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_rqt_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rqtn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_rq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_rq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_rmp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_rmp_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         rmpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_qos_para_vport_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x1c0];
 };
 
 struct mlx5_ifc_destroy_qos_para_vport_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x20];
 
 	u8         reserved_at_60[0x10];
 	u8         qos_para_vport_number[0x10];
 
 	u8         reserved_at_80[0x180];
 };
 
 struct mlx5_ifc_destroy_psv_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_psv_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         psvn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_mkey_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_mkey_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         mkey_index[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_flow_table_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_flow_table_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x140];
 };
 
 struct mlx5_ifc_destroy_flow_group_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_flow_group_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         group_id[0x20];
 
 	u8         reserved_6[0x120];
 };
 
 struct mlx5_ifc_destroy_encryption_key_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_destroy_encryption_key_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         obj_type[0x10];
 
 	u8         obj_id[0x20];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_destroy_eq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_eq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x18];
 	u8         eq_number[0x8];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_dct_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_dct_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         dctn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_destroy_cq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_destroy_cq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         cqn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         reserved_3[0x10];
 	u8         vxlan_udp_port[0x10];
 };
 
 struct mlx5_ifc_delete_l2_table_entry_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_delete_l2_table_entry_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x60];
 
 	u8         reserved_3[0x8];
 	u8         table_index[0x18];
 
 	u8         reserved_4[0x140];
 };
 
 struct mlx5_ifc_delete_fte_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_delete_fte_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x40];
 
 	u8         flow_index[0x20];
 
 	u8         reserved_7[0xe0];
 };
 
 struct mlx5_ifc_dealloc_xrcd_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_dealloc_xrcd_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         xrcd[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_dealloc_uar_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_dealloc_uar_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         uar[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_dealloc_transport_domain_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_dealloc_transport_domain_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         transport_domain[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_dealloc_q_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_counter_id_bits {
 	u8         reserved[0x10];
 	u8         counter_id[0x10];
 };
 
 struct mlx5_ifc_diagnostic_params_context_bits {
 	u8         num_of_counters[0x10];
 	u8         reserved_2[0x8];
 	u8         log_num_of_samples[0x8];
 
 	u8         single[0x1];
 	u8         repetitive[0x1];
 	u8         sync[0x1];
 	u8         clear[0x1];
 	u8         on_demand[0x1];
 	u8         enable[0x1];
 	u8         reserved_3[0x12];
 	u8         log_sample_period[0x8];
 
 	u8         reserved_4[0x80];
 
 	struct mlx5_ifc_counter_id_bits counter_id[0];
 };
 
+struct mlx5_ifc_query_diagnostic_params_in_bits {
+	u8         opcode[0x10];
+	u8         reserved_at_10[0x10];
+
+	u8         reserved_at_20[0x10];
+	u8         op_mod[0x10];
+
+	u8         reserved_at_40[0x40];
+};
+
+struct mlx5_ifc_query_diagnostic_params_out_bits {
+	u8         status[0x8];
+	u8         reserved_at_8[0x18];
+
+	u8         syndrome[0x20];
+
+	struct mlx5_ifc_diagnostic_params_context_bits diagnostic_params_ctx;
+};
+
 struct mlx5_ifc_set_diagnostic_params_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	struct mlx5_ifc_diagnostic_params_context_bits diagnostic_params_ctx;
 };
 
 struct mlx5_ifc_set_diagnostic_params_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_query_diagnostic_counters_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         num_of_samples[0x10];
 	u8         sample_index[0x10];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_diagnostic_counter_bits {
 	u8         counter_id[0x10];
 	u8         sample_id[0x10];
 
 	u8         time_stamp_31_0[0x20];
 
 	u8         counter_value_h[0x20];
 
 	u8         counter_value_l[0x20];
 };
 
 struct mlx5_ifc_query_diagnostic_counters_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	struct mlx5_ifc_diagnostic_counter_bits diag_counter[0];
 };
 
 struct mlx5_ifc_dealloc_q_counter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x18];
 	u8         counter_set_id[0x8];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_dealloc_pd_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_dealloc_pd_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         pd[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_dealloc_flow_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_dealloc_flow_counter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         flow_counter_id[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_create_xrq_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x8];
 	u8         xrqn[0x18];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_create_xrq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_xrqc_bits xrq_context;
 };
 
 struct mlx5_ifc_deactivate_tracer_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_deactivate_tracer_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         mkey[0x20];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_xrc_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         xrc_srqn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_xrc_srq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
 
 	u8         reserved_at_280[0x60];
 
 	u8         xrc_srq_umem_valid[0x1];
 	u8         reserved_at_2e1[0x1f];
 
 	u8         reserved_at_300[0x580];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_create_tis_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         tisn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_tis_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0xc0];
 
 	struct mlx5_ifc_tisc_bits ctx;
 };
 
 struct mlx5_ifc_create_tir_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         tirn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_tir_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0xc0];
 
 	struct mlx5_ifc_tirc_bits tir_context;
 };
 
 struct mlx5_ifc_create_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         srqn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_srq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	struct mlx5_ifc_srqc_bits srq_context_entry;
 
 	u8         reserved_3[0x600];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_create_sq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         sqn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_sq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0xc0];
 
 	struct mlx5_ifc_sqc_bits ctx;
 };
 
 struct mlx5_ifc_create_scheduling_element_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 
 	u8         scheduling_element_id[0x20];
 
 	u8         reserved_at_a0[0x160];
 };
 
 enum {
 	MLX5_CREATE_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH  = 0x2,
 };
 
 struct mlx5_ifc_create_scheduling_element_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         scheduling_hierarchy[0x8];
 	u8         reserved_at_48[0x18];
 
 	u8         reserved_at_60[0xa0];
 
 	struct mlx5_ifc_scheduling_context_bits scheduling_context;
 
 	u8         reserved_at_300[0x100];
 };
 
 struct mlx5_ifc_create_rqt_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         rqtn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_rqt_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0xc0];
 
 	struct mlx5_ifc_rqtc_bits rqt_context;
 };
 
 struct mlx5_ifc_create_rq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         rqn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_rq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0xc0];
 
 	struct mlx5_ifc_rqc_bits ctx;
 };
 
 struct mlx5_ifc_create_rmp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         rmpn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_rmp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0xc0];
 
 	struct mlx5_ifc_rmpc_bits ctx;
 };
 
 struct mlx5_ifc_create_qp_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_qp_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         input_qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         opt_param_mask[0x20];
 
 	u8         reserved_4[0x20];
 
 	struct mlx5_ifc_qpc_bits qpc;
 
 	u8         reserved_at_800[0x60];
 
 	u8         wq_umem_valid[0x1];
 	u8         reserved_at_861[0x1f];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_create_qos_para_vport_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x20];
 
 	u8         reserved_at_60[0x10];
 	u8         qos_para_vport_number[0x10];
 
 	u8         reserved_at_80[0x180];
 };
 
 struct mlx5_ifc_create_qos_para_vport_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x1c0];
 };
 
 struct mlx5_ifc_create_psv_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         reserved_2[0x8];
 	u8         psv0_index[0x18];
 
 	u8         reserved_3[0x8];
 	u8         psv1_index[0x18];
 
 	u8         reserved_4[0x8];
 	u8         psv2_index[0x18];
 
 	u8         reserved_5[0x8];
 	u8         psv3_index[0x18];
 };
 
 struct mlx5_ifc_create_psv_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         num_psv[0x4];
 	u8         reserved_2[0x4];
 	u8         pd[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_create_mkey_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         mkey_index[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_mkey_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         pg_access[0x1];
 	u8         mkey_umem_valid[0x1];
 	u8         reserved_at_62[0x1e];
 
 	struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
 
 	u8         reserved_4[0x80];
 
 	u8         translations_octword_actual_size[0x20];
 
 	u8         reserved_5[0x560];
 
 	u8         klm_pas_mtt[0][0x20];
 };
 
 struct mlx5_ifc_create_flow_table_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_flow_table_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_at_41[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_at_60[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_at_88[0x18];
 
 	u8         reserved_at_a0[0x20];
 
 	struct mlx5_ifc_flow_table_context_bits flow_table_context;
 };
 
 struct mlx5_ifc_create_flow_group_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         group_id[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 enum {
 	MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS    = 0x0,
 	MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS  = 0x1,
 	MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS    = 0x2,
 };
 
 struct mlx5_ifc_create_flow_group_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         other_vport[0x1];
 	u8         reserved_2[0xf];
 	u8         vport_number[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         table_type[0x8];
 	u8         reserved_4[0x18];
 
 	u8         reserved_5[0x8];
 	u8         table_id[0x18];
 
 	u8         reserved_6[0x20];
 
 	u8         start_flow_index[0x20];
 
 	u8         reserved_7[0x20];
 
 	u8         end_flow_index[0x20];
 
 	u8         reserved_8[0xa0];
 
 	u8         reserved_9[0x18];
 	u8         match_criteria_enable[0x8];
 
 	struct mlx5_ifc_fte_match_param_bits match_criteria;
 
 	u8         reserved_10[0xe00];
 };
 
 struct mlx5_ifc_create_encryption_key_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         obj_id[0x20];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_create_encryption_key_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         obj_type[0x10];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_encryption_key_obj_bits encryption_key_object;
 };
 
 struct mlx5_ifc_create_eq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x18];
 	u8         eq_number[0x8];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_eq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	struct mlx5_ifc_eqc_bits eq_context_entry;
 
 	u8         reserved_3[0x40];
 
 	u8         event_bitmask[0x40];
 
 	u8         reserved_4[0x580];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_create_dct_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         dctn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_dct_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	struct mlx5_ifc_dctc_bits dct_context_entry;
 
 	u8         reserved_3[0x180];
 };
 
 struct mlx5_ifc_create_cq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         cqn[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_create_cq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 
 	struct mlx5_ifc_cqc_bits cq_context;
 
 	u8         reserved_at_280[0x60];
 
 	u8         cq_umem_valid[0x1];
 	u8         reserved_at_2e1[0x59f];
 
 	u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_config_int_moderation_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x4];
 	u8         min_delay[0xc];
 	u8         int_vector[0x10];
 
 	u8         reserved_2[0x20];
 };
 
 enum {
 	MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE  = 0x0,
 	MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ   = 0x1,
 };
 
 struct mlx5_ifc_config_int_moderation_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x4];
 	u8         min_delay[0xc];
 	u8         int_vector[0x10];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_attach_to_mcg_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_attach_to_mcg_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         qpn[0x18];
 
 	u8         reserved_3[0x20];
 
 	u8         multicast_gid[16][0x8];
 };
 
 struct mlx5_ifc_arm_xrq_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_arm_xrq_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x8];
 	u8         xrqn[0x18];
 
 	u8         reserved_at_60[0x10];
 	u8         lwm[0x10];
 };
 
 struct mlx5_ifc_arm_xrc_srq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ  = 0x1,
 };
 
 struct mlx5_ifc_arm_xrc_srq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         xrc_srqn[0x18];
 
 	u8         reserved_3[0x10];
 	u8         lwm[0x10];
 };
 
 struct mlx5_ifc_arm_rq_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 enum {
 	MLX5_ARM_RQ_IN_OP_MOD_SRQ  = 0x1,
 };
 
 struct mlx5_ifc_arm_rq_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         srq_number[0x18];
 
 	u8         reserved_3[0x10];
 	u8         lwm[0x10];
 };
 
 struct mlx5_ifc_arm_dct_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_arm_dct_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x8];
 	u8         dctn[0x18];
 
 	u8         reserved_3[0x20];
 };
 
 struct mlx5_ifc_alloc_xrcd_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         xrcd[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_alloc_xrcd_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_alloc_uar_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         uar[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_alloc_uar_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_alloc_transport_domain_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         transport_domain[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_alloc_transport_domain_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_alloc_q_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x18];
 	u8         counter_set_id[0x8];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_alloc_q_counter_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_alloc_pd_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x8];
 	u8         pd[0x18];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_alloc_pd_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_alloc_flow_counter_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         flow_counter_id[0x20];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_alloc_flow_counter_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x38];
 	u8         flow_counter_bulk[0x8];
 };
 
 struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x20];
 
 	u8         reserved_3[0x10];
 	u8         vxlan_udp_port[0x10];
 };
 
 struct mlx5_ifc_activate_tracer_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 };
 
 struct mlx5_ifc_activate_tracer_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         mkey[0x20];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_set_rate_limit_out_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_at_40[0x40];
 };
 
 struct mlx5_ifc_set_rate_limit_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x10];
 	u8         rate_limit_index[0x10];
 
 	u8         reserved_at_60[0x20];
 
 	u8         rate_limit[0x20];
 
 	u8         burst_upper_bound[0x20];
 
 	u8         reserved_at_c0[0x10];
 	u8         typical_packet_size[0x10];
 
 	u8         reserved_at_e0[0x120];
 };
 
 struct mlx5_ifc_access_register_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         reserved_1[0x40];
 
 	u8         register_data[0][0x20];
 };
 
 enum {
 	MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE  = 0x0,
 	MLX5_ACCESS_REGISTER_IN_OP_MOD_READ   = 0x1,
 };
 
 struct mlx5_ifc_access_register_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_2[0x10];
 	u8         register_id[0x10];
 
 	u8         argument[0x20];
 
 	u8         register_data[0][0x20];
 };
 
 struct mlx5_ifc_sltp_reg_bits {
 	u8         status[0x4];
 	u8         version[0x4];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_0[0x2];
 	u8         lane[0x4];
 	u8         reserved_1[0x8];
 
 	u8         reserved_2[0x20];
 
 	u8         reserved_3[0x7];
 	u8         polarity[0x1];
 	u8         ob_tap0[0x8];
 	u8         ob_tap1[0x8];
 	u8         ob_tap2[0x8];
 
 	u8         reserved_4[0xc];
 	u8         ob_preemp_mode[0x4];
 	u8         ob_reg[0x8];
 	u8         ob_bias[0x8];
 
 	u8         reserved_5[0x20];
 };
 
 struct mlx5_ifc_slrp_reg_bits {
 	u8         status[0x4];
 	u8         version[0x4];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_0[0x2];
 	u8         lane[0x4];
 	u8         reserved_1[0x8];
 
 	u8         ib_sel[0x2];
 	u8         reserved_2[0x11];
 	u8         dp_sel[0x1];
 	u8         dp90sel[0x4];
 	u8         mix90phase[0x8];
 
 	u8         ffe_tap0[0x8];
 	u8         ffe_tap1[0x8];
 	u8         ffe_tap2[0x8];
 	u8         ffe_tap3[0x8];
 
 	u8         ffe_tap4[0x8];
 	u8         ffe_tap5[0x8];
 	u8         ffe_tap6[0x8];
 	u8         ffe_tap7[0x8];
 
 	u8         ffe_tap8[0x8];
 	u8         mixerbias_tap_amp[0x8];
 	u8         reserved_3[0x7];
 	u8         ffe_tap_en[0x9];
 
 	u8         ffe_tap_offset0[0x8];
 	u8         ffe_tap_offset1[0x8];
 	u8         slicer_offset0[0x10];
 
 	u8         mixer_offset0[0x10];
 	u8         mixer_offset1[0x10];
 
 	u8         mixerbgn_inp[0x8];
 	u8         mixerbgn_inn[0x8];
 	u8         mixerbgn_refp[0x8];
 	u8         mixerbgn_refn[0x8];
 
 	u8         sel_slicer_lctrl_h[0x1];
 	u8         sel_slicer_lctrl_l[0x1];
 	u8         reserved_4[0x1];
 	u8         ref_mixer_vreg[0x5];
 	u8         slicer_gctrl[0x8];
 	u8         lctrl_input[0x8];
 	u8         mixer_offset_cm1[0x8];
 
 	u8         common_mode[0x6];
 	u8         reserved_5[0x1];
 	u8         mixer_offset_cm0[0x9];
 	u8         reserved_6[0x7];
 	u8         slicer_offset_cm[0x9];
 };
 
 struct mlx5_ifc_slrg_reg_bits {
 	u8         status[0x4];
 	u8         version[0x4];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_0[0x2];
 	u8         lane[0x4];
 	u8         reserved_1[0x8];
 
 	u8         time_to_link_up[0x10];
 	u8         reserved_2[0xc];
 	u8         grade_lane_speed[0x4];
 
 	u8         grade_version[0x8];
 	u8         grade[0x18];
 
 	u8         reserved_3[0x4];
 	u8         height_grade_type[0x4];
 	u8         height_grade[0x18];
 
 	u8         height_dz[0x10];
 	u8         height_dv[0x10];
 
 	u8         reserved_4[0x10];
 	u8         height_sigma[0x10];
 
 	u8         reserved_5[0x20];
 
 	u8         reserved_6[0x4];
 	u8         phase_grade_type[0x4];
 	u8         phase_grade[0x18];
 
 	u8         reserved_7[0x8];
 	u8         phase_eo_pos[0x8];
 	u8         reserved_8[0x8];
 	u8         phase_eo_neg[0x8];
 
 	u8         ffe_set_tested[0x10];
 	u8         test_errors_per_lane[0x10];
 };
 
 struct mlx5_ifc_pvlc_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x1c];
 	u8         vl_hw_cap[0x4];
 
 	u8         reserved_3[0x1c];
 	u8         vl_admin[0x4];
 
 	u8         reserved_4[0x1c];
 	u8         vl_operational[0x4];
 };
 
 struct mlx5_ifc_pude_reg_bits {
 	u8         swid[0x8];
 	u8         local_port[0x8];
 	u8         reserved_0[0x4];
 	u8         admin_status[0x4];
 	u8         reserved_1[0x4];
 	u8         oper_status[0x4];
 
 	u8         reserved_2[0x60];
 };
 
 enum {
 	MLX5_PTYS_REG_PROTO_MASK_INFINIBAND  = 0x1,
 	MLX5_PTYS_REG_PROTO_MASK_ETHERNET    = 0x4,
 };
 
 struct mlx5_ifc_ptys_reg_bits {
 	u8         reserved_0[0x1];
 	u8         an_disable_admin[0x1];
 	u8         an_disable_cap[0x1];
 	u8         reserved_1[0x4];
 	u8         force_tx_aba_param[0x1];
 	u8         local_port[0x8];
 	u8         reserved_2[0xd];
 	u8         proto_mask[0x3];
 
 	u8         an_status[0x4];
 	u8         reserved_3[0xc];
 	u8         data_rate_oper[0x10];
 
 	u8         ext_eth_proto_capability[0x20];
 
 	u8         eth_proto_capability[0x20];
 
 	u8         ib_link_width_capability[0x10];
 	u8         ib_proto_capability[0x10];
 
 	u8         ext_eth_proto_admin[0x20];
 
 	u8         eth_proto_admin[0x20];
 
 	u8         ib_link_width_admin[0x10];
 	u8         ib_proto_admin[0x10];
 
 	u8         ext_eth_proto_oper[0x20];
 
 	u8         eth_proto_oper[0x20];
 
 	u8         ib_link_width_oper[0x10];
 	u8         ib_proto_oper[0x10];
 
 	u8         reserved_4[0x1c];
 	u8         connector_type[0x4];
 
 	u8         eth_proto_lp_advertise[0x20];
 
 	u8         reserved_5[0x60];
 };
 
 struct mlx5_ifc_ptas_reg_bits {
 	u8         reserved_0[0x20];
 
 	u8         algorithm_options[0x10];
 	u8         reserved_1[0x4];
 	u8         repetitions_mode[0x4];
 	u8         num_of_repetitions[0x8];
 
 	u8         grade_version[0x8];
 	u8         height_grade_type[0x4];
 	u8         phase_grade_type[0x4];
 	u8         height_grade_weight[0x8];
 	u8         phase_grade_weight[0x8];
 
 	u8         gisim_measure_bits[0x10];
 	u8         adaptive_tap_measure_bits[0x10];
 
 	u8         ber_bath_high_error_threshold[0x10];
 	u8         ber_bath_mid_error_threshold[0x10];
 
 	u8         ber_bath_low_error_threshold[0x10];
 	u8         one_ratio_high_threshold[0x10];
 
 	u8         one_ratio_high_mid_threshold[0x10];
 	u8         one_ratio_low_mid_threshold[0x10];
 
 	u8         one_ratio_low_threshold[0x10];
 	u8         ndeo_error_threshold[0x10];
 
 	u8         mixer_offset_step_size[0x10];
 	u8         reserved_2[0x8];
 	u8         mix90_phase_for_voltage_bath[0x8];
 
 	u8         mixer_offset_start[0x10];
 	u8         mixer_offset_end[0x10];
 
 	u8         reserved_3[0x15];
 	u8         ber_test_time[0xb];
 };
 
 struct mlx5_ifc_pspa_reg_bits {
 	u8         swid[0x8];
 	u8         local_port[0x8];
 	u8         sub_port[0x8];
 	u8         reserved_0[0x8];
 
 	u8         reserved_1[0x20];
 };
 
 struct mlx5_ifc_ppsc_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x60];
 
 	u8         reserved_3[0x1c];
 	u8         wrps_admin[0x4];
 
 	u8         reserved_4[0x1c];
 	u8         wrps_status[0x4];
 
 	u8         up_th_vld[0x1];
 	u8         down_th_vld[0x1];
 	u8         reserved_5[0x6];
 	u8         up_threshold[0x8];
 	u8         reserved_6[0x8];
 	u8         down_threshold[0x8];
 
 	u8         reserved_7[0x20];
 
 	u8         reserved_8[0x1c];
 	u8         srps_admin[0x4];
 
 	u8         reserved_9[0x60];
 };
 
 struct mlx5_ifc_pplr_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x8];
 	u8         lb_cap[0x8];
 	u8         reserved_3[0x8];
 	u8         lb_en[0x8];
 };
 
 struct mlx5_ifc_pplm_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8	   local_port[0x8];
 	u8	   reserved_at_10[0x10];
 
 	u8	   reserved_at_20[0x20];
 
 	u8	   port_profile_mode[0x8];
 	u8	   static_port_profile[0x8];
 	u8	   active_port_profile[0x8];
 	u8	   reserved_at_58[0x8];
 
 	u8	   retransmission_active[0x8];
 	u8	   fec_mode_active[0x18];
 
 	u8	   rs_fec_correction_bypass_cap[0x4];
 	u8	   reserved_at_84[0x8];
 	u8	   fec_override_cap_56g[0x4];
 	u8	   fec_override_cap_100g[0x4];
 	u8	   fec_override_cap_50g[0x4];
 	u8	   fec_override_cap_25g[0x4];
 	u8	   fec_override_cap_10g_40g[0x4];
 
 	u8	   rs_fec_correction_bypass_admin[0x4];
 	u8	   reserved_at_a4[0x8];
 	u8	   fec_override_admin_56g[0x4];
 	u8	   fec_override_admin_100g[0x4];
 	u8	   fec_override_admin_50g[0x4];
 	u8	   fec_override_admin_25g[0x4];
 	u8	   fec_override_admin_10g_40g[0x4];
 
 	u8	   fec_override_cap_400g_8x[0x10];
 	u8	   fec_override_cap_200g_4x[0x10];
 	u8	   fec_override_cap_100g_2x[0x10];
 	u8	   fec_override_cap_50g_1x[0x10];
 
 	u8	   fec_override_admin_400g_8x[0x10];
 	u8	   fec_override_admin_200g_4x[0x10];
 	u8	   fec_override_admin_100g_2x[0x10];
 	u8	   fec_override_admin_50g_1x[0x10];
 
 	u8	   reserved_at_140[0x140];
 };
 
 struct mlx5_ifc_ppll_reg_bits {
 	u8         num_pll_groups[0x8];
 	u8         pll_group[0x8];
 	u8         reserved_0[0x4];
 	u8         num_plls[0x4];
 	u8         reserved_1[0x8];
 
 	u8         reserved_2[0x1f];
 	u8         ae[0x1];
 
 	u8         pll_status[4][0x40];
 };
 
 struct mlx5_ifc_ppad_reg_bits {
 	u8         reserved_0[0x3];
 	u8         single_mac[0x1];
 	u8         reserved_1[0x4];
 	u8         local_port[0x8];
 	u8         mac_47_32[0x10];
 
 	u8         mac_31_0[0x20];
 
 	u8         reserved_2[0x40];
 };
 
 struct mlx5_ifc_pmtu_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         max_mtu[0x10];
 	u8         reserved_2[0x10];
 
 	u8         admin_mtu[0x10];
 	u8         reserved_3[0x10];
 
 	u8         oper_mtu[0x10];
 	u8         reserved_4[0x10];
 };
 
 struct mlx5_ifc_pmpr_reg_bits {
 	u8         reserved_0[0x8];
 	u8         module[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x18];
 	u8         attenuation_5g[0x8];
 
 	u8         reserved_3[0x18];
 	u8         attenuation_7g[0x8];
 
 	u8         reserved_4[0x18];
 	u8         attenuation_12g[0x8];
 };
 
 struct mlx5_ifc_pmpe_reg_bits {
 	u8         reserved_0[0x8];
 	u8         module[0x8];
 	u8         reserved_1[0xc];
 	u8         module_status[0x4];
 
 	u8         reserved_2[0x14];
 	u8         error_type[0x4];
 	u8         reserved_3[0x8];
 
 	u8         reserved_4[0x40];
 };
 
 struct mlx5_ifc_pmpc_reg_bits {
 	u8         module_state_updated[32][0x8];
 };
 
 struct mlx5_ifc_pmlpn_reg_bits {
 	u8         reserved_0[0x4];
 	u8         mlpn_status[0x4];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         e[0x1];
 	u8         reserved_2[0x1f];
 };
 
 struct mlx5_ifc_pmlp_reg_bits {
 	u8         rxtx[0x1];
 	u8         reserved_0[0x7];
 	u8         local_port[0x8];
 	u8         reserved_1[0x8];
 	u8         width[0x8];
 
 	u8         lane0_module_mapping[0x20];
 
 	u8         lane1_module_mapping[0x20];
 
 	u8         lane2_module_mapping[0x20];
 
 	u8         lane3_module_mapping[0x20];
 
 	u8         reserved_2[0x160];
 };
 
 struct mlx5_ifc_pmaos_reg_bits {
 	u8         reserved_0[0x8];
 	u8         module[0x8];
 	u8         reserved_1[0x4];
 	u8         admin_status[0x4];
 	u8         reserved_2[0x4];
 	u8         oper_status[0x4];
 
 	u8         ase[0x1];
 	u8         ee[0x1];
 	u8         reserved_3[0x12];
 	u8         error_type[0x4];
 	u8         reserved_4[0x6];
 	u8         e[0x2];
 
 	u8         reserved_5[0x40];
 };
 
 struct mlx5_ifc_plpc_reg_bits {
 	u8         reserved_0[0x4];
 	u8         profile_id[0xc];
 	u8         reserved_1[0x4];
 	u8         proto_mask[0x4];
 	u8         reserved_2[0x8];
 
 	u8         reserved_3[0x10];
 	u8         lane_speed[0x10];
 
 	u8         reserved_4[0x17];
 	u8         lpbf[0x1];
 	u8         fec_mode_policy[0x8];
 
 	u8         retransmission_capability[0x8];
 	u8         fec_mode_capability[0x18];
 
 	u8         retransmission_support_admin[0x8];
 	u8         fec_mode_support_admin[0x18];
 
 	u8         retransmission_request_admin[0x8];
 	u8         fec_mode_request_admin[0x18];
 
 	u8         reserved_5[0x80];
 };
 
 struct mlx5_ifc_pll_status_data_bits {
 	u8         reserved_0[0x1];
 	u8         lock_cal[0x1];
 	u8         lock_status[0x2];
 	u8         reserved_1[0x2];
 	u8         algo_f_ctrl[0xa];
 	u8         analog_algo_num_var[0x6];
 	u8         f_ctrl_measure[0xa];
 
 	u8         reserved_2[0x2];
 	u8         analog_var[0x6];
 	u8         reserved_3[0x2];
 	u8         high_var[0x6];
 	u8         reserved_4[0x2];
 	u8         low_var[0x6];
 	u8         reserved_5[0x2];
 	u8         mid_val[0x6];
 };
 
 struct mlx5_ifc_plib_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x8];
 	u8         ib_port[0x8];
 
 	u8         reserved_2[0x60];
 };
 
 struct mlx5_ifc_plbf_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0xd];
 	u8         lbf_mode[0x3];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_pipg_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         dic[0x1];
 	u8         reserved_2[0x19];
 	u8         ipg[0x4];
 	u8         reserved_3[0x2];
 };
 
 struct mlx5_ifc_pifr_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0xe0];
 
 	u8         port_filter[8][0x20];
 
 	u8         port_filter_update_en[8][0x20];
 };
 
 struct mlx5_ifc_phys_layer_cntrs_bits {
 	u8         time_since_last_clear_high[0x20];
 
 	u8         time_since_last_clear_low[0x20];
 
 	u8         symbol_errors_high[0x20];
 
 	u8         symbol_errors_low[0x20];
 
 	u8         sync_headers_errors_high[0x20];
 
 	u8         sync_headers_errors_low[0x20];
 
 	u8         edpl_bip_errors_lane0_high[0x20];
 
 	u8         edpl_bip_errors_lane0_low[0x20];
 
 	u8         edpl_bip_errors_lane1_high[0x20];
 
 	u8         edpl_bip_errors_lane1_low[0x20];
 
 	u8         edpl_bip_errors_lane2_high[0x20];
 
 	u8         edpl_bip_errors_lane2_low[0x20];
 
 	u8         edpl_bip_errors_lane3_high[0x20];
 
 	u8         edpl_bip_errors_lane3_low[0x20];
 
 	u8         fc_fec_corrected_blocks_lane0_high[0x20];
 
 	u8         fc_fec_corrected_blocks_lane0_low[0x20];
 
 	u8         fc_fec_corrected_blocks_lane1_high[0x20];
 
 	u8         fc_fec_corrected_blocks_lane1_low[0x20];
 
 	u8         fc_fec_corrected_blocks_lane2_high[0x20];
 
 	u8         fc_fec_corrected_blocks_lane2_low[0x20];
 
 	u8         fc_fec_corrected_blocks_lane3_high[0x20];
 
 	u8         fc_fec_corrected_blocks_lane3_low[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane0_high[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane0_low[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane1_high[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane1_low[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane2_high[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane2_low[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane3_high[0x20];
 
 	u8         fc_fec_uncorrectable_blocks_lane3_low[0x20];
 
 	u8         rs_fec_corrected_blocks_high[0x20];
 
 	u8         rs_fec_corrected_blocks_low[0x20];
 
 	u8         rs_fec_uncorrectable_blocks_high[0x20];
 
 	u8         rs_fec_uncorrectable_blocks_low[0x20];
 
 	u8         rs_fec_no_errors_blocks_high[0x20];
 
 	u8         rs_fec_no_errors_blocks_low[0x20];
 
 	u8         rs_fec_single_error_blocks_high[0x20];
 
 	u8         rs_fec_single_error_blocks_low[0x20];
 
 	u8         rs_fec_corrected_symbols_total_high[0x20];
 
 	u8         rs_fec_corrected_symbols_total_low[0x20];
 
 	u8         rs_fec_corrected_symbols_lane0_high[0x20];
 
 	u8         rs_fec_corrected_symbols_lane0_low[0x20];
 
 	u8         rs_fec_corrected_symbols_lane1_high[0x20];
 
 	u8         rs_fec_corrected_symbols_lane1_low[0x20];
 
 	u8         rs_fec_corrected_symbols_lane2_high[0x20];
 
 	u8         rs_fec_corrected_symbols_lane2_low[0x20];
 
 	u8         rs_fec_corrected_symbols_lane3_high[0x20];
 
 	u8         rs_fec_corrected_symbols_lane3_low[0x20];
 
 	u8         link_down_events[0x20];
 
 	u8         successful_recovery_events[0x20];
 
 	u8         reserved_0[0x180];
 };
 
 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
 	u8	   symbol_error_counter[0x10];
 
 	u8         link_error_recovery_counter[0x8];
 
 	u8         link_downed_counter[0x8];
 
 	u8         port_rcv_errors[0x10];
 
 	u8         port_rcv_remote_physical_errors[0x10];
 
 	u8         port_rcv_switch_relay_errors[0x10];
 
 	u8         port_xmit_discards[0x10];
 
 	u8         port_xmit_constraint_errors[0x8];
 
 	u8         port_rcv_constraint_errors[0x8];
 
 	u8         reserved_at_70[0x8];
 
 	u8         link_overrun_errors[0x8];
 
 	u8	   reserved_at_80[0x10];
 
 	u8         vl_15_dropped[0x10];
 
 	u8	   reserved_at_a0[0xa0];
 };
 
 struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
 	u8         time_since_last_clear_high[0x20];
 
 	u8         time_since_last_clear_low[0x20];
 
 	u8         phy_received_bits_high[0x20];
 
 	u8         phy_received_bits_low[0x20];
 
 	u8         phy_symbol_errors_high[0x20];
 
 	u8         phy_symbol_errors_low[0x20];
 
 	u8         phy_corrected_bits_high[0x20];
 
 	u8         phy_corrected_bits_low[0x20];
 
 	u8         phy_corrected_bits_lane0_high[0x20];
 
 	u8         phy_corrected_bits_lane0_low[0x20];
 
 	u8         phy_corrected_bits_lane1_high[0x20];
 
 	u8         phy_corrected_bits_lane1_low[0x20];
 
 	u8         phy_corrected_bits_lane2_high[0x20];
 
 	u8         phy_corrected_bits_lane2_low[0x20];
 
 	u8         phy_corrected_bits_lane3_high[0x20];
 
 	u8         phy_corrected_bits_lane3_low[0x20];
 
 	u8         reserved_at_200[0x5c0];
 };
 
 struct mlx5_ifc_infiniband_port_cntrs_bits {
 	u8         symbol_error_counter[0x10];
 	u8         link_error_recovery_counter[0x8];
 	u8         link_downed_counter[0x8];
 
 	u8         port_rcv_errors[0x10];
 	u8         port_rcv_remote_physical_errors[0x10];
 
 	u8         port_rcv_switch_relay_errors[0x10];
 	u8         port_xmit_discards[0x10];
 
 	u8         port_xmit_constraint_errors[0x8];
 	u8         port_rcv_constraint_errors[0x8];
 	u8         reserved_0[0x8];
 	u8         local_link_integrity_errors[0x4];
 	u8         excessive_buffer_overrun_errors[0x4];
 
 	u8         reserved_1[0x10];
 	u8         vl_15_dropped[0x10];
 
 	u8         port_xmit_data[0x20];
 
 	u8         port_rcv_data[0x20];
 
 	u8         port_xmit_pkts[0x20];
 
 	u8         port_rcv_pkts[0x20];
 
 	u8         port_xmit_wait[0x20];
 
 	u8         reserved_2[0x680];
 };
 
 struct mlx5_ifc_phrr_reg_bits {
 	u8         clr[0x1];
 	u8         reserved_0[0x7];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         hist_group[0x8];
 	u8         reserved_2[0x10];
 	u8         hist_id[0x8];
 
 	u8         reserved_3[0x40];
 
 	u8         time_since_last_clear_high[0x20];
 
 	u8         time_since_last_clear_low[0x20];
 
 	u8         bin[10][0x20];
 };
 
 struct mlx5_ifc_phbr_for_prio_reg_bits {
 	u8         reserved_0[0x18];
 	u8         prio[0x8];
 };
 
 struct mlx5_ifc_phbr_for_port_tclass_reg_bits {
 	u8         reserved_0[0x18];
 	u8         tclass[0x8];
 };
 
 struct mlx5_ifc_phbr_binding_reg_bits {
 	u8         opcode[0x4];
 	u8         reserved_0[0x4];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_1[0xe];
 
 	u8         hist_group[0x8];
 	u8         reserved_2[0x10];
 	u8         hist_id[0x8];
 
 	u8         reserved_3[0x10];
 	u8         hist_type[0x10];
 
 	u8         hist_parameters[0x20];
 
 	u8         hist_min_value[0x20];
 
 	u8         hist_max_value[0x20];
 
 	u8         sample_time[0x20];
 };
 
 enum {
 	MLX5_PFCC_REG_PPAN_DISABLED  = 0x0,
 	MLX5_PFCC_REG_PPAN_ENABLED   = 0x1,
 };
 
 struct mlx5_ifc_pfcc_reg_bits {
 	u8         dcbx_operation_type[0x2];
 	u8         cap_local_admin[0x1];
 	u8         cap_remote_admin[0x1];
 	u8         reserved_0[0x4];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_1[0xc];
 	u8         shl_cap[0x1];
 	u8         shl_opr[0x1];
 
 	u8         ppan[0x4];
 	u8         reserved_2[0x4];
 	u8         prio_mask_tx[0x8];
 	u8         reserved_3[0x8];
 	u8         prio_mask_rx[0x8];
 
 	u8         pptx[0x1];
 	u8         aptx[0x1];
 	u8         reserved_4[0x6];
 	u8         pfctx[0x8];
 	u8         reserved_5[0x8];
 	u8         cbftx[0x8];
 
 	u8         pprx[0x1];
 	u8         aprx[0x1];
 	u8         reserved_6[0x6];
 	u8         pfcrx[0x8];
 	u8         reserved_7[0x8];
 	u8         cbfrx[0x8];
 
 	u8         device_stall_minor_watermark[0x10];
 	u8         device_stall_critical_watermark[0x10];
 
 	u8         reserved_8[0x60];
 };
 
 struct mlx5_ifc_pelc_reg_bits {
 	u8         op[0x4];
 	u8         reserved_0[0x4];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         op_admin[0x8];
 	u8         op_capability[0x8];
 	u8         op_request[0x8];
 	u8         op_active[0x8];
 
 	u8         admin[0x40];
 
 	u8         capability[0x40];
 
 	u8         request[0x40];
 
 	u8         active[0x40];
 
 	u8         reserved_2[0x80];
 };
 
 struct mlx5_ifc_peir_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0xc];
 	u8         error_count[0x4];
 	u8         reserved_3[0x10];
 
 	u8         reserved_4[0xc];
 	u8         lane[0x4];
 	u8         reserved_5[0x8];
 	u8         error_type[0x8];
 };
 
 struct mlx5_ifc_qcam_access_reg_cap_mask {
 	u8         qcam_access_reg_cap_mask_127_to_20[0x6C];
 	u8         qpdpm[0x1];
 	u8         qcam_access_reg_cap_mask_18_to_4[0x0F];
 	u8         qdpm[0x1];
 	u8         qpts[0x1];
 	u8         qcap[0x1];
 	u8         qcam_access_reg_cap_mask_0[0x1];
 };
 
 struct mlx5_ifc_qcam_qos_feature_cap_mask {
 	u8         qcam_qos_feature_cap_mask_127_to_1[0x7F];
 	u8         qpts_trust_both[0x1];
 };
 
 struct mlx5_ifc_qcam_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         feature_group[0x8];
 	u8         reserved_at_10[0x8];
 	u8         access_reg_group[0x8];
 	u8         reserved_at_20[0x20];
 
 	union {
 		struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
 		u8  reserved_at_0[0x80];
 	} qos_access_reg_cap_mask;
 
 	u8         reserved_at_c0[0x80];
 
 	union {
 		struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
 		u8  reserved_at_0[0x80];
 	} qos_feature_cap_mask;
 
 	u8         reserved_at_1c0[0x80];
 };
 
 struct mlx5_ifc_pcam_enhanced_features_bits {
 	u8         reserved_at_0[0x6d];
 	u8         rx_icrc_encapsulated_counter[0x1];
 	u8	   reserved_at_6e[0x4];
 	u8         ptys_extended_ethernet[0x1];
 	u8	   reserved_at_73[0x3];
 	u8         pfcc_mask[0x1];
 	u8         reserved_at_77[0x3];
 	u8         per_lane_error_counters[0x1];
 	u8         rx_buffer_fullness_counters[0x1];
 	u8         ptys_connector_type[0x1];
 	u8         reserved_at_7d[0x1];
 	u8         ppcnt_discard_group[0x1];
 	u8         ppcnt_statistical_group[0x1];
 };
 
 struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
 	u8         port_access_reg_cap_mask_127_to_96[0x20];
 	u8         port_access_reg_cap_mask_95_to_64[0x20];
 
 	u8         reserved_at_40[0xe];
 	u8         pddr[0x1];
 	u8         reserved_at_4f[0xd];
 
 	u8         pplm[0x1];
 	u8         port_access_reg_cap_mask_34_to_32[0x3];
 
 	u8         port_access_reg_cap_mask_31_to_13[0x13];
 	u8         pbmc[0x1];
 	u8         pptb[0x1];
 	u8         port_access_reg_cap_mask_10_to_09[0x2];
 	u8         ppcnt[0x1];
 	u8         port_access_reg_cap_mask_07_to_00[0x8];
 };
 
 struct mlx5_ifc_pcam_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         feature_group[0x8];
 	u8         reserved_at_10[0x8];
 	u8         access_reg_group[0x8];
 
 	u8         reserved_at_20[0x20];
 
 	union {
 		struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
 		u8         reserved_at_0[0x80];
 	} port_access_reg_cap_mask;
 
 	u8         reserved_at_c0[0x80];
 
 	union {
 		struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
 		u8         reserved_at_0[0x80];
 	} feature_cap_mask;
 
 	u8         reserved_at_1c0[0xc0];
 };
 
 struct mlx5_ifc_mcam_enhanced_features_bits {
 	u8         reserved_at_0[0x6e];
 	u8         pcie_status_and_power[0x1];
 	u8         reserved_at_111[0x10];
 	u8         pcie_performance_group[0x1];
 };
 
 struct mlx5_ifc_mcam_access_reg_bits {
 	u8         reserved_at_0[0x1c];
 	u8         mcda[0x1];
 	u8         mcc[0x1];
 	u8         mcqi[0x1];
 	u8         reserved_at_1f[0x1];
 
 	u8         regs_95_to_64[0x20];
 	u8         regs_63_to_32[0x20];
 	u8         regs_31_to_0[0x20];
 };
 
 struct mlx5_ifc_mcam_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         feature_group[0x8];
 	u8         reserved_at_10[0x8];
 	u8         access_reg_group[0x8];
 
 	u8         reserved_at_20[0x20];
 
 	union {
 		struct mlx5_ifc_mcam_access_reg_bits access_regs;
 		u8         reserved_at_0[0x80];
 	} mng_access_reg_cap_mask;
 
 	u8         reserved_at_c0[0x80];
 
 	union {
 		struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
 		u8         reserved_at_0[0x80];
 	} mng_feature_cap_mask;
 
 	u8         reserved_at_1c0[0x80];
 };
 
 struct mlx5_ifc_pcap_reg_bits {
 	u8         reserved_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_1[0x10];
 
 	u8         port_capability_mask[4][0x20];
 };
 
 struct mlx5_ifc_pbmc_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_at_10[0x10];
 
 	u8         xoff_timer_value[0x10];
 	u8         xoff_refresh[0x10];
 
 	u8         reserved_at_40[0x9];
 	u8         fullness_threshold[0x7];
 	u8         port_buffer_size[0x10];
 
 	struct mlx5_ifc_bufferx_reg_bits buffer[10];
 
 	u8         reserved_at_2e0[0x80];
 };
 
 struct mlx5_ifc_paos_reg_bits {
 	u8         swid[0x8];
 	u8         local_port[0x8];
 	u8         reserved_0[0x4];
 	u8         admin_status[0x4];
 	u8         reserved_1[0x4];
 	u8         oper_status[0x4];
 
 	u8         ase[0x1];
 	u8         ee[0x1];
 	u8         reserved_2[0x1c];
 	u8         e[0x2];
 
 	u8         reserved_3[0x40];
 };
 
 struct mlx5_ifc_pamp_reg_bits {
 	u8         reserved_0[0x8];
 	u8         opamp_group[0x8];
 	u8         reserved_1[0xc];
 	u8         opamp_group_type[0x4];
 
 	u8         start_index[0x10];
 	u8         reserved_2[0x4];
 	u8         num_of_indices[0xc];
 
 	u8         index_data[18][0x10];
 };
 
 struct mlx5_ifc_link_level_retrans_cntr_grp_date_bits {
 	u8         llr_rx_cells_high[0x20];
 
 	u8         llr_rx_cells_low[0x20];
 
 	u8         llr_rx_error_high[0x20];
 
 	u8         llr_rx_error_low[0x20];
 
 	u8         llr_rx_crc_error_high[0x20];
 
 	u8         llr_rx_crc_error_low[0x20];
 
 	u8         llr_tx_cells_high[0x20];
 
 	u8         llr_tx_cells_low[0x20];
 
 	u8         llr_tx_ret_cells_high[0x20];
 
 	u8         llr_tx_ret_cells_low[0x20];
 
 	u8         llr_tx_ret_events_high[0x20];
 
 	u8         llr_tx_ret_events_low[0x20];
 
 	u8         reserved_0[0x640];
 };
 
 struct mlx5_ifc_mtmp_reg_bits {
 	u8         i[0x1];
 	u8         reserved_at_1[0x18];
 	u8         sensor_index[0x7];
 
 	u8         reserved_at_20[0x10];
 	u8         temperature[0x10];
 
 	u8         mte[0x1];
 	u8         mtr[0x1];
 	u8         reserved_at_42[0x0e];
 	u8         max_temperature[0x10];
 
 	u8         tee[0x2];
 	u8         reserved_at_62[0x0e];
 	u8         temperature_threshold_hi[0x10];
 
 	u8         reserved_at_80[0x10];
 	u8         temperature_threshold_lo[0x10];
 
 	u8         reserved_at_100[0x20];
 
 	u8         sensor_name[0x40];
 };
 
 struct mlx5_ifc_lane_2_module_mapping_bits {
 	u8         reserved_0[0x6];
 	u8         rx_lane[0x2];
 	u8         reserved_1[0x6];
 	u8         tx_lane[0x2];
 	u8         reserved_2[0x8];
 	u8         module[0x8];
 };
 
 struct mlx5_ifc_eth_per_traffic_class_layout_bits {
 	u8         transmit_queue_high[0x20];
 
 	u8         transmit_queue_low[0x20];
 
 	u8         reserved_0[0x780];
 };
 
 struct mlx5_ifc_eth_per_traffic_class_cong_layout_bits {
 	u8         no_buffer_discard_uc_high[0x20];
 
 	u8         no_buffer_discard_uc_low[0x20];
 
 	u8         wred_discard_high[0x20];
 
 	u8         wred_discard_low[0x20];
 
 	u8         reserved_0[0x740];
 };
 
 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
 	u8         rx_octets_high[0x20];
 
 	u8         rx_octets_low[0x20];
 
 	u8         reserved_0[0xc0];
 
 	u8         rx_frames_high[0x20];
 
 	u8         rx_frames_low[0x20];
 
 	u8         tx_octets_high[0x20];
 
 	u8         tx_octets_low[0x20];
 
 	u8         reserved_1[0xc0];
 
 	u8         tx_frames_high[0x20];
 
 	u8         tx_frames_low[0x20];
 
 	u8         rx_pause_high[0x20];
 
 	u8         rx_pause_low[0x20];
 
 	u8         rx_pause_duration_high[0x20];
 
 	u8         rx_pause_duration_low[0x20];
 
 	u8         tx_pause_high[0x20];
 
 	u8         tx_pause_low[0x20];
 
 	u8         tx_pause_duration_high[0x20];
 
 	u8         tx_pause_duration_low[0x20];
 
 	u8         rx_pause_transition_high[0x20];
 
 	u8         rx_pause_transition_low[0x20];
 
 	u8         rx_discards_high[0x20];
 
 	u8         rx_discards_low[0x20];
 
 	u8         device_stall_minor_watermark_cnt_high[0x20];
 
 	u8         device_stall_minor_watermark_cnt_low[0x20];
 
 	u8         device_stall_critical_watermark_cnt_high[0x20];
 
 	u8         device_stall_critical_watermark_cnt_low[0x20];
 
 	u8         reserved_2[0x340];
 };
 
 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
 	u8         port_transmit_wait_high[0x20];
 
 	u8         port_transmit_wait_low[0x20];
 
 	u8         ecn_marked_high[0x20];
 
 	u8         ecn_marked_low[0x20];
 
 	u8         no_buffer_discard_mc_high[0x20];
 
 	u8         no_buffer_discard_mc_low[0x20];
 
 	u8         rx_ebp_high[0x20];
 
 	u8         rx_ebp_low[0x20];
 
 	u8         tx_ebp_high[0x20];
 
 	u8         tx_ebp_low[0x20];
 
         u8         rx_buffer_almost_full_high[0x20];
 
         u8         rx_buffer_almost_full_low[0x20];
 
         u8         rx_buffer_full_high[0x20];
 
         u8         rx_buffer_full_low[0x20];
 
         u8         rx_icrc_encapsulated_high[0x20];
 
         u8         rx_icrc_encapsulated_low[0x20];
 
 	u8         reserved_0[0x80];
 
         u8         tx_stats_pkts64octets_high[0x20];
 
         u8         tx_stats_pkts64octets_low[0x20];
 
         u8         tx_stats_pkts65to127octets_high[0x20];
 
         u8         tx_stats_pkts65to127octets_low[0x20];
 
         u8         tx_stats_pkts128to255octets_high[0x20];
 
         u8         tx_stats_pkts128to255octets_low[0x20];
 
         u8         tx_stats_pkts256to511octets_high[0x20];
 
         u8         tx_stats_pkts256to511octets_low[0x20];
 
         u8         tx_stats_pkts512to1023octets_high[0x20];
 
         u8         tx_stats_pkts512to1023octets_low[0x20];
 
         u8         tx_stats_pkts1024to1518octets_high[0x20];
 
         u8         tx_stats_pkts1024to1518octets_low[0x20];
 
         u8         tx_stats_pkts1519to2047octets_high[0x20];
 
         u8         tx_stats_pkts1519to2047octets_low[0x20];
 
         u8         tx_stats_pkts2048to4095octets_high[0x20];
 
         u8         tx_stats_pkts2048to4095octets_low[0x20];
 
         u8         tx_stats_pkts4096to8191octets_high[0x20];
 
         u8         tx_stats_pkts4096to8191octets_low[0x20];
 
         u8         tx_stats_pkts8192to10239octets_high[0x20];
 
         u8         tx_stats_pkts8192to10239octets_low[0x20];
 
 	u8         reserved_1[0x2C0];
 };
 
 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
 	u8         a_frames_transmitted_ok_high[0x20];
 
 	u8         a_frames_transmitted_ok_low[0x20];
 
 	u8         a_frames_received_ok_high[0x20];
 
 	u8         a_frames_received_ok_low[0x20];
 
 	u8         a_frame_check_sequence_errors_high[0x20];
 
 	u8         a_frame_check_sequence_errors_low[0x20];
 
 	u8         a_alignment_errors_high[0x20];
 
 	u8         a_alignment_errors_low[0x20];
 
 	u8         a_octets_transmitted_ok_high[0x20];
 
 	u8         a_octets_transmitted_ok_low[0x20];
 
 	u8         a_octets_received_ok_high[0x20];
 
 	u8         a_octets_received_ok_low[0x20];
 
 	u8         a_multicast_frames_xmitted_ok_high[0x20];
 
 	u8         a_multicast_frames_xmitted_ok_low[0x20];
 
 	u8         a_broadcast_frames_xmitted_ok_high[0x20];
 
 	u8         a_broadcast_frames_xmitted_ok_low[0x20];
 
 	u8         a_multicast_frames_received_ok_high[0x20];
 
 	u8         a_multicast_frames_received_ok_low[0x20];
 
 	u8         a_broadcast_frames_recieved_ok_high[0x20];
 
 	u8         a_broadcast_frames_recieved_ok_low[0x20];
 
 	u8         a_in_range_length_errors_high[0x20];
 
 	u8         a_in_range_length_errors_low[0x20];
 
 	u8         a_out_of_range_length_field_high[0x20];
 
 	u8         a_out_of_range_length_field_low[0x20];
 
 	u8         a_frame_too_long_errors_high[0x20];
 
 	u8         a_frame_too_long_errors_low[0x20];
 
 	u8         a_symbol_error_during_carrier_high[0x20];
 
 	u8         a_symbol_error_during_carrier_low[0x20];
 
 	u8         a_mac_control_frames_transmitted_high[0x20];
 
 	u8         a_mac_control_frames_transmitted_low[0x20];
 
 	u8         a_mac_control_frames_received_high[0x20];
 
 	u8         a_mac_control_frames_received_low[0x20];
 
 	u8         a_unsupported_opcodes_received_high[0x20];
 
 	u8         a_unsupported_opcodes_received_low[0x20];
 
 	u8         a_pause_mac_ctrl_frames_received_high[0x20];
 
 	u8         a_pause_mac_ctrl_frames_received_low[0x20];
 
 	u8         a_pause_mac_ctrl_frames_transmitted_high[0x20];
 
 	u8         a_pause_mac_ctrl_frames_transmitted_low[0x20];
 
 	u8         reserved_0[0x300];
 };
 
 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
 	u8         dot3stats_alignment_errors_high[0x20];
 
 	u8         dot3stats_alignment_errors_low[0x20];
 
 	u8         dot3stats_fcs_errors_high[0x20];
 
 	u8         dot3stats_fcs_errors_low[0x20];
 
 	u8         dot3stats_single_collision_frames_high[0x20];
 
 	u8         dot3stats_single_collision_frames_low[0x20];
 
 	u8         dot3stats_multiple_collision_frames_high[0x20];
 
 	u8         dot3stats_multiple_collision_frames_low[0x20];
 
 	u8         dot3stats_sqe_test_errors_high[0x20];
 
 	u8         dot3stats_sqe_test_errors_low[0x20];
 
 	u8         dot3stats_deferred_transmissions_high[0x20];
 
 	u8         dot3stats_deferred_transmissions_low[0x20];
 
 	u8         dot3stats_late_collisions_high[0x20];
 
 	u8         dot3stats_late_collisions_low[0x20];
 
 	u8         dot3stats_excessive_collisions_high[0x20];
 
 	u8         dot3stats_excessive_collisions_low[0x20];
 
 	u8         dot3stats_internal_mac_transmit_errors_high[0x20];
 
 	u8         dot3stats_internal_mac_transmit_errors_low[0x20];
 
 	u8         dot3stats_carrier_sense_errors_high[0x20];
 
 	u8         dot3stats_carrier_sense_errors_low[0x20];
 
 	u8         dot3stats_frame_too_longs_high[0x20];
 
 	u8         dot3stats_frame_too_longs_low[0x20];
 
 	u8         dot3stats_internal_mac_receive_errors_high[0x20];
 
 	u8         dot3stats_internal_mac_receive_errors_low[0x20];
 
 	u8         dot3stats_symbol_errors_high[0x20];
 
 	u8         dot3stats_symbol_errors_low[0x20];
 
 	u8         dot3control_in_unknown_opcodes_high[0x20];
 
 	u8         dot3control_in_unknown_opcodes_low[0x20];
 
 	u8         dot3in_pause_frames_high[0x20];
 
 	u8         dot3in_pause_frames_low[0x20];
 
 	u8         dot3out_pause_frames_high[0x20];
 
 	u8         dot3out_pause_frames_low[0x20];
 
 	u8         reserved_0[0x3c0];
 };
 
 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
 	u8         if_in_octets_high[0x20];
 
 	u8         if_in_octets_low[0x20];
 
 	u8         if_in_ucast_pkts_high[0x20];
 
 	u8         if_in_ucast_pkts_low[0x20];
 
 	u8         if_in_discards_high[0x20];
 
 	u8         if_in_discards_low[0x20];
 
 	u8         if_in_errors_high[0x20];
 
 	u8         if_in_errors_low[0x20];
 
 	u8         if_in_unknown_protos_high[0x20];
 
 	u8         if_in_unknown_protos_low[0x20];
 
 	u8         if_out_octets_high[0x20];
 
 	u8         if_out_octets_low[0x20];
 
 	u8         if_out_ucast_pkts_high[0x20];
 
 	u8         if_out_ucast_pkts_low[0x20];
 
 	u8         if_out_discards_high[0x20];
 
 	u8         if_out_discards_low[0x20];
 
 	u8         if_out_errors_high[0x20];
 
 	u8         if_out_errors_low[0x20];
 
 	u8         if_in_multicast_pkts_high[0x20];
 
 	u8         if_in_multicast_pkts_low[0x20];
 
 	u8         if_in_broadcast_pkts_high[0x20];
 
 	u8         if_in_broadcast_pkts_low[0x20];
 
 	u8         if_out_multicast_pkts_high[0x20];
 
 	u8         if_out_multicast_pkts_low[0x20];
 
 	u8         if_out_broadcast_pkts_high[0x20];
 
 	u8         if_out_broadcast_pkts_low[0x20];
 
 	u8         reserved_0[0x480];
 };
 
 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
 	u8         ether_stats_drop_events_high[0x20];
 
 	u8         ether_stats_drop_events_low[0x20];
 
 	u8         ether_stats_octets_high[0x20];
 
 	u8         ether_stats_octets_low[0x20];
 
 	u8         ether_stats_pkts_high[0x20];
 
 	u8         ether_stats_pkts_low[0x20];
 
 	u8         ether_stats_broadcast_pkts_high[0x20];
 
 	u8         ether_stats_broadcast_pkts_low[0x20];
 
 	u8         ether_stats_multicast_pkts_high[0x20];
 
 	u8         ether_stats_multicast_pkts_low[0x20];
 
 	u8         ether_stats_crc_align_errors_high[0x20];
 
 	u8         ether_stats_crc_align_errors_low[0x20];
 
 	u8         ether_stats_undersize_pkts_high[0x20];
 
 	u8         ether_stats_undersize_pkts_low[0x20];
 
 	u8         ether_stats_oversize_pkts_high[0x20];
 
 	u8         ether_stats_oversize_pkts_low[0x20];
 
 	u8         ether_stats_fragments_high[0x20];
 
 	u8         ether_stats_fragments_low[0x20];
 
 	u8         ether_stats_jabbers_high[0x20];
 
 	u8         ether_stats_jabbers_low[0x20];
 
 	u8         ether_stats_collisions_high[0x20];
 
 	u8         ether_stats_collisions_low[0x20];
 
 	u8         ether_stats_pkts64octets_high[0x20];
 
 	u8         ether_stats_pkts64octets_low[0x20];
 
 	u8         ether_stats_pkts65to127octets_high[0x20];
 
 	u8         ether_stats_pkts65to127octets_low[0x20];
 
 	u8         ether_stats_pkts128to255octets_high[0x20];
 
 	u8         ether_stats_pkts128to255octets_low[0x20];
 
 	u8         ether_stats_pkts256to511octets_high[0x20];
 
 	u8         ether_stats_pkts256to511octets_low[0x20];
 
 	u8         ether_stats_pkts512to1023octets_high[0x20];
 
 	u8         ether_stats_pkts512to1023octets_low[0x20];
 
 	u8         ether_stats_pkts1024to1518octets_high[0x20];
 
 	u8         ether_stats_pkts1024to1518octets_low[0x20];
 
 	u8         ether_stats_pkts1519to2047octets_high[0x20];
 
 	u8         ether_stats_pkts1519to2047octets_low[0x20];
 
 	u8         ether_stats_pkts2048to4095octets_high[0x20];
 
 	u8         ether_stats_pkts2048to4095octets_low[0x20];
 
 	u8         ether_stats_pkts4096to8191octets_high[0x20];
 
 	u8         ether_stats_pkts4096to8191octets_low[0x20];
 
 	u8         ether_stats_pkts8192to10239octets_high[0x20];
 
 	u8         ether_stats_pkts8192to10239octets_low[0x20];
 
 	u8         reserved_0[0x280];
 };
 
 struct mlx5_ifc_ib_portcntrs_attribute_grp_data_bits {
 	u8         symbol_error_counter[0x10];
 	u8         link_error_recovery_counter[0x8];
 	u8         link_downed_counter[0x8];
 
 	u8         port_rcv_errors[0x10];
 	u8         port_rcv_remote_physical_errors[0x10];
 
 	u8         port_rcv_switch_relay_errors[0x10];
 	u8         port_xmit_discards[0x10];
 
 	u8         port_xmit_constraint_errors[0x8];
 	u8         port_rcv_constraint_errors[0x8];
 	u8         reserved_0[0x8];
 	u8         local_link_integrity_errors[0x4];
 	u8         excessive_buffer_overrun_errors[0x4];
 
 	u8         reserved_1[0x10];
 	u8         vl_15_dropped[0x10];
 
 	u8         port_xmit_data[0x20];
 
 	u8         port_rcv_data[0x20];
 
 	u8         port_xmit_pkts[0x20];
 
 	u8         port_rcv_pkts[0x20];
 
 	u8         port_xmit_wait[0x20];
 
 	u8         reserved_2[0x680];
 };
 
 struct mlx5_ifc_trc_tlb_reg_bits {
 	u8         reserved_0[0x80];
 
 	u8         tlb_addr[0][0x40];
 };
 
 struct mlx5_ifc_trc_read_fifo_reg_bits {
 	u8         reserved_0[0x10];
 	u8         requested_event_num[0x10];
 
 	u8         reserved_1[0x20];
 
 	u8         reserved_2[0x10];
 	u8         acual_event_num[0x10];
 
 	u8         reserved_3[0x20];
 
 	u8         event[0][0x40];
 };
 
 struct mlx5_ifc_trc_lock_reg_bits {
 	u8         reserved_0[0x1f];
 	u8         lock[0x1];
 
 	u8         reserved_1[0x60];
 };
 
 struct mlx5_ifc_trc_filter_reg_bits {
 	u8         status[0x1];
 	u8         reserved_0[0xf];
 	u8         filter_index[0x10];
 
 	u8         reserved_1[0x20];
 
 	u8         filter_val[0x20];
 
 	u8         reserved_2[0x1a0];
 };
 
 struct mlx5_ifc_trc_event_reg_bits {
 	u8         status[0x1];
 	u8         reserved_0[0xf];
 	u8         event_index[0x10];
 
 	u8         reserved_1[0x20];
 
 	u8         event_id[0x20];
 
 	u8         event_selector_val[0x10];
 	u8         event_selector_size[0x10];
 
 	u8         reserved_2[0x180];
 };
 
 struct mlx5_ifc_trc_conf_reg_bits {
 	u8         limit_en[0x1];
 	u8         reserved_0[0x3];
 	u8         dump_mode[0x4];
 	u8         reserved_1[0x15];
 	u8         state[0x3];
 
 	u8         reserved_2[0x20];
 
 	u8         limit_event_index[0x20];
 
 	u8         mkey[0x20];
 
 	u8         fifo_ready_ev_num[0x20];
 
 	u8         reserved_3[0x160];
 };
 
 struct mlx5_ifc_trc_cap_reg_bits {
 	u8         reserved_0[0x18];
 	u8         dump_mode[0x8];
 
 	u8         reserved_1[0x20];
 
 	u8         num_of_events[0x10];
 	u8         num_of_filters[0x10];
 
 	u8         fifo_size[0x20];
 
 	u8         tlb_size[0x10];
 	u8         event_size[0x10];
 
 	u8         reserved_2[0x160];
 };
 
 struct mlx5_ifc_set_node_in_bits {
 	u8         node_description[64][0x8];
 };
 
 struct mlx5_ifc_register_power_settings_bits {
 	u8         reserved_0[0x18];
 	u8         power_settings_level[0x8];
 
 	u8         reserved_1[0x60];
 };
 
 struct mlx5_ifc_register_host_endianess_bits {
 	u8         he[0x1];
 	u8         reserved_0[0x1f];
 
 	u8         reserved_1[0x60];
 };
 
 struct mlx5_ifc_register_diag_buffer_ctrl_bits {
 	u8         physical_address[0x40];
 };
 
 struct mlx5_ifc_qtct_reg_bits {
 	u8         operation_type[0x2];
 	u8         cap_local_admin[0x1];
 	u8         cap_remote_admin[0x1];
 	u8         reserved_0[0x4];
 	u8         port_number[0x8];
 	u8         reserved_1[0xd];
 	u8         prio[0x3];
 
 	u8         reserved_2[0x1d];
 	u8         tclass[0x3];
 };
 
 struct mlx5_ifc_qpdp_reg_bits {
 	u8         reserved_0[0x8];
 	u8         port_number[0x8];
 	u8         reserved_1[0x10];
 
 	u8         reserved_2[0x1d];
 	u8         pprio[0x3];
 };
 
 struct mlx5_ifc_port_info_ro_fields_param_bits {
 	u8         reserved_0[0x8];
 	u8         port[0x8];
 	u8         max_gid[0x10];
 
 	u8         reserved_1[0x20];
 
 	u8         port_guid[0x40];
 };
 
 struct mlx5_ifc_nvqc_reg_bits {
 	u8         type[0x20];
 
 	u8         reserved_0[0x18];
 	u8         version[0x4];
 	u8         reserved_1[0x2];
 	u8         support_wr[0x1];
 	u8         support_rd[0x1];
 };
 
 struct mlx5_ifc_nvia_reg_bits {
 	u8         reserved_0[0x1d];
 	u8         target[0x3];
 
 	u8         reserved_1[0x20];
 };
 
 struct mlx5_ifc_nvdi_reg_bits {
 	struct mlx5_ifc_config_item_bits configuration_item_header;
 };
 
 struct mlx5_ifc_nvda_reg_bits {
 	struct mlx5_ifc_config_item_bits configuration_item_header;
 
 	u8         configuration_item_data[0x20];
 };
 
 struct mlx5_ifc_node_info_ro_fields_param_bits {
 	u8         system_image_guid[0x40];
 
 	u8         reserved_0[0x40];
 
 	u8         node_guid[0x40];
 
 	u8         reserved_1[0x10];
 	u8         max_pkey[0x10];
 
 	u8         reserved_2[0x20];
 };
 
 struct mlx5_ifc_ets_tcn_config_reg_bits {
 	u8         g[0x1];
 	u8         b[0x1];
 	u8         r[0x1];
 	u8         reserved_0[0x9];
 	u8         group[0x4];
 	u8         reserved_1[0x9];
 	u8         bw_allocation[0x7];
 
 	u8         reserved_2[0xc];
 	u8         max_bw_units[0x4];
 	u8         reserved_3[0x8];
 	u8         max_bw_value[0x8];
 };
 
 struct mlx5_ifc_ets_global_config_reg_bits {
 	u8         reserved_0[0x2];
 	u8         r[0x1];
 	u8         reserved_1[0x1d];
 
 	u8         reserved_2[0xc];
 	u8         max_bw_units[0x4];
 	u8         reserved_3[0x8];
 	u8         max_bw_value[0x8];
 };
 
 struct mlx5_ifc_qetc_reg_bits {
 	u8                                         reserved_at_0[0x8];
 	u8                                         port_number[0x8];
 	u8                                         reserved_at_10[0x30];
 
 	struct mlx5_ifc_ets_tcn_config_reg_bits    tc_configuration[0x8];
 	struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
 };
 
 struct mlx5_ifc_nodnic_mac_filters_bits {
 	struct mlx5_ifc_mac_address_layout_bits mac_filter0;
 
 	struct mlx5_ifc_mac_address_layout_bits mac_filter1;
 
 	struct mlx5_ifc_mac_address_layout_bits mac_filter2;
 
 	struct mlx5_ifc_mac_address_layout_bits mac_filter3;
 
 	struct mlx5_ifc_mac_address_layout_bits mac_filter4;
 
 	u8         reserved_0[0xc0];
 };
 
 struct mlx5_ifc_nodnic_gid_filters_bits {
 	u8         mgid_filter0[16][0x8];
 
 	u8         mgid_filter1[16][0x8];
 
 	u8         mgid_filter2[16][0x8];
 
 	u8         mgid_filter3[16][0x8];
 };
 
 enum {
 	MLX5_NODNIC_CONFIG_REG_NUM_PORTS_SINGLE_PORT  = 0x0,
 	MLX5_NODNIC_CONFIG_REG_NUM_PORTS_DUAL_PORT    = 0x1,
 };
 
 enum {
 	MLX5_NODNIC_CONFIG_REG_CQE_FORMAT_LEGACY_CQE  = 0x0,
 	MLX5_NODNIC_CONFIG_REG_CQE_FORMAT_NEW_CQE     = 0x1,
 };
 
 struct mlx5_ifc_nodnic_config_reg_bits {
 	u8         no_dram_nic_revision[0x8];
 	u8         hardware_format[0x8];
 	u8         support_receive_filter[0x1];
 	u8         support_promisc_filter[0x1];
 	u8         support_promisc_multicast_filter[0x1];
 	u8         reserved_0[0x2];
 	u8         log_working_buffer_size[0x3];
 	u8         log_pkey_table_size[0x4];
 	u8         reserved_1[0x3];
 	u8         num_ports[0x1];
 
 	u8         reserved_2[0x2];
 	u8         log_max_ring_size[0x6];
 	u8         reserved_3[0x18];
 
 	u8         lkey[0x20];
 
 	u8         cqe_format[0x4];
 	u8         reserved_4[0x1c];
 
 	u8         node_guid[0x40];
 
 	u8         reserved_5[0x740];
 
 	struct mlx5_ifc_nodnic_port_config_reg_bits port1_settings;
 
 	struct mlx5_ifc_nodnic_port_config_reg_bits port2_settings;
 };
 
 struct mlx5_ifc_vlan_layout_bits {
 	u8         reserved_0[0x14];
 	u8         vlan[0xc];
 
 	u8         reserved_1[0x20];
 };
 
 struct mlx5_ifc_umr_pointer_desc_argument_bits {
 	u8         reserved_0[0x20];
 
 	u8         mkey[0x20];
 
 	u8         addressh_63_32[0x20];
 
 	u8         addressl_31_0[0x20];
 };
 
 struct mlx5_ifc_ud_adrs_vector_bits {
 	u8         dc_key[0x40];
 
 	u8         ext[0x1];
 	u8         reserved_0[0x7];
 	u8         destination_qp_dct[0x18];
 
 	u8         static_rate[0x4];
 	u8         sl_eth_prio[0x4];
 	u8         fl[0x1];
 	u8         mlid[0x7];
 	u8         rlid_udp_sport[0x10];
 
 	u8         reserved_1[0x20];
 
 	u8         rmac_47_16[0x20];
 
 	u8         rmac_15_0[0x10];
 	u8         tclass[0x8];
 	u8         hop_limit[0x8];
 
 	u8         reserved_2[0x1];
 	u8         grh[0x1];
 	u8         reserved_3[0x2];
 	u8         src_addr_index[0x8];
 	u8         flow_label[0x14];
 
 	u8         rgid_rip[16][0x8];
 };
 
 struct mlx5_ifc_port_module_event_bits {
 	u8         reserved_0[0x8];
 	u8         module[0x8];
 	u8         reserved_1[0xc];
 	u8         module_status[0x4];
 
 	u8         reserved_2[0x14];
 	u8         error_type[0x4];
 	u8         reserved_3[0x8];
 
 	u8         reserved_4[0xa0];
 };
 
 struct mlx5_ifc_icmd_control_bits {
 	u8         opcode[0x10];
 	u8         status[0x8];
 	u8         reserved_0[0x7];
 	u8         busy[0x1];
 };
 
 struct mlx5_ifc_eqe_bits {
 	u8         reserved_0[0x8];
 	u8         event_type[0x8];
 	u8         reserved_1[0x8];
 	u8         event_sub_type[0x8];
 
 	u8         reserved_2[0xe0];
 
 	union mlx5_ifc_event_auto_bits event_data;
 
 	u8         reserved_3[0x10];
 	u8         signature[0x8];
 	u8         reserved_4[0x7];
 	u8         owner[0x1];
 };
 
 enum {
 	MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT  = 0x7,
 };
 
 struct mlx5_ifc_cmd_queue_entry_bits {
 	u8         type[0x8];
 	u8         reserved_0[0x18];
 
 	u8         input_length[0x20];
 
 	u8         input_mailbox_pointer_63_32[0x20];
 
 	u8         input_mailbox_pointer_31_9[0x17];
 	u8         reserved_1[0x9];
 
 	u8         command_input_inline_data[16][0x8];
 
 	u8         command_output_inline_data[16][0x8];
 
 	u8         output_mailbox_pointer_63_32[0x20];
 
 	u8         output_mailbox_pointer_31_9[0x17];
 	u8         reserved_2[0x9];
 
 	u8         output_length[0x20];
 
 	u8         token[0x8];
 	u8         signature[0x8];
 	u8         reserved_3[0x8];
 	u8         status[0x7];
 	u8         ownership[0x1];
 };
 
 struct mlx5_ifc_cmd_out_bits {
 	u8         status[0x8];
 	u8         reserved_0[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         command_output[0x20];
 };
 
 struct mlx5_ifc_cmd_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_0[0x10];
 
 	u8         reserved_1[0x10];
 	u8         op_mod[0x10];
 
 	u8         command[0][0x20];
 };
 
 struct mlx5_ifc_cmd_if_box_bits {
 	u8         mailbox_data[512][0x8];
 
 	u8         reserved_0[0x180];
 
 	u8         next_pointer_63_32[0x20];
 
 	u8         next_pointer_31_10[0x16];
 	u8         reserved_1[0xa];
 
 	u8         block_number[0x20];
 
 	u8         reserved_2[0x8];
 	u8         token[0x8];
 	u8         ctrl_signature[0x8];
 	u8         signature[0x8];
 };
 
 struct mlx5_ifc_mtt_bits {
 	u8         ptag_63_32[0x20];
 
 	u8         ptag_31_8[0x18];
 	u8         reserved_0[0x6];
 	u8         wr_en[0x1];
 	u8         rd_en[0x1];
 };
 
 struct mlx5_ifc_tls_progress_params_bits {
 	u8         valid[0x1];
 	u8         reserved_at_1[0x7];
 	u8         pd[0x18];
 
 	u8         next_record_tcp_sn[0x20];
 
 	u8         hw_resync_tcp_sn[0x20];
 
 	u8         record_tracker_state[0x2];
 	u8         auth_state[0x2];
 	u8         reserved_at_64[0x4];
 	u8         hw_offset_record_number[0x18];
 };
 
 struct mlx5_ifc_tls_static_params_bits {
 	u8         const_2[0x2];
 	u8         tls_version[0x4];
 	u8         const_1[0x2];
 	u8         reserved_at_8[0x14];
 	u8         encryption_standard[0x4];
 
 	u8         reserved_at_20[0x20];
 
 	u8         initial_record_number[0x40];
 
 	u8         resync_tcp_sn[0x20];
 
 	u8         gcm_iv[0x20];
 
 	u8         implicit_iv[0x40];
 
 	u8         reserved_at_100[0x8];
 	u8         dek_index[0x18];
 
 	u8         reserved_at_120[0xe0];
 };
 
 /* Vendor Specific Capabilities, VSC */
 enum {
 	MLX5_VSC_DOMAIN_ICMD			= 0x1,
 	MLX5_VSC_DOMAIN_PROTECTED_CRSPACE	= 0x6,
 	MLX5_VSC_DOMAIN_SCAN_CRSPACE		= 0x7,
 	MLX5_VSC_DOMAIN_SEMAPHORES		= 0xA,
 };
 
 struct mlx5_ifc_vendor_specific_cap_bits {
 	u8         type[0x8];
 	u8         length[0x8];
 	u8         next_pointer[0x8];
 	u8         capability_id[0x8];
 
 	u8         status[0x3];
 	u8         reserved_0[0xd];
 	u8         space[0x10];
 
 	u8         counter[0x20];
 
 	u8         semaphore[0x20];
 
 	u8         flag[0x1];
 	u8         reserved_1[0x1];
 	u8         address[0x1e];
 
 	u8         data[0x20];
 };
 
 struct mlx5_ifc_vsc_space_bits {
 	u8 status[0x3];
 	u8 reserved0[0xd];
 	u8 space[0x10];
 };
 
 struct mlx5_ifc_vsc_addr_bits {
 	u8 flag[0x1];
 	u8 reserved0[0x1];
 	u8 address[0x1e];
 };
 
 enum {
 	MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER  = 0x0,
 	MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED     = 0x1,
 	MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC  = 0x2,
 };
 
 enum {
 	MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER  = 0x0,
 	MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED     = 0x1,
 	MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC  = 0x2,
 };
 
 enum {
 	MLX5_HEALTH_SYNDR_FW_ERR                                      = 0x1,
 	MLX5_HEALTH_SYNDR_IRISC_ERR                                   = 0x7,
 	MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR                        = 0x8,
 	MLX5_HEALTH_SYNDR_CRC_ERR                                     = 0x9,
 	MLX5_HEALTH_SYNDR_FETCH_PCI_ERR                               = 0xa,
 	MLX5_HEALTH_SYNDR_HW_FTL_ERR                                  = 0xb,
 	MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR                        = 0xc,
 	MLX5_HEALTH_SYNDR_EQ_ERR                                      = 0xd,
 	MLX5_HEALTH_SYNDR_EQ_INV                                      = 0xe,
 	MLX5_HEALTH_SYNDR_FFSER_ERR                                   = 0xf,
 	MLX5_HEALTH_SYNDR_HIGH_TEMP                                   = 0x10,
 };
 
 struct mlx5_ifc_initial_seg_bits {
 	u8         fw_rev_minor[0x10];
 	u8         fw_rev_major[0x10];
 
 	u8         cmd_interface_rev[0x10];
 	u8         fw_rev_subminor[0x10];
 
 	u8         reserved_0[0x40];
 
 	u8         cmdq_phy_addr_63_32[0x20];
 
 	u8         cmdq_phy_addr_31_12[0x14];
 	u8         reserved_1[0x2];
 	u8         nic_interface[0x2];
 	u8         log_cmdq_size[0x4];
 	u8         log_cmdq_stride[0x4];
 
 	u8         command_doorbell_vector[0x20];
 
 	u8         reserved_2[0xf00];
 
 	u8         initializing[0x1];
 	u8         reserved_3[0x4];
 	u8         nic_interface_supported[0x3];
 	u8         reserved_4[0x18];
 
 	struct mlx5_ifc_health_buffer_bits health_buffer;
 
 	u8         no_dram_nic_offset[0x20];
 
 	u8         reserved_5[0x6de0];
 
 	u8         internal_timer_h[0x20];
 
 	u8         internal_timer_l[0x20];
 
 	u8         reserved_6[0x20];
 
 	u8         reserved_7[0x1f];
 	u8         clear_int[0x1];
 
 	u8         health_syndrome[0x8];
 	u8         health_counter[0x18];
 
 	u8         reserved_8[0x17fc0];
 };
 
 union mlx5_ifc_icmd_interface_document_bits {
 	struct mlx5_ifc_fw_version_bits fw_version;
 	struct mlx5_ifc_icmd_access_reg_in_bits icmd_access_reg_in;
 	struct mlx5_ifc_icmd_access_reg_out_bits icmd_access_reg_out;
 	struct mlx5_ifc_icmd_init_ocsd_in_bits icmd_init_ocsd_in;
 	struct mlx5_ifc_icmd_ocbb_init_in_bits icmd_ocbb_init_in;
 	struct mlx5_ifc_icmd_ocbb_query_etoc_stats_out_bits icmd_ocbb_query_etoc_stats_out;
 	struct mlx5_ifc_icmd_ocbb_query_header_stats_out_bits icmd_ocbb_query_header_stats_out;
 	struct mlx5_ifc_icmd_query_cap_general_bits icmd_query_cap_general;
 	struct mlx5_ifc_icmd_query_cap_in_bits icmd_query_cap_in;
 	struct mlx5_ifc_icmd_query_fw_info_out_bits icmd_query_fw_info_out;
 	struct mlx5_ifc_icmd_query_virtual_mac_out_bits icmd_query_virtual_mac_out;
 	struct mlx5_ifc_icmd_set_virtual_mac_in_bits icmd_set_virtual_mac_in;
 	struct mlx5_ifc_icmd_set_wol_rol_in_bits icmd_set_wol_rol_in;
 	struct mlx5_ifc_icmd_set_wol_rol_out_bits icmd_set_wol_rol_out;
 	u8         reserved_0[0x42c0];
 };
 
 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
 	struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_discard_cntrs_grp_bits eth_discard_cntrs_grp;
 	struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
 	struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
 	struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
 	struct mlx5_ifc_infiniband_port_cntrs_bits infiniband_port_cntrs;
 	u8         reserved_0[0x7c0];
 };
 
 struct mlx5_ifc_ppcnt_reg_bits {
 	u8         swid[0x8];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_0[0x8];
 	u8         grp[0x6];
 
 	u8         clr[0x1];
 	u8         reserved_1[0x1c];
 	u8         prio_tc[0x3];
 
 	union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
 };
 
 struct mlx5_ifc_pcie_lanes_counters_bits {
 	u8         life_time_counter_high[0x20];
 
 	u8         life_time_counter_low[0x20];
 
 	u8         error_counter_lane0[0x20];
 
 	u8         error_counter_lane1[0x20];
 
 	u8         error_counter_lane2[0x20];
 
 	u8         error_counter_lane3[0x20];
 
 	u8         error_counter_lane4[0x20];
 
 	u8         error_counter_lane5[0x20];
 
 	u8         error_counter_lane6[0x20];
 
 	u8         error_counter_lane7[0x20];
 
 	u8         error_counter_lane8[0x20];
 
 	u8         error_counter_lane9[0x20];
 
 	u8         error_counter_lane10[0x20];
 
 	u8         error_counter_lane11[0x20];
 
 	u8         error_counter_lane12[0x20];
 
 	u8         error_counter_lane13[0x20];
 
 	u8         error_counter_lane14[0x20];
 
 	u8         error_counter_lane15[0x20];
 
 	u8         reserved_at_240[0x580];
 };
 
 struct mlx5_ifc_pcie_lanes_counters_ext_bits {
 	u8         reserved_at_0[0x40];
 
 	u8         error_counter_lane0[0x20];
 
 	u8         error_counter_lane1[0x20];
 
 	u8         error_counter_lane2[0x20];
 
 	u8         error_counter_lane3[0x20];
 
 	u8         error_counter_lane4[0x20];
 
 	u8         error_counter_lane5[0x20];
 
 	u8         error_counter_lane6[0x20];
 
 	u8         error_counter_lane7[0x20];
 
 	u8         error_counter_lane8[0x20];
 
 	u8         error_counter_lane9[0x20];
 
 	u8         error_counter_lane10[0x20];
 
 	u8         error_counter_lane11[0x20];
 
 	u8         error_counter_lane12[0x20];
 
 	u8         error_counter_lane13[0x20];
 
 	u8         error_counter_lane14[0x20];
 
 	u8         error_counter_lane15[0x20];
 
 	u8         reserved_at_240[0x580];
 };
 
 struct mlx5_ifc_pcie_perf_counters_bits {
 	u8         life_time_counter_high[0x20];
 
 	u8         life_time_counter_low[0x20];
 
 	u8         rx_errors[0x20];
 
 	u8         tx_errors[0x20];
 
 	u8         l0_to_recovery_eieos[0x20];
 
 	u8         l0_to_recovery_ts[0x20];
 
 	u8         l0_to_recovery_framing[0x20];
 
 	u8         l0_to_recovery_retrain[0x20];
 
 	u8         crc_error_dllp[0x20];
 
 	u8         crc_error_tlp[0x20];
 
 	u8         tx_overflow_buffer_pkt[0x40];
 
 	u8         outbound_stalled_reads[0x20];
 
 	u8         outbound_stalled_writes[0x20];
 
 	u8         outbound_stalled_reads_events[0x20];
 
 	u8         outbound_stalled_writes_events[0x20];
 
 	u8         tx_overflow_buffer_marked_pkt[0x40];
 
 	u8         reserved_at_240[0x580];
 };
 
 struct mlx5_ifc_pcie_perf_counters_ext_bits {
 	u8         reserved_at_0[0x40];
 
 	u8         rx_errors[0x20];
 
 	u8         tx_errors[0x20];
 
 	u8         reserved_at_80[0xc0];
 
 	u8         tx_overflow_buffer_pkt[0x40];
 
 	u8         outbound_stalled_reads[0x20];
 
 	u8         outbound_stalled_writes[0x20];
 
 	u8         outbound_stalled_reads_events[0x20];
 
 	u8         outbound_stalled_writes_events[0x20];
 
 	u8         tx_overflow_buffer_marked_pkt[0x40];
 
 	u8         reserved_at_240[0x580];
 };
 
 struct mlx5_ifc_pcie_timers_states_bits {
 	u8         life_time_counter_high[0x20];
 
 	u8         life_time_counter_low[0x20];
 
 	u8         time_to_boot_image_start[0x20];
 
 	u8         time_to_link_image[0x20];
 
 	u8         calibration_time[0x20];
 
 	u8         time_to_first_perst[0x20];
 
 	u8         time_to_detect_state[0x20];
 
 	u8         time_to_l0[0x20];
 
 	u8         time_to_crs_en[0x20];
 
 	u8         time_to_plastic_image_start[0x20];
 
 	u8         time_to_iron_image_start[0x20];
 
 	u8         perst_handler[0x20];
 
 	u8         times_in_l1[0x20];
 
 	u8         times_in_l23[0x20];
 
 	u8         dl_down[0x20];
 
 	u8         config_cycle1usec[0x20];
 
 	u8         config_cycle2to7usec[0x20];
 
 	u8         config_cycle8to15usec[0x20];
 
 	u8         config_cycle16to63usec[0x20];
 
 	u8         config_cycle64usec[0x20];
 
 	u8         correctable_err_msg_sent[0x20];
 
 	u8         non_fatal_err_msg_sent[0x20];
 
 	u8         fatal_err_msg_sent[0x20];
 
 	u8         reserved_at_2e0[0x4e0];
 };
 
 struct mlx5_ifc_pcie_timers_states_ext_bits {
 	u8         reserved_at_0[0x40];
 
 	u8         time_to_boot_image_start[0x20];
 
 	u8         time_to_link_image[0x20];
 
 	u8         calibration_time[0x20];
 
 	u8         time_to_first_perst[0x20];
 
 	u8         time_to_detect_state[0x20];
 
 	u8         time_to_l0[0x20];
 
 	u8         time_to_crs_en[0x20];
 
 	u8         time_to_plastic_image_start[0x20];
 
 	u8         time_to_iron_image_start[0x20];
 
 	u8         perst_handler[0x20];
 
 	u8         times_in_l1[0x20];
 
 	u8         times_in_l23[0x20];
 
 	u8         dl_down[0x20];
 
 	u8         config_cycle1usec[0x20];
 
 	u8         config_cycle2to7usec[0x20];
 
 	u8         config_cycle8to15usec[0x20];
 
 	u8         config_cycle16to63usec[0x20];
 
 	u8         config_cycle64usec[0x20];
 
 	u8         correctable_err_msg_sent[0x20];
 
 	u8         non_fatal_err_msg_sent[0x20];
 
 	u8         fatal_err_msg_sent[0x20];
 
 	u8         reserved_at_2e0[0x4e0];
 };
 
 union mlx5_ifc_mpcnt_reg_counter_set_auto_bits {
 	struct mlx5_ifc_pcie_perf_counters_bits pcie_perf_counters;
 	struct mlx5_ifc_pcie_lanes_counters_bits pcie_lanes_counters;
 	struct mlx5_ifc_pcie_timers_states_bits pcie_timers_states;
 	u8         reserved_at_0[0x7c0];
 };
 
 union mlx5_ifc_mpcnt_reg_counter_set_auto_ext_bits {
 	struct mlx5_ifc_pcie_perf_counters_ext_bits pcie_perf_counters_ext;
 	struct mlx5_ifc_pcie_lanes_counters_ext_bits pcie_lanes_counters_ext;
 	struct mlx5_ifc_pcie_timers_states_ext_bits pcie_timers_states_ext;
 	u8         reserved_at_0[0x7c0];
 };
 
 struct mlx5_ifc_mpcnt_reg_bits {
 	u8         reserved_at_0[0x2];
 	u8         depth[0x6];
 	u8         pcie_index[0x8];
 	u8         node[0x8];
 	u8         reserved_at_18[0x2];
 	u8         grp[0x6];
 
 	u8         clr[0x1];
 	u8         reserved_at_21[0x1f];
 
 	union mlx5_ifc_mpcnt_reg_counter_set_auto_bits counter_set;
 };
 
 struct mlx5_ifc_mpcnt_reg_ext_bits {
 	u8         reserved_at_0[0x2];
 	u8         depth[0x6];
 	u8         pcie_index[0x8];
 	u8         node[0x8];
 	u8         reserved_at_18[0x2];
 	u8         grp[0x6];
 
 	u8         clr[0x1];
 	u8         reserved_at_21[0x1f];
 
 	union mlx5_ifc_mpcnt_reg_counter_set_auto_ext_bits counter_set;
 };
 
 struct mlx5_ifc_monitor_opcodes_layout_bits {
 	u8         reserved_at_0[0x10];
 	u8         monitor_opcode[0x10];
 };
 
 union mlx5_ifc_pddr_status_opcode_bits {
 	struct mlx5_ifc_monitor_opcodes_layout_bits monitor_opcodes;
 	u8         reserved_at_0[0x20];
 };
 
 struct mlx5_ifc_troubleshooting_info_page_layout_bits {
 	u8         reserved_at_0[0x10];
 	u8         group_opcode[0x10];
 
 	union mlx5_ifc_pddr_status_opcode_bits status_opcode;
 
 	u8         user_feedback_data[0x10];
 	u8         user_feedback_index[0x10];
 
 	u8         status_message[0x760];
 };
 
 union mlx5_ifc_pddr_page_data_bits {
 	struct mlx5_ifc_troubleshooting_info_page_layout_bits troubleshooting_info_page;
 	struct mlx5_ifc_pddr_module_info_bits pddr_module_info;
 	u8         reserved_at_0[0x7c0];
 };
 
 struct mlx5_ifc_pddr_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         local_port[0x8];
 	u8         pnat[0x2];
 	u8         reserved_at_12[0xe];
 
 	u8         reserved_at_20[0x18];
 	u8         page_select[0x8];
 
 	union mlx5_ifc_pddr_page_data_bits page_data;
 };
 
 enum {
 	MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MPEIN = 0x9050,
 	MLX5_MPEIN_PWR_STATUS_INVALID = 0,
 	MLX5_MPEIN_PWR_STATUS_SUFFICIENT = 1,
 	MLX5_MPEIN_PWR_STATUS_INSUFFICIENT = 2,
 };
 
 struct mlx5_ifc_mpein_reg_bits {
 	u8         reserved_at_0[0x2];
 	u8         depth[0x6];
 	u8         pcie_index[0x8];
 	u8         node[0x8];
 	u8         reserved_at_18[0x8];
 
 	u8         capability_mask[0x20];
 
 	u8         reserved_at_40[0x8];
 	u8         link_width_enabled[0x8];
 	u8         link_speed_enabled[0x10];
 
 	u8         lane0_physical_position[0x8];
 	u8         link_width_active[0x8];
 	u8         link_speed_active[0x10];
 
 	u8         num_of_pfs[0x10];
 	u8         num_of_vfs[0x10];
 
 	u8         bdf0[0x10];
 	u8         reserved_at_b0[0x10];
 
 	u8         max_read_request_size[0x4];
 	u8         max_payload_size[0x4];
 	u8         reserved_at_c8[0x5];
 	u8         pwr_status[0x3];
 	u8         port_type[0x4];
 	u8         reserved_at_d4[0xb];
 	u8         lane_reversal[0x1];
 
 	u8         reserved_at_e0[0x14];
 	u8         pci_power[0xc];
 
 	u8         reserved_at_100[0x20];
 
 	u8         device_status[0x10];
 	u8         port_state[0x8];
 	u8         reserved_at_138[0x8];
 
 	u8         reserved_at_140[0x10];
 	u8         receiver_detect_result[0x10];
 
 	u8         reserved_at_160[0x20];
 };
 
 struct mlx5_ifc_mpein_reg_ext_bits {
 	u8         reserved_at_0[0x2];
 	u8         depth[0x6];
 	u8         pcie_index[0x8];
 	u8         node[0x8];
 	u8         reserved_at_18[0x8];
 
 	u8         reserved_at_20[0x20];
 
 	u8         reserved_at_40[0x8];
 	u8         link_width_enabled[0x8];
 	u8         link_speed_enabled[0x10];
 
 	u8         lane0_physical_position[0x8];
 	u8         link_width_active[0x8];
 	u8         link_speed_active[0x10];
 
 	u8         num_of_pfs[0x10];
 	u8         num_of_vfs[0x10];
 
 	u8         bdf0[0x10];
 	u8         reserved_at_b0[0x10];
 
 	u8         max_read_request_size[0x4];
 	u8         max_payload_size[0x4];
 	u8         reserved_at_c8[0x5];
 	u8         pwr_status[0x3];
 	u8         port_type[0x4];
 	u8         reserved_at_d4[0xb];
 	u8         lane_reversal[0x1];
 };
 
 struct mlx5_ifc_mcqi_cap_bits {
 	u8         supported_info_bitmask[0x20];
 
 	u8         component_size[0x20];
 
 	u8         max_component_size[0x20];
 
 	u8         log_mcda_word_size[0x4];
 	u8         reserved_at_64[0xc];
 	u8         mcda_max_write_size[0x10];
 
 	u8         rd_en[0x1];
 	u8         reserved_at_81[0x1];
 	u8         match_chip_id[0x1];
 	u8         match_psid[0x1];
 	u8         check_user_timestamp[0x1];
 	u8         match_base_guid_mac[0x1];
 	u8         reserved_at_86[0x1a];
 };
 
 struct mlx5_ifc_mcqi_reg_bits {
 	u8         read_pending_component[0x1];
 	u8         reserved_at_1[0xf];
 	u8         component_index[0x10];
 
 	u8         reserved_at_20[0x20];
 
 	u8         reserved_at_40[0x1b];
 	u8         info_type[0x5];
 
 	u8         info_size[0x20];
 
 	u8         offset[0x20];
 
 	u8         reserved_at_a0[0x10];
 	u8         data_size[0x10];
 
 	u8         data[0][0x20];
 };
 
 struct mlx5_ifc_mcc_reg_bits {
 	u8         reserved_at_0[0x4];
 	u8         time_elapsed_since_last_cmd[0xc];
 	u8         reserved_at_10[0x8];
 	u8         instruction[0x8];
 
 	u8         reserved_at_20[0x10];
 	u8         component_index[0x10];
 
 	u8         reserved_at_40[0x8];
 	u8         update_handle[0x18];
 
 	u8         handle_owner_type[0x4];
 	u8         handle_owner_host_id[0x4];
 	u8         reserved_at_68[0x1];
 	u8         control_progress[0x7];
 	u8         error_code[0x8];
 	u8         reserved_at_78[0x4];
 	u8         control_state[0x4];
 
 	u8         component_size[0x20];
 
 	u8         reserved_at_a0[0x60];
 };
 
 struct mlx5_ifc_mcda_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         update_handle[0x18];
 
 	u8         offset[0x20];
 
 	u8         reserved_at_40[0x10];
 	u8         size[0x10];
 
 	u8         reserved_at_60[0x20];
 
 	u8         data[0][0x20];
 };
 
 union mlx5_ifc_ports_control_registers_document_bits {
 	struct mlx5_ifc_ib_portcntrs_attribute_grp_data_bits ib_portcntrs_attribute_grp_data;
 	struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
 	struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_discard_cntrs_grp_bits eth_discard_cntrs_grp;
 	struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
 	struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
 	struct mlx5_ifc_eth_per_traffic_class_cong_layout_bits eth_per_traffic_class_cong_layout;
 	struct mlx5_ifc_eth_per_traffic_class_layout_bits eth_per_traffic_class_layout;
 	struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
 	struct mlx5_ifc_link_level_retrans_cntr_grp_date_bits link_level_retrans_cntr_grp_date;
 	struct mlx5_ifc_pamp_reg_bits pamp_reg;
 	struct mlx5_ifc_paos_reg_bits paos_reg;
 	struct mlx5_ifc_pbmc_reg_bits pbmc_reg;
 	struct mlx5_ifc_pcap_reg_bits pcap_reg;
 	struct mlx5_ifc_peir_reg_bits peir_reg;
 	struct mlx5_ifc_pelc_reg_bits pelc_reg;
 	struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
 	struct mlx5_ifc_phbr_binding_reg_bits phbr_binding_reg;
 	struct mlx5_ifc_phbr_for_port_tclass_reg_bits phbr_for_port_tclass_reg;
 	struct mlx5_ifc_phbr_for_prio_reg_bits phbr_for_prio_reg;
 	struct mlx5_ifc_phrr_reg_bits phrr_reg;
 	struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
 	struct mlx5_ifc_pifr_reg_bits pifr_reg;
 	struct mlx5_ifc_pipg_reg_bits pipg_reg;
 	struct mlx5_ifc_plbf_reg_bits plbf_reg;
 	struct mlx5_ifc_plib_reg_bits plib_reg;
 	struct mlx5_ifc_pll_status_data_bits pll_status_data;
 	struct mlx5_ifc_plpc_reg_bits plpc_reg;
 	struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
 	struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
 	struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
 	struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
 	struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
 	struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
 	struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
 	struct mlx5_ifc_ppad_reg_bits ppad_reg;
 	struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
 	struct mlx5_ifc_ppll_reg_bits ppll_reg;
 	struct mlx5_ifc_pplm_reg_bits pplm_reg;
 	struct mlx5_ifc_pplr_reg_bits pplr_reg;
 	struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
 	struct mlx5_ifc_pspa_reg_bits pspa_reg;
 	struct mlx5_ifc_ptas_reg_bits ptas_reg;
 	struct mlx5_ifc_ptys_reg_bits ptys_reg;
 	struct mlx5_ifc_pude_reg_bits pude_reg;
 	struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
 	struct mlx5_ifc_slrg_reg_bits slrg_reg;
 	struct mlx5_ifc_slrp_reg_bits slrp_reg;
 	struct mlx5_ifc_sltp_reg_bits sltp_reg;
 	u8         reserved_0[0x7880];
 };
 
 union mlx5_ifc_debug_enhancements_document_bits {
 	struct mlx5_ifc_health_buffer_bits health_buffer;
 	u8         reserved_0[0x200];
 };
 
 union mlx5_ifc_no_dram_nic_document_bits {
 	struct mlx5_ifc_nodnic_config_reg_bits nodnic_config_reg;
 	struct mlx5_ifc_nodnic_cq_arming_word_bits nodnic_cq_arming_word;
 	struct mlx5_ifc_nodnic_event_word_bits nodnic_event_word;
 	struct mlx5_ifc_nodnic_gid_filters_bits nodnic_gid_filters;
 	struct mlx5_ifc_nodnic_mac_filters_bits nodnic_mac_filters;
 	struct mlx5_ifc_nodnic_port_config_reg_bits nodnic_port_config_reg;
 	struct mlx5_ifc_nodnic_ring_config_reg_bits nodnic_ring_config_reg;
 	struct mlx5_ifc_nodnic_ring_doorbell_bits nodnic_ring_doorbell;
 	u8         reserved_0[0x3160];
 };
 
 union mlx5_ifc_uplink_pci_interface_document_bits {
 	struct mlx5_ifc_initial_seg_bits initial_seg;
 	struct mlx5_ifc_vendor_specific_cap_bits vendor_specific_cap;
 	u8         reserved_0[0x20120];
 };
 
 struct mlx5_ifc_qpdpm_dscp_reg_bits {
 	u8         e[0x1];
 	u8         reserved_at_01[0x0b];
 	u8         prio[0x04];
 };
 
 struct mlx5_ifc_qpdpm_reg_bits {
 	u8                                     reserved_at_0[0x8];
 	u8                                     local_port[0x8];
 	u8                                     reserved_at_10[0x10];
 	struct mlx5_ifc_qpdpm_dscp_reg_bits    dscp[64];
 };
 
 struct mlx5_ifc_qpts_reg_bits {
 	u8         reserved_at_0[0x8];
 	u8         local_port[0x8];
 	u8         reserved_at_10[0x2d];
 	u8         trust_state[0x3];
 };
 
 struct mlx5_ifc_mfrl_reg_bits {
 	u8         reserved_at_0[0x38];
 	u8         reset_level[0x8];
 };
 
 enum {
       MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTCAP	= 0x9009,
       MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTECR	= 0x9109,
       MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTMP	= 0x900a,
       MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTWE	= 0x900b,
       MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTBR	= 0x900f,
       MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTEWE	= 0x910b,
       MLX5_MAX_TEMPERATURE = 16,
 };
 
 struct mlx5_ifc_mtbr_temp_record_bits {
 	u8         max_temperature[0x10];
 	u8         temperature[0x10];
 };
 
 struct mlx5_ifc_mtbr_reg_bits {
 	u8         reserved_at_0[0x14];
 	u8         base_sensor_index[0xc];
 
 	u8         reserved_at_20[0x18];
 	u8         num_rec[0x8];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_mtbr_temp_record_bits temperature_record[MLX5_MAX_TEMPERATURE];
 };
 
 struct mlx5_ifc_mtbr_reg_ext_bits {
 	u8         reserved_at_0[0x14];
 	u8         base_sensor_index[0xc];
 
 	u8         reserved_at_20[0x18];
 	u8         num_rec[0x8];
 
 	u8         reserved_at_40[0x40];
 
     struct mlx5_ifc_mtbr_temp_record_bits temperature_record[MLX5_MAX_TEMPERATURE];
 };
 
 struct mlx5_ifc_mtcap_bits {
 	u8         reserved_at_0[0x19];
 	u8         sensor_count[0x7];
 
 	u8         reserved_at_20[0x19];
 	u8         internal_sensor_count[0x7];
 
 	u8         sensor_map[0x40];
 };
 
 struct mlx5_ifc_mtcap_ext_bits {
 	u8         reserved_at_0[0x19];
 	u8         sensor_count[0x7];
 
 	u8         reserved_at_20[0x20];
 
 	u8         sensor_map[0x40];
 };
 
 struct mlx5_ifc_mtecr_bits {
 	u8         reserved_at_0[0x4];
 	u8         last_sensor[0xc];
 	u8         reserved_at_10[0x4];
 	u8         sensor_count[0xc];
 
 	u8         reserved_at_20[0x19];
 	u8         internal_sensor_count[0x7];
 
 	u8         sensor_map_0[0x20];
 
 	u8         reserved_at_60[0x2a0];
 };
 
 struct mlx5_ifc_mtecr_ext_bits {
 	u8         reserved_at_0[0x4];
 	u8         last_sensor[0xc];
 	u8         reserved_at_10[0x4];
 	u8         sensor_count[0xc];
 
 	u8         reserved_at_20[0x20];
 
 	u8         sensor_map_0[0x20];
 
 	u8         reserved_at_60[0x2a0];
 };
 
 struct mlx5_ifc_mtewe_bits {
 	u8         reserved_at_0[0x4];
 	u8         last_sensor[0xc];
 	u8         reserved_at_10[0x4];
 	u8         sensor_count[0xc];
 
 	u8         sensor_warning_0[0x20];
 
 	u8         reserved_at_40[0x2a0];
 };
 
 struct mlx5_ifc_mtewe_ext_bits {
 	u8         reserved_at_0[0x4];
 	u8         last_sensor[0xc];
 	u8         reserved_at_10[0x4];
 	u8         sensor_count[0xc];
 
 	u8         sensor_warning_0[0x20];
 
 	u8         reserved_at_40[0x2a0];
 };
 
 struct mlx5_ifc_mtmp_bits {
 	u8         reserved_at_0[0x14];
 	u8         sensor_index[0xc];
 
 	u8         reserved_at_20[0x10];
 	u8         temperature[0x10];
 
 	u8         mte[0x1];
 	u8         mtr[0x1];
 	u8         reserved_at_42[0xe];
 	u8         max_temperature[0x10];
 
 	u8         tee[0x2];
 	u8         reserved_at_62[0xe];
 	u8         temperature_threshold_hi[0x10];
 
 	u8         reserved_at_80[0x10];
 	u8         temperature_threshold_lo[0x10];
 
 	u8         reserved_at_a0[0x20];
 
 	u8         sensor_name_hi[0x20];
 
 	u8         sensor_name_lo[0x20];
 };
 
 struct mlx5_ifc_mtmp_ext_bits {
 	u8         reserved_at_0[0x14];
 	u8         sensor_index[0xc];
 
 	u8         reserved_at_20[0x10];
 	u8         temperature[0x10];
 
 	u8         mte[0x1];
 	u8         mtr[0x1];
 	u8         reserved_at_42[0xe];
 	u8         max_temperature[0x10];
 
 	u8         tee[0x2];
 	u8         reserved_at_62[0xe];
 	u8         temperature_threshold_hi[0x10];
 
 	u8         reserved_at_80[0x10];
 	u8         temperature_threshold_lo[0x10];
 
 	u8         reserved_at_a0[0x20];
 
 	u8         sensor_name_hi[0x20];
 
 	u8         sensor_name_lo[0x20];
 };
 
 struct mlx5_ifc_general_obj_in_cmd_hdr_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         vhca_tunnel_id[0x10];
 	u8         obj_type[0x10];
 
 	u8         obj_id[0x20];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_general_obj_out_cmd_hdr_bits {
 	u8         status[0x8];
 	u8         reserved_at_8[0x18];
 
 	u8         syndrome[0x20];
 
 	u8         obj_id[0x20];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_umem_bits {
 	u8         reserved_at_0[0x80];
 
 	u8         reserved_at_80[0x1b];
 	u8         log_page_size[0x5];
 
 	u8         page_offset[0x20];
 
 	u8         num_of_mtt[0x40];
 
 	struct mlx5_ifc_mtt_bits  mtt[0];
 };
 
 struct mlx5_ifc_uctx_bits {
 	u8         cap[0x20];
 
 	u8         reserved_at_20[0x160];
 };
 
 struct mlx5_ifc_create_umem_in_bits {
 	u8         opcode[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_umem_bits  umem;
 };
 
 struct mlx5_ifc_create_uctx_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x40];
 
 	struct mlx5_ifc_uctx_bits  uctx;
 };
 
 struct mlx5_ifc_destroy_uctx_in_bits {
 	u8         opcode[0x10];
 	u8         reserved_at_10[0x10];
 
 	u8         reserved_at_20[0x10];
 	u8         op_mod[0x10];
 
 	u8         reserved_at_40[0x10];
 	u8         uid[0x10];
 
 	u8         reserved_at_60[0x20];
 };
 
 struct mlx5_ifc_mtrc_string_db_param_bits {
 	u8         string_db_base_address[0x20];
 
 	u8         reserved_at_20[0x8];
 	u8         string_db_size[0x18];
 };
 
 struct mlx5_ifc_mtrc_cap_bits {
 	u8         trace_owner[0x1];
 	u8         trace_to_memory[0x1];
 	u8         reserved_at_2[0x4];
 	u8         trc_ver[0x2];
 	u8         reserved_at_8[0x14];
 	u8         num_string_db[0x4];
 
 	u8         first_string_trace[0x8];
 	u8         num_string_trace[0x8];
 	u8         reserved_at_30[0x28];
 
 	u8         log_max_trace_buffer_size[0x8];
 
 	u8         reserved_at_60[0x20];
 
 	struct mlx5_ifc_mtrc_string_db_param_bits string_db_param[8];
 
 	u8         reserved_at_280[0x180];
 };
 
 struct mlx5_ifc_mtrc_conf_bits {
 	u8         reserved_at_0[0x1c];
 	u8         trace_mode[0x4];
 	u8         reserved_at_20[0x18];
 	u8         log_trace_buffer_size[0x8];
 	u8         trace_mkey[0x20];
 	u8         reserved_at_60[0x3a0];
 };
 
 struct mlx5_ifc_mtrc_stdb_bits {
 	u8         string_db_index[0x4];
 	u8         reserved_at_4[0x4];
 	u8         read_size[0x18];
 	u8         start_offset[0x20];
 	u8         string_db_data[0];
 };
 
 struct mlx5_ifc_mtrc_ctrl_bits {
 	u8         trace_status[0x2];
 	u8         reserved_at_2[0x2];
 	u8         arm_event[0x1];
 	u8         reserved_at_5[0xb];
 	u8         modify_field_select[0x10];
 	u8         reserved_at_20[0x2b];
 	u8         current_timestamp52_32[0x15];
 	u8         current_timestamp31_0[0x20];
 	u8         reserved_at_80[0x180];
 };
 
 struct mlx5_ifc_affiliated_event_header_bits {
 	u8         reserved_at_0[0x10];
 	u8         obj_type[0x10];
 
 	u8         obj_id[0x20];
 };
 
 #endif /* MLX5_IFC_H */
diff --git a/sys/modules/mlx5/Makefile b/sys/modules/mlx5/Makefile
index 3eb21722f777..263199f3d595 100644
--- a/sys/modules/mlx5/Makefile
+++ b/sys/modules/mlx5/Makefile
@@ -1,59 +1,60 @@
 # $FreeBSD$
 .PATH:	${SRCTOP}/sys/dev/mlx5/mlx5_core \
 	${SRCTOP}/sys/dev/mlx5/mlx5_lib \
 	${SRCTOP}/sys/dev/mlx5/mlx5_fpga
 
 KMOD=mlx5
 SRCS= \
 mlx5_alloc.c \
 mlx5_cmd.c \
 mlx5_cq.c \
+mlx5_diag_cnt.c \
 mlx5_diagnostics.c \
 mlx5_eq.c \
 mlx5_eswitch.c \
 mlx5_fs_cmd.c \
 mlx5_fs_tcp.c \
 mlx5_fs_tree.c \
 mlx5_fw.c \
 mlx5_fwdump.c \
 mlx5_health.c \
 mlx5_mad.c \
 mlx5_main.c \
 mlx5_mcg.c \
 mlx5_mpfs.c \
 mlx5_mr.c \
 mlx5_pagealloc.c \
 mlx5_pd.c \
 mlx5_port.c \
 mlx5_qp.c \
 mlx5_rl.c \
 mlx5_srq.c \
 mlx5_tls.c \
 mlx5_transobj.c \
 mlx5_uar.c \
 mlx5_vport.c \
 mlx5_vsc.c \
 mlx5_wq.c \
 mlx5_gid.c
 SRCS+=	${LINUXKPI_GENSRCS}
 SRCS+=	opt_inet.h opt_inet6.h opt_rss.h opt_ratelimit.h
 
 CFLAGS+= -I${SRCTOP}/sys/ofed/include
 CFLAGS+= -I${SRCTOP}/sys/ofed/include/uapi
 CFLAGS+= ${LINUXKPI_INCLUDES}
 
 .if defined(CONFIG_BUILD_FPGA)
 SRCS+= \
 	mlx5fpga_cmd.c \
 	mlx5fpga_core.c \
 	mlx5fpga_sdk.c \
 	mlx5fpga_trans.c \
 	mlx5fpga_xfer.c \
 	mlx5fpga_ipsec.c
 .endif
 
 EXPORT_SYMS=	YES
 
 .include <bsd.kmod.mk>
 
 CFLAGS+= -Wno-cast-qual -Wno-pointer-arith ${GCC_MS_EXTENSIONS}