diff --git a/sys/conf/NOTES b/sys/conf/NOTES index f4a6c4330fd1..21bf3c4046c0 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -1,1541 +1,1544 @@ # # LINT -- config file for checking all the sources, tries to pull in # as much of the source tree as it can. # -# $Id: LINT,v 1.423 1998/03/29 07:58:03 helbig Exp $ +# $Id: LINT,v 1.424 1998/04/09 22:28:57 sos Exp $ # # NB: You probably don't want to try running a kernel built from this # file. Instead, you should start from GENERIC, and add options from # this file as required. # # # This directive is mandatory; it defines the architecture to be # configured for; in this case, the 386 family based IBM-PC and # compatibles. # machine "i386" # # This is the ``identification'' of the kernel. Usually this should # be the same as the name of your kernel. # ident LINT # # The `maxusers' parameter controls the static sizing of a number of # internal system tables by a complicated formula defined in param.c. # maxusers 10 # # Certain applications can grow to be larger than the 128M limit # that FreeBSD initially imposes. Below are some options to # allow that limit to grow to 256MB, and can be increased further # with changing the parameters. MAXDSIZ is the maximum that the # limit can be set to, and the DFLDSIZ is the default value for # the limit. You might want to set the default lower than the # max, and explicitly set the maximum with a shell command for processes # that regularly exceed the limit like INND. # options "MAXDSIZ=(256*1024*1024)" options "DFLDSIZ=(256*1024*1024)" # When this is set, be extra conservative in various parts of the kernel # and choose functionality over speed (on the widest variety of systems). options FAILSAFE # This allows you to actually store this configuration file into # the kernel binary itself, where it may be later read by saying: # strings /kernel | grep ^___ | sed -e 's/^___//' > MYKERNEL # options INCLUDE_CONFIG_FILE # Include this file in kernel # # This directive defines a number of things: # - The compiled kernel is to be called `kernel' # - The root filesystem might be on partition wd0a # - Crash dumps will be written to wd0b, if possible. Specifying the # dump device here is not recommended. Use dumpon(8). # config kernel root on wd0 dumps on wd0 ##################################################################### # SMP OPTIONS: # # SMP enables building of a Symmetric MultiProcessor Kernel. # APIC_IO enables the use of the IO APIC for Symmetric I/O. # NCPU sets the number of CPUs, defaults to 2. # NBUS sets the number of busses, defaults to 4. # NAPIC sets the number of IO APICs on the motherboard, defaults to 1. # NINTR sets the total number of INTs provided by the motherboard. # # Notes: # # An SMP kernel will ONLY run on an Intel MP spec. qualified motherboard. # # Be sure to disable 'cpu "I386_CPU"' && 'cpu "I486_CPU"' for SMP kernels. # # Check the 'Rogue SMP hardware' section to see if additional options # are required by your hardware. # # Mandatory: options SMP # Symmetric MultiProcessor Kernel options APIC_IO # Symmetric (APIC) I/O # Optional, these are the defaults plus 1: options NCPU=5 # number of CPUs options NBUS=5 # number of busses options NAPIC=2 # number of IO APICs options NINTR=25 # number of INTs # # Rogue SMP hardware: # # Bridged PCI cards: # # The MP tables of most of the current generation MP motherboards # do NOT properly support bridged PCI cards. To use one of these # cards you should refer to ??? ##################################################################### # CPU OPTIONS # # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make # parts of the system run faster. This is especially true removing # I386_CPU. # cpu "I386_CPU" cpu "I486_CPU" cpu "I586_CPU" # aka Pentium(tm) cpu "I686_CPU" # aka Pentium Pro(tm) # # Options for CPU features. # # CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM # BlueLightning CPU. It works only with Cyrix FPU, and this option # should not be used with Intel FPU. # # CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning # CPU if CPU supports it. The default is double-clock mode on # BlueLightning CPU box. # # CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1). # # CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct # mapped mode. Default is 2-way set associative mode. # # CPU_CYRIX_NO_LOCK enables weak locking for the entire address space # of Cyrix 6x86 and 6x86MX CPUs. If this option is not set and # FAILESAFE is defined, NO_LOCK bit of CCR1 is cleared. (NOTE 3) # # CPU_DISABLE_5X86_LSSER disables load store serialize (i.e. enables # reorder). This option should not be used if you use memory mapped # I/O device(s). # # CPU_FASTER_5X86_FPU enables faster FPU exception handler. # # CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products # for i386 machines. # # CPU_IORT defines I/O clock delay time (NOTE 1). Default vaules of # I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively # (no clock delay). # # CPU_LOOP_EN prevents flushing the prefetch buffer if the destination # of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE # 1). # # CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1). # # CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU # enters suspend mode following execution of HALT instruction. # # CPU_WT_ALLOC enables write-through allocation. # # CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache # flush at hold state. # # CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs # without cache flush at hold state, and (2) write-back CPU cache on # Cyrix 6x86 whose revision < 2.7 (NOTE 2). # # NO_F00F_HACK disables the hack that prevents Pentiums (and ONLY # Pentiums) from locking up when a LOCK CMPXCHG8B instruction is # executed. This should be included for ALL kernels that won't run # on a Pentium. # # NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT, # CPU_LOOP_ENand CPU_RSTK_EN should no be used becasue of CPU bugs. # These options may crash your system. # # NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled # in write-through mode when revision < 2.7. If revision of Cyrix # 6x86 >= 2.7, CPU cache is always enabled in write-back mode. # # NOTE 3: This option may cause failures for software that requires # locked cycles in order to operate correctly. # options "CPU_BLUELIGHTNING_FPU_OP_CACHE" options "CPU_BLUELIGHTNING_3X" options "CPU_BTB_EN" options "CPU_DIRECT_MAPPED_CACHE" options "CPU_DISABLE_5X86_LSSER" options "CPU_FASTER_5X86_FPU" options "CPU_I486_ON_386" options "CPU_IORT" options "CPU_LOOP_EN" options "CPU_RSTK_EN" options "CPU_SUSP_HLT" options "CYRIX_CACHE_WORKS" options "CYRIX_CACHE_REALLY_WORKS" #options "NO_F00F_HACK" # # A math emulator is mandatory if you wish to run on hardware which # does not have a floating-point processor. Pick either the original, # bogus (but freely-distributable) math emulator, or a much more # fully-featured but GPL-licensed emulator taken from Linux. # options MATH_EMULATE #Support for x87 emulation # Don't enable both of these in a real config. options GPL_MATH_EMULATE #Support for x87 emulation via #new math emulator ##################################################################### # COMPATIBILITY OPTIONS # # Implement system calls compatible with 4.3BSD and older versions of # FreeBSD. You probably do NOT want to remove this as much current code # still relies on the 4.3 emulation. # options "COMPAT_43" # # Allow user-mode programs to manipulate their local descriptor tables. # This option is required for the WINE Windows(tm) emulator, and is # not used by anything else (that we know of). # options USER_LDT #allow user-level control of i386 ldt # # These three options provide support for System V Interface # Definition-style interprocess communication, in the form of shared # memory, semaphores, and message queues, respectively. # options SYSVSHM options SYSVSEM options SYSVMSG # # This option includes a MD5 routine in the kernel, this is used for # various authentication and privacy uses. # options "MD5" # # Allow processes to switch to vm86 mode, as well as enabling direct # user-mode access to the I/O port space. This option is necessary for # the doscmd emulator to run. # options "VM86" ##################################################################### # DEBUGGING OPTIONS # # Enable the kernel debugger. # options DDB # # Don't drop into DDB for a panic. Intended for unattended operation # where you may want to drop to DDB from the console, but still want # the machine to recover from a panic # options DDB_UNATTENDED # # If using GDB remote mode to debug the kernel, there's a non-standard # extension to the remote protocol that can be used to use the serial # port as both the debugging port and the system console. It's non- # standard and you're on your own if you enable it. See also the # "remotechat" variables in the FreeBSD specific version of gdb. # options GDB_REMOTE_CHAT # # KTRACE enables the system-call tracing facility ktrace(2). # options KTRACE #kernel tracing # # The DIAGNOSTIC option is used in a number of source files to enable # extra sanity checking of internal structures. This support is not # enabled by default because of the extra time it would take to check # for these conditions, which can only occur as a result of # programming errors. # options DIAGNOSTIC # # PERFMON causes the driver for Pentium/Pentium Pro performance counters # to be compiled. See perfmon(4) for more information. # options PERFMON # # This option let some drivers co-exist that can't co-exist in a running # system. This is used to be able to compile all kernel code in one go for # quality assurance purposes (like this file, which the option takes it name # from.) # options COMPILING_LINT # XXX - this doesn't belong here. # Allow ordinary users to take the console - this is useful for X. options UCONSOLE # XXX - this doesn't belong here either options USERCONFIG #boot -c editor options USERCONFIG_BOOT #imply -c and parse info area options VISUAL_USERCONFIG #visual boot -c editor ##################################################################### # NETWORKING OPTIONS # # Protocol families: # Only the INET (Internet) family is officially supported in FreeBSD. # Source code for the NS (Xerox Network Service) is provided for amusement # value. # options INET #Internet communications protocols options IPX #IPX/SPX communications protocols options IPXIP #IPX in IP encapsulation (not available) options IPTUNNEL #IP in IPX encapsulation (not available) options NETATALK #Appletalk communications protocols # These are currently broken but are shipped due to interest. #options NS #Xerox NS protocols # These are currently broken and are no longer shipped due to lack # of interest. #options CCITT #X.25 network layer #options ISO #options TPIP #ISO TP class 4 over IP #options TPCONS #ISO TP class 0 over X.25 #options LLC #X.25 link layer for Ethernets #options HDLC #X.25 link layer for serial lines #options EON #ISO CLNP over IP #options NSIP #XNS over IP # # Network interfaces: # The `loop' pseudo-device is MANDATORY when networking is enabled. # The `ether' pseudo-device provides generic code to handle # Ethernets; it is MANDATORY when a Ethernet device driver is # configured. # The 'fddi' pseudo-device provides generic code to support FDDI. # The `sppp' pseudo-device serves a similar role for certain types # of synchronous PPP links (like `cx', `ar'). # The `sl' pseudo-device implements the Serial Line IP (SLIP) service. # The `ppp' pseudo-device implements the Point-to-Point Protocol. # The `bpfilter' pseudo-device enables the Berkeley Packet Filter. Be # aware of the legal and administrative consequences of enabling this # option. The number of devices determines the maximum number of # simultaneous BPF clients programs runnable. # The `disc' pseudo-device implements a minimal network interface, # which throws away all packets sent and never receives any. It is # included for testing purposes. # The `tun' pseudo-device implements the User Process PPP (iijppp) # # The PPP_BSDCOMP option enables support for compress(1) style entire # packet compression, the PPP_DEFLATE is for zlib/gzip style compression. # PPP_FILTER enables code for filtering the ppp data stream and selecting # events for resetting the demand dial activity timer - requires bpfilter. # See pppd(8) for more details. # pseudo-device ether #Generic Ethernet pseudo-device fddi #Generic FDDI pseudo-device sppp #Generic Synchronous PPP pseudo-device loop #Network loopback device pseudo-device bpfilter 4 #Berkeley packet filter pseudo-device disc #Discard device pseudo-device tun 1 #Tunnel driver (user process ppp(8)) pseudo-device sl 2 #Serial Line IP pseudo-device ppp 2 #Point-to-point protocol options PPP_BSDCOMP #PPP BSD-compress support options PPP_DEFLATE #PPP zlib/deflate/gzip support options PPP_FILTER #enable bpf filtering (needs bpfilter) # # Internet family options: # # TCP_COMPAT_42 causes the TCP code to emulate certain bugs present in # 4.2BSD. This option should not be used unless you have a 4.2BSD # machine and TCP connections fail. # # MROUTING enables the kernel multicast packet forwarder, which works # with mrouted(8). # # IPFIREWALL enables support for IP firewall construction, in # conjunction with the `ipfw' program. IPFIREWALL_VERBOSE sends # logged packets to the system logger. IPFIREWALL_VERBOSE_LIMIT # limits the number of times a matching entry can be logged. # # WARNING: IPFIREWALL defaults to a policy of "deny ip from any to any" # and if you do not add other rules during startup to allow access, # YOU WILL LOCK YOURSELF OUT. It is suggested that you set firewall=open # in /etc/rc.conf when first enabling this feature, then refining the # firewall rules in /etc/rc.firewall after you've tested that the new kernel # feature works properly. # # IPFIREWALL_DEFAULT_TO_ACCEPT causes the default rule (at boot) to # allow everything. Use with care, if a cracker can crash your # firewall machine, they can get to your protected machines. However, # if you are using it as an as-needed filter for specific problems as # they arise, then this may be for you. Changing the default to 'allow' # means that you won't get stuck if the kernel and /sbin/ipfw binary get # out of sync. # # IPDIVERT enables the divert IP sockets, used by ``ipfw divert'' # # IPFILTER enables Darren Reed's ipfilter package. # IPFILTER_LOG enables ipfilter's logging. # IPFILTER_LKM enables LKM support for an ipfilter module (untested). # # TCPDEBUG is undocumented. # options "TCP_COMPAT_42" #emulate 4.2BSD TCP bugs options MROUTING # Multicast routing options IPFIREWALL #firewall options IPFIREWALL_VERBOSE #print information about # dropped packets options "IPFIREWALL_VERBOSE_LIMIT=100" #limit verbosity options IPFIREWALL_DEFAULT_TO_ACCEPT #allow everything by default options IPDIVERT #divert sockets options IPFILTER #kernel ipfilter support options IPFILTER_LOG #ipfilter logging #options IPFILTER_LKM #kernel support for ip_fil.o LKM options TCPDEBUG ##################################################################### # FILESYSTEM OPTIONS # # Only the root, /usr, and /tmp filesystems need be statically # compiled; everything else will be automatically loaded at mount # time. (Exception: the UFS family---FFS, and MFS --- cannot # currently be demand-loaded.) Some people still prefer to statically # compile other filesystems as well. # # NB: The NULL, PORTAL, UMAP and UNION filesystems are known to be # buggy, and WILL panic your system if you attempt to do anything with # them. They are included here as an incentive for some enterprising # soul to sit down and fix them. # # One of these is mandatory: options FFS #Fast filesystem options NFS #Network File System # The rest are optional: # options NFS_NOSERVER #Disable the NFS-server code. options "CD9660" #ISO 9660 filesystem options FDESC #File descriptor filesystem options KERNFS #Kernel filesystem options MFS #Memory File System options MSDOSFS #MS DOS File System options NULLFS #NULL filesystem options PORTAL #Portal filesystem options PROCFS #Process filesystem options UMAPFS #UID map filesystem options UNION #Union filesystem options "CD9660_ROOT" #CD-ROM usable as root device options FFS_ROOT #FFS usable as root device options NFS_ROOT #NFS usable as root device # This DEVFS is experimental but seems to work options DEVFS #devices filesystem # Allow the FFS to use Softupdates technology. # To do this you need to fetch the two files # /sys/ufs/ffs/softdep.h and /sys/ufs/ffs/ffs_softdep.c # from freebsd.org and understand the licensing restrictions. #options SOFTUPDATES # (we can't actually enable it because the files may not be present) # Make space in the kernel for a MFS root filesystem. Define to the number # of kilobytes to reserve for the filesystem. options MFS_ROOT=10 # Allow the MFS_ROOT code to load the MFS image from floppy if it is missing. options MFS_AUTOLOAD # Allow this many swap-devices. options NSWAPDEV=20 # Disk quotas are supported when this option is enabled. If you # change the value of this option, you must do a `make clean' in your # kernel compile directory in order to get a working kernel. # options QUOTA #enable disk quotas # Add more checking code to various filesystems #options NULLFS_DIAGNOSTIC #options KERNFS_DIAGNOSTIC #options UMAPFS_DIAGNOSTIC #options UNION_DIAGNOSTIC # In particular multi-session CD-Rs might require a huge amount of # time in order to "settle". If we are about mounting them as the # root f/s, we gotta wait a little. # # The number is supposed to be in seconds. options "CD9660_ROOTDELAY=20" # If you are running a machine just as a fileserver for PC and MAC users. # (using SAMBA or Netatalk), then you may consider setting this option # and keeping all those user's directories on a partition that is mounted # with the suiddir option. This gives new files the same ownership as # the directory (similiar to group). It's a security hole if you let # these users run programs so confine it to file-servers, (but it'll save you # lots of headaches in that case). Root owned directories are excempt and X bits # are cleared. the suid bit must be set on the directory as well. see chmod(1) # PC owners can't see/set ownerships so they keep getting their toes # trodden on. This saves you all the support calls as the filesystem # it's used on will act as they expect. ("It's my dir so it must be my file"). # options SUIDDIR # Add some error checking code to the null_bypass routine # in the NULL filesystem #options SAFETY ##################################################################### # SCSI DEVICES # SCSI DEVICE CONFIGURATION # The SCSI subsystem consists of the `base' SCSI code, a number of # high-level SCSI device `type' drivers, and the low-level host-adapter # device drivers. The host adapters are listed in the ISA and PCI # device configuration sections below. # # Beginning with FreeBSD 2.0.5 you can wire down your SCSI devices so # that a given bus, target, and LUN always come on line as the same # device unit. In earlier versions the unit numbers were assigned # in the order that the devices were probed on the SCSI bus. This # means that if you removed a disk drive, you may have had to rewrite # your /etc/fstab file, and also that you had to be careful when adding # a new disk as it may have been probed earlier and moved your device # configuration around. # This old behavior is maintained as the default behavior. The unit # assignment begins with the first non-wired down unit for a device # type. For example, if you wire a disk as "sd3" then the first # non-wired disk will be assigned sd4. # The syntax for wiring down devices is: # controller scbus0 at ahc0 # Single bus device # controller scbus1 at ahc1 bus 0 # Single bus device # controller scbus3 at ahc2 bus 0 # Twin bus device # controller scbus2 at ahc2 bus 1 # Twin bus device # disk sd0 at scbus0 target 0 unit 0 # disk sd1 at scbus3 target 1 # disk sd2 at scbus2 target 3 # tape st1 at scbus1 target 6 # device cd0 at scbus? # "units" (SCSI logical unit number) that are not specified are # treated as if specified as LUN 0. # All SCSI devices allocate as many units as are required. # The "unknown" device (uk? in pre-2.0.5) is now part of the base SCSI # configuration and doesn't have to be explicitly configured. controller scbus0 #base SCSI code device ch0 #SCSI media changers device sd0 #SCSI disks device st0 #SCSI tapes device cd0 #SCSI CD-ROMs device od0 #SCSI optical disk # The previous devices (ch, sd, st, cd) are recognized by config. # config doesn't (and shouldn't) know about these newer ones, # so we have to specify that they are on a SCSI bus with the "at scbus?" # clause. device worm0 at scbus? # SCSI worm device pt0 at scbus? # SCSI processor type device sctarg0 at scbus? # SCSI target # SCSI OPTIONS: # SCSIDEBUG: When defined enables debugging macros # NO_SCSI_SENSE: When defined disables sense descriptions (about 4k) # SCSI_REPORT_GEOMETRY: Always report disk geometry at boot up instead # of only when booting verbosely. options SCSIDEBUG #options NO_SCSI_SENSE options SCSI_REPORT_GEOMETRY # Options for the `od' optical disk driver: # # If drive returns sense key as 0x02 with vendor specific additional # sense code (ASC) and additional sense code qualifier (ASCQ), or # illegal ASC and ASCQ. This cause an error (NOT READY) and retrying. # To suppress this, use the following option. # options OD_BOGUS_NOT_READY # # For an automatic spindown, try this. Again, preferably as an # option in your config file. # WARNING! Use at your own risk. Joerg's ancient SONY SMO drive # groks it fine, while Shunsuke's Fujitsu chokes on it and times # out. # options OD_AUTO_TURNOFF ##################################################################### # POSIX P1003.1B # Real time extensions added int the 1993 Posix # P1003_1B: Infrastructure # _KPOSIX_PRIORITY_SCHEDULING: Build in _POSIX_PRIORITY_SCHEDULING # _KPOSIX_VERSION: Version kernel is built for options "P1003_1B" options "_KPOSIX_PRIORITY_SCHEDULING" options "_KPOSIX_VERSION=199309L" ##################################################################### # MISCELLANEOUS DEVICES AND OPTIONS # The `pty' device usually turns out to be ``effectively mandatory'', # as it is required for `telnetd', `rlogind', `screen', `emacs', and # `xterm', among others. pseudo-device pty 16 #Pseudo ttys - can go as high as 256 pseudo-device speaker #Play IBM BASIC-style noises out your speaker pseudo-device gzip #Exec gzipped a.out's pseudo-device vn #Vnode driver (turns a file into a device) pseudo-device snp 3 #Snoop device - to look at pty/vty/etc.. pseudo-device ccd 4 #Concatenated disk driver # These are only for watching for bitrot in old tty code. # broken #pseudo-device tb # These are only for watching for bitrot in old SCSI code. pseudo-device su #scsi user pseudo-device ssc #super scsi ##################################################################### # HARDWARE DEVICE CONFIGURATION # ISA and EISA devices: # EISA support is available for some device, so they can be auto-probed. # Micro Channel is not supported at all. # # Mandatory ISA devices: isa, npx # controller isa0 # # Options for `isa': # # AUTO_EOI_1 enables the `automatic EOI' feature for the master 8259A # interrupt controller. This saves about 0.7-1.25 usec for each interrupt. # This option breaks suspend/resume on some portables. # # AUTO_EOI_2 enables the `automatic EOI' feature for the slave 8259A # interrupt controller. This saves about 0.7-1.25 usec for each interrupt. # Automatic EOI is documented not to work for for the slave with the # original i8259A, but it works for some clones and some integrated # versions. # # BOUNCE_BUFFERS provides support for ISA DMA on machines with more # than 16 megabytes of memory. It doesn't hurt on other machines. # Some broken EISA and VLB hardware may need this, too. # # MAXMEM specifies the amount of RAM on the machine; if this is not # specified, FreeBSD will first read the amount of memory from the CMOS # RAM, so the amount of memory will initially be limited to 64MB or 16MB # depending on the BIOS. If the BIOS reports 64MB, a memory probe will # then attempt to detect the installed amount of RAM. If this probe # fails to detect >64MB RAM you will have to use the MAXMEM option. # The amount is in kilobytes, so for a machine with 128MB of RAM, it would # be 131072 (128 * 1024). # # TUNE_1542 enables the automatic ISA bus speed selection for the # Adaptec 1542 boards. Does not work for all boards, use it with caution. # # BROKEN_KEYBOARD_RESET disables the use of the keyboard controller to # reset the CPU for reboot. This is needed on some systems with broken # keyboard controllers. # # PAS_JOYSTICK_ENABLE enables the gameport on the ProAudio Spectrum options "AUTO_EOI_1" #options "AUTO_EOI_2" options BOUNCE_BUFFERS options "MAXMEM=(128*1024)" options "TUNE_1542" #options BROKEN_KEYBOARD_RESET #options PAS_JOYSTICK_ENABLE # Enable support for the kernel PLL to use an external PPS signal, # under supervision of [x]ntpd(8) # More info in ftp://ftp.udel.edu/pub/ntp/kernel.tar.Z options PPS_SYNC # Enable PnP support in the kernel. This allows you to automaticly # attach to PnP cards for drivers that support it and allows you to # configure cards from USERCONFIG. See pnp(4) for more info. controller pnp0 # The pcvt console driver (vt220 compatible). device vt0 at isa? port "IO_KBD" tty irq 1 vector pcrint options XSERVER # support for running an X server. options FAT_CURSOR # start with block cursor # This PCVT option is for keyboards such as those used on IBM ThinkPad laptops options PCVT_SCANSET=2 # IBM keyboards are non-std # The syscons console driver (sco color console compatible). device sc0 at isa? port "IO_KBD" tty irq 1 vector scintr options MAXCONS=16 # number of virtual consoles options SLOW_VGA # do byte-wide i/o's to TS and GDC regs options "STD8X16FONT" # Compile font in makeoptions "STD8X16FONT"="cp850" options SC_HISTORY_SIZE=200 # number of history buffer lines options SC_DISABLE_REBOOT # disable reboot key sequence # # `flags' for sc0: # 0x01 Use a 'visual' bell # 0x02 Use a 'blink' cursor # 0x04 Use a 'underline' cursor # 0x06 Use a 'blinking underline' (destructive) cursor # 0x08 Force detection of keyboard, else we always assume a keyboard # 0x10 Old-style (XT) keyboard support, useful for older ThinkPads # 0x20 Don't reset keyboard, useful for some newer ThinkPads # # The Numeric Processing eXtension driver. This should be configured if # your machine has a math co-processor, unless the coprocessor is very # buggy. If it is not configured then you *must* configure math emulation # (see above). If both npx0 and emulation are configured, then only npx0 # is used (provided it works). device npx0 at isa? port "IO_NPX" iosiz 0x0 flags 0x0 irq 13 vector npxintr # # `flags' for npx0: # 0x01 don't use the npx registers to optimize bcopy # 0x02 don't use the npx registers to optimize bzero # 0x04 don't use the npx registers to optimize copyin or copyout. # The npx registers are normally used to optimize copying and zeroing when # all of the following conditions are satisfied: # "I586_CPU" is an option # the cpu is an i586 (perhaps not a Pentium) # the probe for npx0 succeeds # INT 16 exception handling works. # Then copying and zeroing using the npx registers is normally 30-100% faster. # The flags can be used to control cases where it doesn't work or is slower. # Setting them at boot time using userconfig works right (the optimizations # are not used until later in the bootstrap when npx0 is attached). # # # `iosiz' for npx0: # This can be used instead of the MAXMEM option to set the memory size. If # it is nonzero, then it overrides both the MAXMEM option and the memory # size reported by the BIOS. Setting it at boot time using userconfig takes # effect on the next reboot after the change has been recorded in the kernel # binary (the size is used early in the boot before userconfig has a chance # to change it). # # # Optional ISA and EISA devices: # # # SCSI host adapters: `aha', `aic', `bt', `nca' # # aha: Adaptec 154x # ahc: Adaptec 274x/284x/294x # aic: Adaptec 152x and sound cards using the Adaptec AIC-6360 (slow!) # bt: Most Buslogic controllers # nca: ProAudioSpectrum cards using the NCR 5380 or Trantor T130 # uha: UltraStore 14F and 34F # sea: Seagate ST01/02 8 bit controller (slow!) # wds: Western Digital WD7000 controller (no scatter/gather!). # # Note that the order is important in order for Buslogic cards to be # probed correctly. # controller bt0 at isa? port "IO_BT0" bio irq ? vector bt_isa_intr controller aha0 at isa? port "IO_AHA0" bio irq ? drq 5 vector ahaintr controller uha0 at isa? port "IO_UHA0" bio irq ? drq 5 vector uhaintr controller aic0 at isa? port 0x340 bio irq 11 vector aicintr controller nca0 at isa? port 0x1f88 bio irq 10 vector ncaintr controller nca1 at isa? port 0x1f84 controller nca2 at isa? port 0x1f8c controller nca3 at isa? port 0x1e88 controller nca4 at isa? port 0x350 bio irq 5 vector ncaintr controller sea0 at isa? bio irq 5 iomem 0xdc000 iosiz 0x2000 vector seaintr controller wds0 at isa? port 0x350 bio irq 15 drq 6 vector wdsintr # # ST-506, ESDI, and IDE hard disks: `wdc' and `wd' # # The flags fields are used to enable the multi-sector I/O and # the 32BIT I/O modes. The flags may be used in either the controller # definition or in the individual disk definitions. The controller # definition is supported for the boot configuration stuff. # # Each drive has a 16 bit flags value defined: # The low 8 bits are the maximum value for the multi-sector I/O, # where 0xff defaults to the maximum that the drive can handle. # The high bit of the 16 bit flags (0x8000) allows probing for # 32 bit transfers. Bit 14 (0x4000) enables a hack to wake # up powered-down laptop drives. Bit 13 (0x2000) allows # probing for PCI IDE DMA controllers, such as Intel's PIIX # south bridges. Bit 12 (0x1000) sets LBA mode instead of the # default CHS mode for accessing the drive. See the wd.4 man page. # # The flags field for the drives can be specified in the controller # specification with the low 16 bits for drive 0, and the high 16 bits # for drive 1. # e.g.: #controller wdc0 at isa? port "IO_WD1" bio irq 14 flags 0x00ff8004 vector wdintr # # specifies that drive 0 will be allowed to probe for 32 bit transfers and # a maximum multi-sector transfer of 4 sectors, and drive 1 will not be # allowed to probe for 32 bit transfers, but will allow multi-sector # transfers up to the maximum that the drive supports. # # If you are using a PCI controller that is not running in compatibility # mode (for example, it is a 2nd IDE PCI interface), then use config line(s) # such as: # #controller wdc2 at isa? port "0" bio irq ? flags 0xa0ffa0ff vector wdintr #disk wd4 at wdc2 drive 0 #disk wd5 at wdc2 drive 1 # #controller wdc3 at isa? port "0" bio irq ? flags 0xa0ffa0ff vector wdintr #disk wd6 at wdc3 drive 0 #disk wd7 at wdc3 drive 1 # # Note that the above config would be useful for a Promise card, when used # on a MB that already has a PIIX controller. Note the bogus irq and port # entries. These are automatically filled in by the IDE/PCI support. # controller wdc0 at isa? port "IO_WD1" bio irq 14 vector wdintr disk wd0 at wdc0 drive 0 disk wd1 at wdc0 drive 1 controller wdc1 at isa? port "IO_WD2" bio irq 15 vector wdintr disk wd2 at wdc1 drive 0 disk wd3 at wdc1 drive 1 # # Options for `wdc': # # CMD640 enables serializing access to primary and secondary channel # of the CMD640B IDE Chip. The serializing will only take place # if this option is set *and* the chip is probed by the pci-system. # options "CMD640" #Enable work around for CMD640 h/w bug # # ATAPI enables the support for ATAPI-compatible IDE devices # options ATAPI #Enable ATAPI support for IDE bus options ATAPI_STATIC #Don't do it as an LKM # IDE CD-ROM driver - requires wdc controller and ATAPI option device wcd0 # IDE floppy driver - requires wdc controller and ATAPI option device wfd0 # # Standard floppy disk controllers and floppy tapes: `fdc', `fd', and `ft' # controller fdc0 at isa? port "IO_FD1" bio irq 6 drq 2 vector fdintr # # FDC_DEBUG enables floppy debugging. Since the debug output is huge, you # gotta turn it actually on by setting the variable fd_debug with DDB, # however. options FDC_DEBUG # This option is undocumented on purpose. options FDC_PRINT_BOGUS_CHIPTYPE # # Activate this line instead of the fdc0 line above if you happen to # have an Insight floppy tape. Probing them proved to be dangerous # for people with floppy disks only, so it's "hidden" behind a flag: #controller fdc0 at isa? port "IO_FD1" bio flags 1 irq 6 drq 2 vector fdintr disk fd0 at fdc0 drive 0 disk fd1 at fdc0 drive 1 tape ft0 at fdc0 drive 2 # # Other standard PC hardware: `lpt', `mse', `psm', `sio', etc. # # lpt: printer port # lpt specials: # port can be specified as ?, this will cause the driver to scan # the BIOS port list; # the irq and vector clauses may be omitted, this # will force the port into polling mode. # mse: Logitech and ATI InPort bus mouse ports # psm: PS/2 mouse port [note: conflicts with sc0/vt0, thus "conflicts" keywd] # sio: serial ports (see sio(4)) device lpt0 at isa? port? tty irq 7 vector lptintr device lpt1 at isa? port "IO_LPT3" tty irq 5 vector lptintr device mse0 at isa? port 0x23c tty irq 5 vector mseintr device psm0 at isa? port "IO_KBD" conflicts tty irq 12 vector psmintr # Options for psm: options PSM_HOOKAPM #hook the APM resume event, useful #for some laptops options PSM_RESETAFTERSUSPEND #reset the device at the resume event device sio0 at isa? port "IO_COM1" tty flags 0x10 irq 4 vector siointr # # `flags' for serial drivers that support consoles (only for sio now): # 0x10 enable console support for this unit. The other console flags # are ignored unless this is set. Enabling console support does # not make the unit the preferred console - boot with -h or set # the 0x20 flag for that. Currently, at most one unit can have # console support; the first one (in config file order) with # this flag set is preferred. Setting this flag for sio0 gives # the old behaviour. # 0x20 force this unit to be the console (unless there is another # higher priority console). This replaces the COMCONSOLE option. # 0x40 reserve this unit for low level console operations. Do not # # PnP `flags' (set via userconfig using pnp x flags y) # 0x1 disable probing of this device. Used to prevent your modem # from being attached as a PnP modem. # # Options for serial drivers that support consoles (only for sio now): options BREAK_TO_DEBUGGER #a BREAK on a comconsole goes to #DDB, if available. options CONSPEED=9600 #default speed for serial console (default 9600) # Options for sio: options COM_ESP #code for Hayes ESP options COM_MULTIPORT #code for some cards with shared IRQs options DSI_SOFT_MODEM #code for DSI Softmodems options "EXTRA_SIO=2" #number of extra sio ports to allocate # Other flags for sio that aren't documented in the man page. # 0x20000 enable hardware RTS/CTS and larger FIFOs. Only works for # ST16650A-compatible UARTs. # # Network interfaces: `cx', `ed', `el', `ep', `ie', `is', `le', `lnc' # # ar: Arnet SYNC/570i hdlc sync 2/4 port V.35/X.21 serial driver (requires sppp) # cx: Cronyx/Sigma multiport sync/async (with Cisco or PPP framing) # ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503 # el: 3Com 3C501 (slow!) # ep: 3Com 3C509 (buggy) # fe: Fujitsu MB86960A/MB86965A Ethernet # ie: AT&T StarLAN 10 and EN100; 3Com 3C507; unknown NI5210; Intel EtherExpress # le: Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100, # DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422) # lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL) # sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp) # wl: Lucent Wavelan (ISA card only). # ze: IBM/National Semiconductor PCMCIA ethernet controller. # zp: 3Com PCMCIA Etherlink III (It does not require shared memory for # send/receive operation, but it needs 'iomem' to read/write the # attribute memory) # device ar0 at isa? port 0x300 net irq 10 iomem 0xd0000 vector arintr device cx0 at isa? port 0x240 net irq 15 drq 7 vector cxintr device ed0 at isa? port 0x280 net irq 5 iomem 0xd8000 vector edintr device eg0 at isa? port 0x310 net irq 5 vector egintr device el0 at isa? port 0x300 net irq 9 vector elintr device ep0 at isa? port 0x300 net irq 10 vector epintr device ex0 at isa? port? net irq? vector exintr device fe0 at isa? port 0x300 net irq ? vector feintr device ie0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector ieintr device ie1 at isa? port 0x360 net irq 7 iomem 0xd0000 vector ieintr device le0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector le_intr device lnc0 at isa? port 0x300 net irq 10 drq 0 vector lncintr device sr0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector srintr options WLCACHE # enables the signal-strength cache options WLDEBUG # enables verbose debugging output device wl0 at isa? port 0x300 net irq ? vector wlintr # We can (bogusly) include both the dedicated PCCARD drivers and the generic # support when COMPILING_LINT. device ze0 at isa? port 0x300 net irq 5 iomem 0xd8000 vector zeintr device zp0 at isa? port 0x300 net irq 10 iomem 0xd8000 vector zpintr # # ATM related options # # The `en' device provides support for Efficient Networks (ENI) # ENI-155 PCI midway cards, and the Adaptec 155Mbps PCI ATM cards (ANA-59x0). # # atm pseudo-device provides generic atm functions and is required for # atm devices. # NATM enables the netnatm protocol family that can be used to # bypass TCP/IP. # # the current driver supports only PVC operations (no atm-arp, no multicast). # for more details, please read the original documents at # http://www.ccrc.wustl.edu/pub/chuck/bsdatm/wucs.html # pseudo-device atm device en0 device en1 options NATM #native ATM # # Audio drivers: `snd', `sb', `pas', `gus', `pca' # # snd: Voxware sound support code # sb: SoundBlaster PCM - SoundBlaster, SB Pro, SB16, ProAudioSpectrum # sbxvi: SoundBlaster 16 # sbmidi: SoundBlaster 16 MIDI interface # pas: ProAudioSpectrum PCM and MIDI # gus: Gravis Ultrasound - Ultrasound, Ultrasound 16, Ultrasound MAX # gusxvi: Gravis Ultrasound 16-bit PCM (do not use) # mss: Microsoft Sound System # css: Crystal Sound System (CSS 423x PnP) # sscape: Ensoniq Soundscape MIDI interface # sscape_mss: Ensoniq Soundscape PCM (requires sscape) # opl: Yamaha OPL-2 and OPL-3 FM - SB, SB Pro, SB 16, ProAudioSpectrum # uart: stand-alone 6850 UART for MIDI # mpu: Roland MPU-401 stand-alone card # # Beware! The addresses specified below are also hard-coded in # i386/isa/sound/sound_config.h. If you change the values here, you # must also change the values in the include file. # # pcm: PCM audio through various sound cards. # # This is the work in progress from Luigi Rizzo. This has support for # CS423x based cards, OPTi931, SB16 PnP, GusPnP. For more information # about this driver, take a look at sys/i386/isa/snd/README. # # The flags of the device tells the device a bit more info about the # device that normally is obtained through the PnP interface. # bit 2..0 secondary DMA channel; # bit 4 set if the board uses two dma channels; # bit 15..8 board type, overrides autodetection; leave it # zero if don't know what to put in (and you don't, # since this is unsupported at the moment...). # # This driver will use the new PnP code if it's available. # # pca: PCM audio through your PC speaker # # If you have a GUS-MAX card and want to use the CS4231 codec on the # card the drqs for the gus max must be 8 bit (1, 2, or 3). # # If you would like to use the full duplex option on the gus, then define # flags to be the ``read dma channel''. # # options BROKEN_BUS_CLOCK #PAS-16 isn't working and OPTI chipset # options SYMPHONY_PAS #PAS-16 isn't working and SYMPHONY chipset # options EXCLUDE_SBPRO #PAS-16 # options SBC_IRQ=5 #PAS-16. Must match irq on sb0 line. # PAS16: The order of the pas0/sb0/opl0 is important since the # sb emulation is enabled in the pas-16 attach. # # The i386/isa/sound/sound.doc has more information. # Controls all "VOXWARE" driver sound devices. See Luigi's driver # below for an alternate which may work better for some cards. # controller snd0 device pas0 at isa? port 0x388 irq 10 drq 6 vector pasintr device sb0 at isa? port 0x220 irq 5 drq 1 vector sbintr device sbxvi0 at isa? drq 5 device sbmidi0 at isa? port 0x330 device awe0 at isa? port 0x620 device gus0 at isa? port 0x220 irq 12 drq 1 vector gusintr #device gus0 at isa? port 0x220 irq 12 drq 1 flags 0x3 vector gusintr device mss0 at isa? port 0x530 irq 10 drq 1 vector adintr device css0 at isa? port 0x534 irq 5 drq 1 flags 0x08 vector adintr device sscape0 at isa? port 0x330 irq 9 drq 0 vector sscapeintr device trix0 at isa? port 0x330 irq 6 drq 0 vector sscapeintr device sscape_mss0 at isa? port 0x534 irq 5 drq 1 vector sndintr device opl0 at isa? port 0x388 device mpu0 at isa? port 0x330 irq 6 drq 0 device uart0 at isa? port 0x330 irq 5 vector "m6850intr" # Luigi's snd code (use INSTEAD of snd0 and all VOXWARE drivers!). # You may also wish to enable the pnp controller with this, for pnp # sound cards. # #device pcm0 at isa? port ? tty irq 10 drq 1 flags 0x0 vector pcmintr # Not controlled by `snd' device pca0 at isa? port IO_TIMER1 tty # # Miscellaneous hardware: # # mcd: Mitsumi CD-ROM # scd: Sony CD-ROM # matcd: Matsushita/Panasonic CD-ROM # wt: Wangtek and Archive QIC-02/QIC-36 tape drives # ctx: Cortex-I frame grabber # apm: Laptop Advanced Power Management (experimental) # spigot: The Creative Labs Video Spigot video-acquisition board # meteor: Matrox Meteor video capture board # alog: Industrial Computer Source AIO8-P driver # bktr: Bt848 capture boards (http://www.freebsd.org/~fsmp/HomeAuto/Bt848.html) # cy: Cyclades serial driver # dgb: Digiboard PC/Xi and PC/Xe series driver (ALPHA QUALITY!) # gp: National Instruments AT-GPIB and AT-GPIB/TNT board # asc: GI1904-based hand scanners, e.g. the Trust Amiscan Grey # gsc: Genius GS-4500 hand scanner. # joy: joystick # labpc: National Instrument's Lab-PC and Lab-PC+ # rc: RISCom/8 multiport card # rp: Comtrol Rocketport(ISA) - single card # tw: TW-523 power line interface for use with X-10 home control products # si: Specialix SI/XIO 4-32 port terminal multiplexor # stl: Stallion EasyIO and EasyConnection 8/32 (cd1400 based) # stli: Stallion EasyConnection 8/64, ONboard, Brumby (intelligent) # # Notes on APM # The flags takes the following meaning for apm0: # 0x0020 Statclock is broken. # 0x0011 Limit APM protocol to 1.1 or 1.0 # 0x0010 Limit APM protocol to 1.0 # # # Notes on the spigot: # The video spigot is at 0xad6. This port address can not be changed. # The irq values may only be 10, 11, or 15 # I/O memory is an 8kb region. Possible values are: # 0a0000, 0a2000, ..., 0fffff, f00000, f02000, ..., ffffff # The start address must be on an even boundary. # Add the following option if you want to allow non-root users to be able # to access the spigot. This option is not secure because it allows users # direct access to the I/O page. # options SPIGOT_UNSECURE # # Notes on the Comtrol Rocketport driver: # # The exact values used for rp0 depend on how many boards you have # in the system. The manufacturer's sample configs are listed as: # # Comtrol Rocketport ISA single card # device rp0 at isa? port 0x280 tty # # If instead you have two ISA cards, one installed at 0x100 and the # second installed at 0x180, then you should add the following to # your kernel configuration file: # # device rp0 at isa? port 0x100 tty # device rp1 at isa? port 0x180 tty # # For 4 ISA cards, it might be something like this: # # device rp0 at isa? port 0x180 tty # device rp1 at isa? port 0x100 tty # device rp2 at isa? port 0x340 tty # device rp3 at isa? port 0x240 tty # # And for PCI cards, you only need say: # # device rp0 # device rp1 # ... # Note: Make sure that any Rocketport PCI devices are specified BEFORE the # ISA Rocketport devices. # Notes on the Digiboard driver: # # The following flag values have special meanings: # 0x01 - alternate layout of pins # 0x02 - use the windowed PC/Xe in 64K mode # Notes on the Specialix SI/XIO driver: # **This is NOT a Specialix supported Driver!** # The host card is memory, not IO mapped. # The Rev 1 host cards use a 64K chunk, on a 32K boundary. # The Rev 2 host cards use a 32K chunk, on a 32K boundary. # The cards can use an IRQ of 11, 12 or 15. # Notes on the Stallion stl and stli drivers: # See src/i386/isa/README.stl for complete instructions. # This is version 0.0.5alpha, unsupported by Stallion. # The stl driver has a secondary IO port hard coded at 0x280. You need # to change src/i386/isa/stallion.c if you reconfigure this on the boards. # The "flags" and "iosiz" settings on the stli driver depend on the board: # EasyConnection 8/64 ISA: flags 23 iosiz 0x1000 # EasyConnection 8/64 EISA: flags 24 iosiz 0x10000 # EasyConnection 8/64 MCA: flags 25 iosiz 0x1000 # ONboard ISA: flags 4 iosiz 0x10000 # ONboard EISA: flags 7 iosiz 0x10000 # ONboard MCA: flags 3 iosiz 0x10000 # Brumby: flags 2 iosiz 0x4000 # Stallion: flags 1 iosiz 0x10000 device mcd0 at isa? port 0x300 bio irq 10 vector mcdintr # for the Sony CDU31/33A CDROM device scd0 at isa? port 0x230 bio # for the SoundBlaster 16 multicd - up to 4 devices controller matcd0 at isa? port 0x230 bio device wt0 at isa? port 0x300 bio irq 5 drq 1 vector wtintr device ctx0 at isa? port 0x230 iomem 0xd0000 device spigot0 at isa? port 0xad6 irq 15 iomem 0xee000 vector spigintr device apm0 at isa? device gp0 at isa? port 0x2c0 tty device gsc0 at isa? port "IO_GSC1" tty drq 3 device joy0 at isa? port "IO_GAME" device alog0 at isa? port 0x260 tty irq 5 vector alogintr device cy0 at isa? tty irq 10 iomem 0xd4000 iosiz 0x2000 vector cyintr device dgb0 at isa? port 0x220 iomem 0xfc0000 iosiz ? tty device labpc0 at isa? port 0x260 tty irq 5 vector labpcintr device rc0 at isa? port 0x220 tty irq 12 vector rcintr device rp0 at isa? port 0x280 tty # the port and irq for tw0 are fictitious device tw0 at isa? port 0x380 tty irq 11 vector twintr device si0 at isa? iomem 0xd0000 tty irq 12 device asc0 at isa? port IO_ASC1 tty drq 3 irq 10 vector ascintr device bqu0 at isa? port 0x150 device stl0 at isa? port 0x2a0 tty irq 10 vector stlintr device stli0 at isa? port 0x2a0 tty iomem 0xcc000 flags 23 iosiz 0x1000 device loran0 at isa? port ? tty irq 5 vector loranintr # # EISA devices: # # The EISA bus device is eisa0. It provides auto-detection and # configuration support for all devices on the EISA bus. # # The `ahb' device provides support for the Adaptec 174X adapter. # # The `ahc' device provides support for the Adaptec 274X and 284X # adapters. The 284X, although a VLB card responds to EISA probes. # # fea: DEC DEFEA EISA FDDI adapter # controller eisa0 controller ahb0 controller ahc0 device fea0 # enable tagged command queuing, which is a major performance win on # devices that support it (and controllers with enough SCB's) options AHC_TAGENABLE # enable SCB paging - See the ahc.4 man page options AHC_SCBPAGING_ENABLE # The aic7xxx driver will attempt to use memory mapped I/O for all PCI # controllers that have it configured only if this option is set. Unfortunately, # this doesn't work on some motherboards, which prevents it from being the # default. options AHC_ALLOW_MEMIO # By default, only 10 EISA slots are probed, since the slot numbers # above clash with the configuration address space of the PCI subsystem, # and the EISA probe is not very smart about this. This is sufficient # for most machines, but in particular the HP NetServer LC series comes # with an onboard AIC7770 dual-channel SCSI controller on EISA slot #11, # thus you need to bump this figure to 12 for them. options "EISA_SLOTS=12" # # PCI devices: # # The main PCI bus device is `pci'. It provides auto-detection and # configuration support for all devices on the PCI bus, using either # configuration mode defined in the PCI specification. # # The `ahc' device provides support for the Adaptec 29/3940(U)(W) # and motherboard based AIC7870/AIC7880 adapters. # # The `ncr' device provides support for the NCR 53C810 and 53C825 # self-contained SCSI host adapters. # # The `amd' device provides support for the Tekram DC-390 and 390T # SCSI host adapters, but is expected to work with any AMD 53c974 # PCI SCSI chip and the AMD Ethernet+SCSI Combo chip, after some # local patches were applied to the sources (that had originally # been written by Tekram and limited to work with their SCSI cards). # # The `de' device provides support for the Digital Equipment DC21040 # self-contained Ethernet adapter. # # The `fxp' device provides support for the Intel EtherExpress Pro/100B # PCI Fast Ethernet adapters. # # The `tx' device provides support for the SMC 9432TX cards. # # The `vx' device provides support for the 3Com 3C590 and 3C595 # early support # # The `fpa' device provides support for the Digital DEFPA PCI FDDI # adapter. pseudo-device fddi is also needed. # # The `meteor' device is a PCI video capture board. It can also have the # following options: # options METEOR_ALLOC_PAGES=xxx preallocate kernel pages for data entry # figure (ROWS*COLUMN*BYTES_PER_PIXEL*FRAME+PAGE_SIZE-1)/PAGE_SIZE # options METEOR_DEALLOC_PAGES remove all allocated pages on close(2) # options METEOR_DEALLOC_ABOVE=xxx remove all allocated pages above the # specified amount. If this value is below the allocated amount no action # taken # option METEOR_SYSTEM_DEFAULT={METEOR_PAL|METEOR_NTSC|METEOR_SECAM}, used # for initialization of fps routine when a signal is not present. # # The 'bktr' device is a PCI video capture board. It also has a TV tuner -# on board. +# on board. To override the tuner detection use +# options OVERRIDE_TUNER=x +# The current values are found in /usr/src/sys/pci/brooktree848.c +# # controller pci0 controller ahc1 controller ncr0 controller amd0 device de0 device fxp0 device tx0 device vx0 device fpa0 device meteor0 device bktr0 # # PCCARD/PCMCIA # # card: slot controller # pcic: slots controller card0 device pcic0 at card? device pcic1 at card? # # Laptop/Notebook options: # # See also: # apm under `Miscellaneous hardware' # above. # For older notebooks that signal a powerfail condition (external # power supply dropped, or battery state low) by issuing an NMI: options POWERFAIL_NMI # make it beep instead of panicing # # Parallel-Port Bus # # Parallel port bus support is provided by the `ppbus' device. # Multiple devices may be attached to the parallel port, devices # are automatically probed and attached when found. # # Supported devices: # vpo Iomega Zip Drive # Requires SCSI disk support ('scbus' and 'sd'), best # performance is achieved with ports in EPP 1.9 mode. # nlpt Parallel Printer # ppi General-purpose I/O ("Geek Port") # # Supported interfaces: # ppc ISA-bus parallel port interfaces. # controller ppbus0 controller vpo0 at ppbus? device nlpt0 at ppbus? device ppi0 at ppbus? device pps0 at ppbus? controller ppc0 at isa? disable port ? irq 7 vector ppcintr # Kernel BOOTP support options BOOTP # Use BOOTP to obtain IP address/hostname options BOOTP_NFSROOT # NFS mount root filesystem using BOOTP info options "BOOTP_NFSV3" # Use NFS v3 to NFS mount root options BOOTP_COMPAT # Workaround for broken bootp daemons. options "BOOTP_WIRED_TO=fxp0" # Use interface fxp0 for BOOTP # # An obsolete option to test kern_opt.c. # options GATEWAY # If you want to disable loadable kernel modules (LKM), you # might want to use this option. #options NO_LKM # # Add tie-ins for a hardware watchdog. This only enable the hooks; # the user must still supply the actual driver. # options HW_WDOG # # Set the number of PV entries per process. Increasing this can # stop panics related to heavy use of shared memory. However, that can # (combined with large amounts of physical memory) cause panics at # boot time due the kernel running out of VM space. # # If you're tweaking this, you might also want to increase the sysctls # "vm.v_free_min", "vm.v_free_reserved", and "vm.v_free_target". # # The value below is the one more than the default. # options "PMAP_SHPGPERPROC=201" # More undocumented options for linting. options CLK_CALIBRATION_LOOP options "CLK_USE_I8254_CALIBRATION" options CLK_USE_TSC_CALIBRATION options CLUSTERDEBUG options COMPAT_LINUX options CPU_UPGRADE_HW_CACHE options DEBUG options "DEBUG_1284" options DEVFS_ROOT #options DISABLE_PSE options "EXT2FS" options "I586_PMC_GUPROF=0x70000" options "IBCS2" # broken: #options IPFILTER options KEY options KEY_DEBUG options LOCKF_DEBUG options LOUTB options KBD_MAXRETRY=4 options KBD_MAXWAIT=6 options KBD_RESETDELAY=201 options KBDIO_DEBUG=2 options MSGMNB=2049 options MSGMNI=41 options MSGSEG=2049 options MSGSSZ=16 options MSGTQL=41 options NBUF=512 options NETATALKDEBUG options NMBCLUSTERS=1024 options NPX_DEBUG options NULLFS_DIAGNOSTIC options PANIC_REBOOT_WAIT_TIME=16 options "PCVT_24LINESDEF" options PCVT_CTRL_ALT_DEL options PCVT_EMU_MOUSE options PCVT_FREEBSD=211 options PCVT_META_ESC options PCVT_NSCREENS=9 options PCVT_PRETTYSCRNS options PCVT_SCANSET=2 options PCVT_SCREENSAVER options PCVT_USEKBDSEC options "PCVT_VT220KEYB" options PSM_DEBUG=1 options "SCSI_2_DEF" options SCSI_DELAY=8 # Be pessimistic about Joe SCSI device options SCSI_NCR_DEBUG options SCSI_NCR_DFLT_TAGS=4 options SCSI_NCR_MAX_SYNC=10000 options SCSI_NCR_MAX_WIDE=1 options SCSI_NCR_MYADDR=7 options SEMMAP=31 options SEMMNI=11 options SEMMNS=61 options SEMMNU=31 options SEMMSL=61 options SEMOPM=101 options SEMUME=11 options SHOW_BUSYBUFS # List buffers that prevent root unmount options SHMALL=1025 options "SHMMAX=(SHMMAXPGS*PAGE_SIZE+1)" options SHMMAXPGS=1025 options SHMMIN=2 options SHMMNI=33 options SHMSEG=9 options SI_DEBUG options SIMPLELOCK_DEBUG options SPX_HACK # The 'dpt' driver provides support for DPT controllers (http://www.dpt.com/). # These have hardware RAID-{0,1,5} support, and do multi-initiator I/O. # See sys/dev/dpt for debugging and other subtle options. # DPT_VERIFY_HINTR Performs some strict hardware interrupts testing. # Only use if you suspect PCI bus corruption problems # DPT_RESTRICTED_FREELIST Normally, the freelisat used by the DPT for queue # will grow to accomodate increased use. This growth # will NOT shrink. To restrict the number of queue # slots to exactly what the DPT can hold at one time, # enable this option. # DPT_MEASURE_PERFORMANCE Enables a set of (semi)invasive metrics. Various # instruments are enabled. Assumed to be enabled by # /usr/sbin/dpt_* tools. # DPT_FREELIST_IS_STACK For optimat L{1,2} CPU cache utilization, enable # this option. Otherwise, the transaction queue is # a LIFO. I cannot measure the performance gain. # DPT_HANDLE_TIMEOUTS Normally device timeouts are handled by the DPT. # If you ant the driver to handle timeouts, enable # this option. If your system is very busy, this # option will create more trouble than solve. # DPT_TIMEOUT_FACTOR Used to compute the excessive amount of time to # wait when timing out with the above option. # DPT_DEBUG_xxxx These are controllable from sys/dev/dpt/dpt.h # DPT_LOST_IRQ When enabled, will try, once per second, to catch # any interrupt that got lost. Seems to help in some # DPT-firmware/Motherboard combinations. Minimal # cost, great benefit. controller dpt0 # DPT options options DPT_VERIFY_HINTR options DPT_RESTRICTED_FREELIST options DPT_MEASURE_PERFORMANCE options DPT_FREELIST_IS_STACK options DPT_HANDLE_TIMEOUTS options DPT_TIMEOUT_FACTOR=4 options DPT_INTR_DELAY=200 # Some motherboards need that options DPT_LOST_IRQ diff --git a/sys/conf/options.i386 b/sys/conf/options.i386 index 5661cf6899e7..c89fdb744cbf 100644 --- a/sys/conf/options.i386 +++ b/sys/conf/options.i386 @@ -1,122 +1,125 @@ -# $Id: options.i386,v 1.75 1998/02/21 10:11:41 eivind Exp $ +# $Id: options.i386,v 1.76 1998/03/09 22:09:11 eivind Exp $ BOUNCEPAGES opt_bounce.h DISABLE_PSE USER_LDT MATH_EMULATE opt_math_emulate.h GPL_MATH_EMULATE opt_math_emulate.h PMAP_SHPGPERPROC opt_pmap.h VM86 opt_vm86.h IBCS2 opt_dontuse.h COMPAT_LINUX opt_dontuse.h SHOW_BUSYBUFS TUNE_1542 PANIC_REBOOT_WAIT_TIME opt_panic.h MAXMEM PERFMON opt_perfmon.h POWERFAIL_NMI opt_trap.h AUTO_EOI_1 opt_auto_eoi.h AUTO_EOI_2 opt_auto_eoi.h BREAK_TO_DEBUGGER opt_comconsole.h CONSPEED opt_comconsole.h COMCONSOLE opt_defunct.h CONADDR opt_defunct.h CONUNIT opt_defunct.h COM_ESP opt_sio.h COM_MULTIPORT opt_sio.h DSI_SOFT_MODEM opt_sio.h EXTRA_SIO opt_sio.h I586_CTR_GUPROF opt_defunct.h I586_PMC_GUPROF opt_i586_guprof.h TSC_GUPROF opt_defunct.h WLCACHE opt_wavelan.h WLDEBUG opt_wavelan.h # These two SMP options have dramatic implications all over the kernel SMP opt_global.h APIC_IO opt_global.h # Standard SMP options NCPU opt_smp.h NBUS opt_smp.h NAPIC opt_smp.h NINTR opt_smp.h AHC_TAGENABLE opt_aic7xxx.h AHC_SCBPAGING_ENABLE opt_aic7xxx.h AHC_ALLOW_MEMIO opt_aic7xxx.h AHC_SHARE_SCBS opt_aic7xxx.h CLK_CALIBRATION_LOOP opt_clock.h CLK_USE_I8254_CALIBRATION opt_clock.h CLK_USE_TSC_CALIBRATION opt_clock.h NO_F00F_HACK opt_cpu.h CPU_BLUELIGHTNING_FPU_OP_CACHE opt_cpu.h CPU_BLUELIGHTNING_3X opt_cpu.h CPU_BTB_EN opt_cpu.h CPU_DIRECT_MAPPED_CACHE opt_cpu.h CPU_DISABLE_5X86_LSSER opt_cpu.h CPU_FASTER_5X86_FPU opt_cpu.h CPU_I486_ON_386 opt_cpu.h CPU_IORT opt_cpu.h CPU_LOOP_EN opt_cpu.h CPU_RSTK_EN opt_cpu.h CPU_SUSP_HLT opt_cpu.h CPU_UPGRADE_HW_CACHE opt_cpu.h CYRIX_CACHE_WORKS opt_cpu.h CYRIX_CACHE_REALLY_WORKS opt_cpu.h # The CPU type affects the endian conversion functions all over the kernel. I386_CPU opt_global.h I486_CPU opt_global.h I586_CPU opt_global.h I686_CPU opt_global.h SC_SPLASH_SCREEN opt_syscons.h MAXCONS opt_syscons.h SLOW_VGA opt_syscons.h STD8X16FONT opt_syscons.h SC_HISTORY_SIZE opt_syscons.h SC_DISABLE_REBOOT opt_syscons.h SC_MOUSE_CHAR opt_syscons.h PSM_HOOKAPM opt_psm.h PSM_RESETAFTERSUSPEND opt_psm.h PSM_DEBUG opt_psm.h KBD_RESETDELAY opt_kbdio.h KBD_MAXRETRY opt_kbdio.h KBD_MAXWAIT opt_kbdio.h KBDIO_DEBUG opt_kbdio.h ATAPI opt_atapi.h ATAPI_STATIC opt_atapi.h CMD640 opt_wd.h USERCONFIG opt_userconfig.h VISUAL_USERCONFIG opt_userconfig.h USERCONFIG_BOOT opt_userconfig.h EISA_SLOTS opt_eisa.h FDC_DEBUG opt_fdc.h FDC_PRINT_BOGUS_CHIPTYPE opt_fdc.h # pcvt(4) has a bunch of options FAT_CURSOR opt_pcvt.h XSERVER opt_pcvt.h PCVT_24LINESDEF opt_pcvt.h PCVT_CTRL_ALT_DEL opt_pcvt.h PCVT_EMU_MOUSE opt_pcvt.h PCVT_FREEBSD opt_pcvt.h PCVT_META_ESC opt_pcvt.h PCVT_NSCREENS opt_pcvt.h PCVT_PRETTYSCRNS opt_pcvt.h PCVT_SCANSET opt_pcvt.h PCVT_SCREENSAVER opt_pcvt.h PCVT_USEKBDSEC opt_pcvt.h PCVT_VT220KEYB opt_pcvt.h +# give bktr an opt_bktr.h file +OVERRIDE_TUNER opt_bktr.h + diff --git a/sys/dev/bktr/bktr_core.c b/sys/dev/bktr/bktr_core.c index 215cb9a31d67..583ecf3f33b2 100644 --- a/sys/dev/bktr/bktr_core.c +++ b/sys/dev/bktr/bktr_core.c @@ -1,4803 +1,4879 @@ -/* BT848 1.27 Driver for Brooktree's Bt848 based cards. +/* BT848 1.30 Driver for Brooktree's Bt848 based cards. The Brooktree BT848 Driver driver is based upon Mark Tinguely and Jim Lowe's driver for the Matrox Meteor PCI card . The Philips SAA 7116 and SAA 7196 are very different chipsets than the BT848. For starters, the BT848 is a one chipset solution and it incorporates a RISC engine to control the DMA transfers -- that is it the actual dma process is control by a program which resides in the hosts memory also the register definitions between the Philips chipsets and the Bt848 are very different. The original copyright notice by Mark and Jim is included mostly to honor their fantastic work in the Matrox Meteor driver! Enjoy, Amancio */ /* * 1. Redistributions of source code must retain the * Copyright (c) 1997 Amancio Hasty * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Amancio Hasty * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * 1. Redistributions of source code must retain the * Copyright (c) 1995 Mark Tinguely and Jim Lowe * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Tinguely and Jim Lowe * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* Change History: 1.0 1/24/97 First Alpha release 1.1 2/20/97 Added video ioctl so we can do PCI To PCI data transfers. This is for capturing data directly to a vga frame buffer which has a linear frame buffer. Minor code clean-up. 1.3 2/23/97 Fixed system lock-up reported by Randall Hopper . This problem seems somehow to be exhibited only in his system. I changed the setting of INT_MASK for CAP_CONTINUOUS to be exactly the same as CAP_SINGLE apparently setting bit 23 cleared the system lock up. version 1.1 of the driver has been reported to work with STB's WinTv, Hauppage's Wincast/Tv and last but not least with the Intel Smart Video Recorder. 1.4 3/9/97 fsmp@freefall.org Merged code to support tuners on STB and WinCast cards. Modifications to the contrast and chroma ioctls. Textual cleanup. 1.5 3/15/97 fsmp@freefall.org new bt848 specific versions of hue/bright/ contrast/satu/satv. Amancio's patch to fix "screen freeze" problem. 1.6 3/19/97 fsmp@freefall.org new table-driven frequency lookup. removed disable_intr()/enable_intr() calls from i2c. misc. cleanup. 1.7 3/19/97 fsmp@freefall.org added audio support submitted by: Michael Petry 1.8 3/20/97 fsmp@freefall.org extended audio support. card auto-detection. major cleanup, order of routines, declarations, etc. 1.9 3/22/97 fsmp@freefall.org merged in Amancio's minor unit for tuner control mods. misc. cleanup, especially in the _intr routine. made AUDIO_SUPPORT mainline code. 1.10 3/23/97 fsmp@freefall.org added polled hardware i2c routines, removed all existing software i2c routines. created software i2cProbe() routine. Randall Hopper's fixes of BT848_GHUE & BT848_GBRIG. eeprom support. 1.11 3/24/97 fsmp@freefall.org Louis Mamakos's new bt848 struct. 1.12 3/25/97 fsmp@freefall.org japanese freq table from Naohiro Shichijo. new table structs for tuner lookups. major scrub for "magic numbers". 1.13 3/28/97 fsmp@freefall.org 1st PAL support. MAGIC_[1-4] demarcates magic #s needing PAL work. AFC code submitted by Richard Tobin . 1.14 3/29/97 richard@cogsci.ed.ac.uk PAL support: magic numbers moved into format_params structure. Revised AFC interface. fixed DMA_PROG_ALLOC size misdefinition. 1.15 4/18/97 John-Mark Gurney Added [SR]RGBMASKs ioctl for byte swapping. 1.16 4/20/97 Randall Hopper Generalized RGBMASK ioctls for general pixel format setting [SG]ACTPIXFMT, and added query API to return driver-supported pix fmts GSUPPIXFMT. 1.17 4/21/97 hasty@rah.star-gate.com Clipping support added. 1.18 4/23/97 Clean up after failed CAP_SINGLEs where bt interrupt isn't delivered, and fixed fixing CAP_SINGLEs that for ODD_ONLY fields. 1.19 9/8/97 improved yuv support , cleaned up weurope channel table, incorporated cleanup work from Luigi, fixed pci interface bug due to a change in the pci interface which disables interrupts from a PCI device by default, Added Luigi's, ioctl's BT848_SLNOTCH, BT848_GLNOTCH (set luma notch and get luma not) 1.20 10/5/97 Keith Sklower submitted a patch to fix compilation of the BSDI's PCI interface. Hideyuki Suzuki Submitted a patch for Japanese cable channels Joao Carlos Mendes Luis jonny@gta.ufrj.br Submitted general ioctl to set video broadcast formats (PAL, NTSC, etc..) previously we depended on the Bt848 auto video detect feature. 1.21 10/24/97 Randall Hopper Fix temporal decimation, disable it when doing CAP_SINGLEs, and in dual-field capture, don't capture fields for different frames 1.22 11/08/97 Randall Hopper Fixes for packed 24bpp - FIFO alignment 1.23 11/17/97 Amancio Added yuv support mpeg encoding 1.24 12/27/97 Jonathan Hanna Patch to support Philips FR1236MK2 tuner 1.25 02/02/98 Takeshi Ohashi submitted code to support bktr_read . Flemming Jacobsen submitted code to support radio available with in some bt848 based cards;additionally, wrote code to correctly recognized his bt848 card. Roger Hardiman submitted various fixes to smooth out the microcode and made all modes consistent. 1.26 Moved Luigi's I2CWR ioctl from the video_ioctl section to the tuner_ioctl section Changed Major device from 79 to 92 and reserved our Major device number -- hasty@star-gate.com 1.27 Last batch of patches for radio support from Flemming Jacobsen . Added B849 PCI ID submitted by: Tomi Vainio 1.28 Frank Nobis added tuner support for the German Phillips PAL tuner and additional channels for german cable tv. +1.29 Roger Hardiman + Revised autodetection code to correctly handle both + old and new VideoLogic Captivator PCI cards. + Added tsleep of 2 seconds to initialistion code + for PAL users.Corrected clock selection code on + format change. +1.30 Bring back Frank Nobis 's opt_bktr.h + */ #define DDB(x) x #define DEB(x) #ifdef __FreeBSD__ #include "bktr.h" #include "opt_devfs.h" #include "pci.h" #endif /* __FreeBSD__ */ #if !defined(__FreeBSD__) || (NBKTR > 0 && NPCI > 0) #include #include #include #include #include #include #include #include #include #include #include #ifdef __FreeBSD__ #ifdef DEVFS #include #endif /* DEVFS */ #include #include #include #include #include /* extensions to ioctl_meteor.h */ #include typedef int ioctl_cmd_t; #endif /* __FreeBSD__ */ #ifdef __bsdi__ #include #include #include #include #include #include #include #include "ioctl_meteor.h" #include "ioctl_bt848.h" #include "bt848_reg.h" typedef u_long ioctl_cmd_t; #define pci_conf_read(a, r) pci_inl(a, r) #define pci_conf_write(a, r, v) pci_outl(a, r, v) #include #define bootverbose (autoprint & (AC_VERBOSE|AC_DEBUG)) #endif /* __bsdi__ */ typedef u_char bool_t; #define BKTRPRI (PZERO+8)|PCATCH static void bktr_intr __P((void *arg)); /* * memory allocated for DMA programs */ #define DMA_PROG_ALLOC (8 * PAGE_SIZE) /* When to split a dma transfer , the bt848 has timing as well as dma transfer size limitations so that we have to split dma transfers into two dma requests */ #define DMA_BT848_SPLIT 319*2 /* * Allocate enough memory for: * 768x576 RGB 16 or YUV (16 storage bits/pixel) = 884736 = 216 pages * * You may override this using the options "BROOKTREE_ALLOC_PAGES=value" * in your kernel configuration file. */ #ifndef BROOKTREE_ALLOC_PAGES #define BROOKTREE_ALLOC_PAGES 217*4 #endif #define BROOKTREE_ALLOC (BROOKTREE_ALLOC_PAGES * PAGE_SIZE) /* Defines for fields */ #define ODD_F 0x01 #define EVEN_F 0x02 #ifdef __FreeBSD__ static bktr_reg_t brooktree[ NBKTR ]; #define BROOKTRE_NUM(mtr) ((bktr - &brooktree[0])/sizeof(bktr_reg_t)) #define UNIT(x) ((x) & 0x0f) #define MINOR(x) ((x >> 4) & 0x0f) #define ATTACH_ARGS pcici_t tag, int unit static char* bktr_probe( pcici_t tag, pcidi_t type ); static void bktr_attach( ATTACH_ARGS ); static u_long bktr_count; static struct pci_device bktr_device = { "bktr", bktr_probe, bktr_attach, &bktr_count }; DATA_SET (pcidevice_set, bktr_device); static d_open_t bktr_open; static d_close_t bktr_close; static d_read_t bktr_read; static d_write_t bktr_write; static d_ioctl_t bktr_ioctl; static d_mmap_t bktr_mmap; #define CDEV_MAJOR 92 static struct cdevsw bktr_cdevsw = { bktr_open, bktr_close, bktr_read, bktr_write, bktr_ioctl, nostop, nullreset, nodevtotty, seltrue, bktr_mmap, NULL, "bktr", NULL, -1 }; #endif /* __FreeBSD__ */ #ifdef __bsdi__ #define UNIT dv_unit #define MINOR dv_subunit #define ATTACH_ARGS \ struct device * const parent, struct device * const self, void * const aux #define PCI_COMMAND_STATUS_REG PCI_COMMAND static void bktr_attach( ATTACH_ARGS ); #define NBKTR bktrcd.cd_ndevs #define brooktree *((bktr_ptr_t *)bktrcd.cd_devs) static int bktr_spl; static int bktr_intr_returning_1(void *arg) { bktr_intr(arg); return (1);} #define disable_intr() { bktr_spl = splhigh(); } #define enable_intr() { splx(bktr_spl); } static int bktr_pci_match(pci_devaddr_t *pa) { unsigned id; id = pci_inl(pa, PCI_VENDOR_ID); if (id == BROOKTREE_848_ID || id == BROOKTREE_849_ID ) { return 1; } aprint_debug("bktr_pci_match got %x\n", id); return 0; } pci_devres_t bktr_res; /* XXX only remembers last one, helps debug */ static int bktr_probe(struct device *parent, struct cfdata *cf, void *aux) { pci_devaddr_t *pa; pci_devres_t res; struct isa_attach_args *ia = aux; if (ia->ia_bustype != BUS_PCI) return (0); if ((pa = pci_scan(bktr_pci_match)) == NULL) return (0); pci_getres(pa, &bktr_res, 1, ia); if (ia->ia_maddr == 0) { printf("bktr%d: no mem attached\n", cf->cf_unit); return (0); } ia->ia_aux = pa; return 1; } struct cfdriver bktrcd = { 0, "bktr", bktr_probe, bktr_attach, DV_DULL, sizeof(bktr_reg_t) }; int bktr_open __P((dev_t, int, int, struct proc *)); int bktr_close __P((dev_t, int, int, struct proc *)); int bktr_read __P((dev_t, struct uio *, int)); int bktr_write __P((dev_t, struct uio *, int)); int bktr_ioctl __P((dev_t, ioctl_cmd_t, caddr_t, int, struct proc *)); int bktr_mmap __P((dev_t, int, int)); struct devsw bktrsw = { &bktrcd, bktr_open, bktr_close, bktr_read, bktr_write, bktr_ioctl, seltrue, bktr_mmap, NULL, nodump, NULL, 0, nostop }; #endif /* __bsdi__ */ /* * This is for start-up convenience only, NOT mandatory. */ #if !defined( DEFAULT_CHNLSET ) #define DEFAULT_CHNLSET CHNLSET_WEUROPE #endif /* * Parameters describing size of transmitted image. */ static struct format_params format_params[] = { /* # define BT848_IFORM_F_AUTO (0x0) - don't matter. */ - { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, 0 }, + { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_AUTO }, /* # define BT848_IFORM_F_NTSCM (0x1) */ { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0 }, /* # define BT848_IFORM_F_NTSCJ (0x2) */ { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0 }, /* # define BT848_IFORM_F_PALBDGHI (0x3) */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1 }, /* # define BT848_IFORM_F_PALM (0x4) */ { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0 }, /*{ 625, 32, 576, 910, 186, 922, 640, 780, 25, 0x68, 0x5d, BT848_IFORM_X_XT0 }, */ /* # define BT848_IFORM_F_PALN (0x5) */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1 }, /* # define BT848_IFORM_F_SECAM (0x6) */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x00, BT848_IFORM_X_XT1 }, /* # define BT848_IFORM_F_RSVD (0x7) - ???? */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT0 }, }; /* * Table of supported Pixel Formats */ static struct meteor_pixfmt_internal { struct meteor_pixfmt public; u_int color_fmt; } pixfmt_table[] = { { { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0,0 }, 0x33 }, { { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 1,0 }, 0x33 }, { { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 0,0 }, 0x22 }, { { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 1,0 }, 0x22 }, { { 0, METEOR_PIXTYPE_RGB, 3, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x11 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,0 }, 0x00 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x00 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x00 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x00 }, { { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 }, { { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x44 }, { { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 }, }; #define PIXFMT_TABLE_SIZE ( sizeof(pixfmt_table) / sizeof(pixfmt_table[0]) ) /* * Table of Meteor-supported Pixel Formats (for SETGEO compatibility) */ /* FIXME: Also add YUV_422 and YUV_PACKED as well */ static struct { u_long meteor_format; struct meteor_pixfmt public; } meteor_pixfmt_table[] = { { METEOR_GEO_YUV_12, { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 } }, /* FIXME: Should byte swap flag be on for this one; negative in drvr? */ { METEOR_GEO_YUV_422, { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 } }, { METEOR_GEO_YUV_PACKED, { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 } }, { METEOR_GEO_RGB16, { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0, 0 } }, { METEOR_GEO_RGB24, { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000, 0x00ff00, 0x0000ff }, 0, 0 } }, }; #define METEOR_PIXFMT_TABLE_SIZE ( sizeof(meteor_pixfmt_table) / \ sizeof(meteor_pixfmt_table[0]) ) #define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN) #define WSWAP (BT848_COLOR_CTL_WSWAP_ODD | BT848_COLOR_CTL_WSWAP_EVEN) /* experimental code for Automatic Frequency Control */ #define TUNER_AFC #define TEST_TUNER_AFC_NOT #if defined( TUNER_AFC ) #define AFC_DELAY 10000 /* 10 millisend delay */ #define AFC_BITS 0x07 #define AFC_FREQ_MINUS_125 0x00 #define AFC_FREQ_MINUS_62 0x01 #define AFC_FREQ_CENTERED 0x02 #define AFC_FREQ_PLUS_62 0x03 #define AFC_FREQ_PLUS_125 0x04 #define AFC_MAX_STEP (5 * FREQFACTOR) /* no more than 5 MHz */ #endif /* TUNER_AFC */ /* * i2c things: */ /* PLL on a Temic NTSC tuner: 4032FY5 */ #define TEMIC_NTSC_WADDR 0xc0 #define TEMIC_NTSC_RADDR 0xc1 /* PLL on a Temic PAL I tuner: 4062FY5 */ #define TEMIC_PALI_WADDR 0xc2 #define TEMIC_PALI_RADDR 0xc3 /* PLL on a Philips tuner */ #define PHILIPS_NTSC_WADDR 0xc6 #define PHILIPS_NTSC_RADDR 0xc7 /* PLL on a the Philips FR1236MK2 tuner */ #define PHILIPS_FR1236_NTSC_WADDR 0xc2 #define PHILIPS_FR1236_NTSC_RADDR 0xc3 /* PLL on a the Philips FR1216MK2 tuner, yes, the european version of the tuner is 1216 */ #define PHILIPS_FR1216_PAL_WADDR 0xc2 #define PHILIPS_FR1216_PAL_RADDR 0xc3 /* guaranteed address for any TSA5522/3 (PLL on all(?) tuners) */ #define TSA552x_WADDR 0xc2 #define TSA552x_RADDR 0xc3 #define PHILIPS_PAL_WADDR 0xc2 #define PHILIPS_PAL_RADDR 0xc3 #define TSA552x_CB_MSB (0x80) #define TSA552x_CB_CP (1<<6) #define TSA552x_CB_T2 (1<<5) #define TSA552x_CB_T1 (1<<4) #define TSA552x_CB_T0 (1<<3) #define TSA552x_CB_RSA (1<<2) #define TSA552x_CB_RSB (1<<1) #define TSA552x_CB_OS (1<<0) #define TSA552x_RADIO (TSA552x_CB_MSB | \ TSA552x_CB_T0) /* Add RADIO_OFFSET to the "frequency" to indicate that we want to tune */ /* the radio (if present) not the TV tuner. */ /* 20000 is equivalent to 20000MHz/16 = 1.25GHz - this area is unused. */ #define RADIO_OFFSET 20000 /* address of BTSC/SAP decoder chip */ #define TDA9850_WADDR 0xb6 #define TDA9850_RADDR 0xb7 /* address of MSP3400C chip */ #define MSP3400C_WADDR 0x80 #define MSP3400C_RADDR 0x81 /* EEProm (128 * 8) on an STB card */ #define X24C01_WADDR 0xae #define X24C01_RADDR 0xaf /* EEProm (256 * 8) on a Hauppauge card */ #define PFC8582_WADDR 0xa0 #define PFC8582_RADDR 0xa1 /* registers in the BTSC/dbx chip */ #define CON1ADDR 0x04 #define CON2ADDR 0x05 #define CON3ADDR 0x06 #define CON4ADDR 0x07 /* raise the charge pump voltage for fast tuning */ #define TSA552x_FCONTROL (TSA552x_CB_MSB | \ TSA552x_CB_CP | \ TSA552x_CB_T0 | \ TSA552x_CB_RSA | \ TSA552x_CB_RSB) /* lower the charge pump voltage for better residual oscillator FM */ #define TSA552x_SCONTROL (TSA552x_CB_MSB | \ TSA552x_CB_T0 | \ TSA552x_CB_RSA | \ TSA552x_CB_RSB) /* sync detect threshold */ #if 0 #define SYNC_LEVEL (BT848_ADC_RESERVED | \ BT848_ADC_CRUSH) /* threshold ~125 mV */ #else #define SYNC_LEVEL (BT848_ADC_RESERVED | \ BT848_ADC_SYNC_T) /* threshold ~75 mV */ #endif /* the GPIO bits that control the audio MUXes */ #define GPIO_AUDIOMUX_BITS 0x0f /* debug utility for holding previous INT_STAT contents */ #define STATUS_SUM static u_long status_sum = 0; /* * defines to make certain bit-fiddles understandable */ #define FIFO_ENABLED BT848_DMA_CTL_FIFO_EN #define RISC_ENABLED BT848_DMA_CTL_RISC_EN #define FIFO_RISC_ENABLED (BT848_DMA_CTL_FIFO_EN | BT848_DMA_CTL_RISC_EN) #define FIFO_RISC_DISABLED 0 #define ALL_INTS_DISABLED 0 #define ALL_INTS_CLEARED 0xffffffff #define CAPTURE_OFF 0 #define BIT_SEVEN_HIGH (1<<7) #define BIT_EIGHT_HIGH (1<<8) #define I2C_BITS (BT848_INT_RACK | BT848_INT_I2CDONE) #define TDEC_BITS (BT848_INT_FDSR | BT848_INT_FBUS) /* * misc. support routines. */ static int signCard( bktr_ptr_t bktr, int offset, int count, u_char* sig ); static void probeCard( bktr_ptr_t bktr, int verbose ); static vm_offset_t get_bktr_mem( int unit, unsigned size ); static int oformat_meteor_to_bt( u_long format ); static u_int pixfmt_swap_flags( int pixfmt ); /* * bt848 RISC programming routines. */ #ifdef BT848_DUMP static int dump_bt848( bt848_ptr_t bt848 ); #endif static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void build_dma_prog( bktr_ptr_t bktr, char i_flag ); static bool_t getline(bktr_reg_t *, int); static bool_t notclipped(bktr_reg_t * , int , int); static bool_t split(bktr_reg_t *, volatile u_long **, int, u_long, int, volatile u_char ** , int ); /* * video & video capture specific routines. */ static int video_open( bktr_ptr_t bktr ); static int video_close( bktr_ptr_t bktr ); static int video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ); static void start_capture( bktr_ptr_t bktr, unsigned type ); static void set_fps( bktr_ptr_t bktr, u_short fps ); /* * tuner specific functions. */ static int tuner_open( bktr_ptr_t bktr ); static int tuner_close( bktr_ptr_t bktr ); static int tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ); static int tv_channel( bktr_ptr_t bktr, int channel ); static int tv_freq( bktr_ptr_t bktr, int frequency ); #if defined( TUNER_AFC ) static int do_afc( bktr_ptr_t bktr, int addr, int frequency ); #endif /* TUNER_AFC */ /* * audio specific functions. */ static int set_audio( bktr_ptr_t bktr, int mode ); static void temp_mute( bktr_ptr_t bktr, int flag ); static int set_BTSC( bktr_ptr_t bktr, int control ); /* * ioctls common to both video & tuner. */ static int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg ); /* * i2c primitives */ static int i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 ); static int i2cRead( bktr_ptr_t bktr, int addr ); static int writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char* data ); static int readEEProm( bktr_ptr_t bktr, int offset, int count, u_char* data ); #ifdef __FreeBSD__ /* * the boot time probe routine. */ static char* bktr_probe( pcici_t tag, pcidi_t type ) { switch (type) { case BROOKTREE_848_ID: return("BrookTree 848"); case BROOKTREE_849_ID: return("BrookTree 849"); }; return ((char *)0); } #endif /* __FreeBSD__ */ /* * the attach routine. */ static void bktr_attach( ATTACH_ARGS ) { bktr_ptr_t bktr; bt848_ptr_t bt848; #ifdef BROOKTREE_IRQ u_long old_irq, new_irq; #endif vm_offset_t buf; u_long latency; u_long fun; #ifdef __FreeBSD__ bktr = &brooktree[unit]; if (unit >= NBKTR) { printf("brooktree%d: attach: only %d units configured.\n", unit, NBKTR); printf("brooktree%d: attach: invalid unit number.\n", unit); return; } bktr->tag = tag; pci_map_mem( tag, PCI_MAP_REG_START, (vm_offset_t *) &bktr->base, &bktr->phys_base ); #ifdef BROOKTREE_IRQ /* from the configuration file */ old_irq = pci_conf_read(tag, PCI_INTERRUPT_REG); pci_conf_write(tag, PCI_INTERRUPT_REG, BROOKTREE_IRQ); new_irq = pci_conf_read(tag, PCI_INTERRUPT_REG); printf("bktr%d: attach: irq changed from %d to %d\n", unit, (old_irq & 0xff), (new_irq & 0xff)); #endif /* setup the interrupt handling routine */ pci_map_int(tag, bktr_intr, (void*) bktr, &net_imask); #endif /* __FreeBSD__ */ #ifdef __bsdi__ struct isa_attach_args * const ia = (struct isa_attach_args *)aux; pci_devaddr_t *tag = (pci_devaddr_t *) ia->ia_aux; int unit = bktr->bktr_dev.dv_unit; bktr = (bktr_reg_t *) self; bktr->base = (bt848_ptr_t) bktr_res.pci_vaddr; isa_establish(&bktr->bktr_id, &bktr->bktr_dev); bktr->bktr_ih.ih_fun = bktr_intr_returning_1; bktr->bktr_ih.ih_arg = (void *)bktr; intr_establish(ia->ia_irq, &bktr->bktr_ih, DV_DULL); #endif /* __bsdi__ */ /* * PCI latency timer. 32 is a good value for 4 bus mastering slots, if * you have more than four, then 16 would probably be a better value. */ #ifndef BROOKTREE_DEF_LATENCY_VALUE #define BROOKTREE_DEF_LATENCY_VALUE 10 #endif latency = pci_conf_read(tag, PCI_LATENCY_TIMER); latency = (latency >> 8) & 0xff; if ( bootverbose ) { if (latency) printf("brooktree%d: PCI bus latency is", unit); else printf("brooktree%d: PCI bus latency was 0 changing to", unit); } if ( !latency ) { latency = BROOKTREE_DEF_LATENCY_VALUE; pci_conf_write(tag, PCI_LATENCY_TIMER, latency<<8); } if ( bootverbose ) { printf(" %d.\n", (int) latency); } /* allocate space for dma program */ bktr->dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC); bktr->odd_dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC); /* allocate space for pixel buffer */ if ( BROOKTREE_ALLOC ) buf = get_bktr_mem(unit, BROOKTREE_ALLOC); else buf = 0; if ( bootverbose ) { printf("bktr%d: buffer size %d, addr 0x%x\n", unit, BROOKTREE_ALLOC, vtophys(buf)); } bktr->bigbuf = buf; bktr->alloc_pages = BROOKTREE_ALLOC_PAGES; if ( buf != 0 ) { bzero((caddr_t) buf, BROOKTREE_ALLOC); buf = vtophys(buf); bktr->flags = METEOR_INITALIZED | METEOR_AUTOMODE | METEOR_DEV0 | METEOR_RGB16; bktr->dma_prog_loaded = FALSE; bktr->cols = 640; bktr->rows = 480; bktr->frames = 1; /* one frame */ bktr->format = METEOR_GEO_RGB16; bktr->pixfmt = oformat_meteor_to_bt( bktr->format ); bktr->pixfmt_compat = TRUE; bt848 = bktr->base; bt848->int_mask = ALL_INTS_DISABLED; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; } /* defaults for the tuner section of the card */ bktr->tflags = TUNER_INITALIZED; bktr->tuner.frequency = 0; bktr->tuner.channel = 0; bktr->tuner.chnlset = DEFAULT_CHNLSET; bktr->audio_mux_select = 0; bktr->audio_mute_state = FALSE; probeCard( bktr, TRUE ); #ifdef DEVFS /* XXX This just throw away the token, which should probably be fixed when DEVFS is finally made really operational. */ devfs_add_devswf(&bktr_cdevsw, unit, DV_CHR, 0, 0, 0444, "bktr%d", unit); devfs_add_devswf(&bktr_cdevsw, unit+16, DV_CHR, 0, 0, 0444, "tuner%d", unit); #endif /* DEVFS */ #if __FreeBSD__ > 2 fun = pci_conf_read(tag, PCI_COMMAND_STATUS_REG); pci_conf_write(tag, PCI_COMMAND_STATUS_REG, fun | 4); #endif } /* * interrupt handling routine complete bktr_read() if using interrupts. */ static void bktr_intr( void *arg ) { bktr_ptr_t bktr; bt848_ptr_t bt848; u_long bktr_status; u_char dstatus; u_long field; u_long w_field; u_long req_field; bktr = (bktr_ptr_t) arg; bt848 = bktr->base; /* * check to see if any interrupts are unmasked on this device. If * none are, then we likely got here by way of being on a PCI shared * interrupt dispatch list. */ if (bt848->int_mask == ALL_INTS_DISABLED) return; /* bail out now, before we do something we shouldn't */ if (!(bktr->flags & METEOR_OPEN)) { bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_mask = ALL_INTS_DISABLED; /* return; ?? */ } /* record and clear the INTerrupt status bits */ bktr_status = bt848->int_stat; bt848->int_stat = bktr_status & ~I2C_BITS; /* don't touch i2c */ /* record and clear the device status register */ dstatus = bt848->dstatus; bt848->dstatus = 0x00; #if defined( STATUS_SUM ) /* add any new device status or INTerrupt status bits */ status_sum |= (bktr_status & ~(BT848_INT_RSV0|BT848_INT_RSV1)); status_sum |= ((dstatus & (BT848_DSTATUS_COF|BT848_DSTATUS_LOF)) << 6); #endif /* STATUS_SUM */ /* printf( " STATUS %x %x %x \n", dstatus, bktr_status, bt848->risc_count ); */ /* if risc was disabled re-start process again */ if ( !(bktr_status & BT848_INT_RISC_EN) || ((bktr_status &(BT848_INT_FBUS | BT848_INT_FTRGT | BT848_INT_FDSR | BT848_INT_PPERR | BT848_INT_RIPERR | BT848_INT_PABORT | BT848_INT_OCERR | BT848_INT_SCERR) ) != 0) || ((bt848->tdec == 0) && (bktr_status & TDEC_BITS)) ) { u_short tdec_save = bt848->tdec; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_mask = ALL_INTS_DISABLED; /* Reset temporal decimation ctr */ bt848->tdec = 0; bt848->tdec = tdec_save; /* Reset to no-fields captured state */ if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } } bt848->risc_strt_add = vtophys(bktr->dma_prog); bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; bt848->cap_ctl = bktr->bktr_cap_ctl; return; } if (!(bktr_status & BT848_INT_RISCI)) return; /** printf( "intr status %x %x %x\n", bktr_status, dstatus, bt848->risc_count ); */ /* * Disable future interrupts if a capture mode is not selected. * This can happen when we are in the process of closing or * changing capture modes, otherwise it shouldn't happen. */ if (!(bktr->flags & METEOR_CAP_MASK)) bt848->cap_ctl = CAPTURE_OFF; /* * Register the completed field * (For dual-field mode, require fields from the same frame) */ field = ( bktr_status & BT848_INT_FIELD ) ? EVEN_F : ODD_F; switch ( bktr->flags & METEOR_WANT_MASK ) { case METEOR_WANT_ODD : w_field = ODD_F ; break; case METEOR_WANT_EVEN : w_field = EVEN_F ; break; default : w_field = (ODD_F|EVEN_F); break; } switch ( bktr->flags & METEOR_ONLY_FIELDS_MASK ) { case METEOR_ONLY_ODD_FIELDS : req_field = ODD_F ; break; case METEOR_ONLY_EVEN_FIELDS : req_field = EVEN_F ; break; default : req_field = (ODD_F|EVEN_F); break; } if (( field == EVEN_F ) && ( w_field == EVEN_F )) bktr->flags &= ~METEOR_WANT_EVEN; else if (( field == ODD_F ) && ( req_field == ODD_F ) && ( w_field == ODD_F )) bktr->flags &= ~METEOR_WANT_ODD; else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) && ( w_field == (ODD_F|EVEN_F) )) bktr->flags &= ~METEOR_WANT_ODD; else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) && ( w_field == ODD_F )) { bktr->flags &= ~METEOR_WANT_ODD; bktr->flags |= METEOR_WANT_EVEN; } else { /* We're out of sync. Start over. */ if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } } return; } /* * If we have a complete frame. */ if (!(bktr->flags & METEOR_WANT_MASK)) { bktr->frames_captured++; /* * post the completion time. */ if (bktr->flags & METEOR_WANT_TS) { struct timeval *ts; if ((u_int) bktr->alloc_pages * PAGE_SIZE <= (bktr->frame_size + sizeof(struct timeval))) { ts =(struct timeval *)bktr->bigbuf + bktr->frame_size; /* doesn't work in synch mode except * for first frame */ /* XXX */ microtime(ts); } } /* * Wake up the user in single capture mode. */ if (bktr->flags & METEOR_SINGLE) { /* stop dma */ bt848->int_mask = ALL_INTS_DISABLED; /* disable risc, leave fifo running */ bt848->gpio_dma_ctl = FIFO_ENABLED; wakeup((caddr_t)bktr); } /* * If the user requested to be notified via signal, * let them know the frame is complete. */ if (bktr->proc && !(bktr->signal & METEOR_SIG_MODE_MASK)) psignal( bktr->proc, bktr->signal&(~METEOR_SIG_MODE_MASK) ); /* * Reset the want flags if in continuous or * synchronous capture mode. */ /* * XXX NOTE (Luigi): * currently we only support 3 capture modes: odd only, even only, * odd+even interlaced (odd field first). A fourth mode (non interlaced, * either even OR odd) could provide 60 (50 for PAL) pictures per * second, but it would require this routine to toggle the desired frame * each time, and one more different DMA program for the Bt848. * As a consequence, this fourth mode is currently unsupported. */ if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } } } return; } /*--------------------------------------------------------- ** ** BrookTree 848 character device driver routines ** **--------------------------------------------------------- */ #define VIDEO_DEV 0x00 #define TUNER_DEV 0x01 /* * */ int bktr_open( dev_t dev, int flags, int fmt, struct proc *p ) { bktr_ptr_t bktr; int unit; unit = UNIT( minor(dev) ); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[ unit ]); if (!(bktr->flags & METEOR_INITALIZED)) /* device not found */ return( ENXIO ); switch ( MINOR( minor(dev) ) ) { case VIDEO_DEV: return( video_open( bktr ) ); case TUNER_DEV: return( tuner_open( bktr ) ); } return( ENXIO ); } /* * */ static int video_open( bktr_ptr_t bktr ) { bt848_ptr_t bt848; if (bktr->flags & METEOR_OPEN) /* device is busy */ return( EBUSY ); bktr->flags |= METEOR_OPEN; bt848 = bktr->base; #ifdef BT848_DUMP dump_bt848( bt848 ); #endif bt848->dstatus = 0x00; /* clear device status reg. */ bt848->adc = SYNC_LEVEL; bt848->iform = BT848_IFORM_M_MUX1 | BT848_IFORM_X_XT0 | BT848_IFORM_F_NTSCM; bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0; bktr->format_params = BT848_IFORM_F_NTSCM; bktr->max_clip_node = 0; bt848->color_ctl_gamma = 0; bt848->color_ctl_rgb_ded = 1; bt848->color_ctl_color_bars = 0; bt848->color_ctl_ext_frmrate = 0; bt848->color_ctl_swap = 0; bt848->e_hscale_lo = 170; bt848->o_hscale_lo = 170; bt848->e_delay_lo = 0x72; bt848->o_delay_lo = 0x72; bt848->e_scloop = 0; bt848->o_scloop = 0; bt848->vbi_pack_size = 0; bt848->vbi_pack_del = 0; bktr->fifo_errors = 0; bktr->dma_errors = 0; bktr->frames_captured = 0; bktr->even_fields_captured = 0; bktr->odd_fields_captured = 0; bktr->proc = (struct proc *)0; set_fps(bktr, 30); bktr->video.addr = 0; bktr->video.width = 0; bktr->video.banksize = 0; bktr->video.ramsize = 0; bktr->pixfmt_compat = TRUE; bktr->format = METEOR_GEO_RGB16; bktr->pixfmt = oformat_meteor_to_bt( bktr->format ); bt848->int_mask = BT848_INT_MYSTERYBIT; /* what does this bit do ??? */ + /* wait 2 seconds while bt848 initialises */ + tsleep( (caddr_t)bktr, PZERO, "btinit", hz*2 ); + return( 0 ); } /* * */ static int tuner_open( bktr_ptr_t bktr ) { if ( !(bktr->tflags & TUNER_INITALIZED) ) /* device not found */ return( ENXIO ); if ( bktr->tflags & TUNER_OPEN ) /* already open */ return( 0 ); bktr->tflags |= TUNER_OPEN; bktr->tuner.radio_mode = 0; /* enable drivers on the GPIO port that control the MUXes */ bktr->base->gpio_out_en = GPIO_AUDIOMUX_BITS; /* unmute the audio stream */ set_audio( bktr, AUDIO_UNMUTE ); /* enable stereo if appropriate */ if ( bktr->card.dbx ) set_BTSC( bktr, 0 ); return( 0 ); } /* * */ int bktr_close( dev_t dev, int flags, int fmt, struct proc *p ) { bktr_ptr_t bktr; int unit; unit = UNIT( minor(dev) ); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[ unit ]); switch ( MINOR( minor(dev) ) ) { case VIDEO_DEV: return( video_close( bktr ) ); case TUNER_DEV: return( tuner_close( bktr ) ); } return( ENXIO ); } /* * */ static int video_close( bktr_ptr_t bktr ) { bt848_ptr_t bt848; bktr->flags &= ~(METEOR_OPEN | METEOR_SINGLE | METEOR_CAP_MASK | METEOR_WANT_MASK); bt848 = bktr->base; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->cap_ctl = CAPTURE_OFF; bktr->dma_prog_loaded = FALSE; bt848->tdec = 0; bt848->int_mask = ALL_INTS_DISABLED; /** FIXME: is 0xf magic, wouldn't 0x00 work ??? */ bt848->sreset = 0xf; bt848->int_stat = ALL_INTS_CLEARED; return( 0 ); } /* * tuner close handle, * place holder for tuner specific operations on a close. */ static int tuner_close( bktr_ptr_t bktr ) { bktr->tflags &= ~TUNER_OPEN; /* mute the audio by switching the mux */ set_audio( bktr, AUDIO_MUTE ); /* disable drivers on the GPIO port that control the MUXes */ bktr->base->gpio_out_en = 0; return( 0 ); } /* * */ int bktr_read( dev_t dev, struct uio *uio, int ioflag ) { bktr_ptr_t bktr; bt848_ptr_t bt848; int unit; int status; int count; if (MINOR(minor(dev)) > 0) return( ENXIO ); unit = UNIT(minor(dev)); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[unit]); bt848 = bktr->base; if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */ return( ENOMEM ); if (bktr->flags & METEOR_CAP_MASK) return( EIO ); /* already capturing */ bt848->cap_ctl = bktr->bktr_cap_ctl; count = bktr->rows * bktr->cols * pixfmt_table[ bktr->pixfmt ].public.Bpp; if ((int) uio->uio_iov->iov_len < count) return( EINVAL ); bktr->flags &= ~(METEOR_CAP_MASK | METEOR_WANT_MASK); /* capture one frame */ start_capture(bktr, METEOR_SINGLE); /* wait for capture to complete */ bt848->int_stat = ALL_INTS_CLEARED; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; status = tsleep((caddr_t)bktr, BKTRPRI, "captur", 0); if (!status) /* successful capture */ status = uiomove((caddr_t)bktr->bigbuf, count, uio); else printf ("bktr%d: read: tsleep error %d\n", unit, status); bktr->flags &= ~(METEOR_SINGLE | METEOR_WANT_MASK); return( status ); } /* * */ int bktr_write( dev_t dev, struct uio *uio, int ioflag ) { return( EINVAL ); /* XXX or ENXIO ? */ } /* * */ int bktr_ioctl( dev_t dev, ioctl_cmd_t cmd, caddr_t arg, int flag, struct proc* pr ) { bktr_ptr_t bktr; int unit; unit = UNIT(minor(dev)); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[ unit ]); if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */ return( ENOMEM ); switch ( MINOR( minor(dev) ) ) { case VIDEO_DEV: return( video_ioctl( bktr, unit, cmd, arg, pr ) ); case TUNER_DEV: return( tuner_ioctl( bktr, unit, cmd, arg, pr ) ); } return( ENXIO ); } /* * video ioctls */ static int video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ) { int tmp_int; bt848_ptr_t bt848; volatile u_char c_temp; unsigned int temp; + unsigned int temp_iform; unsigned int error; struct meteor_geomet *geo; struct meteor_counts *cnt; struct meteor_video *video; vm_offset_t buf; struct format_params *fp; int i; bt848 = bktr->base; switch ( cmd ) { case BT848SCLIP: /* set clip region */ bktr->max_clip_node = 0; memcpy(&bktr->clip_list, arg, sizeof(bktr->clip_list)); for (i = 0; i < BT848_MAX_CLIP_NODE; i++) { if (bktr->clip_list[i].y_min == 0 && bktr->clip_list[i].y_max == 0) break; } bktr->max_clip_node = i; /* make sure that the list contains a valid clip secquence */ /* the clip rectangles should be sorted by x then by y as the second order sort key */ /* clip rectangle list is terminated by y_min and y_max set to 0 */ /* to disable clipping set y_min and y_max to 0 in the first clip rectangle . The first clip rectangle is clip_list[0]. */ if (bktr->max_clip_node == 0 && (bktr->clip_list[0].y_min != 0 && bktr->clip_list[0].y_max != 0)) { return EINVAL; } for (i = 0; i < BT848_MAX_CLIP_NODE - 1 ; i++) { if (bktr->clip_list[i].y_min == 0 && bktr->clip_list[i].y_max == 0) { break; } if ( bktr->clip_list[i+1].y_min != 0 && bktr->clip_list[i+1].y_max != 0 && bktr->clip_list[i].x_min > bktr->clip_list[i+1].x_min ) { bktr->max_clip_node = 0; return (EINVAL); } if (bktr->clip_list[i].x_min >= bktr->clip_list[i].x_max || bktr->clip_list[i].y_min >= bktr->clip_list[i].y_max || bktr->clip_list[i].x_min < 0 || bktr->clip_list[i].x_max < 0 || bktr->clip_list[i].y_min < 0 || bktr->clip_list[i].y_max < 0 ) { bktr->max_clip_node = 0; return (EINVAL); } } bktr->dma_prog_loaded = FALSE; break; case METEORSTATUS: /* get Bt848 status */ c_temp = bt848->dstatus; temp = 0; if (!(c_temp & 0x40)) temp |= METEOR_STATUS_HCLK; if (!(c_temp & 0x10)) temp |= METEOR_STATUS_FIDT; *(u_short *)arg = temp; break; - case BT848SFMT: /* set input format */ + case BT848SFMT: /* set input format */ temp = *(unsigned long*)arg & BT848_IFORM_FORMAT; - bt848->iform &= ~BT848_IFORM_FORMAT; - bt848->iform |= (temp | format_params[temp].iform_xtsel); + temp_iform = bt848->iform; + temp_iform &= ~BT848_IFORM_FORMAT; + temp_iform &= ~BT848_IFORM_XTSEL; + bt848->iform = (temp_iform | temp | format_params[temp].iform_xtsel); switch( temp ) { case BT848_IFORM_F_AUTO: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_AUTOMODE; break; case BT848_IFORM_F_NTSCM: case BT848_IFORM_F_NTSCJ: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_NTSC; bt848->adelay = format_params[temp].adelay; bt848->bdelay = format_params[temp].bdelay; bktr->format_params = temp; break; case BT848_IFORM_F_PALBDGHI: case BT848_IFORM_F_PALN: case BT848_IFORM_F_SECAM: case BT848_IFORM_F_RSVD: case BT848_IFORM_F_PALM: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_PAL; bt848->adelay = format_params[temp].adelay; bt848->bdelay = format_params[temp].bdelay; bktr->format_params = temp; break; } bktr->dma_prog_loaded = FALSE; break; case METEORSFMT: /* set input format */ + temp_iform = bt848->iform; + temp_iform &= ~BT848_IFORM_FORMAT; + temp_iform &= ~BT848_IFORM_XTSEL; switch(*(unsigned long *)arg & METEOR_FORM_MASK ) { case 0: /* default */ case METEOR_FMT_NTSC: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_NTSC; - bt848->iform &= ~BT848_IFORM_FORMAT; - bt848->iform |= BT848_IFORM_F_NTSCM | + bt848->iform = temp_iform | BT848_IFORM_F_NTSCM | format_params[BT848_IFORM_F_NTSCM].iform_xtsel; - bt848->adelay = 0x68; - bt848->bdelay = 0x5d; + bt848->adelay = format_params[BT848_IFORM_F_NTSCM].adelay; + bt848->bdelay = format_params[BT848_IFORM_F_NTSCM].bdelay; bktr->format_params = BT848_IFORM_F_NTSCM; break; case METEOR_FMT_PAL: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_PAL; - bt848->iform &= ~BT848_IFORM_FORMAT; - bt848->iform |= BT848_IFORM_F_PALBDGHI | + bt848->iform = temp_iform | BT848_IFORM_F_PALBDGHI | format_params[BT848_IFORM_F_PALBDGHI].iform_xtsel; - bt848->adelay = 0x7f; - bt848->bdelay = 0x72; + bt848->adelay = format_params[BT848_IFORM_F_PALBDGHI].adelay; + bt848->bdelay = format_params[BT848_IFORM_F_PALBDGHI].bdelay; bktr->format_params = BT848_IFORM_F_PALBDGHI; break; case METEOR_FMT_AUTOMODE: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_AUTOMODE; - bt848->iform &= ~BT848_IFORM_FORMAT; + bt848->iform = temp_iform | BT848_IFORM_F_AUTO | + format_params[BT848_IFORM_F_AUTO].iform_xtsel; break; default: return( EINVAL ); } bktr->dma_prog_loaded = FALSE; break; case METEORGFMT: /* get input format */ *(u_long *)arg = bktr->flags & METEOR_FORM_MASK; break; case BT848GFMT: /* get input format */ *(u_long *)arg = bt848->iform & BT848_IFORM_FORMAT; break; case METEORSCOUNT: /* (re)set error counts */ cnt = (struct meteor_counts *) arg; bktr->fifo_errors = cnt->fifo_errors; bktr->dma_errors = cnt->dma_errors; bktr->frames_captured = cnt->frames_captured; bktr->even_fields_captured = cnt->even_fields_captured; bktr->odd_fields_captured = cnt->odd_fields_captured; break; case METEORGCOUNT: /* get error counts */ cnt = (struct meteor_counts *) arg; cnt->fifo_errors = bktr->fifo_errors; cnt->dma_errors = bktr->dma_errors; cnt->frames_captured = bktr->frames_captured; cnt->even_fields_captured = bktr->even_fields_captured; cnt->odd_fields_captured = bktr->odd_fields_captured; break; case METEORGVIDEO: video = (struct meteor_video *)arg; video->addr = bktr->video.addr; video->width = bktr->video.width; video->banksize = bktr->video.banksize; video->ramsize = bktr->video.ramsize; break; case METEORSVIDEO: video = (struct meteor_video *)arg; bktr->video.addr = video->addr; bktr->video.width = video->width; bktr->video.banksize = video->banksize; bktr->video.ramsize = video->ramsize; break; case METEORSFPS: set_fps(bktr, *(u_short *)arg); break; case METEORGFPS: *(u_short *)arg = bktr->fps; break; case METEORSHUE: /* set hue */ bt848->hue = (*(u_char *) arg) & 0xff; break; case METEORGHUE: /* get hue */ *(u_char *)arg = bt848->hue; break; case METEORSBRIG: /* set brightness */ bt848->bright = *(u_char *)arg & 0xff; break; case METEORGBRIG: /* get brightness */ *(u_char *)arg = bt848->bright; break; case METEORSCSAT: /* set chroma saturation */ temp = (int)*(u_char *)arg; bt848->sat_u_lo = bt848->sat_v_lo = (temp << 1) & 0xff; bt848->e_control &= ~(BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); bt848->o_control &= ~(BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); if ( temp & BIT_SEVEN_HIGH ) { bt848->e_control |= (BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); bt848->o_control |= (BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); } break; case METEORGCSAT: /* get chroma saturation */ temp = (bt848->sat_v_lo >> 1) & 0xff; if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB ) temp |= BIT_SEVEN_HIGH; *(u_char *)arg = (u_char)temp; break; case METEORSCONT: /* set contrast */ temp = (int)*(u_char *)arg & 0xff; temp <<= 1; bt848->contrast_lo = temp & 0xff; bt848->e_control &= ~BT848_E_CONTROL_CON_MSB; bt848->o_control &= ~BT848_O_CONTROL_CON_MSB; bt848->e_control |= ((temp & 0x100) >> 6 ) & BT848_E_CONTROL_CON_MSB; bt848->o_control |= ((temp & 0x100) >> 6 ) & BT848_O_CONTROL_CON_MSB; break; case METEORGCONT: /* get contrast */ temp = (int)bt848->contrast_lo & 0xff; temp |= ((int)bt848->o_control & 0x04) << 6; *(u_char *)arg = (u_char)((temp >> 1) & 0xff); break; case METEORSSIGNAL: if(*(int *)arg == 0 || *(int *)arg >= NSIG) { return( EINVAL ); break; } bktr->signal = *(int *) arg; bktr->proc = pr; break; case METEORGSIGNAL: *(int *)arg = bktr->signal; break; case METEORCAPTUR: temp = bktr->flags; switch (*(int *) arg) { case METEOR_CAP_SINGLE: if (bktr->bigbuf==0) /* no frame buffer allocated */ return( ENOMEM ); /* already capturing */ if (temp & METEOR_CAP_MASK) return( EIO ); start_capture(bktr, METEOR_SINGLE); /* wait for capture to complete */ bt848->int_stat = ALL_INTS_CLEARED; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; bt848->cap_ctl = bktr->bktr_cap_ctl; error = tsleep((caddr_t)bktr, BKTRPRI, "captur", hz); if (error && (error != ERESTART)) { /* Here if we didn't get complete frame */ #ifdef DIAGNOSTIC printf( "bktr%d: ioctl: tsleep error %d %x\n", unit, error, bt848->risc_count); #endif /* stop dma */ bt848->int_mask = ALL_INTS_DISABLED; /* disable risc, leave fifo running */ bt848->gpio_dma_ctl = FIFO_ENABLED; } bktr->flags &= ~(METEOR_SINGLE|METEOR_WANT_MASK); /* FIXME: should we set bt848->int_stat ??? */ break; case METEOR_CAP_CONTINOUS: if (bktr->bigbuf==0) /* no frame buffer allocated */ return( ENOMEM ); /* already capturing */ if (temp & METEOR_CAP_MASK) return( EIO ); start_capture(bktr, METEOR_CONTIN); bt848->int_stat = bt848->int_stat; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->cap_ctl = bktr->bktr_cap_ctl; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; #ifdef BT848_DUMP dump_bt848( bt848 ); #endif break; case METEOR_CAP_STOP_CONT: if (bktr->flags & METEOR_CONTIN) { /* turn off capture */ bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->cap_ctl = CAPTURE_OFF; bt848->int_mask = ALL_INTS_DISABLED; bktr->flags &= ~(METEOR_CONTIN | METEOR_WANT_MASK); } } break; case METEORSETGEO: /* can't change parameters while capturing */ if (bktr->flags & METEOR_CAP_MASK) return( EBUSY ); geo = (struct meteor_geomet *) arg; error = 0; /* Either even or odd, if even & odd, then these a zero */ if ((geo->oformat & METEOR_GEO_ODD_ONLY) && (geo->oformat & METEOR_GEO_EVEN_ONLY)) { printf( "bktr%d: ioctl: Geometry odd or even only.\n", unit); return( EINVAL ); } /* set/clear even/odd flags */ if (geo->oformat & METEOR_GEO_ODD_ONLY) bktr->flags |= METEOR_ONLY_ODD_FIELDS; else bktr->flags &= ~METEOR_ONLY_ODD_FIELDS; if (geo->oformat & METEOR_GEO_EVEN_ONLY) bktr->flags |= METEOR_ONLY_EVEN_FIELDS; else bktr->flags &= ~METEOR_ONLY_EVEN_FIELDS; if ((geo->columns & 0x3fe) != geo->columns) { printf( "bktr%d: ioctl: %d: columns too large or not even.\n", unit, geo->columns); error = EINVAL; } if (((geo->rows & 0x7fe) != geo->rows) || ((geo->oformat & METEOR_GEO_FIELD_MASK) && ((geo->rows & 0x3fe) != geo->rows)) ) { printf( "bktr%d: ioctl: %d: rows too large or not even.\n", unit, geo->rows); error = EINVAL; } if (geo->frames > 32) { printf("bktr%d: ioctl: too many frames.\n", unit); error = EINVAL; } if (error) return( error ); bktr->dma_prog_loaded = FALSE; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_mask = ALL_INTS_DISABLED; if ((temp=(geo->rows * geo->columns * geo->frames * 2))) { if (geo->oformat & METEOR_GEO_RGB24) temp = temp * 2; /* meteor_mem structure for SYNC Capture */ if (geo->frames > 1) temp += PAGE_SIZE; temp = btoc(temp); if ((int) temp > bktr->alloc_pages && bktr->video.addr == 0) { buf = get_bktr_mem(unit, temp*PAGE_SIZE); if (buf != 0) { kmem_free(kernel_map, bktr->bigbuf, (bktr->alloc_pages * PAGE_SIZE)); bktr->bigbuf = buf; bktr->alloc_pages = temp; if (bootverbose) printf( "bktr%d: ioctl: Allocating %d bytes\n", unit, temp*PAGE_SIZE); } else error = ENOMEM; } } if (error) return error; bktr->rows = geo->rows; bktr->cols = geo->columns; bktr->frames = geo->frames; /* Pixel format (if in meteor pixfmt compatibility mode) */ if ( bktr->pixfmt_compat ) { bktr->format = METEOR_GEO_YUV_422; switch (geo->oformat & METEOR_GEO_OUTPUT_MASK) { case 0: /* default */ case METEOR_GEO_RGB16: bktr->format = METEOR_GEO_RGB16; break; case METEOR_GEO_RGB24: bktr->format = METEOR_GEO_RGB24; break; case METEOR_GEO_YUV_422: bktr->format = METEOR_GEO_YUV_422; if (geo->oformat & METEOR_GEO_YUV_12) bktr->format = METEOR_GEO_YUV_12; break; case METEOR_GEO_YUV_PACKED: bktr->format = METEOR_GEO_YUV_PACKED; break; } bktr->pixfmt = oformat_meteor_to_bt( bktr->format ); } if (bktr->flags & METEOR_CAP_MASK) { if (bktr->flags & (METEOR_CONTIN|METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } start_capture(bktr, METEOR_CONTIN); bt848->int_stat = bt848->int_stat; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_VSYNC | BT848_INT_FMTCHG; } } break; /* end of METEORSETGEO */ default: return common_ioctl( bktr, bt848, cmd, arg ); } return( 0 ); } /* * tuner ioctls */ static int tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ) { bt848_ptr_t bt848; int tmp_int; unsigned int temp, temp1; int offset; int count; u_char *buf; u_long par; u_char write; int i2c_addr; int i2c_port; u_long data; bt848 = bktr->base; switch ( cmd ) { #if defined( TUNER_AFC ) case TVTUNER_SETAFC: bktr->tuner.afc = (*(int *)arg != 0); break; case TVTUNER_GETAFC: *(int *)arg = bktr->tuner.afc; /* XXX Perhaps use another bit to indicate AFC success? */ break; #endif /* TUNER_AFC */ case TVTUNER_SETCHNL: temp_mute( bktr, TRUE ); temp = tv_channel( bktr, (int)*(unsigned long *)arg ); temp_mute( bktr, FALSE ); if ( temp < 0 ) return( EINVAL ); *(unsigned long *)arg = temp; break; case TVTUNER_GETCHNL: *(unsigned long *)arg = bktr->tuner.channel; break; case TVTUNER_SETTYPE: temp = *(unsigned long *)arg; if ( (temp < CHNLSET_MIN) || (temp > CHNLSET_MAX) ) return( EINVAL ); bktr->tuner.chnlset = temp; break; case TVTUNER_GETTYPE: *(unsigned long *)arg = bktr->tuner.chnlset; break; case TVTUNER_GETSTATUS: temp = i2cRead( bktr, TSA552x_RADDR ); *(unsigned long *)arg = temp & 0xff; break; case TVTUNER_SETFREQ: temp_mute( bktr, TRUE ); temp = tv_freq( bktr, (int)*(unsigned long *)arg ); temp_mute( bktr, FALSE ); if ( temp < 0 ) return( EINVAL ); *(unsigned long *)arg = temp; break; case TVTUNER_GETFREQ: *(unsigned long *)arg = bktr->tuner.frequency; break; case BT848_SAUDIO: /* set audio channel */ if ( set_audio( bktr, *(int*)arg ) < 0 ) return( EIO ); break; /* hue is a 2's compliment number, -90' to +89.3' in 0.7' steps */ case BT848_SHUE: /* set hue */ bt848->hue = (u_char)(*(int*)arg & 0xff); break; case BT848_GHUE: /* get hue */ *(int*)arg = (signed char)(bt848->hue & 0xff); break; /* brightness is a 2's compliment #, -50 to +%49.6% in 0.39% steps */ case BT848_SBRIG: /* set brightness */ bt848->bright = (u_char)(*(int *)arg & 0xff); break; case BT848_GBRIG: /* get brightness */ *(int *)arg = (signed char)(bt848->bright & 0xff); break; /* */ case BT848_SCSAT: /* set chroma saturation */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH ) { temp |= (BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); temp1 |= (BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); } else { temp &= ~(BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); temp1 &= ~(BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); } bt848->sat_u_lo = (u_char)(tmp_int & 0xff); bt848->sat_v_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GCSAT: /* get chroma saturation */ tmp_int = (int)(bt848->sat_v_lo & 0xff); if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* */ case BT848_SVSAT: /* set chroma V saturation */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH) { temp |= BT848_E_CONTROL_SAT_V_MSB; temp1 |= BT848_O_CONTROL_SAT_V_MSB; } else { temp &= ~BT848_E_CONTROL_SAT_V_MSB; temp1 &= ~BT848_O_CONTROL_SAT_V_MSB; } bt848->sat_v_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GVSAT: /* get chroma V saturation */ tmp_int = (int)bt848->sat_v_lo & 0xff; if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* */ case BT848_SUSAT: /* set chroma U saturation */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH ) { temp |= BT848_E_CONTROL_SAT_U_MSB; temp1 |= BT848_O_CONTROL_SAT_U_MSB; } else { temp &= ~BT848_E_CONTROL_SAT_U_MSB; temp1 &= ~BT848_O_CONTROL_SAT_U_MSB; } bt848->sat_u_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GUSAT: /* get chroma U saturation */ tmp_int = (int)bt848->sat_u_lo & 0xff; if ( bt848->e_control & BT848_E_CONTROL_SAT_U_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* lr 970528 luma notch etc - 3 high bits of e_control/o_control */ case BT848_SLNOTCH: /* set luma notch */ tmp_int = (*(int *)arg & 0x7) << 5 ; bt848->e_control &= ~0xe0 ; bt848->o_control &= ~0xe0 ; bt848->e_control |= tmp_int ; bt848->o_control |= tmp_int ; break; case BT848_GLNOTCH: /* get luma notch */ *(int *)arg = (int) ( (bt848->e_control & 0xe0) >> 5) ; break; /* */ case BT848_SCONT: /* set contrast */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH ) { temp |= BT848_E_CONTROL_CON_MSB; temp1 |= BT848_O_CONTROL_CON_MSB; } else { temp &= ~BT848_E_CONTROL_CON_MSB; temp1 &= ~BT848_O_CONTROL_CON_MSB; } bt848->contrast_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GCONT: /* get contrast */ tmp_int = (int)bt848->contrast_lo & 0xff; if ( bt848->e_control & BT848_E_CONTROL_CON_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* FIXME: SCBARS and CCBARS require a valid int * */ /* argument to succeed, but its not used; consider */ /* using the arg to store the on/off state so */ /* there's only one ioctl() needed to turn cbars on/off */ case BT848_SCBARS: /* set colorbar output */ bt848->color_ctl_color_bars = 1; break; case BT848_CCBARS: /* clear colorbar output */ bt848->color_ctl_color_bars = 0; break; case BT848_GAUDIO: /* get audio channel */ temp = bktr->audio_mux_select; if ( bktr->audio_mute_state == TRUE ) temp |= AUDIO_MUTE; *(int*)arg = temp; break; case BT848_SBTSC: /* set audio channel */ if ( set_BTSC( bktr, *(int*)arg ) < 0 ) return( EIO ); break; case BT848_WEEPROM: /* write eeprom */ offset = (((struct eeProm *)arg)->offset); count = (((struct eeProm *)arg)->count); buf = &(((struct eeProm *)arg)->bytes[ 0 ]); if ( writeEEProm( bktr, offset, count, buf ) < 0 ) return( EIO ); break; case BT848_REEPROM: /* read eeprom */ offset = (((struct eeProm *)arg)->offset); count = (((struct eeProm *)arg)->count); buf = &(((struct eeProm *)arg)->bytes[ 0 ]); if ( readEEProm( bktr, offset, count, buf ) < 0 ) return( EIO ); break; case BT848_SIGNATURE: offset = (((struct eeProm *)arg)->offset); count = (((struct eeProm *)arg)->count); buf = &(((struct eeProm *)arg)->bytes[ 0 ]); if ( signCard( bktr, offset, count, buf ) < 0 ) return( EIO ); break; /* Ioctl's for running the tuner device in radio mode */ case RADIO_GETMODE: *(unsigned char *)arg = bktr->tuner.radio_mode; break; case RADIO_SETMODE: bktr->tuner.radio_mode = *(unsigned char *)arg; break; case RADIO_GETFREQ: *(unsigned long *)arg = (bktr->tuner.frequency+407)*5; break; case RADIO_SETFREQ: /* The argument to this ioctl is NOT freq*16. It is ** freq*100. */ /* The radio in my stereo and the linear regression function ** in my HP48 have reached the conclusion that in order to ** set the radio tuner of the FM1216 to f MHz, the value to ** enter into the PLL is: f*20-407 ** If anyone has the exact values from the spec. sheet ** please forward them -- fj@login.dknet.dk */ temp=(int)*(unsigned long *)arg/5-407 +RADIO_OFFSET; #ifdef BKTR_RADIO_DEBUG printf("bktr%d: arg=%d temp=%d\n",unit,(int)*(unsigned long *)arg,temp); #endif #ifndef BKTR_RADIO_NOFREQCHECK /* According to the spec. sheet the band: 87.5MHz-108MHz */ /* is supported. */ if(temp<1343+RADIO_OFFSET || temp>1753+RADIO_OFFSET) { printf("bktr%d: Radio frequency out of range\n",unit); return(EINVAL); } #endif temp_mute( bktr, TRUE ); temp = tv_freq( bktr, temp ); temp_mute( bktr, FALSE ); #ifdef BKTR_RADIO_DEBUG if(temp) printf("bktr%d: tv_freq returned: %d\n",unit,temp); #endif if ( temp < 0 ) return( EINVAL ); *(unsigned long *)arg = temp; break; /* Luigi's I2CWR ioctl */ case BT848_I2CWR: par = *(u_long *)arg; write = (par >> 24) & 0xff ; i2c_addr = (par >> 16) & 0xff ; i2c_port = (par >> 8) & 0xff ; data = (par) & 0xff ; if (write) { i2cWrite( bktr, i2c_addr, i2c_port, data); } else { data = i2cRead( bktr, i2c_addr); } *(u_long *)arg = (par & 0xffffff00) | ( data & 0xff ); break; default: return common_ioctl( bktr, bt848, cmd, arg ); } return( 0 ); } /* * common ioctls */ int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg ) { int pixfmt; unsigned int temp; struct meteor_pixfmt *pf_pub; switch (cmd) { case METEORSINPUT: /* set input device */ switch(*(unsigned long *)arg & METEOR_DEV_MASK) { /* this is the RCA video input */ case 0: /* default */ case METEOR_INPUT_DEV0: bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0; bt848->iform &= ~BT848_IFORM_MUXSEL; bt848->iform |= BT848_IFORM_M_MUX1; bt848->e_control &= ~BT848_E_CONTROL_COMP; bt848->o_control &= ~BT848_O_CONTROL_COMP; set_audio( bktr, AUDIO_EXTERN ); break; /* this is the tuner input */ case METEOR_INPUT_DEV1: bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV1; bt848->iform &= ~BT848_IFORM_MUXSEL; bt848->iform |= BT848_IFORM_M_MUX0; bt848->e_control &= ~BT848_E_CONTROL_COMP; bt848->o_control &= ~BT848_O_CONTROL_COMP; set_audio( bktr, AUDIO_TUNER ); break; /* this is the S-VHS input */ case METEOR_INPUT_DEV2: case METEOR_INPUT_DEV_SVIDEO: bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV2; bt848->iform &= ~BT848_IFORM_MUXSEL; bt848->iform |= BT848_IFORM_M_MUX2; bt848->e_control |= BT848_E_CONTROL_COMP; bt848->o_control |= BT848_O_CONTROL_COMP; set_audio( bktr, AUDIO_EXTERN ); break; default: return( EINVAL ); } break; case METEORGINPUT: /* get input device */ *(u_long *)arg = bktr->flags & METEOR_DEV_MASK; break; case METEORSACTPIXFMT: if (( *(int *)arg < 0 ) || ( *(int *)arg >= PIXFMT_TABLE_SIZE )) return( EINVAL ); bktr->pixfmt = *(int *)arg; bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); bktr->pixfmt_compat = FALSE; break; case METEORGACTPIXFMT: *(int *)arg = bktr->pixfmt; break; case METEORGSUPPIXFMT : pf_pub = (struct meteor_pixfmt *)arg; pixfmt = pf_pub->index; if (( pixfmt < 0 ) || ( pixfmt >= PIXFMT_TABLE_SIZE )) return( EINVAL ); memcpy( pf_pub, &pixfmt_table[ pixfmt ].public, sizeof( *pf_pub ) ); /* Patch in our format index */ pf_pub->index = pixfmt; break; #if defined( STATUS_SUM ) case BT848_GSTATUS: /* reap status */ disable_intr(); temp = status_sum; status_sum = 0; enable_intr(); *(u_int*)arg = temp; break; #endif /* STATUS_SUM */ default: return( ENOTTY ); } return( 0 ); } /* * */ int bktr_mmap( dev_t dev, int offset, int nprot ) { int unit; bktr_ptr_t bktr; unit = UNIT(minor(dev)); if (unit >= NBKTR || MINOR(minor(dev)) > 0)/* could this happen here? */ return( -1 ); bktr = &(brooktree[ unit ]); if (nprot & PROT_EXEC) return( -1 ); if (offset >= bktr->alloc_pages * PAGE_SIZE) return( -1 ); return( i386_btop(vtophys(bktr->bigbuf) + offset) ); } /****************************************************************************** * bt848 RISC programming routines: */ /* * */ #ifdef BT848_DEBUG static int dump_bt848( bt848_ptr_t bt848 ) { volatile u_char *bt848r = (u_char *)bt848; int r[60]={ 4, 8, 0xc, 0x8c, 0x10, 0x90, 0x14, 0x94, 0x18, 0x98, 0x1c, 0x9c, 0x20, 0xa0, 0x24, 0xa4, 0x28, 0x2c, 0xac, 0x30, 0x34, 0x38, 0x3c, 0x40, 0xc0, 0x48, 0x4c, 0xcc, 0x50, 0xd0, 0xd4, 0x60, 0x64, 0x68, 0x6c, 0xec, 0xd8, 0xdc, 0xe0, 0xe4, 0, 0, 0, 0 }; int i; for (i = 0; i < 40; i+=4) { printf(" Reg:value : \t%x:%x \t%x:%x \t %x:%x \t %x:%x\n", r[i], bt848r[r[i]], r[i+1], bt848r[r[i+1]], r[i+2], bt848r[r[i+2]], r[i+3], bt848r[r[i+3]]); } printf(" INT STAT %x \n", bt848->int_stat); printf(" Reg INT_MASK %x \n", bt848->int_mask); printf(" Reg GPIO_DMA_CTL %x \n", bt848->gpio_dma_ctl); return( 0 ); } #endif /* * build write instruction */ #define BKTR_FM1 0x6 /* packed data to follow */ #define BKTR_FM3 0xe /* planar data to follow */ #define BKTR_VRE 0x4 /* even field to follow */ #define BKTR_VRO 0xC /* odd field to follow */ #define BKTR_PXV 0x0 /* valid word (never used) */ #define BKTR_EOL 0x1 /* last dword, 4 bytes */ #define BKTR_SOL 0x2 /* first dword */ #define OP_WRITE (0x1 << 28) #define OP_SKIP (0x2 << 28) #define OP_WRITEC (0x5 << 28) #define OP_JUMP (0x7 << 28) #define OP_SYNC (0x8 << 28) #define OP_WRITE123 (0x9 << 28) #define OP_WRITES123 (0xb << 28) #define OP_SOL (1 << 27) /* first instr for scanline */ #define OP_EOL (1 << 26) bool_t notclipped (bktr_reg_t * bktr, int x, int width) { int i; bktr_clip_t * clip_node; bktr->clip_start = -1; bktr->last_y = 0; bktr->y = 0; bktr->y2 = width; bktr->line_length = width; bktr->yclip = -1; bktr->yclip2 = -1; bktr->current_col = 0; if (bktr->max_clip_node == 0 ) return TRUE; clip_node = (bktr_clip_t *) &bktr->clip_list[0]; for (i = 0; i < bktr->max_clip_node; i++ ) { clip_node = (bktr_clip_t *) &bktr->clip_list[i]; if (x >= clip_node->x_min && x <= clip_node->x_max ) { bktr->clip_start = i; return FALSE; } } return TRUE; } bool_t getline(bktr_reg_t *bktr, int x ) { int i, j; bktr_clip_t * clip_node ; if (bktr->line_length == 0 || bktr->current_col >= bktr->line_length) return FALSE; bktr->y = min(bktr->last_y, bktr->line_length); bktr->y2 = bktr->line_length; bktr->yclip = bktr->yclip2 = -1; for (i = bktr->clip_start; i < bktr->max_clip_node; i++ ) { clip_node = (bktr_clip_t *) &bktr->clip_list[i]; if (x >= clip_node->x_min && x <= clip_node->x_max) { if (bktr->last_y <= clip_node->y_min) { bktr->y = min(bktr->last_y, bktr->line_length); bktr->y2 = min(clip_node->y_min, bktr->line_length); bktr->yclip = min(clip_node->y_min, bktr->line_length); bktr->yclip2 = min(clip_node->y_max, bktr->line_length); bktr->last_y = bktr->yclip2; bktr->clip_start = i; for (j = i+1; j < bktr->max_clip_node; j++ ) { clip_node = (bktr_clip_t *) &bktr->clip_list[j]; if (x >= clip_node->x_min && x <= clip_node->x_max) { if (bktr->last_y >= clip_node->y_min) { bktr->yclip2 = min(clip_node->y_max, bktr->line_length); bktr->last_y = bktr->yclip2; bktr->clip_start = j; } } else break ; } return TRUE; } } } if (bktr->current_col <= bktr->line_length) { bktr->current_col = bktr->line_length; return TRUE; } return FALSE; } static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width , u_long operation, int pixel_width, volatile u_char ** target_buffer, int cols ) { u_long flag, flag2; struct meteor_pixfmt *pf = &pixfmt_table[ bktr->pixfmt ].public; u_int skip, start_skip; /* For RGB24, we need to align the component in FIFO Byte Lane 0 */ /* to the 1st byte in the mem dword containing our start addr. */ /* BTW, we know this pixfmt's 1st byte is Blue; thus the start addr */ /* must be Blue. */ start_skip = 0; if (( pf->type == METEOR_PIXTYPE_RGB ) && ( pf->Bpp == 3 )) switch ( ((u_long) *target_buffer) % 4 ) { case 2 : start_skip = 4 ; break; case 1 : start_skip = 8 ; break; } if ((width * pixel_width) < DMA_BT848_SPLIT ) { if ( width == cols) { flag = OP_SOL | OP_EOL; } else if (bktr->current_col == 0 ) { flag = OP_SOL; } else if (bktr->current_col == cols) { flag = OP_EOL; } else flag = 0; skip = 0; if (( flag & OP_SOL ) && ( start_skip > 0 )) { *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip; flag &= ~OP_SOL; skip = start_skip; } *(*dma_prog)++ = operation | flag | (width * pixel_width - skip); if (operation != OP_SKIP ) *(*dma_prog)++ = (u_long) *target_buffer; *target_buffer += width * pixel_width; bktr->current_col += width; } else { if (bktr->current_col == 0 && width == cols) { flag = OP_SOL ; flag2 = OP_EOL; } else if (bktr->current_col == 0 ) { flag = OP_SOL; flag2 = 0; } else if (bktr->current_col >= cols) { flag = 0; flag2 = OP_EOL; } else { flag = 0; flag2 = 0; } skip = 0; if (( flag & OP_SOL ) && ( start_skip > 0 )) { *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip; flag &= ~OP_SOL; skip = start_skip; } *(*dma_prog)++ = operation | flag | (width * pixel_width / 2 - skip); if (operation != OP_SKIP ) *(*dma_prog)++ = (u_long ) *target_buffer ; *target_buffer += (width * pixel_width / 2) ; if ( operation == OP_WRITE ) operation = OP_WRITEC; *(*dma_prog)++ = operation | flag2 | (width * pixel_width / 2); *target_buffer += (width * pixel_width / 2) ; bktr->current_col += width; } return TRUE; } static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ) { int i; bt848_ptr_t bt848; volatile u_long target_buffer, buffer, target,width; volatile u_long pitch; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; u_int Bpp = pf_int->public.Bpp; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; bt848->vbi_pack_size = 0; bt848->vbi_pack_del = 0; bt848->adc = SYNC_LEVEL; bt848->color_ctl_rgb_ded = 1; bt848->e_vscale_hi |= 0xc0; bt848->o_vscale_hi |= 0xc0; if (cols > 385 ) { bt848->e_vtc = 0; bt848->o_vtc = 0; } else { bt848->e_vtc = 1; bt848->o_vtc = 1; } bktr->capcontrol = 3 << 2 | 3; dma_prog = (u_long *) bktr->dma_prog; /* Construct Write */ if (bktr->video.addr) { target_buffer = (u_long) bktr->video.addr; pitch = bktr->video.width; } else { target_buffer = (u_long) vtophys(bktr->bigbuf); pitch = cols*Bpp; } buffer = target_buffer; /* contruct sync : for video packet format */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1; /* sync, mode indicator packed data */ *dma_prog++ = 0; /* NULL WORD */ width = cols; for (i = 0; i < (rows/interlace); i++) { target = target_buffer; if ( notclipped(bktr, i, width)) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } else { while(getline(bktr, i)) { if (bktr->y != bktr->y2 ) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } if (bktr->yclip != bktr->yclip2 ) { split(bktr,(volatile u_long **) &dma_prog, bktr->yclip2 - bktr->yclip, OP_SKIP, Bpp, (volatile u_char **) &target, cols); } } } target_buffer += interlace * pitch; } switch (i_flag) { case 1: /* sync vre */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { target_buffer = buffer + pitch; dma_prog = (u_long *) bktr->odd_dma_prog; /* sync vre IRQ bit */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1; *dma_prog++ = 0; /* NULL WORD */ width = cols; for (i = 0; i < (rows/interlace); i++) { target = target_buffer; if ( notclipped(bktr, i, width)) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } else { while(getline(bktr, i)) { if (bktr->y != bktr->y2 ) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } if (bktr->yclip != bktr->yclip2 ) { split(bktr, (volatile u_long **) &dma_prog, bktr->yclip2 - bktr->yclip, OP_SKIP, Bpp, (volatile u_char **) &target, cols); } } } target_buffer += interlace * pitch; } } /* sync vre IRQ bit */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ; *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ) { int i; volatile unsigned int inst; volatile unsigned int inst3; volatile u_long target_buffer, buffer; bt848_ptr_t bt848; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; int b; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; bt848->e_scloop |= BT848_E_SCLOOP_CAGC; /* enable chroma comb */ bt848->o_scloop |= BT848_O_SCLOOP_CAGC; bt848->color_ctl_rgb_ded = 1; bt848->color_ctl_gamma = 1; bt848->adc = SYNC_LEVEL; bktr->capcontrol = 1 << 6 | 1 << 4 | 1 << 2 | 3; bktr->capcontrol = 3 << 2 | 3; dma_prog = (u_long *) bktr->dma_prog; /* Construct Write */ /* write , sol, eol */ inst = OP_WRITE | OP_SOL | (cols); /* write , sol, eol */ inst3 = OP_WRITE | OP_EOL | (cols); if (bktr->video.addr) target_buffer = (u_long) bktr->video.addr; else target_buffer = (u_long) vtophys(bktr->bigbuf); buffer = target_buffer; /* contruct sync : for video packet format */ /* sync, mode indicator packed data */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1; *dma_prog++ = 0; /* NULL WORD */ b = cols; for (i = 0; i < (rows/interlace); i++) { *dma_prog++ = inst; *dma_prog++ = target_buffer; *dma_prog++ = inst3; *dma_prog++ = target_buffer + b; target_buffer += interlace*(cols * 2); } switch (i_flag) { case 1: /* sync vre */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { target_buffer = (u_long) buffer + cols*2; dma_prog = (u_long * ) bktr->odd_dma_prog; /* sync vre */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_FM1; *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace) ; i++) { *dma_prog++ = inst; *dma_prog++ = target_buffer; *dma_prog++ = inst3; *dma_prog++ = target_buffer + b; target_buffer += interlace * ( cols*2); } } /* sync vro IRQ bit */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ){ int i; volatile unsigned int inst; volatile u_long target_buffer, t1, buffer; bt848_ptr_t bt848; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; dma_prog = (u_long *) bktr->dma_prog; bktr->capcontrol = 1 << 6 | 1 << 4 | 3; bt848->adc = SYNC_LEVEL; bt848->oform = 0x00; bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */ bt848->o_control |= BT848_O_CONTROL_LDEC; bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */ bt848->o_scloop |= BT848_O_SCLOOP_CAGC; bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */ bt848->o_vscale_hi &= ~0x80; bt848->e_vscale_hi |= 0x40; /* set chroma comb */ bt848->o_vscale_hi |= 0x40; /* disable gamma correction removal */ bt848->color_ctl_gamma = 1; /* Construct Write */ inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols); if (bktr->video.addr) target_buffer = (u_long) bktr->video.addr; else target_buffer = (u_long) vtophys(bktr->bigbuf); buffer = target_buffer; t1 = buffer; /* contruct sync : for video packet format */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/ *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace ) ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | cols/2 << 16; *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace; target_buffer += interlace*cols; } switch (i_flag) { case 1: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vre*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { dma_prog = (u_long * ) bktr->odd_dma_prog; target_buffer = (u_long) buffer + cols; t1 = buffer + cols/2; *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace ) ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | cols/2 << 16; *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace; target_buffer += interlace*cols; } } *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ; *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ){ int i; volatile unsigned int inst; volatile unsigned int inst1; volatile u_long target_buffer, t1, buffer; bt848_ptr_t bt848; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; dma_prog = (u_long *) bktr->dma_prog; bktr->capcontrol = 1 << 6 | 1 << 4 | 3; bt848->adc = SYNC_LEVEL; bt848->oform = 0x00; bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */ bt848->o_control |= BT848_O_CONTROL_LDEC; bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */ bt848->o_scloop |= BT848_O_SCLOOP_CAGC; bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */ bt848->o_vscale_hi &= ~0x80; bt848->e_vscale_hi |= 0x40; /* set chroma comb */ bt848->o_vscale_hi |= 0x40; /* disable gamma correction removal */ bt848->color_ctl_gamma = 1; /* Construct Write */ inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols); inst1 = OP_WRITES123 | OP_SOL | OP_EOL | (cols); if (bktr->video.addr) target_buffer = (u_long) bktr->video.addr; else target_buffer = (u_long) vtophys(bktr->bigbuf); buffer = target_buffer; t1 = buffer; *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/ *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace )/2 ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace; target_buffer += interlace*cols; *dma_prog++ = inst1; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; target_buffer += interlace*cols; } switch (i_flag) { case 1: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vro*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { dma_prog = (u_long * ) bktr->odd_dma_prog; target_buffer = (u_long) buffer + cols; t1 = buffer + cols/2; *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < ((rows/interlace )/2 ) ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace; target_buffer += interlace*cols; *dma_prog++ = inst1; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; target_buffer += interlace*cols; } } *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void build_dma_prog( bktr_ptr_t bktr, char i_flag ) { int rows, cols, interlace; bt848_ptr_t bt848; int tmp_int; unsigned int temp; struct format_params *fp; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; fp = &format_params[bktr->format_params]; bt848 = bktr->base; bt848->int_mask = ALL_INTS_DISABLED; /* disable FIFO & RISC, leave other bits alone */ bt848->gpio_dma_ctl &= ~FIFO_RISC_ENABLED; /* set video parameters */ temp = ((quad_t ) fp->htotal* (quad_t) fp->horizontal * 4096 / fp->vertical / bktr->cols) - 4096; bt848->e_hscale_lo = temp & 0xff; bt848->o_hscale_lo = temp & 0xff; bt848->e_hscale_hi = (temp >> 8) & 0xff; bt848->o_hscale_hi = (temp >> 8) & 0xff; /* horizontal active */ temp = bktr->cols; bt848->e_hactive_lo = temp & 0xff; bt848->o_hactive_lo = temp & 0xff; bt848->e_crop &= ~0x3; bt848->o_crop &= ~0x3; bt848->e_crop |= (temp >> 8) & 0x3; bt848->o_crop |= (temp >> 8) & 0x3; /* horizontal delay */ temp = (fp->hdelay * bktr->cols) / fp->hactive; temp = temp & 0x3fe; bt848->e_delay_lo = temp & 0xff; bt848->o_delay_lo = temp & 0xff; bt848->e_crop &= ~0xc; bt848->o_crop &= ~0xc; bt848->e_crop |= (temp >> 6) & 0xc; bt848->o_crop |= (temp >> 6) & 0xc; /* vertical scale */ if (bktr->flags & METEOR_ONLY_ODD_FIELDS || bktr->flags & METEOR_ONLY_EVEN_FIELDS) tmp_int = 65536 - (((fp->vactive * 256 + (bktr->rows/2)) / bktr->rows) - 512); else { tmp_int = 65536 - (((fp->vactive * 512 + (bktr->rows / 2)) / bktr->rows) - 512); } tmp_int &= 0x1fff; bt848->e_vscale_lo = tmp_int & 0xff; bt848->o_vscale_lo = tmp_int & 0xff; bt848->e_vscale_hi &= ~0x1f; bt848->o_vscale_hi &= ~0x1f; bt848->e_vscale_hi |= (tmp_int >> 8) & 0x1f; bt848->o_vscale_hi |= (tmp_int >> 8) & 0x1f; /* vertical active */ bt848->e_crop &= ~0x30; bt848->e_crop |= (fp->vactive >> 4) & 0x30; bt848->e_vactive_lo = fp->vactive & 0xff; bt848->o_crop &= ~0x30; bt848->o_crop |= (fp->vactive >> 4) & 0x30; bt848->o_vactive_lo = fp->vactive & 0xff; /* vertical delay */ bt848->e_vdelay_lo = fp->vdelay; bt848->o_vdelay_lo = fp->vdelay; /* end of video params */ /* capture control */ switch (i_flag) { case 1: bktr->bktr_cap_ctl = (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN); bt848->e_vscale_hi &= ~0x20; bt848->o_vscale_hi &= ~0x20; interlace = 1; break; case 2: bktr->bktr_cap_ctl = (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_ODD); bt848->e_vscale_hi &= ~0x20; bt848->o_vscale_hi &= ~0x20; interlace = 1; break; default: bktr->bktr_cap_ctl = (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN | BT848_CAP_CTL_ODD); bt848->e_vscale_hi |= 0x20; bt848->o_vscale_hi |= 0x20; interlace = 2; break; } bt848->risc_strt_add = vtophys(bktr->dma_prog); rows = bktr->rows; cols = bktr->cols; if ( pf_int->public.type == METEOR_PIXTYPE_RGB ) { rgb_prog(bktr, i_flag, cols, rows, interlace); return; } if ( pf_int->public.type == METEOR_PIXTYPE_YUV ) { yuv422_prog(bktr, i_flag, cols, rows, interlace); bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); return; } if ( pf_int->public.type == METEOR_PIXTYPE_YUV_PACKED ) { yuvpack_prog(bktr, i_flag, cols, rows, interlace); bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); return; } if ( pf_int->public.type == METEOR_PIXTYPE_YUV_12 ) { yuv12_prog(bktr, i_flag, cols, rows, interlace); bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); return; } return; } /****************************************************************************** * video & video capture specific routines: */ /* * */ static void start_capture( bktr_ptr_t bktr, unsigned type ) { bt848_ptr_t bt848; u_char i_flag; struct format_params *fp; fp = &format_params[bktr->format_params]; bt848 = bktr->base; bt848->dstatus = 0; bt848->int_stat = bt848->int_stat; bktr->flags |= type; bktr->flags &= ~METEOR_WANT_MASK; switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; i_flag = 1; break; case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; i_flag = 2; break; default: bktr->flags |= METEOR_WANT_MASK; i_flag = 3; break; } /* TDEC is only valid for continuous captures */ if ( type == METEOR_SINGLE ) { u_short fps_save = bktr->fps; set_fps(bktr, fp->frame_rate); bktr->fps = fps_save; } else set_fps(bktr, bktr->fps); if (bktr->dma_prog_loaded == FALSE) { build_dma_prog(bktr, i_flag); bktr->dma_prog_loaded = TRUE; } bt848->risc_strt_add = vtophys(bktr->dma_prog); } /* * */ static void set_fps( bktr_ptr_t bktr, u_short fps ) { bt848_ptr_t bt848; struct format_params *fp; int i_flag; fp = &format_params[bktr->format_params]; bt848 = bktr->base; switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; i_flag = 1; break; case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; i_flag = 1; break; default: bktr->flags |= METEOR_WANT_MASK; i_flag = 2; break; } bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_stat = ALL_INTS_CLEARED; bktr->fps = fps; bt848->tdec = 0; if (fps < fp->frame_rate) bt848->tdec = i_flag*(fp->frame_rate - fps) & 0x3f; else bt848->tdec = 0; return; } /* * There is also a problem with range checking on the 7116. * It seems to only work for 22 bits, so the max size we can allocate * is 22 bits long or 4194304 bytes assuming that we put the beginning * of the buffer on a 2^24 bit boundary. The range registers will use * the top 8 bits of the dma start registers along with the bottom 22 * bits of the range register to determine if we go out of range. * This makes getting memory a real kludge. * */ #define RANGE_BOUNDARY (1<<22) static vm_offset_t get_bktr_mem( int unit, unsigned size ) { vm_offset_t addr = 0; addr = vm_page_alloc_contig(size, 0x100000, 0xffffffff, 1<<24); if (addr == 0) addr = vm_page_alloc_contig(size, 0x100000, 0xffffffff, PAGE_SIZE); if (addr == 0) { printf("bktr%d: Unable to allocate %d bytes of memory.\n", unit, size); } return( addr ); } /* * Given a pixfmt index, compute the bt848 swap_flags necessary to * achieve the specified swapping. * Note that without bt swapping, 2Bpp and 3Bpp modes are written * byte-swapped, and 4Bpp modes are byte and word swapped (see Table 6 * and read R->L). * Note also that for 3Bpp, we may additionally need to do some creative * SKIPing to align the FIFO bytelines with the target buffer (see split()). * This is abstracted here: e.g. no swaps = RGBA; byte & short swap = ABGR * as one would expect. */ static u_int pixfmt_swap_flags( int pixfmt ) { struct meteor_pixfmt *pf = &pixfmt_table[ pixfmt ].public; u_int swapf = 0; switch ( pf->Bpp ) { case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP ); break; case 3 : /* no swaps supported for 3bpp - makes no sense w/ bt848 */ break; case 4 : if ( pf->swap_bytes ) swapf = pf->swap_shorts ? 0 : WSWAP; else swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP); break; } return swapf; } /* * Converts meteor-defined pixel formats (e.g. METEOR_GEO_RGB16) into * our pixfmt_table indices. */ static int oformat_meteor_to_bt( u_long format ) { int i; struct meteor_pixfmt *pf1, *pf2; /* Find format in compatibility table */ for ( i = 0; i < METEOR_PIXFMT_TABLE_SIZE; i++ ) if ( meteor_pixfmt_table[i].meteor_format == format ) break; if ( i >= METEOR_PIXFMT_TABLE_SIZE ) return -1; pf1 = &meteor_pixfmt_table[i].public; /* Match it with an entry in master pixel format table */ for ( i = 0; i < PIXFMT_TABLE_SIZE; i++ ) { pf2 = &pixfmt_table[i].public; if (( pf1->type == pf2->type ) && ( pf1->Bpp == pf2->Bpp ) && !memcmp( pf1->masks, pf2->masks, sizeof( pf1->masks )) && ( pf1->swap_bytes == pf2->swap_bytes ) && ( pf1->swap_shorts == pf2->swap_shorts )) break; } if ( i >= PIXFMT_TABLE_SIZE ) return -1; return i; } /****************************************************************************** * i2c primitives: */ /* */ #define I2CBITTIME (0x5<<4) /* 5 * 0.48uS */ #define I2C_READ 0x01 #define I2C_COMMAND (I2CBITTIME | \ BT848_DATA_CTL_I2CSCL | \ BT848_DATA_CTL_I2CSDA) /* * */ static int i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 ) { u_long x; u_long data; bt848_ptr_t bt848; bt848 = bktr->base; /* clear status bits */ bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE); /* build the command datum */ data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND; if ( byte2 != -1 ) { data |= ((byte2 & 0xff) << 8); data |= BT848_DATA_CTL_I2CW3B; } /* write the address and data */ bt848->i2c_data_ctl = data; /* wait for completion */ for ( x = 0x7fffffff; x; --x ) { /* safety valve */ if ( bt848->int_stat & BT848_INT_I2CDONE ) break; } /* check for ACK */ if ( !x || !(bt848->int_stat & BT848_INT_RACK) ) return( -1 ); /* return OK */ return( 0 ); } /* * */ static int i2cRead( bktr_ptr_t bktr, int addr ) { u_long x; bt848_ptr_t bt848; bt848 = bktr->base; /* clear status bits */ bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE); /* write the READ address */ bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND; /* wait for completion */ for ( x = 0x7fffffff; x; --x ) { /* safety valve */ if ( bt848->int_stat & BT848_INT_I2CDONE ) break; } /* check for ACK */ if ( !x || !(bt848->int_stat & BT848_INT_RACK) ) return( -1 ); /* it was a read */ return( (bt848->i2c_data_ctl >> 8) & 0xff ); } #if defined( I2C_SOFTWARE_PROBE ) /* * we are keeping this around for any parts that we need to probe * but that CANNOT be probed via an i2c read. * this is necessary because the hardware i2c mechanism * cannot be programmed for 1 byte writes. * currently there are no known i2c parts that we need to probe * and that cannot be safely read. */ static int i2cProbe( bktr_ptr_t bktr, int addr ); #define BITD 40 #define EXTRA_START /* * probe for an I2C device at addr. */ static int i2cProbe( bktr_ptr_t bktr, int addr ) { int x, status; bt848_ptr_t bt848; bt848 = bktr->base; /* the START */ #if defined( EXTRA_START ) bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */ #endif /* EXTRA_START */ bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */ bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */ /* write addr */ for ( x = 7; x >= 0; --x ) { if ( addr & (1<i2c_data_ctl = 1; DELAY( BITD ); /* assert HI data */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */ bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */ } else { bt848->i2c_data_ctl = 0; DELAY( BITD ); /* assert LO data */ bt848->i2c_data_ctl = 2; DELAY( BITD ); /* strobe clock */ bt848->i2c_data_ctl = 0; DELAY( BITD ); /* release clock */ } } /* look for an ACK */ bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */ status = bt848->i2c_data_ctl & 1; /* read the ACK bit */ bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */ /* the STOP */ bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */ bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */ return( status ); } #undef EXTRA_START #undef BITD #endif /* I2C_SOFTWARE_PROBE */ /* * */ static int writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data ) { return( -1 ); } /* * */ static int readEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data ) { int x; int addr; int max; int byte; /* get the address of the EEProm */ addr = (int)(bktr->card.eepromAddr & 0xff); if ( addr == 0 ) return( -1 ); max = (int)(bktr->card.eepromSize * EEPROMBLOCKSIZE); if ( (offset + count) > max ) return( -1 ); /* set the start address */ if ( i2cWrite( bktr, addr, offset, -1 ) == -1 ) return( -1 ); /* the read cycle */ for ( x = 0; x < count; ++x ) { if ( (byte = i2cRead( bktr, (addr | 1) )) == -1 ) return( -1 ); data[ x ] = byte; } return( 0 ); } /****************************************************************************** * card probe */ /* * the recognized cards, used as indexes of several tables. * * if probeCard() fails to detect the proper card on boot you can * override it by setting the following define to the card you are using: * #define OVERRIDE_CARD * * where is one of the following card defines. */ #define CARD_UNKNOWN 0 #define CARD_MIRO 1 #define CARD_HAUPPAUGE 2 #define CARD_STB 3 #define CARD_INTEL 4 /* * the data for each type of card * * Note: * these entried MUST be kept in the order defined by the CARD_XXX defines! */ static const struct CARDTYPE cards[] = { /* CARD_UNKNOWN */ { "Unknown", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx unknown */ 0, 0, /* EEProm unknown */ 0, /* EEProm unknown */ { 0, 0, 0, 0, 0 } }, /* CARD_MIRO */ { "Miro TV", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx unknown */ 0, 0, /* EEProm unknown */ 0, /* size unknown */ { 0x02, 0x01, 0x00, 0x0a, 1 } }, /* XXX ??? */ /* CARD_HAUPPAUGE */ { "Hauppauge WinCast/TV", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx is optional */ 0, PFC8582_WADDR, /* EEProm type */ (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */ { 0x00, 0x02, 0x01, 0x01, 1 } }, /* audio MUX values */ /* CARD_STB */ { "STB TV/PCI", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx is optional */ 0, X24C01_WADDR, /* EEProm type */ (u_char)(128 / EEPROMBLOCKSIZE), /* 128 bytes */ { 0x00, 0x01, 0x02, 0x02, 1 } }, /* audio MUX values */ /* CARD_INTEL */ - { "Intel Smart Video III", /* the 'name' */ + { "Intel Smart Video III/VideoLogic Captivator PCI", /* the 'name' */ NULL, /* the tuner */ 0, 0, 0, 0, { 0, 0, 0, 0, 0 } } }; /* * the data for each type of tuner * * if probeCard() fails to detect the proper tuner on boot you can * override it by setting the following define to the tuner present: * #define OVERRIDE_TUNER * * where is one of the following tuner defines. */ /* indexes into tuners[] */ #define NO_TUNER 0 #define TEMIC_NTSC 1 #define TEMIC_PAL 2 #define TEMIC_SECAM 3 #define PHILIPS_NTSC 4 #define PHILIPS_PAL 5 #define PHILIPS_SECAM 6 #define TEMIC_PALI 7 #define PHILIPS_PALI 8 #define PHILIPS_FR1236_NTSC 9 #define PHILIPS_FR1216_PAL 10 /* XXX FIXME: this list is incomplete */ /* input types */ #define TTYPE_XXX 0 #define TTYPE_NTSC 1 #define TTYPE_NTSC_J 2 #define TTYPE_PAL 3 #define TTYPE_PAL_M 4 #define TTYPE_PAL_N 5 #define TTYPE_SECAM 6 /** struct TUNER { char* name; u_char type; u_char pllAddr; u_char pllControl; u_char bandLimits[ 2 ]; u_char bandAddrs[ 3 ]; }; */ static const struct TUNER tuners[] = { /* XXX FIXME: fill in the band-switch crosspoints */ /* NO_TUNER */ { "", /* the 'name' */ TTYPE_XXX, /* input type */ 0x00, /* PLL write address */ { 0x00, /* control byte for PLL */ 0x00, 0x00, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x00, 0x00, 0x00,0x00} }, /* the band-switch values */ /* TEMIC_NTSC */ { "Temic NTSC", /* the 'name' */ TTYPE_NTSC, /* input type */ TEMIC_NTSC_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */ /* TEMIC_PAL */ { "Temic PAL", /* the 'name' */ TTYPE_PAL, /* input type */ TEMIC_PALI_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */ /* TEMIC_SECAM */ { "Temic SECAM", /* the 'name' */ TTYPE_SECAM, /* input type */ 0x00, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */ /* PHILIPS_NTSC */ { "Philips NTSC", /* the 'name' */ TTYPE_NTSC, /* input type */ PHILIPS_NTSC_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */ /* PHILIPS_PAL */ { "Philips PAL", /* the 'name' */ TTYPE_PAL, /* input type */ PHILIPS_PAL_WADDR, /* PLL write address */ { TSA552x_FCONTROL, /* control byte for PLL */ TSA552x_FCONTROL, TSA552x_FCONTROL, TSA552x_RADIO }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */ /* PHILIPS_SECAM */ { "Philips SECAM", /* the 'name' */ TTYPE_SECAM, /* input type */ 0x00, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, TSA552x_RADIO }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30,0xa4 } }, /* the band-switch values */ /* TEMIC_PAL I */ { "Temic PAL I", /* the 'name' */ TTYPE_PAL, /* input type */ TEMIC_PALI_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */ /* PHILIPS_PAL */ { "Philips PAL I", /* the 'name' */ TTYPE_PAL, /* input type */ TEMIC_PALI_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */ /* PHILIPS_FR1236_NTSC */ { "Philips FR1236 NTSC FM", /* the 'name' */ TTYPE_NTSC, /* input type */ PHILIPS_FR1236_NTSC_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00}, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */ /* PHILIPS_FR1216_PAL */ { "Philips FR1216 PAL FM", /* the 'name' */ TTYPE_PAL, /* input type */ PHILIPS_FR1216_PAL_WADDR, /* PLL write address */ { TSA552x_FCONTROL, /* control byte for PLL */ TSA552x_FCONTROL, TSA552x_FCONTROL, TSA552x_RADIO }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */ }; /* * get a signature of the card * read all 128 possible i2c read addresses from 0x01 thru 0xff * build a bit array with a 1 bit for each i2c device that responds * * XXX FIXME: use offset & count args */ #define ABSENT (-1) static int signCard( bktr_ptr_t bktr, int offset, int count, u_char* sig ) { int x; for ( x = 0; x < 16; ++x ) sig[ x ] = 0; for ( x = 0; x < 128; ++x ) { if ( i2cRead( bktr, (2 * x) + 1 ) != ABSENT ) { sig[ x / 8 ] |= (1 << (x % 8) ); } } return( 0 ); } -#undef ABSENT +/* + * any_i2c_devices. + * Some BT848/BT848A cards have no tuner and no additional i2c devices + * eg stereo decoder. These are used for video conferencing or capture from + * a video camera. (VideoLogic Captivator PCI, Intel SmartCapture card). + * + * Determine if there are any i2c devices present. There are none present if + * a) reading from all 128 devices returns ABSENT (-1) for each one + * (eg VideoLogic Captivator PCI with BT848) + * b) reading from all 128 devices returns 0 for each one + * (eg VideoLogic Captivator PCI rev. 2F with BT848A) + */ +static int check_for_i2c_devices( bktr_ptr_t bktr ){ + int x, temp_read; + int i2c_all_0 = 1; + int i2c_all_absent = 1; + for ( x = 0; x < 128; ++x ) { + temp_read = i2cRead( bktr, (2 * x) + 1 ); + if (temp_read != 0) i2c_all_0 = 0; + if (temp_read != ABSENT) i2c_all_absent = 0; + } + + if ((i2c_all_0) || (i2c_all_absent)) return 0; + else return 1; +} +#undef ABSENT /* * determine the card brand/model + * OVERRIDE_CARD, OVERRIDE_TUNER, OVERRIDE_DBX and OVERRIDE_MSP + * can be used to select a specific device, regardless of the + * autodetection and i2c device checks. */ #define ABSENT (-1) static void probeCard( bktr_ptr_t bktr, int verbose ) { int card; int status; bt848_ptr_t bt848; + int any_i2c_devices; + any_i2c_devices = check_for_i2c_devices( bktr ); bt848 = bktr->base; + bt848->gpio_out_en = 0; + if (bootverbose) + printf("bktr: GPIO is 0x%08x\n", bt848->gpio_data); + #if defined( OVERRIDE_CARD ) bktr->card = cards[ (card = OVERRIDE_CARD) ]; goto checkTuner; #endif - bt848->gpio_out_en = 0; - if (bootverbose) - printf("bktr: GPIO is 0x%08x\n", bt848->gpio_data); + /* Check for i2c devices */ + if (!any_i2c_devices) { + bktr->card = cards[ (card = CARD_INTEL) ]; + goto checkTuner; + } /* look for a tuner */ if ( i2cRead( bktr, TSA552x_RADDR ) == ABSENT ) { bktr->card = cards[ (card = CARD_INTEL) ]; bktr->card.tuner = &tuners[ NO_TUNER ]; goto checkDBX; } /* look for a hauppauge card */ if ( (status = i2cRead( bktr, PFC8582_RADDR )) != ABSENT ) { bktr->card = cards[ (card = CARD_HAUPPAUGE) ]; goto checkTuner; } /* look for an STB card */ if ( (status = i2cRead( bktr, X24C01_RADDR )) != ABSENT ) { bktr->card = cards[ (card = CARD_STB) ]; goto checkTuner; } /* XXX FIXME: (how do I) look for a Miro card */ bktr->card = cards[ (card = CARD_MIRO) ]; checkTuner: #if defined( OVERRIDE_TUNER ) bktr->card.tuner = &tuners[ OVERRIDE_TUNER ]; goto checkDBX; #endif + /* Check for i2c devices */ + if (!any_i2c_devices) { + bktr->card.tuner = &tuners[ NO_TUNER ]; + goto checkDBX; + } + /* differentiate type of tuner */ switch (card) { case CARD_MIRO: switch (((bt848->gpio_data >> 10)-1)&7) { case 0: bktr->card.tuner = &tuners[ TEMIC_PAL ]; break; case 1: bktr->card.tuner = &tuners[ PHILIPS_PAL ]; break; case 2: bktr->card.tuner = &tuners[ PHILIPS_NTSC ]; break; case 3: bktr->card.tuner = &tuners[ PHILIPS_SECAM ]; break; case 4: bktr->card.tuner = &tuners[ NO_TUNER ]; break; case 5: bktr->card.tuner = &tuners[ PHILIPS_PALI ]; break; case 6: bktr->card.tuner = &tuners[ TEMIC_NTSC ]; break; case 7: bktr->card.tuner = &tuners[ TEMIC_PALI ]; break; } break; default: if ( i2cRead( bktr, TEMIC_NTSC_RADDR ) != ABSENT ) { bktr->card.tuner = &tuners[ TEMIC_NTSC ]; goto checkDBX; } if ( i2cRead( bktr, PHILIPS_NTSC_RADDR ) != ABSENT ) { bktr->card.tuner = &tuners[ PHILIPS_NTSC ]; goto checkDBX; } if ( card == CARD_HAUPPAUGE ) { if ( i2cRead( bktr, TEMIC_PALI_RADDR ) != ABSENT ) { bktr->card.tuner = &tuners[ TEMIC_PAL ]; goto checkDBX; } } /* no tuner found */ bktr->card.tuner = &tuners[ NO_TUNER ]; } checkDBX: #if defined( OVERRIDE_DBX ) bktr->card.dbx = OVERRIDE_DBX; - goto end; + goto checkMSP; #endif - /* probe for BTSC (dbx) chips */ + /* Check for i2c devices */ + if (!any_i2c_devices) { + goto checkMSP; + } + + /* probe for BTSC (dbx) chip */ if ( i2cRead( bktr, TDA9850_RADDR ) != ABSENT ) bktr->card.dbx = 1; + +checkMSP: +#if defined( OVERRIDE_MSP ) + bktr->card.msp3400c = OVERRIDE_MSP; + goto checkEnd; +#endif + /* Check for i2c devices */ + if (!any_i2c_devices) { + goto checkEnd; + } + if ( i2cRead( bktr, MSP3400C_RADDR ) != ABSENT ) bktr->card.msp3400c = 1; +checkEnd: + if ( verbose ) { printf( "%s", bktr->card.name ); if ( bktr->card.tuner ) printf( ", %s tuner", bktr->card.tuner->name ); if ( bktr->card.dbx ) printf( ", dbx stereo" ); if ( bktr->card.msp3400c ) printf( ", msp3400c stereo" ); printf( ".\n" ); } } #undef ABSENT /****************************************************************************** * tuner specific routines: */ /* scaling factor for frequencies expressed as ints */ #define FREQFACTOR 16 /* * Format: * entry 0: MAX legal channel * entry 1: IF frequency * expressed as fi{mHz} * 16, * eg 45.75mHz == 45.75 * 16 = 732 * entry 2: [place holder/future] * entry 3: base of channel record 0 * entry 3 + (x*3): base of channel record 'x' * entry LAST: NULL channel entry marking end of records * * Record: * int 0: base channel * int 1: frequency of base channel, * expressed as fb{mHz} * 16, * int 2: offset frequency between channels, * expressed as fo{mHz} * 16, */ /* * North American Broadcast Channels: * * 2: 55.25 mHz - 4: 67.25 mHz * 5: 77.25 mHz - 6: 83.25 mHz * 7: 175.25 mHz - 13: 211.25 mHz * 14: 471.25 mHz - 83: 885.25 mHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 static int nabcst[] = { 83, (int)( 45.75 * FREQFACTOR), 0, 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef OFFSET /* * North American Cable Channels, IRC: * * 2: 55.25 mHz - 4: 67.25 mHz * 5: 77.25 mHz - 6: 83.25 mHz * 7: 175.25 mHz - 13: 211.25 mHz * 14: 121.25 mHz - 22: 169.25 mHz * 23: 217.25 mHz - 94: 643.25 mHz * 95: 91.25 mHz - 99: 115.25 mHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 static int irccable[] = { 99, (int)( 45.75 * FREQFACTOR), 0, 95, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 23, (int)(217.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 14, (int)(121.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef OFFSET /* * North American Cable Channels, HRC: * * 2: 54 mHz - 4: 66 mHz * 5: 78 mHz - 6: 84 mHz * 7: 174 mHz - 13: 210 mHz * 14: 120 mHz - 22: 168 mHz * 23: 216 mHz - 94: 642 mHz * 95: 90 mHz - 99: 114 mHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 static int hrccable[] = { 99, (int)( 45.75 * FREQFACTOR), 0, 95, (int)( 90.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 23, (int)(216.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 14, (int)(120.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 5, (int)( 78.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 2, (int)( 54.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef OFFSET /* * Western European broadcast channels: * * (there are others that appear to vary between countries - rmt) * * here's the table Philips provides: * caution, some of the offsets don't compute... * * 1 4525 700 N21 * * 2 4825 700 E2 * 3 5525 700 E3 * 4 6225 700 E4 * * 5 17525 700 E5 * 6 18225 700 E6 * 7 18925 700 E7 * 8 19625 700 E8 * 9 20325 700 E9 * 10 21025 700 E10 * 11 21725 700 E11 * 12 22425 700 E12 * * 13 5375 700 ITA * 14 6225 700 ITB * * 15 8225 700 ITC * * 16 17525 700 ITD * 17 18325 700 ITE * * 18 19225 700 ITF * 19 20125 700 ITG * 20 21025 700 ITH * * 21 47125 800 E21 * 22 47925 800 E22 * 23 48725 800 E23 * 24 49525 800 E24 * 25 50325 800 E25 * 26 51125 800 E26 * 27 51925 800 E27 * 28 52725 800 E28 * 29 53525 800 E29 * 30 54325 800 E30 * 31 55125 800 E31 * 32 55925 800 E32 * 33 56725 800 E33 * 34 57525 800 E34 * 35 58325 800 E35 * 36 59125 800 E36 * 37 59925 800 E37 * 38 60725 800 E38 * 39 61525 800 E39 * 40 62325 800 E40 * 41 63125 800 E41 * 42 63925 800 E42 * 43 64725 800 E43 * 44 65525 800 E44 * 45 66325 800 E45 * 46 67125 800 E46 * 47 67925 800 E47 * 48 68725 800 E48 * 49 69525 800 E49 * 50 70325 800 E50 * 51 71125 800 E51 * 52 71925 800 E52 * 53 72725 800 E53 * 54 73525 800 E54 * 55 74325 800 E55 * 56 75125 800 E56 * 57 75925 800 E57 * 58 76725 800 E58 * 59 77525 800 E59 * 60 78325 800 E60 * 61 79125 800 E61 * 62 79925 800 E62 * 63 80725 800 E63 * 64 81525 800 E64 * 65 82325 800 E65 * 66 83125 800 E66 * 67 83925 800 E67 * 68 84725 800 E68 * 69 85525 800 E69 * * 70 4575 800 IA * 71 5375 800 IB * 72 6175 800 IC * * 74 6925 700 S01 * 75 7625 700 S02 * 76 8325 700 S03 * * 80 10525 700 S1 * 81 11225 700 S2 * 82 11925 700 S3 * 83 12625 700 S4 * 84 13325 700 S5 * 85 14025 700 S6 * 86 14725 700 S7 * 87 15425 700 S8 * 88 16125 700 S9 * 89 16825 700 S10 * 90 23125 700 S11 * 91 23825 700 S12 * 92 24525 700 S13 * 93 25225 700 S14 * 94 25925 700 S15 * 95 26625 700 S16 * 96 27325 700 S17 * 97 28025 700 S18 * 98 28725 700 S19 * 99 29425 700 S20 * * * Channels S21 - S41 are taken from * http://gemma.apple.com:80/dev/technotes/tn/tn1012.html * * 100 30325 800 S21 * 101 31125 800 S22 * 102 31925 800 S23 * 103 32725 800 S24 * 104 33525 800 S25 * 105 34325 800 S26 * 106 35125 800 S27 * 107 35925 800 S28 * 108 36725 800 S29 * 109 37525 800 S30 * 110 38325 800 S31 * 111 39125 800 S32 * 112 39925 800 S33 * 113 40725 800 S34 * 114 41525 800 S35 * 115 42325 800 S36 * 116 43125 800 S37 * 117 43925 800 S38 * 118 44725 800 S39 * 119 45525 800 S40 * 120 46325 800 S41 * * 121 3890 000 IFFREQ * */ static int weurope[] = { 121, (int)( 38.90 * FREQFACTOR), 0, 100, (int)(303.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 90, (int)(231.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 80, (int)(105.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 74, (int)( 69.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 17, (int)(183.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR), 16, (int)(175.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR), 15, (int)(82.25 * FREQFACTOR), (int)(8.50 * FREQFACTOR), 13, (int)(53.75 * FREQFACTOR), (int)(8.50 * FREQFACTOR), 5, (int)(175.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 2, (int)(48.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 0 }; /* * Japanese Broadcast Channels: * * 1: 91.25MHz - 3: 103.25MHz * 4: 171.25MHz - 7: 189.25MHz * 8: 193.25MHz - 12: 217.25MHz (VHF) * 13: 471.25MHz - 62: 765.25MHz (UHF) * * IF freq: 45.75 mHz * OR * IF freq: 58.75 mHz */ #define OFFSET 6.00 #define IF_FREQ 45.75 static int jpnbcst[] = { 62, (int)(IF_FREQ * FREQFACTOR), 0, 13, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef IF_FREQ #undef OFFSET /* * Japanese Cable Channels: * * 1: 91.25MHz - 3: 103.25MHz * 4: 171.25MHz - 7: 189.25MHz * 8: 193.25MHz - 12: 217.25MHz * 13: 109.25MHz - 21: 157.25MHz * 22: 165.25MHz * 23: 223.25MHz - 63: 463.25MHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 #define IF_FREQ 45.75 static int jpncable[] = { 63, (int)(IF_FREQ * FREQFACTOR), 0, 23, (int)(223.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 22, (int)(165.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 13, (int)(109.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef IF_FREQ #undef OFFSET static int* freqTable[] = { NULL, nabcst, irccable, hrccable, weurope, jpnbcst, jpncable }; #define TBL_CHNL freqTable[ bktr->tuner.chnlset ][ x ] #define TBL_BASE_FREQ freqTable[ bktr->tuner.chnlset ][ x + 1 ] #define TBL_OFFSET freqTable[ bktr->tuner.chnlset ][ x + 2 ] static int frequency_lookup( bktr_ptr_t bktr, int channel ) { int x; /* check for "> MAX channel" */ x = 0; if ( channel > TBL_CHNL ) return( -1 ); /* search the table for data */ for ( x = 3; TBL_CHNL; x += 3 ) { if ( channel >= TBL_CHNL ) { return( TBL_BASE_FREQ + ((channel - TBL_CHNL) * TBL_OFFSET) ); } } /* not found, must be below the MIN channel */ return( -1 ); } #undef TBL_OFFSET #undef TBL_BASE_FREQ #undef TBL_CHNL #define TBL_IF freqTable[ bktr->tuner.chnlset ][ 1 ] /* * set the frequency of the tuner */ static int tv_freq( bktr_ptr_t bktr, int frequency ) { const struct TUNER* tuner; u_char addr; u_char control; u_char band; int N; tuner = bktr->card.tuner; if ( tuner == NULL ) return( -1 ); /* * select the band based on frequency * XXX FIXME: get the cross-over points from the tuner struct */ if ( frequency < (160 * FREQFACTOR) ) N = 0; else if ( frequency < (454 * FREQFACTOR) ) N = 1; else N = 2; if(frequency > RADIO_OFFSET) { N=3; frequency -= RADIO_OFFSET; } /* set the address of the PLL */ addr = tuner->pllAddr; control = tuner->pllControl[ N ]; band = tuner->bandAddrs[ N ]; if(!(band && control)) /* Don't try to set un- */ return(-1); /* supported modes. */ if(N==3) band |= bktr->tuner.radio_mode; /* * N = 16 * { fRF(pc) + fIF(pc) } * where: * pc is picture carrier, fRF & fIF are in mHz * * frequency was passed in as mHz * 16 */ #if defined( TEST_TUNER_AFC ) if ( bktr->tuner.afc ) frequency -= 4; #endif N = frequency + TBL_IF; if ( frequency > bktr->tuner.frequency ) { i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); i2cWrite( bktr, addr, control, band ); } else { i2cWrite( bktr, addr, control, band ); i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); } #if defined( TUNER_AFC ) if ( bktr->tuner.afc == TRUE ) { if ( (N = do_afc( bktr, addr, N )) < 0 ) { /* AFC failed, restore requested frequency */ N = frequency + TBL_IF; i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); } else frequency = N - TBL_IF; } #endif /* TUNER_AFC */ /* update frequency */ bktr->tuner.frequency = frequency; return( 0 ); } #if defined( TUNER_AFC ) /* * */ static int do_afc( bktr_ptr_t bktr, int addr, int frequency ) { int step; int status; int origFrequency; origFrequency = frequency; /* wait for first setting to take effect */ tsleep( (caddr_t)bktr, PZERO, "tuning", hz/8 ); if ( (status = i2cRead( bktr, addr + 1 )) < 0 ) return( -1 ); #if defined( TEST_TUNER_AFC ) printf( "\nOriginal freq: %d, status: 0x%02x\n", frequency, status ); #endif for ( step = 0; step < AFC_MAX_STEP; ++step ) { if ( (status = i2cRead( bktr, addr + 1 )) < 0 ) goto fubar; if ( !(status & 0x40) ) { #if defined( TEST_TUNER_AFC ) printf( "no lock!\n" ); #endif goto fubar; } switch( status & AFC_BITS ) { case AFC_FREQ_CENTERED: #if defined( TEST_TUNER_AFC ) printf( "Centered, freq: %d, status: 0x%02x\n", frequency, status ); #endif return( frequency ); case AFC_FREQ_MINUS_125: case AFC_FREQ_MINUS_62: #if defined( TEST_TUNER_AFC ) printf( "Low, freq: %d, status: 0x%02x\n", frequency, status ); #endif --frequency; break; case AFC_FREQ_PLUS_62: case AFC_FREQ_PLUS_125: #if defined( TEST_TUNER_AFC ) printf( "Hi, freq: %d, status: 0x%02x\n", frequency, status ); #endif ++frequency; break; } i2cWrite( bktr, addr, (frequency>>8) & 0x7f, frequency & 0xff ); DELAY( AFC_DELAY ); } fubar: i2cWrite( bktr, addr, (origFrequency>>8) & 0x7f, origFrequency & 0xff ); return( -1 ); } #endif /* TUNER_AFC */ #undef TBL_IF /* * set the channel of the tuner */ static int tv_channel( bktr_ptr_t bktr, int channel ) { int frequency; /* calculate the frequency according to tuner type */ if ( (frequency = frequency_lookup( bktr, channel )) < 0 ) return( -1 ); /* set the new frequency */ if ( tv_freq( bktr, frequency ) < 0 ) return( -1 ); /* OK to update records */ return( (bktr->tuner.channel = channel) ); } /****************************************************************************** * audio specific routines: */ /* * */ #define AUDIOMUX_DISCOVER_NOT static int set_audio( bktr_ptr_t bktr, int cmd ) { bt848_ptr_t bt848; u_long temp; volatile u_char idx; #if defined( AUDIOMUX_DISCOVER ) if ( cmd >= 200 ) cmd -= 200; else #endif /* AUDIOMUX_DISCOVER */ /* check for existance of audio MUXes */ if ( !bktr->card.audiomuxs[ 4 ] ) return( -1 ); switch (cmd) { case AUDIO_TUNER: #ifdef BKTR_REVERSEMUTE bktr->audio_mux_select = 3; #else bktr->audio_mux_select = 0; #endif break; case AUDIO_EXTERN: bktr->audio_mux_select = 1; break; case AUDIO_INTERN: bktr->audio_mux_select = 2; break; case AUDIO_MUTE: bktr->audio_mute_state = TRUE; /* set mute */ break; case AUDIO_UNMUTE: bktr->audio_mute_state = FALSE; /* clear mute */ break; default: printf("bktr: audio cmd error %02x\n", cmd); return( -1 ); } bt848 = bktr->base; /* * Leave the upper bits of the GPIO port alone in case they control * something like the dbx or teletext chips. This doesn't guarantee * success, but follows the rule of least astonishment. */ /* XXX FIXME: this was an 8 bit reference before new struct ??? */ bt848->gpio_reg_inp = (~GPIO_AUDIOMUX_BITS & 0xff); if ( bktr->audio_mute_state == TRUE ) #ifdef BKTR_REVERSEMUTE idx = 0; #else idx = 3; #endif else idx = bktr->audio_mux_select; temp = bt848->gpio_data & ~GPIO_AUDIOMUX_BITS; bt848->gpio_data = #if defined( AUDIOMUX_DISCOVER ) bt848->gpio_data = temp | (cmd & 0xff); printf("cmd: %d\n", cmd ); #else temp | bktr->card.audiomuxs[ idx ]; #endif /* AUDIOMUX_DISCOVER */ return( 0 ); } /* * */ static void temp_mute( bktr_ptr_t bktr, int flag ) { static int muteState = FALSE; if ( flag == TRUE ) { muteState = bktr->audio_mute_state; set_audio( bktr, AUDIO_MUTE ); /* prevent 'click' */ } else { tsleep( (caddr_t)bktr, PZERO, "tuning", hz/8 ); if ( muteState == FALSE ) set_audio( bktr, AUDIO_UNMUTE ); } } /* * setup the dbx chip * XXX FIXME: alot of work to be done here, this merely unmutes it. */ static int set_BTSC( bktr_ptr_t bktr, int control ) { return( i2cWrite( bktr, TDA9850_WADDR, CON3ADDR, control ) ); } /****************************************************************************** * magic: */ #ifdef __FreeBSD__ static bktr_devsw_installed = 0; static void bktr_drvinit( void *unused ) { dev_t dev; if ( ! bktr_devsw_installed ) { dev = makedev(CDEV_MAJOR, 0); cdevsw_add(&dev,&bktr_cdevsw, NULL); bktr_devsw_installed = 1; } } SYSINIT(bktrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,bktr_drvinit,NULL) #endif /* __FreeBSD__ */ #endif /* !defined(__FreeBSD__) || (NBKTR > 0 && NPCI > 0) */ /* Local Variables: */ /* mode: C */ /* c-indent-level: 8 */ /* c-brace-offset: -8 */ /* c-argdecl-indent: 8 */ /* c-label-offset: -8 */ /* c-continued-statement-offset: 8 */ /* c-tab-always-indent: nil */ /* tab-width: 8 */ /* End: */ diff --git a/sys/i386/conf/LINT b/sys/i386/conf/LINT index f4a6c4330fd1..21bf3c4046c0 100644 --- a/sys/i386/conf/LINT +++ b/sys/i386/conf/LINT @@ -1,1541 +1,1544 @@ # # LINT -- config file for checking all the sources, tries to pull in # as much of the source tree as it can. # -# $Id: LINT,v 1.423 1998/03/29 07:58:03 helbig Exp $ +# $Id: LINT,v 1.424 1998/04/09 22:28:57 sos Exp $ # # NB: You probably don't want to try running a kernel built from this # file. Instead, you should start from GENERIC, and add options from # this file as required. # # # This directive is mandatory; it defines the architecture to be # configured for; in this case, the 386 family based IBM-PC and # compatibles. # machine "i386" # # This is the ``identification'' of the kernel. Usually this should # be the same as the name of your kernel. # ident LINT # # The `maxusers' parameter controls the static sizing of a number of # internal system tables by a complicated formula defined in param.c. # maxusers 10 # # Certain applications can grow to be larger than the 128M limit # that FreeBSD initially imposes. Below are some options to # allow that limit to grow to 256MB, and can be increased further # with changing the parameters. MAXDSIZ is the maximum that the # limit can be set to, and the DFLDSIZ is the default value for # the limit. You might want to set the default lower than the # max, and explicitly set the maximum with a shell command for processes # that regularly exceed the limit like INND. # options "MAXDSIZ=(256*1024*1024)" options "DFLDSIZ=(256*1024*1024)" # When this is set, be extra conservative in various parts of the kernel # and choose functionality over speed (on the widest variety of systems). options FAILSAFE # This allows you to actually store this configuration file into # the kernel binary itself, where it may be later read by saying: # strings /kernel | grep ^___ | sed -e 's/^___//' > MYKERNEL # options INCLUDE_CONFIG_FILE # Include this file in kernel # # This directive defines a number of things: # - The compiled kernel is to be called `kernel' # - The root filesystem might be on partition wd0a # - Crash dumps will be written to wd0b, if possible. Specifying the # dump device here is not recommended. Use dumpon(8). # config kernel root on wd0 dumps on wd0 ##################################################################### # SMP OPTIONS: # # SMP enables building of a Symmetric MultiProcessor Kernel. # APIC_IO enables the use of the IO APIC for Symmetric I/O. # NCPU sets the number of CPUs, defaults to 2. # NBUS sets the number of busses, defaults to 4. # NAPIC sets the number of IO APICs on the motherboard, defaults to 1. # NINTR sets the total number of INTs provided by the motherboard. # # Notes: # # An SMP kernel will ONLY run on an Intel MP spec. qualified motherboard. # # Be sure to disable 'cpu "I386_CPU"' && 'cpu "I486_CPU"' for SMP kernels. # # Check the 'Rogue SMP hardware' section to see if additional options # are required by your hardware. # # Mandatory: options SMP # Symmetric MultiProcessor Kernel options APIC_IO # Symmetric (APIC) I/O # Optional, these are the defaults plus 1: options NCPU=5 # number of CPUs options NBUS=5 # number of busses options NAPIC=2 # number of IO APICs options NINTR=25 # number of INTs # # Rogue SMP hardware: # # Bridged PCI cards: # # The MP tables of most of the current generation MP motherboards # do NOT properly support bridged PCI cards. To use one of these # cards you should refer to ??? ##################################################################### # CPU OPTIONS # # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make # parts of the system run faster. This is especially true removing # I386_CPU. # cpu "I386_CPU" cpu "I486_CPU" cpu "I586_CPU" # aka Pentium(tm) cpu "I686_CPU" # aka Pentium Pro(tm) # # Options for CPU features. # # CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM # BlueLightning CPU. It works only with Cyrix FPU, and this option # should not be used with Intel FPU. # # CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning # CPU if CPU supports it. The default is double-clock mode on # BlueLightning CPU box. # # CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1). # # CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct # mapped mode. Default is 2-way set associative mode. # # CPU_CYRIX_NO_LOCK enables weak locking for the entire address space # of Cyrix 6x86 and 6x86MX CPUs. If this option is not set and # FAILESAFE is defined, NO_LOCK bit of CCR1 is cleared. (NOTE 3) # # CPU_DISABLE_5X86_LSSER disables load store serialize (i.e. enables # reorder). This option should not be used if you use memory mapped # I/O device(s). # # CPU_FASTER_5X86_FPU enables faster FPU exception handler. # # CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products # for i386 machines. # # CPU_IORT defines I/O clock delay time (NOTE 1). Default vaules of # I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively # (no clock delay). # # CPU_LOOP_EN prevents flushing the prefetch buffer if the destination # of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE # 1). # # CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1). # # CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU # enters suspend mode following execution of HALT instruction. # # CPU_WT_ALLOC enables write-through allocation. # # CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache # flush at hold state. # # CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs # without cache flush at hold state, and (2) write-back CPU cache on # Cyrix 6x86 whose revision < 2.7 (NOTE 2). # # NO_F00F_HACK disables the hack that prevents Pentiums (and ONLY # Pentiums) from locking up when a LOCK CMPXCHG8B instruction is # executed. This should be included for ALL kernels that won't run # on a Pentium. # # NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT, # CPU_LOOP_ENand CPU_RSTK_EN should no be used becasue of CPU bugs. # These options may crash your system. # # NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled # in write-through mode when revision < 2.7. If revision of Cyrix # 6x86 >= 2.7, CPU cache is always enabled in write-back mode. # # NOTE 3: This option may cause failures for software that requires # locked cycles in order to operate correctly. # options "CPU_BLUELIGHTNING_FPU_OP_CACHE" options "CPU_BLUELIGHTNING_3X" options "CPU_BTB_EN" options "CPU_DIRECT_MAPPED_CACHE" options "CPU_DISABLE_5X86_LSSER" options "CPU_FASTER_5X86_FPU" options "CPU_I486_ON_386" options "CPU_IORT" options "CPU_LOOP_EN" options "CPU_RSTK_EN" options "CPU_SUSP_HLT" options "CYRIX_CACHE_WORKS" options "CYRIX_CACHE_REALLY_WORKS" #options "NO_F00F_HACK" # # A math emulator is mandatory if you wish to run on hardware which # does not have a floating-point processor. Pick either the original, # bogus (but freely-distributable) math emulator, or a much more # fully-featured but GPL-licensed emulator taken from Linux. # options MATH_EMULATE #Support for x87 emulation # Don't enable both of these in a real config. options GPL_MATH_EMULATE #Support for x87 emulation via #new math emulator ##################################################################### # COMPATIBILITY OPTIONS # # Implement system calls compatible with 4.3BSD and older versions of # FreeBSD. You probably do NOT want to remove this as much current code # still relies on the 4.3 emulation. # options "COMPAT_43" # # Allow user-mode programs to manipulate their local descriptor tables. # This option is required for the WINE Windows(tm) emulator, and is # not used by anything else (that we know of). # options USER_LDT #allow user-level control of i386 ldt # # These three options provide support for System V Interface # Definition-style interprocess communication, in the form of shared # memory, semaphores, and message queues, respectively. # options SYSVSHM options SYSVSEM options SYSVMSG # # This option includes a MD5 routine in the kernel, this is used for # various authentication and privacy uses. # options "MD5" # # Allow processes to switch to vm86 mode, as well as enabling direct # user-mode access to the I/O port space. This option is necessary for # the doscmd emulator to run. # options "VM86" ##################################################################### # DEBUGGING OPTIONS # # Enable the kernel debugger. # options DDB # # Don't drop into DDB for a panic. Intended for unattended operation # where you may want to drop to DDB from the console, but still want # the machine to recover from a panic # options DDB_UNATTENDED # # If using GDB remote mode to debug the kernel, there's a non-standard # extension to the remote protocol that can be used to use the serial # port as both the debugging port and the system console. It's non- # standard and you're on your own if you enable it. See also the # "remotechat" variables in the FreeBSD specific version of gdb. # options GDB_REMOTE_CHAT # # KTRACE enables the system-call tracing facility ktrace(2). # options KTRACE #kernel tracing # # The DIAGNOSTIC option is used in a number of source files to enable # extra sanity checking of internal structures. This support is not # enabled by default because of the extra time it would take to check # for these conditions, which can only occur as a result of # programming errors. # options DIAGNOSTIC # # PERFMON causes the driver for Pentium/Pentium Pro performance counters # to be compiled. See perfmon(4) for more information. # options PERFMON # # This option let some drivers co-exist that can't co-exist in a running # system. This is used to be able to compile all kernel code in one go for # quality assurance purposes (like this file, which the option takes it name # from.) # options COMPILING_LINT # XXX - this doesn't belong here. # Allow ordinary users to take the console - this is useful for X. options UCONSOLE # XXX - this doesn't belong here either options USERCONFIG #boot -c editor options USERCONFIG_BOOT #imply -c and parse info area options VISUAL_USERCONFIG #visual boot -c editor ##################################################################### # NETWORKING OPTIONS # # Protocol families: # Only the INET (Internet) family is officially supported in FreeBSD. # Source code for the NS (Xerox Network Service) is provided for amusement # value. # options INET #Internet communications protocols options IPX #IPX/SPX communications protocols options IPXIP #IPX in IP encapsulation (not available) options IPTUNNEL #IP in IPX encapsulation (not available) options NETATALK #Appletalk communications protocols # These are currently broken but are shipped due to interest. #options NS #Xerox NS protocols # These are currently broken and are no longer shipped due to lack # of interest. #options CCITT #X.25 network layer #options ISO #options TPIP #ISO TP class 4 over IP #options TPCONS #ISO TP class 0 over X.25 #options LLC #X.25 link layer for Ethernets #options HDLC #X.25 link layer for serial lines #options EON #ISO CLNP over IP #options NSIP #XNS over IP # # Network interfaces: # The `loop' pseudo-device is MANDATORY when networking is enabled. # The `ether' pseudo-device provides generic code to handle # Ethernets; it is MANDATORY when a Ethernet device driver is # configured. # The 'fddi' pseudo-device provides generic code to support FDDI. # The `sppp' pseudo-device serves a similar role for certain types # of synchronous PPP links (like `cx', `ar'). # The `sl' pseudo-device implements the Serial Line IP (SLIP) service. # The `ppp' pseudo-device implements the Point-to-Point Protocol. # The `bpfilter' pseudo-device enables the Berkeley Packet Filter. Be # aware of the legal and administrative consequences of enabling this # option. The number of devices determines the maximum number of # simultaneous BPF clients programs runnable. # The `disc' pseudo-device implements a minimal network interface, # which throws away all packets sent and never receives any. It is # included for testing purposes. # The `tun' pseudo-device implements the User Process PPP (iijppp) # # The PPP_BSDCOMP option enables support for compress(1) style entire # packet compression, the PPP_DEFLATE is for zlib/gzip style compression. # PPP_FILTER enables code for filtering the ppp data stream and selecting # events for resetting the demand dial activity timer - requires bpfilter. # See pppd(8) for more details. # pseudo-device ether #Generic Ethernet pseudo-device fddi #Generic FDDI pseudo-device sppp #Generic Synchronous PPP pseudo-device loop #Network loopback device pseudo-device bpfilter 4 #Berkeley packet filter pseudo-device disc #Discard device pseudo-device tun 1 #Tunnel driver (user process ppp(8)) pseudo-device sl 2 #Serial Line IP pseudo-device ppp 2 #Point-to-point protocol options PPP_BSDCOMP #PPP BSD-compress support options PPP_DEFLATE #PPP zlib/deflate/gzip support options PPP_FILTER #enable bpf filtering (needs bpfilter) # # Internet family options: # # TCP_COMPAT_42 causes the TCP code to emulate certain bugs present in # 4.2BSD. This option should not be used unless you have a 4.2BSD # machine and TCP connections fail. # # MROUTING enables the kernel multicast packet forwarder, which works # with mrouted(8). # # IPFIREWALL enables support for IP firewall construction, in # conjunction with the `ipfw' program. IPFIREWALL_VERBOSE sends # logged packets to the system logger. IPFIREWALL_VERBOSE_LIMIT # limits the number of times a matching entry can be logged. # # WARNING: IPFIREWALL defaults to a policy of "deny ip from any to any" # and if you do not add other rules during startup to allow access, # YOU WILL LOCK YOURSELF OUT. It is suggested that you set firewall=open # in /etc/rc.conf when first enabling this feature, then refining the # firewall rules in /etc/rc.firewall after you've tested that the new kernel # feature works properly. # # IPFIREWALL_DEFAULT_TO_ACCEPT causes the default rule (at boot) to # allow everything. Use with care, if a cracker can crash your # firewall machine, they can get to your protected machines. However, # if you are using it as an as-needed filter for specific problems as # they arise, then this may be for you. Changing the default to 'allow' # means that you won't get stuck if the kernel and /sbin/ipfw binary get # out of sync. # # IPDIVERT enables the divert IP sockets, used by ``ipfw divert'' # # IPFILTER enables Darren Reed's ipfilter package. # IPFILTER_LOG enables ipfilter's logging. # IPFILTER_LKM enables LKM support for an ipfilter module (untested). # # TCPDEBUG is undocumented. # options "TCP_COMPAT_42" #emulate 4.2BSD TCP bugs options MROUTING # Multicast routing options IPFIREWALL #firewall options IPFIREWALL_VERBOSE #print information about # dropped packets options "IPFIREWALL_VERBOSE_LIMIT=100" #limit verbosity options IPFIREWALL_DEFAULT_TO_ACCEPT #allow everything by default options IPDIVERT #divert sockets options IPFILTER #kernel ipfilter support options IPFILTER_LOG #ipfilter logging #options IPFILTER_LKM #kernel support for ip_fil.o LKM options TCPDEBUG ##################################################################### # FILESYSTEM OPTIONS # # Only the root, /usr, and /tmp filesystems need be statically # compiled; everything else will be automatically loaded at mount # time. (Exception: the UFS family---FFS, and MFS --- cannot # currently be demand-loaded.) Some people still prefer to statically # compile other filesystems as well. # # NB: The NULL, PORTAL, UMAP and UNION filesystems are known to be # buggy, and WILL panic your system if you attempt to do anything with # them. They are included here as an incentive for some enterprising # soul to sit down and fix them. # # One of these is mandatory: options FFS #Fast filesystem options NFS #Network File System # The rest are optional: # options NFS_NOSERVER #Disable the NFS-server code. options "CD9660" #ISO 9660 filesystem options FDESC #File descriptor filesystem options KERNFS #Kernel filesystem options MFS #Memory File System options MSDOSFS #MS DOS File System options NULLFS #NULL filesystem options PORTAL #Portal filesystem options PROCFS #Process filesystem options UMAPFS #UID map filesystem options UNION #Union filesystem options "CD9660_ROOT" #CD-ROM usable as root device options FFS_ROOT #FFS usable as root device options NFS_ROOT #NFS usable as root device # This DEVFS is experimental but seems to work options DEVFS #devices filesystem # Allow the FFS to use Softupdates technology. # To do this you need to fetch the two files # /sys/ufs/ffs/softdep.h and /sys/ufs/ffs/ffs_softdep.c # from freebsd.org and understand the licensing restrictions. #options SOFTUPDATES # (we can't actually enable it because the files may not be present) # Make space in the kernel for a MFS root filesystem. Define to the number # of kilobytes to reserve for the filesystem. options MFS_ROOT=10 # Allow the MFS_ROOT code to load the MFS image from floppy if it is missing. options MFS_AUTOLOAD # Allow this many swap-devices. options NSWAPDEV=20 # Disk quotas are supported when this option is enabled. If you # change the value of this option, you must do a `make clean' in your # kernel compile directory in order to get a working kernel. # options QUOTA #enable disk quotas # Add more checking code to various filesystems #options NULLFS_DIAGNOSTIC #options KERNFS_DIAGNOSTIC #options UMAPFS_DIAGNOSTIC #options UNION_DIAGNOSTIC # In particular multi-session CD-Rs might require a huge amount of # time in order to "settle". If we are about mounting them as the # root f/s, we gotta wait a little. # # The number is supposed to be in seconds. options "CD9660_ROOTDELAY=20" # If you are running a machine just as a fileserver for PC and MAC users. # (using SAMBA or Netatalk), then you may consider setting this option # and keeping all those user's directories on a partition that is mounted # with the suiddir option. This gives new files the same ownership as # the directory (similiar to group). It's a security hole if you let # these users run programs so confine it to file-servers, (but it'll save you # lots of headaches in that case). Root owned directories are excempt and X bits # are cleared. the suid bit must be set on the directory as well. see chmod(1) # PC owners can't see/set ownerships so they keep getting their toes # trodden on. This saves you all the support calls as the filesystem # it's used on will act as they expect. ("It's my dir so it must be my file"). # options SUIDDIR # Add some error checking code to the null_bypass routine # in the NULL filesystem #options SAFETY ##################################################################### # SCSI DEVICES # SCSI DEVICE CONFIGURATION # The SCSI subsystem consists of the `base' SCSI code, a number of # high-level SCSI device `type' drivers, and the low-level host-adapter # device drivers. The host adapters are listed in the ISA and PCI # device configuration sections below. # # Beginning with FreeBSD 2.0.5 you can wire down your SCSI devices so # that a given bus, target, and LUN always come on line as the same # device unit. In earlier versions the unit numbers were assigned # in the order that the devices were probed on the SCSI bus. This # means that if you removed a disk drive, you may have had to rewrite # your /etc/fstab file, and also that you had to be careful when adding # a new disk as it may have been probed earlier and moved your device # configuration around. # This old behavior is maintained as the default behavior. The unit # assignment begins with the first non-wired down unit for a device # type. For example, if you wire a disk as "sd3" then the first # non-wired disk will be assigned sd4. # The syntax for wiring down devices is: # controller scbus0 at ahc0 # Single bus device # controller scbus1 at ahc1 bus 0 # Single bus device # controller scbus3 at ahc2 bus 0 # Twin bus device # controller scbus2 at ahc2 bus 1 # Twin bus device # disk sd0 at scbus0 target 0 unit 0 # disk sd1 at scbus3 target 1 # disk sd2 at scbus2 target 3 # tape st1 at scbus1 target 6 # device cd0 at scbus? # "units" (SCSI logical unit number) that are not specified are # treated as if specified as LUN 0. # All SCSI devices allocate as many units as are required. # The "unknown" device (uk? in pre-2.0.5) is now part of the base SCSI # configuration and doesn't have to be explicitly configured. controller scbus0 #base SCSI code device ch0 #SCSI media changers device sd0 #SCSI disks device st0 #SCSI tapes device cd0 #SCSI CD-ROMs device od0 #SCSI optical disk # The previous devices (ch, sd, st, cd) are recognized by config. # config doesn't (and shouldn't) know about these newer ones, # so we have to specify that they are on a SCSI bus with the "at scbus?" # clause. device worm0 at scbus? # SCSI worm device pt0 at scbus? # SCSI processor type device sctarg0 at scbus? # SCSI target # SCSI OPTIONS: # SCSIDEBUG: When defined enables debugging macros # NO_SCSI_SENSE: When defined disables sense descriptions (about 4k) # SCSI_REPORT_GEOMETRY: Always report disk geometry at boot up instead # of only when booting verbosely. options SCSIDEBUG #options NO_SCSI_SENSE options SCSI_REPORT_GEOMETRY # Options for the `od' optical disk driver: # # If drive returns sense key as 0x02 with vendor specific additional # sense code (ASC) and additional sense code qualifier (ASCQ), or # illegal ASC and ASCQ. This cause an error (NOT READY) and retrying. # To suppress this, use the following option. # options OD_BOGUS_NOT_READY # # For an automatic spindown, try this. Again, preferably as an # option in your config file. # WARNING! Use at your own risk. Joerg's ancient SONY SMO drive # groks it fine, while Shunsuke's Fujitsu chokes on it and times # out. # options OD_AUTO_TURNOFF ##################################################################### # POSIX P1003.1B # Real time extensions added int the 1993 Posix # P1003_1B: Infrastructure # _KPOSIX_PRIORITY_SCHEDULING: Build in _POSIX_PRIORITY_SCHEDULING # _KPOSIX_VERSION: Version kernel is built for options "P1003_1B" options "_KPOSIX_PRIORITY_SCHEDULING" options "_KPOSIX_VERSION=199309L" ##################################################################### # MISCELLANEOUS DEVICES AND OPTIONS # The `pty' device usually turns out to be ``effectively mandatory'', # as it is required for `telnetd', `rlogind', `screen', `emacs', and # `xterm', among others. pseudo-device pty 16 #Pseudo ttys - can go as high as 256 pseudo-device speaker #Play IBM BASIC-style noises out your speaker pseudo-device gzip #Exec gzipped a.out's pseudo-device vn #Vnode driver (turns a file into a device) pseudo-device snp 3 #Snoop device - to look at pty/vty/etc.. pseudo-device ccd 4 #Concatenated disk driver # These are only for watching for bitrot in old tty code. # broken #pseudo-device tb # These are only for watching for bitrot in old SCSI code. pseudo-device su #scsi user pseudo-device ssc #super scsi ##################################################################### # HARDWARE DEVICE CONFIGURATION # ISA and EISA devices: # EISA support is available for some device, so they can be auto-probed. # Micro Channel is not supported at all. # # Mandatory ISA devices: isa, npx # controller isa0 # # Options for `isa': # # AUTO_EOI_1 enables the `automatic EOI' feature for the master 8259A # interrupt controller. This saves about 0.7-1.25 usec for each interrupt. # This option breaks suspend/resume on some portables. # # AUTO_EOI_2 enables the `automatic EOI' feature for the slave 8259A # interrupt controller. This saves about 0.7-1.25 usec for each interrupt. # Automatic EOI is documented not to work for for the slave with the # original i8259A, but it works for some clones and some integrated # versions. # # BOUNCE_BUFFERS provides support for ISA DMA on machines with more # than 16 megabytes of memory. It doesn't hurt on other machines. # Some broken EISA and VLB hardware may need this, too. # # MAXMEM specifies the amount of RAM on the machine; if this is not # specified, FreeBSD will first read the amount of memory from the CMOS # RAM, so the amount of memory will initially be limited to 64MB or 16MB # depending on the BIOS. If the BIOS reports 64MB, a memory probe will # then attempt to detect the installed amount of RAM. If this probe # fails to detect >64MB RAM you will have to use the MAXMEM option. # The amount is in kilobytes, so for a machine with 128MB of RAM, it would # be 131072 (128 * 1024). # # TUNE_1542 enables the automatic ISA bus speed selection for the # Adaptec 1542 boards. Does not work for all boards, use it with caution. # # BROKEN_KEYBOARD_RESET disables the use of the keyboard controller to # reset the CPU for reboot. This is needed on some systems with broken # keyboard controllers. # # PAS_JOYSTICK_ENABLE enables the gameport on the ProAudio Spectrum options "AUTO_EOI_1" #options "AUTO_EOI_2" options BOUNCE_BUFFERS options "MAXMEM=(128*1024)" options "TUNE_1542" #options BROKEN_KEYBOARD_RESET #options PAS_JOYSTICK_ENABLE # Enable support for the kernel PLL to use an external PPS signal, # under supervision of [x]ntpd(8) # More info in ftp://ftp.udel.edu/pub/ntp/kernel.tar.Z options PPS_SYNC # Enable PnP support in the kernel. This allows you to automaticly # attach to PnP cards for drivers that support it and allows you to # configure cards from USERCONFIG. See pnp(4) for more info. controller pnp0 # The pcvt console driver (vt220 compatible). device vt0 at isa? port "IO_KBD" tty irq 1 vector pcrint options XSERVER # support for running an X server. options FAT_CURSOR # start with block cursor # This PCVT option is for keyboards such as those used on IBM ThinkPad laptops options PCVT_SCANSET=2 # IBM keyboards are non-std # The syscons console driver (sco color console compatible). device sc0 at isa? port "IO_KBD" tty irq 1 vector scintr options MAXCONS=16 # number of virtual consoles options SLOW_VGA # do byte-wide i/o's to TS and GDC regs options "STD8X16FONT" # Compile font in makeoptions "STD8X16FONT"="cp850" options SC_HISTORY_SIZE=200 # number of history buffer lines options SC_DISABLE_REBOOT # disable reboot key sequence # # `flags' for sc0: # 0x01 Use a 'visual' bell # 0x02 Use a 'blink' cursor # 0x04 Use a 'underline' cursor # 0x06 Use a 'blinking underline' (destructive) cursor # 0x08 Force detection of keyboard, else we always assume a keyboard # 0x10 Old-style (XT) keyboard support, useful for older ThinkPads # 0x20 Don't reset keyboard, useful for some newer ThinkPads # # The Numeric Processing eXtension driver. This should be configured if # your machine has a math co-processor, unless the coprocessor is very # buggy. If it is not configured then you *must* configure math emulation # (see above). If both npx0 and emulation are configured, then only npx0 # is used (provided it works). device npx0 at isa? port "IO_NPX" iosiz 0x0 flags 0x0 irq 13 vector npxintr # # `flags' for npx0: # 0x01 don't use the npx registers to optimize bcopy # 0x02 don't use the npx registers to optimize bzero # 0x04 don't use the npx registers to optimize copyin or copyout. # The npx registers are normally used to optimize copying and zeroing when # all of the following conditions are satisfied: # "I586_CPU" is an option # the cpu is an i586 (perhaps not a Pentium) # the probe for npx0 succeeds # INT 16 exception handling works. # Then copying and zeroing using the npx registers is normally 30-100% faster. # The flags can be used to control cases where it doesn't work or is slower. # Setting them at boot time using userconfig works right (the optimizations # are not used until later in the bootstrap when npx0 is attached). # # # `iosiz' for npx0: # This can be used instead of the MAXMEM option to set the memory size. If # it is nonzero, then it overrides both the MAXMEM option and the memory # size reported by the BIOS. Setting it at boot time using userconfig takes # effect on the next reboot after the change has been recorded in the kernel # binary (the size is used early in the boot before userconfig has a chance # to change it). # # # Optional ISA and EISA devices: # # # SCSI host adapters: `aha', `aic', `bt', `nca' # # aha: Adaptec 154x # ahc: Adaptec 274x/284x/294x # aic: Adaptec 152x and sound cards using the Adaptec AIC-6360 (slow!) # bt: Most Buslogic controllers # nca: ProAudioSpectrum cards using the NCR 5380 or Trantor T130 # uha: UltraStore 14F and 34F # sea: Seagate ST01/02 8 bit controller (slow!) # wds: Western Digital WD7000 controller (no scatter/gather!). # # Note that the order is important in order for Buslogic cards to be # probed correctly. # controller bt0 at isa? port "IO_BT0" bio irq ? vector bt_isa_intr controller aha0 at isa? port "IO_AHA0" bio irq ? drq 5 vector ahaintr controller uha0 at isa? port "IO_UHA0" bio irq ? drq 5 vector uhaintr controller aic0 at isa? port 0x340 bio irq 11 vector aicintr controller nca0 at isa? port 0x1f88 bio irq 10 vector ncaintr controller nca1 at isa? port 0x1f84 controller nca2 at isa? port 0x1f8c controller nca3 at isa? port 0x1e88 controller nca4 at isa? port 0x350 bio irq 5 vector ncaintr controller sea0 at isa? bio irq 5 iomem 0xdc000 iosiz 0x2000 vector seaintr controller wds0 at isa? port 0x350 bio irq 15 drq 6 vector wdsintr # # ST-506, ESDI, and IDE hard disks: `wdc' and `wd' # # The flags fields are used to enable the multi-sector I/O and # the 32BIT I/O modes. The flags may be used in either the controller # definition or in the individual disk definitions. The controller # definition is supported for the boot configuration stuff. # # Each drive has a 16 bit flags value defined: # The low 8 bits are the maximum value for the multi-sector I/O, # where 0xff defaults to the maximum that the drive can handle. # The high bit of the 16 bit flags (0x8000) allows probing for # 32 bit transfers. Bit 14 (0x4000) enables a hack to wake # up powered-down laptop drives. Bit 13 (0x2000) allows # probing for PCI IDE DMA controllers, such as Intel's PIIX # south bridges. Bit 12 (0x1000) sets LBA mode instead of the # default CHS mode for accessing the drive. See the wd.4 man page. # # The flags field for the drives can be specified in the controller # specification with the low 16 bits for drive 0, and the high 16 bits # for drive 1. # e.g.: #controller wdc0 at isa? port "IO_WD1" bio irq 14 flags 0x00ff8004 vector wdintr # # specifies that drive 0 will be allowed to probe for 32 bit transfers and # a maximum multi-sector transfer of 4 sectors, and drive 1 will not be # allowed to probe for 32 bit transfers, but will allow multi-sector # transfers up to the maximum that the drive supports. # # If you are using a PCI controller that is not running in compatibility # mode (for example, it is a 2nd IDE PCI interface), then use config line(s) # such as: # #controller wdc2 at isa? port "0" bio irq ? flags 0xa0ffa0ff vector wdintr #disk wd4 at wdc2 drive 0 #disk wd5 at wdc2 drive 1 # #controller wdc3 at isa? port "0" bio irq ? flags 0xa0ffa0ff vector wdintr #disk wd6 at wdc3 drive 0 #disk wd7 at wdc3 drive 1 # # Note that the above config would be useful for a Promise card, when used # on a MB that already has a PIIX controller. Note the bogus irq and port # entries. These are automatically filled in by the IDE/PCI support. # controller wdc0 at isa? port "IO_WD1" bio irq 14 vector wdintr disk wd0 at wdc0 drive 0 disk wd1 at wdc0 drive 1 controller wdc1 at isa? port "IO_WD2" bio irq 15 vector wdintr disk wd2 at wdc1 drive 0 disk wd3 at wdc1 drive 1 # # Options for `wdc': # # CMD640 enables serializing access to primary and secondary channel # of the CMD640B IDE Chip. The serializing will only take place # if this option is set *and* the chip is probed by the pci-system. # options "CMD640" #Enable work around for CMD640 h/w bug # # ATAPI enables the support for ATAPI-compatible IDE devices # options ATAPI #Enable ATAPI support for IDE bus options ATAPI_STATIC #Don't do it as an LKM # IDE CD-ROM driver - requires wdc controller and ATAPI option device wcd0 # IDE floppy driver - requires wdc controller and ATAPI option device wfd0 # # Standard floppy disk controllers and floppy tapes: `fdc', `fd', and `ft' # controller fdc0 at isa? port "IO_FD1" bio irq 6 drq 2 vector fdintr # # FDC_DEBUG enables floppy debugging. Since the debug output is huge, you # gotta turn it actually on by setting the variable fd_debug with DDB, # however. options FDC_DEBUG # This option is undocumented on purpose. options FDC_PRINT_BOGUS_CHIPTYPE # # Activate this line instead of the fdc0 line above if you happen to # have an Insight floppy tape. Probing them proved to be dangerous # for people with floppy disks only, so it's "hidden" behind a flag: #controller fdc0 at isa? port "IO_FD1" bio flags 1 irq 6 drq 2 vector fdintr disk fd0 at fdc0 drive 0 disk fd1 at fdc0 drive 1 tape ft0 at fdc0 drive 2 # # Other standard PC hardware: `lpt', `mse', `psm', `sio', etc. # # lpt: printer port # lpt specials: # port can be specified as ?, this will cause the driver to scan # the BIOS port list; # the irq and vector clauses may be omitted, this # will force the port into polling mode. # mse: Logitech and ATI InPort bus mouse ports # psm: PS/2 mouse port [note: conflicts with sc0/vt0, thus "conflicts" keywd] # sio: serial ports (see sio(4)) device lpt0 at isa? port? tty irq 7 vector lptintr device lpt1 at isa? port "IO_LPT3" tty irq 5 vector lptintr device mse0 at isa? port 0x23c tty irq 5 vector mseintr device psm0 at isa? port "IO_KBD" conflicts tty irq 12 vector psmintr # Options for psm: options PSM_HOOKAPM #hook the APM resume event, useful #for some laptops options PSM_RESETAFTERSUSPEND #reset the device at the resume event device sio0 at isa? port "IO_COM1" tty flags 0x10 irq 4 vector siointr # # `flags' for serial drivers that support consoles (only for sio now): # 0x10 enable console support for this unit. The other console flags # are ignored unless this is set. Enabling console support does # not make the unit the preferred console - boot with -h or set # the 0x20 flag for that. Currently, at most one unit can have # console support; the first one (in config file order) with # this flag set is preferred. Setting this flag for sio0 gives # the old behaviour. # 0x20 force this unit to be the console (unless there is another # higher priority console). This replaces the COMCONSOLE option. # 0x40 reserve this unit for low level console operations. Do not # # PnP `flags' (set via userconfig using pnp x flags y) # 0x1 disable probing of this device. Used to prevent your modem # from being attached as a PnP modem. # # Options for serial drivers that support consoles (only for sio now): options BREAK_TO_DEBUGGER #a BREAK on a comconsole goes to #DDB, if available. options CONSPEED=9600 #default speed for serial console (default 9600) # Options for sio: options COM_ESP #code for Hayes ESP options COM_MULTIPORT #code for some cards with shared IRQs options DSI_SOFT_MODEM #code for DSI Softmodems options "EXTRA_SIO=2" #number of extra sio ports to allocate # Other flags for sio that aren't documented in the man page. # 0x20000 enable hardware RTS/CTS and larger FIFOs. Only works for # ST16650A-compatible UARTs. # # Network interfaces: `cx', `ed', `el', `ep', `ie', `is', `le', `lnc' # # ar: Arnet SYNC/570i hdlc sync 2/4 port V.35/X.21 serial driver (requires sppp) # cx: Cronyx/Sigma multiport sync/async (with Cisco or PPP framing) # ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503 # el: 3Com 3C501 (slow!) # ep: 3Com 3C509 (buggy) # fe: Fujitsu MB86960A/MB86965A Ethernet # ie: AT&T StarLAN 10 and EN100; 3Com 3C507; unknown NI5210; Intel EtherExpress # le: Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100, # DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422) # lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL) # sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp) # wl: Lucent Wavelan (ISA card only). # ze: IBM/National Semiconductor PCMCIA ethernet controller. # zp: 3Com PCMCIA Etherlink III (It does not require shared memory for # send/receive operation, but it needs 'iomem' to read/write the # attribute memory) # device ar0 at isa? port 0x300 net irq 10 iomem 0xd0000 vector arintr device cx0 at isa? port 0x240 net irq 15 drq 7 vector cxintr device ed0 at isa? port 0x280 net irq 5 iomem 0xd8000 vector edintr device eg0 at isa? port 0x310 net irq 5 vector egintr device el0 at isa? port 0x300 net irq 9 vector elintr device ep0 at isa? port 0x300 net irq 10 vector epintr device ex0 at isa? port? net irq? vector exintr device fe0 at isa? port 0x300 net irq ? vector feintr device ie0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector ieintr device ie1 at isa? port 0x360 net irq 7 iomem 0xd0000 vector ieintr device le0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector le_intr device lnc0 at isa? port 0x300 net irq 10 drq 0 vector lncintr device sr0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector srintr options WLCACHE # enables the signal-strength cache options WLDEBUG # enables verbose debugging output device wl0 at isa? port 0x300 net irq ? vector wlintr # We can (bogusly) include both the dedicated PCCARD drivers and the generic # support when COMPILING_LINT. device ze0 at isa? port 0x300 net irq 5 iomem 0xd8000 vector zeintr device zp0 at isa? port 0x300 net irq 10 iomem 0xd8000 vector zpintr # # ATM related options # # The `en' device provides support for Efficient Networks (ENI) # ENI-155 PCI midway cards, and the Adaptec 155Mbps PCI ATM cards (ANA-59x0). # # atm pseudo-device provides generic atm functions and is required for # atm devices. # NATM enables the netnatm protocol family that can be used to # bypass TCP/IP. # # the current driver supports only PVC operations (no atm-arp, no multicast). # for more details, please read the original documents at # http://www.ccrc.wustl.edu/pub/chuck/bsdatm/wucs.html # pseudo-device atm device en0 device en1 options NATM #native ATM # # Audio drivers: `snd', `sb', `pas', `gus', `pca' # # snd: Voxware sound support code # sb: SoundBlaster PCM - SoundBlaster, SB Pro, SB16, ProAudioSpectrum # sbxvi: SoundBlaster 16 # sbmidi: SoundBlaster 16 MIDI interface # pas: ProAudioSpectrum PCM and MIDI # gus: Gravis Ultrasound - Ultrasound, Ultrasound 16, Ultrasound MAX # gusxvi: Gravis Ultrasound 16-bit PCM (do not use) # mss: Microsoft Sound System # css: Crystal Sound System (CSS 423x PnP) # sscape: Ensoniq Soundscape MIDI interface # sscape_mss: Ensoniq Soundscape PCM (requires sscape) # opl: Yamaha OPL-2 and OPL-3 FM - SB, SB Pro, SB 16, ProAudioSpectrum # uart: stand-alone 6850 UART for MIDI # mpu: Roland MPU-401 stand-alone card # # Beware! The addresses specified below are also hard-coded in # i386/isa/sound/sound_config.h. If you change the values here, you # must also change the values in the include file. # # pcm: PCM audio through various sound cards. # # This is the work in progress from Luigi Rizzo. This has support for # CS423x based cards, OPTi931, SB16 PnP, GusPnP. For more information # about this driver, take a look at sys/i386/isa/snd/README. # # The flags of the device tells the device a bit more info about the # device that normally is obtained through the PnP interface. # bit 2..0 secondary DMA channel; # bit 4 set if the board uses two dma channels; # bit 15..8 board type, overrides autodetection; leave it # zero if don't know what to put in (and you don't, # since this is unsupported at the moment...). # # This driver will use the new PnP code if it's available. # # pca: PCM audio through your PC speaker # # If you have a GUS-MAX card and want to use the CS4231 codec on the # card the drqs for the gus max must be 8 bit (1, 2, or 3). # # If you would like to use the full duplex option on the gus, then define # flags to be the ``read dma channel''. # # options BROKEN_BUS_CLOCK #PAS-16 isn't working and OPTI chipset # options SYMPHONY_PAS #PAS-16 isn't working and SYMPHONY chipset # options EXCLUDE_SBPRO #PAS-16 # options SBC_IRQ=5 #PAS-16. Must match irq on sb0 line. # PAS16: The order of the pas0/sb0/opl0 is important since the # sb emulation is enabled in the pas-16 attach. # # The i386/isa/sound/sound.doc has more information. # Controls all "VOXWARE" driver sound devices. See Luigi's driver # below for an alternate which may work better for some cards. # controller snd0 device pas0 at isa? port 0x388 irq 10 drq 6 vector pasintr device sb0 at isa? port 0x220 irq 5 drq 1 vector sbintr device sbxvi0 at isa? drq 5 device sbmidi0 at isa? port 0x330 device awe0 at isa? port 0x620 device gus0 at isa? port 0x220 irq 12 drq 1 vector gusintr #device gus0 at isa? port 0x220 irq 12 drq 1 flags 0x3 vector gusintr device mss0 at isa? port 0x530 irq 10 drq 1 vector adintr device css0 at isa? port 0x534 irq 5 drq 1 flags 0x08 vector adintr device sscape0 at isa? port 0x330 irq 9 drq 0 vector sscapeintr device trix0 at isa? port 0x330 irq 6 drq 0 vector sscapeintr device sscape_mss0 at isa? port 0x534 irq 5 drq 1 vector sndintr device opl0 at isa? port 0x388 device mpu0 at isa? port 0x330 irq 6 drq 0 device uart0 at isa? port 0x330 irq 5 vector "m6850intr" # Luigi's snd code (use INSTEAD of snd0 and all VOXWARE drivers!). # You may also wish to enable the pnp controller with this, for pnp # sound cards. # #device pcm0 at isa? port ? tty irq 10 drq 1 flags 0x0 vector pcmintr # Not controlled by `snd' device pca0 at isa? port IO_TIMER1 tty # # Miscellaneous hardware: # # mcd: Mitsumi CD-ROM # scd: Sony CD-ROM # matcd: Matsushita/Panasonic CD-ROM # wt: Wangtek and Archive QIC-02/QIC-36 tape drives # ctx: Cortex-I frame grabber # apm: Laptop Advanced Power Management (experimental) # spigot: The Creative Labs Video Spigot video-acquisition board # meteor: Matrox Meteor video capture board # alog: Industrial Computer Source AIO8-P driver # bktr: Bt848 capture boards (http://www.freebsd.org/~fsmp/HomeAuto/Bt848.html) # cy: Cyclades serial driver # dgb: Digiboard PC/Xi and PC/Xe series driver (ALPHA QUALITY!) # gp: National Instruments AT-GPIB and AT-GPIB/TNT board # asc: GI1904-based hand scanners, e.g. the Trust Amiscan Grey # gsc: Genius GS-4500 hand scanner. # joy: joystick # labpc: National Instrument's Lab-PC and Lab-PC+ # rc: RISCom/8 multiport card # rp: Comtrol Rocketport(ISA) - single card # tw: TW-523 power line interface for use with X-10 home control products # si: Specialix SI/XIO 4-32 port terminal multiplexor # stl: Stallion EasyIO and EasyConnection 8/32 (cd1400 based) # stli: Stallion EasyConnection 8/64, ONboard, Brumby (intelligent) # # Notes on APM # The flags takes the following meaning for apm0: # 0x0020 Statclock is broken. # 0x0011 Limit APM protocol to 1.1 or 1.0 # 0x0010 Limit APM protocol to 1.0 # # # Notes on the spigot: # The video spigot is at 0xad6. This port address can not be changed. # The irq values may only be 10, 11, or 15 # I/O memory is an 8kb region. Possible values are: # 0a0000, 0a2000, ..., 0fffff, f00000, f02000, ..., ffffff # The start address must be on an even boundary. # Add the following option if you want to allow non-root users to be able # to access the spigot. This option is not secure because it allows users # direct access to the I/O page. # options SPIGOT_UNSECURE # # Notes on the Comtrol Rocketport driver: # # The exact values used for rp0 depend on how many boards you have # in the system. The manufacturer's sample configs are listed as: # # Comtrol Rocketport ISA single card # device rp0 at isa? port 0x280 tty # # If instead you have two ISA cards, one installed at 0x100 and the # second installed at 0x180, then you should add the following to # your kernel configuration file: # # device rp0 at isa? port 0x100 tty # device rp1 at isa? port 0x180 tty # # For 4 ISA cards, it might be something like this: # # device rp0 at isa? port 0x180 tty # device rp1 at isa? port 0x100 tty # device rp2 at isa? port 0x340 tty # device rp3 at isa? port 0x240 tty # # And for PCI cards, you only need say: # # device rp0 # device rp1 # ... # Note: Make sure that any Rocketport PCI devices are specified BEFORE the # ISA Rocketport devices. # Notes on the Digiboard driver: # # The following flag values have special meanings: # 0x01 - alternate layout of pins # 0x02 - use the windowed PC/Xe in 64K mode # Notes on the Specialix SI/XIO driver: # **This is NOT a Specialix supported Driver!** # The host card is memory, not IO mapped. # The Rev 1 host cards use a 64K chunk, on a 32K boundary. # The Rev 2 host cards use a 32K chunk, on a 32K boundary. # The cards can use an IRQ of 11, 12 or 15. # Notes on the Stallion stl and stli drivers: # See src/i386/isa/README.stl for complete instructions. # This is version 0.0.5alpha, unsupported by Stallion. # The stl driver has a secondary IO port hard coded at 0x280. You need # to change src/i386/isa/stallion.c if you reconfigure this on the boards. # The "flags" and "iosiz" settings on the stli driver depend on the board: # EasyConnection 8/64 ISA: flags 23 iosiz 0x1000 # EasyConnection 8/64 EISA: flags 24 iosiz 0x10000 # EasyConnection 8/64 MCA: flags 25 iosiz 0x1000 # ONboard ISA: flags 4 iosiz 0x10000 # ONboard EISA: flags 7 iosiz 0x10000 # ONboard MCA: flags 3 iosiz 0x10000 # Brumby: flags 2 iosiz 0x4000 # Stallion: flags 1 iosiz 0x10000 device mcd0 at isa? port 0x300 bio irq 10 vector mcdintr # for the Sony CDU31/33A CDROM device scd0 at isa? port 0x230 bio # for the SoundBlaster 16 multicd - up to 4 devices controller matcd0 at isa? port 0x230 bio device wt0 at isa? port 0x300 bio irq 5 drq 1 vector wtintr device ctx0 at isa? port 0x230 iomem 0xd0000 device spigot0 at isa? port 0xad6 irq 15 iomem 0xee000 vector spigintr device apm0 at isa? device gp0 at isa? port 0x2c0 tty device gsc0 at isa? port "IO_GSC1" tty drq 3 device joy0 at isa? port "IO_GAME" device alog0 at isa? port 0x260 tty irq 5 vector alogintr device cy0 at isa? tty irq 10 iomem 0xd4000 iosiz 0x2000 vector cyintr device dgb0 at isa? port 0x220 iomem 0xfc0000 iosiz ? tty device labpc0 at isa? port 0x260 tty irq 5 vector labpcintr device rc0 at isa? port 0x220 tty irq 12 vector rcintr device rp0 at isa? port 0x280 tty # the port and irq for tw0 are fictitious device tw0 at isa? port 0x380 tty irq 11 vector twintr device si0 at isa? iomem 0xd0000 tty irq 12 device asc0 at isa? port IO_ASC1 tty drq 3 irq 10 vector ascintr device bqu0 at isa? port 0x150 device stl0 at isa? port 0x2a0 tty irq 10 vector stlintr device stli0 at isa? port 0x2a0 tty iomem 0xcc000 flags 23 iosiz 0x1000 device loran0 at isa? port ? tty irq 5 vector loranintr # # EISA devices: # # The EISA bus device is eisa0. It provides auto-detection and # configuration support for all devices on the EISA bus. # # The `ahb' device provides support for the Adaptec 174X adapter. # # The `ahc' device provides support for the Adaptec 274X and 284X # adapters. The 284X, although a VLB card responds to EISA probes. # # fea: DEC DEFEA EISA FDDI adapter # controller eisa0 controller ahb0 controller ahc0 device fea0 # enable tagged command queuing, which is a major performance win on # devices that support it (and controllers with enough SCB's) options AHC_TAGENABLE # enable SCB paging - See the ahc.4 man page options AHC_SCBPAGING_ENABLE # The aic7xxx driver will attempt to use memory mapped I/O for all PCI # controllers that have it configured only if this option is set. Unfortunately, # this doesn't work on some motherboards, which prevents it from being the # default. options AHC_ALLOW_MEMIO # By default, only 10 EISA slots are probed, since the slot numbers # above clash with the configuration address space of the PCI subsystem, # and the EISA probe is not very smart about this. This is sufficient # for most machines, but in particular the HP NetServer LC series comes # with an onboard AIC7770 dual-channel SCSI controller on EISA slot #11, # thus you need to bump this figure to 12 for them. options "EISA_SLOTS=12" # # PCI devices: # # The main PCI bus device is `pci'. It provides auto-detection and # configuration support for all devices on the PCI bus, using either # configuration mode defined in the PCI specification. # # The `ahc' device provides support for the Adaptec 29/3940(U)(W) # and motherboard based AIC7870/AIC7880 adapters. # # The `ncr' device provides support for the NCR 53C810 and 53C825 # self-contained SCSI host adapters. # # The `amd' device provides support for the Tekram DC-390 and 390T # SCSI host adapters, but is expected to work with any AMD 53c974 # PCI SCSI chip and the AMD Ethernet+SCSI Combo chip, after some # local patches were applied to the sources (that had originally # been written by Tekram and limited to work with their SCSI cards). # # The `de' device provides support for the Digital Equipment DC21040 # self-contained Ethernet adapter. # # The `fxp' device provides support for the Intel EtherExpress Pro/100B # PCI Fast Ethernet adapters. # # The `tx' device provides support for the SMC 9432TX cards. # # The `vx' device provides support for the 3Com 3C590 and 3C595 # early support # # The `fpa' device provides support for the Digital DEFPA PCI FDDI # adapter. pseudo-device fddi is also needed. # # The `meteor' device is a PCI video capture board. It can also have the # following options: # options METEOR_ALLOC_PAGES=xxx preallocate kernel pages for data entry # figure (ROWS*COLUMN*BYTES_PER_PIXEL*FRAME+PAGE_SIZE-1)/PAGE_SIZE # options METEOR_DEALLOC_PAGES remove all allocated pages on close(2) # options METEOR_DEALLOC_ABOVE=xxx remove all allocated pages above the # specified amount. If this value is below the allocated amount no action # taken # option METEOR_SYSTEM_DEFAULT={METEOR_PAL|METEOR_NTSC|METEOR_SECAM}, used # for initialization of fps routine when a signal is not present. # # The 'bktr' device is a PCI video capture board. It also has a TV tuner -# on board. +# on board. To override the tuner detection use +# options OVERRIDE_TUNER=x +# The current values are found in /usr/src/sys/pci/brooktree848.c +# # controller pci0 controller ahc1 controller ncr0 controller amd0 device de0 device fxp0 device tx0 device vx0 device fpa0 device meteor0 device bktr0 # # PCCARD/PCMCIA # # card: slot controller # pcic: slots controller card0 device pcic0 at card? device pcic1 at card? # # Laptop/Notebook options: # # See also: # apm under `Miscellaneous hardware' # above. # For older notebooks that signal a powerfail condition (external # power supply dropped, or battery state low) by issuing an NMI: options POWERFAIL_NMI # make it beep instead of panicing # # Parallel-Port Bus # # Parallel port bus support is provided by the `ppbus' device. # Multiple devices may be attached to the parallel port, devices # are automatically probed and attached when found. # # Supported devices: # vpo Iomega Zip Drive # Requires SCSI disk support ('scbus' and 'sd'), best # performance is achieved with ports in EPP 1.9 mode. # nlpt Parallel Printer # ppi General-purpose I/O ("Geek Port") # # Supported interfaces: # ppc ISA-bus parallel port interfaces. # controller ppbus0 controller vpo0 at ppbus? device nlpt0 at ppbus? device ppi0 at ppbus? device pps0 at ppbus? controller ppc0 at isa? disable port ? irq 7 vector ppcintr # Kernel BOOTP support options BOOTP # Use BOOTP to obtain IP address/hostname options BOOTP_NFSROOT # NFS mount root filesystem using BOOTP info options "BOOTP_NFSV3" # Use NFS v3 to NFS mount root options BOOTP_COMPAT # Workaround for broken bootp daemons. options "BOOTP_WIRED_TO=fxp0" # Use interface fxp0 for BOOTP # # An obsolete option to test kern_opt.c. # options GATEWAY # If you want to disable loadable kernel modules (LKM), you # might want to use this option. #options NO_LKM # # Add tie-ins for a hardware watchdog. This only enable the hooks; # the user must still supply the actual driver. # options HW_WDOG # # Set the number of PV entries per process. Increasing this can # stop panics related to heavy use of shared memory. However, that can # (combined with large amounts of physical memory) cause panics at # boot time due the kernel running out of VM space. # # If you're tweaking this, you might also want to increase the sysctls # "vm.v_free_min", "vm.v_free_reserved", and "vm.v_free_target". # # The value below is the one more than the default. # options "PMAP_SHPGPERPROC=201" # More undocumented options for linting. options CLK_CALIBRATION_LOOP options "CLK_USE_I8254_CALIBRATION" options CLK_USE_TSC_CALIBRATION options CLUSTERDEBUG options COMPAT_LINUX options CPU_UPGRADE_HW_CACHE options DEBUG options "DEBUG_1284" options DEVFS_ROOT #options DISABLE_PSE options "EXT2FS" options "I586_PMC_GUPROF=0x70000" options "IBCS2" # broken: #options IPFILTER options KEY options KEY_DEBUG options LOCKF_DEBUG options LOUTB options KBD_MAXRETRY=4 options KBD_MAXWAIT=6 options KBD_RESETDELAY=201 options KBDIO_DEBUG=2 options MSGMNB=2049 options MSGMNI=41 options MSGSEG=2049 options MSGSSZ=16 options MSGTQL=41 options NBUF=512 options NETATALKDEBUG options NMBCLUSTERS=1024 options NPX_DEBUG options NULLFS_DIAGNOSTIC options PANIC_REBOOT_WAIT_TIME=16 options "PCVT_24LINESDEF" options PCVT_CTRL_ALT_DEL options PCVT_EMU_MOUSE options PCVT_FREEBSD=211 options PCVT_META_ESC options PCVT_NSCREENS=9 options PCVT_PRETTYSCRNS options PCVT_SCANSET=2 options PCVT_SCREENSAVER options PCVT_USEKBDSEC options "PCVT_VT220KEYB" options PSM_DEBUG=1 options "SCSI_2_DEF" options SCSI_DELAY=8 # Be pessimistic about Joe SCSI device options SCSI_NCR_DEBUG options SCSI_NCR_DFLT_TAGS=4 options SCSI_NCR_MAX_SYNC=10000 options SCSI_NCR_MAX_WIDE=1 options SCSI_NCR_MYADDR=7 options SEMMAP=31 options SEMMNI=11 options SEMMNS=61 options SEMMNU=31 options SEMMSL=61 options SEMOPM=101 options SEMUME=11 options SHOW_BUSYBUFS # List buffers that prevent root unmount options SHMALL=1025 options "SHMMAX=(SHMMAXPGS*PAGE_SIZE+1)" options SHMMAXPGS=1025 options SHMMIN=2 options SHMMNI=33 options SHMSEG=9 options SI_DEBUG options SIMPLELOCK_DEBUG options SPX_HACK # The 'dpt' driver provides support for DPT controllers (http://www.dpt.com/). # These have hardware RAID-{0,1,5} support, and do multi-initiator I/O. # See sys/dev/dpt for debugging and other subtle options. # DPT_VERIFY_HINTR Performs some strict hardware interrupts testing. # Only use if you suspect PCI bus corruption problems # DPT_RESTRICTED_FREELIST Normally, the freelisat used by the DPT for queue # will grow to accomodate increased use. This growth # will NOT shrink. To restrict the number of queue # slots to exactly what the DPT can hold at one time, # enable this option. # DPT_MEASURE_PERFORMANCE Enables a set of (semi)invasive metrics. Various # instruments are enabled. Assumed to be enabled by # /usr/sbin/dpt_* tools. # DPT_FREELIST_IS_STACK For optimat L{1,2} CPU cache utilization, enable # this option. Otherwise, the transaction queue is # a LIFO. I cannot measure the performance gain. # DPT_HANDLE_TIMEOUTS Normally device timeouts are handled by the DPT. # If you ant the driver to handle timeouts, enable # this option. If your system is very busy, this # option will create more trouble than solve. # DPT_TIMEOUT_FACTOR Used to compute the excessive amount of time to # wait when timing out with the above option. # DPT_DEBUG_xxxx These are controllable from sys/dev/dpt/dpt.h # DPT_LOST_IRQ When enabled, will try, once per second, to catch # any interrupt that got lost. Seems to help in some # DPT-firmware/Motherboard combinations. Minimal # cost, great benefit. controller dpt0 # DPT options options DPT_VERIFY_HINTR options DPT_RESTRICTED_FREELIST options DPT_MEASURE_PERFORMANCE options DPT_FREELIST_IS_STACK options DPT_HANDLE_TIMEOUTS options DPT_TIMEOUT_FACTOR=4 options DPT_INTR_DELAY=200 # Some motherboards need that options DPT_LOST_IRQ diff --git a/sys/i386/conf/NOTES b/sys/i386/conf/NOTES index f4a6c4330fd1..21bf3c4046c0 100644 --- a/sys/i386/conf/NOTES +++ b/sys/i386/conf/NOTES @@ -1,1541 +1,1544 @@ # # LINT -- config file for checking all the sources, tries to pull in # as much of the source tree as it can. # -# $Id: LINT,v 1.423 1998/03/29 07:58:03 helbig Exp $ +# $Id: LINT,v 1.424 1998/04/09 22:28:57 sos Exp $ # # NB: You probably don't want to try running a kernel built from this # file. Instead, you should start from GENERIC, and add options from # this file as required. # # # This directive is mandatory; it defines the architecture to be # configured for; in this case, the 386 family based IBM-PC and # compatibles. # machine "i386" # # This is the ``identification'' of the kernel. Usually this should # be the same as the name of your kernel. # ident LINT # # The `maxusers' parameter controls the static sizing of a number of # internal system tables by a complicated formula defined in param.c. # maxusers 10 # # Certain applications can grow to be larger than the 128M limit # that FreeBSD initially imposes. Below are some options to # allow that limit to grow to 256MB, and can be increased further # with changing the parameters. MAXDSIZ is the maximum that the # limit can be set to, and the DFLDSIZ is the default value for # the limit. You might want to set the default lower than the # max, and explicitly set the maximum with a shell command for processes # that regularly exceed the limit like INND. # options "MAXDSIZ=(256*1024*1024)" options "DFLDSIZ=(256*1024*1024)" # When this is set, be extra conservative in various parts of the kernel # and choose functionality over speed (on the widest variety of systems). options FAILSAFE # This allows you to actually store this configuration file into # the kernel binary itself, where it may be later read by saying: # strings /kernel | grep ^___ | sed -e 's/^___//' > MYKERNEL # options INCLUDE_CONFIG_FILE # Include this file in kernel # # This directive defines a number of things: # - The compiled kernel is to be called `kernel' # - The root filesystem might be on partition wd0a # - Crash dumps will be written to wd0b, if possible. Specifying the # dump device here is not recommended. Use dumpon(8). # config kernel root on wd0 dumps on wd0 ##################################################################### # SMP OPTIONS: # # SMP enables building of a Symmetric MultiProcessor Kernel. # APIC_IO enables the use of the IO APIC for Symmetric I/O. # NCPU sets the number of CPUs, defaults to 2. # NBUS sets the number of busses, defaults to 4. # NAPIC sets the number of IO APICs on the motherboard, defaults to 1. # NINTR sets the total number of INTs provided by the motherboard. # # Notes: # # An SMP kernel will ONLY run on an Intel MP spec. qualified motherboard. # # Be sure to disable 'cpu "I386_CPU"' && 'cpu "I486_CPU"' for SMP kernels. # # Check the 'Rogue SMP hardware' section to see if additional options # are required by your hardware. # # Mandatory: options SMP # Symmetric MultiProcessor Kernel options APIC_IO # Symmetric (APIC) I/O # Optional, these are the defaults plus 1: options NCPU=5 # number of CPUs options NBUS=5 # number of busses options NAPIC=2 # number of IO APICs options NINTR=25 # number of INTs # # Rogue SMP hardware: # # Bridged PCI cards: # # The MP tables of most of the current generation MP motherboards # do NOT properly support bridged PCI cards. To use one of these # cards you should refer to ??? ##################################################################### # CPU OPTIONS # # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make # parts of the system run faster. This is especially true removing # I386_CPU. # cpu "I386_CPU" cpu "I486_CPU" cpu "I586_CPU" # aka Pentium(tm) cpu "I686_CPU" # aka Pentium Pro(tm) # # Options for CPU features. # # CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM # BlueLightning CPU. It works only with Cyrix FPU, and this option # should not be used with Intel FPU. # # CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning # CPU if CPU supports it. The default is double-clock mode on # BlueLightning CPU box. # # CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1). # # CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct # mapped mode. Default is 2-way set associative mode. # # CPU_CYRIX_NO_LOCK enables weak locking for the entire address space # of Cyrix 6x86 and 6x86MX CPUs. If this option is not set and # FAILESAFE is defined, NO_LOCK bit of CCR1 is cleared. (NOTE 3) # # CPU_DISABLE_5X86_LSSER disables load store serialize (i.e. enables # reorder). This option should not be used if you use memory mapped # I/O device(s). # # CPU_FASTER_5X86_FPU enables faster FPU exception handler. # # CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products # for i386 machines. # # CPU_IORT defines I/O clock delay time (NOTE 1). Default vaules of # I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively # (no clock delay). # # CPU_LOOP_EN prevents flushing the prefetch buffer if the destination # of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE # 1). # # CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1). # # CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU # enters suspend mode following execution of HALT instruction. # # CPU_WT_ALLOC enables write-through allocation. # # CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache # flush at hold state. # # CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs # without cache flush at hold state, and (2) write-back CPU cache on # Cyrix 6x86 whose revision < 2.7 (NOTE 2). # # NO_F00F_HACK disables the hack that prevents Pentiums (and ONLY # Pentiums) from locking up when a LOCK CMPXCHG8B instruction is # executed. This should be included for ALL kernels that won't run # on a Pentium. # # NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT, # CPU_LOOP_ENand CPU_RSTK_EN should no be used becasue of CPU bugs. # These options may crash your system. # # NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled # in write-through mode when revision < 2.7. If revision of Cyrix # 6x86 >= 2.7, CPU cache is always enabled in write-back mode. # # NOTE 3: This option may cause failures for software that requires # locked cycles in order to operate correctly. # options "CPU_BLUELIGHTNING_FPU_OP_CACHE" options "CPU_BLUELIGHTNING_3X" options "CPU_BTB_EN" options "CPU_DIRECT_MAPPED_CACHE" options "CPU_DISABLE_5X86_LSSER" options "CPU_FASTER_5X86_FPU" options "CPU_I486_ON_386" options "CPU_IORT" options "CPU_LOOP_EN" options "CPU_RSTK_EN" options "CPU_SUSP_HLT" options "CYRIX_CACHE_WORKS" options "CYRIX_CACHE_REALLY_WORKS" #options "NO_F00F_HACK" # # A math emulator is mandatory if you wish to run on hardware which # does not have a floating-point processor. Pick either the original, # bogus (but freely-distributable) math emulator, or a much more # fully-featured but GPL-licensed emulator taken from Linux. # options MATH_EMULATE #Support for x87 emulation # Don't enable both of these in a real config. options GPL_MATH_EMULATE #Support for x87 emulation via #new math emulator ##################################################################### # COMPATIBILITY OPTIONS # # Implement system calls compatible with 4.3BSD and older versions of # FreeBSD. You probably do NOT want to remove this as much current code # still relies on the 4.3 emulation. # options "COMPAT_43" # # Allow user-mode programs to manipulate their local descriptor tables. # This option is required for the WINE Windows(tm) emulator, and is # not used by anything else (that we know of). # options USER_LDT #allow user-level control of i386 ldt # # These three options provide support for System V Interface # Definition-style interprocess communication, in the form of shared # memory, semaphores, and message queues, respectively. # options SYSVSHM options SYSVSEM options SYSVMSG # # This option includes a MD5 routine in the kernel, this is used for # various authentication and privacy uses. # options "MD5" # # Allow processes to switch to vm86 mode, as well as enabling direct # user-mode access to the I/O port space. This option is necessary for # the doscmd emulator to run. # options "VM86" ##################################################################### # DEBUGGING OPTIONS # # Enable the kernel debugger. # options DDB # # Don't drop into DDB for a panic. Intended for unattended operation # where you may want to drop to DDB from the console, but still want # the machine to recover from a panic # options DDB_UNATTENDED # # If using GDB remote mode to debug the kernel, there's a non-standard # extension to the remote protocol that can be used to use the serial # port as both the debugging port and the system console. It's non- # standard and you're on your own if you enable it. See also the # "remotechat" variables in the FreeBSD specific version of gdb. # options GDB_REMOTE_CHAT # # KTRACE enables the system-call tracing facility ktrace(2). # options KTRACE #kernel tracing # # The DIAGNOSTIC option is used in a number of source files to enable # extra sanity checking of internal structures. This support is not # enabled by default because of the extra time it would take to check # for these conditions, which can only occur as a result of # programming errors. # options DIAGNOSTIC # # PERFMON causes the driver for Pentium/Pentium Pro performance counters # to be compiled. See perfmon(4) for more information. # options PERFMON # # This option let some drivers co-exist that can't co-exist in a running # system. This is used to be able to compile all kernel code in one go for # quality assurance purposes (like this file, which the option takes it name # from.) # options COMPILING_LINT # XXX - this doesn't belong here. # Allow ordinary users to take the console - this is useful for X. options UCONSOLE # XXX - this doesn't belong here either options USERCONFIG #boot -c editor options USERCONFIG_BOOT #imply -c and parse info area options VISUAL_USERCONFIG #visual boot -c editor ##################################################################### # NETWORKING OPTIONS # # Protocol families: # Only the INET (Internet) family is officially supported in FreeBSD. # Source code for the NS (Xerox Network Service) is provided for amusement # value. # options INET #Internet communications protocols options IPX #IPX/SPX communications protocols options IPXIP #IPX in IP encapsulation (not available) options IPTUNNEL #IP in IPX encapsulation (not available) options NETATALK #Appletalk communications protocols # These are currently broken but are shipped due to interest. #options NS #Xerox NS protocols # These are currently broken and are no longer shipped due to lack # of interest. #options CCITT #X.25 network layer #options ISO #options TPIP #ISO TP class 4 over IP #options TPCONS #ISO TP class 0 over X.25 #options LLC #X.25 link layer for Ethernets #options HDLC #X.25 link layer for serial lines #options EON #ISO CLNP over IP #options NSIP #XNS over IP # # Network interfaces: # The `loop' pseudo-device is MANDATORY when networking is enabled. # The `ether' pseudo-device provides generic code to handle # Ethernets; it is MANDATORY when a Ethernet device driver is # configured. # The 'fddi' pseudo-device provides generic code to support FDDI. # The `sppp' pseudo-device serves a similar role for certain types # of synchronous PPP links (like `cx', `ar'). # The `sl' pseudo-device implements the Serial Line IP (SLIP) service. # The `ppp' pseudo-device implements the Point-to-Point Protocol. # The `bpfilter' pseudo-device enables the Berkeley Packet Filter. Be # aware of the legal and administrative consequences of enabling this # option. The number of devices determines the maximum number of # simultaneous BPF clients programs runnable. # The `disc' pseudo-device implements a minimal network interface, # which throws away all packets sent and never receives any. It is # included for testing purposes. # The `tun' pseudo-device implements the User Process PPP (iijppp) # # The PPP_BSDCOMP option enables support for compress(1) style entire # packet compression, the PPP_DEFLATE is for zlib/gzip style compression. # PPP_FILTER enables code for filtering the ppp data stream and selecting # events for resetting the demand dial activity timer - requires bpfilter. # See pppd(8) for more details. # pseudo-device ether #Generic Ethernet pseudo-device fddi #Generic FDDI pseudo-device sppp #Generic Synchronous PPP pseudo-device loop #Network loopback device pseudo-device bpfilter 4 #Berkeley packet filter pseudo-device disc #Discard device pseudo-device tun 1 #Tunnel driver (user process ppp(8)) pseudo-device sl 2 #Serial Line IP pseudo-device ppp 2 #Point-to-point protocol options PPP_BSDCOMP #PPP BSD-compress support options PPP_DEFLATE #PPP zlib/deflate/gzip support options PPP_FILTER #enable bpf filtering (needs bpfilter) # # Internet family options: # # TCP_COMPAT_42 causes the TCP code to emulate certain bugs present in # 4.2BSD. This option should not be used unless you have a 4.2BSD # machine and TCP connections fail. # # MROUTING enables the kernel multicast packet forwarder, which works # with mrouted(8). # # IPFIREWALL enables support for IP firewall construction, in # conjunction with the `ipfw' program. IPFIREWALL_VERBOSE sends # logged packets to the system logger. IPFIREWALL_VERBOSE_LIMIT # limits the number of times a matching entry can be logged. # # WARNING: IPFIREWALL defaults to a policy of "deny ip from any to any" # and if you do not add other rules during startup to allow access, # YOU WILL LOCK YOURSELF OUT. It is suggested that you set firewall=open # in /etc/rc.conf when first enabling this feature, then refining the # firewall rules in /etc/rc.firewall after you've tested that the new kernel # feature works properly. # # IPFIREWALL_DEFAULT_TO_ACCEPT causes the default rule (at boot) to # allow everything. Use with care, if a cracker can crash your # firewall machine, they can get to your protected machines. However, # if you are using it as an as-needed filter for specific problems as # they arise, then this may be for you. Changing the default to 'allow' # means that you won't get stuck if the kernel and /sbin/ipfw binary get # out of sync. # # IPDIVERT enables the divert IP sockets, used by ``ipfw divert'' # # IPFILTER enables Darren Reed's ipfilter package. # IPFILTER_LOG enables ipfilter's logging. # IPFILTER_LKM enables LKM support for an ipfilter module (untested). # # TCPDEBUG is undocumented. # options "TCP_COMPAT_42" #emulate 4.2BSD TCP bugs options MROUTING # Multicast routing options IPFIREWALL #firewall options IPFIREWALL_VERBOSE #print information about # dropped packets options "IPFIREWALL_VERBOSE_LIMIT=100" #limit verbosity options IPFIREWALL_DEFAULT_TO_ACCEPT #allow everything by default options IPDIVERT #divert sockets options IPFILTER #kernel ipfilter support options IPFILTER_LOG #ipfilter logging #options IPFILTER_LKM #kernel support for ip_fil.o LKM options TCPDEBUG ##################################################################### # FILESYSTEM OPTIONS # # Only the root, /usr, and /tmp filesystems need be statically # compiled; everything else will be automatically loaded at mount # time. (Exception: the UFS family---FFS, and MFS --- cannot # currently be demand-loaded.) Some people still prefer to statically # compile other filesystems as well. # # NB: The NULL, PORTAL, UMAP and UNION filesystems are known to be # buggy, and WILL panic your system if you attempt to do anything with # them. They are included here as an incentive for some enterprising # soul to sit down and fix them. # # One of these is mandatory: options FFS #Fast filesystem options NFS #Network File System # The rest are optional: # options NFS_NOSERVER #Disable the NFS-server code. options "CD9660" #ISO 9660 filesystem options FDESC #File descriptor filesystem options KERNFS #Kernel filesystem options MFS #Memory File System options MSDOSFS #MS DOS File System options NULLFS #NULL filesystem options PORTAL #Portal filesystem options PROCFS #Process filesystem options UMAPFS #UID map filesystem options UNION #Union filesystem options "CD9660_ROOT" #CD-ROM usable as root device options FFS_ROOT #FFS usable as root device options NFS_ROOT #NFS usable as root device # This DEVFS is experimental but seems to work options DEVFS #devices filesystem # Allow the FFS to use Softupdates technology. # To do this you need to fetch the two files # /sys/ufs/ffs/softdep.h and /sys/ufs/ffs/ffs_softdep.c # from freebsd.org and understand the licensing restrictions. #options SOFTUPDATES # (we can't actually enable it because the files may not be present) # Make space in the kernel for a MFS root filesystem. Define to the number # of kilobytes to reserve for the filesystem. options MFS_ROOT=10 # Allow the MFS_ROOT code to load the MFS image from floppy if it is missing. options MFS_AUTOLOAD # Allow this many swap-devices. options NSWAPDEV=20 # Disk quotas are supported when this option is enabled. If you # change the value of this option, you must do a `make clean' in your # kernel compile directory in order to get a working kernel. # options QUOTA #enable disk quotas # Add more checking code to various filesystems #options NULLFS_DIAGNOSTIC #options KERNFS_DIAGNOSTIC #options UMAPFS_DIAGNOSTIC #options UNION_DIAGNOSTIC # In particular multi-session CD-Rs might require a huge amount of # time in order to "settle". If we are about mounting them as the # root f/s, we gotta wait a little. # # The number is supposed to be in seconds. options "CD9660_ROOTDELAY=20" # If you are running a machine just as a fileserver for PC and MAC users. # (using SAMBA or Netatalk), then you may consider setting this option # and keeping all those user's directories on a partition that is mounted # with the suiddir option. This gives new files the same ownership as # the directory (similiar to group). It's a security hole if you let # these users run programs so confine it to file-servers, (but it'll save you # lots of headaches in that case). Root owned directories are excempt and X bits # are cleared. the suid bit must be set on the directory as well. see chmod(1) # PC owners can't see/set ownerships so they keep getting their toes # trodden on. This saves you all the support calls as the filesystem # it's used on will act as they expect. ("It's my dir so it must be my file"). # options SUIDDIR # Add some error checking code to the null_bypass routine # in the NULL filesystem #options SAFETY ##################################################################### # SCSI DEVICES # SCSI DEVICE CONFIGURATION # The SCSI subsystem consists of the `base' SCSI code, a number of # high-level SCSI device `type' drivers, and the low-level host-adapter # device drivers. The host adapters are listed in the ISA and PCI # device configuration sections below. # # Beginning with FreeBSD 2.0.5 you can wire down your SCSI devices so # that a given bus, target, and LUN always come on line as the same # device unit. In earlier versions the unit numbers were assigned # in the order that the devices were probed on the SCSI bus. This # means that if you removed a disk drive, you may have had to rewrite # your /etc/fstab file, and also that you had to be careful when adding # a new disk as it may have been probed earlier and moved your device # configuration around. # This old behavior is maintained as the default behavior. The unit # assignment begins with the first non-wired down unit for a device # type. For example, if you wire a disk as "sd3" then the first # non-wired disk will be assigned sd4. # The syntax for wiring down devices is: # controller scbus0 at ahc0 # Single bus device # controller scbus1 at ahc1 bus 0 # Single bus device # controller scbus3 at ahc2 bus 0 # Twin bus device # controller scbus2 at ahc2 bus 1 # Twin bus device # disk sd0 at scbus0 target 0 unit 0 # disk sd1 at scbus3 target 1 # disk sd2 at scbus2 target 3 # tape st1 at scbus1 target 6 # device cd0 at scbus? # "units" (SCSI logical unit number) that are not specified are # treated as if specified as LUN 0. # All SCSI devices allocate as many units as are required. # The "unknown" device (uk? in pre-2.0.5) is now part of the base SCSI # configuration and doesn't have to be explicitly configured. controller scbus0 #base SCSI code device ch0 #SCSI media changers device sd0 #SCSI disks device st0 #SCSI tapes device cd0 #SCSI CD-ROMs device od0 #SCSI optical disk # The previous devices (ch, sd, st, cd) are recognized by config. # config doesn't (and shouldn't) know about these newer ones, # so we have to specify that they are on a SCSI bus with the "at scbus?" # clause. device worm0 at scbus? # SCSI worm device pt0 at scbus? # SCSI processor type device sctarg0 at scbus? # SCSI target # SCSI OPTIONS: # SCSIDEBUG: When defined enables debugging macros # NO_SCSI_SENSE: When defined disables sense descriptions (about 4k) # SCSI_REPORT_GEOMETRY: Always report disk geometry at boot up instead # of only when booting verbosely. options SCSIDEBUG #options NO_SCSI_SENSE options SCSI_REPORT_GEOMETRY # Options for the `od' optical disk driver: # # If drive returns sense key as 0x02 with vendor specific additional # sense code (ASC) and additional sense code qualifier (ASCQ), or # illegal ASC and ASCQ. This cause an error (NOT READY) and retrying. # To suppress this, use the following option. # options OD_BOGUS_NOT_READY # # For an automatic spindown, try this. Again, preferably as an # option in your config file. # WARNING! Use at your own risk. Joerg's ancient SONY SMO drive # groks it fine, while Shunsuke's Fujitsu chokes on it and times # out. # options OD_AUTO_TURNOFF ##################################################################### # POSIX P1003.1B # Real time extensions added int the 1993 Posix # P1003_1B: Infrastructure # _KPOSIX_PRIORITY_SCHEDULING: Build in _POSIX_PRIORITY_SCHEDULING # _KPOSIX_VERSION: Version kernel is built for options "P1003_1B" options "_KPOSIX_PRIORITY_SCHEDULING" options "_KPOSIX_VERSION=199309L" ##################################################################### # MISCELLANEOUS DEVICES AND OPTIONS # The `pty' device usually turns out to be ``effectively mandatory'', # as it is required for `telnetd', `rlogind', `screen', `emacs', and # `xterm', among others. pseudo-device pty 16 #Pseudo ttys - can go as high as 256 pseudo-device speaker #Play IBM BASIC-style noises out your speaker pseudo-device gzip #Exec gzipped a.out's pseudo-device vn #Vnode driver (turns a file into a device) pseudo-device snp 3 #Snoop device - to look at pty/vty/etc.. pseudo-device ccd 4 #Concatenated disk driver # These are only for watching for bitrot in old tty code. # broken #pseudo-device tb # These are only for watching for bitrot in old SCSI code. pseudo-device su #scsi user pseudo-device ssc #super scsi ##################################################################### # HARDWARE DEVICE CONFIGURATION # ISA and EISA devices: # EISA support is available for some device, so they can be auto-probed. # Micro Channel is not supported at all. # # Mandatory ISA devices: isa, npx # controller isa0 # # Options for `isa': # # AUTO_EOI_1 enables the `automatic EOI' feature for the master 8259A # interrupt controller. This saves about 0.7-1.25 usec for each interrupt. # This option breaks suspend/resume on some portables. # # AUTO_EOI_2 enables the `automatic EOI' feature for the slave 8259A # interrupt controller. This saves about 0.7-1.25 usec for each interrupt. # Automatic EOI is documented not to work for for the slave with the # original i8259A, but it works for some clones and some integrated # versions. # # BOUNCE_BUFFERS provides support for ISA DMA on machines with more # than 16 megabytes of memory. It doesn't hurt on other machines. # Some broken EISA and VLB hardware may need this, too. # # MAXMEM specifies the amount of RAM on the machine; if this is not # specified, FreeBSD will first read the amount of memory from the CMOS # RAM, so the amount of memory will initially be limited to 64MB or 16MB # depending on the BIOS. If the BIOS reports 64MB, a memory probe will # then attempt to detect the installed amount of RAM. If this probe # fails to detect >64MB RAM you will have to use the MAXMEM option. # The amount is in kilobytes, so for a machine with 128MB of RAM, it would # be 131072 (128 * 1024). # # TUNE_1542 enables the automatic ISA bus speed selection for the # Adaptec 1542 boards. Does not work for all boards, use it with caution. # # BROKEN_KEYBOARD_RESET disables the use of the keyboard controller to # reset the CPU for reboot. This is needed on some systems with broken # keyboard controllers. # # PAS_JOYSTICK_ENABLE enables the gameport on the ProAudio Spectrum options "AUTO_EOI_1" #options "AUTO_EOI_2" options BOUNCE_BUFFERS options "MAXMEM=(128*1024)" options "TUNE_1542" #options BROKEN_KEYBOARD_RESET #options PAS_JOYSTICK_ENABLE # Enable support for the kernel PLL to use an external PPS signal, # under supervision of [x]ntpd(8) # More info in ftp://ftp.udel.edu/pub/ntp/kernel.tar.Z options PPS_SYNC # Enable PnP support in the kernel. This allows you to automaticly # attach to PnP cards for drivers that support it and allows you to # configure cards from USERCONFIG. See pnp(4) for more info. controller pnp0 # The pcvt console driver (vt220 compatible). device vt0 at isa? port "IO_KBD" tty irq 1 vector pcrint options XSERVER # support for running an X server. options FAT_CURSOR # start with block cursor # This PCVT option is for keyboards such as those used on IBM ThinkPad laptops options PCVT_SCANSET=2 # IBM keyboards are non-std # The syscons console driver (sco color console compatible). device sc0 at isa? port "IO_KBD" tty irq 1 vector scintr options MAXCONS=16 # number of virtual consoles options SLOW_VGA # do byte-wide i/o's to TS and GDC regs options "STD8X16FONT" # Compile font in makeoptions "STD8X16FONT"="cp850" options SC_HISTORY_SIZE=200 # number of history buffer lines options SC_DISABLE_REBOOT # disable reboot key sequence # # `flags' for sc0: # 0x01 Use a 'visual' bell # 0x02 Use a 'blink' cursor # 0x04 Use a 'underline' cursor # 0x06 Use a 'blinking underline' (destructive) cursor # 0x08 Force detection of keyboard, else we always assume a keyboard # 0x10 Old-style (XT) keyboard support, useful for older ThinkPads # 0x20 Don't reset keyboard, useful for some newer ThinkPads # # The Numeric Processing eXtension driver. This should be configured if # your machine has a math co-processor, unless the coprocessor is very # buggy. If it is not configured then you *must* configure math emulation # (see above). If both npx0 and emulation are configured, then only npx0 # is used (provided it works). device npx0 at isa? port "IO_NPX" iosiz 0x0 flags 0x0 irq 13 vector npxintr # # `flags' for npx0: # 0x01 don't use the npx registers to optimize bcopy # 0x02 don't use the npx registers to optimize bzero # 0x04 don't use the npx registers to optimize copyin or copyout. # The npx registers are normally used to optimize copying and zeroing when # all of the following conditions are satisfied: # "I586_CPU" is an option # the cpu is an i586 (perhaps not a Pentium) # the probe for npx0 succeeds # INT 16 exception handling works. # Then copying and zeroing using the npx registers is normally 30-100% faster. # The flags can be used to control cases where it doesn't work or is slower. # Setting them at boot time using userconfig works right (the optimizations # are not used until later in the bootstrap when npx0 is attached). # # # `iosiz' for npx0: # This can be used instead of the MAXMEM option to set the memory size. If # it is nonzero, then it overrides both the MAXMEM option and the memory # size reported by the BIOS. Setting it at boot time using userconfig takes # effect on the next reboot after the change has been recorded in the kernel # binary (the size is used early in the boot before userconfig has a chance # to change it). # # # Optional ISA and EISA devices: # # # SCSI host adapters: `aha', `aic', `bt', `nca' # # aha: Adaptec 154x # ahc: Adaptec 274x/284x/294x # aic: Adaptec 152x and sound cards using the Adaptec AIC-6360 (slow!) # bt: Most Buslogic controllers # nca: ProAudioSpectrum cards using the NCR 5380 or Trantor T130 # uha: UltraStore 14F and 34F # sea: Seagate ST01/02 8 bit controller (slow!) # wds: Western Digital WD7000 controller (no scatter/gather!). # # Note that the order is important in order for Buslogic cards to be # probed correctly. # controller bt0 at isa? port "IO_BT0" bio irq ? vector bt_isa_intr controller aha0 at isa? port "IO_AHA0" bio irq ? drq 5 vector ahaintr controller uha0 at isa? port "IO_UHA0" bio irq ? drq 5 vector uhaintr controller aic0 at isa? port 0x340 bio irq 11 vector aicintr controller nca0 at isa? port 0x1f88 bio irq 10 vector ncaintr controller nca1 at isa? port 0x1f84 controller nca2 at isa? port 0x1f8c controller nca3 at isa? port 0x1e88 controller nca4 at isa? port 0x350 bio irq 5 vector ncaintr controller sea0 at isa? bio irq 5 iomem 0xdc000 iosiz 0x2000 vector seaintr controller wds0 at isa? port 0x350 bio irq 15 drq 6 vector wdsintr # # ST-506, ESDI, and IDE hard disks: `wdc' and `wd' # # The flags fields are used to enable the multi-sector I/O and # the 32BIT I/O modes. The flags may be used in either the controller # definition or in the individual disk definitions. The controller # definition is supported for the boot configuration stuff. # # Each drive has a 16 bit flags value defined: # The low 8 bits are the maximum value for the multi-sector I/O, # where 0xff defaults to the maximum that the drive can handle. # The high bit of the 16 bit flags (0x8000) allows probing for # 32 bit transfers. Bit 14 (0x4000) enables a hack to wake # up powered-down laptop drives. Bit 13 (0x2000) allows # probing for PCI IDE DMA controllers, such as Intel's PIIX # south bridges. Bit 12 (0x1000) sets LBA mode instead of the # default CHS mode for accessing the drive. See the wd.4 man page. # # The flags field for the drives can be specified in the controller # specification with the low 16 bits for drive 0, and the high 16 bits # for drive 1. # e.g.: #controller wdc0 at isa? port "IO_WD1" bio irq 14 flags 0x00ff8004 vector wdintr # # specifies that drive 0 will be allowed to probe for 32 bit transfers and # a maximum multi-sector transfer of 4 sectors, and drive 1 will not be # allowed to probe for 32 bit transfers, but will allow multi-sector # transfers up to the maximum that the drive supports. # # If you are using a PCI controller that is not running in compatibility # mode (for example, it is a 2nd IDE PCI interface), then use config line(s) # such as: # #controller wdc2 at isa? port "0" bio irq ? flags 0xa0ffa0ff vector wdintr #disk wd4 at wdc2 drive 0 #disk wd5 at wdc2 drive 1 # #controller wdc3 at isa? port "0" bio irq ? flags 0xa0ffa0ff vector wdintr #disk wd6 at wdc3 drive 0 #disk wd7 at wdc3 drive 1 # # Note that the above config would be useful for a Promise card, when used # on a MB that already has a PIIX controller. Note the bogus irq and port # entries. These are automatically filled in by the IDE/PCI support. # controller wdc0 at isa? port "IO_WD1" bio irq 14 vector wdintr disk wd0 at wdc0 drive 0 disk wd1 at wdc0 drive 1 controller wdc1 at isa? port "IO_WD2" bio irq 15 vector wdintr disk wd2 at wdc1 drive 0 disk wd3 at wdc1 drive 1 # # Options for `wdc': # # CMD640 enables serializing access to primary and secondary channel # of the CMD640B IDE Chip. The serializing will only take place # if this option is set *and* the chip is probed by the pci-system. # options "CMD640" #Enable work around for CMD640 h/w bug # # ATAPI enables the support for ATAPI-compatible IDE devices # options ATAPI #Enable ATAPI support for IDE bus options ATAPI_STATIC #Don't do it as an LKM # IDE CD-ROM driver - requires wdc controller and ATAPI option device wcd0 # IDE floppy driver - requires wdc controller and ATAPI option device wfd0 # # Standard floppy disk controllers and floppy tapes: `fdc', `fd', and `ft' # controller fdc0 at isa? port "IO_FD1" bio irq 6 drq 2 vector fdintr # # FDC_DEBUG enables floppy debugging. Since the debug output is huge, you # gotta turn it actually on by setting the variable fd_debug with DDB, # however. options FDC_DEBUG # This option is undocumented on purpose. options FDC_PRINT_BOGUS_CHIPTYPE # # Activate this line instead of the fdc0 line above if you happen to # have an Insight floppy tape. Probing them proved to be dangerous # for people with floppy disks only, so it's "hidden" behind a flag: #controller fdc0 at isa? port "IO_FD1" bio flags 1 irq 6 drq 2 vector fdintr disk fd0 at fdc0 drive 0 disk fd1 at fdc0 drive 1 tape ft0 at fdc0 drive 2 # # Other standard PC hardware: `lpt', `mse', `psm', `sio', etc. # # lpt: printer port # lpt specials: # port can be specified as ?, this will cause the driver to scan # the BIOS port list; # the irq and vector clauses may be omitted, this # will force the port into polling mode. # mse: Logitech and ATI InPort bus mouse ports # psm: PS/2 mouse port [note: conflicts with sc0/vt0, thus "conflicts" keywd] # sio: serial ports (see sio(4)) device lpt0 at isa? port? tty irq 7 vector lptintr device lpt1 at isa? port "IO_LPT3" tty irq 5 vector lptintr device mse0 at isa? port 0x23c tty irq 5 vector mseintr device psm0 at isa? port "IO_KBD" conflicts tty irq 12 vector psmintr # Options for psm: options PSM_HOOKAPM #hook the APM resume event, useful #for some laptops options PSM_RESETAFTERSUSPEND #reset the device at the resume event device sio0 at isa? port "IO_COM1" tty flags 0x10 irq 4 vector siointr # # `flags' for serial drivers that support consoles (only for sio now): # 0x10 enable console support for this unit. The other console flags # are ignored unless this is set. Enabling console support does # not make the unit the preferred console - boot with -h or set # the 0x20 flag for that. Currently, at most one unit can have # console support; the first one (in config file order) with # this flag set is preferred. Setting this flag for sio0 gives # the old behaviour. # 0x20 force this unit to be the console (unless there is another # higher priority console). This replaces the COMCONSOLE option. # 0x40 reserve this unit for low level console operations. Do not # # PnP `flags' (set via userconfig using pnp x flags y) # 0x1 disable probing of this device. Used to prevent your modem # from being attached as a PnP modem. # # Options for serial drivers that support consoles (only for sio now): options BREAK_TO_DEBUGGER #a BREAK on a comconsole goes to #DDB, if available. options CONSPEED=9600 #default speed for serial console (default 9600) # Options for sio: options COM_ESP #code for Hayes ESP options COM_MULTIPORT #code for some cards with shared IRQs options DSI_SOFT_MODEM #code for DSI Softmodems options "EXTRA_SIO=2" #number of extra sio ports to allocate # Other flags for sio that aren't documented in the man page. # 0x20000 enable hardware RTS/CTS and larger FIFOs. Only works for # ST16650A-compatible UARTs. # # Network interfaces: `cx', `ed', `el', `ep', `ie', `is', `le', `lnc' # # ar: Arnet SYNC/570i hdlc sync 2/4 port V.35/X.21 serial driver (requires sppp) # cx: Cronyx/Sigma multiport sync/async (with Cisco or PPP framing) # ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503 # el: 3Com 3C501 (slow!) # ep: 3Com 3C509 (buggy) # fe: Fujitsu MB86960A/MB86965A Ethernet # ie: AT&T StarLAN 10 and EN100; 3Com 3C507; unknown NI5210; Intel EtherExpress # le: Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100, # DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422) # lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL) # sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp) # wl: Lucent Wavelan (ISA card only). # ze: IBM/National Semiconductor PCMCIA ethernet controller. # zp: 3Com PCMCIA Etherlink III (It does not require shared memory for # send/receive operation, but it needs 'iomem' to read/write the # attribute memory) # device ar0 at isa? port 0x300 net irq 10 iomem 0xd0000 vector arintr device cx0 at isa? port 0x240 net irq 15 drq 7 vector cxintr device ed0 at isa? port 0x280 net irq 5 iomem 0xd8000 vector edintr device eg0 at isa? port 0x310 net irq 5 vector egintr device el0 at isa? port 0x300 net irq 9 vector elintr device ep0 at isa? port 0x300 net irq 10 vector epintr device ex0 at isa? port? net irq? vector exintr device fe0 at isa? port 0x300 net irq ? vector feintr device ie0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector ieintr device ie1 at isa? port 0x360 net irq 7 iomem 0xd0000 vector ieintr device le0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector le_intr device lnc0 at isa? port 0x300 net irq 10 drq 0 vector lncintr device sr0 at isa? port 0x300 net irq 5 iomem 0xd0000 vector srintr options WLCACHE # enables the signal-strength cache options WLDEBUG # enables verbose debugging output device wl0 at isa? port 0x300 net irq ? vector wlintr # We can (bogusly) include both the dedicated PCCARD drivers and the generic # support when COMPILING_LINT. device ze0 at isa? port 0x300 net irq 5 iomem 0xd8000 vector zeintr device zp0 at isa? port 0x300 net irq 10 iomem 0xd8000 vector zpintr # # ATM related options # # The `en' device provides support for Efficient Networks (ENI) # ENI-155 PCI midway cards, and the Adaptec 155Mbps PCI ATM cards (ANA-59x0). # # atm pseudo-device provides generic atm functions and is required for # atm devices. # NATM enables the netnatm protocol family that can be used to # bypass TCP/IP. # # the current driver supports only PVC operations (no atm-arp, no multicast). # for more details, please read the original documents at # http://www.ccrc.wustl.edu/pub/chuck/bsdatm/wucs.html # pseudo-device atm device en0 device en1 options NATM #native ATM # # Audio drivers: `snd', `sb', `pas', `gus', `pca' # # snd: Voxware sound support code # sb: SoundBlaster PCM - SoundBlaster, SB Pro, SB16, ProAudioSpectrum # sbxvi: SoundBlaster 16 # sbmidi: SoundBlaster 16 MIDI interface # pas: ProAudioSpectrum PCM and MIDI # gus: Gravis Ultrasound - Ultrasound, Ultrasound 16, Ultrasound MAX # gusxvi: Gravis Ultrasound 16-bit PCM (do not use) # mss: Microsoft Sound System # css: Crystal Sound System (CSS 423x PnP) # sscape: Ensoniq Soundscape MIDI interface # sscape_mss: Ensoniq Soundscape PCM (requires sscape) # opl: Yamaha OPL-2 and OPL-3 FM - SB, SB Pro, SB 16, ProAudioSpectrum # uart: stand-alone 6850 UART for MIDI # mpu: Roland MPU-401 stand-alone card # # Beware! The addresses specified below are also hard-coded in # i386/isa/sound/sound_config.h. If you change the values here, you # must also change the values in the include file. # # pcm: PCM audio through various sound cards. # # This is the work in progress from Luigi Rizzo. This has support for # CS423x based cards, OPTi931, SB16 PnP, GusPnP. For more information # about this driver, take a look at sys/i386/isa/snd/README. # # The flags of the device tells the device a bit more info about the # device that normally is obtained through the PnP interface. # bit 2..0 secondary DMA channel; # bit 4 set if the board uses two dma channels; # bit 15..8 board type, overrides autodetection; leave it # zero if don't know what to put in (and you don't, # since this is unsupported at the moment...). # # This driver will use the new PnP code if it's available. # # pca: PCM audio through your PC speaker # # If you have a GUS-MAX card and want to use the CS4231 codec on the # card the drqs for the gus max must be 8 bit (1, 2, or 3). # # If you would like to use the full duplex option on the gus, then define # flags to be the ``read dma channel''. # # options BROKEN_BUS_CLOCK #PAS-16 isn't working and OPTI chipset # options SYMPHONY_PAS #PAS-16 isn't working and SYMPHONY chipset # options EXCLUDE_SBPRO #PAS-16 # options SBC_IRQ=5 #PAS-16. Must match irq on sb0 line. # PAS16: The order of the pas0/sb0/opl0 is important since the # sb emulation is enabled in the pas-16 attach. # # The i386/isa/sound/sound.doc has more information. # Controls all "VOXWARE" driver sound devices. See Luigi's driver # below for an alternate which may work better for some cards. # controller snd0 device pas0 at isa? port 0x388 irq 10 drq 6 vector pasintr device sb0 at isa? port 0x220 irq 5 drq 1 vector sbintr device sbxvi0 at isa? drq 5 device sbmidi0 at isa? port 0x330 device awe0 at isa? port 0x620 device gus0 at isa? port 0x220 irq 12 drq 1 vector gusintr #device gus0 at isa? port 0x220 irq 12 drq 1 flags 0x3 vector gusintr device mss0 at isa? port 0x530 irq 10 drq 1 vector adintr device css0 at isa? port 0x534 irq 5 drq 1 flags 0x08 vector adintr device sscape0 at isa? port 0x330 irq 9 drq 0 vector sscapeintr device trix0 at isa? port 0x330 irq 6 drq 0 vector sscapeintr device sscape_mss0 at isa? port 0x534 irq 5 drq 1 vector sndintr device opl0 at isa? port 0x388 device mpu0 at isa? port 0x330 irq 6 drq 0 device uart0 at isa? port 0x330 irq 5 vector "m6850intr" # Luigi's snd code (use INSTEAD of snd0 and all VOXWARE drivers!). # You may also wish to enable the pnp controller with this, for pnp # sound cards. # #device pcm0 at isa? port ? tty irq 10 drq 1 flags 0x0 vector pcmintr # Not controlled by `snd' device pca0 at isa? port IO_TIMER1 tty # # Miscellaneous hardware: # # mcd: Mitsumi CD-ROM # scd: Sony CD-ROM # matcd: Matsushita/Panasonic CD-ROM # wt: Wangtek and Archive QIC-02/QIC-36 tape drives # ctx: Cortex-I frame grabber # apm: Laptop Advanced Power Management (experimental) # spigot: The Creative Labs Video Spigot video-acquisition board # meteor: Matrox Meteor video capture board # alog: Industrial Computer Source AIO8-P driver # bktr: Bt848 capture boards (http://www.freebsd.org/~fsmp/HomeAuto/Bt848.html) # cy: Cyclades serial driver # dgb: Digiboard PC/Xi and PC/Xe series driver (ALPHA QUALITY!) # gp: National Instruments AT-GPIB and AT-GPIB/TNT board # asc: GI1904-based hand scanners, e.g. the Trust Amiscan Grey # gsc: Genius GS-4500 hand scanner. # joy: joystick # labpc: National Instrument's Lab-PC and Lab-PC+ # rc: RISCom/8 multiport card # rp: Comtrol Rocketport(ISA) - single card # tw: TW-523 power line interface for use with X-10 home control products # si: Specialix SI/XIO 4-32 port terminal multiplexor # stl: Stallion EasyIO and EasyConnection 8/32 (cd1400 based) # stli: Stallion EasyConnection 8/64, ONboard, Brumby (intelligent) # # Notes on APM # The flags takes the following meaning for apm0: # 0x0020 Statclock is broken. # 0x0011 Limit APM protocol to 1.1 or 1.0 # 0x0010 Limit APM protocol to 1.0 # # # Notes on the spigot: # The video spigot is at 0xad6. This port address can not be changed. # The irq values may only be 10, 11, or 15 # I/O memory is an 8kb region. Possible values are: # 0a0000, 0a2000, ..., 0fffff, f00000, f02000, ..., ffffff # The start address must be on an even boundary. # Add the following option if you want to allow non-root users to be able # to access the spigot. This option is not secure because it allows users # direct access to the I/O page. # options SPIGOT_UNSECURE # # Notes on the Comtrol Rocketport driver: # # The exact values used for rp0 depend on how many boards you have # in the system. The manufacturer's sample configs are listed as: # # Comtrol Rocketport ISA single card # device rp0 at isa? port 0x280 tty # # If instead you have two ISA cards, one installed at 0x100 and the # second installed at 0x180, then you should add the following to # your kernel configuration file: # # device rp0 at isa? port 0x100 tty # device rp1 at isa? port 0x180 tty # # For 4 ISA cards, it might be something like this: # # device rp0 at isa? port 0x180 tty # device rp1 at isa? port 0x100 tty # device rp2 at isa? port 0x340 tty # device rp3 at isa? port 0x240 tty # # And for PCI cards, you only need say: # # device rp0 # device rp1 # ... # Note: Make sure that any Rocketport PCI devices are specified BEFORE the # ISA Rocketport devices. # Notes on the Digiboard driver: # # The following flag values have special meanings: # 0x01 - alternate layout of pins # 0x02 - use the windowed PC/Xe in 64K mode # Notes on the Specialix SI/XIO driver: # **This is NOT a Specialix supported Driver!** # The host card is memory, not IO mapped. # The Rev 1 host cards use a 64K chunk, on a 32K boundary. # The Rev 2 host cards use a 32K chunk, on a 32K boundary. # The cards can use an IRQ of 11, 12 or 15. # Notes on the Stallion stl and stli drivers: # See src/i386/isa/README.stl for complete instructions. # This is version 0.0.5alpha, unsupported by Stallion. # The stl driver has a secondary IO port hard coded at 0x280. You need # to change src/i386/isa/stallion.c if you reconfigure this on the boards. # The "flags" and "iosiz" settings on the stli driver depend on the board: # EasyConnection 8/64 ISA: flags 23 iosiz 0x1000 # EasyConnection 8/64 EISA: flags 24 iosiz 0x10000 # EasyConnection 8/64 MCA: flags 25 iosiz 0x1000 # ONboard ISA: flags 4 iosiz 0x10000 # ONboard EISA: flags 7 iosiz 0x10000 # ONboard MCA: flags 3 iosiz 0x10000 # Brumby: flags 2 iosiz 0x4000 # Stallion: flags 1 iosiz 0x10000 device mcd0 at isa? port 0x300 bio irq 10 vector mcdintr # for the Sony CDU31/33A CDROM device scd0 at isa? port 0x230 bio # for the SoundBlaster 16 multicd - up to 4 devices controller matcd0 at isa? port 0x230 bio device wt0 at isa? port 0x300 bio irq 5 drq 1 vector wtintr device ctx0 at isa? port 0x230 iomem 0xd0000 device spigot0 at isa? port 0xad6 irq 15 iomem 0xee000 vector spigintr device apm0 at isa? device gp0 at isa? port 0x2c0 tty device gsc0 at isa? port "IO_GSC1" tty drq 3 device joy0 at isa? port "IO_GAME" device alog0 at isa? port 0x260 tty irq 5 vector alogintr device cy0 at isa? tty irq 10 iomem 0xd4000 iosiz 0x2000 vector cyintr device dgb0 at isa? port 0x220 iomem 0xfc0000 iosiz ? tty device labpc0 at isa? port 0x260 tty irq 5 vector labpcintr device rc0 at isa? port 0x220 tty irq 12 vector rcintr device rp0 at isa? port 0x280 tty # the port and irq for tw0 are fictitious device tw0 at isa? port 0x380 tty irq 11 vector twintr device si0 at isa? iomem 0xd0000 tty irq 12 device asc0 at isa? port IO_ASC1 tty drq 3 irq 10 vector ascintr device bqu0 at isa? port 0x150 device stl0 at isa? port 0x2a0 tty irq 10 vector stlintr device stli0 at isa? port 0x2a0 tty iomem 0xcc000 flags 23 iosiz 0x1000 device loran0 at isa? port ? tty irq 5 vector loranintr # # EISA devices: # # The EISA bus device is eisa0. It provides auto-detection and # configuration support for all devices on the EISA bus. # # The `ahb' device provides support for the Adaptec 174X adapter. # # The `ahc' device provides support for the Adaptec 274X and 284X # adapters. The 284X, although a VLB card responds to EISA probes. # # fea: DEC DEFEA EISA FDDI adapter # controller eisa0 controller ahb0 controller ahc0 device fea0 # enable tagged command queuing, which is a major performance win on # devices that support it (and controllers with enough SCB's) options AHC_TAGENABLE # enable SCB paging - See the ahc.4 man page options AHC_SCBPAGING_ENABLE # The aic7xxx driver will attempt to use memory mapped I/O for all PCI # controllers that have it configured only if this option is set. Unfortunately, # this doesn't work on some motherboards, which prevents it from being the # default. options AHC_ALLOW_MEMIO # By default, only 10 EISA slots are probed, since the slot numbers # above clash with the configuration address space of the PCI subsystem, # and the EISA probe is not very smart about this. This is sufficient # for most machines, but in particular the HP NetServer LC series comes # with an onboard AIC7770 dual-channel SCSI controller on EISA slot #11, # thus you need to bump this figure to 12 for them. options "EISA_SLOTS=12" # # PCI devices: # # The main PCI bus device is `pci'. It provides auto-detection and # configuration support for all devices on the PCI bus, using either # configuration mode defined in the PCI specification. # # The `ahc' device provides support for the Adaptec 29/3940(U)(W) # and motherboard based AIC7870/AIC7880 adapters. # # The `ncr' device provides support for the NCR 53C810 and 53C825 # self-contained SCSI host adapters. # # The `amd' device provides support for the Tekram DC-390 and 390T # SCSI host adapters, but is expected to work with any AMD 53c974 # PCI SCSI chip and the AMD Ethernet+SCSI Combo chip, after some # local patches were applied to the sources (that had originally # been written by Tekram and limited to work with their SCSI cards). # # The `de' device provides support for the Digital Equipment DC21040 # self-contained Ethernet adapter. # # The `fxp' device provides support for the Intel EtherExpress Pro/100B # PCI Fast Ethernet adapters. # # The `tx' device provides support for the SMC 9432TX cards. # # The `vx' device provides support for the 3Com 3C590 and 3C595 # early support # # The `fpa' device provides support for the Digital DEFPA PCI FDDI # adapter. pseudo-device fddi is also needed. # # The `meteor' device is a PCI video capture board. It can also have the # following options: # options METEOR_ALLOC_PAGES=xxx preallocate kernel pages for data entry # figure (ROWS*COLUMN*BYTES_PER_PIXEL*FRAME+PAGE_SIZE-1)/PAGE_SIZE # options METEOR_DEALLOC_PAGES remove all allocated pages on close(2) # options METEOR_DEALLOC_ABOVE=xxx remove all allocated pages above the # specified amount. If this value is below the allocated amount no action # taken # option METEOR_SYSTEM_DEFAULT={METEOR_PAL|METEOR_NTSC|METEOR_SECAM}, used # for initialization of fps routine when a signal is not present. # # The 'bktr' device is a PCI video capture board. It also has a TV tuner -# on board. +# on board. To override the tuner detection use +# options OVERRIDE_TUNER=x +# The current values are found in /usr/src/sys/pci/brooktree848.c +# # controller pci0 controller ahc1 controller ncr0 controller amd0 device de0 device fxp0 device tx0 device vx0 device fpa0 device meteor0 device bktr0 # # PCCARD/PCMCIA # # card: slot controller # pcic: slots controller card0 device pcic0 at card? device pcic1 at card? # # Laptop/Notebook options: # # See also: # apm under `Miscellaneous hardware' # above. # For older notebooks that signal a powerfail condition (external # power supply dropped, or battery state low) by issuing an NMI: options POWERFAIL_NMI # make it beep instead of panicing # # Parallel-Port Bus # # Parallel port bus support is provided by the `ppbus' device. # Multiple devices may be attached to the parallel port, devices # are automatically probed and attached when found. # # Supported devices: # vpo Iomega Zip Drive # Requires SCSI disk support ('scbus' and 'sd'), best # performance is achieved with ports in EPP 1.9 mode. # nlpt Parallel Printer # ppi General-purpose I/O ("Geek Port") # # Supported interfaces: # ppc ISA-bus parallel port interfaces. # controller ppbus0 controller vpo0 at ppbus? device nlpt0 at ppbus? device ppi0 at ppbus? device pps0 at ppbus? controller ppc0 at isa? disable port ? irq 7 vector ppcintr # Kernel BOOTP support options BOOTP # Use BOOTP to obtain IP address/hostname options BOOTP_NFSROOT # NFS mount root filesystem using BOOTP info options "BOOTP_NFSV3" # Use NFS v3 to NFS mount root options BOOTP_COMPAT # Workaround for broken bootp daemons. options "BOOTP_WIRED_TO=fxp0" # Use interface fxp0 for BOOTP # # An obsolete option to test kern_opt.c. # options GATEWAY # If you want to disable loadable kernel modules (LKM), you # might want to use this option. #options NO_LKM # # Add tie-ins for a hardware watchdog. This only enable the hooks; # the user must still supply the actual driver. # options HW_WDOG # # Set the number of PV entries per process. Increasing this can # stop panics related to heavy use of shared memory. However, that can # (combined with large amounts of physical memory) cause panics at # boot time due the kernel running out of VM space. # # If you're tweaking this, you might also want to increase the sysctls # "vm.v_free_min", "vm.v_free_reserved", and "vm.v_free_target". # # The value below is the one more than the default. # options "PMAP_SHPGPERPROC=201" # More undocumented options for linting. options CLK_CALIBRATION_LOOP options "CLK_USE_I8254_CALIBRATION" options CLK_USE_TSC_CALIBRATION options CLUSTERDEBUG options COMPAT_LINUX options CPU_UPGRADE_HW_CACHE options DEBUG options "DEBUG_1284" options DEVFS_ROOT #options DISABLE_PSE options "EXT2FS" options "I586_PMC_GUPROF=0x70000" options "IBCS2" # broken: #options IPFILTER options KEY options KEY_DEBUG options LOCKF_DEBUG options LOUTB options KBD_MAXRETRY=4 options KBD_MAXWAIT=6 options KBD_RESETDELAY=201 options KBDIO_DEBUG=2 options MSGMNB=2049 options MSGMNI=41 options MSGSEG=2049 options MSGSSZ=16 options MSGTQL=41 options NBUF=512 options NETATALKDEBUG options NMBCLUSTERS=1024 options NPX_DEBUG options NULLFS_DIAGNOSTIC options PANIC_REBOOT_WAIT_TIME=16 options "PCVT_24LINESDEF" options PCVT_CTRL_ALT_DEL options PCVT_EMU_MOUSE options PCVT_FREEBSD=211 options PCVT_META_ESC options PCVT_NSCREENS=9 options PCVT_PRETTYSCRNS options PCVT_SCANSET=2 options PCVT_SCREENSAVER options PCVT_USEKBDSEC options "PCVT_VT220KEYB" options PSM_DEBUG=1 options "SCSI_2_DEF" options SCSI_DELAY=8 # Be pessimistic about Joe SCSI device options SCSI_NCR_DEBUG options SCSI_NCR_DFLT_TAGS=4 options SCSI_NCR_MAX_SYNC=10000 options SCSI_NCR_MAX_WIDE=1 options SCSI_NCR_MYADDR=7 options SEMMAP=31 options SEMMNI=11 options SEMMNS=61 options SEMMNU=31 options SEMMSL=61 options SEMOPM=101 options SEMUME=11 options SHOW_BUSYBUFS # List buffers that prevent root unmount options SHMALL=1025 options "SHMMAX=(SHMMAXPGS*PAGE_SIZE+1)" options SHMMAXPGS=1025 options SHMMIN=2 options SHMMNI=33 options SHMSEG=9 options SI_DEBUG options SIMPLELOCK_DEBUG options SPX_HACK # The 'dpt' driver provides support for DPT controllers (http://www.dpt.com/). # These have hardware RAID-{0,1,5} support, and do multi-initiator I/O. # See sys/dev/dpt for debugging and other subtle options. # DPT_VERIFY_HINTR Performs some strict hardware interrupts testing. # Only use if you suspect PCI bus corruption problems # DPT_RESTRICTED_FREELIST Normally, the freelisat used by the DPT for queue # will grow to accomodate increased use. This growth # will NOT shrink. To restrict the number of queue # slots to exactly what the DPT can hold at one time, # enable this option. # DPT_MEASURE_PERFORMANCE Enables a set of (semi)invasive metrics. Various # instruments are enabled. Assumed to be enabled by # /usr/sbin/dpt_* tools. # DPT_FREELIST_IS_STACK For optimat L{1,2} CPU cache utilization, enable # this option. Otherwise, the transaction queue is # a LIFO. I cannot measure the performance gain. # DPT_HANDLE_TIMEOUTS Normally device timeouts are handled by the DPT. # If you ant the driver to handle timeouts, enable # this option. If your system is very busy, this # option will create more trouble than solve. # DPT_TIMEOUT_FACTOR Used to compute the excessive amount of time to # wait when timing out with the above option. # DPT_DEBUG_xxxx These are controllable from sys/dev/dpt/dpt.h # DPT_LOST_IRQ When enabled, will try, once per second, to catch # any interrupt that got lost. Seems to help in some # DPT-firmware/Motherboard combinations. Minimal # cost, great benefit. controller dpt0 # DPT options options DPT_VERIFY_HINTR options DPT_RESTRICTED_FREELIST options DPT_MEASURE_PERFORMANCE options DPT_FREELIST_IS_STACK options DPT_HANDLE_TIMEOUTS options DPT_TIMEOUT_FACTOR=4 options DPT_INTR_DELAY=200 # Some motherboards need that options DPT_LOST_IRQ diff --git a/sys/i386/conf/options.i386 b/sys/i386/conf/options.i386 index 5661cf6899e7..c89fdb744cbf 100644 --- a/sys/i386/conf/options.i386 +++ b/sys/i386/conf/options.i386 @@ -1,122 +1,125 @@ -# $Id: options.i386,v 1.75 1998/02/21 10:11:41 eivind Exp $ +# $Id: options.i386,v 1.76 1998/03/09 22:09:11 eivind Exp $ BOUNCEPAGES opt_bounce.h DISABLE_PSE USER_LDT MATH_EMULATE opt_math_emulate.h GPL_MATH_EMULATE opt_math_emulate.h PMAP_SHPGPERPROC opt_pmap.h VM86 opt_vm86.h IBCS2 opt_dontuse.h COMPAT_LINUX opt_dontuse.h SHOW_BUSYBUFS TUNE_1542 PANIC_REBOOT_WAIT_TIME opt_panic.h MAXMEM PERFMON opt_perfmon.h POWERFAIL_NMI opt_trap.h AUTO_EOI_1 opt_auto_eoi.h AUTO_EOI_2 opt_auto_eoi.h BREAK_TO_DEBUGGER opt_comconsole.h CONSPEED opt_comconsole.h COMCONSOLE opt_defunct.h CONADDR opt_defunct.h CONUNIT opt_defunct.h COM_ESP opt_sio.h COM_MULTIPORT opt_sio.h DSI_SOFT_MODEM opt_sio.h EXTRA_SIO opt_sio.h I586_CTR_GUPROF opt_defunct.h I586_PMC_GUPROF opt_i586_guprof.h TSC_GUPROF opt_defunct.h WLCACHE opt_wavelan.h WLDEBUG opt_wavelan.h # These two SMP options have dramatic implications all over the kernel SMP opt_global.h APIC_IO opt_global.h # Standard SMP options NCPU opt_smp.h NBUS opt_smp.h NAPIC opt_smp.h NINTR opt_smp.h AHC_TAGENABLE opt_aic7xxx.h AHC_SCBPAGING_ENABLE opt_aic7xxx.h AHC_ALLOW_MEMIO opt_aic7xxx.h AHC_SHARE_SCBS opt_aic7xxx.h CLK_CALIBRATION_LOOP opt_clock.h CLK_USE_I8254_CALIBRATION opt_clock.h CLK_USE_TSC_CALIBRATION opt_clock.h NO_F00F_HACK opt_cpu.h CPU_BLUELIGHTNING_FPU_OP_CACHE opt_cpu.h CPU_BLUELIGHTNING_3X opt_cpu.h CPU_BTB_EN opt_cpu.h CPU_DIRECT_MAPPED_CACHE opt_cpu.h CPU_DISABLE_5X86_LSSER opt_cpu.h CPU_FASTER_5X86_FPU opt_cpu.h CPU_I486_ON_386 opt_cpu.h CPU_IORT opt_cpu.h CPU_LOOP_EN opt_cpu.h CPU_RSTK_EN opt_cpu.h CPU_SUSP_HLT opt_cpu.h CPU_UPGRADE_HW_CACHE opt_cpu.h CYRIX_CACHE_WORKS opt_cpu.h CYRIX_CACHE_REALLY_WORKS opt_cpu.h # The CPU type affects the endian conversion functions all over the kernel. I386_CPU opt_global.h I486_CPU opt_global.h I586_CPU opt_global.h I686_CPU opt_global.h SC_SPLASH_SCREEN opt_syscons.h MAXCONS opt_syscons.h SLOW_VGA opt_syscons.h STD8X16FONT opt_syscons.h SC_HISTORY_SIZE opt_syscons.h SC_DISABLE_REBOOT opt_syscons.h SC_MOUSE_CHAR opt_syscons.h PSM_HOOKAPM opt_psm.h PSM_RESETAFTERSUSPEND opt_psm.h PSM_DEBUG opt_psm.h KBD_RESETDELAY opt_kbdio.h KBD_MAXRETRY opt_kbdio.h KBD_MAXWAIT opt_kbdio.h KBDIO_DEBUG opt_kbdio.h ATAPI opt_atapi.h ATAPI_STATIC opt_atapi.h CMD640 opt_wd.h USERCONFIG opt_userconfig.h VISUAL_USERCONFIG opt_userconfig.h USERCONFIG_BOOT opt_userconfig.h EISA_SLOTS opt_eisa.h FDC_DEBUG opt_fdc.h FDC_PRINT_BOGUS_CHIPTYPE opt_fdc.h # pcvt(4) has a bunch of options FAT_CURSOR opt_pcvt.h XSERVER opt_pcvt.h PCVT_24LINESDEF opt_pcvt.h PCVT_CTRL_ALT_DEL opt_pcvt.h PCVT_EMU_MOUSE opt_pcvt.h PCVT_FREEBSD opt_pcvt.h PCVT_META_ESC opt_pcvt.h PCVT_NSCREENS opt_pcvt.h PCVT_PRETTYSCRNS opt_pcvt.h PCVT_SCANSET opt_pcvt.h PCVT_SCREENSAVER opt_pcvt.h PCVT_USEKBDSEC opt_pcvt.h PCVT_VT220KEYB opt_pcvt.h +# give bktr an opt_bktr.h file +OVERRIDE_TUNER opt_bktr.h + diff --git a/sys/pci/brooktree848.c b/sys/pci/brooktree848.c index 215cb9a31d67..583ecf3f33b2 100644 --- a/sys/pci/brooktree848.c +++ b/sys/pci/brooktree848.c @@ -1,4803 +1,4879 @@ -/* BT848 1.27 Driver for Brooktree's Bt848 based cards. +/* BT848 1.30 Driver for Brooktree's Bt848 based cards. The Brooktree BT848 Driver driver is based upon Mark Tinguely and Jim Lowe's driver for the Matrox Meteor PCI card . The Philips SAA 7116 and SAA 7196 are very different chipsets than the BT848. For starters, the BT848 is a one chipset solution and it incorporates a RISC engine to control the DMA transfers -- that is it the actual dma process is control by a program which resides in the hosts memory also the register definitions between the Philips chipsets and the Bt848 are very different. The original copyright notice by Mark and Jim is included mostly to honor their fantastic work in the Matrox Meteor driver! Enjoy, Amancio */ /* * 1. Redistributions of source code must retain the * Copyright (c) 1997 Amancio Hasty * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Amancio Hasty * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * 1. Redistributions of source code must retain the * Copyright (c) 1995 Mark Tinguely and Jim Lowe * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Tinguely and Jim Lowe * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* Change History: 1.0 1/24/97 First Alpha release 1.1 2/20/97 Added video ioctl so we can do PCI To PCI data transfers. This is for capturing data directly to a vga frame buffer which has a linear frame buffer. Minor code clean-up. 1.3 2/23/97 Fixed system lock-up reported by Randall Hopper . This problem seems somehow to be exhibited only in his system. I changed the setting of INT_MASK for CAP_CONTINUOUS to be exactly the same as CAP_SINGLE apparently setting bit 23 cleared the system lock up. version 1.1 of the driver has been reported to work with STB's WinTv, Hauppage's Wincast/Tv and last but not least with the Intel Smart Video Recorder. 1.4 3/9/97 fsmp@freefall.org Merged code to support tuners on STB and WinCast cards. Modifications to the contrast and chroma ioctls. Textual cleanup. 1.5 3/15/97 fsmp@freefall.org new bt848 specific versions of hue/bright/ contrast/satu/satv. Amancio's patch to fix "screen freeze" problem. 1.6 3/19/97 fsmp@freefall.org new table-driven frequency lookup. removed disable_intr()/enable_intr() calls from i2c. misc. cleanup. 1.7 3/19/97 fsmp@freefall.org added audio support submitted by: Michael Petry 1.8 3/20/97 fsmp@freefall.org extended audio support. card auto-detection. major cleanup, order of routines, declarations, etc. 1.9 3/22/97 fsmp@freefall.org merged in Amancio's minor unit for tuner control mods. misc. cleanup, especially in the _intr routine. made AUDIO_SUPPORT mainline code. 1.10 3/23/97 fsmp@freefall.org added polled hardware i2c routines, removed all existing software i2c routines. created software i2cProbe() routine. Randall Hopper's fixes of BT848_GHUE & BT848_GBRIG. eeprom support. 1.11 3/24/97 fsmp@freefall.org Louis Mamakos's new bt848 struct. 1.12 3/25/97 fsmp@freefall.org japanese freq table from Naohiro Shichijo. new table structs for tuner lookups. major scrub for "magic numbers". 1.13 3/28/97 fsmp@freefall.org 1st PAL support. MAGIC_[1-4] demarcates magic #s needing PAL work. AFC code submitted by Richard Tobin . 1.14 3/29/97 richard@cogsci.ed.ac.uk PAL support: magic numbers moved into format_params structure. Revised AFC interface. fixed DMA_PROG_ALLOC size misdefinition. 1.15 4/18/97 John-Mark Gurney Added [SR]RGBMASKs ioctl for byte swapping. 1.16 4/20/97 Randall Hopper Generalized RGBMASK ioctls for general pixel format setting [SG]ACTPIXFMT, and added query API to return driver-supported pix fmts GSUPPIXFMT. 1.17 4/21/97 hasty@rah.star-gate.com Clipping support added. 1.18 4/23/97 Clean up after failed CAP_SINGLEs where bt interrupt isn't delivered, and fixed fixing CAP_SINGLEs that for ODD_ONLY fields. 1.19 9/8/97 improved yuv support , cleaned up weurope channel table, incorporated cleanup work from Luigi, fixed pci interface bug due to a change in the pci interface which disables interrupts from a PCI device by default, Added Luigi's, ioctl's BT848_SLNOTCH, BT848_GLNOTCH (set luma notch and get luma not) 1.20 10/5/97 Keith Sklower submitted a patch to fix compilation of the BSDI's PCI interface. Hideyuki Suzuki Submitted a patch for Japanese cable channels Joao Carlos Mendes Luis jonny@gta.ufrj.br Submitted general ioctl to set video broadcast formats (PAL, NTSC, etc..) previously we depended on the Bt848 auto video detect feature. 1.21 10/24/97 Randall Hopper Fix temporal decimation, disable it when doing CAP_SINGLEs, and in dual-field capture, don't capture fields for different frames 1.22 11/08/97 Randall Hopper Fixes for packed 24bpp - FIFO alignment 1.23 11/17/97 Amancio Added yuv support mpeg encoding 1.24 12/27/97 Jonathan Hanna Patch to support Philips FR1236MK2 tuner 1.25 02/02/98 Takeshi Ohashi submitted code to support bktr_read . Flemming Jacobsen submitted code to support radio available with in some bt848 based cards;additionally, wrote code to correctly recognized his bt848 card. Roger Hardiman submitted various fixes to smooth out the microcode and made all modes consistent. 1.26 Moved Luigi's I2CWR ioctl from the video_ioctl section to the tuner_ioctl section Changed Major device from 79 to 92 and reserved our Major device number -- hasty@star-gate.com 1.27 Last batch of patches for radio support from Flemming Jacobsen . Added B849 PCI ID submitted by: Tomi Vainio 1.28 Frank Nobis added tuner support for the German Phillips PAL tuner and additional channels for german cable tv. +1.29 Roger Hardiman + Revised autodetection code to correctly handle both + old and new VideoLogic Captivator PCI cards. + Added tsleep of 2 seconds to initialistion code + for PAL users.Corrected clock selection code on + format change. +1.30 Bring back Frank Nobis 's opt_bktr.h + */ #define DDB(x) x #define DEB(x) #ifdef __FreeBSD__ #include "bktr.h" #include "opt_devfs.h" #include "pci.h" #endif /* __FreeBSD__ */ #if !defined(__FreeBSD__) || (NBKTR > 0 && NPCI > 0) #include #include #include #include #include #include #include #include #include #include #include #ifdef __FreeBSD__ #ifdef DEVFS #include #endif /* DEVFS */ #include #include #include #include #include /* extensions to ioctl_meteor.h */ #include typedef int ioctl_cmd_t; #endif /* __FreeBSD__ */ #ifdef __bsdi__ #include #include #include #include #include #include #include #include "ioctl_meteor.h" #include "ioctl_bt848.h" #include "bt848_reg.h" typedef u_long ioctl_cmd_t; #define pci_conf_read(a, r) pci_inl(a, r) #define pci_conf_write(a, r, v) pci_outl(a, r, v) #include #define bootverbose (autoprint & (AC_VERBOSE|AC_DEBUG)) #endif /* __bsdi__ */ typedef u_char bool_t; #define BKTRPRI (PZERO+8)|PCATCH static void bktr_intr __P((void *arg)); /* * memory allocated for DMA programs */ #define DMA_PROG_ALLOC (8 * PAGE_SIZE) /* When to split a dma transfer , the bt848 has timing as well as dma transfer size limitations so that we have to split dma transfers into two dma requests */ #define DMA_BT848_SPLIT 319*2 /* * Allocate enough memory for: * 768x576 RGB 16 or YUV (16 storage bits/pixel) = 884736 = 216 pages * * You may override this using the options "BROOKTREE_ALLOC_PAGES=value" * in your kernel configuration file. */ #ifndef BROOKTREE_ALLOC_PAGES #define BROOKTREE_ALLOC_PAGES 217*4 #endif #define BROOKTREE_ALLOC (BROOKTREE_ALLOC_PAGES * PAGE_SIZE) /* Defines for fields */ #define ODD_F 0x01 #define EVEN_F 0x02 #ifdef __FreeBSD__ static bktr_reg_t brooktree[ NBKTR ]; #define BROOKTRE_NUM(mtr) ((bktr - &brooktree[0])/sizeof(bktr_reg_t)) #define UNIT(x) ((x) & 0x0f) #define MINOR(x) ((x >> 4) & 0x0f) #define ATTACH_ARGS pcici_t tag, int unit static char* bktr_probe( pcici_t tag, pcidi_t type ); static void bktr_attach( ATTACH_ARGS ); static u_long bktr_count; static struct pci_device bktr_device = { "bktr", bktr_probe, bktr_attach, &bktr_count }; DATA_SET (pcidevice_set, bktr_device); static d_open_t bktr_open; static d_close_t bktr_close; static d_read_t bktr_read; static d_write_t bktr_write; static d_ioctl_t bktr_ioctl; static d_mmap_t bktr_mmap; #define CDEV_MAJOR 92 static struct cdevsw bktr_cdevsw = { bktr_open, bktr_close, bktr_read, bktr_write, bktr_ioctl, nostop, nullreset, nodevtotty, seltrue, bktr_mmap, NULL, "bktr", NULL, -1 }; #endif /* __FreeBSD__ */ #ifdef __bsdi__ #define UNIT dv_unit #define MINOR dv_subunit #define ATTACH_ARGS \ struct device * const parent, struct device * const self, void * const aux #define PCI_COMMAND_STATUS_REG PCI_COMMAND static void bktr_attach( ATTACH_ARGS ); #define NBKTR bktrcd.cd_ndevs #define brooktree *((bktr_ptr_t *)bktrcd.cd_devs) static int bktr_spl; static int bktr_intr_returning_1(void *arg) { bktr_intr(arg); return (1);} #define disable_intr() { bktr_spl = splhigh(); } #define enable_intr() { splx(bktr_spl); } static int bktr_pci_match(pci_devaddr_t *pa) { unsigned id; id = pci_inl(pa, PCI_VENDOR_ID); if (id == BROOKTREE_848_ID || id == BROOKTREE_849_ID ) { return 1; } aprint_debug("bktr_pci_match got %x\n", id); return 0; } pci_devres_t bktr_res; /* XXX only remembers last one, helps debug */ static int bktr_probe(struct device *parent, struct cfdata *cf, void *aux) { pci_devaddr_t *pa; pci_devres_t res; struct isa_attach_args *ia = aux; if (ia->ia_bustype != BUS_PCI) return (0); if ((pa = pci_scan(bktr_pci_match)) == NULL) return (0); pci_getres(pa, &bktr_res, 1, ia); if (ia->ia_maddr == 0) { printf("bktr%d: no mem attached\n", cf->cf_unit); return (0); } ia->ia_aux = pa; return 1; } struct cfdriver bktrcd = { 0, "bktr", bktr_probe, bktr_attach, DV_DULL, sizeof(bktr_reg_t) }; int bktr_open __P((dev_t, int, int, struct proc *)); int bktr_close __P((dev_t, int, int, struct proc *)); int bktr_read __P((dev_t, struct uio *, int)); int bktr_write __P((dev_t, struct uio *, int)); int bktr_ioctl __P((dev_t, ioctl_cmd_t, caddr_t, int, struct proc *)); int bktr_mmap __P((dev_t, int, int)); struct devsw bktrsw = { &bktrcd, bktr_open, bktr_close, bktr_read, bktr_write, bktr_ioctl, seltrue, bktr_mmap, NULL, nodump, NULL, 0, nostop }; #endif /* __bsdi__ */ /* * This is for start-up convenience only, NOT mandatory. */ #if !defined( DEFAULT_CHNLSET ) #define DEFAULT_CHNLSET CHNLSET_WEUROPE #endif /* * Parameters describing size of transmitted image. */ static struct format_params format_params[] = { /* # define BT848_IFORM_F_AUTO (0x0) - don't matter. */ - { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, 0 }, + { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_AUTO }, /* # define BT848_IFORM_F_NTSCM (0x1) */ { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0 }, /* # define BT848_IFORM_F_NTSCJ (0x2) */ { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0 }, /* # define BT848_IFORM_F_PALBDGHI (0x3) */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1 }, /* # define BT848_IFORM_F_PALM (0x4) */ { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0 }, /*{ 625, 32, 576, 910, 186, 922, 640, 780, 25, 0x68, 0x5d, BT848_IFORM_X_XT0 }, */ /* # define BT848_IFORM_F_PALN (0x5) */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1 }, /* # define BT848_IFORM_F_SECAM (0x6) */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x00, BT848_IFORM_X_XT1 }, /* # define BT848_IFORM_F_RSVD (0x7) - ???? */ { 625, 32, 576, 1135, 186, 922, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT0 }, }; /* * Table of supported Pixel Formats */ static struct meteor_pixfmt_internal { struct meteor_pixfmt public; u_int color_fmt; } pixfmt_table[] = { { { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0,0 }, 0x33 }, { { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 1,0 }, 0x33 }, { { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 0,0 }, 0x22 }, { { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 1,0 }, 0x22 }, { { 0, METEOR_PIXTYPE_RGB, 3, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x11 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,0 }, 0x00 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x00 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x00 }, { { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x00 }, { { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 }, { { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x44 }, { { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 }, }; #define PIXFMT_TABLE_SIZE ( sizeof(pixfmt_table) / sizeof(pixfmt_table[0]) ) /* * Table of Meteor-supported Pixel Formats (for SETGEO compatibility) */ /* FIXME: Also add YUV_422 and YUV_PACKED as well */ static struct { u_long meteor_format; struct meteor_pixfmt public; } meteor_pixfmt_table[] = { { METEOR_GEO_YUV_12, { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 } }, /* FIXME: Should byte swap flag be on for this one; negative in drvr? */ { METEOR_GEO_YUV_422, { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 } }, { METEOR_GEO_YUV_PACKED, { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 } }, { METEOR_GEO_RGB16, { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0, 0 } }, { METEOR_GEO_RGB24, { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000, 0x00ff00, 0x0000ff }, 0, 0 } }, }; #define METEOR_PIXFMT_TABLE_SIZE ( sizeof(meteor_pixfmt_table) / \ sizeof(meteor_pixfmt_table[0]) ) #define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN) #define WSWAP (BT848_COLOR_CTL_WSWAP_ODD | BT848_COLOR_CTL_WSWAP_EVEN) /* experimental code for Automatic Frequency Control */ #define TUNER_AFC #define TEST_TUNER_AFC_NOT #if defined( TUNER_AFC ) #define AFC_DELAY 10000 /* 10 millisend delay */ #define AFC_BITS 0x07 #define AFC_FREQ_MINUS_125 0x00 #define AFC_FREQ_MINUS_62 0x01 #define AFC_FREQ_CENTERED 0x02 #define AFC_FREQ_PLUS_62 0x03 #define AFC_FREQ_PLUS_125 0x04 #define AFC_MAX_STEP (5 * FREQFACTOR) /* no more than 5 MHz */ #endif /* TUNER_AFC */ /* * i2c things: */ /* PLL on a Temic NTSC tuner: 4032FY5 */ #define TEMIC_NTSC_WADDR 0xc0 #define TEMIC_NTSC_RADDR 0xc1 /* PLL on a Temic PAL I tuner: 4062FY5 */ #define TEMIC_PALI_WADDR 0xc2 #define TEMIC_PALI_RADDR 0xc3 /* PLL on a Philips tuner */ #define PHILIPS_NTSC_WADDR 0xc6 #define PHILIPS_NTSC_RADDR 0xc7 /* PLL on a the Philips FR1236MK2 tuner */ #define PHILIPS_FR1236_NTSC_WADDR 0xc2 #define PHILIPS_FR1236_NTSC_RADDR 0xc3 /* PLL on a the Philips FR1216MK2 tuner, yes, the european version of the tuner is 1216 */ #define PHILIPS_FR1216_PAL_WADDR 0xc2 #define PHILIPS_FR1216_PAL_RADDR 0xc3 /* guaranteed address for any TSA5522/3 (PLL on all(?) tuners) */ #define TSA552x_WADDR 0xc2 #define TSA552x_RADDR 0xc3 #define PHILIPS_PAL_WADDR 0xc2 #define PHILIPS_PAL_RADDR 0xc3 #define TSA552x_CB_MSB (0x80) #define TSA552x_CB_CP (1<<6) #define TSA552x_CB_T2 (1<<5) #define TSA552x_CB_T1 (1<<4) #define TSA552x_CB_T0 (1<<3) #define TSA552x_CB_RSA (1<<2) #define TSA552x_CB_RSB (1<<1) #define TSA552x_CB_OS (1<<0) #define TSA552x_RADIO (TSA552x_CB_MSB | \ TSA552x_CB_T0) /* Add RADIO_OFFSET to the "frequency" to indicate that we want to tune */ /* the radio (if present) not the TV tuner. */ /* 20000 is equivalent to 20000MHz/16 = 1.25GHz - this area is unused. */ #define RADIO_OFFSET 20000 /* address of BTSC/SAP decoder chip */ #define TDA9850_WADDR 0xb6 #define TDA9850_RADDR 0xb7 /* address of MSP3400C chip */ #define MSP3400C_WADDR 0x80 #define MSP3400C_RADDR 0x81 /* EEProm (128 * 8) on an STB card */ #define X24C01_WADDR 0xae #define X24C01_RADDR 0xaf /* EEProm (256 * 8) on a Hauppauge card */ #define PFC8582_WADDR 0xa0 #define PFC8582_RADDR 0xa1 /* registers in the BTSC/dbx chip */ #define CON1ADDR 0x04 #define CON2ADDR 0x05 #define CON3ADDR 0x06 #define CON4ADDR 0x07 /* raise the charge pump voltage for fast tuning */ #define TSA552x_FCONTROL (TSA552x_CB_MSB | \ TSA552x_CB_CP | \ TSA552x_CB_T0 | \ TSA552x_CB_RSA | \ TSA552x_CB_RSB) /* lower the charge pump voltage for better residual oscillator FM */ #define TSA552x_SCONTROL (TSA552x_CB_MSB | \ TSA552x_CB_T0 | \ TSA552x_CB_RSA | \ TSA552x_CB_RSB) /* sync detect threshold */ #if 0 #define SYNC_LEVEL (BT848_ADC_RESERVED | \ BT848_ADC_CRUSH) /* threshold ~125 mV */ #else #define SYNC_LEVEL (BT848_ADC_RESERVED | \ BT848_ADC_SYNC_T) /* threshold ~75 mV */ #endif /* the GPIO bits that control the audio MUXes */ #define GPIO_AUDIOMUX_BITS 0x0f /* debug utility for holding previous INT_STAT contents */ #define STATUS_SUM static u_long status_sum = 0; /* * defines to make certain bit-fiddles understandable */ #define FIFO_ENABLED BT848_DMA_CTL_FIFO_EN #define RISC_ENABLED BT848_DMA_CTL_RISC_EN #define FIFO_RISC_ENABLED (BT848_DMA_CTL_FIFO_EN | BT848_DMA_CTL_RISC_EN) #define FIFO_RISC_DISABLED 0 #define ALL_INTS_DISABLED 0 #define ALL_INTS_CLEARED 0xffffffff #define CAPTURE_OFF 0 #define BIT_SEVEN_HIGH (1<<7) #define BIT_EIGHT_HIGH (1<<8) #define I2C_BITS (BT848_INT_RACK | BT848_INT_I2CDONE) #define TDEC_BITS (BT848_INT_FDSR | BT848_INT_FBUS) /* * misc. support routines. */ static int signCard( bktr_ptr_t bktr, int offset, int count, u_char* sig ); static void probeCard( bktr_ptr_t bktr, int verbose ); static vm_offset_t get_bktr_mem( int unit, unsigned size ); static int oformat_meteor_to_bt( u_long format ); static u_int pixfmt_swap_flags( int pixfmt ); /* * bt848 RISC programming routines. */ #ifdef BT848_DUMP static int dump_bt848( bt848_ptr_t bt848 ); #endif static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ); static void build_dma_prog( bktr_ptr_t bktr, char i_flag ); static bool_t getline(bktr_reg_t *, int); static bool_t notclipped(bktr_reg_t * , int , int); static bool_t split(bktr_reg_t *, volatile u_long **, int, u_long, int, volatile u_char ** , int ); /* * video & video capture specific routines. */ static int video_open( bktr_ptr_t bktr ); static int video_close( bktr_ptr_t bktr ); static int video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ); static void start_capture( bktr_ptr_t bktr, unsigned type ); static void set_fps( bktr_ptr_t bktr, u_short fps ); /* * tuner specific functions. */ static int tuner_open( bktr_ptr_t bktr ); static int tuner_close( bktr_ptr_t bktr ); static int tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ); static int tv_channel( bktr_ptr_t bktr, int channel ); static int tv_freq( bktr_ptr_t bktr, int frequency ); #if defined( TUNER_AFC ) static int do_afc( bktr_ptr_t bktr, int addr, int frequency ); #endif /* TUNER_AFC */ /* * audio specific functions. */ static int set_audio( bktr_ptr_t bktr, int mode ); static void temp_mute( bktr_ptr_t bktr, int flag ); static int set_BTSC( bktr_ptr_t bktr, int control ); /* * ioctls common to both video & tuner. */ static int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg ); /* * i2c primitives */ static int i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 ); static int i2cRead( bktr_ptr_t bktr, int addr ); static int writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char* data ); static int readEEProm( bktr_ptr_t bktr, int offset, int count, u_char* data ); #ifdef __FreeBSD__ /* * the boot time probe routine. */ static char* bktr_probe( pcici_t tag, pcidi_t type ) { switch (type) { case BROOKTREE_848_ID: return("BrookTree 848"); case BROOKTREE_849_ID: return("BrookTree 849"); }; return ((char *)0); } #endif /* __FreeBSD__ */ /* * the attach routine. */ static void bktr_attach( ATTACH_ARGS ) { bktr_ptr_t bktr; bt848_ptr_t bt848; #ifdef BROOKTREE_IRQ u_long old_irq, new_irq; #endif vm_offset_t buf; u_long latency; u_long fun; #ifdef __FreeBSD__ bktr = &brooktree[unit]; if (unit >= NBKTR) { printf("brooktree%d: attach: only %d units configured.\n", unit, NBKTR); printf("brooktree%d: attach: invalid unit number.\n", unit); return; } bktr->tag = tag; pci_map_mem( tag, PCI_MAP_REG_START, (vm_offset_t *) &bktr->base, &bktr->phys_base ); #ifdef BROOKTREE_IRQ /* from the configuration file */ old_irq = pci_conf_read(tag, PCI_INTERRUPT_REG); pci_conf_write(tag, PCI_INTERRUPT_REG, BROOKTREE_IRQ); new_irq = pci_conf_read(tag, PCI_INTERRUPT_REG); printf("bktr%d: attach: irq changed from %d to %d\n", unit, (old_irq & 0xff), (new_irq & 0xff)); #endif /* setup the interrupt handling routine */ pci_map_int(tag, bktr_intr, (void*) bktr, &net_imask); #endif /* __FreeBSD__ */ #ifdef __bsdi__ struct isa_attach_args * const ia = (struct isa_attach_args *)aux; pci_devaddr_t *tag = (pci_devaddr_t *) ia->ia_aux; int unit = bktr->bktr_dev.dv_unit; bktr = (bktr_reg_t *) self; bktr->base = (bt848_ptr_t) bktr_res.pci_vaddr; isa_establish(&bktr->bktr_id, &bktr->bktr_dev); bktr->bktr_ih.ih_fun = bktr_intr_returning_1; bktr->bktr_ih.ih_arg = (void *)bktr; intr_establish(ia->ia_irq, &bktr->bktr_ih, DV_DULL); #endif /* __bsdi__ */ /* * PCI latency timer. 32 is a good value for 4 bus mastering slots, if * you have more than four, then 16 would probably be a better value. */ #ifndef BROOKTREE_DEF_LATENCY_VALUE #define BROOKTREE_DEF_LATENCY_VALUE 10 #endif latency = pci_conf_read(tag, PCI_LATENCY_TIMER); latency = (latency >> 8) & 0xff; if ( bootverbose ) { if (latency) printf("brooktree%d: PCI bus latency is", unit); else printf("brooktree%d: PCI bus latency was 0 changing to", unit); } if ( !latency ) { latency = BROOKTREE_DEF_LATENCY_VALUE; pci_conf_write(tag, PCI_LATENCY_TIMER, latency<<8); } if ( bootverbose ) { printf(" %d.\n", (int) latency); } /* allocate space for dma program */ bktr->dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC); bktr->odd_dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC); /* allocate space for pixel buffer */ if ( BROOKTREE_ALLOC ) buf = get_bktr_mem(unit, BROOKTREE_ALLOC); else buf = 0; if ( bootverbose ) { printf("bktr%d: buffer size %d, addr 0x%x\n", unit, BROOKTREE_ALLOC, vtophys(buf)); } bktr->bigbuf = buf; bktr->alloc_pages = BROOKTREE_ALLOC_PAGES; if ( buf != 0 ) { bzero((caddr_t) buf, BROOKTREE_ALLOC); buf = vtophys(buf); bktr->flags = METEOR_INITALIZED | METEOR_AUTOMODE | METEOR_DEV0 | METEOR_RGB16; bktr->dma_prog_loaded = FALSE; bktr->cols = 640; bktr->rows = 480; bktr->frames = 1; /* one frame */ bktr->format = METEOR_GEO_RGB16; bktr->pixfmt = oformat_meteor_to_bt( bktr->format ); bktr->pixfmt_compat = TRUE; bt848 = bktr->base; bt848->int_mask = ALL_INTS_DISABLED; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; } /* defaults for the tuner section of the card */ bktr->tflags = TUNER_INITALIZED; bktr->tuner.frequency = 0; bktr->tuner.channel = 0; bktr->tuner.chnlset = DEFAULT_CHNLSET; bktr->audio_mux_select = 0; bktr->audio_mute_state = FALSE; probeCard( bktr, TRUE ); #ifdef DEVFS /* XXX This just throw away the token, which should probably be fixed when DEVFS is finally made really operational. */ devfs_add_devswf(&bktr_cdevsw, unit, DV_CHR, 0, 0, 0444, "bktr%d", unit); devfs_add_devswf(&bktr_cdevsw, unit+16, DV_CHR, 0, 0, 0444, "tuner%d", unit); #endif /* DEVFS */ #if __FreeBSD__ > 2 fun = pci_conf_read(tag, PCI_COMMAND_STATUS_REG); pci_conf_write(tag, PCI_COMMAND_STATUS_REG, fun | 4); #endif } /* * interrupt handling routine complete bktr_read() if using interrupts. */ static void bktr_intr( void *arg ) { bktr_ptr_t bktr; bt848_ptr_t bt848; u_long bktr_status; u_char dstatus; u_long field; u_long w_field; u_long req_field; bktr = (bktr_ptr_t) arg; bt848 = bktr->base; /* * check to see if any interrupts are unmasked on this device. If * none are, then we likely got here by way of being on a PCI shared * interrupt dispatch list. */ if (bt848->int_mask == ALL_INTS_DISABLED) return; /* bail out now, before we do something we shouldn't */ if (!(bktr->flags & METEOR_OPEN)) { bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_mask = ALL_INTS_DISABLED; /* return; ?? */ } /* record and clear the INTerrupt status bits */ bktr_status = bt848->int_stat; bt848->int_stat = bktr_status & ~I2C_BITS; /* don't touch i2c */ /* record and clear the device status register */ dstatus = bt848->dstatus; bt848->dstatus = 0x00; #if defined( STATUS_SUM ) /* add any new device status or INTerrupt status bits */ status_sum |= (bktr_status & ~(BT848_INT_RSV0|BT848_INT_RSV1)); status_sum |= ((dstatus & (BT848_DSTATUS_COF|BT848_DSTATUS_LOF)) << 6); #endif /* STATUS_SUM */ /* printf( " STATUS %x %x %x \n", dstatus, bktr_status, bt848->risc_count ); */ /* if risc was disabled re-start process again */ if ( !(bktr_status & BT848_INT_RISC_EN) || ((bktr_status &(BT848_INT_FBUS | BT848_INT_FTRGT | BT848_INT_FDSR | BT848_INT_PPERR | BT848_INT_RIPERR | BT848_INT_PABORT | BT848_INT_OCERR | BT848_INT_SCERR) ) != 0) || ((bt848->tdec == 0) && (bktr_status & TDEC_BITS)) ) { u_short tdec_save = bt848->tdec; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_mask = ALL_INTS_DISABLED; /* Reset temporal decimation ctr */ bt848->tdec = 0; bt848->tdec = tdec_save; /* Reset to no-fields captured state */ if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } } bt848->risc_strt_add = vtophys(bktr->dma_prog); bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; bt848->cap_ctl = bktr->bktr_cap_ctl; return; } if (!(bktr_status & BT848_INT_RISCI)) return; /** printf( "intr status %x %x %x\n", bktr_status, dstatus, bt848->risc_count ); */ /* * Disable future interrupts if a capture mode is not selected. * This can happen when we are in the process of closing or * changing capture modes, otherwise it shouldn't happen. */ if (!(bktr->flags & METEOR_CAP_MASK)) bt848->cap_ctl = CAPTURE_OFF; /* * Register the completed field * (For dual-field mode, require fields from the same frame) */ field = ( bktr_status & BT848_INT_FIELD ) ? EVEN_F : ODD_F; switch ( bktr->flags & METEOR_WANT_MASK ) { case METEOR_WANT_ODD : w_field = ODD_F ; break; case METEOR_WANT_EVEN : w_field = EVEN_F ; break; default : w_field = (ODD_F|EVEN_F); break; } switch ( bktr->flags & METEOR_ONLY_FIELDS_MASK ) { case METEOR_ONLY_ODD_FIELDS : req_field = ODD_F ; break; case METEOR_ONLY_EVEN_FIELDS : req_field = EVEN_F ; break; default : req_field = (ODD_F|EVEN_F); break; } if (( field == EVEN_F ) && ( w_field == EVEN_F )) bktr->flags &= ~METEOR_WANT_EVEN; else if (( field == ODD_F ) && ( req_field == ODD_F ) && ( w_field == ODD_F )) bktr->flags &= ~METEOR_WANT_ODD; else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) && ( w_field == (ODD_F|EVEN_F) )) bktr->flags &= ~METEOR_WANT_ODD; else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) && ( w_field == ODD_F )) { bktr->flags &= ~METEOR_WANT_ODD; bktr->flags |= METEOR_WANT_EVEN; } else { /* We're out of sync. Start over. */ if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } } return; } /* * If we have a complete frame. */ if (!(bktr->flags & METEOR_WANT_MASK)) { bktr->frames_captured++; /* * post the completion time. */ if (bktr->flags & METEOR_WANT_TS) { struct timeval *ts; if ((u_int) bktr->alloc_pages * PAGE_SIZE <= (bktr->frame_size + sizeof(struct timeval))) { ts =(struct timeval *)bktr->bigbuf + bktr->frame_size; /* doesn't work in synch mode except * for first frame */ /* XXX */ microtime(ts); } } /* * Wake up the user in single capture mode. */ if (bktr->flags & METEOR_SINGLE) { /* stop dma */ bt848->int_mask = ALL_INTS_DISABLED; /* disable risc, leave fifo running */ bt848->gpio_dma_ctl = FIFO_ENABLED; wakeup((caddr_t)bktr); } /* * If the user requested to be notified via signal, * let them know the frame is complete. */ if (bktr->proc && !(bktr->signal & METEOR_SIG_MODE_MASK)) psignal( bktr->proc, bktr->signal&(~METEOR_SIG_MODE_MASK) ); /* * Reset the want flags if in continuous or * synchronous capture mode. */ /* * XXX NOTE (Luigi): * currently we only support 3 capture modes: odd only, even only, * odd+even interlaced (odd field first). A fourth mode (non interlaced, * either even OR odd) could provide 60 (50 for PAL) pictures per * second, but it would require this routine to toggle the desired frame * each time, and one more different DMA program for the Bt848. * As a consequence, this fourth mode is currently unsupported. */ if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } } } return; } /*--------------------------------------------------------- ** ** BrookTree 848 character device driver routines ** **--------------------------------------------------------- */ #define VIDEO_DEV 0x00 #define TUNER_DEV 0x01 /* * */ int bktr_open( dev_t dev, int flags, int fmt, struct proc *p ) { bktr_ptr_t bktr; int unit; unit = UNIT( minor(dev) ); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[ unit ]); if (!(bktr->flags & METEOR_INITALIZED)) /* device not found */ return( ENXIO ); switch ( MINOR( minor(dev) ) ) { case VIDEO_DEV: return( video_open( bktr ) ); case TUNER_DEV: return( tuner_open( bktr ) ); } return( ENXIO ); } /* * */ static int video_open( bktr_ptr_t bktr ) { bt848_ptr_t bt848; if (bktr->flags & METEOR_OPEN) /* device is busy */ return( EBUSY ); bktr->flags |= METEOR_OPEN; bt848 = bktr->base; #ifdef BT848_DUMP dump_bt848( bt848 ); #endif bt848->dstatus = 0x00; /* clear device status reg. */ bt848->adc = SYNC_LEVEL; bt848->iform = BT848_IFORM_M_MUX1 | BT848_IFORM_X_XT0 | BT848_IFORM_F_NTSCM; bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0; bktr->format_params = BT848_IFORM_F_NTSCM; bktr->max_clip_node = 0; bt848->color_ctl_gamma = 0; bt848->color_ctl_rgb_ded = 1; bt848->color_ctl_color_bars = 0; bt848->color_ctl_ext_frmrate = 0; bt848->color_ctl_swap = 0; bt848->e_hscale_lo = 170; bt848->o_hscale_lo = 170; bt848->e_delay_lo = 0x72; bt848->o_delay_lo = 0x72; bt848->e_scloop = 0; bt848->o_scloop = 0; bt848->vbi_pack_size = 0; bt848->vbi_pack_del = 0; bktr->fifo_errors = 0; bktr->dma_errors = 0; bktr->frames_captured = 0; bktr->even_fields_captured = 0; bktr->odd_fields_captured = 0; bktr->proc = (struct proc *)0; set_fps(bktr, 30); bktr->video.addr = 0; bktr->video.width = 0; bktr->video.banksize = 0; bktr->video.ramsize = 0; bktr->pixfmt_compat = TRUE; bktr->format = METEOR_GEO_RGB16; bktr->pixfmt = oformat_meteor_to_bt( bktr->format ); bt848->int_mask = BT848_INT_MYSTERYBIT; /* what does this bit do ??? */ + /* wait 2 seconds while bt848 initialises */ + tsleep( (caddr_t)bktr, PZERO, "btinit", hz*2 ); + return( 0 ); } /* * */ static int tuner_open( bktr_ptr_t bktr ) { if ( !(bktr->tflags & TUNER_INITALIZED) ) /* device not found */ return( ENXIO ); if ( bktr->tflags & TUNER_OPEN ) /* already open */ return( 0 ); bktr->tflags |= TUNER_OPEN; bktr->tuner.radio_mode = 0; /* enable drivers on the GPIO port that control the MUXes */ bktr->base->gpio_out_en = GPIO_AUDIOMUX_BITS; /* unmute the audio stream */ set_audio( bktr, AUDIO_UNMUTE ); /* enable stereo if appropriate */ if ( bktr->card.dbx ) set_BTSC( bktr, 0 ); return( 0 ); } /* * */ int bktr_close( dev_t dev, int flags, int fmt, struct proc *p ) { bktr_ptr_t bktr; int unit; unit = UNIT( minor(dev) ); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[ unit ]); switch ( MINOR( minor(dev) ) ) { case VIDEO_DEV: return( video_close( bktr ) ); case TUNER_DEV: return( tuner_close( bktr ) ); } return( ENXIO ); } /* * */ static int video_close( bktr_ptr_t bktr ) { bt848_ptr_t bt848; bktr->flags &= ~(METEOR_OPEN | METEOR_SINGLE | METEOR_CAP_MASK | METEOR_WANT_MASK); bt848 = bktr->base; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->cap_ctl = CAPTURE_OFF; bktr->dma_prog_loaded = FALSE; bt848->tdec = 0; bt848->int_mask = ALL_INTS_DISABLED; /** FIXME: is 0xf magic, wouldn't 0x00 work ??? */ bt848->sreset = 0xf; bt848->int_stat = ALL_INTS_CLEARED; return( 0 ); } /* * tuner close handle, * place holder for tuner specific operations on a close. */ static int tuner_close( bktr_ptr_t bktr ) { bktr->tflags &= ~TUNER_OPEN; /* mute the audio by switching the mux */ set_audio( bktr, AUDIO_MUTE ); /* disable drivers on the GPIO port that control the MUXes */ bktr->base->gpio_out_en = 0; return( 0 ); } /* * */ int bktr_read( dev_t dev, struct uio *uio, int ioflag ) { bktr_ptr_t bktr; bt848_ptr_t bt848; int unit; int status; int count; if (MINOR(minor(dev)) > 0) return( ENXIO ); unit = UNIT(minor(dev)); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[unit]); bt848 = bktr->base; if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */ return( ENOMEM ); if (bktr->flags & METEOR_CAP_MASK) return( EIO ); /* already capturing */ bt848->cap_ctl = bktr->bktr_cap_ctl; count = bktr->rows * bktr->cols * pixfmt_table[ bktr->pixfmt ].public.Bpp; if ((int) uio->uio_iov->iov_len < count) return( EINVAL ); bktr->flags &= ~(METEOR_CAP_MASK | METEOR_WANT_MASK); /* capture one frame */ start_capture(bktr, METEOR_SINGLE); /* wait for capture to complete */ bt848->int_stat = ALL_INTS_CLEARED; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; status = tsleep((caddr_t)bktr, BKTRPRI, "captur", 0); if (!status) /* successful capture */ status = uiomove((caddr_t)bktr->bigbuf, count, uio); else printf ("bktr%d: read: tsleep error %d\n", unit, status); bktr->flags &= ~(METEOR_SINGLE | METEOR_WANT_MASK); return( status ); } /* * */ int bktr_write( dev_t dev, struct uio *uio, int ioflag ) { return( EINVAL ); /* XXX or ENXIO ? */ } /* * */ int bktr_ioctl( dev_t dev, ioctl_cmd_t cmd, caddr_t arg, int flag, struct proc* pr ) { bktr_ptr_t bktr; int unit; unit = UNIT(minor(dev)); if (unit >= NBKTR) /* unit out of range */ return( ENXIO ); bktr = &(brooktree[ unit ]); if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */ return( ENOMEM ); switch ( MINOR( minor(dev) ) ) { case VIDEO_DEV: return( video_ioctl( bktr, unit, cmd, arg, pr ) ); case TUNER_DEV: return( tuner_ioctl( bktr, unit, cmd, arg, pr ) ); } return( ENXIO ); } /* * video ioctls */ static int video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ) { int tmp_int; bt848_ptr_t bt848; volatile u_char c_temp; unsigned int temp; + unsigned int temp_iform; unsigned int error; struct meteor_geomet *geo; struct meteor_counts *cnt; struct meteor_video *video; vm_offset_t buf; struct format_params *fp; int i; bt848 = bktr->base; switch ( cmd ) { case BT848SCLIP: /* set clip region */ bktr->max_clip_node = 0; memcpy(&bktr->clip_list, arg, sizeof(bktr->clip_list)); for (i = 0; i < BT848_MAX_CLIP_NODE; i++) { if (bktr->clip_list[i].y_min == 0 && bktr->clip_list[i].y_max == 0) break; } bktr->max_clip_node = i; /* make sure that the list contains a valid clip secquence */ /* the clip rectangles should be sorted by x then by y as the second order sort key */ /* clip rectangle list is terminated by y_min and y_max set to 0 */ /* to disable clipping set y_min and y_max to 0 in the first clip rectangle . The first clip rectangle is clip_list[0]. */ if (bktr->max_clip_node == 0 && (bktr->clip_list[0].y_min != 0 && bktr->clip_list[0].y_max != 0)) { return EINVAL; } for (i = 0; i < BT848_MAX_CLIP_NODE - 1 ; i++) { if (bktr->clip_list[i].y_min == 0 && bktr->clip_list[i].y_max == 0) { break; } if ( bktr->clip_list[i+1].y_min != 0 && bktr->clip_list[i+1].y_max != 0 && bktr->clip_list[i].x_min > bktr->clip_list[i+1].x_min ) { bktr->max_clip_node = 0; return (EINVAL); } if (bktr->clip_list[i].x_min >= bktr->clip_list[i].x_max || bktr->clip_list[i].y_min >= bktr->clip_list[i].y_max || bktr->clip_list[i].x_min < 0 || bktr->clip_list[i].x_max < 0 || bktr->clip_list[i].y_min < 0 || bktr->clip_list[i].y_max < 0 ) { bktr->max_clip_node = 0; return (EINVAL); } } bktr->dma_prog_loaded = FALSE; break; case METEORSTATUS: /* get Bt848 status */ c_temp = bt848->dstatus; temp = 0; if (!(c_temp & 0x40)) temp |= METEOR_STATUS_HCLK; if (!(c_temp & 0x10)) temp |= METEOR_STATUS_FIDT; *(u_short *)arg = temp; break; - case BT848SFMT: /* set input format */ + case BT848SFMT: /* set input format */ temp = *(unsigned long*)arg & BT848_IFORM_FORMAT; - bt848->iform &= ~BT848_IFORM_FORMAT; - bt848->iform |= (temp | format_params[temp].iform_xtsel); + temp_iform = bt848->iform; + temp_iform &= ~BT848_IFORM_FORMAT; + temp_iform &= ~BT848_IFORM_XTSEL; + bt848->iform = (temp_iform | temp | format_params[temp].iform_xtsel); switch( temp ) { case BT848_IFORM_F_AUTO: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_AUTOMODE; break; case BT848_IFORM_F_NTSCM: case BT848_IFORM_F_NTSCJ: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_NTSC; bt848->adelay = format_params[temp].adelay; bt848->bdelay = format_params[temp].bdelay; bktr->format_params = temp; break; case BT848_IFORM_F_PALBDGHI: case BT848_IFORM_F_PALN: case BT848_IFORM_F_SECAM: case BT848_IFORM_F_RSVD: case BT848_IFORM_F_PALM: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_PAL; bt848->adelay = format_params[temp].adelay; bt848->bdelay = format_params[temp].bdelay; bktr->format_params = temp; break; } bktr->dma_prog_loaded = FALSE; break; case METEORSFMT: /* set input format */ + temp_iform = bt848->iform; + temp_iform &= ~BT848_IFORM_FORMAT; + temp_iform &= ~BT848_IFORM_XTSEL; switch(*(unsigned long *)arg & METEOR_FORM_MASK ) { case 0: /* default */ case METEOR_FMT_NTSC: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_NTSC; - bt848->iform &= ~BT848_IFORM_FORMAT; - bt848->iform |= BT848_IFORM_F_NTSCM | + bt848->iform = temp_iform | BT848_IFORM_F_NTSCM | format_params[BT848_IFORM_F_NTSCM].iform_xtsel; - bt848->adelay = 0x68; - bt848->bdelay = 0x5d; + bt848->adelay = format_params[BT848_IFORM_F_NTSCM].adelay; + bt848->bdelay = format_params[BT848_IFORM_F_NTSCM].bdelay; bktr->format_params = BT848_IFORM_F_NTSCM; break; case METEOR_FMT_PAL: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_PAL; - bt848->iform &= ~BT848_IFORM_FORMAT; - bt848->iform |= BT848_IFORM_F_PALBDGHI | + bt848->iform = temp_iform | BT848_IFORM_F_PALBDGHI | format_params[BT848_IFORM_F_PALBDGHI].iform_xtsel; - bt848->adelay = 0x7f; - bt848->bdelay = 0x72; + bt848->adelay = format_params[BT848_IFORM_F_PALBDGHI].adelay; + bt848->bdelay = format_params[BT848_IFORM_F_PALBDGHI].bdelay; bktr->format_params = BT848_IFORM_F_PALBDGHI; break; case METEOR_FMT_AUTOMODE: bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) | METEOR_AUTOMODE; - bt848->iform &= ~BT848_IFORM_FORMAT; + bt848->iform = temp_iform | BT848_IFORM_F_AUTO | + format_params[BT848_IFORM_F_AUTO].iform_xtsel; break; default: return( EINVAL ); } bktr->dma_prog_loaded = FALSE; break; case METEORGFMT: /* get input format */ *(u_long *)arg = bktr->flags & METEOR_FORM_MASK; break; case BT848GFMT: /* get input format */ *(u_long *)arg = bt848->iform & BT848_IFORM_FORMAT; break; case METEORSCOUNT: /* (re)set error counts */ cnt = (struct meteor_counts *) arg; bktr->fifo_errors = cnt->fifo_errors; bktr->dma_errors = cnt->dma_errors; bktr->frames_captured = cnt->frames_captured; bktr->even_fields_captured = cnt->even_fields_captured; bktr->odd_fields_captured = cnt->odd_fields_captured; break; case METEORGCOUNT: /* get error counts */ cnt = (struct meteor_counts *) arg; cnt->fifo_errors = bktr->fifo_errors; cnt->dma_errors = bktr->dma_errors; cnt->frames_captured = bktr->frames_captured; cnt->even_fields_captured = bktr->even_fields_captured; cnt->odd_fields_captured = bktr->odd_fields_captured; break; case METEORGVIDEO: video = (struct meteor_video *)arg; video->addr = bktr->video.addr; video->width = bktr->video.width; video->banksize = bktr->video.banksize; video->ramsize = bktr->video.ramsize; break; case METEORSVIDEO: video = (struct meteor_video *)arg; bktr->video.addr = video->addr; bktr->video.width = video->width; bktr->video.banksize = video->banksize; bktr->video.ramsize = video->ramsize; break; case METEORSFPS: set_fps(bktr, *(u_short *)arg); break; case METEORGFPS: *(u_short *)arg = bktr->fps; break; case METEORSHUE: /* set hue */ bt848->hue = (*(u_char *) arg) & 0xff; break; case METEORGHUE: /* get hue */ *(u_char *)arg = bt848->hue; break; case METEORSBRIG: /* set brightness */ bt848->bright = *(u_char *)arg & 0xff; break; case METEORGBRIG: /* get brightness */ *(u_char *)arg = bt848->bright; break; case METEORSCSAT: /* set chroma saturation */ temp = (int)*(u_char *)arg; bt848->sat_u_lo = bt848->sat_v_lo = (temp << 1) & 0xff; bt848->e_control &= ~(BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); bt848->o_control &= ~(BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); if ( temp & BIT_SEVEN_HIGH ) { bt848->e_control |= (BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); bt848->o_control |= (BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); } break; case METEORGCSAT: /* get chroma saturation */ temp = (bt848->sat_v_lo >> 1) & 0xff; if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB ) temp |= BIT_SEVEN_HIGH; *(u_char *)arg = (u_char)temp; break; case METEORSCONT: /* set contrast */ temp = (int)*(u_char *)arg & 0xff; temp <<= 1; bt848->contrast_lo = temp & 0xff; bt848->e_control &= ~BT848_E_CONTROL_CON_MSB; bt848->o_control &= ~BT848_O_CONTROL_CON_MSB; bt848->e_control |= ((temp & 0x100) >> 6 ) & BT848_E_CONTROL_CON_MSB; bt848->o_control |= ((temp & 0x100) >> 6 ) & BT848_O_CONTROL_CON_MSB; break; case METEORGCONT: /* get contrast */ temp = (int)bt848->contrast_lo & 0xff; temp |= ((int)bt848->o_control & 0x04) << 6; *(u_char *)arg = (u_char)((temp >> 1) & 0xff); break; case METEORSSIGNAL: if(*(int *)arg == 0 || *(int *)arg >= NSIG) { return( EINVAL ); break; } bktr->signal = *(int *) arg; bktr->proc = pr; break; case METEORGSIGNAL: *(int *)arg = bktr->signal; break; case METEORCAPTUR: temp = bktr->flags; switch (*(int *) arg) { case METEOR_CAP_SINGLE: if (bktr->bigbuf==0) /* no frame buffer allocated */ return( ENOMEM ); /* already capturing */ if (temp & METEOR_CAP_MASK) return( EIO ); start_capture(bktr, METEOR_SINGLE); /* wait for capture to complete */ bt848->int_stat = ALL_INTS_CLEARED; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; bt848->cap_ctl = bktr->bktr_cap_ctl; error = tsleep((caddr_t)bktr, BKTRPRI, "captur", hz); if (error && (error != ERESTART)) { /* Here if we didn't get complete frame */ #ifdef DIAGNOSTIC printf( "bktr%d: ioctl: tsleep error %d %x\n", unit, error, bt848->risc_count); #endif /* stop dma */ bt848->int_mask = ALL_INTS_DISABLED; /* disable risc, leave fifo running */ bt848->gpio_dma_ctl = FIFO_ENABLED; } bktr->flags &= ~(METEOR_SINGLE|METEOR_WANT_MASK); /* FIXME: should we set bt848->int_stat ??? */ break; case METEOR_CAP_CONTINOUS: if (bktr->bigbuf==0) /* no frame buffer allocated */ return( ENOMEM ); /* already capturing */ if (temp & METEOR_CAP_MASK) return( EIO ); start_capture(bktr, METEOR_CONTIN); bt848->int_stat = bt848->int_stat; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->cap_ctl = bktr->bktr_cap_ctl; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_RISCI | BT848_INT_VSYNC | BT848_INT_FMTCHG; #ifdef BT848_DUMP dump_bt848( bt848 ); #endif break; case METEOR_CAP_STOP_CONT: if (bktr->flags & METEOR_CONTIN) { /* turn off capture */ bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->cap_ctl = CAPTURE_OFF; bt848->int_mask = ALL_INTS_DISABLED; bktr->flags &= ~(METEOR_CONTIN | METEOR_WANT_MASK); } } break; case METEORSETGEO: /* can't change parameters while capturing */ if (bktr->flags & METEOR_CAP_MASK) return( EBUSY ); geo = (struct meteor_geomet *) arg; error = 0; /* Either even or odd, if even & odd, then these a zero */ if ((geo->oformat & METEOR_GEO_ODD_ONLY) && (geo->oformat & METEOR_GEO_EVEN_ONLY)) { printf( "bktr%d: ioctl: Geometry odd or even only.\n", unit); return( EINVAL ); } /* set/clear even/odd flags */ if (geo->oformat & METEOR_GEO_ODD_ONLY) bktr->flags |= METEOR_ONLY_ODD_FIELDS; else bktr->flags &= ~METEOR_ONLY_ODD_FIELDS; if (geo->oformat & METEOR_GEO_EVEN_ONLY) bktr->flags |= METEOR_ONLY_EVEN_FIELDS; else bktr->flags &= ~METEOR_ONLY_EVEN_FIELDS; if ((geo->columns & 0x3fe) != geo->columns) { printf( "bktr%d: ioctl: %d: columns too large or not even.\n", unit, geo->columns); error = EINVAL; } if (((geo->rows & 0x7fe) != geo->rows) || ((geo->oformat & METEOR_GEO_FIELD_MASK) && ((geo->rows & 0x3fe) != geo->rows)) ) { printf( "bktr%d: ioctl: %d: rows too large or not even.\n", unit, geo->rows); error = EINVAL; } if (geo->frames > 32) { printf("bktr%d: ioctl: too many frames.\n", unit); error = EINVAL; } if (error) return( error ); bktr->dma_prog_loaded = FALSE; bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_mask = ALL_INTS_DISABLED; if ((temp=(geo->rows * geo->columns * geo->frames * 2))) { if (geo->oformat & METEOR_GEO_RGB24) temp = temp * 2; /* meteor_mem structure for SYNC Capture */ if (geo->frames > 1) temp += PAGE_SIZE; temp = btoc(temp); if ((int) temp > bktr->alloc_pages && bktr->video.addr == 0) { buf = get_bktr_mem(unit, temp*PAGE_SIZE); if (buf != 0) { kmem_free(kernel_map, bktr->bigbuf, (bktr->alloc_pages * PAGE_SIZE)); bktr->bigbuf = buf; bktr->alloc_pages = temp; if (bootverbose) printf( "bktr%d: ioctl: Allocating %d bytes\n", unit, temp*PAGE_SIZE); } else error = ENOMEM; } } if (error) return error; bktr->rows = geo->rows; bktr->cols = geo->columns; bktr->frames = geo->frames; /* Pixel format (if in meteor pixfmt compatibility mode) */ if ( bktr->pixfmt_compat ) { bktr->format = METEOR_GEO_YUV_422; switch (geo->oformat & METEOR_GEO_OUTPUT_MASK) { case 0: /* default */ case METEOR_GEO_RGB16: bktr->format = METEOR_GEO_RGB16; break; case METEOR_GEO_RGB24: bktr->format = METEOR_GEO_RGB24; break; case METEOR_GEO_YUV_422: bktr->format = METEOR_GEO_YUV_422; if (geo->oformat & METEOR_GEO_YUV_12) bktr->format = METEOR_GEO_YUV_12; break; case METEOR_GEO_YUV_PACKED: bktr->format = METEOR_GEO_YUV_PACKED; break; } bktr->pixfmt = oformat_meteor_to_bt( bktr->format ); } if (bktr->flags & METEOR_CAP_MASK) { if (bktr->flags & (METEOR_CONTIN|METEOR_SYNCAP)) { switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; break; case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; break; default: bktr->flags |= METEOR_WANT_MASK; break; } start_capture(bktr, METEOR_CONTIN); bt848->int_stat = bt848->int_stat; bt848->gpio_dma_ctl = FIFO_ENABLED; bt848->gpio_dma_ctl = bktr->capcontrol; bt848->int_mask = BT848_INT_MYSTERYBIT | BT848_INT_VSYNC | BT848_INT_FMTCHG; } } break; /* end of METEORSETGEO */ default: return common_ioctl( bktr, bt848, cmd, arg ); } return( 0 ); } /* * tuner ioctls */ static int tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr ) { bt848_ptr_t bt848; int tmp_int; unsigned int temp, temp1; int offset; int count; u_char *buf; u_long par; u_char write; int i2c_addr; int i2c_port; u_long data; bt848 = bktr->base; switch ( cmd ) { #if defined( TUNER_AFC ) case TVTUNER_SETAFC: bktr->tuner.afc = (*(int *)arg != 0); break; case TVTUNER_GETAFC: *(int *)arg = bktr->tuner.afc; /* XXX Perhaps use another bit to indicate AFC success? */ break; #endif /* TUNER_AFC */ case TVTUNER_SETCHNL: temp_mute( bktr, TRUE ); temp = tv_channel( bktr, (int)*(unsigned long *)arg ); temp_mute( bktr, FALSE ); if ( temp < 0 ) return( EINVAL ); *(unsigned long *)arg = temp; break; case TVTUNER_GETCHNL: *(unsigned long *)arg = bktr->tuner.channel; break; case TVTUNER_SETTYPE: temp = *(unsigned long *)arg; if ( (temp < CHNLSET_MIN) || (temp > CHNLSET_MAX) ) return( EINVAL ); bktr->tuner.chnlset = temp; break; case TVTUNER_GETTYPE: *(unsigned long *)arg = bktr->tuner.chnlset; break; case TVTUNER_GETSTATUS: temp = i2cRead( bktr, TSA552x_RADDR ); *(unsigned long *)arg = temp & 0xff; break; case TVTUNER_SETFREQ: temp_mute( bktr, TRUE ); temp = tv_freq( bktr, (int)*(unsigned long *)arg ); temp_mute( bktr, FALSE ); if ( temp < 0 ) return( EINVAL ); *(unsigned long *)arg = temp; break; case TVTUNER_GETFREQ: *(unsigned long *)arg = bktr->tuner.frequency; break; case BT848_SAUDIO: /* set audio channel */ if ( set_audio( bktr, *(int*)arg ) < 0 ) return( EIO ); break; /* hue is a 2's compliment number, -90' to +89.3' in 0.7' steps */ case BT848_SHUE: /* set hue */ bt848->hue = (u_char)(*(int*)arg & 0xff); break; case BT848_GHUE: /* get hue */ *(int*)arg = (signed char)(bt848->hue & 0xff); break; /* brightness is a 2's compliment #, -50 to +%49.6% in 0.39% steps */ case BT848_SBRIG: /* set brightness */ bt848->bright = (u_char)(*(int *)arg & 0xff); break; case BT848_GBRIG: /* get brightness */ *(int *)arg = (signed char)(bt848->bright & 0xff); break; /* */ case BT848_SCSAT: /* set chroma saturation */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH ) { temp |= (BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); temp1 |= (BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); } else { temp &= ~(BT848_E_CONTROL_SAT_U_MSB | BT848_E_CONTROL_SAT_V_MSB); temp1 &= ~(BT848_O_CONTROL_SAT_U_MSB | BT848_O_CONTROL_SAT_V_MSB); } bt848->sat_u_lo = (u_char)(tmp_int & 0xff); bt848->sat_v_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GCSAT: /* get chroma saturation */ tmp_int = (int)(bt848->sat_v_lo & 0xff); if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* */ case BT848_SVSAT: /* set chroma V saturation */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH) { temp |= BT848_E_CONTROL_SAT_V_MSB; temp1 |= BT848_O_CONTROL_SAT_V_MSB; } else { temp &= ~BT848_E_CONTROL_SAT_V_MSB; temp1 &= ~BT848_O_CONTROL_SAT_V_MSB; } bt848->sat_v_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GVSAT: /* get chroma V saturation */ tmp_int = (int)bt848->sat_v_lo & 0xff; if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* */ case BT848_SUSAT: /* set chroma U saturation */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH ) { temp |= BT848_E_CONTROL_SAT_U_MSB; temp1 |= BT848_O_CONTROL_SAT_U_MSB; } else { temp &= ~BT848_E_CONTROL_SAT_U_MSB; temp1 &= ~BT848_O_CONTROL_SAT_U_MSB; } bt848->sat_u_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GUSAT: /* get chroma U saturation */ tmp_int = (int)bt848->sat_u_lo & 0xff; if ( bt848->e_control & BT848_E_CONTROL_SAT_U_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* lr 970528 luma notch etc - 3 high bits of e_control/o_control */ case BT848_SLNOTCH: /* set luma notch */ tmp_int = (*(int *)arg & 0x7) << 5 ; bt848->e_control &= ~0xe0 ; bt848->o_control &= ~0xe0 ; bt848->e_control |= tmp_int ; bt848->o_control |= tmp_int ; break; case BT848_GLNOTCH: /* get luma notch */ *(int *)arg = (int) ( (bt848->e_control & 0xe0) >> 5) ; break; /* */ case BT848_SCONT: /* set contrast */ tmp_int = *(int*)arg; temp = bt848->e_control; temp1 = bt848->o_control; if ( tmp_int & BIT_EIGHT_HIGH ) { temp |= BT848_E_CONTROL_CON_MSB; temp1 |= BT848_O_CONTROL_CON_MSB; } else { temp &= ~BT848_E_CONTROL_CON_MSB; temp1 &= ~BT848_O_CONTROL_CON_MSB; } bt848->contrast_lo = (u_char)(tmp_int & 0xff); bt848->e_control = temp; bt848->o_control = temp1; break; case BT848_GCONT: /* get contrast */ tmp_int = (int)bt848->contrast_lo & 0xff; if ( bt848->e_control & BT848_E_CONTROL_CON_MSB ) tmp_int |= BIT_EIGHT_HIGH; *(int*)arg = tmp_int; break; /* FIXME: SCBARS and CCBARS require a valid int * */ /* argument to succeed, but its not used; consider */ /* using the arg to store the on/off state so */ /* there's only one ioctl() needed to turn cbars on/off */ case BT848_SCBARS: /* set colorbar output */ bt848->color_ctl_color_bars = 1; break; case BT848_CCBARS: /* clear colorbar output */ bt848->color_ctl_color_bars = 0; break; case BT848_GAUDIO: /* get audio channel */ temp = bktr->audio_mux_select; if ( bktr->audio_mute_state == TRUE ) temp |= AUDIO_MUTE; *(int*)arg = temp; break; case BT848_SBTSC: /* set audio channel */ if ( set_BTSC( bktr, *(int*)arg ) < 0 ) return( EIO ); break; case BT848_WEEPROM: /* write eeprom */ offset = (((struct eeProm *)arg)->offset); count = (((struct eeProm *)arg)->count); buf = &(((struct eeProm *)arg)->bytes[ 0 ]); if ( writeEEProm( bktr, offset, count, buf ) < 0 ) return( EIO ); break; case BT848_REEPROM: /* read eeprom */ offset = (((struct eeProm *)arg)->offset); count = (((struct eeProm *)arg)->count); buf = &(((struct eeProm *)arg)->bytes[ 0 ]); if ( readEEProm( bktr, offset, count, buf ) < 0 ) return( EIO ); break; case BT848_SIGNATURE: offset = (((struct eeProm *)arg)->offset); count = (((struct eeProm *)arg)->count); buf = &(((struct eeProm *)arg)->bytes[ 0 ]); if ( signCard( bktr, offset, count, buf ) < 0 ) return( EIO ); break; /* Ioctl's for running the tuner device in radio mode */ case RADIO_GETMODE: *(unsigned char *)arg = bktr->tuner.radio_mode; break; case RADIO_SETMODE: bktr->tuner.radio_mode = *(unsigned char *)arg; break; case RADIO_GETFREQ: *(unsigned long *)arg = (bktr->tuner.frequency+407)*5; break; case RADIO_SETFREQ: /* The argument to this ioctl is NOT freq*16. It is ** freq*100. */ /* The radio in my stereo and the linear regression function ** in my HP48 have reached the conclusion that in order to ** set the radio tuner of the FM1216 to f MHz, the value to ** enter into the PLL is: f*20-407 ** If anyone has the exact values from the spec. sheet ** please forward them -- fj@login.dknet.dk */ temp=(int)*(unsigned long *)arg/5-407 +RADIO_OFFSET; #ifdef BKTR_RADIO_DEBUG printf("bktr%d: arg=%d temp=%d\n",unit,(int)*(unsigned long *)arg,temp); #endif #ifndef BKTR_RADIO_NOFREQCHECK /* According to the spec. sheet the band: 87.5MHz-108MHz */ /* is supported. */ if(temp<1343+RADIO_OFFSET || temp>1753+RADIO_OFFSET) { printf("bktr%d: Radio frequency out of range\n",unit); return(EINVAL); } #endif temp_mute( bktr, TRUE ); temp = tv_freq( bktr, temp ); temp_mute( bktr, FALSE ); #ifdef BKTR_RADIO_DEBUG if(temp) printf("bktr%d: tv_freq returned: %d\n",unit,temp); #endif if ( temp < 0 ) return( EINVAL ); *(unsigned long *)arg = temp; break; /* Luigi's I2CWR ioctl */ case BT848_I2CWR: par = *(u_long *)arg; write = (par >> 24) & 0xff ; i2c_addr = (par >> 16) & 0xff ; i2c_port = (par >> 8) & 0xff ; data = (par) & 0xff ; if (write) { i2cWrite( bktr, i2c_addr, i2c_port, data); } else { data = i2cRead( bktr, i2c_addr); } *(u_long *)arg = (par & 0xffffff00) | ( data & 0xff ); break; default: return common_ioctl( bktr, bt848, cmd, arg ); } return( 0 ); } /* * common ioctls */ int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg ) { int pixfmt; unsigned int temp; struct meteor_pixfmt *pf_pub; switch (cmd) { case METEORSINPUT: /* set input device */ switch(*(unsigned long *)arg & METEOR_DEV_MASK) { /* this is the RCA video input */ case 0: /* default */ case METEOR_INPUT_DEV0: bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0; bt848->iform &= ~BT848_IFORM_MUXSEL; bt848->iform |= BT848_IFORM_M_MUX1; bt848->e_control &= ~BT848_E_CONTROL_COMP; bt848->o_control &= ~BT848_O_CONTROL_COMP; set_audio( bktr, AUDIO_EXTERN ); break; /* this is the tuner input */ case METEOR_INPUT_DEV1: bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV1; bt848->iform &= ~BT848_IFORM_MUXSEL; bt848->iform |= BT848_IFORM_M_MUX0; bt848->e_control &= ~BT848_E_CONTROL_COMP; bt848->o_control &= ~BT848_O_CONTROL_COMP; set_audio( bktr, AUDIO_TUNER ); break; /* this is the S-VHS input */ case METEOR_INPUT_DEV2: case METEOR_INPUT_DEV_SVIDEO: bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV2; bt848->iform &= ~BT848_IFORM_MUXSEL; bt848->iform |= BT848_IFORM_M_MUX2; bt848->e_control |= BT848_E_CONTROL_COMP; bt848->o_control |= BT848_O_CONTROL_COMP; set_audio( bktr, AUDIO_EXTERN ); break; default: return( EINVAL ); } break; case METEORGINPUT: /* get input device */ *(u_long *)arg = bktr->flags & METEOR_DEV_MASK; break; case METEORSACTPIXFMT: if (( *(int *)arg < 0 ) || ( *(int *)arg >= PIXFMT_TABLE_SIZE )) return( EINVAL ); bktr->pixfmt = *(int *)arg; bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); bktr->pixfmt_compat = FALSE; break; case METEORGACTPIXFMT: *(int *)arg = bktr->pixfmt; break; case METEORGSUPPIXFMT : pf_pub = (struct meteor_pixfmt *)arg; pixfmt = pf_pub->index; if (( pixfmt < 0 ) || ( pixfmt >= PIXFMT_TABLE_SIZE )) return( EINVAL ); memcpy( pf_pub, &pixfmt_table[ pixfmt ].public, sizeof( *pf_pub ) ); /* Patch in our format index */ pf_pub->index = pixfmt; break; #if defined( STATUS_SUM ) case BT848_GSTATUS: /* reap status */ disable_intr(); temp = status_sum; status_sum = 0; enable_intr(); *(u_int*)arg = temp; break; #endif /* STATUS_SUM */ default: return( ENOTTY ); } return( 0 ); } /* * */ int bktr_mmap( dev_t dev, int offset, int nprot ) { int unit; bktr_ptr_t bktr; unit = UNIT(minor(dev)); if (unit >= NBKTR || MINOR(minor(dev)) > 0)/* could this happen here? */ return( -1 ); bktr = &(brooktree[ unit ]); if (nprot & PROT_EXEC) return( -1 ); if (offset >= bktr->alloc_pages * PAGE_SIZE) return( -1 ); return( i386_btop(vtophys(bktr->bigbuf) + offset) ); } /****************************************************************************** * bt848 RISC programming routines: */ /* * */ #ifdef BT848_DEBUG static int dump_bt848( bt848_ptr_t bt848 ) { volatile u_char *bt848r = (u_char *)bt848; int r[60]={ 4, 8, 0xc, 0x8c, 0x10, 0x90, 0x14, 0x94, 0x18, 0x98, 0x1c, 0x9c, 0x20, 0xa0, 0x24, 0xa4, 0x28, 0x2c, 0xac, 0x30, 0x34, 0x38, 0x3c, 0x40, 0xc0, 0x48, 0x4c, 0xcc, 0x50, 0xd0, 0xd4, 0x60, 0x64, 0x68, 0x6c, 0xec, 0xd8, 0xdc, 0xe0, 0xe4, 0, 0, 0, 0 }; int i; for (i = 0; i < 40; i+=4) { printf(" Reg:value : \t%x:%x \t%x:%x \t %x:%x \t %x:%x\n", r[i], bt848r[r[i]], r[i+1], bt848r[r[i+1]], r[i+2], bt848r[r[i+2]], r[i+3], bt848r[r[i+3]]); } printf(" INT STAT %x \n", bt848->int_stat); printf(" Reg INT_MASK %x \n", bt848->int_mask); printf(" Reg GPIO_DMA_CTL %x \n", bt848->gpio_dma_ctl); return( 0 ); } #endif /* * build write instruction */ #define BKTR_FM1 0x6 /* packed data to follow */ #define BKTR_FM3 0xe /* planar data to follow */ #define BKTR_VRE 0x4 /* even field to follow */ #define BKTR_VRO 0xC /* odd field to follow */ #define BKTR_PXV 0x0 /* valid word (never used) */ #define BKTR_EOL 0x1 /* last dword, 4 bytes */ #define BKTR_SOL 0x2 /* first dword */ #define OP_WRITE (0x1 << 28) #define OP_SKIP (0x2 << 28) #define OP_WRITEC (0x5 << 28) #define OP_JUMP (0x7 << 28) #define OP_SYNC (0x8 << 28) #define OP_WRITE123 (0x9 << 28) #define OP_WRITES123 (0xb << 28) #define OP_SOL (1 << 27) /* first instr for scanline */ #define OP_EOL (1 << 26) bool_t notclipped (bktr_reg_t * bktr, int x, int width) { int i; bktr_clip_t * clip_node; bktr->clip_start = -1; bktr->last_y = 0; bktr->y = 0; bktr->y2 = width; bktr->line_length = width; bktr->yclip = -1; bktr->yclip2 = -1; bktr->current_col = 0; if (bktr->max_clip_node == 0 ) return TRUE; clip_node = (bktr_clip_t *) &bktr->clip_list[0]; for (i = 0; i < bktr->max_clip_node; i++ ) { clip_node = (bktr_clip_t *) &bktr->clip_list[i]; if (x >= clip_node->x_min && x <= clip_node->x_max ) { bktr->clip_start = i; return FALSE; } } return TRUE; } bool_t getline(bktr_reg_t *bktr, int x ) { int i, j; bktr_clip_t * clip_node ; if (bktr->line_length == 0 || bktr->current_col >= bktr->line_length) return FALSE; bktr->y = min(bktr->last_y, bktr->line_length); bktr->y2 = bktr->line_length; bktr->yclip = bktr->yclip2 = -1; for (i = bktr->clip_start; i < bktr->max_clip_node; i++ ) { clip_node = (bktr_clip_t *) &bktr->clip_list[i]; if (x >= clip_node->x_min && x <= clip_node->x_max) { if (bktr->last_y <= clip_node->y_min) { bktr->y = min(bktr->last_y, bktr->line_length); bktr->y2 = min(clip_node->y_min, bktr->line_length); bktr->yclip = min(clip_node->y_min, bktr->line_length); bktr->yclip2 = min(clip_node->y_max, bktr->line_length); bktr->last_y = bktr->yclip2; bktr->clip_start = i; for (j = i+1; j < bktr->max_clip_node; j++ ) { clip_node = (bktr_clip_t *) &bktr->clip_list[j]; if (x >= clip_node->x_min && x <= clip_node->x_max) { if (bktr->last_y >= clip_node->y_min) { bktr->yclip2 = min(clip_node->y_max, bktr->line_length); bktr->last_y = bktr->yclip2; bktr->clip_start = j; } } else break ; } return TRUE; } } } if (bktr->current_col <= bktr->line_length) { bktr->current_col = bktr->line_length; return TRUE; } return FALSE; } static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width , u_long operation, int pixel_width, volatile u_char ** target_buffer, int cols ) { u_long flag, flag2; struct meteor_pixfmt *pf = &pixfmt_table[ bktr->pixfmt ].public; u_int skip, start_skip; /* For RGB24, we need to align the component in FIFO Byte Lane 0 */ /* to the 1st byte in the mem dword containing our start addr. */ /* BTW, we know this pixfmt's 1st byte is Blue; thus the start addr */ /* must be Blue. */ start_skip = 0; if (( pf->type == METEOR_PIXTYPE_RGB ) && ( pf->Bpp == 3 )) switch ( ((u_long) *target_buffer) % 4 ) { case 2 : start_skip = 4 ; break; case 1 : start_skip = 8 ; break; } if ((width * pixel_width) < DMA_BT848_SPLIT ) { if ( width == cols) { flag = OP_SOL | OP_EOL; } else if (bktr->current_col == 0 ) { flag = OP_SOL; } else if (bktr->current_col == cols) { flag = OP_EOL; } else flag = 0; skip = 0; if (( flag & OP_SOL ) && ( start_skip > 0 )) { *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip; flag &= ~OP_SOL; skip = start_skip; } *(*dma_prog)++ = operation | flag | (width * pixel_width - skip); if (operation != OP_SKIP ) *(*dma_prog)++ = (u_long) *target_buffer; *target_buffer += width * pixel_width; bktr->current_col += width; } else { if (bktr->current_col == 0 && width == cols) { flag = OP_SOL ; flag2 = OP_EOL; } else if (bktr->current_col == 0 ) { flag = OP_SOL; flag2 = 0; } else if (bktr->current_col >= cols) { flag = 0; flag2 = OP_EOL; } else { flag = 0; flag2 = 0; } skip = 0; if (( flag & OP_SOL ) && ( start_skip > 0 )) { *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip; flag &= ~OP_SOL; skip = start_skip; } *(*dma_prog)++ = operation | flag | (width * pixel_width / 2 - skip); if (operation != OP_SKIP ) *(*dma_prog)++ = (u_long ) *target_buffer ; *target_buffer += (width * pixel_width / 2) ; if ( operation == OP_WRITE ) operation = OP_WRITEC; *(*dma_prog)++ = operation | flag2 | (width * pixel_width / 2); *target_buffer += (width * pixel_width / 2) ; bktr->current_col += width; } return TRUE; } static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ) { int i; bt848_ptr_t bt848; volatile u_long target_buffer, buffer, target,width; volatile u_long pitch; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; u_int Bpp = pf_int->public.Bpp; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; bt848->vbi_pack_size = 0; bt848->vbi_pack_del = 0; bt848->adc = SYNC_LEVEL; bt848->color_ctl_rgb_ded = 1; bt848->e_vscale_hi |= 0xc0; bt848->o_vscale_hi |= 0xc0; if (cols > 385 ) { bt848->e_vtc = 0; bt848->o_vtc = 0; } else { bt848->e_vtc = 1; bt848->o_vtc = 1; } bktr->capcontrol = 3 << 2 | 3; dma_prog = (u_long *) bktr->dma_prog; /* Construct Write */ if (bktr->video.addr) { target_buffer = (u_long) bktr->video.addr; pitch = bktr->video.width; } else { target_buffer = (u_long) vtophys(bktr->bigbuf); pitch = cols*Bpp; } buffer = target_buffer; /* contruct sync : for video packet format */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1; /* sync, mode indicator packed data */ *dma_prog++ = 0; /* NULL WORD */ width = cols; for (i = 0; i < (rows/interlace); i++) { target = target_buffer; if ( notclipped(bktr, i, width)) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } else { while(getline(bktr, i)) { if (bktr->y != bktr->y2 ) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } if (bktr->yclip != bktr->yclip2 ) { split(bktr,(volatile u_long **) &dma_prog, bktr->yclip2 - bktr->yclip, OP_SKIP, Bpp, (volatile u_char **) &target, cols); } } } target_buffer += interlace * pitch; } switch (i_flag) { case 1: /* sync vre */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { target_buffer = buffer + pitch; dma_prog = (u_long *) bktr->odd_dma_prog; /* sync vre IRQ bit */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1; *dma_prog++ = 0; /* NULL WORD */ width = cols; for (i = 0; i < (rows/interlace); i++) { target = target_buffer; if ( notclipped(bktr, i, width)) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } else { while(getline(bktr, i)) { if (bktr->y != bktr->y2 ) { split(bktr, (volatile u_long **) &dma_prog, bktr->y2 - bktr->y, OP_WRITE, Bpp, (volatile u_char **) &target, cols); } if (bktr->yclip != bktr->yclip2 ) { split(bktr, (volatile u_long **) &dma_prog, bktr->yclip2 - bktr->yclip, OP_SKIP, Bpp, (volatile u_char **) &target, cols); } } } target_buffer += interlace * pitch; } } /* sync vre IRQ bit */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ; *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ) { int i; volatile unsigned int inst; volatile unsigned int inst3; volatile u_long target_buffer, buffer; bt848_ptr_t bt848; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; int b; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; bt848->e_scloop |= BT848_E_SCLOOP_CAGC; /* enable chroma comb */ bt848->o_scloop |= BT848_O_SCLOOP_CAGC; bt848->color_ctl_rgb_ded = 1; bt848->color_ctl_gamma = 1; bt848->adc = SYNC_LEVEL; bktr->capcontrol = 1 << 6 | 1 << 4 | 1 << 2 | 3; bktr->capcontrol = 3 << 2 | 3; dma_prog = (u_long *) bktr->dma_prog; /* Construct Write */ /* write , sol, eol */ inst = OP_WRITE | OP_SOL | (cols); /* write , sol, eol */ inst3 = OP_WRITE | OP_EOL | (cols); if (bktr->video.addr) target_buffer = (u_long) bktr->video.addr; else target_buffer = (u_long) vtophys(bktr->bigbuf); buffer = target_buffer; /* contruct sync : for video packet format */ /* sync, mode indicator packed data */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1; *dma_prog++ = 0; /* NULL WORD */ b = cols; for (i = 0; i < (rows/interlace); i++) { *dma_prog++ = inst; *dma_prog++ = target_buffer; *dma_prog++ = inst3; *dma_prog++ = target_buffer + b; target_buffer += interlace*(cols * 2); } switch (i_flag) { case 1: /* sync vre */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: /* sync vro */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { target_buffer = (u_long) buffer + cols*2; dma_prog = (u_long * ) bktr->odd_dma_prog; /* sync vre */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_FM1; *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace) ; i++) { *dma_prog++ = inst; *dma_prog++ = target_buffer; *dma_prog++ = inst3; *dma_prog++ = target_buffer + b; target_buffer += interlace * ( cols*2); } } /* sync vro IRQ bit */ *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ){ int i; volatile unsigned int inst; volatile u_long target_buffer, t1, buffer; bt848_ptr_t bt848; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; dma_prog = (u_long *) bktr->dma_prog; bktr->capcontrol = 1 << 6 | 1 << 4 | 3; bt848->adc = SYNC_LEVEL; bt848->oform = 0x00; bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */ bt848->o_control |= BT848_O_CONTROL_LDEC; bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */ bt848->o_scloop |= BT848_O_SCLOOP_CAGC; bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */ bt848->o_vscale_hi &= ~0x80; bt848->e_vscale_hi |= 0x40; /* set chroma comb */ bt848->o_vscale_hi |= 0x40; /* disable gamma correction removal */ bt848->color_ctl_gamma = 1; /* Construct Write */ inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols); if (bktr->video.addr) target_buffer = (u_long) bktr->video.addr; else target_buffer = (u_long) vtophys(bktr->bigbuf); buffer = target_buffer; t1 = buffer; /* contruct sync : for video packet format */ *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/ *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace ) ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | cols/2 << 16; *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace; target_buffer += interlace*cols; } switch (i_flag) { case 1: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vre*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { dma_prog = (u_long * ) bktr->odd_dma_prog; target_buffer = (u_long) buffer + cols; t1 = buffer + cols/2; *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace ) ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | cols/2 << 16; *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace; target_buffer += interlace*cols; } } *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ; *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace ){ int i; volatile unsigned int inst; volatile unsigned int inst1; volatile u_long target_buffer, t1, buffer; bt848_ptr_t bt848; volatile u_long *dma_prog; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; bt848 = bktr->base; bt848->color_fmt = pf_int->color_fmt; dma_prog = (u_long *) bktr->dma_prog; bktr->capcontrol = 1 << 6 | 1 << 4 | 3; bt848->adc = SYNC_LEVEL; bt848->oform = 0x00; bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */ bt848->o_control |= BT848_O_CONTROL_LDEC; bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */ bt848->o_scloop |= BT848_O_SCLOOP_CAGC; bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */ bt848->o_vscale_hi &= ~0x80; bt848->e_vscale_hi |= 0x40; /* set chroma comb */ bt848->o_vscale_hi |= 0x40; /* disable gamma correction removal */ bt848->color_ctl_gamma = 1; /* Construct Write */ inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols); inst1 = OP_WRITES123 | OP_SOL | OP_EOL | (cols); if (bktr->video.addr) target_buffer = (u_long) bktr->video.addr; else target_buffer = (u_long) vtophys(bktr->bigbuf); buffer = target_buffer; t1 = buffer; *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/ *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < (rows/interlace )/2 ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace; target_buffer += interlace*cols; *dma_prog++ = inst1; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; target_buffer += interlace*cols; } switch (i_flag) { case 1: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 2: *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vro*/ *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); return; case 3: *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP ; *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog); break; } if (interlace == 2) { dma_prog = (u_long * ) bktr->odd_dma_prog; target_buffer = (u_long) buffer + cols; t1 = buffer + cols/2; *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; *dma_prog++ = 0; /* NULL WORD */ for (i = 0; i < ((rows/interlace )/2 ) ; i++) { *dma_prog++ = inst; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace; *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace; target_buffer += interlace*cols; *dma_prog++ = inst1; *dma_prog++ = cols/2 | (cols/2 << 16); *dma_prog++ = target_buffer; target_buffer += interlace*cols; } } *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE; *dma_prog++ = 0; /* NULL WORD */ *dma_prog++ = OP_JUMP; *dma_prog++ = (u_long ) vtophys(bktr->dma_prog); *dma_prog++ = 0; /* NULL WORD */ } /* * */ static void build_dma_prog( bktr_ptr_t bktr, char i_flag ) { int rows, cols, interlace; bt848_ptr_t bt848; int tmp_int; unsigned int temp; struct format_params *fp; struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ]; fp = &format_params[bktr->format_params]; bt848 = bktr->base; bt848->int_mask = ALL_INTS_DISABLED; /* disable FIFO & RISC, leave other bits alone */ bt848->gpio_dma_ctl &= ~FIFO_RISC_ENABLED; /* set video parameters */ temp = ((quad_t ) fp->htotal* (quad_t) fp->horizontal * 4096 / fp->vertical / bktr->cols) - 4096; bt848->e_hscale_lo = temp & 0xff; bt848->o_hscale_lo = temp & 0xff; bt848->e_hscale_hi = (temp >> 8) & 0xff; bt848->o_hscale_hi = (temp >> 8) & 0xff; /* horizontal active */ temp = bktr->cols; bt848->e_hactive_lo = temp & 0xff; bt848->o_hactive_lo = temp & 0xff; bt848->e_crop &= ~0x3; bt848->o_crop &= ~0x3; bt848->e_crop |= (temp >> 8) & 0x3; bt848->o_crop |= (temp >> 8) & 0x3; /* horizontal delay */ temp = (fp->hdelay * bktr->cols) / fp->hactive; temp = temp & 0x3fe; bt848->e_delay_lo = temp & 0xff; bt848->o_delay_lo = temp & 0xff; bt848->e_crop &= ~0xc; bt848->o_crop &= ~0xc; bt848->e_crop |= (temp >> 6) & 0xc; bt848->o_crop |= (temp >> 6) & 0xc; /* vertical scale */ if (bktr->flags & METEOR_ONLY_ODD_FIELDS || bktr->flags & METEOR_ONLY_EVEN_FIELDS) tmp_int = 65536 - (((fp->vactive * 256 + (bktr->rows/2)) / bktr->rows) - 512); else { tmp_int = 65536 - (((fp->vactive * 512 + (bktr->rows / 2)) / bktr->rows) - 512); } tmp_int &= 0x1fff; bt848->e_vscale_lo = tmp_int & 0xff; bt848->o_vscale_lo = tmp_int & 0xff; bt848->e_vscale_hi &= ~0x1f; bt848->o_vscale_hi &= ~0x1f; bt848->e_vscale_hi |= (tmp_int >> 8) & 0x1f; bt848->o_vscale_hi |= (tmp_int >> 8) & 0x1f; /* vertical active */ bt848->e_crop &= ~0x30; bt848->e_crop |= (fp->vactive >> 4) & 0x30; bt848->e_vactive_lo = fp->vactive & 0xff; bt848->o_crop &= ~0x30; bt848->o_crop |= (fp->vactive >> 4) & 0x30; bt848->o_vactive_lo = fp->vactive & 0xff; /* vertical delay */ bt848->e_vdelay_lo = fp->vdelay; bt848->o_vdelay_lo = fp->vdelay; /* end of video params */ /* capture control */ switch (i_flag) { case 1: bktr->bktr_cap_ctl = (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN); bt848->e_vscale_hi &= ~0x20; bt848->o_vscale_hi &= ~0x20; interlace = 1; break; case 2: bktr->bktr_cap_ctl = (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_ODD); bt848->e_vscale_hi &= ~0x20; bt848->o_vscale_hi &= ~0x20; interlace = 1; break; default: bktr->bktr_cap_ctl = (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN | BT848_CAP_CTL_ODD); bt848->e_vscale_hi |= 0x20; bt848->o_vscale_hi |= 0x20; interlace = 2; break; } bt848->risc_strt_add = vtophys(bktr->dma_prog); rows = bktr->rows; cols = bktr->cols; if ( pf_int->public.type == METEOR_PIXTYPE_RGB ) { rgb_prog(bktr, i_flag, cols, rows, interlace); return; } if ( pf_int->public.type == METEOR_PIXTYPE_YUV ) { yuv422_prog(bktr, i_flag, cols, rows, interlace); bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); return; } if ( pf_int->public.type == METEOR_PIXTYPE_YUV_PACKED ) { yuvpack_prog(bktr, i_flag, cols, rows, interlace); bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); return; } if ( pf_int->public.type == METEOR_PIXTYPE_YUV_12 ) { yuv12_prog(bktr, i_flag, cols, rows, interlace); bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt ); return; } return; } /****************************************************************************** * video & video capture specific routines: */ /* * */ static void start_capture( bktr_ptr_t bktr, unsigned type ) { bt848_ptr_t bt848; u_char i_flag; struct format_params *fp; fp = &format_params[bktr->format_params]; bt848 = bktr->base; bt848->dstatus = 0; bt848->int_stat = bt848->int_stat; bktr->flags |= type; bktr->flags &= ~METEOR_WANT_MASK; switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; i_flag = 1; break; case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; i_flag = 2; break; default: bktr->flags |= METEOR_WANT_MASK; i_flag = 3; break; } /* TDEC is only valid for continuous captures */ if ( type == METEOR_SINGLE ) { u_short fps_save = bktr->fps; set_fps(bktr, fp->frame_rate); bktr->fps = fps_save; } else set_fps(bktr, bktr->fps); if (bktr->dma_prog_loaded == FALSE) { build_dma_prog(bktr, i_flag); bktr->dma_prog_loaded = TRUE; } bt848->risc_strt_add = vtophys(bktr->dma_prog); } /* * */ static void set_fps( bktr_ptr_t bktr, u_short fps ) { bt848_ptr_t bt848; struct format_params *fp; int i_flag; fp = &format_params[bktr->format_params]; bt848 = bktr->base; switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) { case METEOR_ONLY_EVEN_FIELDS: bktr->flags |= METEOR_WANT_EVEN; i_flag = 1; break; case METEOR_ONLY_ODD_FIELDS: bktr->flags |= METEOR_WANT_ODD; i_flag = 1; break; default: bktr->flags |= METEOR_WANT_MASK; i_flag = 2; break; } bt848->gpio_dma_ctl = FIFO_RISC_DISABLED; bt848->int_stat = ALL_INTS_CLEARED; bktr->fps = fps; bt848->tdec = 0; if (fps < fp->frame_rate) bt848->tdec = i_flag*(fp->frame_rate - fps) & 0x3f; else bt848->tdec = 0; return; } /* * There is also a problem with range checking on the 7116. * It seems to only work for 22 bits, so the max size we can allocate * is 22 bits long or 4194304 bytes assuming that we put the beginning * of the buffer on a 2^24 bit boundary. The range registers will use * the top 8 bits of the dma start registers along with the bottom 22 * bits of the range register to determine if we go out of range. * This makes getting memory a real kludge. * */ #define RANGE_BOUNDARY (1<<22) static vm_offset_t get_bktr_mem( int unit, unsigned size ) { vm_offset_t addr = 0; addr = vm_page_alloc_contig(size, 0x100000, 0xffffffff, 1<<24); if (addr == 0) addr = vm_page_alloc_contig(size, 0x100000, 0xffffffff, PAGE_SIZE); if (addr == 0) { printf("bktr%d: Unable to allocate %d bytes of memory.\n", unit, size); } return( addr ); } /* * Given a pixfmt index, compute the bt848 swap_flags necessary to * achieve the specified swapping. * Note that without bt swapping, 2Bpp and 3Bpp modes are written * byte-swapped, and 4Bpp modes are byte and word swapped (see Table 6 * and read R->L). * Note also that for 3Bpp, we may additionally need to do some creative * SKIPing to align the FIFO bytelines with the target buffer (see split()). * This is abstracted here: e.g. no swaps = RGBA; byte & short swap = ABGR * as one would expect. */ static u_int pixfmt_swap_flags( int pixfmt ) { struct meteor_pixfmt *pf = &pixfmt_table[ pixfmt ].public; u_int swapf = 0; switch ( pf->Bpp ) { case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP ); break; case 3 : /* no swaps supported for 3bpp - makes no sense w/ bt848 */ break; case 4 : if ( pf->swap_bytes ) swapf = pf->swap_shorts ? 0 : WSWAP; else swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP); break; } return swapf; } /* * Converts meteor-defined pixel formats (e.g. METEOR_GEO_RGB16) into * our pixfmt_table indices. */ static int oformat_meteor_to_bt( u_long format ) { int i; struct meteor_pixfmt *pf1, *pf2; /* Find format in compatibility table */ for ( i = 0; i < METEOR_PIXFMT_TABLE_SIZE; i++ ) if ( meteor_pixfmt_table[i].meteor_format == format ) break; if ( i >= METEOR_PIXFMT_TABLE_SIZE ) return -1; pf1 = &meteor_pixfmt_table[i].public; /* Match it with an entry in master pixel format table */ for ( i = 0; i < PIXFMT_TABLE_SIZE; i++ ) { pf2 = &pixfmt_table[i].public; if (( pf1->type == pf2->type ) && ( pf1->Bpp == pf2->Bpp ) && !memcmp( pf1->masks, pf2->masks, sizeof( pf1->masks )) && ( pf1->swap_bytes == pf2->swap_bytes ) && ( pf1->swap_shorts == pf2->swap_shorts )) break; } if ( i >= PIXFMT_TABLE_SIZE ) return -1; return i; } /****************************************************************************** * i2c primitives: */ /* */ #define I2CBITTIME (0x5<<4) /* 5 * 0.48uS */ #define I2C_READ 0x01 #define I2C_COMMAND (I2CBITTIME | \ BT848_DATA_CTL_I2CSCL | \ BT848_DATA_CTL_I2CSDA) /* * */ static int i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 ) { u_long x; u_long data; bt848_ptr_t bt848; bt848 = bktr->base; /* clear status bits */ bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE); /* build the command datum */ data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND; if ( byte2 != -1 ) { data |= ((byte2 & 0xff) << 8); data |= BT848_DATA_CTL_I2CW3B; } /* write the address and data */ bt848->i2c_data_ctl = data; /* wait for completion */ for ( x = 0x7fffffff; x; --x ) { /* safety valve */ if ( bt848->int_stat & BT848_INT_I2CDONE ) break; } /* check for ACK */ if ( !x || !(bt848->int_stat & BT848_INT_RACK) ) return( -1 ); /* return OK */ return( 0 ); } /* * */ static int i2cRead( bktr_ptr_t bktr, int addr ) { u_long x; bt848_ptr_t bt848; bt848 = bktr->base; /* clear status bits */ bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE); /* write the READ address */ bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND; /* wait for completion */ for ( x = 0x7fffffff; x; --x ) { /* safety valve */ if ( bt848->int_stat & BT848_INT_I2CDONE ) break; } /* check for ACK */ if ( !x || !(bt848->int_stat & BT848_INT_RACK) ) return( -1 ); /* it was a read */ return( (bt848->i2c_data_ctl >> 8) & 0xff ); } #if defined( I2C_SOFTWARE_PROBE ) /* * we are keeping this around for any parts that we need to probe * but that CANNOT be probed via an i2c read. * this is necessary because the hardware i2c mechanism * cannot be programmed for 1 byte writes. * currently there are no known i2c parts that we need to probe * and that cannot be safely read. */ static int i2cProbe( bktr_ptr_t bktr, int addr ); #define BITD 40 #define EXTRA_START /* * probe for an I2C device at addr. */ static int i2cProbe( bktr_ptr_t bktr, int addr ) { int x, status; bt848_ptr_t bt848; bt848 = bktr->base; /* the START */ #if defined( EXTRA_START ) bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */ #endif /* EXTRA_START */ bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */ bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */ /* write addr */ for ( x = 7; x >= 0; --x ) { if ( addr & (1<i2c_data_ctl = 1; DELAY( BITD ); /* assert HI data */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */ bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */ } else { bt848->i2c_data_ctl = 0; DELAY( BITD ); /* assert LO data */ bt848->i2c_data_ctl = 2; DELAY( BITD ); /* strobe clock */ bt848->i2c_data_ctl = 0; DELAY( BITD ); /* release clock */ } } /* look for an ACK */ bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */ status = bt848->i2c_data_ctl & 1; /* read the ACK bit */ bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */ /* the STOP */ bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */ bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */ bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */ return( status ); } #undef EXTRA_START #undef BITD #endif /* I2C_SOFTWARE_PROBE */ /* * */ static int writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data ) { return( -1 ); } /* * */ static int readEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data ) { int x; int addr; int max; int byte; /* get the address of the EEProm */ addr = (int)(bktr->card.eepromAddr & 0xff); if ( addr == 0 ) return( -1 ); max = (int)(bktr->card.eepromSize * EEPROMBLOCKSIZE); if ( (offset + count) > max ) return( -1 ); /* set the start address */ if ( i2cWrite( bktr, addr, offset, -1 ) == -1 ) return( -1 ); /* the read cycle */ for ( x = 0; x < count; ++x ) { if ( (byte = i2cRead( bktr, (addr | 1) )) == -1 ) return( -1 ); data[ x ] = byte; } return( 0 ); } /****************************************************************************** * card probe */ /* * the recognized cards, used as indexes of several tables. * * if probeCard() fails to detect the proper card on boot you can * override it by setting the following define to the card you are using: * #define OVERRIDE_CARD * * where is one of the following card defines. */ #define CARD_UNKNOWN 0 #define CARD_MIRO 1 #define CARD_HAUPPAUGE 2 #define CARD_STB 3 #define CARD_INTEL 4 /* * the data for each type of card * * Note: * these entried MUST be kept in the order defined by the CARD_XXX defines! */ static const struct CARDTYPE cards[] = { /* CARD_UNKNOWN */ { "Unknown", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx unknown */ 0, 0, /* EEProm unknown */ 0, /* EEProm unknown */ { 0, 0, 0, 0, 0 } }, /* CARD_MIRO */ { "Miro TV", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx unknown */ 0, 0, /* EEProm unknown */ 0, /* size unknown */ { 0x02, 0x01, 0x00, 0x0a, 1 } }, /* XXX ??? */ /* CARD_HAUPPAUGE */ { "Hauppauge WinCast/TV", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx is optional */ 0, PFC8582_WADDR, /* EEProm type */ (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */ { 0x00, 0x02, 0x01, 0x01, 1 } }, /* audio MUX values */ /* CARD_STB */ { "STB TV/PCI", /* the 'name' */ NULL, /* the tuner */ 0, /* dbx is optional */ 0, X24C01_WADDR, /* EEProm type */ (u_char)(128 / EEPROMBLOCKSIZE), /* 128 bytes */ { 0x00, 0x01, 0x02, 0x02, 1 } }, /* audio MUX values */ /* CARD_INTEL */ - { "Intel Smart Video III", /* the 'name' */ + { "Intel Smart Video III/VideoLogic Captivator PCI", /* the 'name' */ NULL, /* the tuner */ 0, 0, 0, 0, { 0, 0, 0, 0, 0 } } }; /* * the data for each type of tuner * * if probeCard() fails to detect the proper tuner on boot you can * override it by setting the following define to the tuner present: * #define OVERRIDE_TUNER * * where is one of the following tuner defines. */ /* indexes into tuners[] */ #define NO_TUNER 0 #define TEMIC_NTSC 1 #define TEMIC_PAL 2 #define TEMIC_SECAM 3 #define PHILIPS_NTSC 4 #define PHILIPS_PAL 5 #define PHILIPS_SECAM 6 #define TEMIC_PALI 7 #define PHILIPS_PALI 8 #define PHILIPS_FR1236_NTSC 9 #define PHILIPS_FR1216_PAL 10 /* XXX FIXME: this list is incomplete */ /* input types */ #define TTYPE_XXX 0 #define TTYPE_NTSC 1 #define TTYPE_NTSC_J 2 #define TTYPE_PAL 3 #define TTYPE_PAL_M 4 #define TTYPE_PAL_N 5 #define TTYPE_SECAM 6 /** struct TUNER { char* name; u_char type; u_char pllAddr; u_char pllControl; u_char bandLimits[ 2 ]; u_char bandAddrs[ 3 ]; }; */ static const struct TUNER tuners[] = { /* XXX FIXME: fill in the band-switch crosspoints */ /* NO_TUNER */ { "", /* the 'name' */ TTYPE_XXX, /* input type */ 0x00, /* PLL write address */ { 0x00, /* control byte for PLL */ 0x00, 0x00, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x00, 0x00, 0x00,0x00} }, /* the band-switch values */ /* TEMIC_NTSC */ { "Temic NTSC", /* the 'name' */ TTYPE_NTSC, /* input type */ TEMIC_NTSC_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */ /* TEMIC_PAL */ { "Temic PAL", /* the 'name' */ TTYPE_PAL, /* input type */ TEMIC_PALI_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */ /* TEMIC_SECAM */ { "Temic SECAM", /* the 'name' */ TTYPE_SECAM, /* input type */ 0x00, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */ /* PHILIPS_NTSC */ { "Philips NTSC", /* the 'name' */ TTYPE_NTSC, /* input type */ PHILIPS_NTSC_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */ /* PHILIPS_PAL */ { "Philips PAL", /* the 'name' */ TTYPE_PAL, /* input type */ PHILIPS_PAL_WADDR, /* PLL write address */ { TSA552x_FCONTROL, /* control byte for PLL */ TSA552x_FCONTROL, TSA552x_FCONTROL, TSA552x_RADIO }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */ /* PHILIPS_SECAM */ { "Philips SECAM", /* the 'name' */ TTYPE_SECAM, /* input type */ 0x00, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, TSA552x_RADIO }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30,0xa4 } }, /* the band-switch values */ /* TEMIC_PAL I */ { "Temic PAL I", /* the 'name' */ TTYPE_PAL, /* input type */ TEMIC_PALI_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */ /* PHILIPS_PAL */ { "Philips PAL I", /* the 'name' */ TTYPE_PAL, /* input type */ TEMIC_PALI_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00 }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */ /* PHILIPS_FR1236_NTSC */ { "Philips FR1236 NTSC FM", /* the 'name' */ TTYPE_NTSC, /* input type */ PHILIPS_FR1236_NTSC_WADDR, /* PLL write address */ { TSA552x_SCONTROL, /* control byte for PLL */ TSA552x_SCONTROL, TSA552x_SCONTROL, 0x00}, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */ /* PHILIPS_FR1216_PAL */ { "Philips FR1216 PAL FM", /* the 'name' */ TTYPE_PAL, /* input type */ PHILIPS_FR1216_PAL_WADDR, /* PLL write address */ { TSA552x_FCONTROL, /* control byte for PLL */ TSA552x_FCONTROL, TSA552x_FCONTROL, TSA552x_RADIO }, { 0x00, 0x00 }, /* band-switch crosspoints */ { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */ }; /* * get a signature of the card * read all 128 possible i2c read addresses from 0x01 thru 0xff * build a bit array with a 1 bit for each i2c device that responds * * XXX FIXME: use offset & count args */ #define ABSENT (-1) static int signCard( bktr_ptr_t bktr, int offset, int count, u_char* sig ) { int x; for ( x = 0; x < 16; ++x ) sig[ x ] = 0; for ( x = 0; x < 128; ++x ) { if ( i2cRead( bktr, (2 * x) + 1 ) != ABSENT ) { sig[ x / 8 ] |= (1 << (x % 8) ); } } return( 0 ); } -#undef ABSENT +/* + * any_i2c_devices. + * Some BT848/BT848A cards have no tuner and no additional i2c devices + * eg stereo decoder. These are used for video conferencing or capture from + * a video camera. (VideoLogic Captivator PCI, Intel SmartCapture card). + * + * Determine if there are any i2c devices present. There are none present if + * a) reading from all 128 devices returns ABSENT (-1) for each one + * (eg VideoLogic Captivator PCI with BT848) + * b) reading from all 128 devices returns 0 for each one + * (eg VideoLogic Captivator PCI rev. 2F with BT848A) + */ +static int check_for_i2c_devices( bktr_ptr_t bktr ){ + int x, temp_read; + int i2c_all_0 = 1; + int i2c_all_absent = 1; + for ( x = 0; x < 128; ++x ) { + temp_read = i2cRead( bktr, (2 * x) + 1 ); + if (temp_read != 0) i2c_all_0 = 0; + if (temp_read != ABSENT) i2c_all_absent = 0; + } + + if ((i2c_all_0) || (i2c_all_absent)) return 0; + else return 1; +} +#undef ABSENT /* * determine the card brand/model + * OVERRIDE_CARD, OVERRIDE_TUNER, OVERRIDE_DBX and OVERRIDE_MSP + * can be used to select a specific device, regardless of the + * autodetection and i2c device checks. */ #define ABSENT (-1) static void probeCard( bktr_ptr_t bktr, int verbose ) { int card; int status; bt848_ptr_t bt848; + int any_i2c_devices; + any_i2c_devices = check_for_i2c_devices( bktr ); bt848 = bktr->base; + bt848->gpio_out_en = 0; + if (bootverbose) + printf("bktr: GPIO is 0x%08x\n", bt848->gpio_data); + #if defined( OVERRIDE_CARD ) bktr->card = cards[ (card = OVERRIDE_CARD) ]; goto checkTuner; #endif - bt848->gpio_out_en = 0; - if (bootverbose) - printf("bktr: GPIO is 0x%08x\n", bt848->gpio_data); + /* Check for i2c devices */ + if (!any_i2c_devices) { + bktr->card = cards[ (card = CARD_INTEL) ]; + goto checkTuner; + } /* look for a tuner */ if ( i2cRead( bktr, TSA552x_RADDR ) == ABSENT ) { bktr->card = cards[ (card = CARD_INTEL) ]; bktr->card.tuner = &tuners[ NO_TUNER ]; goto checkDBX; } /* look for a hauppauge card */ if ( (status = i2cRead( bktr, PFC8582_RADDR )) != ABSENT ) { bktr->card = cards[ (card = CARD_HAUPPAUGE) ]; goto checkTuner; } /* look for an STB card */ if ( (status = i2cRead( bktr, X24C01_RADDR )) != ABSENT ) { bktr->card = cards[ (card = CARD_STB) ]; goto checkTuner; } /* XXX FIXME: (how do I) look for a Miro card */ bktr->card = cards[ (card = CARD_MIRO) ]; checkTuner: #if defined( OVERRIDE_TUNER ) bktr->card.tuner = &tuners[ OVERRIDE_TUNER ]; goto checkDBX; #endif + /* Check for i2c devices */ + if (!any_i2c_devices) { + bktr->card.tuner = &tuners[ NO_TUNER ]; + goto checkDBX; + } + /* differentiate type of tuner */ switch (card) { case CARD_MIRO: switch (((bt848->gpio_data >> 10)-1)&7) { case 0: bktr->card.tuner = &tuners[ TEMIC_PAL ]; break; case 1: bktr->card.tuner = &tuners[ PHILIPS_PAL ]; break; case 2: bktr->card.tuner = &tuners[ PHILIPS_NTSC ]; break; case 3: bktr->card.tuner = &tuners[ PHILIPS_SECAM ]; break; case 4: bktr->card.tuner = &tuners[ NO_TUNER ]; break; case 5: bktr->card.tuner = &tuners[ PHILIPS_PALI ]; break; case 6: bktr->card.tuner = &tuners[ TEMIC_NTSC ]; break; case 7: bktr->card.tuner = &tuners[ TEMIC_PALI ]; break; } break; default: if ( i2cRead( bktr, TEMIC_NTSC_RADDR ) != ABSENT ) { bktr->card.tuner = &tuners[ TEMIC_NTSC ]; goto checkDBX; } if ( i2cRead( bktr, PHILIPS_NTSC_RADDR ) != ABSENT ) { bktr->card.tuner = &tuners[ PHILIPS_NTSC ]; goto checkDBX; } if ( card == CARD_HAUPPAUGE ) { if ( i2cRead( bktr, TEMIC_PALI_RADDR ) != ABSENT ) { bktr->card.tuner = &tuners[ TEMIC_PAL ]; goto checkDBX; } } /* no tuner found */ bktr->card.tuner = &tuners[ NO_TUNER ]; } checkDBX: #if defined( OVERRIDE_DBX ) bktr->card.dbx = OVERRIDE_DBX; - goto end; + goto checkMSP; #endif - /* probe for BTSC (dbx) chips */ + /* Check for i2c devices */ + if (!any_i2c_devices) { + goto checkMSP; + } + + /* probe for BTSC (dbx) chip */ if ( i2cRead( bktr, TDA9850_RADDR ) != ABSENT ) bktr->card.dbx = 1; + +checkMSP: +#if defined( OVERRIDE_MSP ) + bktr->card.msp3400c = OVERRIDE_MSP; + goto checkEnd; +#endif + /* Check for i2c devices */ + if (!any_i2c_devices) { + goto checkEnd; + } + if ( i2cRead( bktr, MSP3400C_RADDR ) != ABSENT ) bktr->card.msp3400c = 1; +checkEnd: + if ( verbose ) { printf( "%s", bktr->card.name ); if ( bktr->card.tuner ) printf( ", %s tuner", bktr->card.tuner->name ); if ( bktr->card.dbx ) printf( ", dbx stereo" ); if ( bktr->card.msp3400c ) printf( ", msp3400c stereo" ); printf( ".\n" ); } } #undef ABSENT /****************************************************************************** * tuner specific routines: */ /* scaling factor for frequencies expressed as ints */ #define FREQFACTOR 16 /* * Format: * entry 0: MAX legal channel * entry 1: IF frequency * expressed as fi{mHz} * 16, * eg 45.75mHz == 45.75 * 16 = 732 * entry 2: [place holder/future] * entry 3: base of channel record 0 * entry 3 + (x*3): base of channel record 'x' * entry LAST: NULL channel entry marking end of records * * Record: * int 0: base channel * int 1: frequency of base channel, * expressed as fb{mHz} * 16, * int 2: offset frequency between channels, * expressed as fo{mHz} * 16, */ /* * North American Broadcast Channels: * * 2: 55.25 mHz - 4: 67.25 mHz * 5: 77.25 mHz - 6: 83.25 mHz * 7: 175.25 mHz - 13: 211.25 mHz * 14: 471.25 mHz - 83: 885.25 mHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 static int nabcst[] = { 83, (int)( 45.75 * FREQFACTOR), 0, 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef OFFSET /* * North American Cable Channels, IRC: * * 2: 55.25 mHz - 4: 67.25 mHz * 5: 77.25 mHz - 6: 83.25 mHz * 7: 175.25 mHz - 13: 211.25 mHz * 14: 121.25 mHz - 22: 169.25 mHz * 23: 217.25 mHz - 94: 643.25 mHz * 95: 91.25 mHz - 99: 115.25 mHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 static int irccable[] = { 99, (int)( 45.75 * FREQFACTOR), 0, 95, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 23, (int)(217.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 14, (int)(121.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef OFFSET /* * North American Cable Channels, HRC: * * 2: 54 mHz - 4: 66 mHz * 5: 78 mHz - 6: 84 mHz * 7: 174 mHz - 13: 210 mHz * 14: 120 mHz - 22: 168 mHz * 23: 216 mHz - 94: 642 mHz * 95: 90 mHz - 99: 114 mHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 static int hrccable[] = { 99, (int)( 45.75 * FREQFACTOR), 0, 95, (int)( 90.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 23, (int)(216.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 14, (int)(120.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 5, (int)( 78.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 2, (int)( 54.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef OFFSET /* * Western European broadcast channels: * * (there are others that appear to vary between countries - rmt) * * here's the table Philips provides: * caution, some of the offsets don't compute... * * 1 4525 700 N21 * * 2 4825 700 E2 * 3 5525 700 E3 * 4 6225 700 E4 * * 5 17525 700 E5 * 6 18225 700 E6 * 7 18925 700 E7 * 8 19625 700 E8 * 9 20325 700 E9 * 10 21025 700 E10 * 11 21725 700 E11 * 12 22425 700 E12 * * 13 5375 700 ITA * 14 6225 700 ITB * * 15 8225 700 ITC * * 16 17525 700 ITD * 17 18325 700 ITE * * 18 19225 700 ITF * 19 20125 700 ITG * 20 21025 700 ITH * * 21 47125 800 E21 * 22 47925 800 E22 * 23 48725 800 E23 * 24 49525 800 E24 * 25 50325 800 E25 * 26 51125 800 E26 * 27 51925 800 E27 * 28 52725 800 E28 * 29 53525 800 E29 * 30 54325 800 E30 * 31 55125 800 E31 * 32 55925 800 E32 * 33 56725 800 E33 * 34 57525 800 E34 * 35 58325 800 E35 * 36 59125 800 E36 * 37 59925 800 E37 * 38 60725 800 E38 * 39 61525 800 E39 * 40 62325 800 E40 * 41 63125 800 E41 * 42 63925 800 E42 * 43 64725 800 E43 * 44 65525 800 E44 * 45 66325 800 E45 * 46 67125 800 E46 * 47 67925 800 E47 * 48 68725 800 E48 * 49 69525 800 E49 * 50 70325 800 E50 * 51 71125 800 E51 * 52 71925 800 E52 * 53 72725 800 E53 * 54 73525 800 E54 * 55 74325 800 E55 * 56 75125 800 E56 * 57 75925 800 E57 * 58 76725 800 E58 * 59 77525 800 E59 * 60 78325 800 E60 * 61 79125 800 E61 * 62 79925 800 E62 * 63 80725 800 E63 * 64 81525 800 E64 * 65 82325 800 E65 * 66 83125 800 E66 * 67 83925 800 E67 * 68 84725 800 E68 * 69 85525 800 E69 * * 70 4575 800 IA * 71 5375 800 IB * 72 6175 800 IC * * 74 6925 700 S01 * 75 7625 700 S02 * 76 8325 700 S03 * * 80 10525 700 S1 * 81 11225 700 S2 * 82 11925 700 S3 * 83 12625 700 S4 * 84 13325 700 S5 * 85 14025 700 S6 * 86 14725 700 S7 * 87 15425 700 S8 * 88 16125 700 S9 * 89 16825 700 S10 * 90 23125 700 S11 * 91 23825 700 S12 * 92 24525 700 S13 * 93 25225 700 S14 * 94 25925 700 S15 * 95 26625 700 S16 * 96 27325 700 S17 * 97 28025 700 S18 * 98 28725 700 S19 * 99 29425 700 S20 * * * Channels S21 - S41 are taken from * http://gemma.apple.com:80/dev/technotes/tn/tn1012.html * * 100 30325 800 S21 * 101 31125 800 S22 * 102 31925 800 S23 * 103 32725 800 S24 * 104 33525 800 S25 * 105 34325 800 S26 * 106 35125 800 S27 * 107 35925 800 S28 * 108 36725 800 S29 * 109 37525 800 S30 * 110 38325 800 S31 * 111 39125 800 S32 * 112 39925 800 S33 * 113 40725 800 S34 * 114 41525 800 S35 * 115 42325 800 S36 * 116 43125 800 S37 * 117 43925 800 S38 * 118 44725 800 S39 * 119 45525 800 S40 * 120 46325 800 S41 * * 121 3890 000 IFFREQ * */ static int weurope[] = { 121, (int)( 38.90 * FREQFACTOR), 0, 100, (int)(303.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 90, (int)(231.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 80, (int)(105.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 74, (int)( 69.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR), 17, (int)(183.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR), 16, (int)(175.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR), 15, (int)(82.25 * FREQFACTOR), (int)(8.50 * FREQFACTOR), 13, (int)(53.75 * FREQFACTOR), (int)(8.50 * FREQFACTOR), 5, (int)(175.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 2, (int)(48.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR), 0 }; /* * Japanese Broadcast Channels: * * 1: 91.25MHz - 3: 103.25MHz * 4: 171.25MHz - 7: 189.25MHz * 8: 193.25MHz - 12: 217.25MHz (VHF) * 13: 471.25MHz - 62: 765.25MHz (UHF) * * IF freq: 45.75 mHz * OR * IF freq: 58.75 mHz */ #define OFFSET 6.00 #define IF_FREQ 45.75 static int jpnbcst[] = { 62, (int)(IF_FREQ * FREQFACTOR), 0, 13, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef IF_FREQ #undef OFFSET /* * Japanese Cable Channels: * * 1: 91.25MHz - 3: 103.25MHz * 4: 171.25MHz - 7: 189.25MHz * 8: 193.25MHz - 12: 217.25MHz * 13: 109.25MHz - 21: 157.25MHz * 22: 165.25MHz * 23: 223.25MHz - 63: 463.25MHz * * IF freq: 45.75 mHz */ #define OFFSET 6.00 #define IF_FREQ 45.75 static int jpncable[] = { 63, (int)(IF_FREQ * FREQFACTOR), 0, 23, (int)(223.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 22, (int)(165.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 13, (int)(109.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR), 0 }; #undef IF_FREQ #undef OFFSET static int* freqTable[] = { NULL, nabcst, irccable, hrccable, weurope, jpnbcst, jpncable }; #define TBL_CHNL freqTable[ bktr->tuner.chnlset ][ x ] #define TBL_BASE_FREQ freqTable[ bktr->tuner.chnlset ][ x + 1 ] #define TBL_OFFSET freqTable[ bktr->tuner.chnlset ][ x + 2 ] static int frequency_lookup( bktr_ptr_t bktr, int channel ) { int x; /* check for "> MAX channel" */ x = 0; if ( channel > TBL_CHNL ) return( -1 ); /* search the table for data */ for ( x = 3; TBL_CHNL; x += 3 ) { if ( channel >= TBL_CHNL ) { return( TBL_BASE_FREQ + ((channel - TBL_CHNL) * TBL_OFFSET) ); } } /* not found, must be below the MIN channel */ return( -1 ); } #undef TBL_OFFSET #undef TBL_BASE_FREQ #undef TBL_CHNL #define TBL_IF freqTable[ bktr->tuner.chnlset ][ 1 ] /* * set the frequency of the tuner */ static int tv_freq( bktr_ptr_t bktr, int frequency ) { const struct TUNER* tuner; u_char addr; u_char control; u_char band; int N; tuner = bktr->card.tuner; if ( tuner == NULL ) return( -1 ); /* * select the band based on frequency * XXX FIXME: get the cross-over points from the tuner struct */ if ( frequency < (160 * FREQFACTOR) ) N = 0; else if ( frequency < (454 * FREQFACTOR) ) N = 1; else N = 2; if(frequency > RADIO_OFFSET) { N=3; frequency -= RADIO_OFFSET; } /* set the address of the PLL */ addr = tuner->pllAddr; control = tuner->pllControl[ N ]; band = tuner->bandAddrs[ N ]; if(!(band && control)) /* Don't try to set un- */ return(-1); /* supported modes. */ if(N==3) band |= bktr->tuner.radio_mode; /* * N = 16 * { fRF(pc) + fIF(pc) } * where: * pc is picture carrier, fRF & fIF are in mHz * * frequency was passed in as mHz * 16 */ #if defined( TEST_TUNER_AFC ) if ( bktr->tuner.afc ) frequency -= 4; #endif N = frequency + TBL_IF; if ( frequency > bktr->tuner.frequency ) { i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); i2cWrite( bktr, addr, control, band ); } else { i2cWrite( bktr, addr, control, band ); i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); } #if defined( TUNER_AFC ) if ( bktr->tuner.afc == TRUE ) { if ( (N = do_afc( bktr, addr, N )) < 0 ) { /* AFC failed, restore requested frequency */ N = frequency + TBL_IF; i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff ); } else frequency = N - TBL_IF; } #endif /* TUNER_AFC */ /* update frequency */ bktr->tuner.frequency = frequency; return( 0 ); } #if defined( TUNER_AFC ) /* * */ static int do_afc( bktr_ptr_t bktr, int addr, int frequency ) { int step; int status; int origFrequency; origFrequency = frequency; /* wait for first setting to take effect */ tsleep( (caddr_t)bktr, PZERO, "tuning", hz/8 ); if ( (status = i2cRead( bktr, addr + 1 )) < 0 ) return( -1 ); #if defined( TEST_TUNER_AFC ) printf( "\nOriginal freq: %d, status: 0x%02x\n", frequency, status ); #endif for ( step = 0; step < AFC_MAX_STEP; ++step ) { if ( (status = i2cRead( bktr, addr + 1 )) < 0 ) goto fubar; if ( !(status & 0x40) ) { #if defined( TEST_TUNER_AFC ) printf( "no lock!\n" ); #endif goto fubar; } switch( status & AFC_BITS ) { case AFC_FREQ_CENTERED: #if defined( TEST_TUNER_AFC ) printf( "Centered, freq: %d, status: 0x%02x\n", frequency, status ); #endif return( frequency ); case AFC_FREQ_MINUS_125: case AFC_FREQ_MINUS_62: #if defined( TEST_TUNER_AFC ) printf( "Low, freq: %d, status: 0x%02x\n", frequency, status ); #endif --frequency; break; case AFC_FREQ_PLUS_62: case AFC_FREQ_PLUS_125: #if defined( TEST_TUNER_AFC ) printf( "Hi, freq: %d, status: 0x%02x\n", frequency, status ); #endif ++frequency; break; } i2cWrite( bktr, addr, (frequency>>8) & 0x7f, frequency & 0xff ); DELAY( AFC_DELAY ); } fubar: i2cWrite( bktr, addr, (origFrequency>>8) & 0x7f, origFrequency & 0xff ); return( -1 ); } #endif /* TUNER_AFC */ #undef TBL_IF /* * set the channel of the tuner */ static int tv_channel( bktr_ptr_t bktr, int channel ) { int frequency; /* calculate the frequency according to tuner type */ if ( (frequency = frequency_lookup( bktr, channel )) < 0 ) return( -1 ); /* set the new frequency */ if ( tv_freq( bktr, frequency ) < 0 ) return( -1 ); /* OK to update records */ return( (bktr->tuner.channel = channel) ); } /****************************************************************************** * audio specific routines: */ /* * */ #define AUDIOMUX_DISCOVER_NOT static int set_audio( bktr_ptr_t bktr, int cmd ) { bt848_ptr_t bt848; u_long temp; volatile u_char idx; #if defined( AUDIOMUX_DISCOVER ) if ( cmd >= 200 ) cmd -= 200; else #endif /* AUDIOMUX_DISCOVER */ /* check for existance of audio MUXes */ if ( !bktr->card.audiomuxs[ 4 ] ) return( -1 ); switch (cmd) { case AUDIO_TUNER: #ifdef BKTR_REVERSEMUTE bktr->audio_mux_select = 3; #else bktr->audio_mux_select = 0; #endif break; case AUDIO_EXTERN: bktr->audio_mux_select = 1; break; case AUDIO_INTERN: bktr->audio_mux_select = 2; break; case AUDIO_MUTE: bktr->audio_mute_state = TRUE; /* set mute */ break; case AUDIO_UNMUTE: bktr->audio_mute_state = FALSE; /* clear mute */ break; default: printf("bktr: audio cmd error %02x\n", cmd); return( -1 ); } bt848 = bktr->base; /* * Leave the upper bits of the GPIO port alone in case they control * something like the dbx or teletext chips. This doesn't guarantee * success, but follows the rule of least astonishment. */ /* XXX FIXME: this was an 8 bit reference before new struct ??? */ bt848->gpio_reg_inp = (~GPIO_AUDIOMUX_BITS & 0xff); if ( bktr->audio_mute_state == TRUE ) #ifdef BKTR_REVERSEMUTE idx = 0; #else idx = 3; #endif else idx = bktr->audio_mux_select; temp = bt848->gpio_data & ~GPIO_AUDIOMUX_BITS; bt848->gpio_data = #if defined( AUDIOMUX_DISCOVER ) bt848->gpio_data = temp | (cmd & 0xff); printf("cmd: %d\n", cmd ); #else temp | bktr->card.audiomuxs[ idx ]; #endif /* AUDIOMUX_DISCOVER */ return( 0 ); } /* * */ static void temp_mute( bktr_ptr_t bktr, int flag ) { static int muteState = FALSE; if ( flag == TRUE ) { muteState = bktr->audio_mute_state; set_audio( bktr, AUDIO_MUTE ); /* prevent 'click' */ } else { tsleep( (caddr_t)bktr, PZERO, "tuning", hz/8 ); if ( muteState == FALSE ) set_audio( bktr, AUDIO_UNMUTE ); } } /* * setup the dbx chip * XXX FIXME: alot of work to be done here, this merely unmutes it. */ static int set_BTSC( bktr_ptr_t bktr, int control ) { return( i2cWrite( bktr, TDA9850_WADDR, CON3ADDR, control ) ); } /****************************************************************************** * magic: */ #ifdef __FreeBSD__ static bktr_devsw_installed = 0; static void bktr_drvinit( void *unused ) { dev_t dev; if ( ! bktr_devsw_installed ) { dev = makedev(CDEV_MAJOR, 0); cdevsw_add(&dev,&bktr_cdevsw, NULL); bktr_devsw_installed = 1; } } SYSINIT(bktrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,bktr_drvinit,NULL) #endif /* __FreeBSD__ */ #endif /* !defined(__FreeBSD__) || (NBKTR > 0 && NPCI > 0) */ /* Local Variables: */ /* mode: C */ /* c-indent-level: 8 */ /* c-brace-offset: -8 */ /* c-argdecl-indent: 8 */ /* c-label-offset: -8 */ /* c-continued-statement-offset: 8 */ /* c-tab-always-indent: nil */ /* tab-width: 8 */ /* End: */