diff --git a/sys/i386/scsi/aic7xxx.c b/sys/i386/scsi/aic7xxx.c index 9cc35bd2bd88..e3a04406533b 100644 --- a/sys/i386/scsi/aic7xxx.c +++ b/sys/i386/scsi/aic7xxx.c @@ -1,2396 +1,2401 @@ /* * Generic driver for the aic7xxx based adaptec SCSI controllers * Copyright (c) 1994, 1995, 1996 Justin T. Gibbs. * All rights reserved. * * Product specific probe and attach routines can be found in: * i386/eisa/aic7770.c 27/284X and aic7770 motherboard controllers * pci/aic7870.c 3940, 2940, aic7870 and aic7850 controllers * * Portions of this driver are based on the FreeBSD 1742 Driver: * * Written by Julian Elischer (julian@tfs.com) * for TRW Financial Systems for use under the MACH(2.5) operating system. * * TRW Financial Systems, in accordance with their agreement with Carnegie * Mellon University, makes this software available to CMU to distribute * or use in any manner that they see fit as long as this message is kept with * the software. For this reason TFS also grants any other persons or * organisations permission to use or modify this software. * * TFS supplies this software to be publicly redistributed * on the understanding that TFS is not responsible for the correct * functioning of this software in any circumstances. * * commenced: Sun Sep 27 18:14:01 PDT 1992 * - * $Id: aic7xxx.c,v 1.54 1996/01/23 21:47:50 se Exp $ + * $Id: aic7xxx.c,v 1.55 1996/01/29 03:17:37 gibbs Exp $ */ /* * TODO: * Implement Target Mode * */ #include #include #include #include #include #include #include #include #include #include #include #include #include #define PAGESIZ 4096 #define MAX_TAGS 4; #include #define KVTOPHYS(x) vtophys(x) #define MIN(a,b) ((a < b) ? a : b) #define ALL_TARGETS -1 u_long ahc_unit = 0; static int ahc_debug = AHC_SHOWABORTS|AHC_SHOWMISC; /**** bit definitions for SCSIDEF ****/ #define HSCSIID 0x07 /* our SCSI ID */ #define HWSCSIID 0x0f /* our SCSI ID if Wide Bus */ -typedef enum { - list_head, - list_second, -}insert_t; - -static u_int32 ahc_adapter_info __P((int unit)); -static void ahcminphys __P((struct buf *bp)); -static int32 ahc_scsi_cmd __P((struct scsi_xfer *xs)); +static u_int32_t ahc_adapter_info __P((int unit)); +static void ahcminphys __P((struct buf *bp)); +static int32_t ahc_scsi_cmd __P((struct scsi_xfer *xs)); static struct scsi_adapter ahc_switch = { ahc_scsi_cmd, ahcminphys, 0, 0, ahc_adapter_info, "ahc", { 0, 0 } }; /* the below structure is so we have a default dev struct for our link struct */ static struct scsi_device ahc_dev = { NULL, /* Use default error handler */ NULL, /* have a queue, served by this */ NULL, /* have no async handler */ NULL, /* Use default 'done' routine */ "ahc", 0, { 0, 0 } }; /* * Since the sequencer can disable pausing in a critical section, we * must loop until it actually stops. * XXX Should add a timeout in here?? */ #define PAUSE_SEQUENCER(ahc) \ outb(HCNTRL + ahc->baseport, ahc->pause); \ \ while ((inb(HCNTRL + ahc->baseport) & PAUSE) == 0) \ ; #define UNPAUSE_SEQUENCER(ahc) \ outb( HCNTRL + ahc->baseport, ahc->unpause ) /* * Restart the sequencer program from address zero */ #define RESTART_SEQUENCER(ahc) \ do { \ outb( SEQCTL + ahc->baseport, SEQRESET|FASTMODE ); \ } while (inb(SEQADDR0 + ahc->baseport) != 0 && \ inb(SEQADDR1 + ahc->baseport != 0)); \ \ UNPAUSE_SEQUENCER(ahc); static u_char ahc_abort_wscb __P((struct ahc_data *ahc, struct scb *scbp, u_char prev, u_long iobase, - u_char timedout_scb, u_int32 xs_error)); -static void ahc_add_waiting_scb __P((u_long iobase, struct scb *scb, - insert_t where)); + u_char timedout_scb, u_int32_t xs_error)); +static void ahc_add_waiting_scb __P((u_long iobase, struct scb *scb)); static void ahc_done __P((struct ahc_data *ahc, struct scb *scbp)); static void ahc_free_scb __P((struct ahc_data *ahc, struct scb *scb, int flags)); -static inline void ahc_getscb __P((struct ahc_data *ahc, struct scb *scb, +static inline void ahc_fetch_scb __P((struct ahc_data *ahc, struct scb *scb, int iosize)); static struct scb * ahc_get_scb __P((struct ahc_data *ahc, int flags)); static void ahc_loadseq __P((u_long iobase)); static int ahc_match_scb __P((struct scb *scb, int target, char channel)); static int ahc_poll __P((struct ahc_data *ahc, int wait)); #ifdef AHC_DEBUG static void ahc_print_active_scb __P((struct ahc_data *ahc)); static void ahc_print_scb __P((struct scb *scb)); #endif static int ahc_reset_channel __P((struct ahc_data *ahc, char channel, - u_char timedout_scb, u_int32 xs_error)); + u_char timedout_scb, u_int32_t xs_error, + u_char initiate_reset)); static int ahc_reset_device __P((struct ahc_data *ahc, int target, char channel, u_char timedout_scb, - u_int32 xs_error)); + u_int32_t xs_error)); static void ahc_reset_current_bus __P((u_long iobase)); -static void ahc_scb_timeout __P((struct ahc_data *ahc, struct scb *scb)); +static void ahc_run_done_queue __P((struct ahc_data *ahc)); static void ahc_scsirate __P((struct ahc_data* ahc, u_char *scsirate, int period, int offset, int target)); -static inline void ahc_send_scb __P((struct ahc_data *ahc, struct scb *scb, - int iosize)); +static inline void ahc_send_scb __P((struct ahc_data *ahc, struct scb *scb)); static timeout_t ahc_timeout; static void ahc_busy_target __P((int target, char channel, u_long iobase)); static void ahc_unbusy_target __P((int target, char channel, u_long iobase)); #ifdef AHC_DEBUG static void ahc_print_scb(scb) struct scb *scb; { printf("scb:%p control:0x%x tcl:0x%x cmdlen:%d cmdpointer:0x%lx\n" ,scb ,scb->control ,scb->target_channel_lun ,scb->cmdlen ,scb->cmdpointer ); printf(" datlen:%d data:0x%lx segs:0x%x segp:0x%lx\n" ,scb->datalen ,scb->data ,scb->SG_segment_count ,scb->SG_list_pointer); printf(" sg_addr:%lx sg_len:%ld\n" ,scb->ahc_dma[0].addr ,scb->ahc_dma[0].len); } static void ahc_print_active_scb(ahc) struct ahc_data *ahc; { int cur_scb_offset; u_long iobase = ahc->baseport; PAUSE_SEQUENCER(ahc); cur_scb_offset = inb(SCBPTR + iobase); UNPAUSE_SEQUENCER(ahc); ahc_print_scb(ahc->scbarray[cur_scb_offset]); } #endif #define PARERR 0x08 #define ILLOPCODE 0x04 #define ILLSADDR 0x02 #define ILLHADDR 0x01 static struct { u_char errno; char *errmesg; } hard_error[] = { { ILLHADDR, "Illegal Host Access" }, { ILLSADDR, "Illegal Sequencer Address referrenced" }, { ILLOPCODE, "Illegal Opcode in sequencer program" }, { PARERR, "Sequencer Ram Parity Error" } }; /* * Valid SCSIRATE values. (p. 3-17) * Provides a mapping of tranfer periods in ns to the proper value to * stick in the scsiscfr reg to use that transfer rate. */ static struct { short sxfr; /* Rates in Ultra mode have bit 8 of sxfr set */ #define ULTRA_SXFR 0x100 short period; /* in ns */ char *rate; } ahc_syncrates[] = { { 0x100, 50, "20.0" }, { 0x110, 62, "16.0" }, { 0x120, 75, "13.4" }, { 0x140, 100, "10.0" }, { 0x000, 100, "10.0" }, { 0x010, 125, "8.0" }, { 0x020, 150, "6.67" }, { 0x030, 175, "5.7" }, { 0x040, 200, "5.0" }, { 0x050, 225, "4.4" }, { 0x060, 250, "4.0" }, { 0x070, 275, "3.6" } }; static int ahc_num_syncrates = sizeof(ahc_syncrates) / sizeof(ahc_syncrates[0]); /* * Allocate a controller structures for a new device and initialize it. * ahc_reset should be called before now since we assume that the card * is paused. * */ struct ahc_data * ahc_alloc(unit, iobase, type, flags) int unit; u_long iobase; ahc_type type; ahc_flag flags; { /* * find unit and check we have that many defined */ struct ahc_data *ahc; /* * Allocate a storage area for us */ ahc = malloc(sizeof(struct ahc_data), M_TEMP, M_NOWAIT); if (!ahc) { printf("ahc%d: cannot malloc!\n", unit); return NULL; } bzero(ahc, sizeof(struct ahc_data)); ahc->unit = unit; ahc->baseport = iobase; ahc->type = type; ahc->flags = flags; ahc->unpause = (inb(HCNTRL + iobase) & IRQMS) | INTEN; ahc->pause = ahc->unpause | PAUSE; return (ahc); } void ahc_free(ahc) struct ahc_data *ahc; { free(ahc, M_DEVBUF); return; } void ahc_reset(iobase) u_long iobase; { u_char hcntrl; int wait; /* Retain the IRQ type accross the chip reset */ hcntrl = (inb(HCNTRL + iobase) & IRQMS) | INTEN; outb(HCNTRL + iobase, CHIPRST | PAUSE); /* * Ensure that the reset has finished */ wait = 1000; while (wait--) { DELAY(1000); if(!(inb(HCNTRL + iobase) & CHIPRST)) break; } if(wait == 0) { printf("ahc at 0x%lx: WARNING - Failed chip reset! " "Trying to initialize anyway.\n", iobase); } outb(HCNTRL + iobase, hcntrl | PAUSE); } /* * Look up the valid period to SCSIRATE conversion in our table. */ static void ahc_scsirate(ahc, scsirate, period, offset, target ) struct ahc_data *ahc; u_char *scsirate; short period; u_char offset; int target; { int i; for (i = 0; i < ahc_num_syncrates; i++) { if ((ahc_syncrates[i].period - period) >= 0) { /* * Watch out for Ultra speeds when ultra is not * enabled and vice-versa. */ if (ahc->type & AHC_ULTRA) { if (!(ahc_syncrates[i].sxfr & ULTRA_SXFR)) { printf("ahc%d: target %d requests " "%sMHz transfers, but adapter " "in Ultra mode can only sync at " "10MHz or above\n", ahc->unit, target, ahc_syncrates[i].rate); break; /* Use Async */ } } else { if (ahc_syncrates[i].sxfr & ULTRA_SXFR) { /* * This should only happen if the * drive is the first to negotiate * and chooses a high rate. We'll * just move down the table util * we hit a non ultra speed. */ continue; } } *scsirate = (ahc_syncrates[i].sxfr) | (offset & 0x0f); if(bootverbose) { printf("ahc%d: target %d synchronous at %sMHz," " offset = 0x%x\n", ahc->unit, target, ahc_syncrates[i].rate, offset ); } return; } } /* Default to asyncronous transfers. Also reject this SDTR request. */ *scsirate = 0; if(bootverbose) { printf("ahc%d: target %d using asyncronous transfers\n", ahc->unit, target ); } } /* * Attach all the sub-devices we can find */ int ahc_attach(ahc) struct ahc_data *ahc; { struct scsibus_data *scbus; /* * fill in the prototype scsi_link. */ ahc->sc_link.adapter_unit = ahc->unit; ahc->sc_link.adapter_targ = ahc->our_id; ahc->sc_link.adapter_softc = ahc; ahc->sc_link.adapter = &ahc_switch; ahc->sc_link.opennings = 2; ahc->sc_link.device = &ahc_dev; ahc->sc_link.flags = DEBUGLEVEL; ahc->sc_link.fordriver = 0; /* * Prepare the scsibus_data area for the upperlevel * scsi code. */ scbus = scsi_alloc_bus(); if(!scbus) return 0; scbus->adapter_link = &ahc->sc_link; if(ahc->type & AHC_WIDE) scbus->maxtarg = 15; /* * ask the adapter what subunits are present */ if(bootverbose) printf("ahc%d: Probing channel A\n", ahc->unit); scsi_attachdevs(scbus); scbus = NULL; /* Upper-level SCSI code owns this now */ if(ahc->type & AHC_TWIN) { /* Configure the second scsi bus */ ahc->sc_link_b = ahc->sc_link; ahc->sc_link_b.adapter_targ = ahc->our_id_b; ahc->sc_link_b.adapter_bus = 1; ahc->sc_link_b.fordriver = (void *)SELBUSB; scbus = scsi_alloc_bus(); if(!scbus) return 0; scbus->adapter_link = &ahc->sc_link_b; if(ahc->type & AHC_WIDE) scbus->maxtarg = 15; if(bootverbose) printf("ahc%d: Probing Channel B\n", ahc->unit); scsi_attachdevs(scbus); scbus = NULL; /* Upper-level SCSI code owns this now */ } return 1; } /* Send an SCB down to the card via PIO maintaining the SCB pointer */ static inline void -ahc_send_scb(ahc, scb, iosize) +ahc_send_scb(ahc, scb) struct ahc_data *ahc; struct scb *scb; - int iosize; /* In bytes */ { u_long iobase = ahc->baseport; u_char cur_scb; cur_scb = inb(SCBPTR + iobase); outb(SCBPTR + iobase, scb->position); outb(SCBCNT + iobase, SCBAUTO); if( ahc->type == AHC_284 ) /* Can only do 8bit PIO */ - outsb(SCBARRAY+iobase, scb, iosize); + outsb(SCBARRAY+iobase, scb, SCB_PIO_TRANSFER_SIZE); else - outsl(SCBARRAY+iobase, scb, (iosize + 3) / 4); + outsl(SCBARRAY+iobase, scb, + (SCB_PIO_TRANSFER_SIZE + 3) / 4); outb(SCBCNT + iobase, 0); outb(SCBPTR + iobase, cur_scb); } static inline void -ahc_getscb(ahc, scb, iosize) +ahc_fetch_scb(ahc, scb, iosize) struct ahc_data *ahc; struct scb *scb; int iosize; { u_long iobase = ahc->baseport; outb(SCBCNT + iobase, 0x80); /* SCBAUTO */ /* Can only do 8bit PIO for reads */ insb(SCBARRAY+iobase, scb, iosize); outb(SCBCNT + iobase, 0); } /* - * Add this SCB to the "waiting for selection" list. + * Add this SCB to the head of the "waiting for selection" list. */ static -void ahc_add_waiting_scb (iobase, scb, where) +void ahc_add_waiting_scb (iobase, scb) u_long iobase; struct scb *scb; - insert_t where; { - u_char head, tail; + u_char next; u_char curscb; curscb = inb(SCBPTR + iobase); - head = inb(WAITING_SCBH + iobase); - if(head == SCB_LIST_NULL) { - /* List was empty */ - head = scb->position; - tail = SCB_LIST_NULL; - } - else if (where == list_head) { - outb(SCBPTR+iobase, scb->position); - outb(SCB_NEXT_WAITING+iobase, head); - head = scb->position; - } - else /*where == list_second*/ { - u_char third_scb; - outb(SCBPTR+iobase, head); - third_scb = inb(SCB_NEXT_WAITING+iobase); - outb(SCB_NEXT_WAITING+iobase,scb->position); - outb(SCBPTR+iobase, scb->position); - outb(SCB_NEXT_WAITING+iobase,third_scb); - } - outb(WAITING_SCBH + iobase, head); + next = inb(WAITING_SCBH + iobase); + + outb(SCBPTR+iobase, scb->position); + outb(SCB_NEXT_WAITING+iobase, next); + outb(WAITING_SCBH + iobase, scb->position); + outb(SCBPTR + iobase, curscb); } /* - * Catch an interrupt from the adaptor + * Catch an interrupt from the adapter */ void ahc_intr(arg) void *arg; { int intstat; u_char status; u_long iobase; struct scb *scb = NULL; struct scsi_xfer *xs = NULL; struct ahc_data *ahc = (struct ahc_data *)arg; iobase = ahc->baseport; intstat = inb(INTSTAT + iobase); /* * Is this interrupt for me? or for * someone who is sharing my interrupt */ if (!(intstat & INT_PEND)) return; if (intstat & BRKADRINT) { /* We upset the sequencer :-( */ /* Lookup the error message */ int i, error = inb(ERROR + iobase); int num_errors = sizeof(hard_error)/sizeof(hard_error[0]); for(i = 0; error != 1 && i < num_errors; i++) error >>= 1; panic("ahc%d: brkadrint, %s at seqaddr = 0x%x\n", ahc->unit, hard_error[i].errmesg, (inb(SEQADDR1 + iobase) << 8) | inb(SEQADDR0 + iobase)); } if (intstat & SEQINT) { u_short targ_mask; u_char target = (inb(SCSIID + iobase) >> 4) & 0x0f; u_char scratch_offset = target; char channel = inb(SBLKCTL + iobase) & SELBUSB ? 'B': 'A'; if (channel == 'B') scratch_offset += 8; targ_mask = (0x01 << scratch_offset); switch (intstat & SEQINT_MASK) { case BAD_PHASE: panic("ahc%d:%c:%d: unknown scsi bus phase. " "Attempting to continue\n", ahc->unit, channel, target); break; case SEND_REJECT: { u_char rejbyte = inb(REJBYTE + iobase); if(( rejbyte & 0xf0) == 0x20) { /* Tagged Message */ printf("\nahc%d:%c:%d: Tagged message " "received without identify. " "Disabling tagged commands " "for this target.\n", ahc->unit, channel, target); ahc->tagenable &= ~targ_mask; } else printf("ahc%d:%c:%d: Warning - " "unknown message recieved from " "target (0x%x). Rejecting\n", ahc->unit, channel, target, rejbyte); break; } case NO_IDENT: panic("ahc%d:%c:%d: Target did not send an IDENTIFY " "message. SAVED_TCL == 0x%x\n", ahc->unit, channel, target, inb(SAVED_TCL + iobase)); break; case NO_MATCH: { printf("ahc%d:%c:%d: no active SCB for " "reconnecting target - " "issuing ABORT\n", ahc->unit, channel, target); printf("SAVED_TCL == 0x%x\n", inb(SAVED_TCL + iobase)); ahc_unbusy_target(target, channel, iobase); outb(SCBARRAY + iobase, 0); outb(CLRSINT1 + iobase, CLRSELTIMEO); RESTART_SEQUENCER(ahc); break; } case SDTR_MSG: { short period; u_char offset, rate; u_char targ_scratch; u_char maxoffset; /* * Help the sequencer to translate the * negotiated transfer rate. Transfer is * 1/4 the period in ns as is returned by * the sync negotiation message. So, we must * multiply by four */ period = inb(ARG_1 + iobase) << 2; offset = inb(ACCUM + iobase); targ_scratch = inb(TARG_SCRATCH + iobase + scratch_offset); if(targ_scratch & WIDEXFER) maxoffset = 0x08; else maxoffset = 0x0f; ahc_scsirate(ahc, &rate, period, MIN(offset,maxoffset), target); /* Preserve the WideXfer flag */ targ_scratch = rate | (targ_scratch & WIDEXFER); outb(TARG_SCRATCH + iobase + scratch_offset, targ_scratch); outb(SCSIRATE + iobase, targ_scratch); if( (targ_scratch & 0x0f) == 0 ) { /* * The requested rate was so low * that asyncronous transfers are * faster (not to mention the * controller won't support them), * so we issue a message reject to * ensure we go to asyncronous * transfers. */ outb(RETURN_1 + iobase, SEND_REJ); } /* See if we initiated Sync Negotiation */ else if(ahc->sdtrpending & targ_mask) { /* * Don't send an SDTR back to * the target */ outb(RETURN_1 + iobase, 0); } else{ /* * Send our own SDTR in reply */ #ifdef AHC_DEBUG if(ahc_debug & AHC_SHOWMISC) printf("Sending SDTR!!\n"); #endif outb(RETURN_1 + iobase, SEND_SDTR); } /* * Negate the flags */ ahc->needsdtr &= ~targ_mask; ahc->sdtrpending &= ~targ_mask; break; } case WDTR_MSG: { u_char scratch, bus_width; bus_width = inb(ARG_1 + iobase); scratch = inb(TARG_SCRATCH + iobase + scratch_offset); if(ahc->wdtrpending & targ_mask) { /* * Don't send a WDTR back to the * target, since we asked first. */ outb(RETURN_1 + iobase, 0); switch(bus_width) { case BUS_8_BIT: scratch &= 0x7f; break; case BUS_16_BIT: if(bootverbose) printf("ahc%d: target " "%d using 16Bit " "transfers\n", ahc->unit, target); scratch |= 0x80; break; case BUS_32_BIT: /* * How can we do 32bit * transfers on a 16bit * bus? */ outb(RETURN_1 + iobase, SEND_REJ); printf("ahc%d: target " "%d requested 32Bit " "transfers. " "Rejecting...\n", ahc->unit, target); break; default: break; } } else { /* * Send our own WDTR in reply */ switch(bus_width) { case BUS_8_BIT: scratch &= 0x7f; break; case BUS_32_BIT: /* Negotiate 16_BITS */ bus_width = BUS_16_BIT; case BUS_16_BIT: if(bootverbose) printf("ahc%d: target " "%d using 16Bit " "transfers\n", ahc->unit, target); scratch |= 0x80; break; default: break; } outb(RETURN_1 + iobase, bus_width | SEND_WDTR); } ahc->needwdtr &= ~targ_mask; ahc->wdtrpending &= ~targ_mask; outb(TARG_SCRATCH + iobase + scratch_offset, scratch); outb(SCSIRATE + iobase, scratch); break; } case REJECT_MSG: { /* * What we care about here is if we had an * outstanding SDTR or WDTR message for this * target. If we did, this is a signal that * the target is refusing negotiation. */ u_char targ_scratch; targ_scratch = inb(TARG_SCRATCH + iobase + scratch_offset); if(ahc->wdtrpending & targ_mask){ /* note 8bit xfers and clear flag */ targ_scratch &= 0x7f; ahc->needwdtr &= ~targ_mask; ahc->wdtrpending &= ~targ_mask; printf("ahc%d:%c:%d: refuses " "WIDE negotiation. Using " "8bit transfers\n", ahc->unit, channel, target); } else if(ahc->sdtrpending & targ_mask){ /* note asynch xfers and clear flag */ targ_scratch &= 0xf0; ahc->needsdtr &= ~targ_mask; ahc->sdtrpending &= ~targ_mask; printf("ahc%d:%c:%d: refuses " "syncronous negotiation. Using " "asyncronous transfers\n", ahc->unit, channel, target); } else { /* * Otherwise, we ignore it. */ #ifdef AHC_DEBUG if(ahc_debug & AHC_SHOWMISC) printf("ahc%d:%c:%d: Message reject -- ignored\n", ahc->unit, channel, target); #endif break; } outb(TARG_SCRATCH + iobase + scratch_offset, targ_scratch); outb(SCSIRATE + iobase, targ_scratch); break; } case BAD_STATUS: { int scb_index; /* The sequencer will notify us when a command * has an error that would be of interest to * the kernel. This allows us to leave the sequencer * running in the common case of command completes * without error. */ scb_index = inb(SCBPTR + iobase); scb = ahc->scbarray[scb_index]; /* * Set the default return value to 0 (don't * send sense). The sense code will change * this if needed and this reduces code * duplication. */ outb(RETURN_1 + iobase, 0); if (!scb || !(scb->flags & SCB_ACTIVE)) { printf("ahc%d:%c:%d: ahc_intr - referenced scb " "not valid during seqint 0x%x scb(%d)\n", ahc->unit, channel, target, intstat, scb_index); goto clear; } xs = scb->xs; - ahc_getscb(ahc, scb, SCB_PIO_TRANSFER_SIZE); + ahc_fetch_scb(ahc, scb, SCB_PIO_TRANSFER_SIZE); #ifdef AHC_DEBUG if((ahc_debug & AHC_SHOWSCBS) && xs->sc_link->target == DEBUGTARG) ahc_print_scb(scb); #endif xs->status = scb->target_status; switch(scb->target_status){ case SCSI_OK: printf("ahc%d: Interrupted for staus of" " 0???\n", ahc->unit); break; case SCSI_CHECK: #ifdef AHC_DEBUG if(ahc_debug & AHC_SHOWSENSE) { sc_print_addr(xs->sc_link); printf("requests Check Status\n"); } #endif if((xs->error == XS_NOERROR) && !(scb->flags & SCB_SENSE)) { u_char control = scb->control; u_short active; struct ahc_dma_seg *sg = scb->ahc_dma; struct scsi_sense *sc = &(scb->sense_cmd); u_char tcl = scb->target_channel_lun; #ifdef AHC_DEBUG if(ahc_debug & AHC_SHOWSENSE) { sc_print_addr(xs->sc_link); printf("Sending Sense\n"); } #endif bzero(scb, SCB_PIO_TRANSFER_SIZE); scb->control |= control & DISCENB; scb->flags |= SCB_SENSE; sc->op_code = REQUEST_SENSE; sc->byte2 = xs->sc_link->lun << 5; sc->length = sizeof(struct scsi_sense_data); sc->control = 0; sg->addr = KVTOPHYS(&xs->sense); sg->len = sizeof(struct scsi_sense_data); scb->target_channel_lun = tcl; scb->SG_segment_count = 1; scb->SG_list_pointer = KVTOPHYS(sg); scb->cmdpointer = KVTOPHYS(sc); scb->cmdlen = sizeof(*sc); scb->data = sg->addr; scb->datalen = sg->len; - ahc_send_scb(ahc, scb, - SCB_PIO_TRANSFER_SIZE); + ahc_send_scb(ahc, scb); outb(SCB_NEXT_WAITING+iobase, SCB_LIST_NULL); /* * Ensure that the target is "BUSY" * so we don't get overlapping * commands if we happen to be doing * tagged I/O. */ ahc_busy_target(target,channel,iobase); /* * Make us the next command to run */ - ahc_add_waiting_scb(iobase, scb, - list_head); + ahc_add_waiting_scb(iobase, scb); outb(RETURN_1 + iobase, SEND_SENSE); break; } /* * Clear the SCB_SENSE Flag and have * the sequencer do a normal command * complete with either a "DRIVER_STUFFUP" * error or whatever other error condition * we already had. */ scb->flags &= ~SCB_SENSE; if(xs->error == XS_NOERROR) xs->error = XS_DRIVER_STUFFUP; break; case SCSI_BUSY: xs->error = XS_BUSY; sc_print_addr(xs->sc_link); printf("Target Busy\n"); break; case SCSI_QUEUE_FULL: /* * The upper level SCSI code will eventually * handle this properly. */ sc_print_addr(xs->sc_link); printf("Queue Full\n"); xs->error = XS_BUSY; break; default: sc_print_addr(xs->sc_link); printf("unexpected targ_status: %x\n", scb->target_status); xs->error = XS_DRIVER_STUFFUP; break; } break; } case RESIDUAL: { int scb_index; scb_index = inb(SCBPTR + iobase); scb = ahc->scbarray[scb_index]; xs = scb->xs; /* * Don't clobber valid resid info with * a resid coming from a check sense * operation. */ if(!(scb->flags & SCB_SENSE)) { int resid_sgs; /* * Remainder of the SG where the transfer * stopped. */ scb->xs->resid = (inb(iobase+SCB_RESID_DCNT2)<<16) | (inb(iobase+SCB_RESID_DCNT1)<<8) | inb(iobase+SCB_RESID_DCNT0); /* * Add up the contents of all residual * SG segments that are after the SG where * the transfer stopped. */ resid_sgs = inb(SCB_RESID_SGCNT + iobase) - 1; while(resid_sgs > 0) { int sg; sg = scb->SG_segment_count - resid_sgs; scb->xs->resid += scb->ahc_dma[sg].len; resid_sgs--; } xs->flags |= SCSI_RESID_VALID; #ifdef AHC_DEBUG if(ahc_debug & AHC_SHOWMISC) { sc_print_addr(xs->sc_link); printf("Handled Residual of %ld bytes\n" ,scb->xs->resid); } #endif } break; } case ABORT_TAG: { int scb_index; scb_index = inb(SCBPTR + iobase); scb = ahc->scbarray[scb_index]; xs = scb->xs; /* * We didn't recieve a valid tag back from * the target on a reconnect. */ sc_print_addr(xs->sc_link); printf("invalid tag recieved -- sending ABORT_TAG\n"); scb->xs->error = XS_DRIVER_STUFFUP; untimeout(ahc_timeout, (caddr_t)scb); ahc_done(ahc, scb); break; } case AWAITING_MSG: { int scb_index; scb_index = inb(SCBPTR + iobase); scb = ahc->scbarray[scb_index]; /* * This SCB had a zero length command, informing * the sequencer that we wanted to send a special * message to this target. We only do this for * BUS_DEVICE_RESET messages currently. */ if(scb->flags & SCB_DEVICE_RESET) { outb(MSG0 + iobase, MSG_BUS_DEVICE_RESET); outb(MSG_LEN + iobase, 1); } else panic("ahc_intr: AWAITING_MSG for an SCB that " "does not have a waiting message"); break; } case IMMEDDONE: { /* * Take care of device reset messages */ u_char scbindex = inb(SCBPTR + iobase); scb = ahc->scbarray[scbindex]; if(scb->flags & SCB_DEVICE_RESET) { u_char targ_scratch; int found; /* * Go back to async/narrow transfers and * renegotiate. */ ahc_unbusy_target(target, channel, iobase); ahc->needsdtr |= ahc->needsdtr_orig & targ_mask; ahc->needwdtr |= ahc->needwdtr_orig & targ_mask; ahc->sdtrpending &= ~targ_mask; ahc->wdtrpending &= ~targ_mask; targ_scratch = inb(TARG_SCRATCH + iobase + scratch_offset); targ_scratch &= SXFR; outb(TARG_SCRATCH + iobase + scratch_offset, targ_scratch); found = ahc_reset_device(ahc, target, channel, SCB_LIST_NULL, XS_NOERROR); -#ifdef AHC_DEBUG - if(ahc_debug & AHC_SHOWABORTS) { - sc_print_addr(scb->xs->sc_link); - printf("Bus Device Reset delivered. " - "%d SCBs aborted\n", found); - } -#endif + sc_print_addr(scb->xs->sc_link); + printf("Bus Device Reset delivered. " + "%d SCBs aborted\n", found); + ahc->in_timeout = FALSE; + ahc_run_done_queue(ahc); } else panic("ahc_intr: Immediate complete for " "unknown operation."); break; } #if NOT_YET /* XXX Fill these in later */ case MESG_BUFFER_BUSY: break; case MSGIN_PHASEMIS: break; #endif case PARITY_ERROR: { /* * Determine the bus phase and * queue an appropriate message */ char *phase; u_char mesg_out = MSG_NOP; u_char lastphase = inb(LASTPHASE + iobase); int scb_index = inb(SCBPTR + iobase); scb = ahc->scbarray[scb_index]; sc_print_addr(scb->xs->sc_link); switch(lastphase) { case P_DATAOUT: phase = "Data-Out"; break; case P_DATAIN: phase = "Data-In"; mesg_out = MSG_INITIATOR_DET_ERROR; break; case P_COMMAND: phase = "Command"; break; case P_MESGOUT: phase = "Message-Out"; break; case P_STATUS: phase = "Status"; mesg_out = MSG_INITIATOR_DET_ERROR; break; case P_MESGIN: phase = "Message-In"; mesg_out = MSG_MSG_PARITY_ERROR; break; default: phase = "unknown"; break; } printf("parity error during %s phase.\n", phase); /* * We've set the hardware to assert ATN if we * get a parity error on "in" phases, so all we * need to do is stuff the message buffer with * the appropriate message. In phases have set * mesg_out to something other than MSG_NOP. */ if(mesg_out != MSG_NOP) { outb(MSG0 + iobase, mesg_out); outb(MSG_LEN + iobase, 1); } else /* * Should we allow the target to make * this decision for us? */ scb->xs->error = XS_DRIVER_STUFFUP; break; } default: printf("ahc: seqint, " "intstat == 0x%x, scsisigi = 0x%x\n", intstat, inb(SCSISIGI + iobase)); break; } clear: /* * Clear the upper byte that holds SEQINT status * codes and clear the SEQINT bit. */ outb(CLRINT + iobase, CLRSEQINT); /* * The sequencer is paused immediately on * a SEQINT, so we should restart it when * we leave this section. */ UNPAUSE_SEQUENCER(ahc); } if (intstat & SCSIINT) { int scb_index = inb(SCBPTR + iobase); status = inb(SSTAT1 + iobase); scb = ahc->scbarray[scb_index]; if (!scb || !(scb->flags & SCB_ACTIVE)) { printf("ahc%d: ahc_intr - referenced scb not " "valid during scsiint 0x%x scb(%d)\n", ahc->unit, status, scb_index); outb(CLRSINT1 + iobase, status); UNPAUSE_SEQUENCER(ahc); outb(CLRINT + iobase, CLRSCSIINT); scb = NULL; goto cmdcomplete; } xs = scb->xs; + if (status & SCSIRSTI) { + u_char channel; + PAUSE_SEQUENCER(ahc); + channel = inb(SBLKCTL + iobase); + if( !(inb(SCSISEQ + iobase ) & SCSIRSTO) + && (ahc->flags & AHC_TWIN) ) + { + /* Its on the other bus */ + channel ^= SELBUSB; + } + ahc_reset_channel(ahc, + channel & SELBUSB ? 'B' : 'A', + SCB_LIST_NULL, + XS_BUSY, + /* Initiate Reset */FALSE); + ahc_run_done_queue(ahc); + } if (status & SELTO) { u_char waiting; u_char flags; - outb(SCSISEQ + iobase, ENRSELI); xs->error = XS_TIMEOUT; /* * Clear any pending messages for the timed out * target, and mark the target as free */ flags = inb(FLAGS + iobase); outb(MSG_LEN + iobase, 0); ahc_unbusy_target(xs->sc_link->target, ((long)xs->sc_link->fordriver & SELBUSB) ? 'B' : 'A', iobase); outb(SCBARRAY + iobase, 0); outb(CLRSINT1 + iobase, CLRSELTIMEO); outb(CLRINT + iobase, CLRSCSIINT); /* Shift the waiting for selection queue forward */ waiting = inb(WAITING_SCBH + iobase); outb(SCBPTR + iobase, waiting); waiting = inb(SCB_NEXT_WAITING + iobase); outb(WAITING_SCBH + iobase, waiting); RESTART_SEQUENCER(ahc); } else if (!(status & BUSFREE)) { sc_print_addr(xs->sc_link); printf("Unknown SCSIINT. Status = 0x%x\n", status); outb(CLRSINT1 + iobase, status); UNPAUSE_SEQUENCER(ahc); outb(CLRINT + iobase, CLRSCSIINT); scb = NULL; } if(scb != NULL) { /* We want to process the command */ untimeout(ahc_timeout, (caddr_t)scb); ahc_done(ahc, scb); } } cmdcomplete: if (intstat & CMDCMPLT) { int scb_index; do { scb_index = inb(QOUTFIFO + iobase); scb = ahc->scbarray[scb_index]; if (!scb || !(scb->flags & SCB_ACTIVE)) { printf("ahc%d: WARNING " "no command for scb %d (cmdcmplt)\n" "QOUTCNT == %d\n", ahc->unit, scb_index, inb(QOUTCNT + iobase)); outb(CLRINT + iobase, CLRCMDINT); continue; } outb(CLRINT + iobase, CLRCMDINT); untimeout(ahc_timeout, (caddr_t)scb); ahc_done(ahc, scb); } while (inb(QOUTCNT + iobase)); } } /* * We have a scb which has been processed by the * adaptor, now we look to see how the operation * went. */ static void ahc_done(ahc, scb) struct ahc_data *ahc; struct scb *scb; { struct scsi_xfer *xs = scb->xs; SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahc_done\n")); /* * Put the results of the operation * into the xfer and call whoever started it */ if(scb->flags & SCB_SENSE) xs->error = XS_SENSE; if ((xs->flags & SCSI_ERR_OK) && !(xs->error == XS_SENSE)) { /* All went correctly OR errors expected */ xs->error = XS_NOERROR; } xs->flags |= ITSDONE; #ifdef AHC_TAGENABLE if(xs->cmd->opcode == 0x12 && xs->error == XS_NOERROR) { struct scsi_inquiry_data *inq_data; u_short mask = 0x01 << (xs->sc_link->target | (scb->target_channel_lun & 0x08)); /* * Sneak a look at the results of the SCSI Inquiry * command and see if we can do Tagged queing. This * should really be done by the higher level drivers. */ inq_data = (struct scsi_inquiry_data *)xs->data; if((inq_data->flags & SID_CmdQue) && !(ahc->tagenable & mask)) { printf("ahc%d: target %d Tagged Queuing Device\n", ahc->unit, xs->sc_link->target); ahc->tagenable |= mask; #ifdef QUEUE_FULL_SUPPORTED xs->sc_link->opennings += 2; #endif } } #endif ahc_free_scb(ahc, scb, xs->flags); scsi_done(xs); } /* * Start the board, ready for normal operation */ int ahc_init(ahc) struct ahc_data *ahc; { u_long iobase = ahc->baseport; u_char scsi_conf, sblkctl, i; int max_targ = 15; /* * Assume we have a board at this stage and it has been reset. */ /* Determine channel configuration and who we are on the scsi bus. */ switch ( (sblkctl = inb(SBLKCTL + iobase) & 0x0a) ) { case 0: ahc->our_id = (inb(SCSICONF + iobase) & HSCSIID); if(ahc->type == AHC_394) printf("Channel %c, SCSI Id=%d, ", ahc->flags & AHC_CHNLB ? 'B' : 'A', ahc->our_id); else printf("Single Channel, SCSI Id=%d, ", ahc->our_id); outb(FLAGS + iobase, SINGLE_BUS); break; case 2: ahc->our_id = (inb(SCSICONF + 1 + iobase) & HWSCSIID); if(ahc->type == AHC_394) printf("Wide Channel %c, SCSI Id=%d, ", ahc->flags & AHC_CHNLB ? 'B' : 'A', ahc->our_id); else printf("Wide Channel, SCSI Id=%d, ", ahc->our_id); ahc->type |= AHC_WIDE; outb(FLAGS + iobase, WIDE_BUS); break; case 8: ahc->our_id = (inb(SCSICONF + iobase) & HSCSIID); ahc->our_id_b = (inb(SCSICONF + 1 + iobase) & HSCSIID); printf("Twin Channel, A SCSI Id=%d, B SCSI Id=%d, ", ahc->our_id, ahc->our_id_b); ahc->type |= AHC_TWIN; outb(FLAGS + iobase, TWIN_BUS); break; default: printf(" Unsupported adapter type. Ignoring\n"); return(-1); } printf("%d SCBs\n", ahc->maxscbs); #ifdef AHC_DEBUG if(ahc_debug & AHC_SHOWMISC) { struct scb test; printf("ahc%d: hardware scb %ld bytes; kernel scb; " "ahc_dma %d bytes\n", ahc->unit, (u_long)&(test.next) - (u_long)(&test), sizeof(test), sizeof(struct ahc_dma_seg)); } #endif /* AHC_DEBUG */ /* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels*/ if(ahc->type & AHC_TWIN) { /* * The device is gated to channel B after a chip reset, * so set those values first */ outb(SCSIID + iobase, ahc->our_id_b); scsi_conf = inb(SCSICONF + 1 + iobase) & (ENSPCHK|STIMESEL); outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN); - outb(SIMODE1 + iobase, ENSELTIMO); + outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIRST); if(ahc->type & AHC_ULTRA) outb(SXFRCTL0 + iobase, DFON|SPIOEN|ULTRAEN); else outb(SXFRCTL0 + iobase, DFON|SPIOEN); /* Reset the bus */ outb(SCSISEQ + iobase, SCSIRSTO); DELAY(1000); outb(SCSISEQ + iobase, 0); /* Select Channel A */ outb(SBLKCTL + iobase, 0); } outb(SCSIID + iobase, ahc->our_id); scsi_conf = inb(SCSICONF + iobase) & (ENSPCHK|STIMESEL); outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN); - outb(SIMODE1 + iobase, ENSELTIMO); + outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIRST); if(ahc->type & AHC_ULTRA) outb(SXFRCTL0 + iobase, DFON|SPIOEN|ULTRAEN); else outb(SXFRCTL0 + iobase, DFON|SPIOEN); /* Reset the bus */ outb(SCSISEQ + iobase, SCSIRSTO); DELAY(1000); outb(SCSISEQ + iobase, 0); /* * Look at the information that board initialization or * the board bios has left us. In the lower four bits of each * target's scratch space any value other than 0 indicates * that we should initiate syncronous transfers. If it's zero, * the user or the BIOS has decided to disable syncronous * negotiation to that target so we don't activate the needsdtr * flag. */ ahc->needsdtr_orig = 0; ahc->needwdtr_orig = 0; /* Grab the disconnection disable table and invert it for our needs */ if(ahc->flags & AHC_USEDEFAULTS) { printf("ahc%d: Host Adapter Bios disabled. Using default SCSI " "device parameters\n", ahc->unit); ahc->discenable = 0xff; } else ahc->discenable = ~((inb(DISC_DSB + iobase + 1) << 8) | inb(DISC_DSB + iobase)); if(!(ahc->type & (AHC_WIDE|AHC_TWIN))) max_targ = 7; for(i = 0; i <= max_targ; i++){ u_char target_settings; if (ahc->flags & AHC_USEDEFAULTS) { target_settings = 0; /* 10MHz */ ahc->needsdtr_orig |= (0x01 << i); ahc->needwdtr_orig |= (0x01 << i); } else { /* Take the settings leftover in scratch RAM. */ target_settings = inb(TARG_SCRATCH + i + iobase); if(target_settings & 0x0f){ ahc->needsdtr_orig |= (0x01 << i); /*Default to a asyncronous transfers(0 offset)*/ target_settings &= 0xf0; } if(target_settings & 0x80){ ahc->needwdtr_orig |= (0x01 << i); /* * We'll set the Wide flag when we * are successful with Wide negotiation. * Turn it off for now so we aren't * confused. */ target_settings &= 0x7f; } } outb(TARG_SCRATCH+i+iobase,target_settings); } /* * If we are not a WIDE device, forget WDTR. This * makes the driver work on some cards that don't * leave these fields cleared when the BIOS is not * installed. */ if(!(ahc->type & AHC_WIDE)) ahc->needwdtr_orig = 0; ahc->needsdtr = ahc->needsdtr_orig; ahc->needwdtr = ahc->needwdtr_orig; ahc->sdtrpending = 0; ahc->wdtrpending = 0; ahc->tagenable = 0; #ifdef AHC_DEBUG /* How did we do? */ if(ahc_debug & AHC_SHOWMISC) printf("NEEDSDTR == 0x%x\nNEEDWDTR == 0x%x\n" "DISCENABLE == 0x%x\n", ahc->needsdtr, ahc->needwdtr, ahc->discenable); #endif /* * Clear the control byte for every SCB so that the sequencer * doesn't get confused and think that one of them is valid */ for(i = 0; i < ahc->maxscbs; i++) { outb(SCBPTR + iobase, i); outb(SCBARRAY + iobase, 0); } /* * Set the number of availible SCBs */ outb(SCBCOUNT + iobase, ahc->maxscbs); /* * 2s compliment of SCBCOUNT */ i = ahc->maxscbs; outb(COMP_SCBCOUNT + iobase, -i & 0xff); /* We don't have any busy targets right now */ outb( ACTIVE_A + iobase, 0 ); outb( ACTIVE_B + iobase, 0 ); /* We don't have any waiting selections */ outb( WAITING_SCBH + iobase, SCB_LIST_NULL ); outb( WAITING_SCBT + iobase, SCB_LIST_NULL ); /* Message out buffer starts empty */ outb(MSG_LEN + iobase, 0x00); /* * Load the Sequencer program and Enable the adapter * in "fast" mode. */ if(bootverbose) printf("ahc%d: Downloading Sequencer Program...", ahc->unit); ahc_loadseq(iobase); if(bootverbose) printf("Done\n"); outb(SEQCTL + iobase, FASTMODE); UNPAUSE_SEQUENCER(ahc); /* * Note that we are going and return (to probe) */ ahc->flags = AHC_INIT; return (0); } static void ahcminphys(bp) struct buf *bp; { /* * Even though the card can transfer up to 16megs per command * we are limited by the number of segments in the dma segment * list that we can hold. The worst case is that all pages are * discontinuous physically, hense the "page per segment" limit * enforced here. */ if (bp->b_bcount > ((AHC_NSEG - 1) * PAGESIZ)) { bp->b_bcount = ((AHC_NSEG - 1) * PAGESIZ); } } /* * start a scsi operation given the command and * the data address, target, and lun all of which * are stored in the scsi_xfer struct */ -static int32 +static int32_t ahc_scsi_cmd(xs) struct scsi_xfer *xs; { struct scb *scb; struct ahc_dma_seg *sg; int seg; /* scatter gather seg being worked on */ int thiskv; physaddr thisphys, nextphys; int bytes_this_seg, bytes_this_page, datalen, flags; struct ahc_data *ahc; u_short mask; int s; ahc = (struct ahc_data *)xs->sc_link->adapter_softc; mask = (0x01 << (xs->sc_link->target | ((u_long)xs->sc_link->fordriver & 0x08))); SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahc_scsi_cmd\n")); /* * get an scb to use. If the transfer * is from a buf (possibly from interrupt time) * then we can't allow it to sleep */ flags = xs->flags; if (flags & ITSDONE) { printf("ahc%d: Already done?", ahc->unit); xs->flags &= ~ITSDONE; } if (!(flags & INUSE)) { printf("ahc%d: Not in use?", ahc->unit); xs->flags |= INUSE; } if (!(scb = ahc_get_scb(ahc, flags))) { xs->error = XS_DRIVER_STUFFUP; return (TRY_AGAIN_LATER); } SC_DEBUG(xs->sc_link, SDEV_DB3, ("start scb(%p)\n", scb)); scb->xs = xs; if (flags & SCSI_RESET) scb->flags |= SCB_DEVICE_RESET|SCB_IMMED; /* * Put all the arguments for the xfer in the scb */ if(ahc->tagenable & mask) scb->control |= TAG_ENB; if(ahc->discenable & mask) scb->control |= DISCENB; if((ahc->needwdtr & mask) && !(ahc->wdtrpending & mask)) { scb->control |= NEEDWDTR; ahc->wdtrpending |= mask; } else if((ahc->needsdtr & mask) && !(ahc->sdtrpending & mask)) { scb->control |= NEEDSDTR; ahc->sdtrpending |= mask; } scb->target_channel_lun = ((xs->sc_link->target << 4) & 0xF0) | ((u_long)xs->sc_link->fordriver & 0x08) | (xs->sc_link->lun & 0x07); scb->cmdlen = xs->cmdlen; scb->cmdpointer = KVTOPHYS(xs->cmd); xs->resid = 0; xs->status = 0; if (xs->datalen) { /* should use S/G only if not zero length */ scb->SG_list_pointer = KVTOPHYS(scb->ahc_dma); sg = scb->ahc_dma; seg = 0; { /* * Set up the scatter gather block */ SC_DEBUG(xs->sc_link, SDEV_DB4, ("%ld @%p:- ", xs->datalen, xs->data)); datalen = xs->datalen; thiskv = (int) xs->data; thisphys = KVTOPHYS(thiskv); while ((datalen) && (seg < AHC_NSEG)) { bytes_this_seg = 0; /* put in the base address */ sg->addr = thisphys; SC_DEBUGN(xs->sc_link, SDEV_DB4, ("0x%lx", thisphys)); /* do it at least once */ nextphys = thisphys; while ((datalen) && (thisphys == nextphys)) { /* * This page is contiguous (physically) * with the the last, just extend the * length */ /* how far to the end of the page */ nextphys = (thisphys & (~(PAGESIZ - 1))) + PAGESIZ; bytes_this_page = nextphys - thisphys; /**** or the data ****/ bytes_this_page = min(bytes_this_page ,datalen); bytes_this_seg += bytes_this_page; datalen -= bytes_this_page; /* get more ready for the next page */ thiskv = (thiskv & (~(PAGESIZ - 1))) + PAGESIZ; if (datalen) thisphys = KVTOPHYS(thiskv); } /* * next page isn't contiguous, finish the seg */ SC_DEBUGN(xs->sc_link, SDEV_DB4, ("(0x%x)", bytes_this_seg)); sg->len = bytes_this_seg; sg++; seg++; } } /*end of iov/kv decision */ scb->SG_segment_count = seg; /* Copy the first SG into the data pointer area */ scb->data = scb->ahc_dma->addr; scb->datalen = scb->ahc_dma->len; SC_DEBUGN(xs->sc_link, SDEV_DB4, ("\n")); if (datalen) { /* there's still data, must have run out of segs! */ printf("ahc_scsi_cmd%d: more than %d DMA segs\n", ahc->unit, AHC_NSEG); xs->error = XS_DRIVER_STUFFUP; ahc_free_scb(ahc, scb, flags); - return (HAD_ERROR); + return (COMPLETE); } } else { /* * No data xfer, use non S/G values */ scb->SG_segment_count = 0; scb->SG_list_pointer = 0; scb->data = 0; scb->datalen = 0; } #ifdef AHC_DEBUG if((ahc_debug & AHC_SHOWSCBS) && (xs->sc_link->target == DEBUGTARG)) ahc_print_scb(scb); #endif if (!(flags & SCSI_NOMASK)) { s = splbio(); PAUSE_SEQUENCER(ahc); - ahc_send_scb(ahc, scb, SCB_PIO_TRANSFER_SIZE); + ahc_send_scb(ahc, scb); outb(QINFIFO + ahc->baseport, scb->position); UNPAUSE_SEQUENCER(ahc); timeout(ahc_timeout, (caddr_t)scb, (xs->timeout * hz) / 1000); splx(s); SC_DEBUG(xs->sc_link, SDEV_DB3, ("cmd_sent\n")); return (SUCCESSFULLY_QUEUED); } /* * If we can't use interrupts, poll for completion */ s = splbio(); PAUSE_SEQUENCER(ahc); - ahc_send_scb(ahc, scb, SCB_PIO_TRANSFER_SIZE); + ahc_send_scb(ahc, scb); outb(QINFIFO + ahc->baseport, scb->position); UNPAUSE_SEQUENCER(ahc); SC_DEBUG(xs->sc_link, SDEV_DB3, ("cmd_wait\n")); do { if (ahc_poll(ahc, xs->timeout)) { if (!(xs->flags & SCSI_SILENT)) printf("cmd fail\n"); - ahc_scb_timeout(ahc, scb); - splx(s); - return (HAD_ERROR); + ahc_timeout(scb); + break; } } while (!(xs->flags & ITSDONE)); /* a non command complete intr */ - if (xs->error) { - splx(s); - return (HAD_ERROR); - } splx(s); return (COMPLETE); } /* * Return some information to the caller about * the adapter and it's capabilities. */ -static u_int32 +static u_int32_t ahc_adapter_info(unit) int unit; { return (2); /* 2 outstanding requests at a time per device */ } /* * A scb (and hence an scb entry on the board is put onto the * free list. */ static void ahc_free_scb(ahc, scb, flags) struct ahc_data *ahc; int flags; struct scb *scb; { unsigned int opri; opri = splbio(); scb->flags = SCB_FREE; scb->next = ahc->free_scb; ahc->free_scb = scb; #ifdef AHC_DEBUG ahc->activescbs--; #endif /* * If there were none, wake abybody waiting for * one to come free, starting with queued entries */ if (!scb->next) { wakeup((caddr_t)&ahc->free_scb); } splx(opri); } /* * Get a free scb * If there are none, see if we can allocate a * new one. Otherwise either return an error or sleep */ static struct scb * ahc_get_scb(ahc, flags) struct ahc_data *ahc; int flags; { unsigned opri; struct scb *scbp; opri = splbio(); /* * If we can and have to, sleep waiting for one to come free * but only if we can't allocate a new one. */ while (!(scbp = ahc->free_scb)) { if (ahc->numscbs < ahc->maxscbs) { scbp = (struct scb *) malloc(sizeof(struct scb), M_TEMP, M_NOWAIT); if (scbp) { - u_long iobase = ahc->baseport; - u_char curscb; bzero(scbp, sizeof(struct scb)); scbp->position = ahc->numscbs; ahc->numscbs++; scbp->flags = SCB_ACTIVE; /* * Place in the scbarray * Never is removed. Position * in ahc->scbarray is the scbarray * position on the board we will * load it into. */ ahc->scbarray[scbp->position] = scbp; } else { printf("ahc%d: Can't malloc SCB\n", ahc->unit); } break; } else { if (!(flags & SCSI_NOSLEEP)) { tsleep((caddr_t)&ahc->free_scb, PRIBIO, "ahcscb", 0); continue; } break; } } if (scbp) { /* Get SCB from from free list */ ahc->free_scb = scbp->next; scbp->control = 0; scbp->flags = SCB_ACTIVE; #ifdef AHC_DEBUG ahc->activescbs++; if((ahc_debug & AHC_SHOWSCBCNT) && (ahc->activescbs == ahc->maxscbs)) printf("ahc%d: Max SCBs active\n", ahc->unit); #endif } splx(opri); return (scbp); } static void ahc_loadseq(iobase) u_long iobase; { static unsigned char seqprog[] = { # include "aic7xxx_seq.h" }; outb(SEQCTL + iobase, PERRORDIS|SEQRESET|LOADRAM); outsb(SEQRAM + iobase, seqprog, sizeof(seqprog)); outb(SEQCTL + iobase, FASTMODE|SEQRESET); do { outb(SEQCTL + iobase, SEQRESET|FASTMODE); } while (inb(SEQADDR0 + iobase) != 0 && inb(SEQADDR1 + iobase != 0)); } /* * Function to poll for command completion when * interrupts are disabled (crash dumps) */ static int ahc_poll(ahc, wait) struct ahc_data *ahc; int wait; /* in msec */ { u_long iobase = ahc->baseport; u_long stport = INTSTAT + iobase; while (--wait) { DELAY(1000); if (inb(stport) & INT_PEND) break; } if (wait == 0) { printf("ahc%d: board not responding\n", ahc->unit); return (EIO); } ahc_intr((void *)ahc); return (0); } static void -ahc_scb_timeout(ahc, scb) - struct ahc_data *ahc; - struct scb *scb; +ahc_timeout(arg) + void *arg; { - u_long iobase = ahc->baseport; - int found = 0; - char channel = scb->target_channel_lun & SELBUSB ? 'B': 'A'; + struct scb *scb = (struct scb *)arg; + struct ahc_data *ahc; + int s, h, found; + u_char bus_state; + u_long iobase; - /* + s = splbio(); + + h = splhigh(); + + if (!(scb->flags & SCB_ACTIVE)) { + /* Previous timeout took care of me already */ + splx(h); + splx(s); + return; + } + + ahc = (struct ahc_data *)scb->xs->sc_link->adapter_softc; + + if (ahc->in_timeout) { + /* + * Some other SCB has started a recovery operation + * and is still working on cleaning things up. + */ + if (scb->flags & SCB_TIMEDOUT) { + /* + * This SCB has been here before and is not the + * recovery SCB. Cut our losses and panic. Its + * better to do this than trash a filesystem. + */ + panic("ahc%d: Timed-out command times out " + "again\n", ahc->unit); + } + else if (!(scb->flags & SCB_ABORTED)) + { + /* + * This is not the SCB that started this timeout + * processing. Give this scb another lifetime so + * that it can continue once we deal with the + * timeout. + */ + scb->flags |= SCB_TIMEDOUT; + timeout(ahc_timeout, (caddr_t)scb, + (scb->xs->timeout * hz) / 1000); + splx(h); + splx(s); + return; + } + } + ahc->in_timeout = TRUE; + splx(h); + + /* * Ensure that the card doesn't do anything * behind our back. */ PAUSE_SEQUENCER(ahc); + sc_print_addr(scb->xs->sc_link); + printf("timed out "); /* - * First, determine if we want to do a bus - * reset or simply a bus device reset. - * If this is the first time that a transaction - * has timed out, just schedule a bus device - * reset. Otherwise, we reset the bus and - * abort all pending I/Os on that bus. + * Take a snapshot of the bus state and print out + * some information so we can track down driver bugs. */ + iobase = ahc->baseport; + bus_state = inb(iobase + LASTPHASE); + + switch(bus_state & PHASE_MASK) + { + case P_DATAOUT: + printf("in dataout phase"); + break; + case P_DATAIN: + printf("in datain phase"); + break; + case P_COMMAND: + printf("in command phase"); + break; + case P_MESGOUT: + printf("in message out phase"); + break; + case P_STATUS: + printf("in status phase"); + break; + case P_MESGIN: + printf("in message in phase"); + break; + default: + printf("while idle, LASTPHASE == 0x%x", + bus_state); + /* + * We aren't in a valid phase, so assume we're + * idle. + */ + bus_state = 0; + break; + } + + printf(", SCSISIGI == 0x%x\n", inb(iobase + SCSISIGI)); + + /* Decide our course of action */ + if(scb->flags & SCB_ABORTED) { /* * Been down this road before. * Do a full bus reset. */ + char channel = (scb->target_channel_lun & SELBUSB) + ? 'B': 'A'; found = ahc_reset_channel(ahc, channel, scb->position, - XS_TIMEOUT); -#ifdef AHC_DEBUG - if(ahc_debug & AHC_SHOWABORTS) - printf("ahc%d: Issued Channel %c Bus Reset #1. " - "%d SCBs aborted\n", ahc->unit, channel, found); -#endif + XS_TIMEOUT, /*Initiate Reset*/TRUE); + printf("ahc%d: Issued Channel %c Bus Reset #1. " + "%d SCBs aborted\n", ahc->unit, channel, found); + ahc->in_timeout = FALSE; } else { /* * Send a Bus Device Reset Message: - * The target we select to send the message to may - * be entirely different than the target pointed to - * by the scb that timed out. If the command is - * in the QINFIFO or the waiting for selection list, - * its not tying up the bus and isn't responsible - * for the delay so we pick off the active command - * which should be the SCB selected by SCBPTR. If - * its disconnected or active, we device reset the - * target scbp points to. Although it may be that - * this target is not responsible for the delay, it - * may also be that we're timing out on a command that - * just takes too much time, so we try the bus device - * reset there first. + * The target that is holding up the bus may not + * be the same as the one that triggered this timeout + * (different commands have different timeout lengths). + * It is also impossible to get a message to a target + * if we are in a "frozen" data transfer phase. Our + * strategy here is to queue a bus device reset message + * to the timed out target if it is disconnected. + * Otherwise, if we have an active target we stuff the + * message buffer with a bus device reset message and + * assert ATN in the hopes that the target will let go + * of the bus and finally disconnect. If this fails, + * we'll get another timeout 2 seconds later which will + * cause a bus reset. */ u_char active_scb, control; struct scb *active_scbp; active_scb = inb(SCBPTR + iobase); active_scbp = ahc->scbarray[active_scb]; - control = inb(SCBARRAY + iobase); + control = inb(SCB_CONTROL + iobase); - /* Test to see if scbp is disconnected */ + /* Test to see if scb is disconnected */ outb(SCBPTR + iobase, scb->position); if(inb(SCB_CONTROL + iobase) & DISCONNECTED) { scb->flags |= SCB_DEVICE_RESET|SCB_ABORTED; scb->SG_segment_count = 0; scb->SG_list_pointer = 0; scb->data = 0; scb->datalen = 0; - outb(SCBCNT + iobase, 0x80); - outsb(SCBARRAY+iobase,scb,SCB_PIO_TRANSFER_SIZE); - outb(SCBCNT + iobase, 0); - ahc_add_waiting_scb(iobase, scb, list_second); + ahc_send_scb(ahc, scb); + ahc_add_waiting_scb(iobase, scb); timeout(ahc_timeout, (caddr_t)scb, (2 * hz)); -#ifdef AHC_DEBUG - if(ahc_debug & AHC_SHOWABORTS) { - sc_print_addr(scb->xs->sc_link); - printf("BUS DEVICE RESET message queued.\n"); - } -#endif + sc_print_addr(scb->xs->sc_link); + printf("BUS DEVICE RESET message queued.\n"); + outb(SCBPTR + iobase, active_scb); UNPAUSE_SEQUENCER(ahc); } /* Is the active SCB really active? */ - else if(active_scbp->flags & SCB_ACTIVE) { - /* XXX && (control & NEEDDMA) == NEEDDMA) { */ - u_char msg_len = inb(MSG_LEN + iobase); - if(msg_len) { - /* - * If we're in a message phase, tacking on - * another message may confuse the target totally. - * The bus is probably wedged, so reset the - * channel. - */ - channel = (active_scbp->target_channel_lun & SELBUSB) - ? 'B': 'A'; - ahc_reset_channel(ahc, channel, scb->position, - XS_TIMEOUT); -#ifdef AHC_DEBUG - if(ahc_debug & AHC_SHOWABORTS) - printf("ahc%d: Issued Channel %c Bus Reset #2. " - "%d SCBs aborted\n", ahc->unit, channel, - found); -#endif - } - else { - /* - * Load the message buffer and assert attention. - */ - active_scbp->flags |= SCB_DEVICE_RESET|SCB_ABORTED; - if(active_scbp != scb) - untimeout(ahc_timeout, (caddr_t)active_scbp); - timeout(ahc_timeout, (caddr_t)active_scbp, (2 * hz)); + else if((active_scbp->flags & SCB_ACTIVE) && bus_state) { outb(MSG_LEN + iobase, 1); outb(MSG0 + iobase, MSG_BUS_DEVICE_RESET); - if(active_scbp->target_channel_lun - != scb->target_channel_lun) { + outb(SCSISIGO + iobase, bus_state|ATNO); + sc_print_addr(active_scbp->xs->sc_link); + printf("asserted ATN - device reset in message buffer\n"); + active_scbp->flags |= SCB_DEVICE_RESET|SCB_ABORTED; + if(active_scbp != scb) { + untimeout(ahc_timeout, (caddr_t)active_scbp); /* Give scb a new lease on life */ timeout(ahc_timeout, (caddr_t)scb, (scb->xs->timeout * hz) / 1000); } -#ifdef AHC_DEBUG - if(ahc_debug & AHC_SHOWABORTS) { - sc_print_addr(active_scbp->xs->sc_link); - printf("BUS DEVICE RESET message queued.\n"); - } -#endif + timeout(ahc_timeout, (caddr_t)active_scbp, (2 * hz)); + outb(SCBPTR + iobase, active_scb); UNPAUSE_SEQUENCER(ahc); - } } else { - /* - * No active command to single out, so reset - * the bus for the timed out target. - */ - ahc_reset_channel(ahc, channel, scb->position, - XS_TIMEOUT); -#ifdef AHC_DEBUG - if(ahc_debug & AHC_SHOWABORTS) - printf("ahc%d: Issued Channel %c Bus Reset #3. " - "%d SCBs aborted\n", ahc->unit, channel, - found); -#endif + /* No active target? Try reseting the bus */ + char channel = (scb->target_channel_lun & SELBUSB) + ? 'B': 'A'; + found = ahc_reset_channel(ahc, channel, scb->position, + XS_TIMEOUT, /*Initiate Reset*/TRUE); + printf("ahc%d: Issued Channel %c Bus Reset #2. " + "%d SCBs aborted\n", ahc->unit, channel, + found); + ahc->in_timeout = FALSE; } } -} - -static void -ahc_timeout(void *arg1) -{ - struct scb *scb = (struct scb *)arg1; - struct ahc_data *ahc; - int s; - - s = splhigh(); - - if (!(scb->flags & SCB_ACTIVE)) { - /* Previous timeout took care of me already */ - splx(s); - return; - } - - ahc = (struct ahc_data *)scb->xs->sc_link->adapter_softc; - printf("ahc%d: target %d, lun %d (%s%d) timed out\n", ahc->unit - ,scb->xs->sc_link->target - ,scb->xs->sc_link->lun - ,scb->xs->sc_link->device->name - ,scb->xs->sc_link->dev_unit); -#ifdef SCSIDEBUG - show_scsi_cmd(scb->xs); -#endif -#ifdef AHC_DEBUG - if (ahc_debug & AHC_SHOWSCBS) - ahc_print_active_scb(ahc); -#endif /*AHC_DEBUG */ - - /* - * If it's immediate, don't try to abort it - */ - if (scb->flags & SCB_IMMED) { - scb->xs->retries = 0; /* I MEAN IT ! */ - ahc_done(ahc, scb); - } - else { - /* abort the operation that has timed out */ - ahc_scb_timeout(ahc, scb); - } splx(s); } /* * The device at the given target/channel has been reset. Abort * all active and queued scbs for that target/channel. */ static int ahc_reset_device(ahc, target, channel, timedout_scb, xs_error) struct ahc_data *ahc; int target; char channel; u_char timedout_scb; - u_int32 xs_error; + u_int32_t xs_error; { u_long iobase = ahc->baseport; struct scb *scbp; u_char active_scb; int i = 0; int found = 0; /* restore this when we're done */ active_scb = inb(SCBPTR + iobase); /* * Search the QINFIFO. */ { int saved_queue[AHC_SCB_MAX]; int queued = inb(QINCNT + iobase); for (i = 0; i < (queued - found); i++) { saved_queue[i] = inb(QINFIFO + iobase); scbp = ahc->scbarray[saved_queue[i]]; if (ahc_match_scb (scbp, target, channel)){ /* * We found an scb that needs to be aborted. */ - scbp->flags |= SCB_ABORTED; + scbp->flags = SCB_ABORTED|SCB_QUEUED_FOR_DONE; scbp->xs->error |= xs_error; if(scbp->position != timedout_scb) untimeout(ahc_timeout, (caddr_t)scbp); - ahc_done (ahc, scbp); outb(SCBPTR + iobase, scbp->position); outb(SCBARRAY + iobase, 0); i--; found++; } } /* Now put the saved scbs back. */ for (queued = 0; queued < i; queued++) { outb (QINFIFO + iobase, saved_queue[queued]); } } /* * Search waiting for selection list. */ { u_char next, prev; next = inb(WAITING_SCBH + iobase); /* Start at head of list. */ prev = SCB_LIST_NULL; while (next != SCB_LIST_NULL) { scbp = ahc->scbarray[next]; /* * Select the SCB. */ if (ahc_match_scb(scbp, target, channel)) { next = ahc_abort_wscb(ahc, scbp, prev, iobase, timedout_scb, xs_error); found++; } else { outb(SCBPTR + iobase, scbp->position); prev = next; next = inb(SCB_NEXT_WAITING + iobase); } } } /* * Go through the entire SCB array now and look for * commands for this target that are active. These * are other (most likely tagged) commands that * were disconnected when the reset occured. */ for(i = 0; i < ahc->numscbs; i++) { scbp = ahc->scbarray[i]; if((scbp->flags & SCB_ACTIVE) && ahc_match_scb(scbp, target, channel)) { /* Ensure the target is "free" */ ahc_unbusy_target(target, channel, iobase); outb(SCBPTR + iobase, scbp->position); outb(SCBARRAY + iobase, 0); - scbp->flags |= SCB_ABORTED; + scbp->flags = SCB_ABORTED|SCB_QUEUED_FOR_DONE; scbp->xs->error |= xs_error; if(scbp->position != timedout_scb) untimeout(ahc_timeout, (caddr_t)scbp); - ahc_done (ahc, scbp); found++; } } outb(SCBPTR + iobase, active_scb); return found; } /* * Manipulate the waiting for selection list and return the * scb that follows the one that we remove. */ static u_char ahc_abort_wscb (ahc, scbp, prev, iobase, timedout_scb, xs_error) struct ahc_data *ahc; struct scb *scbp; u_char prev; u_long iobase; u_char timedout_scb; - u_int32 xs_error; + u_int32_t xs_error; { u_char curscbp, next; int target = ((scbp->target_channel_lun >> 4) & 0x0f); char channel = (scbp->target_channel_lun & SELBUSB) ? 'B' : 'A'; /* * Select the SCB we want to abort and * pull the next pointer out of it. */ curscbp = inb(SCBPTR + iobase); outb(SCBPTR + iobase, scbp->position); next = inb(SCB_NEXT_WAITING + iobase); /* Clear the necessary fields */ - outb(SCBARRAY + iobase, 0); + outb(SCB_CONTROL + iobase, 0); outb(SCB_NEXT_WAITING + iobase, SCB_LIST_NULL); ahc_unbusy_target(target, channel, iobase); /* update the waiting list */ if( prev == SCB_LIST_NULL ) /* First in the list */ outb(WAITING_SCBH + iobase, next); else { /* * Select the scb that pointed to us * and update its next pointer. */ outb(SCBPTR + iobase, prev); outb(SCB_NEXT_WAITING + iobase, next); } - /* Update the tale pointer */ - if(inb(WAITING_SCBT + iobase) == scbp->position) - outb(WAITING_SCBT + iobase, prev); - /* * Point us back at the original scb position * and inform the SCSI system that the command * has been aborted. */ outb(SCBPTR + iobase, curscbp); - scbp->flags |= SCB_ABORTED; + scbp->flags = SCB_ABORTED|SCB_QUEUED_FOR_DONE; scbp->xs->error |= xs_error; if(scbp->position != timedout_scb) untimeout(ahc_timeout, (caddr_t)scbp); - ahc_done (ahc, scbp); return next; } static void ahc_busy_target(target, channel, iobase) u_char target; char channel; u_long iobase; { u_char active; u_long active_port = ACTIVE_A + iobase; if(target > 0x07 || channel == 'B') { /* * targets on the Second channel or * above id 7 store info in byte two * of HA_ACTIVE */ active_port++; } active = inb(active_port); active |= (0x01 << (target & 0x07)); outb(active_port, active); } static void ahc_unbusy_target(target, channel, iobase) u_char target; char channel; u_long iobase; { u_char active; u_long active_port = ACTIVE_A + iobase; if(target > 0x07 || channel == 'B') { /* * targets on the Second channel or * above id 7 store info in byte two * of HA_ACTIVE */ active_port++; } active = inb(active_port); active &= ~(0x01 << (target & 0x07)); outb(active_port, active); } static void ahc_reset_current_bus(iobase) u_long iobase; { outb(SCSISEQ + iobase, SCSIRSTO); DELAY(1000); outb(SCSISEQ + iobase, 0); } static int -ahc_reset_channel(ahc, channel, timedout_scb, xs_error) +ahc_reset_channel(ahc, channel, timedout_scb, xs_error, initiate_reset) struct ahc_data *ahc; char channel; u_char timedout_scb; - u_int32 xs_error; + u_int32_t xs_error; + u_char initiate_reset; { u_long iobase = ahc->baseport; u_char sblkctl; char cur_channel; u_long offset, offset_max; int found; /* * Clean up all the state information for the * pending transactions on this bus. */ found = ahc_reset_device(ahc, ALL_TARGETS, channel, timedout_scb, xs_error); if(channel == 'B'){ ahc->needsdtr |= (ahc->needsdtr_orig & 0xff00); ahc->sdtrpending &= 0x00ff; outb(ACTIVE_B + iobase, 0); offset = TARG_SCRATCH + iobase + 8; offset_max = TARG_SCRATCH + iobase + 16; } else if (ahc->type & AHC_WIDE){ ahc->needsdtr = ahc->needsdtr_orig; ahc->needwdtr = ahc->needwdtr_orig; ahc->sdtrpending = 0; ahc->wdtrpending = 0; outb(ACTIVE_A + iobase, 0); outb(ACTIVE_B + iobase, 0); offset = TARG_SCRATCH + iobase; offset_max = TARG_SCRATCH + iobase + 16; } else{ ahc->needsdtr |= (ahc->needsdtr_orig & 0x00ff); ahc->sdtrpending &= 0xff00; outb(ACTIVE_A + iobase, 0); offset = TARG_SCRATCH + iobase; offset_max = TARG_SCRATCH + iobase + 8; } for(;offset < offset_max;offset++) { /* * Revert to async/narrow transfers * until we renegotiate. */ u_char targ_scratch; targ_scratch = inb(offset); targ_scratch &= SXFR; outb(offset, targ_scratch); } /* - * Reset the bus and unpause/restart the controller + * Reset the bus if we are initiating this reset and + * restart/unpause the sequencer */ - /* Case 1: Command for another bus is active */ sblkctl = inb(SBLKCTL + iobase); cur_channel = (sblkctl & SELBUSB) ? 'B' : 'A'; if(cur_channel != channel) { /* * Stealthily reset the other bus * without upsetting the current bus */ outb(SBLKCTL + iobase, sblkctl ^ SELBUSB); - ahc_reset_current_bus(iobase); + if( initiate_reset ) + { + ahc_reset_current_bus(iobase); + } + outb(CLRSINT1 + iobase, CLRSCSIRSTI); outb(SBLKCTL + iobase, sblkctl); UNPAUSE_SEQUENCER(ahc); } /* Case 2: A command from this bus is active or we're idle */ else { - ahc_reset_current_bus(iobase); + if( initiate_reset ) + { + ahc_reset_current_bus(iobase); + } + outb(CLRSINT1 + iobase, CLRSCSIRSTI); RESTART_SEQUENCER(ahc); } + ahc_run_done_queue(ahc); return found; } +void +ahc_run_done_queue(ahc) + struct ahc_data *ahc; +{ + int i; + struct scb *scbp; + + for(i = 0; i < ahc->numscbs; i++) { + scbp = ahc->scbarray[i]; + if(scbp->flags & SCB_QUEUED_FOR_DONE) + ahc_done(ahc, scbp); + } +} + static int ahc_match_scb (scb, target, channel) struct scb *scb; int target; char channel; { int targ = (scb->target_channel_lun >> 4) & 0x0f; char chan = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A'; if (target == ALL_TARGETS) return (chan == channel); else return ((chan == channel) && (targ == target)); } diff --git a/sys/i386/scsi/aic7xxx.h b/sys/i386/scsi/aic7xxx.h index f92e00307b3d..a5c0b4adb504 100644 --- a/sys/i386/scsi/aic7xxx.h +++ b/sys/i386/scsi/aic7xxx.h @@ -1,204 +1,207 @@ /* * Interface to the generic driver for the aic7xxx based adaptec * SCSI controllers. This is used to implement product specific * probe and attach routines. * * Copyright (c) 1994, 1995, 1996 Justin T. Gibbs. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice immediately at the beginning of the file, without modification, * this list of conditions, and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Absolutely no warranty of function or purpose is made by the author * Justin T. Gibbs. * 4. Modifications may be freely made to this file if the above conditions * are met. * - * $Id: aic7xxx.h,v 1.20 1996/01/29 03:17:39 gibbs Exp $ + * $Id: aic7xxx.h,v 1.21 1996/01/30 22:56:41 mpp Exp $ */ #ifndef _AIC7XXX_H_ #define _AIC7XXX_H_ #include "ahc.h" /* for NAHC from config */ #define AHC_NSEG 256 /* number of dma segments supported */ #define AHC_SCB_MAX 255 /* * Up to 255 SCBs on some types of aic7xxx * based boards. The aic7870 have 16 internal * SCBs, but external SRAM bumps this to 255. * The aic7770 family have only 4, and the * aic7850 has only 3. */ /* #define AHCDEBUG */ extern int bootverbose; typedef unsigned long int physaddr; extern u_long ahc_unit; struct ahc_dma_seg { physaddr addr; long len; }; typedef enum { AHC_NONE = 0x000, AHC_ULTRA = 0x001, /* Supports 20MHz Transfers */ AHC_WIDE = 0x002, /* Wide Channel */ AHC_TWIN = 0x008, /* Twin Channel */ AHC_AIC7770 = 0x010, AHC_AIC7850 = 0x020, AHC_AIC7870 = 0x040, AHC_AIC7880 = 0x041, AHC_AIC78X0 = 0x060, /* PCI Based Controller */ AHC_274 = 0x110, /* EISA Based Controller */ AHC_284 = 0x210, /* VL/ISA Based Controller */ AHC_294 = 0x440, /* PCI Based Controller */ AHC_294U = 0x441, /* ULTRA PCI Based Controller */ AHC_394 = 0x840, /* Twin Channel PCI Controller */ AHC_394U = 0x841, /* Twin, ULTRA Channel PCI Controller */ }ahc_type; typedef enum { AHC_FNONE = 0x00, AHC_INIT = 0x01, AHC_RUNNING = 0x02, AHC_USEDEFAULTS = 0x04, /* * For cards without an seeprom * or a BIOS to initialize the chip's * SRAM, we use the default chip and * target settings. */ AHC_EXTSCB = 0x10, /* External SCBs present */ AHC_CHNLB = 0x20, /* * Second controller on 3940 * Also encodes the offset in the * SEEPROM for CHNLB info (32) */ }ahc_flag; /* * The driver keeps up to MAX_SCB scb structures per card in memory. Only the * first 26 bytes of the structure need to be transfered to the card during * normal operation. The remaining fields (next_waiting and host_scb) are * initialized the first time an SCB is allocated in get_scb(). The fields * starting at byte 32 are used for kernel level bookkeeping. */ struct scb { /* ------------ Begin hardware supported fields ---------------- */ /*0*/ u_char control; /*1*/ u_char target_channel_lun; /* 4/1/3 bits */ /*2*/ u_char target_status; /*3*/ u_char SG_segment_count; /*4*/ physaddr SG_list_pointer; /*8*/ u_char residual_SG_segment_count; /*9*/ u_char residual_data_count[3]; /*12*/ physaddr data; /*16*/ u_long datalen; /* Really only three bits, but its * faster to treat it as a long on * a quad boundary. */ /*20*/ physaddr cmdpointer; /*24*/ u_char cmdlen; #define SCB_PIO_TRANSFER_SIZE 25 /* amount we need to upload/download * via PIO to initialize a transaction. */ /*25*/ u_char next_waiting; /* Used to thread SCBs awaiting * selection */ /*-----------------end of hardware supported fields----------------*/ struct scb *next; /* in free list */ struct scsi_xfer *xs; /* the scsi_xfer for this cmd */ int flags; #define SCB_FREE 0x00 #define SCB_ACTIVE 0x01 #define SCB_ABORTED 0x02 #define SCB_DEVICE_RESET 0x04 #define SCB_IMMED 0x08 #define SCB_SENSE 0x10 +#define SCB_TIMEDOUT 0x20 +#define SCB_QUEUED_FOR_DONE 0x40 int position; /* Position in scbarray */ struct ahc_dma_seg ahc_dma[AHC_NSEG] __attribute__ ((packed)); struct scsi_sense sense_cmd; /* SCSI command block */ }; struct ahc_data { int unit; ahc_type type; ahc_flag flags; u_long baseport; struct scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */ struct scb *free_scb; int our_id; /* our scsi id */ int our_id_b; /* B channel scsi id */ int vect; struct scb *immed_ecb; /* an outstanding immediate command */ struct scsi_link sc_link; struct scsi_link sc_link_b; /* Second bus for Twin channel cards */ u_short needsdtr_orig; /* Targets we initiate sync neg with */ u_short needwdtr_orig; /* Targets we initiate wide neg with */ u_short needsdtr; /* Current list of negotiated targets */ u_short needwdtr; /* Current list of negotiated targets */ u_short sdtrpending; /* Pending SDTR to these targets */ u_short wdtrpending; /* Pending WDTR to these targets */ u_short tagenable; /* Targets that can handle tagqueing */ u_short discenable; /* Targets allowed to disconnect */ int numscbs; int activescbs; u_char maxscbs; u_char unpause; u_char pause; + u_char in_timeout; }; /* Different debugging levels used when AHC_DEBUG is defined */ #define AHC_SHOWMISC 0x0001 #define AHC_SHOWCMDS 0x0002 #define AHC_SHOWSCBS 0x0004 #define AHC_SHOWABORTS 0x0008 #define AHC_SHOWSENSE 0x0010 #define AHC_SHOWSCBCNT 0x0020 /* #define AHC_DEBUG */ extern int ahc_debug; /* Initialized in i386/scsi/aic7xxx.c */ /* * Since the sequencer can disable pausing in a critical section, we * must loop until it actually stops. * XXX Should add a timeout in here?? */ #define PAUSE_SEQUENCER(ahc) \ outb(HCNTRL + ahc->baseport, ahc->pause); \ \ while ((inb(HCNTRL + ahc->baseport) & PAUSE) == 0) \ ; #define UNPAUSE_SEQUENCER(ahc) \ outb( HCNTRL + ahc->baseport, ahc->unpause ) /* * Restart the sequencer program from address zero */ #define RESTART_SEQUENCER(ahc) \ do { \ outb( SEQCTL + ahc->baseport, SEQRESET|FASTMODE ); \ } while (inb(SEQADDR0 + ahc->baseport) != 0 && \ inb(SEQADDR1 + ahc->baseport != 0)); \ \ UNPAUSE_SEQUENCER(ahc); void ahc_reset __P((u_long iobase)); struct ahc_data *ahc_alloc __P((int unit, u_long io_base, ahc_type type, ahc_flag flags)); void ahc_free __P((struct ahc_data *)); int ahc_init __P((struct ahc_data *)); int ahc_attach __P((struct ahc_data *)); void ahc_intr __P((void *arg)); #endif /* _AIC7XXX_H_ */ diff --git a/sys/i386/scsi/bt.c b/sys/i386/scsi/bt.c index de69febed786..3d7b6fa399a2 100644 --- a/sys/i386/scsi/bt.c +++ b/sys/i386/scsi/bt.c @@ -1,1571 +1,1571 @@ /* * Written by Julian Elischer (julian@tfs.com) * for TRW Financial Systems for use under the MACH(2.5) operating system. * * TRW Financial Systems, in accordance with their agreement with Carnegie * Mellon University, makes this software available to CMU to distribute * or use in any manner that they see fit as long as this message is kept with * the software. For this reason TFS also grants any other persons or * organisations permission to use or modify this software. * * TFS supplies this software to be publicly redistributed * on the understanding that TFS is not responsible for the correct * functioning of this software in any circumstances. * - * $Id: bt.c,v 1.6 1996/02/16 17:23:56 gibbs Exp $ + * $Id: bt.c,v 1.7 1996/02/18 07:45:36 gibbs Exp $ */ /* * Bulogic/Bustek 32 bit Addressing Mode SCSI driver. * * NOTE: 1. Some bt5xx card can NOT handle 32 bit addressing mode. * 2. OLD bt445s Revision A,B,C,D(nowired) + any firmware version * has broken busmaster for handling 32 bit addressing on H/W bus * side. * * 3. Extended probing still needs confirmation from our user base, due * to several H/W and firmware dependencies. If you have a problem * with extended probing, please contact 'amurai@spec.co.jp' * * amurai@spec.co.jp 94/6/16 */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include struct bt_data *btdata[NBT]; /* * I/O Port Interface */ #define BT_BASE bt->bt_base #define BT_CTRL_STAT_PORT (BT_BASE + 0x0) /* control & status */ /* ReadOps WriteOps */ #define BT_HRST 0x80 /* Hardware reset */ #define BT_SRST 0x40 /* Software reset */ #define BT_IRST 0x20 /* Interrupt reset */ #define BT_SCRST 0x10 /* SCSI bus reset */ #define BT_STST 0x80 /* Self test in Progress */ #define BT_DIAGF 0x40 /* Diagnostic Failure */ #define BT_INIT 0x20 /* Mbx Init required */ #define BT_IDLE 0x10 /* Host Adapter Idle */ #define BT_CDF 0x08 /* cmd/data out port full */ #define BT_DF 0x04 /* Data in port full */ #define BT_INVDCMD 0x01 /* Invalid command */ #define BT_STAT_MASK \ (BT_STST | BT_DIAGF | BT_INIT | BT_IDLE | BT_CDF | BT_DF | BT_INVDCMD) #define BT_CMD_DATA_PORT (BT_BASE + 0x1) /* cmds and datas */ /* ReadOps WriteOps */ #define BT_NOP 0x00 /* No operation */ #define BT_MBX_INIT 0x01 /* Mbx initialization */ #define BT_START_SCSI 0x02 /* start scsi command */ #define BT_START_BIOS 0x03 /* start bios command */ #define BT_INQUIRE 0x04 /* Adapter Inquiry */ #define BT_MBO_INTR_EN 0x05 /* Enable MBO available intr */ #define BT_SEL_TIMEOUT_SET 0x06 /* set selection time-out */ #define BT_BUS_ON_TIME_SET 0x07 /* set bus-on time */ #define BT_BUS_OFF_TIME_SET 0x08 /* set bus-off time */ #define BT_SPEED_SET 0x09 /* set transfer speed */ #define BT_DEV_GET 0x0a /* return installed devices */ #define BT_CONF_GET 0x0b /* return configuration data */ #define BT_TARGET_EN 0x0c /* enable target mode */ #define BT_SETUP_GET 0x0d /* return setup data */ #define BT_WRITE_CH2 0x1a /* write channel 2 buffer */ #define BT_READ_CH2 0x1b /* read channel 2 buffer */ #define BT_WRITE_FIFO 0x1c /* write fifo buffer */ #define BT_READ_FIFO 0x1d /* read fifo buffer */ #define BT_ECHO 0x1e /* Echo command data */ #define BT_MBX_INIT_EXTENDED 0x81 /* Mbx initialization */ #define BT_INQUIRE_REV_THIRD 0x84 /* Get FirmWare version #3 */ #define BT_INQUIRE_REV_FOURTH 0x85 /* Get FirmWare version #4 */ #define BT_INQUIRE_EXTENDED 0x8D /* Adapter Setup Inquiry */ /* The following commands appeared at FirmWare 3.31 */ #define BT_ROUND_ROBIN 0x8f /* Enable/Disable round robin */ #define BT_STRICT_ROUND_ROBIN 0x00 /* Parameter for strict mode */ #define BT_AGRES_ROUND_ROBIN 0x01 /* Parameter for back compat */ #define BT_INTR_PORT (BT_BASE + 0x2) /* Intr. stat */ /* ReadOps WriteOps */ #define BT_ANY_INTR 0x80 /* Any interrupt */ #define BT_SCRD 0x08 /* SCSI reset detected */ #define BT_HACC 0x04 /* Command complete */ #define BT_MBOA 0x02 /* MBX out empty */ #define BT_MBIF 0x01 /* MBX in full */ struct bt_cmd_buf { u_char byte[16]; }; #define CCB_HASH_SHIFT 9 /* only hash on multiples of 512 */ #define CCB_HASH(x) ((((long int)(x))>>CCB_HASH_SHIFT) % CCB_HASH_SIZE) #define bt_nextmbx( wmb, mbx, mbio ) \ if ( (wmb) == &((mbx)->mbio[BT_MBX_SIZE - 1 ]) ) \ (wmb) = &((mbx)->mbio[0]); \ else \ (wmb)++; struct bt_boardID { u_char board_type; u_char custom_feture; char firm_revision; u_char firm_version; }; struct bt_setup { u_char sync_neg:1; u_char parity:1; u_char :6; u_char speed; u_char bus_on; u_char bus_off; u_char num_mbx; u_char mbx[3]; /* for backwards compatibility */ struct { u_char offset:4; u_char period:3; u_char valid:1; } sync[8]; u_char disc_sts; }; struct bt_config { u_char chan; #define BUSDMA 0x00 #define CHAN0 0x01 #define CHAN5 0x20 #define CHAN6 0x40 #define CHAN7 0x80 u_char intr; #define INT9 0x01 #define INT10 0x02 #define INT11 0x04 #define INT12 0x08 #define INT14 0x20 #define INT15 0x40 u_char scsi_dev:3; /* XXX What about Wide Controllers? */ u_char :5; }; /* * Determine 32bit address/Data firmware functionality from the bus type * Note: bt742a/747[s|d]/757/946/445s will return 'E' * bt542b/545s/545d will return 'A' * 94/05/18 amurai@spec.co.jp */ struct bt_ext_info { u_char bus_type; /* Host adapter bus type */ #define BT_BUS_TYPE_24bit 'A' /* PC/AT 24 bit address bus type */ #define BT_BUS_TYPE_32bit 'E' /* EISA/VLB/PCI 32 bit address type */ #define BT_BUS_TYPE_MCA 'M' /* Micro chanel? */ u_char bios_addr; /* Bios Address-Not used */ u_short max_seg; /* Max segment List */ u_char num_mbx; /* Number of mailbox */ - int32 mbx_base; /* mailbox base address */ + int32_t mbx_base; /* mailbox base address */ struct { u_char resv1:1; /* ??? */ u_char force:1; /* ON: force sync */ u_char maxsync:1; /* ON: 10MB/s , OFF: 5MB/s */ u_char resv2:2; /* ??? */ u_char sync:1; /* ON: Sync, OFF: async ONLY!! */ u_char resv3:2; /* ??? */ } s; u_char firmid[3]; /* Firmware ver. & rev. w/o last char */ }; #define BT_GET_BOARD_INFO 0x8b /* Get H/W ID and Revision */ struct bt_board_info { u_char id[4]; /* i.e bt742a -> '7','4','2','A' */ u_char ver[2]; /* i.e Board Revision 'H' -> 'H', 0x00 */ }; #define BT_GET_SYNC_VALUE 0x8c /* Get Synchronous Value */ struct bt_sync_value { u_char value[8]; /* Synchrnous value (value * 10 nsec) */ }; #define KVTOPHYS(x) vtophys(x) #define PAGESIZ 4096 #define INVALIDATE_CACHE {asm volatile( ".byte 0x0F ;.byte 0x08" ); } /***********debug values *************/ #define BT_SHOWCCBS 0x01 #define BT_SHOWINTS 0x02 #define BT_SHOWCMDS 0x04 #define BT_SHOWMISC 0x08 static int bt_debug = 0; SYSCTL_INT(_debug, OID_AUTO, bt_debug, CTLFLAG_RW, &bt_debug, 0, ""); -static u_int32 bt_adapter_info __P((int unit)); +static u_int32_t bt_adapter_info __P((int unit)); static struct bt_ccb * bt_ccb_phys_kv __P((struct bt_data *bt, physaddr ccb_phys)); #ifdef notyet static int bt_cmd __P((int unit, int icnt, int ocnt, int wait, u_char *retval, unsigned opcode, ...)); #else static int bt_cmd(); #endif static void bt_done __P((struct bt_data *bt, struct bt_ccb *ccb)); static void bt_free_ccb __P((struct bt_data *bt, struct bt_ccb *ccb, int flags)); static struct bt_ccb * bt_get_ccb __P((struct bt_data *bt, int flags)); static void bt_inquire_setup_information __P((struct bt_data *bt, struct bt_ext_info *info)); static void btminphys __P((struct buf *bp)); static int bt_poll __P((struct bt_data *bt, struct scsi_xfer *xs, struct bt_ccb *ccb)); #ifdef UTEST static void bt_print_active_ccbs __P((int unit)); static void bt_print_ccb __P((struct bt_ccb *ccb)); #endif -static int32 bt_scsi_cmd __P((struct scsi_xfer *xs)); +static int32_t bt_scsi_cmd __P((struct scsi_xfer *xs)); static BT_MBO * bt_send_mbo __P((struct bt_data *bt, int flags, int cmd, struct bt_ccb *ccb)); static timeout_t bt_timeout; u_long bt_unit = 0; static int btprobing = 1; /* * XXX * Do our own re-probe protection until a configuration * manager can do it for us. This ensures that we don't * reprobe a card already found by the EISA or PCI probes. */ struct bt_found { u_long port; char probed; }; static struct bt_found found[] = { { 0x330, 0 }, { 0x334, 0 }, { 0x230, 0 }, { 0x234, 0 }, { 0x130, 0 }, { 0x134, 0 } }; static struct scsi_adapter bt_switch = { bt_scsi_cmd, btminphys, 0, 0, bt_adapter_info, "bt", { 0, 0 } }; /* the below structure is so we have a default dev struct for out link struct */ static struct scsi_device bt_dev = { NULL, /* Use default error handler */ NULL, /* have a queue, served by this */ NULL, /* have no async handler */ NULL, /* Use default 'done' routine */ "bt", 0, { 0, 0 } }; #define BT_RESET_TIMEOUT 1000 /* * bt_cmd(bt, icnt, ocnt, wait, retval, opcode, args) * * Activate Adapter command * icnt: number of args (outbound bytes written after opcode) * ocnt: number of expected returned bytes * wait: number of seconds to wait for response * retval: buffer where to place returned bytes * opcode: opcode BT_NOP, BT_MBX_INIT, BT_START_SCSI ... * args: parameters * * Performs an adapter command through the ports. Not to be confused with a * scsi command, which is read in via the dma; one of the adapter commands * tells it to read in a scsi command. */ static int bt_cmd(bt, icnt, ocnt, wait, retval, opcode, args) struct bt_data* bt; int icnt; int ocnt; int wait; u_char *retval; unsigned opcode; u_char args; { unsigned *ic = &opcode; u_char oc; register i; int sts; /* * multiply the wait argument by a big constant * zero defaults to 1 */ if (wait) wait *= 100000; else wait = 100000; /* * Wait for the adapter to go idle, unless it's one of * the commands which don't need this */ if (opcode != BT_MBX_INIT && opcode != BT_START_SCSI) { i = 100000; /* 1 sec? */ while (--i) { sts = inb(BT_CTRL_STAT_PORT); if (sts & BT_IDLE) { break; } DELAY(10); } if (i == 0) { if(!btprobing) printf("bt%d: bt_cmd, host not idle(0x%x)\n", bt->unit, sts); return (ENXIO); } } /* * Now that it is idle, if we expect output, preflush the * queue feeding to us. */ if (ocnt) { while ((inb(BT_CTRL_STAT_PORT)) & BT_DF) inb(BT_CMD_DATA_PORT); } /* * Output the command and the number of arguments given * for each byte, first check the port is empty. */ icnt++; /* include the command */ while (icnt--) { sts = inb(BT_CTRL_STAT_PORT); for (i = wait; i; i--) { sts = inb(BT_CTRL_STAT_PORT); if (!(sts & BT_CDF)) break; DELAY(10); } if (i == 0) { if(!btprobing) printf("bt%d: bt_cmd, cmd/data port full\n", bt->unit); outb(BT_CTRL_STAT_PORT, BT_SRST); return (ENXIO); } outb(BT_CMD_DATA_PORT, (u_char) (*ic++)); } /* * If we expect input, loop that many times, each time, * looking for the data register to have valid data */ while (ocnt--) { sts = inb(BT_CTRL_STAT_PORT); for (i = wait; i; i--) { sts = inb(BT_CTRL_STAT_PORT); if (sts & BT_DF) break; DELAY(10); } if (i == 0) { if(!btprobing) printf("bt%d: bt_cmd, cmd/data port empty %d\n", bt->unit, ocnt); return (ENXIO); } oc = inb(BT_CMD_DATA_PORT); if (retval) *retval++ = oc; } /* * Wait for the board to report a finised instruction */ i = 100000; /* 1 sec? */ while (--i) { sts = inb(BT_INTR_PORT); if (sts & BT_HACC) { break; } DELAY(10); } if (i == 0) { if(!btprobing) printf("bt%d: bt_cmd, host not finished(0x%x)\n", bt->unit, sts); return (ENXIO); } outb(BT_CTRL_STAT_PORT, BT_IRST); return (0); } struct bt_data * bt_alloc(unit, iobase) int unit; u_long iobase; { struct bt_data *bt; int i; if (unit >= NBT) { printf("bt: unit number (%d) too high\n", unit); return NULL; } /* * Allocate a storage area for us */ if (btdata[unit]) { printf("bt%d: memory already allocated\n", unit); return NULL; } /* * Ensure that we haven't already been probed */ for (i=0; i < sizeof(found)/sizeof(struct bt_found); i++) { if (found[i].port == iobase) { if (found[i].probed) return NULL; else { found[i].probed = 1; break; } } } bt = malloc(sizeof(struct bt_data), M_DEVBUF, M_NOWAIT); if (!bt) { printf("bt%d: cannot malloc!\n", unit); return NULL; } bzero(bt, sizeof(struct bt_data)); btdata[unit] = bt; bt->unit = unit; bt->bt_base = iobase; return(bt); } void bt_free(bt) struct bt_data *bt; { btdata[bt->unit] = NULL; free(bt, M_DEVBUF); return; } int bt_attach(bt) struct bt_data *bt; { struct scsibus_data *scbus; btprobing = 0; /* * fill in the prototype scsi_link. */ bt->sc_link.adapter_unit = bt->unit; bt->sc_link.adapter_targ = bt->bt_scsi_dev; bt->sc_link.adapter_softc = bt; bt->sc_link.adapter = &bt_switch; bt->sc_link.device = &bt_dev; bt->sc_link.flags = bt->bt_bounce ? SDEV_BOUNCE : 0; /* * Prepare the scsibus_data area for the upperlevel * scsi code. */ scbus = scsi_alloc_bus(); /* XXX scbus->magtarg should be adjusted for Wide cards */ if(!scbus) return 0; scbus->adapter_link = &bt->sc_link; /* * ask the adapter what subunits are present */ scsi_attachdevs(scbus); return 1; } /* * Return some information to the caller about the adapter and its * capabilities. */ -static u_int32 +static u_int32_t bt_adapter_info(unit) int unit; { return (2); /* 2 outstanding requests at a time per device */ } /* * Catch an interrupt from the adaptor */ void bt_intr(arg) void *arg; { BT_MBI *wmbi; struct bt_mbx *wmbx; struct bt_ccb *ccb; unsigned char stat; int i, wait; int found = 0; struct bt_data *bt; bt = (struct bt_data *)arg; #ifdef UTEST printf("bt_intr "); #endif /* * First acknowlege the interrupt, Then if it's * not telling about a completed operation * just return. */ stat = inb(BT_INTR_PORT); if((stat & BT_STAT_MASK) == 0) { /* Shared interrupt */ return; } /* Mail Box out empty ? */ if (stat & BT_MBOA) { printf("bt%d: Available Free mbo post\n", bt->unit); /* Disable MBO available interrupt */ outb(BT_CMD_DATA_PORT, BT_MBO_INTR_EN); wait = 100000; /* 1 sec enough? */ for (i = wait; i; i--) { if (!(inb(BT_CTRL_STAT_PORT) & BT_CDF)) break; DELAY(10); } if (i == 0) { printf("bt%d: bt_intr, cmd/data port full\n", bt->unit); outb(BT_CTRL_STAT_PORT, BT_SRST); return; } outb(BT_CMD_DATA_PORT, 0x00); /* Disable */ wakeup((caddr_t)&bt->bt_mbx); outb(BT_CTRL_STAT_PORT, BT_IRST); return; } if (!(stat & BT_MBIF)) { outb(BT_CTRL_STAT_PORT, BT_IRST); return; } /* * If it IS then process the competed operation */ wmbx = &bt->bt_mbx; wmbi = wmbx->tmbi; AGAIN: while (wmbi->stat != BT_MBI_FREE) { ccb = bt_ccb_phys_kv(bt, (wmbi->ccb_addr)); if (!ccb) { wmbi->stat = BT_MBI_FREE; printf("bt: BAD CCB ADDR!\n"); continue; } found++; if ((stat = wmbi->stat) != BT_MBI_OK) { switch (stat) { case BT_MBI_ABORT: #ifdef UTEST if (bt_debug & BT_SHOWMISC) printf("abort "); #endif ccb->host_stat = BT_ABORTED; break; case BT_MBI_UNKNOWN: ccb = (struct bt_ccb *) 0; #ifdef UTEST if (bt_debug & BT_SHOWMISC) printf("unknown ccb for abort"); #endif break; case BT_MBI_ERROR: break; default: panic("Impossible mbxi status"); } #ifdef UTEST if ((bt_debug & BT_SHOWCMDS) && ccb) { u_char *cp; cp = ccb->scsi_cmd; printf("op=%x %x %x %x %x %x\n", cp[0], cp[1], cp[2], cp[3], cp[4], cp[5]); printf("stat %x for mbi addr = 0x%08x\n" ,wmbi->stat, wmbi); printf("addr = 0x%x\n", ccb); } #endif } wmbi->stat = BT_MBI_FREE; if (ccb) { untimeout(bt_timeout, (caddr_t)ccb); bt_done(bt, ccb); } /* Set the IN mail Box pointer for next */ bt_nextmbx(wmbi, wmbx, mbi); } if (!found) { for (i = 0; i < BT_MBX_SIZE; i++) { if (wmbi->stat != BT_MBI_FREE) { found++; break; } bt_nextmbx(wmbi, wmbx, mbi); } if (!found) { #ifdef DEBUG printf("bt%d: mbi at 0x%08x should be found, stat=%02x..resync\n", bt->unit, wmbi, stat); #endif } else { found = 0; goto AGAIN; } } wmbx->tmbi = wmbi; outb(BT_CTRL_STAT_PORT, BT_IRST); } /* * A ccb is put onto the free list. */ static void bt_free_ccb(bt, ccb, flags) struct bt_data *bt; struct bt_ccb *ccb; int flags; { unsigned int opri; opri = splbio(); ccb->next = bt->bt_ccb_free; bt->bt_ccb_free = ccb; ccb->flags = CCB_FREE; /* * If there were none, wake anybody waiting for one to come free, * starting with queued entries. */ if (!ccb->next) { wakeup((caddr_t)&bt->bt_ccb_free); } splx(opri); } /* * Get a free ccb * * If there are none, see if we can allocate a new one. If so, put it in * the hash table too otherwise either return an error or sleep. */ static struct bt_ccb * bt_get_ccb(bt, flags) struct bt_data *bt; int flags; { unsigned opri; struct bt_ccb *ccbp; int hashnum; opri = splbio(); /* * If we can and have to, sleep waiting for one to come free * but only if we can't allocate a new one. */ while (!(ccbp = bt->bt_ccb_free)) { if (bt->numccbs < BT_CCB_MAX) { if (ccbp = (struct bt_ccb *) malloc(sizeof(struct bt_ccb), M_TEMP, M_NOWAIT)) { bzero(ccbp, sizeof(struct bt_ccb)); bt->numccbs++; ccbp->flags = CCB_ACTIVE; /* * put in the phystokv hash table * Never gets taken out. */ ccbp->hashkey = KVTOPHYS(ccbp); hashnum = CCB_HASH(ccbp->hashkey); ccbp->nexthash = bt->ccbhash[hashnum]; bt->ccbhash[hashnum] = ccbp; } else { printf("bt%d: Can't malloc CCB\n", bt->unit); } goto gottit; } else { if (!(flags & SCSI_NOSLEEP)) { tsleep((caddr_t)&bt->bt_ccb_free, PRIBIO, "btccb", 0); continue; } break; } } if (ccbp) { /* Get CCB from from free list */ bt->bt_ccb_free = ccbp->next; ccbp->flags = CCB_ACTIVE; } gottit: splx(opri); return (ccbp); } /* * given a physical address, find the ccb that * it corresponds to: */ static struct bt_ccb * bt_ccb_phys_kv(bt, ccb_phys) struct bt_data *bt; physaddr ccb_phys; { int hashnum = CCB_HASH(ccb_phys); struct bt_ccb *ccbp = bt->ccbhash[hashnum]; while (ccbp) { if (ccbp->hashkey == ccb_phys) break; ccbp = ccbp->nexthash; } return ccbp; } /* * Get a MBO and then Send it */ static BT_MBO * bt_send_mbo(bt, flags, cmd, ccb) struct bt_data *bt; int flags; int cmd; struct bt_ccb *ccb; { unsigned opri; BT_MBO *wmbo; /* Mail Box Out pointer */ struct bt_mbx *wmbx; /* Mail Box pointer specified unit */ int i, wait; wmbx = &bt->bt_mbx; opri = splbio(); /* Get the Target OUT mail Box pointer and move to Next */ wmbo = wmbx->tmbo; wmbx->tmbo = (wmbo == &(wmbx->mbo[BT_MBX_SIZE - 1]) ? &(wmbx->mbo[0]) : wmbo + 1); /* * Check the outmail box is free or not. * Note: Under the normal operation, it shuld NOT happen to wait. */ while (wmbo->cmd != BT_MBO_FREE) { wait = 100000; /* 1 sec enough? */ /* Enable MBO available interrupt */ outb(BT_CMD_DATA_PORT, BT_MBO_INTR_EN); for (i = wait; i; i--) { if (!(inb(BT_CTRL_STAT_PORT) & BT_CDF)) break; DELAY(10); } if (i == 0) { printf("bt%d: bt_send_mbo, cmd/data port full\n", bt->unit); outb(BT_CTRL_STAT_PORT, BT_SRST); return ((BT_MBO *) 0); } outb(BT_CMD_DATA_PORT, 0x01); /* Enable */ tsleep((caddr_t)wmbx, PRIBIO, "btsend", 0); /* XXX */ /*can't do this! */ /* May be servicing an int */ } /* Link CCB to the Mail Box */ wmbo->ccb_addr = KVTOPHYS(ccb); ccb->mbx = wmbo; wmbo->cmd = cmd; /* Send it! */ outb(BT_CMD_DATA_PORT, BT_START_SCSI); splx(opri); return (wmbo); } /* * We have a ccb which has been processed by the * adaptor, now we look to see how the operation * went. Wake up the owner if waiting */ static void bt_done(bt, ccb) struct bt_data *bt; struct bt_ccb *ccb; { struct scsi_sense_data *s1, *s2; struct scsi_xfer *xs = ccb->xfer; SC_DEBUG(xs->sc_link, SDEV_DB2, ("bt_done\n")); /* * Otherwise, put the results of the operation * into the xfer and call whoever started it */ if ((ccb->host_stat != BT_OK || ccb->target_stat != SCSI_OK) && (!(xs->flags & SCSI_ERR_OK))) { s1 = &(ccb->scsi_sense); s2 = &(xs->sense); if (ccb->host_stat) { switch (ccb->host_stat) { case BT_ABORTED: /* No response */ case BT_SEL_TIMEOUT: /* No response */ SC_DEBUG(xs->sc_link, SDEV_DB3, ("timeout reported back\n")); xs->error = XS_TIMEOUT; break; default: /* Other scsi protocol messes */ xs->error = XS_DRIVER_STUFFUP; SC_DEBUG(xs->sc_link, SDEV_DB3, ("unexpected host_stat: %x\n", ccb->host_stat)); } } else { switch (ccb->target_stat) { case 0x02: *s2 = *s1; xs->error = XS_SENSE; break; case 0x08: xs->error = XS_BUSY; break; default: SC_DEBUG(xs->sc_link, SDEV_DB3, ("unexpected target_stat: %x\n", ccb->target_stat)); xs->error = XS_DRIVER_STUFFUP; } } } else { /* All went correctly OR errors expected */ xs->resid = 0; } xs->flags |= ITSDONE; bt_free_ccb(bt, ccb, xs->flags); scsi_done(xs); } /* * Start the board, ready for normal operation */ int bt_init(bt) struct bt_data* bt; { unsigned char ad[4]; volatile int i, sts; struct bt_config conf; struct bt_ext_info info; struct bt_board_info binfo; /* * reset board, If it doesn't respond, assume * that it's not there.. good for the probe */ outb(BT_CTRL_STAT_PORT, BT_HRST | BT_SRST); DELAY(10000); for (i = BT_RESET_TIMEOUT; i; i--) { sts = inb(BT_CTRL_STAT_PORT); if (sts == (BT_IDLE | BT_INIT)) break; DELAY(1000); } if (i == 0) { #ifdef UTEST printf("bt_init: No answer from board\n"); #endif return (ENXIO); } DELAY(10000); /* * Displaying Board ID and Hardware Revision * 94/05/18 amurai@spec.co.jp */ i = bt_cmd(bt, 1, sizeof(binfo),0, &binfo,BT_GET_BOARD_INFO,sizeof(binfo)); if(i) return i; printf("bt%d: Bt%c%c%c%c/%c%d-", bt->unit, binfo.id[0], binfo.id[1], binfo.id[2], binfo.id[3], binfo.ver[0], (unsigned) binfo.ver[1] ); /* * Make sure board has a capability of 32bit addressing. * and Firmware also need a capability of 32bit addressing pointer * in Extended mailbox and ccb structure. * 94/05/18 amurai@spec.co.jp */ bt_cmd(bt, 1, sizeof(info),0,&info, BT_INQUIRE_EXTENDED,sizeof(info)); switch (info.bus_type) { case BT_BUS_TYPE_24bit: /* PC/AT 24 bit address bus */ printf("ISA(24bit) bus\n"); break; case BT_BUS_TYPE_32bit: /* EISA/VLB/PCI 32 bit bus */ printf("(32bit) bus\n"); break; case BT_BUS_TYPE_MCA: /* forget it right now */ printf("MCA bus architecture..."); printf("giving up\n"); return (ENXIO); break; default: printf("Unknown state..."); printf("giving up\n"); return (ENXIO); break; } if ( binfo.id[0] == '4' && binfo.id[1] == '4' && binfo.id[2] == '5' && binfo.id[3] == 'S' ) { printf("bt%d: Your card cannot DMA above 16MB boundary. Bounce buffering enabled.\n", bt->unit); bt->bt_bounce++; } else if ( binfo.id[0] == '5' ) { printf("bt%d: This driver is designed for using 32 bit addressing\n" "bt%d: mode firmware and EISA/PCI/VLB bus architectures\n" "bt%d: Bounce-buffering will be used (and is necessary)\n" "bt%d: if you have more than 16MBytes memory.\n", bt->unit, bt->unit, bt->unit, bt->unit); bt->bt_bounce++; } else if ( info.bus_type == BT_BUS_TYPE_24bit ) { printf("bt%d: Your board should report a 32bit bus architecture type..\n" "bt%d: The firmware on your board may have a problem with over\n" "bt%d: 16MBytes memory handling with this driver.\n", bt->unit, bt->unit, bt->unit); bt->bt_bounce++; } /* * Assume we have a board at this stage * setup dma channel from jumpers and save int * level */ printf("bt%d: reading board settings, ", bt->unit); bt_cmd(bt, 0, sizeof(conf), 0, &conf, BT_CONF_GET); switch (conf.chan) { case BUSDMA: bt->bt_dma = -1; break; case CHAN0: outb(0x0b, 0x0c); outb(0x0a, 0x00); bt->bt_dma = 0; break; case CHAN5: outb(0xd6, 0xc1); outb(0xd4, 0x01); bt->bt_dma = 5; break; case CHAN6: outb(0xd6, 0xc2); outb(0xd4, 0x02); bt->bt_dma = 6; break; case CHAN7: outb(0xd6, 0xc3); outb(0xd4, 0x03); bt->bt_dma = 7; break; default: printf("illegal dma setting %x\n", conf.chan); return (EIO); } if (bt->bt_dma == -1) printf("busmastering, "); else printf("dma=%d, ", bt->bt_dma); switch (conf.intr) { case INT9: bt->bt_int = 9; break; case INT10: bt->bt_int = 10; break; case INT11: bt->bt_int = 11; break; case INT12: bt->bt_int = 12; break; case INT14: bt->bt_int = 14; break; case INT15: bt->bt_int = 15; break; default: printf("illegal int setting\n"); return (EIO); } printf("int=%d\n", bt->bt_int); /* who are we on the scsi bus */ bt->bt_scsi_dev = conf.scsi_dev; /* * Initialize mail box */ *((physaddr *) ad) = KVTOPHYS(&bt->bt_mbx); bt_cmd(bt, 5, 0, 0, 0, BT_MBX_INIT_EXTENDED ,BT_MBX_SIZE ,ad[0] ,ad[1] ,ad[2] ,ad[3]); /* * Set Pointer chain null for just in case * Link the ccb's into a free-list W/O mbox * Initialize mail box status to free */ if (bt->bt_ccb_free != (struct bt_ccb *) 0) { printf("bt%d: bt_ccb_free is NOT initialized but init here\n", bt->unit); bt->bt_ccb_free = (struct bt_ccb *) 0; } for (i = 0; i < BT_MBX_SIZE; i++) { bt->bt_mbx.mbo[i].cmd = BT_MBO_FREE; bt->bt_mbx.mbi[i].stat = BT_MBI_FREE; } /* * Set up initial mail box for round-robin operation. */ bt->bt_mbx.tmbo = &bt->bt_mbx.mbo[0]; bt->bt_mbx.tmbi = &bt->bt_mbx.mbi[0]; bt_inquire_setup_information(bt, &info); /* * Note that we are going and return (to probe) */ return 0; } static void bt_inquire_setup_information(bt, info) struct bt_data* bt; struct bt_ext_info *info; { struct bt_setup setup; struct bt_sync_value sync; char dummy[8]; char sub_ver[3]; struct bt_boardID bID; int i; /* Inquire Installed Devices */ bzero( &dummy[0], sizeof(dummy) ); bt_cmd(bt, 0, sizeof(dummy), 100, &dummy[0], BT_DEV_GET); /* * If board has a capbility of Syncrhonouse mode, * Get a SCSI Synchronous value */ if (info->s.force) { /* Assume fast sync capability */ info->s.sync = 1; /* It's appear at 4.25? version */ info->s.maxsync = 1; } if ( info->s.sync ) { bt_cmd(bt, 1, sizeof(sync), 100, &sync,BT_GET_SYNC_VALUE,sizeof(sync)); } /* * Inquire Board ID to board for firmware version */ bt_cmd(bt, 0, sizeof(bID), 0, &bID, BT_INQUIRE); bt_cmd(bt, 0, 1, 0, &sub_ver[0], BT_INQUIRE_REV_THIRD ); i = ((int)(bID.firm_revision-'0')) * 10 + (int)(bID.firm_version-'0'); if ( i >= 33 ) { bt_cmd(bt, 0, 1, 0, &sub_ver[1], BT_INQUIRE_REV_FOURTH ); } else { /* * Below rev 3.3 firmware has a problem for issuing * the BT_INQUIRE_REV_FOURTH command. */ sub_ver[1]='\0'; } sub_ver[2]='\0'; if (sub_ver[1]==' ') sub_ver[1]='\0'; printf("bt%d: version %c.%c%s, ", bt->unit, bID.firm_revision, bID.firm_version, sub_ver ); /* * Obtain setup information from board. */ bt_cmd(bt, 1, sizeof(setup), 0, &setup, BT_SETUP_GET, sizeof(setup)); if (setup.sync_neg && info->s.sync ) { if ( info->s.maxsync ) { printf("fast sync, "); /* Max 10MB/s */ } else { printf("sync, "); /* Max 5MB/s */ } } else { if ( info->s.sync ) { printf("async, "); /* Never try by board */ } else { printf("async only, "); /* Doesn't has a capability on board */ } } if (setup.parity) { printf("parity, "); } else { printf("no parity, "); } printf("%d mbxs, %d ccbs\n", setup.num_mbx, BT_CCB_MAX); /* * Displayi SCSI negotiation value by each target. * amurai@spec.co.jp */ for (i = 0; i < 8; i++) { if (!setup.sync[i].valid ) continue; if ( (!setup.sync[i].offset && !setup.sync[i].period) || !info->s.sync ) { printf("bt%d: targ %d async\n", bt->unit, i); } else { printf("bt%d: targ %d sync rate=%2d.%02dMB/s(%dns), offset=%02d\n", bt->unit, i, 100 / sync.value[i], (100 % sync.value[i]) * 100 / sync.value[i], sync.value[i] * 10, setup.sync[i].offset ); } } /* * Enable round-robin scheme - appeared at firmware rev. 3.31 * Below rev 3.XX firmware has a problem for issuing * BT_ROUND_ROBIN command amurai@spec.co.jp */ if ( bID.firm_revision >= '3' ) { printf("bt%d: Using Strict Round robin scheme\n", bt->unit); bt_cmd(bt, 1, 0, 0, 0, BT_ROUND_ROBIN, BT_STRICT_ROUND_ROBIN); } else { printf("bt%d: Not using Strict Round robin scheme\n", bt->unit); } } #ifndef min #define min(x,y) (x < y ? x : y) #endif /* min */ static void btminphys(bp) struct buf *bp; { if (bp->b_bcount > ((BT_NSEG - 1) * PAGESIZ)) { bp->b_bcount = ((BT_NSEG - 1) * PAGESIZ); } } /* * start a scsi operation given the command and the data address. Also needs * the unit, target and lu. */ -static int32 +static int32_t bt_scsi_cmd(xs) struct scsi_xfer *xs; { struct bt_ccb *ccb; struct bt_scat_gath *sg; int seg; /* scatter gather seg being worked on */ int thiskv; physaddr thisphys, nextphys; int bytes_this_seg, bytes_this_page, datalen, flags; struct bt_data *bt; bt = (struct bt_data *)xs->sc_link->adapter_softc; SC_DEBUG(xs->sc_link, SDEV_DB2, ("bt_scsi_cmd\n")); /* * get a ccb (mbox-out) to use. If the transfer * is from a buf (possibly from interrupt time) * then we can't allow it to sleep */ flags = xs->flags; if (flags & ITSDONE) { printf("bt%d: Already done?\n", bt->unit); xs->flags &= ~ITSDONE; } if (!(flags & INUSE)) { printf("bt%d: Not in use?\n", bt->unit); xs->flags |= INUSE; } if (!(ccb = bt_get_ccb(bt, flags))) { xs->error = XS_DRIVER_STUFFUP; return (TRY_AGAIN_LATER); } SC_DEBUG(xs->sc_link, SDEV_DB3, ("start ccb(%p)\n", ccb)); /* * Put all the arguments for the xfer in the ccb */ ccb->xfer = xs; if (flags & SCSI_RESET) { ccb->opcode = BT_RESET_CCB; } else { /* can't use S/G if zero length */ ccb->opcode = (xs->datalen ? BT_INIT_SCAT_GATH_CCB : BT_INITIATOR_CCB); } ccb->target = xs->sc_link->target; ccb->data_out = 0; ccb->data_in = 0; ccb->lun = xs->sc_link->lun; ccb->scsi_cmd_length = xs->cmdlen; ccb->sense_ptr = KVTOPHYS(&(ccb->scsi_sense)); ccb->req_sense_length = sizeof(ccb->scsi_sense); if ((xs->datalen) && (!(flags & SCSI_RESET))) { /* can use S/G only if not zero length */ ccb->data_addr = KVTOPHYS(ccb->scat_gath); sg = ccb->scat_gath; seg = 0; #ifdef TFS if (flags & SCSI_DATA_UIO) { iovp = ((struct uio *) xs->data)->uio_iov; datalen = ((struct uio *) xs->data)->uio_iovcnt; xs->datalen = 0; while ((datalen) && (seg < BT_NSEG)) { sg->seg_addr = (physaddr) iovp->iov_base; xs->datalen += sg->seg_len = iovp->iov_len; SC_DEBUGN(xs->sc_link, SDEV_DB4, ("(0x%x@0x%x)" ,iovp->iov_len, iovp->iov_base)); sg++; iovp++; seg++; datalen--; } } else #endif /* TFS */ { /* * Set up the scatter gather block */ SC_DEBUG(xs->sc_link, SDEV_DB4, ("%ld @%p:- ", xs->datalen, xs->data)); datalen = xs->datalen; thiskv = (int) xs->data; thisphys = KVTOPHYS(thiskv); while ((datalen) && (seg < BT_NSEG)) { bytes_this_seg = 0; /* put in the base address */ sg->seg_addr = thisphys; SC_DEBUGN(xs->sc_link, SDEV_DB4, ("0x%lx", thisphys)); /* do it at least once */ nextphys = thisphys; while ((datalen) && (thisphys == nextphys)) /* * This page is contiguous (physically) with * the the last, just extend the length */ { /* how far to the end of the page */ nextphys = (thisphys & (~(PAGESIZ - 1))) + PAGESIZ; bytes_this_page = nextphys - thisphys; /**** or the data ****/ bytes_this_page = min(bytes_this_page ,datalen); bytes_this_seg += bytes_this_page; datalen -= bytes_this_page; /* get more ready for the next page */ thiskv = (thiskv & (~(PAGESIZ - 1))) + PAGESIZ; if (datalen) thisphys = KVTOPHYS(thiskv); } /* * next page isn't contiguous, finish the seg */ SC_DEBUGN(xs->sc_link, SDEV_DB4, ("(0x%x)", bytes_this_seg)); sg->seg_len = bytes_this_seg; sg++; seg++; } } /* end of iov/kv decision */ ccb->data_length = seg * sizeof(struct bt_scat_gath); SC_DEBUGN(xs->sc_link, SDEV_DB4, ("\n")); if (datalen) { /* * there's still data, must have run out of segs! */ printf("bt%d: bt_scsi_cmd, more than %d DMA segs\n", bt->unit, BT_NSEG); xs->error = XS_DRIVER_STUFFUP; bt_free_ccb(bt, ccb, flags); return (HAD_ERROR); } } else { /* No data xfer, use non S/G values */ ccb->data_addr = (physaddr) 0; ccb->data_length = 0; } ccb->link_id = 0; ccb->link_addr = (physaddr) 0; /* * Put the scsi command in the ccb and start it */ if (!(flags & SCSI_RESET)) { bcopy(xs->cmd, ccb->scsi_cmd, ccb->scsi_cmd_length); } if (bt_send_mbo(bt, flags, BT_MBO_START, ccb) == (BT_MBO *) 0) { xs->error = XS_DRIVER_STUFFUP; bt_free_ccb(bt, ccb, flags); return (TRY_AGAIN_LATER); } /* * Usually return SUCCESSFULLY QUEUED */ SC_DEBUG(xs->sc_link, SDEV_DB3, ("cmd_sent\n")); if (!(flags & SCSI_NOMASK)) { timeout(bt_timeout, (caddr_t)ccb, (xs->timeout * hz) / 1000); return (SUCCESSFULLY_QUEUED); } /* * If we can't use interrupts, poll on completion */ return (bt_poll(bt, xs, ccb)); } /* * Poll a particular unit, looking for a particular xs */ static int bt_poll(bt, xs, ccb) struct bt_data* bt; struct scsi_xfer *xs; struct bt_ccb *ccb; { int count = xs->timeout; u_char stat; /* timeouts are in msec, so we loop in 1000 usec cycles */ while (count) { /* * If we had interrupts enabled, would we * have got an interrupt? */ stat = inb(BT_INTR_PORT); if (stat & BT_ANY_INTR) { bt_intr((void *)bt); } if (xs->flags & ITSDONE) { break; } DELAY(1000); /* only happens in boot so ok */ count--; } if (count == 0) { /* * We timed out, so call the timeout handler manually, * accounting for the fact that the clock is not running yet * by taking out the clock queue entry it makes. */ bt_timeout(ccb); /* * because we are polling, take out the timeout entry * bt_timeout made */ untimeout(bt_timeout, (caddr_t)ccb); count = 2000; while (count) { /* * Once again, wait for the int bit */ stat = inb(BT_INTR_PORT); if (stat & BT_ANY_INTR) { bt_intr((void *)bt); } if (xs->flags & ITSDONE) { break; } DELAY(1000); /* only happens in boot so ok */ count--; } if (count == 0) { /* * We timed out again... This is bad. Notice that * this time there is no clock queue entry to remove. */ bt_timeout(ccb); } } if (xs->error) return (HAD_ERROR); return (COMPLETE); } static void bt_timeout(void *arg1) { struct bt_ccb * ccb = (struct bt_ccb *)arg1; int unit; struct bt_data *bt; int s = splbio(); /* * A timeout routine in kernel DONOT unlink * Entry chains when time outed....So infinity Loop.. * 94/04/20 amurai@spec.co.jp */ untimeout(bt_timeout, (caddr_t)ccb); unit = ccb->xfer->sc_link->adapter_unit; bt = btdata[unit]; #ifdef UTEST bt_print_active_ccbs(bt); #endif /* * If the ccb's mbx is not free, then the board has gone Far East? */ if (bt_ccb_phys_kv(bt, ccb->mbx->ccb_addr) == ccb && ccb->mbx->cmd != BT_MBO_FREE) { printf("bt%d: not taking commands!\n", unit); Debugger("bt742a"); } /* * If it has been through before, then * a previous abort has failed, don't * try abort again */ if (ccb->flags == CCB_ABORTED) { /* * abort timed out */ printf("bt%d: Abort Operation has timed out\n", unit); ccb->xfer->retries = 0; /* I MEAN IT ! */ ccb->host_stat = BT_ABORTED; bt_done(bt, ccb); } else { /* abort the operation that has timed out */ printf("bt%d: Try to abort\n", unit); bt_send_mbo(bt, ~SCSI_NOMASK, BT_MBO_ABORT, ccb); /* 2 secs for the abort */ ccb->flags = CCB_ABORTED; timeout(bt_timeout, (caddr_t)ccb, 2 * hz); } splx(s); } #ifdef UTEST static void bt_print_ccb(ccb) struct bt_ccb *ccb; { printf("ccb:%x op:%x cmdlen:%d senlen:%d\n" ,ccb ,ccb->opcode ,ccb->scsi_cmd_length ,ccb->req_sense_length); printf(" datlen:%d hstat:%x tstat:%x flags:%x\n" ,ccb->data_length ,ccb->host_stat ,ccb->target_stat ,ccb->flags); } static void bt_print_active_ccbs(bt) struct bt_data *bt; { struct bt_ccb *ccb; int i = 0; while (i < CCB_HASH_SIZE) { ccb = bt->ccbhash[i]; while (ccb) { if (ccb->flags != CCB_FREE) bt_print_ccb(ccb); ccb = ccb->nexthash; } i++; } } #endif /*UTEST */