diff --git a/sys/arm64/conf/std.xilinx b/sys/arm64/conf/std.xilinx
index cc89e8575336..50ebf5ade53b 100644
--- a/sys/arm64/conf/std.xilinx
+++ b/sys/arm64/conf/std.xilinx
@@ -1,19 +1,22 @@
 #
 # Xilinx SoC support
 #
 
 # SoC support
 options 	SOC_XILINX_ZYNQ
 
 # Serial (COM) ports
 device		uart_ns8250		# ns8250-type UART driver
 device		uart_snps
 device		pl011
 
 # Ethernet NICs
 device		cgem			# Cadence GEM Gigabit Ethernet device
 
 # MMC/SD/SDIO Card slot support
 device		sdhci
 
+# IICBUS
+device		cdnc_i2c
+
 options 	FDT
diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64
index d8adc54763fc..baf8734fb38f 100644
--- a/sys/conf/files.arm64
+++ b/sys/conf/files.arm64
@@ -1,708 +1,709 @@
 
 ##
 ## Kernel
 ##
 
 kern/msi_if.m					optional intrng
 kern/pic_if.m					optional intrng
 kern/subr_devmap.c				standard
 kern/subr_intr.c				optional intrng
 kern/subr_physmem.c				standard
 libkern/strlen.c		standard
 libkern/arm64/crc32c_armv8.S			standard
 
 arm/arm/generic_timer.c				standard
 arm/arm/gic.c					standard
 arm/arm/gic_acpi.c				optional acpi
 arm/arm/gic_fdt.c				optional fdt
 arm/arm/gic_if.m				standard
 arm/arm/pmu.c					standard
 arm/arm/pmu_acpi.c				optional acpi
 arm/arm/pmu_fdt.c				optional fdt
 arm64/acpica/acpi_iort.c			optional acpi
 arm64/acpica/acpi_machdep.c			optional acpi
 arm64/acpica/OsdEnvironment.c			optional acpi
 arm64/acpica/acpi_wakeup.c			optional acpi
 arm64/acpica/pci_cfgreg.c			optional acpi pci
 arm64/arm64/autoconf.c				standard
 arm64/arm64/bus_machdep.c			standard
 arm64/arm64/bus_space_asm.S			standard
 arm64/arm64/busdma_bounce.c			standard
 arm64/arm64/busdma_machdep.c			standard
 arm64/arm64/clock.c				standard
 arm64/arm64/copyinout.S				standard
 arm64/arm64/cpu_errata.c			standard
 arm64/arm64/cpufunc_asm.S			standard
 arm64/arm64/db_disasm.c				optional ddb
 arm64/arm64/db_interface.c			optional ddb
 arm64/arm64/db_trace.c				optional ddb
 arm64/arm64/debug_monitor.c			standard
 arm64/arm64/disassem.c				optional ddb
 arm64/arm64/dump_machdep.c			standard
 arm64/arm64/efirt_machdep.c			optional efirt
 arm64/arm64/elf32_machdep.c			optional compat_freebsd32
 arm64/arm64/elf_machdep.c			standard
 arm64/arm64/exception.S				standard
 arm64/arm64/exec_machdep.c			standard
 arm64/arm64/freebsd32_machdep.c			optional compat_freebsd32
 arm64/arm64/gdb_machdep.c			optional gdb
 arm64/arm64/gicv3_its.c				optional intrng fdt
 arm64/arm64/gic_v3.c				standard
 arm64/arm64/gic_v3_acpi.c			optional acpi
 arm64/arm64/gic_v3_fdt.c			optional fdt
 arm64/arm64/hyp_stub.S				standard
 arm64/arm64/identcpu.c				standard
 arm64/arm64/locore.S				standard no-obj
 arm64/arm64/machdep.c				standard
 arm64/arm64/machdep_boot.c			standard
 arm64/arm64/mem.c				standard
 arm64/arm64/memcmp.S				standard
 arm64/arm64/memcpy.S				standard
 arm64/arm64/memset.S				standard
 arm64/arm64/minidump_machdep.c			standard
 arm64/arm64/mp_machdep.c			optional smp
 arm64/arm64/nexus.c				standard
 arm64/arm64/ofw_machdep.c			optional fdt
 arm64/arm64/pl031_rtc.c				optional fdt pl031
 arm64/arm64/ptrauth.c				standard \
 	compile-with	"${NORMAL_C:N-mbranch-protection*}"
 arm64/arm64/pmap.c				standard
 arm64/arm64/ptrace_machdep.c			standard
 arm64/arm64/sigtramp.S				standard
 arm64/arm64/stack_machdep.c			optional ddb | stack
 arm64/arm64/strcmp.S				standard
 arm64/arm64/strncmp.S				standard
 arm64/arm64/support_ifunc.c			standard
 arm64/arm64/support.S				standard
 arm64/arm64/swtch.S				standard
 arm64/arm64/sys_machdep.c			standard
 arm64/arm64/trap.c				standard
 arm64/arm64/uio_machdep.c			standard
 arm64/arm64/uma_machdep.c			standard
 arm64/arm64/undefined.c				standard
 arm64/arm64/unwind.c				optional ddb | kdtrace_hooks | stack \
 	compile-with "${NORMAL_C:N-fsanitize*}"
 arm64/arm64/vfp.c				standard
 arm64/arm64/vm_machdep.c			standard
 
 arm64/coresight/coresight.c			standard
 arm64/coresight/coresight_acpi.c		optional acpi
 arm64/coresight/coresight_fdt.c			optional fdt
 arm64/coresight/coresight_if.m			standard
 arm64/coresight/coresight_cmd.c			standard
 arm64/coresight/coresight_cpu_debug.c		optional fdt
 arm64/coresight/coresight_etm4x.c		standard
 arm64/coresight/coresight_etm4x_acpi.c		optional acpi
 arm64/coresight/coresight_etm4x_fdt.c		optional fdt
 arm64/coresight/coresight_funnel.c		standard
 arm64/coresight/coresight_funnel_acpi.c		optional acpi
 arm64/coresight/coresight_funnel_fdt.c		optional fdt
 arm64/coresight/coresight_replicator.c		standard
 arm64/coresight/coresight_replicator_acpi.c	optional acpi
 arm64/coresight/coresight_replicator_fdt.c	optional fdt
 arm64/coresight/coresight_tmc.c			standard
 arm64/coresight/coresight_tmc_acpi.c		optional acpi
 arm64/coresight/coresight_tmc_fdt.c		optional fdt
 
 dev/smbios/smbios_subr.c			standard
 
 arm64/iommu/iommu.c				optional iommu
 arm64/iommu/iommu_if.m				optional iommu
 arm64/iommu/iommu_pmap.c			optional iommu
 arm64/iommu/smmu.c				optional iommu
 arm64/iommu/smmu_acpi.c				optional iommu acpi
 arm64/iommu/smmu_fdt.c				optional iommu fdt
 arm64/iommu/smmu_quirks.c			optional iommu
 dev/iommu/busdma_iommu.c			optional iommu
 dev/iommu/iommu_gas.c				optional iommu
 
 crypto/armv8/armv8_crypto.c			optional armv8crypto
 armv8_crypto_wrap.o				optional armv8crypto	\
 	dependency	"$S/crypto/armv8/armv8_crypto_wrap.c"		\
 	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} ${CFLAGS:M-march=*:S/^$/-march=armv8-a/}+crypto ${.IMPSRC}" \
 	no-implicit-rule						\
 	clean		"armv8_crypto_wrap.o"
 aesv8-armx.o					optional armv8crypto | ossl	\
 	dependency	"$S/crypto/openssl/aarch64/aesv8-armx.S"		\
 	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} ${CFLAGS:M-march=*:S/^$/-march=armv8-a/}+crypto ${.IMPSRC}" \
 	no-implicit-rule						\
 	clean		"aesv8-armx.o"
 ghashv8-armx.o					optional armv8crypto	\
 	dependency	"$S/crypto/openssl/aarch64/ghashv8-armx.S"	\
 	compile-with	"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} ${CFLAGS:M-march=*:S/^$/-march=armv8-a/}+crypto ${.IMPSRC}" \
 	no-implicit-rule						\
 	clean		"ghashv8-armx.o"
 
 crypto/des/des_enc.c				optional netsmb
 crypto/openssl/ossl_aarch64.c			optional ossl
 crypto/openssl/aarch64/chacha-armv8.S		optional ossl		\
 	compile-with	"${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}"
 crypto/openssl/aarch64/poly1305-armv8.S		optional ossl		\
 	compile-with	"${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}"
 crypto/openssl/aarch64/sha1-armv8.S		optional ossl		\
 	compile-with	"${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}"
 crypto/openssl/aarch64/sha256-armv8.S		optional ossl		\
 	compile-with	"${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}"
 crypto/openssl/aarch64/sha512-armv8.S		optional ossl		\
 	compile-with	"${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}"
 crypto/openssl/aarch64/vpaes-armv8.S		optional ossl		\
 	compile-with	"${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}"
 
 dev/acpica/acpi_bus_if.m			optional acpi
 dev/acpica/acpi_if.m				optional acpi
 dev/acpica/acpi_pci_link.c			optional acpi pci
 dev/acpica/acpi_pcib.c				optional acpi pci
 dev/acpica/acpi_pxm.c				optional acpi
 dev/ahci/ahci_generic.c				optional ahci
 
 cddl/dev/dtrace/aarch64/dtrace_asm.S		optional dtrace compile-with "${DTRACE_S}"
 cddl/dev/dtrace/aarch64/dtrace_subr.c		optional dtrace compile-with "${DTRACE_C}"
 cddl/dev/fbt/aarch64/fbt_isa.c			optional dtrace_fbt | dtraceall compile-with "${FBT_C}"
 
 # zfs blake3 hash support
 contrib/openzfs/module/icp/asm-aarch64/blake3/b3_aarch64_sse2.S		optional zfs compile-with "${ZFS_S:N-mgeneral-regs-only}"
 contrib/openzfs/module/icp/asm-aarch64/blake3/b3_aarch64_sse41.S	optional zfs compile-with "${ZFS_S:N-mgeneral-regs-only}"
 
 # zfs sha2 hash support
 
 zfs-sha256-armv8.o	optional zfs \
 	dependency "$S/contrib/openzfs/module/icp/asm-aarch64/sha2/sha256-armv8.S" \
 	compile-with "${CC} -c ${ZFS_ASM_CFLAGS:N-mgeneral-regs-only} -o ${.TARGET} ${WERROR} $S/contrib/openzfs/module/icp/asm-aarch64/sha2/sha256-armv8.S" \
 	no-implicit-rule \
 	clean "zfs-sha256-armv8.o"
 
 zfs-sha512-armv8.o	optional zfs \
 	dependency "$S/contrib/openzfs/module/icp/asm-aarch64/sha2/sha512-armv8.S" \
 	compile-with "${CC} -c ${ZFS_ASM_CFLAGS:N-mgeneral-regs-only} -o ${.TARGET} ${WERROR} $S/contrib/openzfs/module/icp/asm-aarch64/sha2/sha512-armv8.S" \
 	no-implicit-rule \
 	clean "zfs-sha512-armv8.o"
 
 ##
 ## ASoC support
 ##
 dev/sound/fdt/audio_dai_if.m			optional sound fdt
 dev/sound/fdt/audio_soc.c			optional sound fdt
 dev/sound/fdt/dummy_codec.c			optional sound fdt
 dev/sound/fdt/simple_amplifier.c		optional sound fdt
 
 ##
 ## Device drivers
 ##
 
 dev/axgbe/if_axgbe.c				optional axa fdt
 dev/axgbe/xgbe-desc.c				optional axa fdt
 dev/axgbe/xgbe-dev.c				optional axa fdt
 dev/axgbe/xgbe-drv.c				optional axa fdt
 dev/axgbe/xgbe-mdio.c				optional axa fdt
 dev/axgbe/xgbe-sysctl.c				optional axa fdt
 dev/axgbe/xgbe-txrx.c				optional axa fdt
 dev/axgbe/xgbe_osdep.c				optional axa fdt
 dev/axgbe/xgbe-phy-v1.c				optional axa fdt
 
 dev/cpufreq/cpufreq_dt.c			optional cpufreq fdt
 
 dev/dpaa2/dpaa2_bp.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_buf.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_channel.c			optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_cmd_if.m			optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_con.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_console.c			optional soc_nxp_ls dpaa2 fdt
 dev/dpaa2/dpaa2_io.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_mac.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_mc.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_mc_acpi.c			optional soc_nxp_ls dpaa2 acpi
 dev/dpaa2/dpaa2_mc_fdt.c			optional soc_nxp_ls dpaa2 fdt
 dev/dpaa2/dpaa2_mc_if.m				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_mcp.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_ni.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_rc.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_swp.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_swp_if.m			optional soc_nxp_ls dpaa2
 dev/dpaa2/dpaa2_types.c				optional soc_nxp_ls dpaa2
 dev/dpaa2/memac_mdio_acpi.c			optional soc_nxp_ls dpaa2 acpi
 dev/dpaa2/memac_mdio_common.c			optional soc_nxp_ls dpaa2 acpi | soc_nxp_ls dpaa2 fdt
 dev/dpaa2/memac_mdio_fdt.c			optional soc_nxp_ls dpaa2 fdt
 dev/dpaa2/memac_mdio_if.m			optional soc_nxp_ls dpaa2 acpi | soc_nxp_ls dpaa2 fdt
 
 dev/dwc/if_dwc.c				optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 | fdt dwc_socfpga soc_intel_stratix10
 dev/dwc/if_dwc_if.m				optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 | fdt dwc_socfpga soc_intel_stratix10
 
 dev/enetc/enetc_mdio.c				optional enetc soc_nxp_ls
 dev/enetc/if_enetc.c				optional enetc iflib pci fdt soc_nxp_ls
 
 dev/eqos/if_eqos.c				optional eqos
 dev/eqos/if_eqos_if.m				optional eqos
 dev/eqos/if_eqos_fdt.c				optional eqos fdt
 
 dev/etherswitch/felix/felix.c			optional enetc etherswitch fdt felix pci soc_nxp_ls
 
 dev/firmware/arm/scmi.c				optional fdt scmi
 dev/firmware/arm/scmi_clk.c			optional fdt scmi
 dev/firmware/arm/scmi_shmem.c			optional fdt scmi
 
 dev/gpio/pl061.c				optional pl061 gpio
 dev/gpio/pl061_acpi.c				optional pl061 gpio acpi
 dev/gpio/pl061_fdt.c				optional pl061 gpio fdt
 dev/gpio/qoriq_gpio.c				optional soc_nxp_ls gpio fdt
 
 dev/hwpmc/hwpmc_arm64.c				optional hwpmc
 dev/hwpmc/hwpmc_arm64_md.c			optional hwpmc
 dev/hwpmc/hwpmc_cmn600.c			optional hwpmc acpi
 arm64/arm64/cmn600.c				optional hwpmc acpi
 dev/hwpmc/hwpmc_dmc620.c			optional hwpmc acpi
 dev/hwpmc/pmu_dmc620.c				optional hwpmc acpi
 
 # Microsoft Hyper-V
 dev/hyperv/vmbus/hyperv.c			optional hyperv acpi
 dev/hyperv/vmbus/aarch64/hyperv_aarch64.c	optional hyperv acpi
 dev/hyperv/vmbus/vmbus.c			optional hyperv acpi pci
 dev/hyperv/vmbus/aarch64/vmbus_aarch64.c	optional hyperv acpi
 dev/hyperv/vmbus/vmbus_if.m			optional hyperv acpi
 dev/hyperv/vmbus/vmbus_res.c			optional hyperv acpi
 dev/hyperv/vmbus/vmbus_xact.c			optional hyperv acpi
 dev/hyperv/vmbus/aarch64/hyperv_machdep.c	optional hyperv acpi
 dev/hyperv/vmbus/vmbus_chan.c			optional hyperv acpi
 dev/hyperv/vmbus/hyperv_busdma.c		optional hyperv acpi
 dev/hyperv/vmbus/vmbus_br.c			optional hyperv acpi
 dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c	optional hyperv acpi
 dev/hyperv/utilities/vmbus_timesync.c		optional hyperv acpi
 dev/hyperv/utilities/vmbus_heartbeat.c		optional hyperv acpi
 dev/hyperv/utilities/vmbus_ic.c			optional hyperv acpi
 dev/hyperv/utilities/vmbus_shutdown.c		optional hyperv acpi
 dev/hyperv/utilities/hv_kvp.c			optional hyperv acpi
 dev/hyperv/input/hv_kbd.c			optional hyperv acpi
 dev/hyperv/input/hv_kbdc.c			optional hyperv acpi
 dev/hyperv/netvsc/hn_nvs.c			optional hyperv acpi
 dev/hyperv/netvsc/hn_rndis.c			optional hyperv acpi
 dev/hyperv/netvsc/if_hn.c			optional hyperv acpi
 dev/hyperv/pcib/vmbus_pcib.c			optional hyperv pci acpi
 
 dev/ice/if_ice_iflib.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_lib.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_osdep.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_resmgr.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_strings.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_iflib_recovery_txrx.c		optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_iflib_txrx.c			optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_common.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_controlq.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_dcb.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_flex_pipe.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_flow.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_nvm.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_sched.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_switch.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_vlan_mode.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_fw_logging.c			optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_fwlog.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/ice_rdma.c				optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 dev/ice/irdma_if.m				optional ice pci \
 	compile-with "${NORMAL_M} -I$S/dev/ice"
 dev/ice/irdma_di_if.m				optional ice pci \
 	compile-with "${NORMAL_M} -I$S/dev/ice"
 dev/ice/ice_ddp_common.c			optional ice pci \
 	compile-with "${NORMAL_C} -I$S/dev/ice"
 ice_ddp.c					optional ice_ddp	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01032300 -mice_ddp -c${.TARGET}"	\
 	no-ctfconvert no-implicit-rule before-depend local	\
 	clean		"ice_ddp.c"
 ice_ddp.fwo					optional ice_ddp	\
 	dependency	"ice_ddp.fw"			\
 	compile-with	"${NORMAL_FWO}"			\
 	no-implicit-rule				\
 	clean		"ice_ddp.fwo"
 ice_ddp.fw					optional ice_ddp	\
 	dependency	"$S/contrib/dev/ice/ice-1.3.35.0.pkg" \
 	compile-with	"${CP} $S/contrib/dev/ice/ice-1.3.35.0.pkg ice_ddp.fw" \
 	no-obj no-implicit-rule				\
 	clean		"ice_ddp.fw"
 
 dev/iicbus/controller/twsi/mv_twsi.c		optional twsi fdt
 dev/iicbus/controller/twsi/a10_twsi.c		optional twsi fdt
 dev/iicbus/controller/twsi/twsi.c		optional twsi fdt
 
 dev/ipmi/ipmi.c					optional ipmi
 dev/ipmi/ipmi_acpi.c				optional ipmi acpi
 dev/ipmi/ipmi_bt.c				optional ipmi
 dev/ipmi/ipmi_kcs.c				optional ipmi
 dev/ipmi/ipmi_smic.c				optional ipmi
 
 dev/mailbox/arm/arm_doorbell.c			optional fdt arm_doorbell
 dev/mbox/mbox_if.m				optional soc_brcm_bcm2837
 
 dev/mmc/host/dwmmc.c				optional dwmmc fdt
 dev/mmc/host/dwmmc_altera.c			optional dwmmc dwmmc_altera fdt
 dev/mmc/host/dwmmc_hisi.c			optional dwmmc dwmmc_hisi fdt
 dev/mmc/host/dwmmc_rockchip.c			optional dwmmc rk_dwmmc fdt
 
 dev/neta/if_mvneta_fdt.c			optional neta fdt
 dev/neta/if_mvneta.c				optional neta mdio mii fdt
 
 dev/ofw/ofw_cpu.c				optional fdt
 dev/ofw/ofw_pci.c				optional fdt pci
 dev/ofw/ofw_pcib.c				optional fdt pci
 
 dev/pci/controller/pci_n1sdp.c			optional pci_n1sdp acpi
 dev/pci/pci_host_generic.c			optional pci
 dev/pci/pci_host_generic_acpi.c			optional pci acpi
 dev/pci/pci_host_generic_den0115.c		optional pci acpi
 dev/pci/pci_host_generic_fdt.c			optional pci fdt
 dev/pci/pci_dw_mv.c				optional pci fdt
 dev/pci/pci_dw.c				optional pci fdt
 dev/pci/pci_dw_if.m				optional pci fdt
 
 dev/psci/psci.c					standard
 dev/psci/smccc_arm64.S				standard
 dev/psci/smccc.c				standard
 
 dev/safexcel/safexcel.c				optional safexcel fdt
 
 dev/sdhci/sdhci_xenon.c				optional sdhci_xenon sdhci
 dev/sdhci/sdhci_xenon_acpi.c			optional sdhci_xenon sdhci acpi
 dev/sdhci/sdhci_xenon_fdt.c			optional sdhci_xenon sdhci fdt
 
 dev/sram/mmio_sram.c				optional fdt mmio_sram
 dev/sram/mmio_sram_if.m				optional fdt mmio_sram
 
 dev/uart/uart_cpu_arm64.c			optional uart
 dev/uart/uart_dev_mu.c				optional uart uart_mu fdt
 dev/uart/uart_dev_pl011.c			optional uart pl011
 
 dev/usb/controller/dwc_otg_hisi.c		optional dwcotg fdt soc_hisi_hi6220
 dev/usb/controller/dwc3.c			optional xhci acpi dwc3 | xhci fdt dwc3
 dev/usb/controller/ehci_mv.c			optional ehci_mv fdt
 dev/usb/controller/generic_ehci.c		optional ehci
 dev/usb/controller/generic_ehci_acpi.c		optional ehci acpi
 dev/usb/controller/generic_ehci_fdt.c		optional ehci fdt
 dev/usb/controller/generic_ohci.c		optional ohci fdt
 dev/usb/controller/generic_usb_if.m		optional ohci fdt
 dev/usb/controller/musb_otg_allwinner.c		optional musb fdt soc_allwinner_a64
 dev/usb/controller/usb_nop_xceiv.c		optional fdt
 dev/usb/controller/generic_xhci.c		optional xhci
 dev/usb/controller/generic_xhci_acpi.c		optional xhci acpi
 dev/usb/controller/generic_xhci_fdt.c		optional xhci fdt
 
 dev/vnic/mrml_bridge.c				optional vnic fdt
 dev/vnic/nic_main.c				optional vnic pci
 dev/vnic/nicvf_main.c				optional vnic pci pci_iov
 dev/vnic/nicvf_queues.c				optional vnic pci pci_iov
 dev/vnic/thunder_bgx_fdt.c			optional soc_cavm_thunderx pci vnic fdt
 dev/vnic/thunder_bgx.c				optional soc_cavm_thunderx pci vnic pci
 dev/vnic/thunder_mdio_fdt.c			optional soc_cavm_thunderx pci vnic fdt
 dev/vnic/thunder_mdio.c				optional soc_cavm_thunderx pci vnic
 dev/vnic/lmac_if.m				optional inet | inet6 | vnic
 
 ##
 ## SoC Support
 ##
 
 # Allwinner common files
 arm/allwinner/a10_timer.c			optional a10_timer fdt
 arm/allwinner/a10_codec.c			optional sound a10_codec fdt
 arm/allwinner/a31_dmac.c			optional a31_dmac fdt
 arm/allwinner/a33_codec.c			optional fdt sound a33_codec
 arm/allwinner/a64/sun50i_a64_acodec.c		optional fdt sound a64_codec
 arm/allwinner/sunxi_dma_if.m			optional a31_dmac
 arm/allwinner/aw_cir.c				optional evdev aw_cir fdt
 arm/allwinner/aw_dwc3.c				optional aw_dwc3 fdt
 arm/allwinner/aw_gpio.c				optional gpio aw_gpio fdt
 arm/allwinner/aw_i2s.c				optional fdt sound aw_i2s
 arm/allwinner/aw_mmc.c				optional mmc aw_mmc fdt | mmccam aw_mmc fdt
 arm/allwinner/aw_nmi.c				optional aw_nmi fdt \
 	compile-with "${NORMAL_C} -I$S/contrib/device-tree/include"
 arm/allwinner/aw_pwm.c				optional aw_pwm fdt
 arm/allwinner/aw_r_intc.c			optional aw_r_intc fdt
 arm/allwinner/aw_rsb.c				optional aw_rsb fdt
 arm/allwinner/aw_rtc.c				optional aw_rtc fdt
 arm/allwinner/aw_sid.c				optional aw_sid nvmem fdt
 arm/allwinner/aw_spi.c				optional aw_spi fdt
 arm/allwinner/aw_syscon.c			optional aw_syscon syscon fdt
 arm/allwinner/aw_thermal.c			optional aw_thermal nvmem fdt
 arm/allwinner/aw_usbphy.c			optional ehci aw_usbphy fdt
 arm/allwinner/aw_usb3phy.c			optional xhci aw_usbphy fdt
 arm/allwinner/aw_wdog.c				optional aw_wdog fdt
 arm/allwinner/axp81x.c				optional axp81x fdt
 arm/allwinner/if_awg.c				optional awg syscon aw_sid nvmem fdt
 
 # Allwinner clock driver
 arm/allwinner/clkng/aw_ccung.c			optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_frac.c		optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_m.c			optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_mipi.c		optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_nkmp.c		optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_nm.c			optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_nmm.c		optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_np.c			optional aw_ccu fdt
 arm/allwinner/clkng/aw_clk_prediv_mux.c		optional aw_ccu fdt
 arm/allwinner/clkng/ccu_a64.c			optional soc_allwinner_a64 aw_ccu fdt
 arm/allwinner/clkng/ccu_h3.c			optional soc_allwinner_h5 aw_ccu fdt
 arm/allwinner/clkng/ccu_h6.c			optional soc_allwinner_h6 aw_ccu fdt
 arm/allwinner/clkng/ccu_h6_r.c			optional soc_allwinner_h6 aw_ccu fdt
 arm/allwinner/clkng/ccu_sun8i_r.c		optional aw_ccu fdt
 arm/allwinner/clkng/ccu_de2.c			optional aw_ccu fdt
 
 # Allwinner padconf files
 arm/allwinner/a64/a64_padconf.c			optional soc_allwinner_a64 fdt
 arm/allwinner/a64/a64_r_padconf.c		optional soc_allwinner_a64 fdt
 arm/allwinner/h3/h3_padconf.c			optional soc_allwinner_h5 fdt
 arm/allwinner/h3/h3_r_padconf.c			optional soc_allwinner_h5 fdt
 arm/allwinner/h6/h6_padconf.c			optional soc_allwinner_h6 fdt
 arm/allwinner/h6/h6_r_padconf.c			optional soc_allwinner_h6 fdt
 
 # Altera/Intel
 dev/altera/dwc/if_dwc_socfpga.c			optional fdt dwc_socfpga
 arm64/intel/stratix10-soc-fpga-mgr.c		optional soc_intel_stratix10 fdt
 arm64/intel/stratix10-svc.c			optional soc_intel_stratix10 fdt
 
 # Annapurna
 arm/annapurna/alpine/alpine_ccu.c		optional al_ccu fdt
 arm/annapurna/alpine/alpine_nb_service.c	optional al_nb_service fdt
 arm/annapurna/alpine/alpine_pci.c		optional al_pci fdt
 arm/annapurna/alpine/alpine_pci_msix.c		optional al_pci fdt
 arm/annapurna/alpine/alpine_serdes.c		optional al_serdes fdt		\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}"
 
 # Broadcom
 arm64/broadcom/brcmmdio/mdio_mux_iproc.c		optional soc_brcm_ns2 fdt
 arm64/broadcom/brcmmdio/mdio_nexus_iproc.c		optional soc_brcm_ns2 fdt
 arm64/broadcom/brcmmdio/mdio_ns2_pcie_phy.c		optional soc_brcm_ns2 fdt pci
 arm64/broadcom/genet/if_genet.c				optional soc_brcm_bcm2838 fdt genet
 arm/broadcom/bcm2835/bcm2835_audio.c			optional sound vchiq fdt \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 arm/broadcom/bcm2835/bcm2835_bsc.c			optional bcm2835_bsc fdt
 arm/broadcom/bcm2835/bcm2835_clkman.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_cpufreq.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_dma.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_fbd.c			optional vt soc_brcm_bcm2837 fdt | vt soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_firmware.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_ft5406.c			optional evdev bcm2835_ft5406 fdt
 arm/broadcom/bcm2835/bcm2835_gpio.c			optional gpio soc_brcm_bcm2837 fdt | gpio soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_intr.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_mbox.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_rng.c			optional !random_loadable soc_brcm_bcm2837 fdt | !random_loadable soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_sdhci.c			optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_sdhost.c			optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_spi.c			optional bcm2835_spi fdt
 arm/broadcom/bcm2835/bcm2835_vcbus.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_vcio.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2835_wdog.c			optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm2836.c				optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt
 arm/broadcom/bcm2835/bcm283x_dwc_fdt.c			optional dwcotg fdt soc_brcm_bcm2837 | dwcotg fdt soc_brcm_bcm2838
 arm/broadcom/bcm2835/bcm2838_pci.c			optional soc_brcm_bcm2838 fdt pci
 arm/broadcom/bcm2835/bcm2838_xhci.c			optional soc_brcm_bcm2838 fdt pci xhci
 arm/broadcom/bcm2835/raspberrypi_gpio.c			optional soc_brcm_bcm2837 gpio fdt | soc_brcm_bcm2838 gpio fdt
 contrib/vchiq/interface/compat/vchi_bsd.c		optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c	optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_arm.c		optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_connected.c	optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_core.c		optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c	optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c		optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_shim.c		optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 contrib/vchiq/interface/vchiq_arm/vchiq_util.c		optional vchiq soc_brcm_bcm2837 \
 	compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq"
 
 # Cavium
 arm64/cavium/thunder_pcie_fdt.c			optional soc_cavm_thunderx pci fdt
 arm64/cavium/thunder_pcie_pem.c			optional soc_cavm_thunderx pci
 arm64/cavium/thunder_pcie_pem_fdt.c		optional soc_cavm_thunderx pci fdt
 arm64/cavium/thunder_pcie_common.c		optional soc_cavm_thunderx pci
 
 # i.MX8 Clock support
 arm64/freescale/imx/imx8mq_ccm.c		optional fdt soc_freescale_imx8
 arm64/freescale/imx/clk/imx_clk_gate.c		optional fdt soc_freescale_imx8
 arm64/freescale/imx/clk/imx_clk_mux.c		optional fdt soc_freescale_imx8
 arm64/freescale/imx/clk/imx_clk_composite.c	optional fdt soc_freescale_imx8
 arm64/freescale/imx/clk/imx_clk_sscg_pll.c	optional fdt soc_freescale_imx8
 arm64/freescale/imx/clk/imx_clk_frac_pll.c	optional fdt soc_freescale_imx8
 
 # iMX drivers
 arm/freescale/imx/imx_gpio.c			optional gpio soc_freescale_imx8 fdt
 arm/freescale/imx/imx_i2c.c			optional fsliic
 arm/freescale/imx/imx_machdep.c			optional fdt soc_freescale_imx8
 arm64/freescale/imx/imx7gpc.c			optional fdt soc_freescale_imx8
 dev/ffec/if_ffec.c				optional ffec
 
 # Marvell
 arm/mv/a37x0_gpio.c				optional a37x0_gpio gpio fdt
 arm/mv/a37x0_iic.c				optional a37x0_iic iicbus fdt
 arm/mv/a37x0_spi.c				optional a37x0_spi spibus fdt
 arm/mv/clk/a37x0_tbg.c				optional a37x0_tbg clk fdt syscon
 arm/mv/clk/a37x0_xtal.c				optional a37x0_xtal clk fdt syscon
 arm/mv/armada38x/armada38x_rtc.c		optional mv_rtc fdt
 arm/mv/gpio.c					optional mv_gpio fdt
 arm/mv/mvebu_gpio.c				optional mv_gpio fdt
 arm/mv/mvebu_pinctrl.c				optional mvebu_pinctrl fdt
 arm/mv/mv_ap806_clock.c				optional soc_marvell_8k fdt
 arm/mv/mv_ap806_gicp.c				optional mv_ap806_gicp fdt
 arm/mv/mv_ap806_sei.c				optional mv_ap806_sei fdt
 arm/mv/mv_cp110_clock.c				optional soc_marvell_8k fdt
 arm/mv/mv_cp110_icu.c				optional mv_cp110_icu fdt
 arm/mv/mv_cp110_icu_bus.c			optional mv_cp110_icu fdt
 arm/mv/mv_thermal.c				optional soc_marvell_8k mv_thermal fdt
 arm/mv/clk/a37x0_tbg_pll.c			optional a37x0_tbg clk fdt syscon
 arm/mv/clk/a37x0_periph_clk_driver.c		optional a37x0_nb_periph a37x0_sb_periph clk fdt syscon
 arm/mv/clk/a37x0_nb_periph_clk_driver.c		optional a37x0_nb_periph clk fdt syscon
 arm/mv/clk/a37x0_sb_periph_clk_driver.c		optional a37x0_sb_periph clk fdt syscon
 arm/mv/clk/periph.c				optional a37x0_nb_periph a37x0_sb_periph clk fdt syscon
 arm/mv/clk/periph_clk_d.c			optional a37x0_nb_periph a37x0_sb_periph clk fdt syscon
 arm/mv/clk/periph_clk_fixed.c			optional a37x0_nb_periph a37x0_sb_periph clk fdt syscon
 arm/mv/clk/periph_clk_gate.c			optional a37x0_nb_periph a37x0_sb_periph clk fdt syscon
 arm/mv/clk/periph_clk_mux_gate.c		optional a37x0_nb_periph a37x0_sb_periph clk fdt syscon
 
 # NVidia
 arm/nvidia/tegra_abpmisc.c			optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_ahci.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_efuse.c			optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_ehci.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_gpio.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_i2c.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_lic.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_mc.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_pcie.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_sdhci.c			optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_soctherm_if.m			optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_soctherm.c			optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_uart.c				optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_usbphy.c			optional fdt soc_nvidia_tegra210
 arm/nvidia/tegra_xhci.c				optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/max77620.c		optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/max77620_gpio.c		optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/max77620_regulators.c	optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/max77620_rtc.c		optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_car.c		optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_clk_per.c	optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_clk_pll.c	optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_clk_super.c	optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_coretemp.c	optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_cpufreq.c	optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_pinmux.c		optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_pmc.c		optional fdt soc_nvidia_tegra210
 arm64/nvidia/tegra210/tegra210_xusbpadctl.c	optional fdt soc_nvidia_tegra210
 
 # Nvidia firmware for Tegra
 tegra210_xusb_fw.c				optional tegra210_xusb_fw	\
 	dependency	"$S/conf/files.arm64"					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk tegra210_xusb.fw:tegra210_xusb_fw -mtegra210_xusb_fw -c${.TARGET}" \
 	no-ctfconvert no-implicit-rule before-depend local			\
 	clean		"tegra210_xusb_fw.c"
 
 tegra210_xusb.fwo				optional tegra210_xusb_fw	\
 	dependency	"tegra210_xusb.fw"					\
 	compile-with	"${NORMAL_FWO}"						\
 	no-implicit-rule							\
 	clean		"tegra210_xusb.fwo"
 
 tegra210_xusb.fw				optional tegra210_xusb_fw	\
 	dependency	"$S/contrib/dev/nvidia/tegra210_xusb.bin.uu"		\
 	compile-with	"${NORMAL_FW}"						\
 	no-obj no-implicit-rule							\
 	clean		"tegra210_xusb.fw"
 
 # NXP
 arm/freescale/vybrid/vf_i2c.c			optional vf_i2c iicbus soc_nxp_ls
 arm64/qoriq/qoriq_dw_pci.c			optional pci fdt soc_nxp_ls
 arm64/qoriq/qoriq_gpio_pic.c			optional gpio fdt soc_nxp_ls
 arm64/qoriq/qoriq_therm.c			optional pci fdt soc_nxp_ls
 arm64/qoriq/qoriq_therm_if.m			optional pci fdt soc_nxp_ls
 arm64/qoriq/clk/ls1028a_clkgen.c		optional clk soc_nxp_ls fdt
 arm64/qoriq/clk/ls1028a_flexspi_clk.c		optional clk soc_nxp_ls fdt
 arm64/qoriq/clk/ls1046a_clkgen.c		optional clk soc_nxp_ls fdt
 arm64/qoriq/clk/ls1088a_clkgen.c		optional clk soc_nxp_ls fdt
 arm64/qoriq/clk/lx2160a_clkgen.c		optional clk soc_nxp_ls fdt
 arm64/qoriq/clk/qoriq_clk_pll.c			optional clk soc_nxp_ls
 arm64/qoriq/clk/qoriq_clkgen.c			optional clk soc_nxp_ls fdt
 dev/ahci/ahci_fsl_fdt.c				optional soc_nxp_ls ahci fdt
 dev/flash/flexspi/flex_spi.c    		optional clk flex_spi soc_nxp_ls fdt
 
 # Qualcomm
 arm64/qualcomm/qcom_gcc.c			optional qcom_gcc fdt
 dev/qcom_mdio/qcom_mdio_ipq4018.c		optional qcom_mdio fdt mdio mii
 
 # RockChip Drivers
 arm64/rockchip/rk3328_codec.c			optional fdt rk3328codec soc_rockchip_rk3328
 arm64/rockchip/rk3399_emmcphy.c			optional fdt rk_emmcphy soc_rockchip_rk3399
 arm64/rockchip/rk3568_combphy.c			optional fdt rk_combphy soc_rockchip_rk3568
 arm64/rockchip/rk3568_pcie.c			optional fdt pci soc_rockchip_rk3568
 arm64/rockchip/rk3568_pciephy.c			optional fdt pci soc_rockchip_rk3568
 arm64/rockchip/rk_dwc3.c			optional fdt rk_dwc3 soc_rockchip_rk3399 | fdt rk_dwc3 soc_rockchip_rk3568
 arm64/rockchip/rk_i2c.c				optional fdt rk_i2c soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399 | fdt rk_i2c soc_rockchip_rk3568
 arm64/rockchip/rk_i2s.c				optional fdt sound soc_rockchip_rk3328 | fdt sound soc_rockchip_rk3399
 arm64/rockchip/rk_otp.c				optional fdt soc_rockchip_rk3568
 arm64/rockchip/rk_otp_if.m			optional fdt soc_rockchip_rk3568
 dev/iicbus/pmic/rockchip/rk8xx.c		optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 dev/iicbus/pmic/rockchip/rk8xx_clocks.c		optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 dev/iicbus/pmic/rockchip/rk8xx_regulators.c	optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 dev/iicbus/pmic/rockchip/rk8xx_rtc.c		optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 dev/iicbus/pmic/rockchip/rk805.c		optional fdt rk805 soc_rockchip_rk3328
 dev/iicbus/pmic/rockchip/rk808.c		optional fdt rk805 soc_rockchip_rk3399
 dev/iicbus/pmic/rockchip/rk817.c		optional fdt rk817 soc_rockchip_rk3568
 arm64/rockchip/rk_grf.c				optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/rk_pinctrl.c			optional fdt rk_pinctrl soc_rockchip_rk3328 | fdt rk_pinctrl soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/rk_gpio.c			optional fdt rk_gpio soc_rockchip_rk3328 | fdt rk_gpio soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/rk_iodomain.c			optional fdt rk_iodomain
 arm64/rockchip/rk_spi.c				optional fdt rk_spi
 arm64/rockchip/rk_usb2phy.c			optional fdt rk_usb2phy soc_rockchip_rk3328 | fdt rk_usb2phy soc_rockchip_rk3399 | fdt rk_usb2phy soc_rockchip_rk3568
 arm64/rockchip/rk_typec_phy.c			optional fdt rk_typec_phy soc_rockchip_rk3399
 arm64/rockchip/if_dwc_rk.c			optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399
 arm64/rockchip/rk_tsadc_if.m			optional fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/rk_tsadc.c			optional fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/rk_pwm.c				optional fdt rk_pwm
 arm64/rockchip/rk_pcie.c			optional fdt pci soc_rockchip_rk3399
 arm64/rockchip/rk_pcie_phy.c			optional fdt pci soc_rockchip_rk3399
 
 # RockChip Clock support
 arm64/rockchip/clk/rk_cru.c			optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk_clk_armclk.c		optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk_clk_composite.c		optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk_clk_fract.c		optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk_clk_gate.c		optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk_clk_mux.c			optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk_clk_pll.c			optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 | fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk3328_cru.c			optional fdt soc_rockchip_rk3328
 arm64/rockchip/clk/rk3399_cru.c			optional fdt soc_rockchip_rk3399
 arm64/rockchip/clk/rk3399_pmucru.c		optional fdt soc_rockchip_rk3399
 arm64/rockchip/clk/rk3568_cru.c			optional fdt soc_rockchip_rk3568
 arm64/rockchip/clk/rk3568_pmucru.c		optional fdt soc_rockchip_rk3568
 
 # Xilinx
 arm/xilinx/uart_dev_cdnc.c			optional uart soc_xilinx_zynq fdt
 arm/xilinx/zy7_gpio.c				optional gpio soc_xilinx_zynq fdt
+dev/iicbus/controller/cadence/cdnc_i2c.c	optional cdnc_i2c iicbus soc_xilinx_zynq fdt
 dev/usb/controller/xlnx_dwc3.c			optional xhci soc_xilinx_zynq fdt
 dev/firmware/xilinx/zynqmp_firmware.c		optional fdt soc_xilinx_zynq
 dev/firmware/xilinx/zynqmp_firmware_if.m	optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_clock.c			optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_clk_div.c			optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_clk_fixed.c		optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_clk_gate.c		optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_clk_mux.c			optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_clk_pll.c			optional fdt soc_xilinx_zynq
 dev/clk/xilinx/zynqmp_reset.c			optional fdt soc_xilinx_zynq
diff --git a/sys/dev/iicbus/controller/cadence/cdnc_i2c.c b/sys/dev/iicbus/controller/cadence/cdnc_i2c.c
new file mode 100644
index 000000000000..dd525071caa2
--- /dev/null
+++ b/sys/dev/iicbus/controller/cadence/cdnc_i2c.c
@@ -0,0 +1,707 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019-2020 Thomas Skibo <thomasskibo@yahoo.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Cadence / Zynq i2c driver.
+ *
+ * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
+ * (v1.12.2) July 1, 2018.  Xilinx doc UG585.  I2C Controller is documented
+ * in Chapter 20.
+ */
+
+#include <sys/cdefs.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/sysctl.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+#include <sys/uio.h>
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <machine/stdarg.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/extres/clk/clk.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+
+#include "iicbus_if.h"
+
+#ifdef I2CDEBUG
+#define DPRINTF(...)	do { printf(__VA_ARGS__); } while (0)
+#else
+#define DPRINTF(...)    do { } while (0)
+#endif
+
+#if 0
+#define HWTYPE_CDNS_R1P10	1
+#endif
+#define HWTYPE_CDNS_R1P14	2
+
+static struct ofw_compat_data compat_data[] = {
+#if 0
+	{"cdns,i2c-r1p10",		HWTYPE_CDNS_R1P10},
+#endif
+	{"cdns,i2c-r1p14",		HWTYPE_CDNS_R1P14},
+	{NULL,				0}
+};
+
+struct cdnc_i2c_softc {
+	device_t		dev;
+	device_t		iicbus;
+	struct mtx		sc_mtx;
+	struct resource		*mem_res;
+	struct resource		*irq_res;
+	void			*intrhandle;
+
+	uint16_t		cfg_reg_shadow;
+	uint16_t		istat;
+	clk_t			ref_clk;
+	uint32_t		ref_clock_freq;
+	uint32_t		i2c_clock_freq;
+
+	int			hwtype;
+	int			hold;
+
+	/* sysctls */
+	unsigned int		i2c_clk_real_freq;
+	unsigned int		interrupts;
+	unsigned int		timeout_ints;
+};
+
+#define I2C_SC_LOCK(sc)		mtx_lock(&(sc)->sc_mtx)
+#define	I2C_SC_UNLOCK(sc)	mtx_unlock(&(sc)->sc_mtx)
+#define I2C_SC_LOCK_INIT(sc) \
+	mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev),	NULL, MTX_DEF)
+#define I2C_SC_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->sc_mtx)
+#define I2C_SC_ASSERT_LOCKED(sc)	mtx_assert(&(sc)->sc_mtx, MA_OWNED)
+
+#define RD2(sc, off)		(bus_read_2((sc)->mem_res, (off)))
+#define WR2(sc, off, val)	(bus_write_2((sc)->mem_res, (off), (val)))
+#define RD1(sc, off)		(bus_read_1((sc)->mem_res, (off)))
+#define WR1(sc, off, val)	(bus_write_1((sc)->mem_res, (off), (val)))
+
+/* Cadence I2C controller device registers. */
+#define CDNC_I2C_CR			0x0000	/* Config register. */
+#define    CDNC_I2C_CR_DIV_A_MASK		(3 << 14)
+#define    CDNC_I2C_CR_DIV_A_SHIFT		14
+#define    CDNC_I2C_CR_DIV_A(a)			((a) << 14)
+#define    CDNC_I2C_CR_DIV_A_MAX		3
+#define    CDNC_I2C_CR_DIV_B_MASK		(0x3f << 8)
+#define    CDNC_I2C_CR_DIV_B_SHIFT		8
+#define    CDNC_I2C_CR_DIV_B(b)			((b) << 8)
+#define    CDNC_I2C_CR_DIV_B_MAX		63
+#define    CDNC_I2C_CR_CLR_FIFO			(1 << 6)
+#define    CDNC_I2C_CR_SLVMON_MODE		(1 << 5)
+#define    CDNC_I2C_CR_HOLD			(1 << 4)
+#define    CDNC_I2C_CR_ACKEN			(1 << 3)
+#define    CDNC_I2C_CR_NEA			(1 << 2)
+#define    CDNC_I2C_CR_MAST			(1 << 1)
+#define    CDNC_I2C_CR_RNW			(1 << 0)
+
+#define CDNC_I2C_SR			0x0004	/* Status register. */
+#define    CDNC_I2C_SR_BUS_ACTIVE		(1 << 8)
+#define    CDNC_I2C_SR_RX_OVF			(1 << 7)
+#define    CDNC_I2C_SR_TX_VALID			(1 << 6)
+#define    CDNC_I2C_SR_RX_VALID			(1 << 5)
+#define    CDNC_I2C_SR_RXRW			(1 << 3)
+
+#define CDNC_I2C_ADDR			0x0008	/* i2c address register. */
+#define CDNC_I2C_DATA			0x000C	/* i2c data register. */
+
+#define CDNC_I2C_ISR			0x0010	/* Int status register. */
+#define    CDNC_I2C_ISR_ARB_LOST		(1 << 9)
+#define    CDNC_I2C_ISR_RX_UNDF			(1 << 7)
+#define    CDNC_I2C_ISR_TX_OVF			(1 << 6)
+#define    CDNC_I2C_ISR_RX_OVF			(1 << 5)
+#define    CDNC_I2C_ISR_SLV_RDY			(1 << 4)
+#define    CDNC_I2C_ISR_XFER_TMOUT		(1 << 3)
+#define    CDNC_I2C_ISR_XFER_NACK		(1 << 2)
+#define    CDNC_I2C_ISR_XFER_DATA		(1 << 1)
+#define    CDNC_I2C_ISR_XFER_DONE		(1 << 0)
+#define    CDNC_I2C_ISR_ALL			0x2ff
+#define CDNC_I2C_TRANS_SIZE		0x0014	/* Transfer size. */
+#define CDNC_I2C_PAUSE			0x0018	/* Slv Monitor Pause reg. */
+#define CDNC_I2C_TIME_OUT		0x001C	/* Time-out register. */
+#define    CDNC_I2C_TIME_OUT_MIN		31
+#define    CDNC_I2C_TIME_OUT_MAX		255
+#define CDNC_I2C_IMR			0x0020	/* Int mask register. */
+#define CDNC_I2C_IER			0x0024	/* Int enable register. */
+#define CDNC_I2C_IDR			0x0028	/* Int disable register. */
+
+#define CDNC_I2C_FIFO_SIZE		16
+#define CDNC_I2C_DEFAULT_I2C_CLOCK	400000	/* 400Khz default */
+
+#define CDNC_I2C_ISR_ERRS (CDNC_I2C_ISR_ARB_LOST | CDNC_I2C_ISR_RX_UNDF | \
+	CDNC_I2C_ISR_TX_OVF | CDNC_I2C_ISR_RX_OVF | CDNC_I2C_ISR_XFER_TMOUT | \
+	CDNC_I2C_ISR_XFER_NACK)
+
+/* Configure clock dividers. */
+static int
+cdnc_i2c_set_freq(struct cdnc_i2c_softc *sc)
+{
+	uint32_t div_a, div_b, err, clk_out;
+	uint32_t best_div_a, best_div_b, best_err;
+
+	best_div_a = 0;
+	best_div_b = 0;
+	best_err = ~0U;
+
+	/*
+	 * The i2c controller has a two-stage clock divider to create
+	 * the "clock enable" signal used to sample the incoming SCL and
+	 * SDA signals.  The Clock Enable signal is divided by 22 to create
+	 * the outgoing SCL signal.
+	 *
+	 * Try all div_a values and pick best match.
+	 */
+	for (div_a = 0; div_a <= CDNC_I2C_CR_DIV_A_MAX; div_a++) {
+		div_b = sc->ref_clock_freq / (22 * sc->i2c_clock_freq *
+		    (div_a + 1));
+		if (div_b > CDNC_I2C_CR_DIV_B_MAX)
+			continue;
+		clk_out = sc->ref_clock_freq / (22 * (div_a + 1) *
+		    (div_b + 1));
+		err = clk_out > sc->i2c_clock_freq ?
+		    clk_out - sc->i2c_clock_freq :
+		    sc->i2c_clock_freq - clk_out;
+		if (err < best_err) {
+			best_err = err;
+			best_div_a = div_a;
+			best_div_b = div_b;
+		}
+	}
+
+	if (best_err == ~0U) {
+		device_printf(sc->dev, "cannot configure clock divider.\n");
+		return (EINVAL); /* out of range */
+	}
+
+	clk_out = sc->ref_clock_freq / (22 * (best_div_a + 1) *
+	    (best_div_b + 1));
+
+	DPRINTF("%s: ref_clock_freq=%d i2c_clock_freq=%d\n", __func__,
+	    sc->ref_clock_freq, sc->i2c_clock_freq);
+	DPRINTF("%s: div_a=%d div_b=%d real-freq=%d\n", __func__, best_div_a,
+	    best_div_b, clk_out);
+
+	sc->cfg_reg_shadow &= ~(CDNC_I2C_CR_DIV_A_MASK |
+	    CDNC_I2C_CR_DIV_B_MASK);
+	sc->cfg_reg_shadow |= CDNC_I2C_CR_DIV_A(best_div_a) |
+	    CDNC_I2C_CR_DIV_B(best_div_b);
+	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow);
+
+	sc->i2c_clk_real_freq = clk_out;
+
+	return (0);
+}
+
+/* Initialize hardware. */
+static int
+cdnc_i2c_init_hw(struct cdnc_i2c_softc *sc)
+{
+
+	/* Reset config register and clear FIFO. */
+	sc->cfg_reg_shadow = 0;
+	WR2(sc, CDNC_I2C_CR, CDNC_I2C_CR_CLR_FIFO);
+	sc->hold = 0;
+
+	/* Clear and disable all interrupts. */
+	WR2(sc, CDNC_I2C_ISR, CDNC_I2C_ISR_ALL);
+	WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_ALL);
+
+	/* Max out bogus time-out register. */
+	WR1(sc, CDNC_I2C_TIME_OUT, CDNC_I2C_TIME_OUT_MAX);
+
+	/* Set up clock dividers. */
+	return (cdnc_i2c_set_freq(sc));
+}
+
+static int
+cdnc_i2c_errs(struct cdnc_i2c_softc *sc, uint16_t istat)
+{
+
+	DPRINTF("%s: istat=0x%x\n", __func__, istat);
+
+	/* XXX: clean up after errors. */
+
+	/* Reset config register and clear FIFO. */
+	sc->cfg_reg_shadow &= CDNC_I2C_CR_DIV_A_MASK | CDNC_I2C_CR_DIV_B_MASK;
+	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow | CDNC_I2C_CR_CLR_FIFO);
+	sc->hold = 0;
+
+	if (istat & CDNC_I2C_ISR_XFER_TMOUT)
+		return (IIC_ETIMEOUT);
+	else if (istat & CDNC_I2C_ISR_RX_UNDF)
+		return (IIC_EUNDERFLOW);
+	else if (istat & (CDNC_I2C_ISR_RX_OVF | CDNC_I2C_ISR_TX_OVF))
+		return (IIC_EOVERFLOW);
+	else if (istat & CDNC_I2C_ISR_XFER_NACK)
+		return (IIC_ENOACK);
+	else if (istat & CDNC_I2C_ISR_ARB_LOST)
+		return (IIC_EBUSERR); /* XXX: ???? */
+	else
+		/* Should not happen */
+		return (IIC_NOERR);
+}
+
+static int
+cdnc_i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
+{
+	struct cdnc_i2c_softc *sc = device_get_softc(dev);
+	int error;
+
+	DPRINTF("%s: speed=%d addr=0x%x\n", __func__, speed, addr);
+
+	I2C_SC_LOCK(sc);
+
+	sc->i2c_clock_freq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);
+
+	error = cdnc_i2c_init_hw(sc);
+
+	I2C_SC_UNLOCK(sc);
+
+	return (error ? IIC_ENOTSUPP : IIC_NOERR);
+}
+
+static void
+cdnc_i2c_intr(void *arg)
+{
+	struct cdnc_i2c_softc *sc = (struct cdnc_i2c_softc *)arg;
+	uint16_t status;
+
+	I2C_SC_LOCK(sc);
+
+	sc->interrupts++;
+
+	/* Read active interrupts. */
+	status = RD2(sc, CDNC_I2C_ISR) & ~RD2(sc, CDNC_I2C_IMR);
+
+	/* Clear interrupts. */
+	WR2(sc, CDNC_I2C_ISR, status);
+
+	if (status & CDNC_I2C_ISR_XFER_TMOUT)
+		sc->timeout_ints++;
+
+	sc->istat |= status;
+
+	if (status)
+		wakeup(sc);
+
+	I2C_SC_UNLOCK(sc);
+}
+
+static int
+cdnc_i2c_xfer_rd(struct cdnc_i2c_softc *sc, struct iic_msg *msg)
+{
+	int error = IIC_NOERR;
+	uint16_t flags = msg->flags;
+	uint16_t len = msg->len;
+	int idx = 0, nbytes, last, first = 1;
+	uint16_t statr;
+
+	DPRINTF("%s: flags=0x%x len=%d\n", __func__, flags, len);
+
+#if 0
+	if (sc->hwtype == HWTYPE_CDNS_R1P10 && (flags & IIC_M_NOSTOP))
+		return (IIC_ENOTSUPP);
+#endif
+
+	I2C_SC_ASSERT_LOCKED(sc);
+
+	/* Program config register. */
+	sc->cfg_reg_shadow &= CDNC_I2C_CR_DIV_A_MASK | CDNC_I2C_CR_DIV_B_MASK;
+	sc->cfg_reg_shadow |= CDNC_I2C_CR_HOLD | CDNC_I2C_CR_ACKEN |
+	    CDNC_I2C_CR_NEA | CDNC_I2C_CR_MAST | CDNC_I2C_CR_RNW;
+	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow | CDNC_I2C_CR_CLR_FIFO);
+	sc->hold = 1;
+
+	while (len > 0) {
+		nbytes = MIN(CDNC_I2C_FIFO_SIZE - 2, len);
+		WR1(sc, CDNC_I2C_TRANS_SIZE, nbytes);
+
+		last = nbytes == len && !(flags & IIC_M_NOSTOP);
+		if (last) {
+			/* Clear HOLD bit on last transfer. */
+			sc->cfg_reg_shadow &= ~CDNC_I2C_CR_HOLD;
+			WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow);
+			sc->hold = 0;
+		}
+
+		/* Writing slv address for a start or repeated start. */
+		if (first && !(flags & IIC_M_NOSTART))
+			WR2(sc, CDNC_I2C_ADDR, msg->slave >> 1);
+		first = 0;
+
+		/* Enable FIFO interrupts and wait. */
+		if (last)
+			WR2(sc, CDNC_I2C_IER, CDNC_I2C_ISR_XFER_DONE |
+			    CDNC_I2C_ISR_ERRS);
+		else
+			WR2(sc, CDNC_I2C_IER, CDNC_I2C_ISR_XFER_DATA |
+			    CDNC_I2C_ISR_ERRS);
+
+		error = mtx_sleep(sc, &sc->sc_mtx, 0, "cdi2c", hz);
+
+		/* Disable FIFO interrupts. */
+		WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_XFER_DATA |
+		    CDNC_I2C_ISR_XFER_DONE | CDNC_I2C_ISR_ERRS);
+
+		if (error == EWOULDBLOCK)
+			error = cdnc_i2c_errs(sc, CDNC_I2C_ISR_XFER_TMOUT);
+		else if (sc->istat & CDNC_I2C_ISR_ERRS)
+			error = cdnc_i2c_errs(sc, sc->istat);
+		sc->istat = 0;
+
+		if (error != IIC_NOERR)
+			break;
+
+		/* Read nbytes from FIFO. */
+		while (nbytes-- > 0) {
+			statr = RD2(sc, CDNC_I2C_SR);
+			if (!(statr & CDNC_I2C_SR_RX_VALID)) {
+				printf("%s: RX FIFO underflow?\n", __func__);
+				break;
+			}
+			msg->buf[idx++] = RD2(sc, CDNC_I2C_DATA);
+			len--;
+		}
+	}
+
+	return (error);
+}
+
+static int
+cdnc_i2c_xfer_wr(struct cdnc_i2c_softc *sc, struct iic_msg *msg)
+{
+	int error = IIC_NOERR;
+	uint16_t flags = msg->flags;
+	uint16_t len = msg->len;
+	int idx = 0, nbytes, last, first = 1;
+
+	DPRINTF("%s: flags=0x%x len=%d\n", __func__, flags, len);
+
+	I2C_SC_ASSERT_LOCKED(sc);
+
+	/* Program config register. */
+	sc->cfg_reg_shadow &= CDNC_I2C_CR_DIV_A_MASK | CDNC_I2C_CR_DIV_B_MASK;
+	sc->cfg_reg_shadow |= CDNC_I2C_CR_HOLD | CDNC_I2C_CR_ACKEN |
+	    CDNC_I2C_CR_NEA | CDNC_I2C_CR_MAST;
+	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow | CDNC_I2C_CR_CLR_FIFO);
+	sc->hold = 1;
+
+	while (len > 0) {
+		/* Put as much data into fifo as you can. */
+		nbytes = MIN(len, CDNC_I2C_FIFO_SIZE -
+		    RD1(sc, CDNC_I2C_TRANS_SIZE) - 1);
+		len -= nbytes;
+		while (nbytes-- > 0)
+			WR2(sc, CDNC_I2C_DATA, msg->buf[idx++]);
+
+		last = len == 0 && !(flags & IIC_M_NOSTOP);
+		if (last) {
+			/* Clear HOLD bit on last transfer. */
+			sc->cfg_reg_shadow &= ~CDNC_I2C_CR_HOLD;
+			WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow);
+			sc->hold = 0;
+		}
+
+		/* Perform START if this is start or repeated start. */
+		if (first && !(flags & IIC_M_NOSTART))
+			WR2(sc, CDNC_I2C_ADDR, msg->slave >> 1);
+		first = 0;
+
+		/* Enable FIFO interrupts. */
+		WR2(sc, CDNC_I2C_IER, CDNC_I2C_ISR_XFER_DONE |
+		    CDNC_I2C_ISR_ERRS);
+
+		/* Wait for end of data transfer. */
+		error = mtx_sleep(sc, &sc->sc_mtx, 0, "cdi2c", hz);
+
+		/* Disable FIFO interrupts. */
+		WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_XFER_DONE |
+		    CDNC_I2C_ISR_ERRS);
+
+		if (error == EWOULDBLOCK)
+			error = cdnc_i2c_errs(sc, CDNC_I2C_ISR_XFER_TMOUT);
+		else if (sc->istat & CDNC_I2C_ISR_ERRS)
+			error = cdnc_i2c_errs(sc, sc->istat);
+		sc->istat = 0;
+		if (error)
+			break;
+	}
+
+	return (error);
+}
+
+static int
+cdnc_i2c_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
+{
+	struct cdnc_i2c_softc *sc = device_get_softc(dev);
+	int i, error = IIC_NOERR;
+
+	DPRINTF("%s: nmsgs=%d\n", __func__, nmsgs);
+
+	I2C_SC_LOCK(sc);
+
+	for (i = 0; i < nmsgs; i++) {
+		DPRINTF("%s: msg[%d]: hold=%d slv=0x%x flags=0x%x len=%d\n",
+		    __func__, i, sc->hold, msgs[i].slave, msgs[i].flags,
+		    msgs[i].len);
+
+		if (!sc->hold && (msgs[i].flags & IIC_M_NOSTART))
+			return (IIC_ENOTSUPP);
+
+		if (msgs[i].flags & IIC_M_RD) {
+			error = cdnc_i2c_xfer_rd(sc, &msgs[i]);
+			if (error != IIC_NOERR)
+				break;
+		} else {
+			error = cdnc_i2c_xfer_wr(sc, &msgs[i]);
+			if (error != IIC_NOERR)
+				break;
+		}
+	}
+
+	I2C_SC_UNLOCK(sc);
+
+	return (error);
+}
+
+static void
+cdnc_i2c_add_sysctls(device_t dev)
+{
+	struct cdnc_i2c_softc *sc = device_get_softc(dev);
+	struct sysctl_ctx_list *ctx;
+	struct sysctl_oid_list *child;
+
+	ctx = device_get_sysctl_ctx(dev);
+	child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
+
+	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "i2c_clk_real_freq", CTLFLAG_RD,
+	    &sc->i2c_clk_real_freq, 0, "i2c clock real frequency");
+
+	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "_interrupts", CTLFLAG_RD,
+	    &sc->interrupts, 0, "interrupt calls");
+	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "_timeouts", CTLFLAG_RD,
+	    &sc->timeout_ints, 0, "hardware timeout interrupts");
+}
+
+
+static int
+cdnc_i2c_probe(device_t dev)
+{
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+		return (ENXIO);
+
+	device_set_desc(dev, "Cadence I2C Controller");
+
+	return (BUS_PROBE_DEFAULT);
+}
+
+
+static int cdnc_i2c_detach(device_t);
+
+static int
+cdnc_i2c_attach(device_t dev)
+{
+	struct cdnc_i2c_softc *sc;
+	int rid, err;
+	phandle_t node;
+	pcell_t cell;
+	uint64_t freq;
+
+	sc = device_get_softc(dev);
+	sc->dev = dev;
+	sc->hwtype = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
+
+	I2C_SC_LOCK_INIT(sc);
+
+	/* Get ref-clock and i2c-clock properties. */
+	node = ofw_bus_get_node(dev);
+	if (OF_getprop(node, "ref-clock", &cell, sizeof(cell)) > 0)
+		sc->ref_clock_freq = fdt32_to_cpu(cell);
+	else if (clk_get_by_ofw_index(dev, node, 0, &sc->ref_clk) == 0) {
+		if ((err = clk_enable(sc->ref_clk)) != 0)
+			device_printf(dev, "Cannot enable clock. err=%d\n",
+			    err);
+		else if ((err = clk_get_freq(sc->ref_clk, &freq)) != 0)
+			device_printf(dev,
+			    "Cannot get clock frequency. err=%d\n", err);
+		else
+			sc->ref_clock_freq = freq;
+	}
+	else {
+		device_printf(dev, "must have ref-clock property\n");
+		return (ENXIO);
+	}
+	if (OF_getprop(node, "clock-frequency", &cell, sizeof(cell)) > 0)
+		sc->i2c_clock_freq = fdt32_to_cpu(cell);
+	else
+		sc->i2c_clock_freq = CDNC_I2C_DEFAULT_I2C_CLOCK;
+
+	/* Get memory resource. */
+	rid = 0;
+	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+	    RF_ACTIVE);
+	if (sc->mem_res == NULL) {
+		device_printf(dev, "could not allocate memory resources.\n");
+		cdnc_i2c_detach(dev);
+		return (ENOMEM);
+	}
+
+	/* Allocate IRQ. */
+	rid = 0;
+	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+	    RF_ACTIVE);
+	if (sc->irq_res == NULL) {
+		device_printf(dev, "could not allocate IRQ resource.\n");
+		cdnc_i2c_detach(dev);
+		return (ENOMEM);
+	}
+
+	/* Activate the interrupt. */
+	err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
+	    NULL, cdnc_i2c_intr, sc, &sc->intrhandle);
+	if (err) {
+		device_printf(dev, "could not setup IRQ.\n");
+		cdnc_i2c_detach(dev);
+		return (err);
+	}
+
+	/* Configure the device. */
+	err = cdnc_i2c_init_hw(sc);
+	if (err) {
+		cdnc_i2c_detach(dev);
+		return (err);
+	}
+
+	sc->iicbus = device_add_child(dev, "iicbus", -1);
+
+	cdnc_i2c_add_sysctls(dev);
+
+	/* Probe and attach iicbus when interrupts work. */
+	return (bus_delayed_attach_children(dev));
+}
+
+static int
+cdnc_i2c_detach(device_t dev)
+{
+	struct cdnc_i2c_softc *sc = device_get_softc(dev);
+
+	if (device_is_attached(dev))
+		bus_generic_detach(dev);
+
+	if (sc->ref_clk != NULL) {
+		clk_release(sc->ref_clk);
+		sc->ref_clk = NULL;
+	}
+
+	/* Delete iic bus. */
+	if (sc->iicbus)
+		device_delete_child(dev, sc->iicbus);
+
+	/* Disable hardware. */
+	if (sc->mem_res != NULL) {
+		sc->cfg_reg_shadow = 0;
+		WR2(sc, CDNC_I2C_CR, CDNC_I2C_CR_CLR_FIFO);
+
+		/* Clear and disable all interrupts. */
+		WR2(sc, CDNC_I2C_ISR, CDNC_I2C_ISR_ALL);
+		WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_ALL);
+	}
+
+	/* Teardown and release interrupt. */
+	if (sc->irq_res != NULL) {
+		if (sc->intrhandle)
+			bus_teardown_intr(dev, sc->irq_res, sc->intrhandle);
+		bus_release_resource(dev, SYS_RES_IRQ,
+		    rman_get_rid(sc->irq_res), sc->irq_res);
+		sc->irq_res = NULL;
+	}
+
+	/* Release memory resource. */
+	if (sc->mem_res != NULL) {
+		bus_release_resource(dev, SYS_RES_MEMORY,
+		    rman_get_rid(sc->mem_res), sc->mem_res);
+		sc->mem_res = NULL;
+	}
+
+	I2C_SC_LOCK_DESTROY(sc);
+
+	return (0);
+}
+
+
+static phandle_t
+cdnc_i2c_get_node(device_t bus, device_t dev)
+{
+
+	return (ofw_bus_get_node(bus));
+}
+
+static device_method_t cdnc_i2c_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,			cdnc_i2c_probe),
+	DEVMETHOD(device_attach,		cdnc_i2c_attach),
+	DEVMETHOD(device_detach,		cdnc_i2c_detach),
+
+	/* ofw_bus interface */
+	DEVMETHOD(ofw_bus_get_node,		cdnc_i2c_get_node),
+
+	/* iicbus methods */
+	DEVMETHOD(iicbus_callback,              iicbus_null_callback),
+	DEVMETHOD(iicbus_reset,			cdnc_i2c_reset),
+	DEVMETHOD(iicbus_transfer,		cdnc_i2c_transfer),
+
+	DEVMETHOD_END
+};
+
+static driver_t cdnc_i2c_driver = {
+	"cdnc_i2c",
+	cdnc_i2c_methods,
+	sizeof(struct cdnc_i2c_softc),
+};
+
+DRIVER_MODULE(cdnc_i2c, simplebus, cdnc_i2c_driver, NULL, NULL);
+DRIVER_MODULE(ofw_iicbus, cdnc_i2c, ofw_iicbus_driver, NULL, NULL);
+MODULE_DEPEND(cdnc_i2c, iicbus, 1, 1, 1);
+MODULE_DEPEND(cdnc_i2c, ofw_iicbus, 1, 1, 1);
+SIMPLEBUS_PNP_INFO(compat_data);