diff --git a/sys/dev/rtwn/if_rtwn.c b/sys/dev/rtwn/if_rtwn.c index fdf44467680b..be01ececf307 100644 --- a/sys/dev/rtwn/if_rtwn.c +++ b/sys/dev/rtwn/if_rtwn.c @@ -1,1975 +1,1976 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include /* * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU/RTL8812AU/RTL8821AU. */ #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static void rtwn_radiotap_attach(struct rtwn_softc *); static void rtwn_vap_decrement_counters(struct rtwn_softc *, enum ieee80211_opmode, int); static void rtwn_set_ic_opmode(struct rtwn_softc *); static struct ieee80211vap *rtwn_vap_create(struct ieee80211com *, const char [IFNAMSIZ], int, enum ieee80211_opmode, int, const uint8_t [IEEE80211_ADDR_LEN], const uint8_t [IEEE80211_ADDR_LEN]); static void rtwn_vap_delete(struct ieee80211vap *); static int rtwn_read_chipid(struct rtwn_softc *); static int rtwn_ioctl_reset(struct ieee80211vap *, u_long); static void rtwn_set_media_status(struct rtwn_softc *, union sec_param *); #ifndef RTWN_WITHOUT_UCODE static int rtwn_tx_fwpkt_check(struct rtwn_softc *, struct ieee80211vap *); static int rtwn_construct_nulldata(struct rtwn_softc *, struct ieee80211vap *, uint8_t *, int); static int rtwn_push_nulldata(struct rtwn_softc *, struct ieee80211vap *); static void rtwn_pwrmode_init(void *); static void rtwn_set_pwrmode_cb(struct rtwn_softc *, union sec_param *); #endif static void rtwn_tsf_sync_adhoc(void *); static void rtwn_tsf_sync_adhoc_task(void *, int); static void rtwn_tsf_sync_enable(struct rtwn_softc *, struct ieee80211vap *); static void rtwn_set_ack_preamble(struct rtwn_softc *); static void rtwn_set_mode(struct rtwn_softc *, uint8_t, int); static int rtwn_monitor_newstate(struct ieee80211vap *, enum ieee80211_state, int); static int rtwn_newstate(struct ieee80211vap *, enum ieee80211_state, int); static void rtwn_calc_basicrates(struct rtwn_softc *); static int rtwn_run(struct rtwn_softc *, struct ieee80211vap *); #ifndef D4054 static void rtwn_watchdog(void *); #endif static void rtwn_parent(struct ieee80211com *); static int rtwn_dma_init(struct rtwn_softc *); static int rtwn_mac_init(struct rtwn_softc *); static void rtwn_mrr_init(struct rtwn_softc *); static void rtwn_scan_start(struct ieee80211com *); static void rtwn_scan_curchan(struct ieee80211_scan_state *, unsigned long); static void rtwn_scan_end(struct ieee80211com *); static void rtwn_getradiocaps(struct ieee80211com *, int, int *, struct ieee80211_channel[]); static void rtwn_update_chw(struct ieee80211com *); static void rtwn_set_channel(struct ieee80211com *); static int rtwn_wme_update(struct ieee80211com *); static void rtwn_update_slot(struct ieee80211com *); static void rtwn_update_slot_cb(struct rtwn_softc *, union sec_param *); static void rtwn_update_aifs(struct rtwn_softc *, uint8_t); static void rtwn_update_promisc(struct ieee80211com *); static void rtwn_update_mcast(struct ieee80211com *); static int rtwn_set_bssid(struct rtwn_softc *, const uint8_t *, int); static int rtwn_set_macaddr(struct rtwn_softc *, const uint8_t *, int); static struct ieee80211_node *rtwn_node_alloc(struct ieee80211vap *, const uint8_t mac[IEEE80211_ADDR_LEN]); static void rtwn_newassoc(struct ieee80211_node *, int); static void rtwn_node_free(struct ieee80211_node *); static void rtwn_init_beacon_reg(struct rtwn_softc *); static int rtwn_init(struct rtwn_softc *); static void rtwn_stop(struct rtwn_softc *); MALLOC_DEFINE(M_RTWN_PRIV, "rtwn_priv", "rtwn driver private state"); static const uint16_t wme2reg[] = { R92C_EDCA_BE_PARAM, R92C_EDCA_BK_PARAM, R92C_EDCA_VI_PARAM, R92C_EDCA_VO_PARAM }; int rtwn_attach(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; int error; sc->cur_bcnq_id = RTWN_VAP_ID_INVALID; RTWN_NT_LOCK_INIT(sc); rtwn_cmdq_init(sc); #ifndef D4054 callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0); #endif callout_init(&sc->sc_calib_to, 0); callout_init(&sc->sc_pwrmode_init, 0); mbufq_init(&sc->sc_snd, ifqmaxlen); RTWN_LOCK(sc); error = rtwn_read_chipid(sc); RTWN_UNLOCK(sc); if (error != 0) { device_printf(sc->sc_dev, "unsupported test chip\n"); goto detach; } error = rtwn_read_rom(sc); if (error != 0) { device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", __func__, error); goto detach; } if (sc->macid_limit > RTWN_MACID_LIMIT) { device_printf(sc->sc_dev, "macid limit will be reduced from %d to %d\n", sc->macid_limit, RTWN_MACID_LIMIT); sc->macid_limit = RTWN_MACID_LIMIT; } if (sc->cam_entry_limit > RTWN_CAM_ENTRY_LIMIT) { device_printf(sc->sc_dev, "cam entry limit will be reduced from %d to %d\n", sc->cam_entry_limit, RTWN_CAM_ENTRY_LIMIT); sc->cam_entry_limit = RTWN_CAM_ENTRY_LIMIT; } if (sc->txdesc_len > RTWN_TX_DESC_SIZE) { device_printf(sc->sc_dev, "adjust size for Tx descriptor (current %d, needed %d)\n", RTWN_TX_DESC_SIZE, sc->txdesc_len); goto detach; } device_printf(sc->sc_dev, "MAC/BB %s, RF 6052 %dT%dR\n", sc->name, sc->ntxchains, sc->nrxchains); ic->ic_softc = sc; ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ /* set device capabilities */ ic->ic_caps = IEEE80211_C_STA /* station mode */ | IEEE80211_C_MONITOR /* monitor mode */ | IEEE80211_C_IBSS /* adhoc mode */ | IEEE80211_C_HOSTAP /* hostap mode */ #if 0 /* TODO: HRPWM register setup */ #ifndef RTWN_WITHOUT_UCODE | IEEE80211_C_PMGT /* Station-side power mgmt */ #endif #endif | IEEE80211_C_SHPREAMBLE /* short preamble supported */ | IEEE80211_C_SHSLOT /* short slot time supported */ #if 0 | IEEE80211_C_BGSCAN /* capable of bg scanning */ #endif | IEEE80211_C_WPA /* 802.11i */ | IEEE80211_C_WME /* 802.11e */ | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ | IEEE80211_C_FF /* Atheros fast-frames */ | IEEE80211_C_TXPMGT /* TX power control */ ; if (sc->sc_hwcrypto != RTWN_CRYPTO_SW) { ic->ic_cryptocaps = IEEE80211_CRYPTO_WEP | IEEE80211_CRYPTO_TKIP | IEEE80211_CRYPTO_AES_CCM; } ic->ic_htcaps = IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */ | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */ | IEEE80211_HTCAP_SMPS_OFF /* SM PS mode disabled */ /* s/w capabilities */ | IEEE80211_HTC_HT /* HT operation */ | IEEE80211_HTC_RX_AMSDU_AMPDU /* A-MSDU in A-MPDU */ | IEEE80211_HTC_AMPDU /* A-MPDU tx */ | IEEE80211_HTC_AMSDU /* A-MSDU tx */ ; if (sc->sc_ht40) { ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40 /* 40 MHz channel width */ | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */ ; } ic->ic_txstream = sc->ntxchains; ic->ic_rxstream = sc->nrxchains; /* Enable TX watchdog */ #ifdef D4054 ic->ic_flags_ext |= IEEE80211_FEXT_WATCHDOG; #endif /* Adjust capabilities. */ rtwn_adj_devcaps(sc); rtwn_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, ic->ic_channels); /* XXX TODO: setup regdomain if R92C_CHANNEL_PLAN_BY_HW bit is set. */ ieee80211_ifattach(ic); ic->ic_raw_xmit = rtwn_raw_xmit; ic->ic_scan_start = rtwn_scan_start; sc->sc_scan_curchan = ic->ic_scan_curchan; ic->ic_scan_curchan = rtwn_scan_curchan; ic->ic_scan_end = rtwn_scan_end; ic->ic_getradiocaps = rtwn_getradiocaps; ic->ic_update_chw = rtwn_update_chw; ic->ic_set_channel = rtwn_set_channel; ic->ic_transmit = rtwn_transmit; ic->ic_parent = rtwn_parent; ic->ic_vap_create = rtwn_vap_create; ic->ic_vap_delete = rtwn_vap_delete; ic->ic_wme.wme_update = rtwn_wme_update; ic->ic_updateslot = rtwn_update_slot; ic->ic_update_promisc = rtwn_update_promisc; ic->ic_update_mcast = rtwn_update_mcast; ic->ic_node_alloc = rtwn_node_alloc; ic->ic_newassoc = rtwn_newassoc; sc->sc_node_free = ic->ic_node_free; ic->ic_node_free = rtwn_node_free; rtwn_postattach(sc); rtwn_radiotap_attach(sc); if (bootverbose) ieee80211_announce(ic); return (0); detach: return (ENXIO); /* failure */ } static void rtwn_radiotap_attach(struct rtwn_softc *sc) { struct rtwn_rx_radiotap_header *rxtap = &sc->sc_rxtap; struct rtwn_tx_radiotap_header *txtap = &sc->sc_txtap; ieee80211_radiotap_attach(&sc->sc_ic, &txtap->wt_ihdr, sizeof(*txtap), RTWN_TX_RADIOTAP_PRESENT, &rxtap->wr_ihdr, sizeof(*rxtap), RTWN_RX_RADIOTAP_PRESENT); } void rtwn_sysctlattach(struct rtwn_softc *sc) { struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); sc->sc_ht40 = 0; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ht40", CTLFLAG_RDTUN, &sc->sc_ht40, sc->sc_ht40, "Enable 40 MHz mode support"); sc->sc_ena_tsf64 = 0; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ena_tsf64", CTLFLAG_RWTUN, &sc->sc_ena_tsf64, sc->sc_ena_tsf64, "Enable/disable per-packet TSF64 reporting"); #ifdef RTWN_DEBUG SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "debug", CTLFLAG_RWTUN, &sc->sc_debug, sc->sc_debug, "Control debugging printfs"); #endif sc->sc_hwcrypto = RTWN_CRYPTO_PAIR; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "hwcrypto", CTLFLAG_RDTUN, &sc->sc_hwcrypto, sc->sc_hwcrypto, "Enable h/w crypto: " "0 - disable, 1 - pairwise keys, 2 - all keys"); if (sc->sc_hwcrypto >= RTWN_CRYPTO_MAX) sc->sc_hwcrypto = RTWN_CRYPTO_FULL; sc->sc_ratectl_sysctl = RTWN_RATECTL_NET80211; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ratectl", CTLFLAG_RDTUN, &sc->sc_ratectl_sysctl, sc->sc_ratectl_sysctl, "Select rate control mechanism: " "0 - disabled, 1 - via net80211, 2 - via firmware"); if (sc->sc_ratectl_sysctl >= RTWN_RATECTL_MAX) sc->sc_ratectl_sysctl = RTWN_RATECTL_FW; sc->sc_ratectl = sc->sc_ratectl_sysctl; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ratectl_selected", CTLFLAG_RD, &sc->sc_ratectl, sc->sc_ratectl, "Currently selected rate control mechanism (by the driver)"); } void rtwn_detach(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; if (ic->ic_softc == sc) { /* Stop command queue. */ RTWN_CMDQ_LOCK(sc); sc->sc_detached = 1; RTWN_CMDQ_UNLOCK(sc); ieee80211_draintask(ic, &sc->cmdq_task); ieee80211_ifdetach(ic); } rtwn_cmdq_destroy(sc); if (RTWN_NT_LOCK_INITIALIZED(sc)) RTWN_NT_LOCK_DESTROY(sc); } void rtwn_suspend(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; ieee80211_suspend_all(ic); } void rtwn_resume(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; ieee80211_resume_all(ic); } static void rtwn_vap_decrement_counters(struct rtwn_softc *sc, enum ieee80211_opmode opmode, int id) { RTWN_ASSERT_LOCKED(sc); if (id != RTWN_VAP_ID_INVALID) { KASSERT(id == 0 || id == 1, ("wrong vap id %d!\n", id)); KASSERT(sc->vaps[id] != NULL, ("vap pointer is NULL\n")); sc->vaps[id] = NULL; } switch (opmode) { case IEEE80211_M_HOSTAP: sc->ap_vaps--; /* FALLTHROUGH */ case IEEE80211_M_IBSS: sc->bcn_vaps--; /* FALLTHROUGH */ case IEEE80211_M_STA: sc->nvaps--; break; case IEEE80211_M_MONITOR: sc->mon_vaps--; break; default: KASSERT(0, ("wrong opmode %d\n", opmode)); break; } KASSERT(sc->vaps_running >= 0 && sc->monvaps_running >= 0, ("number of running vaps is negative (vaps %d, monvaps %d)\n", sc->vaps_running, sc->monvaps_running)); KASSERT(sc->vaps_running - sc->monvaps_running <= RTWN_PORT_COUNT, ("number of running vaps is too big (vaps %d, monvaps %d)\n", sc->vaps_running, sc->monvaps_running)); KASSERT(sc->nvaps >= 0 && sc->nvaps <= RTWN_PORT_COUNT, ("wrong value %d for nvaps\n", sc->nvaps)); KASSERT(sc->mon_vaps >= 0, ("mon_vaps is negative (%d)\n", sc->mon_vaps)); KASSERT(sc->bcn_vaps >= 0 && ((RTWN_CHIP_HAS_BCNQ1(sc) && sc->bcn_vaps <= RTWN_PORT_COUNT) || sc->bcn_vaps <= 1), ("bcn_vaps value %d is wrong\n", sc->bcn_vaps)); KASSERT(sc->ap_vaps >= 0 && ((RTWN_CHIP_HAS_BCNQ1(sc) && sc->ap_vaps <= RTWN_PORT_COUNT) || sc->ap_vaps <= 1), ("ap_vaps value %d is wrong\n", sc->ap_vaps)); } static void rtwn_set_ic_opmode(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; RTWN_ASSERT_LOCKED(sc); /* for ieee80211_reset_erp() */ if (sc->bcn_vaps - sc->ap_vaps > 0) ic->ic_opmode = IEEE80211_M_IBSS; else if (sc->ap_vaps > 0) ic->ic_opmode = IEEE80211_M_HOSTAP; else if (sc->nvaps > 0) ic->ic_opmode = IEEE80211_M_STA; else ic->ic_opmode = IEEE80211_M_MONITOR; } static struct ieee80211vap * rtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, enum ieee80211_opmode opmode, int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], const uint8_t mac[IEEE80211_ADDR_LEN]) { struct rtwn_softc *sc = ic->ic_softc; struct rtwn_vap *uvp; struct ieee80211vap *vap; int id = RTWN_VAP_ID_INVALID; RTWN_LOCK(sc); KASSERT(sc->nvaps <= RTWN_PORT_COUNT, ("nvaps overflow (%d > %d)\n", sc->nvaps, RTWN_PORT_COUNT)); KASSERT(sc->ap_vaps <= RTWN_PORT_COUNT, ("ap_vaps overflow (%d > %d)\n", sc->ap_vaps, RTWN_PORT_COUNT)); KASSERT(sc->bcn_vaps <= RTWN_PORT_COUNT, ("bcn_vaps overflow (%d > %d)\n", sc->bcn_vaps, RTWN_PORT_COUNT)); if (opmode != IEEE80211_M_MONITOR) { switch (sc->nvaps) { case 0: id = 0; break; case 1: if (sc->vaps[1] == NULL) id = 1; else if (sc->vaps[0] == NULL) id = 0; KASSERT(id != RTWN_VAP_ID_INVALID, ("no free ports left\n")); break; case 2: default: goto fail; } if (opmode == IEEE80211_M_IBSS || opmode == IEEE80211_M_HOSTAP) { if ((sc->bcn_vaps == 1 && !RTWN_CHIP_HAS_BCNQ1(sc)) || sc->bcn_vaps == RTWN_PORT_COUNT) goto fail; } } switch (opmode) { case IEEE80211_M_HOSTAP: sc->ap_vaps++; /* FALLTHROUGH */ case IEEE80211_M_IBSS: sc->bcn_vaps++; /* FALLTHROUGH */ case IEEE80211_M_STA: sc->nvaps++; break; case IEEE80211_M_MONITOR: sc->mon_vaps++; break; default: KASSERT(0, ("unknown opmode %d\n", opmode)); goto fail; } RTWN_UNLOCK(sc); uvp = malloc(sizeof(struct rtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); uvp->id = id; if (id != RTWN_VAP_ID_INVALID) { RTWN_LOCK(sc); sc->vaps[id] = uvp; RTWN_UNLOCK(sc); } vap = &uvp->vap; /* enable s/w bmiss handling for sta mode */ if (ieee80211_vap_setup(ic, vap, name, unit, opmode, flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { /* out of memory */ free(uvp, M_80211_VAP); RTWN_LOCK(sc); rtwn_vap_decrement_counters(sc, opmode, id); RTWN_UNLOCK(sc); return (NULL); } rtwn_beacon_init(sc, &uvp->bcn_desc.txd[0], uvp->id); rtwn_vap_preattach(sc, vap); /* override state transition machine */ uvp->newstate = vap->iv_newstate; if (opmode == IEEE80211_M_MONITOR) vap->iv_newstate = rtwn_monitor_newstate; else vap->iv_newstate = rtwn_newstate; vap->iv_update_beacon = rtwn_update_beacon; vap->iv_reset = rtwn_ioctl_reset; vap->iv_key_alloc = rtwn_key_alloc; vap->iv_key_set = rtwn_key_set; vap->iv_key_delete = rtwn_key_delete; vap->iv_max_aid = sc->macid_limit; /* 802.11n parameters */ vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; vap->iv_ampdu_limit = IEEE80211_HTCAP_MAXRXAMPDU_64K; TIMEOUT_TASK_INIT(taskqueue_thread, &uvp->tx_beacon_csa, 0, rtwn_tx_beacon_csa, vap); if (opmode == IEEE80211_M_IBSS) { uvp->recv_mgmt = vap->iv_recv_mgmt; vap->iv_recv_mgmt = rtwn_adhoc_recv_mgmt; TASK_INIT(&uvp->tsf_sync_adhoc_task, 0, rtwn_tsf_sync_adhoc_task, vap); callout_init(&uvp->tsf_sync_adhoc, 0); } /* * NB: driver can select net80211 RA even when user requests * another mechanism. */ ieee80211_ratectl_init(vap); /* complete setup */ ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status, mac); RTWN_LOCK(sc); rtwn_set_ic_opmode(sc); if (sc->sc_flags & RTWN_RUNNING) { if (uvp->id != RTWN_VAP_ID_INVALID) rtwn_set_macaddr(sc, vap->iv_myaddr, uvp->id); rtwn_rxfilter_update(sc); } RTWN_UNLOCK(sc); return (vap); fail: RTWN_UNLOCK(sc); return (NULL); } static void rtwn_vap_delete(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; struct rtwn_softc *sc = ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); int i; /* Put vap into INIT state + stop device if needed. */ ieee80211_stop(vap); for (i = 0; i < NET80211_IV_NSTATE_NUM; i++) ieee80211_draintask(ic, &vap->iv_nstate_task[i]); ieee80211_draintask(ic, &ic->ic_parent_task); RTWN_LOCK(sc); /* Cancel any unfinished Tx. */ rtwn_reset_lists(sc, vap); if (uvp->bcn_mbuf != NULL) m_freem(uvp->bcn_mbuf); rtwn_vap_decrement_counters(sc, vap->iv_opmode, uvp->id); rtwn_set_ic_opmode(sc); if (sc->sc_flags & RTWN_RUNNING) rtwn_rxfilter_update(sc); RTWN_UNLOCK(sc); if (vap->iv_opmode == IEEE80211_M_IBSS) { ieee80211_draintask(ic, &uvp->tsf_sync_adhoc_task); callout_drain(&uvp->tsf_sync_adhoc); } ieee80211_ratectl_deinit(vap); ieee80211_vap_detach(vap); free(uvp, M_80211_VAP); } static int rtwn_read_chipid(struct rtwn_softc *sc) { uint32_t reg; reg = rtwn_read_4(sc, R92C_SYS_CFG); if (reg & R92C_SYS_CFG_TRP_VAUX_EN) /* test chip */ return (EOPNOTSUPP); rtwn_read_chipid_vendor(sc, reg); return (0); } static int rtwn_ioctl_reset(struct ieee80211vap *vap, u_long cmd) { int error; switch (cmd) { #ifndef RTWN_WITHOUT_UCODE case IEEE80211_IOC_POWERSAVE: case IEEE80211_IOC_POWERSAVESLEEP: { struct rtwn_softc *sc = vap->iv_ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); if (vap->iv_opmode == IEEE80211_M_STA && uvp->id == 0) { RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) error = rtwn_set_pwrmode(sc, vap, 1); else error = 0; RTWN_UNLOCK(sc); if (error != 0) error = ENETRESET; } else error = EOPNOTSUPP; break; } #endif case IEEE80211_IOC_SHORTGI: case IEEE80211_IOC_RTSTHRESHOLD: case IEEE80211_IOC_PROTMODE: case IEEE80211_IOC_HTPROTMODE: case IEEE80211_IOC_LDPC: error = 0; break; case IEEE80211_IOC_TXPOWER: { struct rtwn_softc *sc = vap->iv_ic->ic_softc; RTWN_LOCK(sc); error = rtwn_set_tx_power(sc, vap); RTWN_UNLOCK(sc); } break; default: error = ENETRESET; break; } return (error); } static void rtwn_set_media_status(struct rtwn_softc *sc, union sec_param *data) { sc->sc_set_media_status(sc, data->macid); } #ifndef RTWN_WITHOUT_UCODE static int rtwn_tx_fwpkt_check(struct rtwn_softc *sc, struct ieee80211vap *vap) { int ntries, error; for (ntries = 0; ntries < 5; ntries++) { error = rtwn_push_nulldata(sc, vap); if (error == 0) break; } if (ntries == 5) { device_printf(sc->sc_dev, "%s: cannot push f/w frames into chip, error %d!\n", __func__, error); return (error); } return (0); } static int rtwn_construct_nulldata(struct rtwn_softc *sc, struct ieee80211vap *vap, uint8_t *ptr, int qos) { struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211com *ic = &sc->sc_ic; struct rtwn_tx_desc_common *txd; struct ieee80211_frame *wh; int pktlen; /* XXX obtain from net80211 */ wh = (struct ieee80211_frame *)(ptr + sc->txdesc_len); wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_DATA; wh->i_fc[1] = IEEE80211_FC1_DIR_TODS; IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_bss->ni_bssid); IEEE80211_ADDR_COPY(wh->i_addr2, vap->iv_myaddr); IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_bss->ni_macaddr); txd = (struct rtwn_tx_desc_common *)ptr; txd->offset = sc->txdesc_len; pktlen = sc->txdesc_len; if (qos) { struct ieee80211_qosframe *qwh; const int tid = WME_AC_TO_TID(WME_AC_BE); qwh = (struct ieee80211_qosframe *)wh; qwh->i_fc[0] |= IEEE80211_FC0_SUBTYPE_QOS_NULL; qwh->i_qos[0] = tid & IEEE80211_QOS_TID; txd->pktlen = htole16(sizeof(struct ieee80211_qosframe)); pktlen += sizeof(struct ieee80211_qosframe); } else { wh->i_fc[0] |= IEEE80211_FC0_SUBTYPE_NODATA; txd->pktlen = htole16(sizeof(struct ieee80211_frame)); pktlen += sizeof(struct ieee80211_frame); } rtwn_fill_tx_desc_null(sc, ptr, ic->ic_curmode == IEEE80211_MODE_11B, qos, uvp->id); return (pktlen); } static int rtwn_push_nulldata(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211com *ic = vap->iv_ic; struct ieee80211_channel *c = ic->ic_curchan; struct mbuf *m; uint8_t *ptr; int required_size, bcn_size, null_size, null_data, error; if (!(sc->sc_flags & RTWN_FW_LOADED)) return (0); /* requires firmware */ KASSERT(sc->page_size > 0, ("page size was not set!\n")); /* Leave some space for beacon (multi-vap) */ bcn_size = roundup(RTWN_BCN_MAX_SIZE, sc->page_size); /* 1 page for Null Data + 1 page for Qos Null Data frames. */ required_size = bcn_size + sc->page_size * 2; m = m_get2(required_size, M_NOWAIT, MT_DATA, M_PKTHDR); if (m == NULL) return (ENOMEM); /* Setup beacon descriptor. */ rtwn_beacon_set_rate(sc, &uvp->bcn_desc.txd[0], IEEE80211_IS_CHAN_5GHZ(c)); ptr = mtod(m, uint8_t *); memset(ptr, 0, required_size - sc->txdesc_len); /* Construct Null Data frame. */ ptr += bcn_size - sc->txdesc_len; null_size = rtwn_construct_nulldata(sc, vap, ptr, 0); KASSERT(null_size < sc->page_size, ("recalculate size for Null Data frame\n")); /* Construct Qos Null Data frame. */ ptr += roundup(null_size, sc->page_size); null_size = rtwn_construct_nulldata(sc, vap, ptr, 1); KASSERT(null_size < sc->page_size, ("recalculate size for Qos Null Data frame\n")); /* Do not try to detect a beacon here. */ rtwn_setbits_1_shift(sc, R92C_CR, 0, R92C_CR_ENSWBCN, 1); rtwn_setbits_1_shift(sc, R92C_FWHW_TXQ_CTRL, R92C_FWHW_TXQ_CTRL_REAL_BEACON, 0, 2); if (uvp->bcn_mbuf != NULL) { rtwn_beacon_unload(sc, uvp->id); m_freem(uvp->bcn_mbuf); } m->m_pkthdr.len = m->m_len = required_size - sc->txdesc_len; uvp->bcn_mbuf = m; error = rtwn_tx_beacon_check(sc, uvp); if (error != 0) { RTWN_DPRINTF(sc, RTWN_DEBUG_BEACON, "%s: frame was not recognized!\n", __func__); goto fail; } /* Setup addresses in firmware. */ null_data = howmany(bcn_size, sc->page_size); error = rtwn_set_rsvd_page(sc, 0, null_data, null_data + 1); if (error != 0) { device_printf(sc->sc_dev, "%s: CMD_RSVD_PAGE was not sent, error %d\n", __func__, error); goto fail; } fail: /* Re-enable beacon detection. */ rtwn_setbits_1_shift(sc, R92C_FWHW_TXQ_CTRL, 0, R92C_FWHW_TXQ_CTRL_REAL_BEACON, 2); rtwn_setbits_1_shift(sc, R92C_CR, R92C_CR_ENSWBCN, 0, 1); /* Restore beacon (if present). */ if (sc->bcn_vaps > 0 && sc->vaps[!uvp->id] != NULL) { struct rtwn_vap *uvp2 = sc->vaps[!uvp->id]; if (uvp2->curr_mode != R92C_MSR_NOLINK) error = rtwn_tx_beacon_check(sc, uvp2); } return (error); } static void rtwn_pwrmode_init(void *arg) { struct rtwn_softc *sc = arg; rtwn_cmd_sleepable(sc, NULL, 0, rtwn_set_pwrmode_cb); } static void rtwn_set_pwrmode_cb(struct rtwn_softc *sc, union sec_param *data) { struct ieee80211vap *vap = &sc->vaps[0]->vap; if (vap != NULL) rtwn_set_pwrmode(sc, vap, 1); } #endif static void rtwn_tsf_sync_adhoc(void *arg) { struct ieee80211vap *vap = arg; struct ieee80211com *ic = vap->iv_ic; struct rtwn_vap *uvp = RTWN_VAP(vap); if (uvp->curr_mode != R92C_MSR_NOLINK) { /* Do it in process context. */ ieee80211_runtask(ic, &uvp->tsf_sync_adhoc_task); } } /* * Workaround for TSF synchronization: * when BSSID filter in IBSS mode is not set * (and TSF synchronization is enabled), then any beacon may update it. * This routine synchronizes it when BSSID matching is enabled (IBSS merge * is not possible during this period). * * NOTE: there is no race with rtwn_newstate(), since it uses the same * taskqueue. */ static void rtwn_tsf_sync_adhoc_task(void *arg, int pending) { struct ieee80211vap *vap = arg; struct rtwn_vap *uvp = RTWN_VAP(vap); struct rtwn_softc *sc = vap->iv_ic->ic_softc; struct ieee80211_node *ni; RTWN_LOCK(sc); ni = ieee80211_ref_node(vap->iv_bss); /* Accept beacons with the same BSSID. */ rtwn_set_rx_bssid_all(sc, 0); /* Deny RCR updates. */ sc->sc_flags |= RTWN_RCR_LOCKED; /* Enable synchronization. */ rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), R92C_BCN_CTRL_DIS_TSF_UDT0, 0); /* Synchronize. */ rtwn_delay(sc, ni->ni_intval * 5 * 1000); /* Disable synchronization. */ rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), 0, R92C_BCN_CTRL_DIS_TSF_UDT0); /* Accept all beacons. */ sc->sc_flags &= ~RTWN_RCR_LOCKED; rtwn_set_rx_bssid_all(sc, 1); /* Schedule next TSF synchronization. */ callout_reset(&uvp->tsf_sync_adhoc, 60*hz, rtwn_tsf_sync_adhoc, vap); ieee80211_free_node(ni); RTWN_UNLOCK(sc); } static void rtwn_tsf_sync_enable(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct ieee80211com *ic = &sc->sc_ic; struct rtwn_vap *uvp = RTWN_VAP(vap); /* Reset TSF. */ rtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RESET(uvp->id)); switch (vap->iv_opmode) { case IEEE80211_M_STA: /* Enable TSF synchronization. */ rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), R92C_BCN_CTRL_DIS_TSF_UDT0, 0); break; case IEEE80211_M_IBSS: ieee80211_runtask(ic, &uvp->tsf_sync_adhoc_task); /* FALLTHROUGH */ case IEEE80211_M_HOSTAP: /* Enable beaconing. */ rtwn_beacon_enable(sc, uvp->id, 1); break; default: device_printf(sc->sc_dev, "undefined opmode %d\n", vap->iv_opmode); return; } } static void rtwn_set_ack_preamble(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t reg; reg = rtwn_read_4(sc, R92C_WMAC_TRXPTCL_CTL); if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) reg |= R92C_WMAC_TRXPTCL_SHPRE; else reg &= ~R92C_WMAC_TRXPTCL_SHPRE; rtwn_write_4(sc, R92C_WMAC_TRXPTCL_CTL, reg); } static void rtwn_set_mode(struct rtwn_softc *sc, uint8_t mode, int id) { rtwn_setbits_1(sc, R92C_MSR, R92C_MSR_MASK << id * 2, mode << id * 2); if (sc->vaps[id] != NULL) sc->vaps[id]->curr_mode = mode; } static int rtwn_monitor_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) { struct ieee80211com *ic = vap->iv_ic; struct rtwn_softc *sc = ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s -> %s\n", ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]); if (vap->iv_state != nstate) { IEEE80211_UNLOCK(ic); RTWN_LOCK(sc); switch (nstate) { case IEEE80211_S_INIT: sc->vaps_running--; sc->monvaps_running--; if (sc->vaps_running == 0) { /* Turn link LED off. */ rtwn_set_led(sc, RTWN_LED_LINK, 0); } break; case IEEE80211_S_RUN: sc->vaps_running++; sc->monvaps_running++; if (sc->vaps_running == 1) { /* Turn link LED on. */ rtwn_set_led(sc, RTWN_LED_LINK, 1); } break; default: /* NOTREACHED */ break; } RTWN_UNLOCK(sc); IEEE80211_LOCK(ic); } return (uvp->newstate(vap, nstate, arg)); } static int rtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) { struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211com *ic = vap->iv_ic; struct rtwn_softc *sc = ic->ic_softc; enum ieee80211_state ostate; int error, early_newstate; ostate = vap->iv_state; RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s -> %s\n", ieee80211_state_name[ostate], ieee80211_state_name[nstate]); if (vap->iv_bss->ni_chan == IEEE80211_CHAN_ANYC && ostate == IEEE80211_S_INIT && nstate == IEEE80211_S_RUN) { /* need to call iv_newstate() firstly */ error = uvp->newstate(vap, nstate, arg); if (error != 0) return (error); early_newstate = 1; } else early_newstate = 0; if (ostate == IEEE80211_S_CSA) { taskqueue_cancel_timeout(taskqueue_thread, &uvp->tx_beacon_csa, NULL); /* * In multi-vap case second counter may not be cleared * properly. */ vap->iv_csa_count = 0; } IEEE80211_UNLOCK(ic); RTWN_LOCK(sc); if (ostate == IEEE80211_S_CSA) { /* Unblock all queues (multi-vap case). */ rtwn_write_1(sc, R92C_TXPAUSE, 0); } if ((ostate == IEEE80211_S_RUN && nstate != IEEE80211_S_CSA) || ostate == IEEE80211_S_CSA) { sc->vaps_running--; /* Set media status to 'No Link'. */ rtwn_set_mode(sc, R92C_MSR_NOLINK, uvp->id); if (vap->iv_opmode == IEEE80211_M_IBSS) { /* Stop periodical TSF synchronization. */ callout_stop(&uvp->tsf_sync_adhoc); } /* Disable TSF synchronization / beaconing. */ rtwn_beacon_enable(sc, uvp->id, 0); rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), 0, R92C_BCN_CTRL_DIS_TSF_UDT0); /* NB: monitor mode vaps are using port 0. */ if (uvp->id != 0 || sc->monvaps_running == 0) { /* Reset TSF. */ rtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RESET(uvp->id)); } #ifndef RTWN_WITHOUT_UCODE if ((ic->ic_caps & IEEE80211_C_PMGT) != 0 && uvp->id == 0) { /* Disable power management. */ callout_stop(&sc->sc_pwrmode_init); rtwn_set_pwrmode(sc, vap, 0); } #endif if (sc->vaps_running - sc->monvaps_running > 0) { /* Recalculate basic rates bitmap. */ rtwn_calc_basicrates(sc); } if (sc->vaps_running == sc->monvaps_running) { /* Stop calibration. */ callout_stop(&sc->sc_calib_to); /* Stop Rx of data frames. */ rtwn_write_2(sc, R92C_RXFLTMAP2, 0); /* Reset EDCA parameters. */ rtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); rtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); rtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); rtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); if (sc->vaps_running == 0) { /* Turn link LED off. */ rtwn_set_led(sc, RTWN_LED_LINK, 0); } } } error = 0; switch (nstate) { case IEEE80211_S_SCAN: /* Pause AC Tx queues. */ if (sc->vaps_running == 0) rtwn_setbits_1(sc, R92C_TXPAUSE, 0, R92C_TX_QUEUE_AC); break; case IEEE80211_S_RUN: error = rtwn_run(sc, vap); if (error != 0) { device_printf(sc->sc_dev, "%s: could not move to RUN state\n", __func__); break; } sc->vaps_running++; break; case IEEE80211_S_CSA: /* Block all Tx queues (except beacon queue). */ rtwn_setbits_1(sc, R92C_TXPAUSE, 0, R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | R92C_TX_QUEUE_HIGH); break; default: break; } RTWN_UNLOCK(sc); IEEE80211_LOCK(ic); if (error != 0) return (error); return (early_newstate ? 0 : uvp->newstate(vap, nstate, arg)); } static void rtwn_calc_basicrates(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t basicrates; int i; RTWN_ASSERT_LOCKED(sc); if (ic->ic_flags & IEEE80211_F_SCAN) return; /* will be done by rtwn_scan_end(). */ basicrates = 0; for (i = 0; i < nitems(sc->vaps); i++) { struct rtwn_vap *rvp; struct ieee80211vap *vap; struct ieee80211_node *ni; uint32_t rates; rvp = sc->vaps[i]; if (rvp == NULL || rvp->curr_mode == R92C_MSR_NOLINK) continue; vap = &rvp->vap; if (vap->iv_bss == NULL) continue; ni = ieee80211_ref_node(vap->iv_bss); - rtwn_get_rates(sc, &ni->ni_rates, NULL, &rates, NULL, 1); + /* Only fetches basic rates; no need to add HT/VHT here */ + rtwn_get_rates(sc, &ni->ni_rates, NULL, &rates, NULL, NULL, 1); basicrates |= rates; ieee80211_free_node(ni); } if (basicrates == 0) return; /* XXX initial RTS rate? */ rtwn_set_basicrates(sc, basicrates); } static int rtwn_run(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211_node *ni; uint8_t mode; int error; RTWN_ASSERT_LOCKED(sc); error = 0; ni = ieee80211_ref_node(vap->iv_bss); if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || ni->ni_chan == IEEE80211_CHAN_ANYC) { error = EINVAL; goto fail; } switch (vap->iv_opmode) { case IEEE80211_M_STA: mode = R92C_MSR_INFRA; break; case IEEE80211_M_IBSS: mode = R92C_MSR_ADHOC; break; case IEEE80211_M_HOSTAP: mode = R92C_MSR_AP; break; default: KASSERT(0, ("undefined opmode %d\n", vap->iv_opmode)); error = EINVAL; goto fail; } /* Set media status to 'Associated'. */ rtwn_set_mode(sc, mode, uvp->id); /* Set AssocID. */ /* XXX multi-vap? */ rtwn_write_2(sc, R92C_BCN_PSR_RPT, 0xc000 | IEEE80211_NODE_AID(ni)); /* Set BSSID. */ rtwn_set_bssid(sc, ni->ni_bssid, uvp->id); /* Set beacon interval. */ rtwn_write_2(sc, R92C_BCN_INTERVAL(uvp->id), ni->ni_intval); if (sc->vaps_running == sc->monvaps_running) { /* Enable Rx of data frames. */ rtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); /* Flush all AC queues. */ rtwn_write_1(sc, R92C_TXPAUSE, 0); } #ifndef RTWN_WITHOUT_UCODE /* Upload (QoS) Null Data frame to firmware. */ /* Note: do this for port 0 only. */ if ((ic->ic_caps & IEEE80211_C_PMGT) != 0 && vap->iv_opmode == IEEE80211_M_STA && uvp->id == 0) { error = rtwn_tx_fwpkt_check(sc, vap); if (error != 0) goto fail; /* Setup power management. */ /* * NB: it will be enabled immediately - delay it, * so 4-Way handshake will not be interrupted. */ callout_reset(&sc->sc_pwrmode_init, 5*hz, rtwn_pwrmode_init, sc); } #endif /* Enable TSF synchronization. */ rtwn_tsf_sync_enable(sc, vap); if (vap->iv_opmode == IEEE80211_M_HOSTAP || vap->iv_opmode == IEEE80211_M_IBSS) { error = rtwn_setup_beacon(sc, ni); if (error != 0) { device_printf(sc->sc_dev, "unable to push beacon into the chip, " "error %d\n", error); goto fail; } } /* Set ACK preamble type. */ rtwn_set_ack_preamble(sc); /* Set basic rates mask. */ rtwn_calc_basicrates(sc); #ifdef RTWN_TODO rtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); rtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); rtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); rtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); rtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); rtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); #endif if (sc->vaps_running == sc->monvaps_running) { /* Reset temperature calibration state machine. */ sc->sc_flags &= ~RTWN_TEMP_MEASURED; sc->thcal_temp = sc->thermal_meter; /* Start periodic calibration. */ callout_reset(&sc->sc_calib_to, 2*hz, rtwn_calib_to, sc); if (sc->vaps_running == 0) { /* Turn link LED on. */ rtwn_set_led(sc, RTWN_LED_LINK, 1); } } fail: ieee80211_free_node(ni); return (error); } #ifndef D4054 static void rtwn_watchdog(void *arg) { struct rtwn_softc *sc = arg; struct ieee80211com *ic = &sc->sc_ic; RTWN_ASSERT_LOCKED(sc); KASSERT(sc->sc_flags & RTWN_RUNNING, ("not running")); if (sc->sc_tx_timer != 0 && --sc->sc_tx_timer == 0) { ic_printf(ic, "device timeout\n"); ieee80211_restart_all(ic); return; } callout_reset(&sc->sc_watchdog_to, hz, rtwn_watchdog, sc); } #endif static void rtwn_parent(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; struct ieee80211vap *vap; if (ic->ic_nrunning > 0) { if (rtwn_init(sc) != 0) { IEEE80211_LOCK(ic); TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) ieee80211_stop_locked(vap); IEEE80211_UNLOCK(ic); } else ieee80211_start_all(ic); } else rtwn_stop(sc); } static int rtwn_dma_init(struct rtwn_softc *sc) { #define RTWN_CHK(res) do { \ if (res != 0) \ return (EIO); \ } while(0) uint16_t reg; uint8_t tx_boundary; int error; /* Initialize LLT table. */ error = rtwn_llt_init(sc); if (error != 0) return (error); /* Set the number of pages for each queue. */ RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: pages per queue: high %d, normal %d, low %d, public %d\n", __func__, sc->nhqpages, sc->nnqpages, sc->nlqpages, sc->npubqpages); RTWN_CHK(rtwn_write_1(sc, R92C_RQPN_NPQ, sc->nnqpages)); RTWN_CHK(rtwn_write_4(sc, R92C_RQPN, /* Set number of pages for public queue. */ SM(R92C_RQPN_PUBQ, sc->npubqpages) | /* Set number of pages for high priority queue. */ SM(R92C_RQPN_HPQ, sc->nhqpages) | /* Set number of pages for low priority queue. */ SM(R92C_RQPN_LPQ, sc->nlqpages) | /* Load values. */ R92C_RQPN_LD)); /* Initialize TX buffer boundary. */ KASSERT(sc->page_count < 255 && sc->page_count > 0, ("page_count is %d\n", sc->page_count)); tx_boundary = sc->page_count + 1; RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary)); error = rtwn_init_bcnq1_boundary(sc); if (error != 0) return (error); /* Set queue to USB pipe mapping. */ /* Note: PCIe devices are using some magic number here. */ reg = rtwn_get_qmap(sc); RTWN_CHK(rtwn_setbits_2(sc, R92C_TRXDMA_CTRL, R92C_TRXDMA_CTRL_QMAP_M, reg)); /* Configure Tx/Rx DMA (PCIe). */ rtwn_set_desc_addr(sc); /* Set Tx/Rx transfer page boundary. */ RTWN_CHK(rtwn_write_2(sc, R92C_TRXFF_BNDY + 2, sc->rx_dma_size - 1)); /* Set Tx/Rx transfer page size. */ rtwn_set_page_size(sc); return (0); } static int rtwn_mac_init(struct rtwn_softc *sc) { int i, error; /* Write MAC initialization values. */ for (i = 0; i < sc->mac_size; i++) { error = rtwn_write_1(sc, sc->mac_prog[i].reg, sc->mac_prog[i].val); if (error != 0) return (error); } return (0); } static void rtwn_mrr_init(struct rtwn_softc *sc) { int i; /* Drop rate index by 1 per retry. */ for (i = 0; i < R92C_DARFRC_SIZE; i++) { rtwn_write_1(sc, R92C_DARFRC + i, i + 1); rtwn_write_1(sc, R92C_RARFRC + i, i + 1); } } static void rtwn_scan_start(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); /* Pause beaconing. */ rtwn_setbits_1(sc, R92C_TXPAUSE, 0, R92C_TX_QUEUE_BCN); /* Receive beacons / probe responses from any BSSID. */ if (sc->bcn_vaps == 0) rtwn_set_rx_bssid_all(sc, 1); RTWN_UNLOCK(sc); } static void rtwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) { struct rtwn_softc *sc = ss->ss_ic->ic_softc; /* Make link LED blink during scan. */ RTWN_LOCK(sc); rtwn_set_led(sc, RTWN_LED_LINK, !sc->ledlink); RTWN_UNLOCK(sc); sc->sc_scan_curchan(ss, maxdwell); } static void rtwn_scan_end(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); /* Restore limitations. */ if (ic->ic_promisc == 0 && sc->bcn_vaps == 0) rtwn_set_rx_bssid_all(sc, 0); /* Restore LED state. */ rtwn_set_led(sc, RTWN_LED_LINK, (sc->vaps_running != 0)); /* Restore basic rates mask. */ rtwn_calc_basicrates(sc); /* Resume beaconing. */ rtwn_setbits_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_BCN, 0); RTWN_UNLOCK(sc); } static void rtwn_getradiocaps(struct ieee80211com *ic, int maxchans, int *nchans, struct ieee80211_channel chans[]) { struct rtwn_softc *sc = ic->ic_softc; uint8_t bands[IEEE80211_MODE_BYTES]; int cbw_flags, i; cbw_flags = (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40) ? NET80211_CBW_FLAG_HT40 : 0; memset(bands, 0, sizeof(bands)); setbit(bands, IEEE80211_MODE_11B); setbit(bands, IEEE80211_MODE_11G); setbit(bands, IEEE80211_MODE_11NG); ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, cbw_flags); /* XXX workaround add_channel_list() limitations */ setbit(bands, IEEE80211_MODE_11A); setbit(bands, IEEE80211_MODE_11NA); for (i = 0; i < nitems(sc->chan_num_5ghz); i++) { if (sc->chan_num_5ghz[i] == 0) continue; ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, sc->chan_list_5ghz[i], sc->chan_num_5ghz[i], bands, cbw_flags); } } static void rtwn_update_chw(struct ieee80211com *ic) { } static void rtwn_set_channel(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; struct ieee80211_channel *c = ic->ic_curchan; RTWN_LOCK(sc); rtwn_set_chan(sc, c); RTWN_UNLOCK(sc); } static int rtwn_wme_update(struct ieee80211com *ic) { struct chanAccParams chp; struct ieee80211_channel *c = ic->ic_curchan; struct rtwn_softc *sc = ic->ic_softc; struct wmeParams *wmep = sc->cap_wmeParams; uint8_t aifs, acm, slottime; int ac; ieee80211_wme_ic_getparams(ic, &chp); /* Prevent possible races. */ IEEE80211_LOCK(ic); /* XXX */ RTWN_LOCK(sc); memcpy(wmep, chp.cap_wmeParams, sizeof(sc->cap_wmeParams)); RTWN_UNLOCK(sc); IEEE80211_UNLOCK(ic); acm = 0; slottime = IEEE80211_GET_SLOTTIME(ic); RTWN_LOCK(sc); for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ aifs = wmep[ac].wmep_aifsn * slottime + (IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS : IEEE80211_DUR_SIFS); rtwn_write_4(sc, wme2reg[ac], SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | SM(R92C_EDCA_PARAM_AIFS, aifs)); if (ac != WME_AC_BE) acm |= wmep[ac].wmep_acm << ac; } if (acm != 0) acm |= R92C_ACMHWCTRL_EN; rtwn_setbits_1(sc, R92C_ACMHWCTRL, R92C_ACMHWCTRL_ACM_MASK, acm); RTWN_UNLOCK(sc); return 0; } static void rtwn_update_slot(struct ieee80211com *ic) { rtwn_cmd_sleepable(ic->ic_softc, NULL, 0, rtwn_update_slot_cb); } static void rtwn_update_slot_cb(struct rtwn_softc *sc, union sec_param *data) { struct ieee80211com *ic = &sc->sc_ic; uint8_t slottime; slottime = IEEE80211_GET_SLOTTIME(ic); RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s: setting slot time to %uus\n", __func__, slottime); rtwn_write_1(sc, R92C_SLOT, slottime); rtwn_update_aifs(sc, slottime); } static void rtwn_update_aifs(struct rtwn_softc *sc, uint8_t slottime) { struct ieee80211_channel *c = sc->sc_ic.ic_curchan; const struct wmeParams *wmep = sc->cap_wmeParams; uint8_t aifs, ac; for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ aifs = wmep[ac].wmep_aifsn * slottime + (IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS : IEEE80211_DUR_SIFS); rtwn_write_1(sc, wme2reg[ac], aifs); } } static void rtwn_update_promisc(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) rtwn_set_promisc(sc); RTWN_UNLOCK(sc); } static void rtwn_update_mcast(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) rtwn_set_multi(sc); RTWN_UNLOCK(sc); } static int rtwn_set_bssid(struct rtwn_softc *sc, const uint8_t *bssid, int id) { int error; error = rtwn_write_4(sc, R92C_BSSID(id), le32dec(&bssid[0])); if (error != 0) return (error); error = rtwn_write_2(sc, R92C_BSSID(id) + 4, le16dec(&bssid[4])); return (error); } static int rtwn_set_macaddr(struct rtwn_softc *sc, const uint8_t *addr, int id) { int error; error = rtwn_write_4(sc, R92C_MACID(id), le32dec(&addr[0])); if (error != 0) return (error); error = rtwn_write_2(sc, R92C_MACID(id) + 4, le16dec(&addr[4])); return (error); } static struct ieee80211_node * rtwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) { struct rtwn_node *un; un = malloc(sizeof (struct rtwn_node), M_80211_NODE, M_NOWAIT | M_ZERO); if (un == NULL) return NULL; un->id = RTWN_MACID_UNDEFINED; un->avg_pwdb = -1; return &un->ni; } static void rtwn_newassoc(struct ieee80211_node *ni, int isnew __unused) { struct rtwn_softc *sc = ni->ni_ic->ic_softc; struct rtwn_node *un = RTWN_NODE(ni); int id; if (un->id != RTWN_MACID_UNDEFINED) return; RTWN_NT_LOCK(sc); for (id = 0; id <= sc->macid_limit; id++) { if (id != RTWN_MACID_BC && sc->node_list[id] == NULL) { un->id = id; sc->node_list[id] = ni; break; } } RTWN_NT_UNLOCK(sc); if (id > sc->macid_limit) { device_printf(sc->sc_dev, "%s: node table is full\n", __func__); return; } /* Notify firmware. */ id |= RTWN_MACID_VALID; rtwn_cmd_sleepable(sc, &id, sizeof(id), rtwn_set_media_status); } static void rtwn_node_free(struct ieee80211_node *ni) { struct rtwn_softc *sc = ni->ni_ic->ic_softc; struct rtwn_node *un = RTWN_NODE(ni); RTWN_NT_LOCK(sc); if (un->id != RTWN_MACID_UNDEFINED) { sc->node_list[un->id] = NULL; rtwn_cmd_sleepable(sc, &un->id, sizeof(un->id), rtwn_set_media_status); } RTWN_NT_UNLOCK(sc); sc->sc_node_free(ni); } static void rtwn_init_beacon_reg(struct rtwn_softc *sc) { rtwn_write_1(sc, R92C_BCN_CTRL(0), R92C_BCN_CTRL_DIS_TSF_UDT0); rtwn_write_1(sc, R92C_BCN_CTRL(1), R92C_BCN_CTRL_DIS_TSF_UDT0); rtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); rtwn_write_1(sc, R92C_DRVERLYINT, 0x05); rtwn_write_1(sc, R92C_BCNDMATIM, 0x02); rtwn_write_2(sc, R92C_BCNTCFG, 0x660f); } static int rtwn_init(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; int i, error; RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) { RTWN_UNLOCK(sc); return (0); } sc->sc_flags |= RTWN_STARTED; /* Power on adapter. */ error = rtwn_power_on(sc); if (error != 0) goto fail; #ifndef RTWN_WITHOUT_UCODE /* Load 8051 microcode. */ error = rtwn_load_firmware(sc); if (error == 0) sc->sc_flags |= RTWN_FW_LOADED; /* Init firmware commands ring. */ sc->fwcur = 0; #endif /* Initialize MAC block. */ error = rtwn_mac_init(sc); if (error != 0) { device_printf(sc->sc_dev, "%s: error while initializing MAC block\n", __func__); goto fail; } /* Initialize DMA. */ error = rtwn_dma_init(sc); if (error != 0) goto fail; /* Drop incorrect TX (USB). */ rtwn_drop_incorrect_tx(sc); /* Set info size in Rx descriptors (in 64-bit words). */ rtwn_write_1(sc, R92C_RX_DRVINFO_SZ, R92C_RX_DRVINFO_SZ_DEF); /* Init interrupts. */ rtwn_init_intr(sc); for (i = 0; i < nitems(sc->vaps); i++) { struct rtwn_vap *uvp = sc->vaps[i]; /* Set initial network type. */ rtwn_set_mode(sc, R92C_MSR_NOLINK, i); if (uvp == NULL) continue; /* Set MAC address. */ error = rtwn_set_macaddr(sc, uvp->vap.iv_myaddr, uvp->id); if (error != 0) goto fail; } /* Initialize Rx filter. */ rtwn_rxfilter_init(sc); /* Set short/long retry limits. */ rtwn_write_2(sc, R92C_RL, SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); /* Initialize EDCA parameters. */ rtwn_init_edca(sc); rtwn_setbits_1(sc, R92C_FWHW_TXQ_CTRL, 0, R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); /* Set ACK timeout. */ rtwn_write_1(sc, R92C_ACKTO, sc->ackto); /* Setup aggregation. */ /* Tx aggregation. */ rtwn_init_tx_agg(sc); rtwn_init_rx_agg(sc); /* Initialize beacon parameters. */ rtwn_init_beacon_reg(sc); /* Init A-MPDU parameters. */ rtwn_init_ampdu(sc); /* Init MACTXEN / MACRXEN after setting RxFF boundary. */ rtwn_setbits_1(sc, R92C_CR, 0, R92C_CR_MACTXEN | R92C_CR_MACRXEN); /* Initialize BB/RF blocks. */ rtwn_init_bb(sc); rtwn_init_rf(sc); /* Initialize wireless band. */ rtwn_set_chan(sc, ic->ic_curchan); /* Clear per-station keys table. */ rtwn_init_cam(sc); /* Enable decryption / encryption. */ rtwn_init_seccfg(sc); /* Install static keys (if any). */ for (i = 0; i < nitems(sc->vaps); i++) { if (sc->vaps[i] != NULL) { error = rtwn_init_static_keys(sc, sc->vaps[i]); if (error != 0) goto fail; } } /* Initialize antenna selection. */ rtwn_init_antsel(sc); /* Enable hardware sequence numbering. */ rtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); /* Disable BAR. */ rtwn_write_4(sc, R92C_BAR_MODE_CTRL, 0x0201ffff); /* NAV limit. */ rtwn_write_1(sc, R92C_NAV_UPPER, 0); /* Initialize GPIO setting. */ rtwn_setbits_1(sc, R92C_GPIO_MUXCFG, R92C_GPIO_MUXCFG_ENBT, 0); /* Initialize MRR. */ rtwn_mrr_init(sc); /* Device-specific post initialization. */ rtwn_post_init(sc); rtwn_start_xfers(sc); #ifndef D4054 callout_reset(&sc->sc_watchdog_to, hz, rtwn_watchdog, sc); #endif sc->sc_flags |= RTWN_RUNNING; fail: RTWN_UNLOCK(sc); return (error); } static void rtwn_stop(struct rtwn_softc *sc) { RTWN_LOCK(sc); if (!(sc->sc_flags & RTWN_STARTED)) { RTWN_UNLOCK(sc); return; } #ifndef D4054 callout_stop(&sc->sc_watchdog_to); sc->sc_tx_timer = 0; #endif sc->sc_flags &= ~(RTWN_STARTED | RTWN_RUNNING | RTWN_FW_LOADED); sc->sc_flags &= ~RTWN_TEMP_MEASURED; sc->fwver = 0; sc->thcal_temp = 0; sc->cur_bcnq_id = RTWN_VAP_ID_INVALID; bzero(&sc->last_physt, sizeof(sc->last_physt)); #ifdef D4054 ieee80211_tx_watchdog_stop(&sc->sc_ic); #endif rtwn_abort_xfers(sc); rtwn_drain_mbufq(sc); rtwn_power_off(sc); rtwn_reset_lists(sc, NULL); RTWN_UNLOCK(sc); } MODULE_VERSION(rtwn, 2); MODULE_DEPEND(rtwn, wlan, 1, 1, 1); #ifndef RTWN_WITHOUT_UCODE MODULE_DEPEND(rtwn, firmware, 1, 1, 1); #endif diff --git a/sys/dev/rtwn/if_rtwn_rx.c b/sys/dev/rtwn/if_rtwn_rx.c index 58cd53b01e63..977c1d17a08a 100644 --- a/sys/dev/rtwn/if_rtwn_rx.c +++ b/sys/dev/rtwn/if_rtwn_rx.c @@ -1,533 +1,547 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include +/* + * Get the driver rate set for the current operating rateset(s). + * + * rates_p is set to a mask of 11abg ridx values (not HW rate values.) + * htrates_p is set to a mask of 11n ridx values (not HW rate values), + * starting at MCS0 == bit 0. + * + * maxrate_p is set to the ridx value. + * + * If basic_rates is 1 then only the 11abg basic rate logic will + * be applied; HT/VHT will be ignored. + */ void rtwn_get_rates(struct rtwn_softc *sc, const struct ieee80211_rateset *rs, const struct ieee80211_htrateset *rs_ht, uint32_t *rates_p, - int *maxrate_p, int basic_rates) + uint32_t *htrates_p, int *maxrate_p, int basic_rates) { - uint32_t rates; + uint32_t rates = 0, htrates = 0; uint8_t ridx; int i, maxrate; /* Get rates mask. */ rates = 0; maxrate = 0; - /* This is for 11bg */ + /* This is for 11abg */ for (i = 0; i < rs->rs_nrates; i++) { /* Convert 802.11 rate to HW rate index. */ ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); if (ridx == RTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ continue; if (((rs->rs_rates[i] & IEEE80211_RATE_BASIC) != 0) || !basic_rates) { rates |= 1 << ridx; if (ridx > maxrate) maxrate = ridx; } } /* If we're doing 11n, enable 11n rates */ if (rs_ht != NULL && !basic_rates) { for (i = 0; i < rs_ht->rs_nrates; i++) { + /* Only do up to 2-stream rates for now */ if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) continue; - /* 11n rates start at index 12 */ - ridx = RTWN_RIDX_HT_MCS((rs_ht->rs_rates[i]) & 0xf); - rates |= (1 << ridx); + ridx = rs_ht->rs_rates[i] & 0xf; + htrates |= (1 << ridx); /* Guard against the rate table being oddly ordered */ - if (ridx > maxrate) - maxrate = ridx; + if (RTWN_RIDX_HT_MCS(ridx) > maxrate) + maxrate = RTWN_RIDX_HT_MCS(ridx); } } RTWN_DPRINTF(sc, RTWN_DEBUG_RA, "%s: rates 0x%08X, maxrate %d\n", __func__, rates, maxrate); if (rates_p != NULL) *rates_p = rates; + if (htrates_p != NULL) + *htrates_p = htrates; if (maxrate_p != NULL) *maxrate_p = maxrate; } void rtwn_set_basicrates(struct rtwn_softc *sc, uint32_t rates) { RTWN_DPRINTF(sc, RTWN_DEBUG_RA, "%s: rates 0x%08X\n", __func__, rates); rtwn_setbits_4(sc, R92C_RRSR, R92C_RRSR_RATE_BITMAP_M, rates); } static void rtwn_update_avgrssi(struct rtwn_softc *sc, struct rtwn_node *un, int8_t rssi, int is_cck) { int pwdb; /* Convert antenna signal to percentage. */ if (rssi <= -100 || rssi >= 20) pwdb = 0; else if (rssi >= 0) pwdb = 100; else pwdb = 100 + rssi; if (is_cck) { /* CCK gain is smaller than OFDM/MCS gain. */ pwdb += 6; if (pwdb > 100) pwdb = 100; if (pwdb <= 14) pwdb -= 4; else if (pwdb <= 26) pwdb -= 8; else if (pwdb <= 34) pwdb -= 6; else if (pwdb <= 42) pwdb -= 2; } if (un->avg_pwdb == -1) /* Init. */ un->avg_pwdb = pwdb; else if (un->avg_pwdb < pwdb) un->avg_pwdb = ((un->avg_pwdb * 19 + pwdb) / 20) + 1; else un->avg_pwdb = ((un->avg_pwdb * 19 + pwdb) / 20); RTWN_DPRINTF(sc, RTWN_DEBUG_RSSI, "MACID %d, PWDB %d, EMA %d\n", un->id, pwdb, un->avg_pwdb); } static int8_t rtwn_get_rssi(struct rtwn_softc *sc, void *physt, int is_cck) { int8_t rssi; if (is_cck) rssi = rtwn_get_rssi_cck(sc, physt); else /* OFDM/HT. */ rssi = rtwn_get_rssi_ofdm(sc, physt); return (rssi); } static uint32_t rtwn_get_tsf_low(struct rtwn_softc *sc, int id) { return (rtwn_read_4(sc, R92C_TSFTR(id))); } static uint32_t rtwn_get_tsf_high(struct rtwn_softc *sc, int id) { return (rtwn_read_4(sc, R92C_TSFTR(id) + 4)); } static void rtwn_get_tsf(struct rtwn_softc *sc, uint64_t *buf, int id) { /* NB: we cannot read it at once. */ *buf = rtwn_get_tsf_high(sc, id); *buf <<= 32; *buf += rtwn_get_tsf_low(sc, id); } static uint64_t rtwn_extend_rx_tsf(struct rtwn_softc *sc, const struct rtwn_rx_stat_common *stat) { uint64_t tsft; uint32_t rxdw3, tsfl, tsfl_curr; int id; rxdw3 = le32toh(stat->rxdw3); tsfl = le32toh(stat->tsf_low); id = MS(rxdw3, RTWN_RXDW3_BSSID01_FIT); switch (id) { case 1: case 2: id >>= 1; tsfl_curr = rtwn_get_tsf_low(sc, id); break; default: { uint32_t tsfl0, tsfl1; tsfl0 = rtwn_get_tsf_low(sc, 0); tsfl1 = rtwn_get_tsf_low(sc, 1); if (abs(tsfl0 - tsfl) < abs(tsfl1 - tsfl)) { id = 0; tsfl_curr = tsfl0; } else { id = 1; tsfl_curr = tsfl1; } break; } } tsft = rtwn_get_tsf_high(sc, id); if (tsfl > tsfl_curr && tsfl > 0xffff0000) tsft--; tsft <<= 32; tsft += tsfl; return (tsft); } struct ieee80211_node * rtwn_rx_common(struct rtwn_softc *sc, struct mbuf *m, void *desc) { struct ieee80211com *ic = &sc->sc_ic; struct ieee80211_node *ni; struct ieee80211_frame_min *wh; struct ieee80211_rx_stats rxs; struct rtwn_node *un; struct rtwn_rx_stat_common *stat; void *physt; uint32_t rxdw0; int8_t rssi; int cipher, infosz, is_cck, pktlen, shift; stat = desc; rxdw0 = le32toh(stat->rxdw0); cipher = MS(rxdw0, RTWN_RXDW0_CIPHER); infosz = MS(rxdw0, RTWN_RXDW0_INFOSZ) * 8; pktlen = MS(rxdw0, RTWN_RXDW0_PKTLEN); shift = MS(rxdw0, RTWN_RXDW0_SHIFT); wh = (struct ieee80211_frame_min *)(mtodo(m, shift + infosz)); if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && cipher != R92C_CAM_ALGO_NONE) m->m_flags |= M_WEP; if (pktlen >= sizeof(*wh)) { ni = ieee80211_find_rxnode(ic, wh); if (ni != NULL && (ni->ni_flags & IEEE80211_NODE_HT)) m->m_flags |= M_AMPDU; } else ni = NULL; un = RTWN_NODE(ni); if (infosz != 0 && (rxdw0 & RTWN_RXDW0_PHYST)) physt = (void *)mtodo(m, shift); else physt = (un != NULL) ? &un->last_physt : &sc->last_physt; bzero(&rxs, sizeof(rxs)); rtwn_get_rx_stats(sc, &rxs, desc, physt); if (rxs.c_pktflags & IEEE80211_RX_F_AMPDU) { /* Next MPDU will come without PHY info. */ memcpy(&sc->last_physt, physt, sizeof(sc->last_physt)); if (un != NULL) memcpy(&un->last_physt, physt, sizeof(sc->last_physt)); } /* Add some common bits. */ /* NB: should not happen. */ if (rxdw0 & RTWN_RXDW0_CRCERR) rxs.c_pktflags |= IEEE80211_RX_F_FAIL_FCSCRC; rxs.r_flags |= IEEE80211_R_TSF_START; /* XXX undocumented */ /* * Doing the TSF64 extension on USB is expensive, especially * if it's being done on every MPDU in an AMPDU burst. */ if (sc->sc_ena_tsf64) { rxs.r_flags |= IEEE80211_R_TSF64; rxs.c_rx_tsf = rtwn_extend_rx_tsf(sc, stat); } else { rxs.r_flags |= IEEE80211_R_TSF32; rxs.c_rx_tsf = le32toh(stat->tsf_low); } /* Get RSSI from PHY status descriptor. */ is_cck = (rxs.c_pktflags & IEEE80211_RX_F_CCK) != 0; rssi = rtwn_get_rssi(sc, physt, is_cck); /* XXX TODO: we really need a rate-to-string method */ RTWN_DPRINTF(sc, RTWN_DEBUG_RSSI, "%s: rssi %d, rate %d\n", __func__, rssi, rxs.c_rate); if (un != NULL && infosz != 0 && (rxdw0 & RTWN_RXDW0_PHYST)) { /* Update our average RSSI. */ rtwn_update_avgrssi(sc, un, rssi, is_cck); } rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; rxs.c_nf = RTWN_NOISE_FLOOR; rxs.c_rssi = rssi - rxs.c_nf; (void) ieee80211_add_rx_params(m, &rxs); if (ieee80211_radiotap_active(ic)) { struct rtwn_rx_radiotap_header *tap = &sc->sc_rxtap; tap->wr_flags = rtwn_rx_radiotap_flags(sc, desc); tap->wr_tsft = htole64(rxs.c_rx_tsf); tap->wr_rate = rxs.c_rate; tap->wr_dbm_antsignal = rssi; tap->wr_dbm_antnoise = rxs.c_nf; } /* Drop PHY descriptor. */ m_adj(m, infosz + shift); /* If APPFCS, drop FCS */ if (sc->rcr & R92C_RCR_APPFCS) m_adj(m, -IEEE80211_CRC_LEN); return (ni); } void rtwn_adhoc_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct rtwn_softc *sc = vap->iv_ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); uint64_t ni_tstamp, curr_tstamp; uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); if (vap->iv_state == IEEE80211_S_RUN && (subtype == IEEE80211_FC0_SUBTYPE_BEACON || subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { ni_tstamp = le64toh(ni->ni_tstamp.tsf); RTWN_LOCK(sc); rtwn_get_tsf(sc, &curr_tstamp, uvp->id); RTWN_UNLOCK(sc); if (ni_tstamp >= curr_tstamp) (void) ieee80211_ibss_merge(ni); } } static uint8_t rtwn_get_multi_pos(const uint8_t maddr[]) { uint64_t mask = 0x00004d101df481b4; uint8_t pos = 0x27; /* initial value */ int i, j; for (i = 0; i < IEEE80211_ADDR_LEN; i++) for (j = (i == 0) ? 1 : 0; j < 8; j++) if ((maddr[i] >> j) & 1) pos ^= (mask >> (i * 8 + j - 1)); pos &= 0x3f; return (pos); } static u_int rtwm_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) { uint32_t *mfilt = arg; uint8_t pos; pos = rtwn_get_multi_pos(LLADDR(sdl)); mfilt[pos / 32] |= (1 << (pos % 32)); return (1); } void rtwn_set_multi(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t mfilt[2]; RTWN_ASSERT_LOCKED(sc); /* general structure was copied from ath(4). */ if (ic->ic_allmulti == 0) { struct ieee80211vap *vap; /* * Merge multicast addresses to form the hardware filter. */ mfilt[0] = mfilt[1] = 0; TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) if_foreach_llmaddr(vap->iv_ifp, rtwm_hash_maddr, mfilt); } else mfilt[0] = mfilt[1] = ~0; rtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); rtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", __func__, mfilt[0], mfilt[1]); } static void rtwn_rxfilter_update_mgt(struct rtwn_softc *sc) { uint16_t filter; filter = 0x7f7f; if (sc->bcn_vaps == 0) { /* STA and/or MONITOR mode vaps */ filter &= ~( R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); } if (sc->ap_vaps == sc->nvaps - sc->mon_vaps) { /* AP vaps only */ filter &= ~( R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); } rtwn_write_2(sc, R92C_RXFLTMAP0, filter); } void rtwn_rxfilter_update(struct rtwn_softc *sc) { RTWN_ASSERT_LOCKED(sc); /* Filter for management frames. */ rtwn_rxfilter_update_mgt(sc); /* Update Rx filter. */ rtwn_set_promisc(sc); } void rtwn_rxfilter_init(struct rtwn_softc *sc) { RTWN_ASSERT_LOCKED(sc); /* Setup multicast filter. */ rtwn_set_multi(sc); /* Reject all control frames. */ rtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); /* Reject all data frames. */ rtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); /* Append generic Rx filter bits. */ sc->rcr |= R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; /* * Add FCS, to work around occasional 4 byte truncation * with some frames. This is more problematic on RTL8812/ * RTL8821 because they're also doing L3/L4 checksum offload * and hardware encryption, so both are tagged as "passed" * before the frame is truncated. */ sc->rcr |= R92C_RCR_APPFCS; /* Update dynamic Rx filter parts. */ rtwn_rxfilter_update(sc); } void rtwn_rxfilter_set(struct rtwn_softc *sc) { if (!(sc->sc_flags & RTWN_RCR_LOCKED)) rtwn_write_4(sc, R92C_RCR, sc->rcr); } void rtwn_set_rx_bssid_all(struct rtwn_softc *sc, int enable) { if (enable) sc->rcr &= ~R92C_RCR_CBSSID_BCN; else sc->rcr |= R92C_RCR_CBSSID_BCN; rtwn_rxfilter_set(sc); } void rtwn_set_promisc(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t mask_all, mask_min; RTWN_ASSERT_LOCKED(sc); mask_all = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; mask_min = R92C_RCR_APM | R92C_RCR_APPFCS; if (sc->bcn_vaps == 0) mask_min |= R92C_RCR_CBSSID_BCN; if (sc->ap_vaps == 0) mask_min |= R92C_RCR_CBSSID_DATA; if (ic->ic_promisc == 0 && sc->mon_vaps == 0) { if (sc->bcn_vaps != 0) mask_all |= R92C_RCR_CBSSID_BCN; if (sc->ap_vaps != 0) /* for Null data frames */ mask_all |= R92C_RCR_CBSSID_DATA; sc->rcr &= ~mask_all; sc->rcr |= mask_min; } else { sc->rcr &= ~mask_min; sc->rcr |= mask_all; } rtwn_rxfilter_set(sc); } diff --git a/sys/dev/rtwn/if_rtwn_rx.h b/sys/dev/rtwn/if_rtwn_rx.h index 73bdf0d7a0de..3108f1d4cde4 100644 --- a/sys/dev/rtwn/if_rtwn_rx.h +++ b/sys/dev/rtwn/if_rtwn_rx.h @@ -1,36 +1,37 @@ /*- * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef IF_RTWN_RX_H #define IF_RTWN_RX_H #define RTWN_NOISE_FLOOR -95 void rtwn_get_rates(struct rtwn_softc *, const struct ieee80211_rateset *, - const struct ieee80211_htrateset *, uint32_t *, int *, int); + const struct ieee80211_htrateset *, uint32_t *, uint32_t *, + int *, int); void rtwn_set_basicrates(struct rtwn_softc *, uint32_t); struct ieee80211_node * rtwn_rx_common(struct rtwn_softc *, struct mbuf *, void *); void rtwn_adhoc_recv_mgmt(struct ieee80211_node *, struct mbuf *, int, const struct ieee80211_rx_stats *, int, int); void rtwn_set_multi(struct rtwn_softc *); void rtwn_rxfilter_update(struct rtwn_softc *); void rtwn_rxfilter_init(struct rtwn_softc *); void rtwn_rxfilter_set(struct rtwn_softc *); void rtwn_set_rx_bssid_all(struct rtwn_softc *, int); void rtwn_set_promisc(struct rtwn_softc *); #endif /* IF_RTWN_RX_H */ diff --git a/sys/dev/rtwn/rtl8192c/r92c_fw.c b/sys/dev/rtwn/rtl8192c/r92c_fw.c index 426dfd0e6d3f..1ca37df7d0f4 100644 --- a/sys/dev/rtwn/rtl8192c/r92c_fw.c +++ b/sys/dev/rtwn/rtl8192c/r92c_fw.c @@ -1,479 +1,486 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifndef RTWN_WITHOUT_UCODE static int r92c_fw_cmd(struct rtwn_softc *sc, uint8_t id, const void *buf, int len) { struct r92c_fw_cmd cmd; int ntries, error; KASSERT(len <= sizeof(cmd.msg), ("%s: firmware command too long (%d > %zu)\n", __func__, len, sizeof(cmd.msg))); if (!(sc->sc_flags & RTWN_FW_LOADED)) { RTWN_DPRINTF(sc, RTWN_DEBUG_FIRMWARE, "%s: firmware " "was not loaded; command (id %u) will be discarded\n", __func__, id); return (0); } /* Wait for current FW box to be empty. */ for (ntries = 0; ntries < 100; ntries++) { if (!(rtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) break; rtwn_delay(sc, 2000); } if (ntries == 100) { device_printf(sc->sc_dev, "could not send firmware command\n"); return (ETIMEDOUT); } memset(&cmd, 0, sizeof(cmd)); cmd.id = id; if (len > 3) { /* Ext command: [id : byte2 : byte3 : byte4 : byte0 : byte1] */ cmd.id |= R92C_CMD_FLAG_EXT; memcpy(cmd.msg, (const uint8_t *)buf + 2, len - 2); memcpy(cmd.msg + 3, buf, 2); } else memcpy(cmd.msg, buf, len); /* Write the first word last since that will trigger the FW. */ if (len > 3) { error = rtwn_write_2(sc, R92C_HMEBOX_EXT(sc->fwcur), *(uint16_t *)((uint8_t *)&cmd + 4)); if (error != 0) return (error); } error = rtwn_write_4(sc, R92C_HMEBOX(sc->fwcur), *(uint32_t *)&cmd); if (error != 0) return (error); sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; return (0); } void r92c_fw_reset(struct rtwn_softc *sc, int reason) { int ntries; if (reason == RTWN_FW_RESET_CHECKSUM) return; /* Tell 8051 to reset itself. */ rtwn_write_1(sc, R92C_HMETFR + 3, 0x20); /* Wait until 8051 resets by itself. */ for (ntries = 0; ntries < 100; ntries++) { if ((rtwn_read_2(sc, R92C_SYS_FUNC_EN) & R92C_SYS_FUNC_EN_CPUEN) == 0) return; rtwn_delay(sc, 50); } /* Force 8051 reset. */ rtwn_setbits_1_shift(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_CPUEN, 0, 1); } void r92c_fw_download_enable(struct rtwn_softc *sc, int enable) { if (enable) { /* 8051 enable. */ rtwn_setbits_1_shift(sc, R92C_SYS_FUNC_EN, 0, R92C_SYS_FUNC_EN_CPUEN, 1); /* MCU firmware download enable. */ rtwn_setbits_1(sc, R92C_MCUFWDL, 0, R92C_MCUFWDL_EN); /* 8051 reset. */ rtwn_setbits_1_shift(sc, R92C_MCUFWDL, R92C_MCUFWDL_ROM_DLEN, 0, 2); } else { /* MCU download disable. */ rtwn_setbits_1(sc, R92C_MCUFWDL, R92C_MCUFWDL_EN, 0); /* Reserved for f/w extension. */ rtwn_write_1(sc, R92C_MCUFWDL + 1, 0); } } #endif /* * Initialize firmware rate adaptation. */ #ifndef RTWN_WITHOUT_UCODE static int r92c_send_ra_cmd(struct rtwn_softc *sc, int macid, uint32_t rates, int maxrate) { struct r92c_fw_cmd_macid_cfg cmd; uint8_t mode; int error = 0; /* Set rates mask for unicast frames. */ if (RTWN_RATE_IS_HT(maxrate)) mode = R92C_RAID_11GN; else if (RTWN_RATE_IS_OFDM(maxrate)) mode = R92C_RAID_11BG; else mode = R92C_RAID_11B; cmd.macid = macid | R92C_CMD_MACID_VALID; cmd.mask = htole32(mode << 28 | rates); error = r92c_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); if (error != 0) { device_printf(sc->sc_dev, "%s: could not set RA mask for %d station\n", __func__, macid); return (error); } return (0); } #endif static void r92c_init_ra(struct rtwn_softc *sc, int macid) { struct ieee80211_htrateset *rs_ht; struct ieee80211_node *ni; - uint32_t rates; + uint32_t rates, htrates; int maxrate; RTWN_NT_LOCK(sc); if (sc->node_list[macid] == NULL) { RTWN_DPRINTF(sc, RTWN_DEBUG_RA, "%s: macid %d, ni is NULL\n", __func__, macid); RTWN_NT_UNLOCK(sc); return; } ni = ieee80211_ref_node(sc->node_list[macid]); if (ni->ni_flags & IEEE80211_NODE_HT) rs_ht = &ni->ni_htrates; else rs_ht = NULL; - /* XXX MACID_BC */ - rtwn_get_rates(sc, &ni->ni_rates, rs_ht, &rates, &maxrate, 0); + /* + * Note: this pushes the rate bitmap and maxrate into the + * firmware; and for this chipset 2-stream 11n support is enough. + */ + rtwn_get_rates(sc, &ni->ni_rates, rs_ht, &rates, &htrates, &maxrate, 0); RTWN_NT_UNLOCK(sc); #ifndef RTWN_WITHOUT_UCODE if (sc->sc_ratectl == RTWN_RATECTL_FW) { - r92c_send_ra_cmd(sc, macid, rates, maxrate); + uint32_t fw_rates; + /* Add HT rates after normal rates; limit to MCS0..15 */ + fw_rates = rates | + ((htrates & 0xffff) << RTWN_RIDX_HT_MCS_SHIFT); + r92c_send_ra_cmd(sc, macid, fw_rates, maxrate); } #endif rtwn_write_1(sc, R92C_INIDATA_RATE_SEL(macid), maxrate); ieee80211_free_node(ni); } void r92c_joinbss_rpt(struct rtwn_softc *sc, int macid) { #ifndef RTWN_WITHOUT_UCODE struct r92c_softc *rs = sc->sc_priv; struct ieee80211vap *vap; struct r92c_fw_cmd_joinbss_rpt cmd; if (sc->vaps[0] == NULL) /* XXX fix */ goto end; vap = &sc->vaps[0]->vap; if ((vap->iv_state == IEEE80211_S_RUN) ^ !(rs->rs_flags & R92C_FLAG_ASSOCIATED)) goto end; if (rs->rs_flags & R92C_FLAG_ASSOCIATED) { cmd.mstatus = R92C_MSTATUS_DISASSOC; rs->rs_flags &= ~R92C_FLAG_ASSOCIATED; } else { cmd.mstatus = R92C_MSTATUS_ASSOC; rs->rs_flags |= R92C_FLAG_ASSOCIATED; } if (r92c_fw_cmd(sc, R92C_CMD_JOINBSS_RPT, &cmd, sizeof(cmd)) != 0) { device_printf(sc->sc_dev, "%s: cannot change media status!\n", __func__); } end: #endif if (macid & RTWN_MACID_VALID) r92c_init_ra(sc, macid & ~RTWN_MACID_VALID); } #ifndef RTWN_WITHOUT_UCODE int r92c_set_rsvd_page(struct rtwn_softc *sc, int probe_resp, int null, int qos_null) { struct r92c_fw_cmd_rsvdpage rsvd; rsvd.probe_resp = probe_resp; rsvd.ps_poll = 0; rsvd.null_data = null; return (r92c_fw_cmd(sc, R92C_CMD_RSVD_PAGE, &rsvd, sizeof(rsvd))); } int r92c_set_pwrmode(struct rtwn_softc *sc, struct ieee80211vap *vap, int off) { struct r92c_fw_cmd_pwrmode mode; int error; /* XXX dm_RF_saving */ if (off && vap->iv_state == IEEE80211_S_RUN && (vap->iv_flags & IEEE80211_F_PMGTON)) mode.mode = R92C_PWRMODE_MIN; else mode.mode = R92C_PWRMODE_CAM; mode.smart_ps = R92C_PWRMODE_SMARTPS_NULLDATA; mode.bcn_pass = 1; /* XXX */ error = r92c_fw_cmd(sc, R92C_CMD_SET_PWRMODE, &mode, sizeof(mode)); if (error != 0) { device_printf(sc->sc_dev, "%s: CMD_SET_PWRMODE was not sent, error %d\n", __func__, error); } return (error); } void r92c_set_rssi(struct rtwn_softc *sc) { struct ieee80211_node *ni; struct rtwn_node *rn; struct r92c_fw_cmd_rssi cmd; int i; cmd.reserved = 0; RTWN_NT_LOCK(sc); for (i = 0; i < sc->macid_limit; i++) { /* XXX optimize? */ ni = sc->node_list[i]; if (ni == NULL) continue; rn = RTWN_NODE(ni); cmd.macid = i; cmd.pwdb = rn->avg_pwdb; RTWN_DPRINTF(sc, RTWN_DEBUG_RSSI, "%s: sending RSSI command (macid %d, rssi %d)\n", __func__, i, rn->avg_pwdb); RTWN_NT_UNLOCK(sc); r92c_fw_cmd(sc, R92C_CMD_RSSI_SETTING, &cmd, sizeof(cmd)); RTWN_NT_LOCK(sc); } RTWN_NT_UNLOCK(sc); } static void r92c_ratectl_tx_complete(struct rtwn_softc *sc, uint8_t *buf, int len) { struct ieee80211_ratectl_tx_status txs; struct r92c_c2h_tx_rpt *rpt; struct ieee80211_node *ni; uint8_t macid; int ntries; if (sc->sc_ratectl != RTWN_RATECTL_NET80211) { /* shouldn't happen */ device_printf(sc->sc_dev, "%s called while ratectl = %d!\n", __func__, sc->sc_ratectl); return; } rpt = (struct r92c_c2h_tx_rpt *)buf; if (len != sizeof(*rpt)) { device_printf(sc->sc_dev, "%s: wrong report size (%d, must be %zu)\n", __func__, len, sizeof(*rpt)); return; } RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: ccx report dump: 0: %02X, 1: %02X, queue time: " "low %02X, high %02X, 4: %02X, 5: %02X, 6: %02X, 7: %02X\n", __func__, rpt->rptb0, rpt->rptb1, rpt->queue_time_low, rpt->queue_time_high, rpt->rptb4, rpt->rptb5, rpt->rptb6, rpt->rptb7); macid = MS(rpt->rptb5, R92C_RPTB5_MACID); if (macid > sc->macid_limit) { device_printf(sc->sc_dev, "macid %u is too big; increase MACID_MAX limit\n", macid); return; } ntries = MS(rpt->rptb0, R92C_RPTB0_RETRY_CNT); RTWN_NT_LOCK(sc); ni = sc->node_list[macid]; if (ni != NULL) { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: frame for macid %u was" "%s sent (%d retries)\n", __func__, macid, (rpt->rptb7 & R92C_RPTB7_PKT_OK) ? "" : " not", ntries); txs.flags = IEEE80211_RATECTL_STATUS_LONG_RETRY; txs.long_retries = ntries; if (rpt->rptb7 & R92C_RPTB7_PKT_OK) txs.status = IEEE80211_RATECTL_TX_SUCCESS; else if (rpt->rptb6 & R92C_RPTB6_RETRY_OVER) txs.status = IEEE80211_RATECTL_TX_FAIL_LONG; /* XXX */ else if (rpt->rptb6 & R92C_RPTB6_LIFE_EXPIRE) txs.status = IEEE80211_RATECTL_TX_FAIL_EXPIRED; else txs.status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED; ieee80211_ratectl_tx_complete(ni, &txs); } else { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: macid %u, ni is NULL\n", __func__, macid); } RTWN_NT_UNLOCK(sc); #ifdef IEEE80211_SUPPORT_SUPERG if (sc->sc_tx_n_active > 0 && --sc->sc_tx_n_active <= 1) rtwn_cmd_sleepable(sc, NULL, 0, rtwn_ff_flush_all); #endif } static void r92c_handle_c2h_task(struct rtwn_softc *sc, union sec_param *data) { const uint16_t off = R92C_C2H_EVT_MSG + sizeof(struct r92c_c2h_evt); struct r92c_softc *rs = sc->sc_priv; uint16_t buf[R92C_C2H_MSG_MAX_LEN / 2 + 1]; uint8_t id, len, status; int i; /* Do not reschedule the task if device is not running. */ if (!(sc->sc_flags & RTWN_RUNNING)) return; /* Read current status. */ status = rtwn_read_1(sc, R92C_C2H_EVT_CLEAR); if (status == R92C_C2H_EVT_HOST_CLOSE) goto end; /* nothing to do */ else if (status == R92C_C2H_EVT_FW_CLOSE) { len = rtwn_read_1(sc, R92C_C2H_EVT_MSG); id = MS(len, R92C_C2H_EVTB0_ID); len = MS(len, R92C_C2H_EVTB0_LEN); memset(buf, 0, sizeof(buf)); /* Try to optimize event reads. */ for (i = 0; i < len; i += 2) buf[i / 2] = rtwn_read_2(sc, off + i); KASSERT(i < sizeof(buf), ("%s: buffer overrun (%d >= %zu)!", __func__, i, sizeof(buf))); switch (id) { case R92C_C2H_EVT_TX_REPORT: r92c_ratectl_tx_complete(sc, (uint8_t *)buf, len); break; default: device_printf(sc->sc_dev, "%s: C2H report %u (len %u) was not handled\n", __func__, id, len); break; } } /* Prepare for next event. */ rtwn_write_1(sc, R92C_C2H_EVT_CLEAR, R92C_C2H_EVT_HOST_CLOSE); end: /* Adjust timeout for next call. */ if (rs->rs_c2h_pending != 0) { rs->rs_c2h_pending = 0; rs->rs_c2h_paused = 0; } else rs->rs_c2h_paused++; if (rs->rs_c2h_paused > R92C_TX_PAUSED_THRESHOLD) rs->rs_c2h_timeout = hz; else rs->rs_c2h_timeout = MAX(hz / 100, 1); /* Reschedule the task. */ callout_reset(&rs->rs_c2h_report, rs->rs_c2h_timeout, r92c_handle_c2h_report, sc); } void r92c_handle_c2h_report(void *arg) { struct rtwn_softc *sc = arg; rtwn_cmd_sleepable(sc, NULL, 0, r92c_handle_c2h_task); } #endif /* RTWN_WITHOUT_UCODE */ diff --git a/sys/dev/rtwn/rtl8812a/r12a_chan.c b/sys/dev/rtwn/rtl8812a/r12a_chan.c index d71e0a8177fd..f900d1ef7b2d 100644 --- a/sys/dev/rtwn/rtl8812a/r12a_chan.c +++ b/sys/dev/rtwn/rtl8812a/r12a_chan.c @@ -1,787 +1,788 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static void r12a_write_txpower_ht(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { /* Write per-MCS Tx power. */ rtwn_bb_write(sc, R12A_TXAGC_MCS3_0(chain), SM(R12A_TXAGC_MCS0, power[RTWN_RIDX_HT_MCS(0)]) | SM(R12A_TXAGC_MCS1, power[RTWN_RIDX_HT_MCS(1)]) | SM(R12A_TXAGC_MCS2, power[RTWN_RIDX_HT_MCS(2)]) | SM(R12A_TXAGC_MCS3, power[RTWN_RIDX_HT_MCS(3)])); rtwn_bb_write(sc, R12A_TXAGC_MCS7_4(chain), SM(R12A_TXAGC_MCS4, power[RTWN_RIDX_HT_MCS(4)]) | SM(R12A_TXAGC_MCS5, power[RTWN_RIDX_HT_MCS(5)]) | SM(R12A_TXAGC_MCS6, power[RTWN_RIDX_HT_MCS(6)]) | SM(R12A_TXAGC_MCS7, power[RTWN_RIDX_HT_MCS(7)])); if (sc->ntxchains >= 2) { rtwn_bb_write(sc, R12A_TXAGC_MCS11_8(chain), SM(R12A_TXAGC_MCS8, power[RTWN_RIDX_HT_MCS(8)]) | SM(R12A_TXAGC_MCS9, power[RTWN_RIDX_HT_MCS(9)]) | SM(R12A_TXAGC_MCS10, power[RTWN_RIDX_HT_MCS(10)]) | SM(R12A_TXAGC_MCS11, power[RTWN_RIDX_HT_MCS(11)])); rtwn_bb_write(sc, R12A_TXAGC_MCS15_12(chain), SM(R12A_TXAGC_MCS12, power[RTWN_RIDX_HT_MCS(12)]) | SM(R12A_TXAGC_MCS13, power[RTWN_RIDX_HT_MCS(13)]) | SM(R12A_TXAGC_MCS14, power[RTWN_RIDX_HT_MCS(14)]) | SM(R12A_TXAGC_MCS15, power[RTWN_RIDX_HT_MCS(15)])); } /* TODO: HT MCS 16 -> 31 */ } static void r12a_write_txpower_vht(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { /* 1SS, MCS 0..3 */ rtwn_bb_write(sc, R12A_TXAGC_NSS1IX3_1IX0(chain), SM(R12A_TXAGC_NSS1_MCS0, power[RTWN_RIDX_VHT_MCS(0, 0)]) | SM(R12A_TXAGC_NSS1_MCS1, power[RTWN_RIDX_VHT_MCS(0, 1)]) | SM(R12A_TXAGC_NSS1_MCS2, power[RTWN_RIDX_VHT_MCS(0, 2)]) | SM(R12A_TXAGC_NSS1_MCS3, power[RTWN_RIDX_VHT_MCS(0, 3)])); /* 1SS, MCS 4..7 */ rtwn_bb_write(sc, R12A_TXAGC_NSS1IX7_1IX4(chain), SM(R12A_TXAGC_NSS1_MCS4, power[RTWN_RIDX_VHT_MCS(0, 4)]) | SM(R12A_TXAGC_NSS1_MCS5, power[RTWN_RIDX_VHT_MCS(0, 5)]) | SM(R12A_TXAGC_NSS1_MCS6, power[RTWN_RIDX_VHT_MCS(0, 6)]) | SM(R12A_TXAGC_NSS1_MCS7, power[RTWN_RIDX_VHT_MCS(0, 7)])); /* 1SS, MCS 8,9 ; 2SS MCS0, 1 */ if (sc->ntxchains == 1) { rtwn_bb_write(sc, R12A_TXAGC_NSS2IX1_1IX8(chain), SM(R12A_TXAGC_NSS1_MCS8, power[RTWN_RIDX_VHT_MCS(0, 8)]) | SM(R12A_TXAGC_NSS1_MCS9, power[RTWN_RIDX_VHT_MCS(0, 9)]) | SM(R12A_TXAGC_NSS2_MCS0, 0) | SM(R12A_TXAGC_NSS2_MCS1, 0)); } else { rtwn_bb_write(sc, R12A_TXAGC_NSS2IX1_1IX8(chain), SM(R12A_TXAGC_NSS1_MCS8, power[RTWN_RIDX_VHT_MCS(0, 8)]) | SM(R12A_TXAGC_NSS1_MCS9, power[RTWN_RIDX_VHT_MCS(0, 9)]) | SM(R12A_TXAGC_NSS2_MCS0, power[RTWN_RIDX_VHT_MCS(1, 0)]) | SM(R12A_TXAGC_NSS2_MCS1, power[RTWN_RIDX_VHT_MCS(1, 1)])); } /* 2SS MCS 2..5 */ if (sc->ntxchains > 1) { rtwn_bb_write(sc, R12A_TXAGC_NSS2IX5_2IX2(chain), SM(R12A_TXAGC_NSS2_MCS2, power[RTWN_RIDX_VHT_MCS(1, 2)]) | SM(R12A_TXAGC_NSS2_MCS3, power[RTWN_RIDX_VHT_MCS(1, 3)]) | SM(R12A_TXAGC_NSS2_MCS4, power[RTWN_RIDX_VHT_MCS(1, 4)]) | SM(R12A_TXAGC_NSS2_MCS5, power[RTWN_RIDX_VHT_MCS(1, 5)])); } /* 2SS MCS 6..9 */ if (sc->ntxchains > 1) { rtwn_bb_write(sc, R12A_TXAGC_NSS2IX9_2IX6(chain), SM(R12A_TXAGC_NSS2_MCS2, power[RTWN_RIDX_VHT_MCS(1, 6)]) | SM(R12A_TXAGC_NSS2_MCS3, power[RTWN_RIDX_VHT_MCS(1, 7)]) | SM(R12A_TXAGC_NSS2_MCS4, power[RTWN_RIDX_VHT_MCS(1, 8)]) | SM(R12A_TXAGC_NSS2_MCS5, power[RTWN_RIDX_VHT_MCS(1, 9)])); } /* TODO: 3SS, 4SS VHT rates */ } static void r12a_write_txpower_cck(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { if (IEEE80211_IS_CHAN_2GHZ(c)) { /* Write per-CCK rate Tx power. */ rtwn_bb_write(sc, R12A_TXAGC_CCK11_1(chain), SM(R12A_TXAGC_CCK1, power[RTWN_RIDX_CCK1]) | SM(R12A_TXAGC_CCK2, power[RTWN_RIDX_CCK2]) | SM(R12A_TXAGC_CCK55, power[RTWN_RIDX_CCK55]) | SM(R12A_TXAGC_CCK11, power[RTWN_RIDX_CCK11])); } } static void r12a_write_txpower_ofdm(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { /* Write per-OFDM rate Tx power. */ rtwn_bb_write(sc, R12A_TXAGC_OFDM18_6(chain), SM(R12A_TXAGC_OFDM06, power[RTWN_RIDX_OFDM6]) | SM(R12A_TXAGC_OFDM09, power[RTWN_RIDX_OFDM9]) | SM(R12A_TXAGC_OFDM12, power[RTWN_RIDX_OFDM12]) | SM(R12A_TXAGC_OFDM18, power[RTWN_RIDX_OFDM18])); rtwn_bb_write(sc, R12A_TXAGC_OFDM54_24(chain), SM(R12A_TXAGC_OFDM24, power[RTWN_RIDX_OFDM24]) | SM(R12A_TXAGC_OFDM36, power[RTWN_RIDX_OFDM36]) | SM(R12A_TXAGC_OFDM48, power[RTWN_RIDX_OFDM48]) | SM(R12A_TXAGC_OFDM54, power[RTWN_RIDX_OFDM54])); } static void r12a_tx_power_training(struct rtwn_softc *sc, int chain, const struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { uint32_t write_data; int32_t power_level; int i; write_data = 0; power_level = (int32_t) power[RTWN_RIDX_HT_MCS(7)]; for (i = 0; i < 3; i++) { if (i == 0) power_level -= 10; else if (i == 1) power_level -= 8; else power_level -= 6; /* Handle underflow and the minimum value (2) */ if (power_level < 2) power_level = 2; write_data |= ((power_level & 0xff) << (i * 8)); } rtwn_bb_setbits(sc, R12A_TX_PWR_TRAINING(chain), 0x00ffffff, write_data); } static void r12a_write_txpower(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { r12a_write_txpower_cck(sc, chain, c, power); r12a_write_txpower_ofdm(sc, chain, c, power); r12a_write_txpower_ht(sc, chain, c, power); r12a_write_txpower_vht(sc, chain, c, power); r12a_tx_power_training(sc, chain, c, power); } static int r12a_get_power_group(struct rtwn_softc *sc, struct ieee80211_channel *c) { uint8_t chan; int group; chan = rtwn_chan2centieee(c); if (IEEE80211_IS_CHAN_2GHZ(c)) { if (chan <= 2) group = 0; else if (chan <= 5) group = 1; else if (chan <= 8) group = 2; else if (chan <= 11) group = 3; else if (chan <= 14) group = 4; else { KASSERT(0, ("wrong 2GHz channel %d!\n", chan)); return (-1); } } else if (IEEE80211_IS_CHAN_5GHZ(c)) { if (chan < 36) return (-1); if (chan <= 42) group = 0; else if (chan <= 48) group = 1; else if (chan <= 58) group = 2; else if (chan <= 64) group = 3; else if (chan <= 106) group = 4; else if (chan <= 114) group = 5; else if (chan <= 122) group = 6; else if (chan <= 130) group = 7; else if (chan <= 138) group = 8; else if (chan <= 144) group = 9; else if (chan <= 155) group = 10; else if (chan <= 161) group = 11; else if (chan <= 171) group = 12; else if (chan <= 177) group = 13; else { KASSERT(0, ("wrong 5GHz channel %d!\n", chan)); return (-1); } } else { KASSERT(0, ("wrong channel band (flags %08X)\n", c->ic_flags)); return (-1); } return (group); } static void r12a_get_txpower(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) { struct r12a_softc *rs = sc->sc_priv; int i, ridx, group, max_mcs, max_vht_mcs; /* Determine channel group. */ group = r12a_get_power_group(sc, c); if (group == -1) { /* shouldn't happen */ device_printf(sc->sc_dev, "%s: incorrect channel\n", __func__); return; } max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1); max_vht_mcs = RTWN_RIDX_VHT_MCS(sc->ntxchains, 9) - 1; /* XXX regulatory */ /* XXX net80211 regulatory */ if (IEEE80211_IS_CHAN_2GHZ(c)) { for (ridx = RTWN_RIDX_CCK1; ridx <= RTWN_RIDX_CCK11; ridx++) power[ridx] = rs->cck_tx_pwr[chain][group]; for (ridx = RTWN_RIDX_OFDM6; ridx <= max_mcs; ridx++) power[ridx] = rs->ht40_tx_pwr_2g[chain][group]; for (ridx = RTWN_RIDX_OFDM6; ridx <= RTWN_RIDX_OFDM54; ridx++) power[ridx] += rs->ofdm_tx_pwr_diff_2g[chain][0]; for (i = 0; i < sc->ntxchains; i++) { uint8_t min_mcs; uint8_t pwr_diff; if (IEEE80211_IS_CHAN_VHT80(c)) { /* Vendor driver uses HT40 values here. */ pwr_diff = rs->bw40_tx_pwr_diff_2g[chain][i]; } else if (IEEE80211_IS_CHAN_HT40(c) || IEEE80211_IS_CHAN_VHT40(c)) pwr_diff = rs->bw40_tx_pwr_diff_2g[chain][i]; else pwr_diff = rs->bw20_tx_pwr_diff_2g[chain][i]; min_mcs = RTWN_RIDX_HT_MCS(i * 8); for (ridx = min_mcs; ridx <= max_mcs; ridx++) power[ridx] += pwr_diff; } } else { /* 5GHz */ /* OFDM + HT */ for (ridx = RTWN_RIDX_OFDM6; ridx <= max_mcs; ridx++) power[ridx] = rs->ht40_tx_pwr_5g[chain][group]; /* VHT */ for (ridx = RTWN_RIDX_VHT_MCS_SHIFT; ridx <= max_vht_mcs; ridx++) power[ridx] = rs->ht40_tx_pwr_5g[chain][group]; /* Add power for OFDM rates */ for (ridx = RTWN_RIDX_OFDM6; ridx <= RTWN_RIDX_OFDM54; ridx++) power[ridx] += rs->ofdm_tx_pwr_diff_5g[chain][0]; for (i = 0; i < sc->ntxchains; i++) { uint8_t min_mcs; uint8_t pwr_diff; if (IEEE80211_IS_CHAN_VHT80(c)) { /* TODO: calculate base value. */ pwr_diff = rs->bw80_tx_pwr_diff_5g[chain][i]; } else if (IEEE80211_IS_CHAN_HT40(c) || IEEE80211_IS_CHAN_VHT40(c)) pwr_diff = rs->bw40_tx_pwr_diff_5g[chain][i]; else pwr_diff = rs->bw20_tx_pwr_diff_5g[chain][i]; /* Adjust HT rates */ min_mcs = RTWN_RIDX_HT_MCS(i * 8); for (ridx = min_mcs; ridx <= max_mcs; ridx++) power[ridx] += pwr_diff; /* Adjust VHT rates */ for (ridx = RTWN_RIDX_VHT_MCS(i, 0); ridx <= RTWN_RIDX_VHT_MCS(i, 9); ridx++) power[ridx] += pwr_diff; } } /* Apply max limit. */ for (ridx = RTWN_RIDX_CCK1; ridx <= max_mcs; ridx++) { if (power[ridx] > R92C_MAX_TX_PWR) power[ridx] = R92C_MAX_TX_PWR; } for (ridx = RTWN_RIDX_VHT_MCS(0, 0); ridx <= RTWN_RIDX_VHT_MCS(3, 9); ridx++) { if (power[ridx] > R92C_MAX_TX_PWR) power[ridx] = R92C_MAX_TX_PWR; } #ifdef RTWN_DEBUG if (sc->sc_debug & RTWN_DEBUG_TXPWR) { /* Dump per-rate Tx power values. */ printf("Tx power for chain %d:\n", chain); for (ridx = RTWN_RIDX_CCK1; ridx <= max_mcs; ridx++) printf("Rate %d = %u\n", ridx, power[ridx]); /* TODO: dump VHT 0..9 for each spatial stream */ } #endif } static void r12a_set_txpower(struct rtwn_softc *sc, struct ieee80211_channel *c) { uint8_t power[RTWN_RIDX_COUNT]; int i; for (i = 0; i < sc->ntxchains; i++) { memset(power, 0, sizeof(power)); /* Compute per-rate Tx power values. */ r12a_get_txpower(sc, i, c, power); /* Write per-rate Tx power values to hardware. */ r12a_write_txpower(sc, i, c, power); } } void r12a_fix_spur(struct rtwn_softc *sc, struct ieee80211_channel *c) { struct r12a_softc *rs = sc->sc_priv; uint16_t chan = rtwn_chan2centieee(c); if (rs->chip & R12A_CHIP_C_CUT) { if (IEEE80211_IS_CHAN_HT40(c) && chan == 11) { rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0xc00); rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0, 0x40000000); } else { rtwn_bb_setbits(sc, R12A_RFMOD, 0x400, 0x800); if ((IEEE80211_IS_CHAN_B(c) || IEEE80211_IS_CHAN_ANYG(c) || IEEE80211_IS_CHAN_HT20(c)) && /* 2GHz, 20 MHz */ (chan == 13 || chan == 14)) { rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0x300); rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0, 0x40000000); } else if (IEEE80211_IS_CHAN_HT40(c) || IEEE80211_IS_CHAN_VHT40(c)) { /* XXX double check! */ rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0, 0x40000000); } else if (IEEE80211_IS_CHAN_VHT80(c)) { /* XXX double check! */ rtwn_bb_setbits(sc, R12A_RFMOD, 0x100, 0x200); rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0x40000000, 0); } } } else { /* Set ADC clock to 160M to resolve 2480 MHz spur. */ if ((IEEE80211_IS_CHAN_B(c) || IEEE80211_IS_CHAN_ANYG(c) || IEEE80211_IS_CHAN_HT20(c)) && /* 2GHz, 20 MHz */ (chan == 13 || chan == 14)) rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0x300); else if (IEEE80211_IS_CHAN_2GHZ(c)) rtwn_bb_setbits(sc, R12A_RFMOD, 0x100, 0x200); } } static void r12a_set_band(struct rtwn_softc *sc, struct ieee80211_channel *c) { struct ieee80211com *ic = &sc->sc_ic; struct r12a_softc *rs = sc->sc_priv; uint32_t basicrates; uint8_t swing; int i; /* Check if band was changed. */ if ((sc->sc_flags & (RTWN_STARTED | RTWN_RUNNING)) != RTWN_STARTED && IEEE80211_IS_CHAN_5GHZ(c) ^ !(rtwn_read_1(sc, R12A_CCK_CHECK) & R12A_CCK_CHECK_5GHZ)) return; + /* Note: this only fetches the basic rates, not the full rateset */ rtwn_get_rates(sc, ieee80211_get_suprates(ic, c), NULL, &basicrates, - NULL, 1); + NULL, NULL, 1); if (IEEE80211_IS_CHAN_2GHZ(c)) { rtwn_r12a_set_band_2ghz(sc, basicrates); swing = rs->tx_bbswing_2g; } else if (IEEE80211_IS_CHAN_5GHZ(c)) { rtwn_r12a_set_band_5ghz(sc, basicrates); swing = rs->tx_bbswing_5g; } else { KASSERT(0, ("wrong channel flags %08X\n", c->ic_flags)); return; } /* XXX PATH_B is set by vendor driver. */ for (i = 0; i < 2; i++) { uint16_t val = 0; switch ((swing >> i * 2) & 0x3) { case 0: val = 0x200; /* 0 dB */ break; case 1: val = 0x16a; /* -3 dB */ break; case 2: val = 0x101; /* -6 dB */ break; case 3: val = 0xb6; /* -9 dB */ break; } rtwn_bb_setbits(sc, R12A_TX_SCALE(i), R12A_TX_SCALE_SWING_M, val << R12A_TX_SCALE_SWING_S); } } void r12a_set_chan(struct rtwn_softc *sc, struct ieee80211_channel *c) { uint32_t val; uint16_t chan; int i; r12a_set_band(sc, c); chan = rtwn_chan2centieee(c); if (36 <= chan && chan <= 48) val = 0x09280000; else if (50 <= chan && chan <= 64) val = 0x08a60000; else if (100 <= chan && chan <= 116) val = 0x08a40000; else if (118 <= chan) val = 0x08240000; else val = 0x12d40000; rtwn_bb_setbits(sc, R12A_FC_AREA, 0x1ffe0000, val); for (i = 0; i < sc->nrxchains; i++) { if (36 <= chan && chan <= 64) val = 0x10100; else if (100 <= chan && chan <= 140) val = 0x30100; else if (140 < chan) val = 0x50100; else val = 0x00000; rtwn_rf_setbits(sc, i, R92C_RF_CHNLBW, 0x70300, val); /* RTL8812AU-specific */ rtwn_r12a_fix_spur(sc, c); KASSERT(chan <= 0xff, ("%s: chan %d\n", __func__, chan)); rtwn_rf_setbits(sc, i, R92C_RF_CHNLBW, 0xff, chan); } if (IEEE80211_IS_CHAN_VHT80(c)) { /* 80 MHz */ uint8_t ext20 = 0, ext40 = 0; uint8_t txsc; /* calculate ext20/ext40 */ if (c->ic_ieee > c->ic_vht_ch_freq1) { if (c->ic_ieee - c->ic_vht_ch_freq1 == 2) { ext20 = R12A_DATA_SEC_PRIM_UP_20; ext40 = R12A_DATA_SEC_PRIM_UP_40; } else { ext20 = R12A_DATA_SEC_PRIM_UPPER_20; ext40 = R12A_DATA_SEC_PRIM_UP_40; } } else { if (c->ic_vht_ch_freq1 - c->ic_ieee == 2) { ext20 = R12A_DATA_SEC_PRIM_DOWN_20; ext40 = R12A_DATA_SEC_PRIM_DOWN_40; } else { ext20 = R12A_DATA_SEC_PRIM_LOWER_20; ext40 = R12A_DATA_SEC_PRIM_DOWN_40; } } /* Form txsc from sec20/sec40 config */ txsc = SM(R12A_DATA_SEC_TXSC_20M, ext20); txsc |= SM(R12A_DATA_SEC_TXSC_40M, ext40); rtwn_setbits_2(sc, R92C_WMAC_TRXPTCL_CTL, 0x180, 0x100); /* DATA_SEC, for ext20/ext40 */ rtwn_write_1(sc, R12A_DATA_SEC, txsc); /* ADCCLK */ rtwn_bb_setbits(sc, R12A_RFMOD, 0x003003c3, 0x00300202); /* ADC160 - Set bit 30 */ rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0, 0x40000000); /* ADCCLK, ext20 */ /* discard high 4 bits */ val = rtwn_bb_read(sc, R12A_RFMOD); val = RW(val, R12A_RFMOD_EXT_CHAN, ext20); rtwn_bb_write(sc, R12A_RFMOD, val); /* CCA2ND, ext20 */ val = rtwn_bb_read(sc, R12A_CCA_ON_SEC); val = RW(val, R12A_CCA_ON_SEC_EXT_CHAN, ext20); rtwn_bb_write(sc, R12A_CCA_ON_SEC, val); /* PEAK_TH */ if (rtwn_read_1(sc, 0x837) & 0x04) val = 0x01400000; else if (sc->nrxchains == 2 && sc->ntxchains == 2) val = 0x01800000; else val = 0x01c00000; rtwn_bb_setbits(sc, R12A_L1_PEAK_TH, 0x03c00000, val); /* BWMASK */ val = 0x0; } else if (IEEE80211_IS_CHAN_HT40(c) || IEEE80211_IS_CHAN_VHT40(c)) { /* 40 MHz */ uint8_t ext_chan; if (IEEE80211_IS_CHAN_HT40U(c)) ext_chan = R12A_DATA_SEC_PRIM_DOWN_20; else ext_chan = R12A_DATA_SEC_PRIM_UP_20; rtwn_setbits_2(sc, R92C_WMAC_TRXPTCL_CTL, 0x100, 0x80); rtwn_write_1(sc, R12A_DATA_SEC, ext_chan); rtwn_bb_setbits(sc, R12A_RFMOD, 0x003003c3, 0x00300201); rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0x40000000, 0); /* discard high 4 bits */ val = rtwn_bb_read(sc, R12A_RFMOD); val = RW(val, R12A_RFMOD_EXT_CHAN, ext_chan); rtwn_bb_write(sc, R12A_RFMOD, val); val = rtwn_bb_read(sc, R12A_CCA_ON_SEC); val = RW(val, R12A_CCA_ON_SEC_EXT_CHAN, ext_chan); rtwn_bb_write(sc, R12A_CCA_ON_SEC, val); if (rtwn_read_1(sc, 0x837) & 0x04) val = 0x01800000; else if (sc->nrxchains == 2 && sc->ntxchains == 2) val = 0x01c00000; else val = 0x02000000; rtwn_bb_setbits(sc, R12A_L1_PEAK_TH, 0x03c00000, val); if (IEEE80211_IS_CHAN_HT40U(c)) rtwn_bb_setbits(sc, R92C_CCK0_SYSTEM, 0x10, 0); else rtwn_bb_setbits(sc, R92C_CCK0_SYSTEM, 0, 0x10); val = 0x400; } else { /* 20 MHz */ rtwn_setbits_2(sc, R92C_WMAC_TRXPTCL_CTL, 0x180, 0); rtwn_write_1(sc, R12A_DATA_SEC, R12A_DATA_SEC_NO_EXT); rtwn_bb_setbits(sc, R12A_RFMOD, 0x003003c3, 0x00300200); rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0x40000000, 0); if (sc->nrxchains == 2 && sc->ntxchains == 2) val = 0x01c00000; else val = 0x02000000; rtwn_bb_setbits(sc, R12A_L1_PEAK_TH, 0x03c00000, val); val = 0xc00; } /* RTL8812AU-specific */ rtwn_r12a_fix_spur(sc, c); for (i = 0; i < sc->nrxchains; i++) rtwn_rf_setbits(sc, i, R92C_RF_CHNLBW, 0xc00, val); /* Set Tx power for this new channel. */ r12a_set_txpower(sc, c); } void r12a_set_band_2ghz(struct rtwn_softc *sc, uint32_t basicrates) { struct r12a_softc *rs = sc->sc_priv; /* Enable CCK / OFDM. */ rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, 0, R12A_OFDMCCK_EN_CCK | R12A_OFDMCCK_EN_OFDM); rtwn_bb_setbits(sc, R12A_BW_INDICATION, 0x02, 0x01); rtwn_bb_setbits(sc, R12A_PWED_TH, 0x3e000, 0x2e000); /* Select AGC table. */ rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x03, 0); switch (rs->rfe_type) { case 0: case 1: case 2: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x77777777); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77777777); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0); break; case 3: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x54337770); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x54337770); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0x01000000); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0x01000000); rtwn_bb_setbits(sc, R12A_ANTSEL_SW, 0x0303, 0x01); break; case 4: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x77777777); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77777777); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0x00100000); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0x00100000); break; case 5: rtwn_write_1(sc, R12A_RFE_PINMUX(0) + 2, 0x77); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77777777); rtwn_setbits_1(sc, R12A_RFE_INV(0) + 3, 0x01, 0); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0); break; default: break; } rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0x10); rtwn_bb_setbits(sc, R12A_CCK_RX_PATH, 0x0f000000, 0x01000000); /* Write basic rates. */ rtwn_set_basicrates(sc, basicrates); rtwn_write_1(sc, R12A_CCK_CHECK, 0); } void r12a_set_band_5ghz(struct rtwn_softc *sc, uint32_t basicrates) { struct r12a_softc *rs = sc->sc_priv; int ntries; rtwn_write_1(sc, R12A_CCK_CHECK, R12A_CCK_CHECK_5GHZ); for (ntries = 0; ntries < 100; ntries++) { if ((rtwn_read_2(sc, R12A_TXPKT_EMPTY) & 0x30) == 0x30) break; rtwn_delay(sc, 25); } if (ntries == 100) { device_printf(sc->sc_dev, "%s: TXPKT_EMPTY check failed (%04X)\n", __func__, rtwn_read_2(sc, R12A_TXPKT_EMPTY)); } /* Enable OFDM. */ rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, R12A_OFDMCCK_EN_CCK, R12A_OFDMCCK_EN_OFDM); rtwn_bb_setbits(sc, R12A_BW_INDICATION, 0x01, 0x02); rtwn_bb_setbits(sc, R12A_PWED_TH, 0x3e000, 0x2a000); /* Select AGC table. */ rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x03, 0x01); switch (rs->rfe_type) { case 0: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x77337717); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77337717); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0x01000000); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0x01000000); break; case 1: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x77337717); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77337717); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0); break; case 2: case 4: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x77337777); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77337777); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0x01000000); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0x01000000); break; case 3: rtwn_bb_write(sc, R12A_RFE_PINMUX(0), 0x54337717); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x54337717); rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x3ff00000, 0x01000000); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0x01000000); rtwn_bb_setbits(sc, R12A_ANTSEL_SW, 0x0303, 0x01); break; case 5: rtwn_write_1(sc, R12A_RFE_PINMUX(0) + 2, 0x33); rtwn_bb_write(sc, R12A_RFE_PINMUX(1), 0x77337777); rtwn_setbits_1(sc, R12A_RFE_INV(0) + 3, 0, 0x01); rtwn_bb_setbits(sc, R12A_RFE_INV(1), 0x3ff00000, 0x01000000); break; default: break; } rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0); rtwn_bb_setbits(sc, R12A_CCK_RX_PATH, 0, 0x0f000000); /* Write basic rates. */ rtwn_set_basicrates(sc, basicrates); }