uart: provide and use default rclk for JH7110 UART

A regression in the u-boot-provided JH7110 device tree leaves the uart
incorrectly configured.

The issue arises when a baud rate is specified ('current-speed'
property), but the rclk value is not ('clock-frequency'). Previous
releases, e.g. v2025.04, provided both.

The alternative way to retrieve this value is to query the parent clock,
but our clk framework is not available during early console probing and
configuration.

In this instance, we end up defaulting to DEFAULT_RCLK in ns8250_init(),
which is the wrong value. The relevant uart class (uart_snps) should
provide a default rclk in its definition, but it does not. Add a new
variant class with the correct default rclk of 24000000.

Finally, uart_cpu_fdt_probe() needs to be updated to actually query this
default value when it does not find a 'clock-frequency' property. This
was simply missing; the ACPI uart bus behaves identically, see
uart_acpi_probe().

PR: 289978
Reported by: rdunkle@smallcatbrain.com
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D53119