diff --git a/sys/compat/linuxkpi/common/include/asm/atomic-long.h b/sys/compat/linuxkpi/common/include/asm/atomic-long.h index b7ccba5fcba8..374f015e20b8 100644 --- a/sys/compat/linuxkpi/common/include/asm/atomic-long.h +++ b/sys/compat/linuxkpi/common/include/asm/atomic-long.h @@ -1,100 +1,106 @@ /*- * Copyright (c) 2010 Isilon Systems, Inc. * Copyright (c) 2010 iX Systems, Inc. * Copyright (c) 2010 Panasas, Inc. * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _ATOMIC_LONG_H_ #define _ATOMIC_LONG_H_ #include #include #include #define ATOMIC_LONG_INIT(x) { .counter = (x) } typedef struct { volatile long counter; } atomic_long_t; #define atomic_long_add(i, v) atomic_long_add_return((i), (v)) #define atomic_long_inc_return(v) atomic_long_add_return(1, (v)) #define atomic_long_inc_not_zero(v) atomic_long_add_unless((v), 1, 0) static inline long atomic_long_add_return(long i, atomic_long_t *v) { return i + atomic_fetchadd_long(&v->counter, i); } static inline void atomic_long_set(atomic_long_t *v, long i) { atomic_store_rel_long(&v->counter, i); } static inline long atomic_long_read(atomic_long_t *v) { return atomic_load_acq_long(&v->counter); } static inline long atomic_long_inc(atomic_long_t *v) { return atomic_fetchadd_long(&v->counter, 1) + 1; } static inline long atomic_long_dec(atomic_long_t *v) { return atomic_fetchadd_long(&v->counter, -1) - 1; } +static inline long +atomic_long_xchg(atomic_long_t *v, long val) +{ + return atomic_swap_long(&v->counter, val); +} + static inline int atomic_long_add_unless(atomic_long_t *v, long a, long u) { long c; for (;;) { c = atomic_long_read(v); if (unlikely(c == u)) break; if (likely(atomic_cmpset_long(&v->counter, c, c + a))) break; } return (c != u); } static inline long atomic_long_dec_and_test(atomic_long_t *v) { long i = atomic_long_add(-1, v); return i == 0 ; } #endif /* _ATOMIC_LONG_H_ */ diff --git a/sys/compat/linuxkpi/common/include/asm/atomic.h b/sys/compat/linuxkpi/common/include/asm/atomic.h index a7b60c01c312..5f07d0b2ad72 100644 --- a/sys/compat/linuxkpi/common/include/asm/atomic.h +++ b/sys/compat/linuxkpi/common/include/asm/atomic.h @@ -1,194 +1,218 @@ /*- * Copyright (c) 2010 Isilon Systems, Inc. * Copyright (c) 2010 iX Systems, Inc. * Copyright (c) 2010 Panasas, Inc. * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _ASM_ATOMIC_H_ #define _ASM_ATOMIC_H_ #include #include #include #define ATOMIC_INIT(x) { .counter = (x) } typedef struct { volatile int counter; } atomic_t; /*------------------------------------------------------------------------* * 32-bit atomic operations *------------------------------------------------------------------------*/ #define atomic_add(i, v) atomic_add_return((i), (v)) #define atomic_sub(i, v) atomic_sub_return((i), (v)) #define atomic_inc_return(v) atomic_add_return(1, (v)) #define atomic_add_negative(i, v) (atomic_add_return((i), (v)) < 0) #define atomic_add_and_test(i, v) (atomic_add_return((i), (v)) == 0) #define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0) #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) #define atomic_dec_return(v) atomic_sub_return(1, (v)) #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) static inline int atomic_add_return(int i, atomic_t *v) { return i + atomic_fetchadd_int(&v->counter, i); } static inline int atomic_sub_return(int i, atomic_t *v) { return atomic_fetchadd_int(&v->counter, -i) - i; } static inline void atomic_set(atomic_t *v, int i) { atomic_store_rel_int(&v->counter, i); } +static inline void +atomic_set_release(atomic_t *v, int i) +{ + atomic_store_rel_int(&v->counter, i); +} + static inline void atomic_set_mask(unsigned int mask, atomic_t *v) { atomic_set_int(&v->counter, mask); } static inline int atomic_read(const atomic_t *v) { return atomic_load_acq_int(&__DECONST(atomic_t *, v)->counter); } static inline int atomic_inc(atomic_t *v) { return atomic_fetchadd_int(&v->counter, 1) + 1; } static inline int atomic_dec(atomic_t *v) { return atomic_fetchadd_int(&v->counter, -1) - 1; } static inline int atomic_add_unless(atomic_t *v, int a, int u) { int c; for (;;) { c = atomic_read(v); if (unlikely(c == u)) break; if (likely(atomic_cmpset_int(&v->counter, c, c + a))) break; } return (c != u); } static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) { atomic_clear_int(&v->counter, mask); } static inline int atomic_xchg(atomic_t *v, int i) { #if defined(__i386__) || defined(__amd64__) || \ defined(__arm__) || defined(__aarch64__) return (atomic_swap_int(&v->counter, i)); #else int ret; for (;;) { ret = atomic_load_acq_int(&v->counter); if (atomic_cmpset_int(&v->counter, ret, i)) break; } return (ret); #endif } static inline int atomic_cmpxchg(atomic_t *v, int old, int new) { int ret = old; for (;;) { if (atomic_cmpset_int(&v->counter, old, new)) break; ret = atomic_load_acq_int(&v->counter); if (ret != old) break; } return (ret); } #define cmpxchg(ptr, old, new) ({ \ __typeof(*(ptr)) __ret = (old); \ CTASSERT(sizeof(__ret) == 4 || sizeof(__ret) == 8); \ for (;;) { \ if (sizeof(__ret) == 4) { \ if (atomic_cmpset_int((volatile int *) \ (ptr), (old), (new))) \ break; \ __ret = atomic_load_acq_int( \ (volatile int *)(ptr)); \ if (__ret != (old)) \ break; \ } else { \ if (atomic_cmpset_64( \ (volatile int64_t *)(ptr), \ (old), (new))) \ break; \ __ret = atomic_load_acq_64( \ (volatile int64_t *)(ptr)); \ if (__ret != (old)) \ break; \ } \ } \ __ret; \ }) #define LINUX_ATOMIC_OP(op, c_op) \ static inline void atomic_##op(int i, atomic_t *v) \ { \ int c, old; \ \ c = v->counter; \ while ((old = atomic_cmpxchg(v, c, c c_op i)) != c) \ c = old; \ } +#define LINUX_ATOMIC_FETCH_OP(op, c_op) \ +static inline int atomic_fetch_##op(int i, atomic_t *v) \ +{ \ + int c, old; \ + \ + c = v->counter; \ + while ((old = atomic_cmpxchg(v, c, c c_op i)) != c) \ + c = old; \ + \ + return (c); \ +} + LINUX_ATOMIC_OP(or, |) LINUX_ATOMIC_OP(and, &) +LINUX_ATOMIC_OP(andnot, &~) LINUX_ATOMIC_OP(xor, ^) +LINUX_ATOMIC_FETCH_OP(or, |) +LINUX_ATOMIC_FETCH_OP(and, &) +LINUX_ATOMIC_FETCH_OP(andnot, &~) +LINUX_ATOMIC_FETCH_OP(xor, ^) + #endif /* _ASM_ATOMIC_H_ */ diff --git a/sys/compat/linuxkpi/common/include/asm/atomic64.h b/sys/compat/linuxkpi/common/include/asm/atomic64.h index f8dd2bbf5833..783f6997dde2 100644 --- a/sys/compat/linuxkpi/common/include/asm/atomic64.h +++ b/sys/compat/linuxkpi/common/include/asm/atomic64.h @@ -1,137 +1,139 @@ /*- * Copyright (c) 2016 Mellanox Technologies, Ltd. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _ASM_ATOMIC64_H_ #define _ASM_ATOMIC64_H_ #include #include #include typedef struct { volatile int64_t counter; } atomic64_t; +#define ATOMIC64_INIT(x) { .counter = (x) } + /*------------------------------------------------------------------------* * 64-bit atomic operations *------------------------------------------------------------------------*/ #define atomic64_add(i, v) atomic64_add_return((i), (v)) #define atomic64_sub(i, v) atomic64_sub_return((i), (v)) #define atomic64_inc_return(v) atomic64_add_return(1, (v)) #define atomic64_add_negative(i, v) (atomic64_add_return((i), (v)) < 0) #define atomic64_add_and_test(i, v) (atomic64_add_return((i), (v)) == 0) #define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0) #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) #define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0) #define atomic64_dec_return(v) atomic64_sub_return(1, (v)) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) static inline int64_t atomic64_add_return(int64_t i, atomic64_t *v) { return i + atomic_fetchadd_64(&v->counter, i); } static inline int64_t atomic64_sub_return(int64_t i, atomic64_t *v) { return atomic_fetchadd_64(&v->counter, -i) - i; } static inline void atomic64_set(atomic64_t *v, int64_t i) { atomic_store_rel_64(&v->counter, i); } static inline int64_t atomic64_read(atomic64_t *v) { return atomic_load_acq_64(&v->counter); } static inline int64_t atomic64_inc(atomic64_t *v) { return atomic_fetchadd_64(&v->counter, 1) + 1; } static inline int64_t atomic64_dec(atomic64_t *v) { return atomic_fetchadd_64(&v->counter, -1) - 1; } static inline int64_t atomic64_add_unless(atomic64_t *v, int64_t a, int64_t u) { int64_t c; for (;;) { c = atomic64_read(v); if (unlikely(c == u)) break; if (likely(atomic_cmpset_64(&v->counter, c, c + a))) break; } return (c != u); } static inline int64_t atomic64_xchg(atomic64_t *v, int64_t i) { #if defined(__i386__) || defined(__amd64__) || \ defined(__arm__) || defined(__aarch64__) return (atomic_swap_64(&v->counter, i)); #else int64_t ret; for (;;) { ret = atomic_load_acq_64(&v->counter); if (atomic_cmpset_64(&v->counter, ret, i)) break; } return (ret); #endif } static inline int64_t atomic64_cmpxchg(atomic64_t *v, int64_t old, int64_t new) { int64_t ret = old; for (;;) { if (atomic_cmpset_64(&v->counter, old, new)) break; ret = atomic_load_acq_64(&v->counter); if (ret != old) break; } return (ret); } #endif /* _ASM_ATOMIC64_H_ */