diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64 index 1f344d0273b8..a3c325070469 100644 --- a/sys/conf/files.arm64 +++ b/sys/conf/files.arm64 @@ -1,571 +1,572 @@ # $FreeBSD$ ## ## Kernel ## kern/msi_if.m optional intrng kern/pic_if.m optional intrng kern/subr_devmap.c standard kern/subr_intr.c optional intrng kern/subr_physmem.c standard libkern/memcmp.c standard \ compile-with "${NORMAL_C:N-fsanitize*}" libkern/memset.c standard \ compile-with "${NORMAL_C:N-fsanitize*}" libkern/strlen.c standard libkern/arm64/crc32c_armv8.S standard arm/arm/generic_timer.c standard arm/arm/gic.c standard arm/arm/gic_acpi.c optional acpi arm/arm/gic_fdt.c optional fdt arm/arm/gic_if.m standard arm/arm/pmu.c standard arm/arm/pmu_acpi.c optional acpi arm/arm/pmu_fdt.c optional fdt arm64/acpica/acpi_iort.c optional acpi arm64/acpica/acpi_machdep.c optional acpi arm64/acpica/OsdEnvironment.c optional acpi arm64/acpica/acpi_wakeup.c optional acpi arm64/acpica/pci_cfgreg.c optional acpi pci arm64/arm64/autoconf.c standard arm64/arm64/bus_machdep.c standard arm64/arm64/bus_space_asm.S standard arm64/arm64/busdma_bounce.c standard arm64/arm64/busdma_machdep.c standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard arm64/arm64/cpu_errata.c standard arm64/arm64/cpufunc_asm.S standard arm64/arm64/db_disasm.c optional ddb arm64/arm64/db_interface.c optional ddb arm64/arm64/db_trace.c optional ddb arm64/arm64/debug_monitor.c standard arm64/arm64/disassem.c optional ddb arm64/arm64/dump_machdep.c standard arm64/arm64/efirt_machdep.c optional efirt arm64/arm64/elf32_machdep.c optional compat_freebsd32 arm64/arm64/elf_machdep.c standard arm64/arm64/exception.S standard arm64/arm64/exec_machdep.c standard arm64/arm64/freebsd32_machdep.c optional compat_freebsd32 arm64/arm64/gdb_machdep.c optional gdb arm64/arm64/gicv3_its.c optional intrng fdt arm64/arm64/gic_v3.c standard arm64/arm64/gic_v3_acpi.c optional acpi arm64/arm64/gic_v3_fdt.c optional fdt arm64/arm64/identcpu.c standard arm64/arm64/in_cksum.c optional inet | inet6 arm64/arm64/locore.S standard no-obj arm64/arm64/machdep.c standard arm64/arm64/machdep_boot.c standard arm64/arm64/mem.c standard arm64/arm64/memcpy.S standard arm64/arm64/memmove.S standard arm64/arm64/minidump_machdep.c standard arm64/arm64/mp_machdep.c optional smp arm64/arm64/nexus.c standard arm64/arm64/ofw_machdep.c optional fdt arm64/arm64/pmap.c standard arm64/arm64/ptrace_machdep.c standard arm64/arm64/stack_machdep.c optional ddb | stack arm64/arm64/support.S standard arm64/arm64/swtch.S standard arm64/arm64/sys_machdep.c standard arm64/arm64/trap.c standard arm64/arm64/uio_machdep.c standard arm64/arm64/uma_machdep.c standard arm64/arm64/undefined.c standard arm64/arm64/unwind.c optional ddb | kdtrace_hooks | stack arm64/arm64/vfp.c standard arm64/arm64/vm_machdep.c standard arm64/coresight/coresight.c standard arm64/coresight/coresight_acpi.c optional acpi arm64/coresight/coresight_fdt.c optional fdt arm64/coresight/coresight_if.m standard arm64/coresight/coresight_cmd.c standard arm64/coresight/coresight_cpu_debug.c standard arm64/coresight/coresight_etm4x.c standard arm64/coresight/coresight_etm4x_acpi.c optional acpi arm64/coresight/coresight_etm4x_fdt.c optional fdt arm64/coresight/coresight_funnel.c standard arm64/coresight/coresight_funnel_acpi.c optional acpi arm64/coresight/coresight_funnel_fdt.c optional fdt arm64/coresight/coresight_replicator.c standard arm64/coresight/coresight_replicator_acpi.c optional acpi arm64/coresight/coresight_replicator_fdt.c optional fdt arm64/coresight/coresight_tmc.c standard arm64/coresight/coresight_tmc_acpi.c optional acpi arm64/coresight/coresight_tmc_fdt.c optional fdt arm64/iommu/iommu.c optional iommu arm64/iommu/iommu_if.m optional iommu arm64/iommu/iommu_pmap.c optional iommu arm64/iommu/smmu.c optional iommu arm64/iommu/smmu_acpi.c optional acpi iommu arm64/iommu/smmu_quirks.c optional iommu dev/iommu/busdma_iommu.c optional iommu dev/iommu/iommu_gas.c optional iommu crypto/armv8/armv8_crypto.c optional armv8crypto armv8_crypto_wrap.o optional armv8crypto \ dependency "$S/crypto/armv8/armv8_crypto_wrap.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "armv8_crypto_wrap.o" aesv8-armx.o optional armv8crypto | ossl \ dependency "$S/crypto/openssl/aarch64/aesv8-armx.S" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "aesv8-armx.o" ghashv8-armx.o optional armv8crypto \ dependency "$S/crypto/openssl/aarch64/ghashv8-armx.S" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "ghashv8-armx.o" crypto/des/des_enc.c optional netsmb crypto/openssl/ossl_aarch64.c optional ossl crypto/openssl/aarch64/chacha-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/poly1305-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/sha1-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/sha256-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/sha512-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" crypto/openssl/aarch64/vpaes-armv8.S optional ossl \ compile-with "${CC} -c ${CFLAGS:N-mgeneral-regs-only} ${WERROR} ${.IMPSRC}" dev/acpica/acpi_bus_if.m optional acpi dev/acpica/acpi_if.m optional acpi dev/acpica/acpi_pci_link.c optional acpi pci dev/acpica/acpi_pcib.c optional acpi pci dev/acpica/acpi_pxm.c optional acpi dev/ahci/ahci_generic.c optional ahci cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" ## ## ASoC support ## dev/sound/fdt/audio_dai_if.m optional sound fdt dev/sound/fdt/audio_soc.c optional sound fdt dev/sound/fdt/dummy_codec.c optional sound fdt dev/sound/fdt/simple_amplifier.c optional sound fdt ## ## Device drivers ## dev/axgbe/if_axgbe.c optional axa dev/axgbe/xgbe-desc.c optional axa dev/axgbe/xgbe-dev.c optional axa dev/axgbe/xgbe-drv.c optional axa dev/axgbe/xgbe-mdio.c optional axa dev/axgbe/xgbe-sysctl.c optional axa dev/axgbe/xgbe-txrx.c optional axa dev/axgbe/xgbe_osdep.c optional axa dev/axgbe/xgbe-phy-v1.c optional axa dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/dwc/if_dwc.c optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 | fdt dwc_socfpga soc_intel_stratix10 dev/dwc/if_dwc_if.m optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 | fdt dwc_socfpga soc_intel_stratix10 dev/enetc/enetc_mdio.c optional enetc soc_nxp_ls dev/enetc/if_enetc.c optional enetc iflib pci fdt soc_nxp_ls dev/etherswitch/felix/felix.c optional enetc etherswitch fdt felix pci soc_nxp_ls dev/gpio/pl061.c optional pl061 gpio dev/gpio/pl061_acpi.c optional pl061 gpio acpi dev/gpio/pl061_fdt.c optional pl061 gpio fdt dev/gpio/qoriq_gpio.c optional SOC_NXP_LS gpio fdt dev/hwpmc/hwpmc_arm64.c optional hwpmc dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/ice/if_ice_iflib.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_lib.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_osdep.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_resmgr.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_strings.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_iflib_recovery_txrx.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_iflib_txrx.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_common.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_controlq.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_dcb.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_flex_pipe.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_flow.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_nvm.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_sched.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_sriov.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_switch.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_vlan_mode.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" ice_ddp.c optional ice_ddp \ compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01031800 -mice_ddp -c${.TARGET}" \ no-ctfconvert no-implicit-rule before-depend local \ clean "ice_ddp.c" ice_ddp.fwo optional ice_ddp \ dependency "ice_ddp.fw" \ compile-with "${NORMAL_FWO}" \ no-implicit-rule \ clean "ice_ddp.fwo" ice_ddp.fw optional ice_ddp \ dependency "$S/contrib/dev/ice/ice-1.3.24.0.pkg" \ compile-with "${CP} $S/contrib/dev/ice/ice-1.3.24.0.pkg ice_ddp.fw" \ no-obj no-implicit-rule \ clean "ice_ddp.fw" dev/iicbus/sy8106a.c optional sy8106a fdt dev/iicbus/twsi/mv_twsi.c optional twsi fdt dev/iicbus/twsi/a10_twsi.c optional twsi fdt dev/iicbus/twsi/twsi.c optional twsi fdt dev/ipmi/ipmi.c optional ipmi dev/ipmi/ipmi_acpi.c optional ipmi acpi dev/ipmi/ipmi_kcs.c optional ipmi dev/ipmi/ipmi_smic.c optional ipmi dev/mbox/mbox_if.m optional soc_brcm_bcm2837 dev/mmc/host/dwmmc.c optional dwmmc fdt dev/mmc/host/dwmmc_altera.c optional dwmmc dwmmc_altera fdt dev/mmc/host/dwmmc_hisi.c optional dwmmc dwmmc_hisi fdt dev/mmc/host/dwmmc_rockchip.c optional dwmmc rk_dwmmc fdt dev/neta/if_mvneta_fdt.c optional neta fdt dev/neta/if_mvneta.c optional neta mdio mii dev/ofw/ofw_cpu.c optional fdt dev/ofw/ofw_pci.c optional fdt pci dev/ofw/ofw_pcib.c optional fdt pci dev/pci/controller/pci_n1sdp.c optional pci_n1sdp acpi dev/pci/pci_host_generic.c optional pci dev/pci/pci_host_generic_acpi.c optional pci acpi dev/pci/pci_host_generic_fdt.c optional pci fdt dev/pci/pci_dw_mv.c optional pci fdt dev/pci/pci_dw.c optional pci fdt dev/pci/pci_dw_if.m optional pci fdt dev/psci/psci.c standard dev/psci/smccc_arm64.S standard dev/psci/smccc.c standard dev/safexcel/safexcel.c optional safexcel fdt dev/sdhci/sdhci_xenon.c optional sdhci_xenon sdhci dev/sdhci/sdhci_xenon_acpi.c optional sdhci_xenon sdhci acpi dev/sdhci/sdhci_xenon_fdt.c optional sdhci_xenon sdhci fdt dev/uart/uart_cpu_arm64.c optional uart dev/uart/uart_dev_mu.c optional uart uart_mu dev/uart/uart_dev_pl011.c optional uart pl011 dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220 dev/usb/controller/dwc3.c optional fdt dwc3 dev/usb/controller/ehci_mv.c optional ehci_mv fdt dev/usb/controller/generic_ehci.c optional ehci dev/usb/controller/generic_ehci_acpi.c optional ehci acpi dev/usb/controller/generic_ehci_fdt.c optional ehci fdt dev/usb/controller/generic_ohci.c optional ohci fdt dev/usb/controller/generic_usb_if.m optional ohci fdt dev/usb/controller/musb_otg_allwinner.c optional musb fdt soc_allwinner_a64 dev/usb/controller/usb_nop_xceiv.c optional fdt ext_resources dev/usb/controller/generic_xhci.c optional xhci dev/usb/controller/generic_xhci_acpi.c optional xhci acpi dev/usb/controller/generic_xhci_fdt.c optional xhci fdt dev/vnic/mrml_bridge.c optional vnic fdt dev/vnic/nic_main.c optional vnic pci dev/vnic/nicvf_main.c optional vnic pci pci_iov dev/vnic/nicvf_queues.c optional vnic pci pci_iov dev/vnic/thunder_bgx_fdt.c optional soc_cavm_thunderx pci vnic fdt dev/vnic/thunder_bgx.c optional soc_cavm_thunderx pci vnic pci dev/vnic/thunder_mdio_fdt.c optional soc_cavm_thunderx pci vnic fdt dev/vnic/thunder_mdio.c optional soc_cavm_thunderx pci vnic dev/vnic/lmac_if.m optional inet | inet6 | vnic ## ## SoC Support ## # Allwinner common files arm/allwinner/a10_timer.c optional a10_timer fdt arm/allwinner/a10_codec.c optional sound a10_codec arm/allwinner/a31_dmac.c optional a31_dmac arm/allwinner/a33_codec.c optional fdt sound a33_codec arm/allwinner/a64/sun50i_a64_acodec.c optional fdt sound a64_codec arm/allwinner/sunxi_dma_if.m optional a31_dmac arm/allwinner/aw_cir.c optional evdev aw_cir fdt arm/allwinner/aw_dwc3.c optional aw_dwc3 fdt arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt arm/allwinner/aw_i2s.c optional fdt sound aw_i2s arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt | mmccam aw_mmc fdt arm/allwinner/aw_nmi.c optional aw_nmi fdt \ compile-with "${NORMAL_C} -I$S/contrib/device-tree/include" arm/allwinner/aw_pwm.c optional aw_pwm fdt arm/allwinner/aw_r_intc.c optional aw_r_intc fdt arm/allwinner/aw_rsb.c optional aw_rsb fdt arm/allwinner/aw_rtc.c optional aw_rtc fdt arm/allwinner/aw_sid.c optional aw_sid nvmem fdt arm/allwinner/aw_spi.c optional aw_spi fdt arm/allwinner/aw_syscon.c optional aw_syscon ext_resources syscon fdt arm/allwinner/aw_thermal.c optional aw_thermal nvmem fdt arm/allwinner/aw_usbphy.c optional ehci aw_usbphy fdt arm/allwinner/aw_usb3phy.c optional xhci aw_usbphy fdt arm/allwinner/aw_wdog.c optional aw_wdog fdt arm/allwinner/axp81x.c optional axp81x fdt arm/allwinner/if_awg.c optional awg ext_resources syscon aw_sid nvmem fdt # Allwinner clock driver arm/allwinner/clkng/aw_ccung.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_frac.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_m.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_mipi.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nkmp.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nm.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nmm.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_np.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_prediv_mux.c optional aw_ccu fdt arm/allwinner/clkng/ccu_a64.c optional soc_allwinner_a64 aw_ccu fdt arm/allwinner/clkng/ccu_h3.c optional soc_allwinner_h5 aw_ccu fdt arm/allwinner/clkng/ccu_h6.c optional soc_allwinner_h6 aw_ccu fdt arm/allwinner/clkng/ccu_h6_r.c optional soc_allwinner_h6 aw_ccu fdt arm/allwinner/clkng/ccu_sun8i_r.c optional aw_ccu fdt arm/allwinner/clkng/ccu_de2.c optional aw_ccu fdt # Allwinner padconf files arm/allwinner/a64/a64_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/h3/h3_padconf.c optional soc_allwinner_h5 fdt arm/allwinner/h3/h3_r_padconf.c optional soc_allwinner_h5 fdt arm/allwinner/h6/h6_padconf.c optional soc_allwinner_h6 fdt arm/allwinner/h6/h6_r_padconf.c optional soc_allwinner_h6 fdt # Altera/Intel dev/altera/dwc/if_dwc_socfpga.c optional fdt dwc_socfpga arm64/intel/firmware.c optional soc_intel_stratix10 arm64/intel/stratix10-soc-fpga-mgr.c optional soc_intel_stratix10 arm64/intel/stratix10-svc.c optional soc_intel_stratix10 # Annapurna arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt arm/annapurna/alpine/alpine_pci.c optional al_pci fdt arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt arm/annapurna/alpine/alpine_serdes.c optional al_serdes fdt \ no-depend \ compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${.IMPSRC}" # Broadcom arm64/broadcom/brcmmdio/mdio_mux_iproc.c optional soc_brcm_ns2 fdt arm64/broadcom/brcmmdio/mdio_nexus_iproc.c optional soc_brcm_ns2 fdt arm64/broadcom/brcmmdio/mdio_ns2_pcie_phy.c optional soc_brcm_ns2 fdt pci arm64/broadcom/genet/if_genet.c optional SOC_BRCM_BCM2838 fdt genet arm/broadcom/bcm2835/bcm2835_audio.c optional sound vchiq fdt \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc fdt arm/broadcom/bcm2835/bcm2835_clkman.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_cpufreq.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_dma.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_fbd.c optional vt soc_brcm_bcm2837 fdt | vt soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_firmware.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_ft5406.c optional evdev bcm2835_ft5406 fdt arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio soc_brcm_bcm2837 fdt | gpio soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_intr.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_mbox.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_rng.c optional !random_loadable soc_brcm_bcm2837 fdt | !random_loadable soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_sdhost.c optional sdhci soc_brcm_bcm2837 fdt | sdhci soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi fdt arm/broadcom/bcm2835/bcm2835_vcbus.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 fdt | soc_brcm_bcm2838 fdt arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837 | dwcotg fdt soc_brcm_bcm2838 arm/broadcom/bcm2835/bcm2838_pci.c optional soc_brcm_bcm2838 fdt pci arm/broadcom/bcm2835/bcm2838_xhci.c optional soc_brcm_bcm2838 fdt pci xhci arm/broadcom/bcm2835/raspberrypi_gpio.c optional soc_brcm_bcm2837 gpio | soc_brcm_bcm2838 gpio contrib/vchiq/interface/compat/vchi_bsd.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_connected.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_core.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_shim.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_util.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" # Cavium arm64/cavium/thunder_pcie_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_pem.c optional soc_cavm_thunderx pci arm64/cavium/thunder_pcie_pem_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_common.c optional soc_cavm_thunderx pci # i.MX8 Clock support arm64/freescale/imx/imx8mq_ccm.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_gate.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_mux.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_composite.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_sscg_pll.c optional fdt soc_freescale_imx8 arm64/freescale/imx/clk/imx_clk_frac_pll.c optional fdt soc_freescale_imx8 # iMX drivers arm/freescale/imx/imx_gpio.c optional gpio soc_freescale_imx8 arm/freescale/imx/imx_i2c.c optional fsliic arm/freescale/imx/imx_machdep.c optional fdt soc_freescale_imx8 arm64/freescale/imx/imx7gpc.c optional fdt soc_freescale_imx8 dev/ffec/if_ffec.c optional ffec # Marvell arm/mv/a37x0_gpio.c optional a37x0_gpio gpio fdt arm/mv/a37x0_iic.c optional a37x0_iic iicbus fdt arm/mv/a37x0_spi.c optional a37x0_spi spibus fdt arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt arm/mv/gpio.c optional mv_gpio fdt arm/mv/mvebu_gpio.c optional mv_gpio fdt arm/mv/mvebu_pinctrl.c optional mvebu_pinctrl fdt arm/mv/mv_ap806_clock.c optional SOC_MARVELL_8K fdt arm/mv/mv_ap806_gicp.c optional mv_ap806_gicp fdt arm/mv/mv_ap806_sei.c optional mv_ap806_sei fdt arm/mv/mv_cp110_clock.c optional SOC_MARVELL_8K fdt arm/mv/mv_cp110_icu.c optional mv_cp110_icu fdt arm/mv/mv_cp110_icu_bus.c optional mv_cp110_icu fdt arm/mv/mv_thermal.c optional SOC_MARVELL_8K mv_thermal fdt # NVidia arm/nvidia/tegra_abpmisc.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_ahci.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_efuse.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_ehci.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_gpio.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_i2c.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_lic.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_mc.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_pcie.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_sdhci.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_soctherm_if.m optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_soctherm.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_uart.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_usbphy.c optional fdt soc_nvidia_tegra210 arm/nvidia/tegra_xhci.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620_gpio.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620_regulators.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/max77620_rtc.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_car.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_clk_per.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_clk_pll.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_clk_super.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_coretemp.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_cpufreq.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_pinmux.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_pmc.c optional fdt soc_nvidia_tegra210 arm64/nvidia/tegra210/tegra210_xusbpadctl.c optional fdt soc_nvidia_tegra210 # Nvidia firmware for Tegra tegra210_xusb_fw.c optional tegra210_xusb_fw \ dependency "$S/conf/files.arm64" \ compile-with "${AWK} -f $S/tools/fw_stub.awk tegra210_xusb.fw:tegra210_xusb_fw -mtegra210_xusb_fw -c${.TARGET}" \ no-ctfconvert no-implicit-rule before-depend local \ clean "tegra210_xusb_fw.c" tegra210_xusb.fwo optional tegra210_xusb_fw \ dependency "tegra210_xusb.fw" \ compile-with "${NORMAL_FWO}" \ no-implicit-rule \ clean "tegra210_xusb.fwo" tegra210_xusb.fw optional tegra210_xusb_fw \ dependency "$S/contrib/dev/nvidia/tegra210_xusb.bin.uu" \ compile-with "${NORMAL_FW}" \ no-obj no-implicit-rule \ clean "tegra210_xusb.fw" # NXP arm/freescale/vybrid/vf_i2c.c optional vf_i2c iicbus SOC_NXP_LS arm64/qoriq/qoriq_dw_pci.c optional pci fdt SOC_NXP_LS arm64/qoriq/qoriq_gpio_pic.c optional gpio fdt SOC_NXP_LS arm64/qoriq/qoriq_therm.c optional pci fdt SOC_NXP_LS arm64/qoriq/qoriq_therm_if.m optional pci fdt SOC_NXP_LS arm64/qoriq/clk/ls1028a_clkgen.c optional clk SOC_NXP_LS arm64/qoriq/clk/ls1028a_flexspi_clk.c optional clk SOC_NXP_LS arm64/qoriq/clk/ls1046a_clkgen.c optional clk SOC_NXP_LS arm64/qoriq/clk/lx2160a_clkgen.c optional clk SOC_NXP_LS arm64/qoriq/clk/qoriq_clk_pll.c optional clk SOC_NXP_LS arm64/qoriq/clk/qoriq_clkgen.c optional clk SOC_NXP_LS dev/ahci/ahci_fsl_fdt.c optional SOC_NXP_LS ahci fdt # Qualcomm arm64/qualcomm/qcom_gcc.c optional qcom_gcc fdt # RockChip Drivers arm64/rockchip/rk3328_codec.c optional fdt rk3328codec soc_rockchip_rk3328 arm64/rockchip/rk3399_emmcphy.c optional fdt rk_emmcphy soc_rockchip_rk3399 arm64/rockchip/rk_dwc3.c optional fdt rk_dwc3 soc_rockchip_rk3399 arm64/rockchip/rk_i2c.c optional fdt rk_i2c soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399 arm64/rockchip/rk_i2s.c optional fdt sound soc_rockchip_rk3328 | fdt sound soc_rockchip_rk3399 dev/iicbus/pmic/rockchip/rk805.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 +dev/iicbus/pmic/rockchip/rk8xx_rtc.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/rk_pinctrl.c optional fdt rk_pinctrl soc_rockchip_rk3328 | fdt rk_pinctrl soc_rockchip_rk3399 arm64/rockchip/rk_gpio.c optional fdt rk_gpio soc_rockchip_rk3328 | fdt rk_gpio soc_rockchip_rk3399 arm64/rockchip/rk_iodomain.c optional fdt rk_iodomain arm64/rockchip/rk_spi.c optional fdt rk_spi arm64/rockchip/rk_usb2phy.c optional fdt rk_usb2phy soc_rockchip_rk3328 | soc_rockchip_rk3399 arm64/rockchip/rk_typec_phy.c optional fdt rk_typec_phy soc_rockchip_rk3399 arm64/rockchip/if_dwc_rk.c optional fdt dwc_rk soc_rockchip_rk3328 | fdt dwc_rk soc_rockchip_rk3399 arm64/rockchip/rk_tsadc_if.m optional fdt soc_rockchip_rk3399 arm64/rockchip/rk_tsadc.c optional fdt soc_rockchip_rk3399 arm64/rockchip/rk_pwm.c optional fdt rk_pwm arm64/rockchip/rk_pcie.c optional fdt pci soc_rockchip_rk3399 arm64/rockchip/rk_pcie_phy.c optional fdt pci soc_rockchip_rk3399 # RockChip Clock support arm64/rockchip/clk/rk_cru.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_armclk.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_composite.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_fract.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_gate.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_mux.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk_clk_pll.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk3328_cru.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk3399_cru.c optional fdt soc_rockchip_rk3399 arm64/rockchip/clk/rk3399_pmucru.c optional fdt soc_rockchip_rk3399 # Xilinx arm/xilinx/uart_dev_cdnc.c optional uart soc_xilinx_zynq diff --git a/sys/dev/iicbus/pmic/rockchip/rk805.c b/sys/dev/iicbus/pmic/rockchip/rk805.c index 76c8462e694e..ab4006ad63f9 100644 --- a/sys/dev/iicbus/pmic/rockchip/rk805.c +++ b/sys/dev/iicbus/pmic/rockchip/rk805.c @@ -1,1003 +1,873 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2018 Emmanuel Vadot * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include +#include #include "clock_if.h" #include "regdev_if.h" MALLOC_DEFINE(M_RK805_REG, "RK805 regulator", "RK805 power regulator"); /* #define dprintf(sc, format, arg...) device_printf(sc->base_dev, "%s: " format, __func__, arg) */ #define dprintf(sc, format, arg...) -enum rk_pmic_type { - RK805 = 1, - RK808, -}; - static struct ofw_compat_data compat_data[] = { {"rockchip,rk805", RK805}, {"rockchip,rk808", RK808}, {NULL, 0} }; -struct rk8xx_regdef { - intptr_t id; - char *name; - uint8_t enable_reg; - uint8_t enable_mask; - uint8_t voltage_reg; - uint8_t voltage_mask; - int voltage_min; - int voltage_max; - int voltage_step; - int voltage_nstep; -}; - -struct rk8xx_reg_sc { - struct regnode *regnode; - device_t base_dev; - struct rk8xx_regdef *def; - phandle_t xref; - struct regnode_std_param *param; -}; - -struct reg_list { - TAILQ_ENTRY(reg_list) next; - struct rk8xx_reg_sc *reg; -}; - -struct rk8xx_softc { - device_t dev; - struct mtx mtx; - struct resource * res[1]; - void * intrcookie; - struct intr_config_hook intr_hook; - enum rk_pmic_type type; - - TAILQ_HEAD(, reg_list) regs; - int nregs; -}; - static int rk8xx_regnode_status(struct regnode *regnode, int *status); static int rk8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, int max_uvolt, int *udelay); static int rk8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt); static struct rk8xx_regdef rk805_regdefs[] = { { .id = RK805_BUCK1, .name = "DCDC_REG1", .enable_reg = RK805_DCDC_EN, .enable_mask = 0x11, .voltage_reg = RK805_BUCK1_ON_VSEL, .voltage_mask = 0x3F, .voltage_min = 712500, .voltage_max = 1450000, .voltage_step = 12500, .voltage_nstep = 64, }, { .id = RK805_BUCK2, .name = "DCDC_REG2", .enable_reg = RK805_DCDC_EN, .enable_mask = 0x22, .voltage_reg = RK805_BUCK2_ON_VSEL, .voltage_mask = 0x3F, .voltage_min = 712500, .voltage_max = 1450000, .voltage_step = 12500, .voltage_nstep = 64, }, { .id = RK805_BUCK3, .name = "DCDC_REG3", .enable_reg = RK805_DCDC_EN, .enable_mask = 0x44, }, { .id = RK805_BUCK4, .name = "DCDC_REG4", .enable_reg = RK805_DCDC_EN, .enable_mask = 0x88, .voltage_reg = RK805_BUCK4_ON_VSEL, .voltage_mask = 0x3F, .voltage_min = 800000, .voltage_max = 3500000, .voltage_step = 100000, .voltage_nstep = 28, }, { .id = RK805_LDO1, .name = "LDO_REG1", .enable_reg = RK805_LDO_EN, .enable_mask = 0x11, .voltage_reg = RK805_LDO1_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 27, }, { .id = RK805_LDO2, .name = "LDO_REG2", .enable_reg = RK805_LDO_EN, .enable_mask = 0x22, .voltage_reg = RK805_LDO2_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 27, }, { .id = RK805_LDO3, .name = "LDO_REG3", .enable_reg = RK805_LDO_EN, .enable_mask = 0x44, .voltage_reg = RK805_LDO3_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 27, }, }; static struct rk8xx_regdef rk808_regdefs[] = { { .id = RK808_BUCK1, .name = "DCDC_REG1", .enable_reg = RK808_DCDC_EN, .enable_mask = 0x1, .voltage_reg = RK808_BUCK1_ON_VSEL, .voltage_mask = 0x3F, .voltage_min = 712500, .voltage_max = 1500000, .voltage_step = 12500, .voltage_nstep = 64, }, { .id = RK808_BUCK2, .name = "DCDC_REG2", .enable_reg = RK808_DCDC_EN, .enable_mask = 0x2, .voltage_reg = RK808_BUCK2_ON_VSEL, .voltage_mask = 0x3F, .voltage_min = 712500, .voltage_max = 1500000, .voltage_step = 12500, .voltage_nstep = 64, }, { /* BUCK3 voltage is calculated based on external resistor */ .id = RK808_BUCK3, .name = "DCDC_REG3", .enable_reg = RK808_DCDC_EN, .enable_mask = 0x4, }, { .id = RK808_BUCK4, .name = "DCDC_REG4", .enable_reg = RK808_DCDC_EN, .enable_mask = 0x8, .voltage_reg = RK808_BUCK4_ON_VSEL, .voltage_mask = 0xF, .voltage_min = 1800000, .voltage_max = 3300000, .voltage_step = 100000, .voltage_nstep = 16, }, { .id = RK808_LDO1, .name = "LDO_REG1", .enable_reg = RK808_LDO_EN, .enable_mask = 0x1, .voltage_reg = RK808_LDO1_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 1800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 17, }, { .id = RK808_LDO2, .name = "LDO_REG2", .enable_reg = RK808_LDO_EN, .enable_mask = 0x2, .voltage_reg = RK808_LDO2_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 1800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 17, }, { .id = RK808_LDO3, .name = "LDO_REG3", .enable_reg = RK808_LDO_EN, .enable_mask = 0x4, .voltage_reg = RK808_LDO3_ON_VSEL, .voltage_mask = 0xF, .voltage_min = 800000, .voltage_max = 2500000, .voltage_step = 100000, .voltage_nstep = 18, }, { .id = RK808_LDO4, .name = "LDO_REG4", .enable_reg = RK808_LDO_EN, .enable_mask = 0x8, .voltage_reg = RK808_LDO4_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 1800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 17, }, { .id = RK808_LDO5, .name = "LDO_REG5", .enable_reg = RK808_LDO_EN, .enable_mask = 0x10, .voltage_reg = RK808_LDO5_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 1800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 17, }, { .id = RK808_LDO6, .name = "LDO_REG6", .enable_reg = RK808_LDO_EN, .enable_mask = 0x20, .voltage_reg = RK808_LDO6_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 800000, .voltage_max = 2500000, .voltage_step = 100000, .voltage_nstep = 18, }, { .id = RK808_LDO7, .name = "LDO_REG7", .enable_reg = RK808_LDO_EN, .enable_mask = 0x40, .voltage_reg = RK808_LDO7_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 800000, .voltage_max = 2500000, .voltage_step = 100000, .voltage_nstep = 18, }, { .id = RK808_LDO8, .name = "LDO_REG8", .enable_reg = RK808_LDO_EN, .enable_mask = 0x80, .voltage_reg = RK808_LDO8_ON_VSEL, .voltage_mask = 0x1F, .voltage_min = 1800000, .voltage_max = 3400000, .voltage_step = 100000, .voltage_nstep = 17, }, { .id = RK808_SWITCH1, .name = "SWITCH_REG1", .enable_reg = RK808_DCDC_EN, .enable_mask = 0x20, .voltage_min = 3000000, .voltage_max = 3000000, }, { .id = RK808_SWITCH2, .name = "SWITCH_REG2", .enable_reg = RK808_DCDC_EN, .enable_mask = 0x40, .voltage_min = 3000000, .voltage_max = 3000000, }, }; -static int +int rk8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) { int err; err = iicdev_readfrom(dev, reg, data, size, IIC_INTRWAIT); return (err); } -static int +int rk8xx_write(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) { return (iicdev_writeto(dev, reg, data, size, IIC_INTRWAIT)); } static int rk8xx_regnode_init(struct regnode *regnode) { struct rk8xx_reg_sc *sc; struct regnode_std_param *param; int rv, udelay, uvolt, status; sc = regnode_get_softc(regnode); dprintf(sc, "Regulator %s init called\n", sc->def->name); param = regnode_get_stdparam(regnode); if (param->min_uvolt == 0) return (0); /* Check that the regulator is preset to the correct voltage */ rv = rk8xx_regnode_get_voltage(regnode, &uvolt); if (rv != 0) return(rv); if (uvolt >= param->min_uvolt && uvolt <= param->max_uvolt) return(0); /* * Set the regulator at the correct voltage if it is not enabled. * Do not enable it, this is will be done either by a * consumer or by regnode_set_constraint if boot_on is true */ rv = rk8xx_regnode_status(regnode, &status); if (rv != 0 || status == REGULATOR_STATUS_ENABLED) return (rv); rv = rk8xx_regnode_set_voltage(regnode, param->min_uvolt, param->max_uvolt, &udelay); if (udelay != 0) DELAY(udelay); return (rv); } static int rk8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) { struct rk8xx_reg_sc *sc; uint8_t val; sc = regnode_get_softc(regnode); dprintf(sc, "%sabling regulator %s\n", enable ? "En" : "Dis", sc->def->name); rk8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); if (enable) val |= sc->def->enable_mask; else val &= ~sc->def->enable_mask; rk8xx_write(sc->base_dev, sc->def->enable_reg, &val, 1); *udelay = 0; return (0); } static void rk8xx_regnode_reg_to_voltage(struct rk8xx_reg_sc *sc, uint8_t val, int *uv) { if (val < sc->def->voltage_nstep) *uv = sc->def->voltage_min + val * sc->def->voltage_step; else *uv = sc->def->voltage_min + (sc->def->voltage_nstep * sc->def->voltage_step); } static int rk8xx_regnode_voltage_to_reg(struct rk8xx_reg_sc *sc, int min_uvolt, int max_uvolt, uint8_t *val) { uint8_t nval; int nstep, uvolt; nval = 0; uvolt = sc->def->voltage_min; for (nstep = 0; nstep < sc->def->voltage_nstep && uvolt < min_uvolt; nstep++) { ++nval; uvolt += sc->def->voltage_step; } if (uvolt > max_uvolt) return (EINVAL); *val = nval; return (0); } static int rk8xx_regnode_status(struct regnode *regnode, int *status) { struct rk8xx_reg_sc *sc; uint8_t val; sc = regnode_get_softc(regnode); *status = 0; rk8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); if (val & sc->def->enable_mask) *status = REGULATOR_STATUS_ENABLED; return (0); } static int rk8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, int max_uvolt, int *udelay) { struct rk8xx_reg_sc *sc; uint8_t val; int uvolt; sc = regnode_get_softc(regnode); if (!sc->def->voltage_step) return (ENXIO); dprintf(sc, "Setting %s to %d<->%d uvolts\n", sc->def->name, min_uvolt, max_uvolt); rk8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); if (rk8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) return (ERANGE); rk8xx_write(sc->base_dev, sc->def->voltage_reg, &val, 1); rk8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); *udelay = 0; rk8xx_regnode_reg_to_voltage(sc, val, &uvolt); dprintf(sc, "Regulator %s set to %d uvolt\n", sc->def->name, uvolt); return (0); } static int rk8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) { struct rk8xx_reg_sc *sc; uint8_t val; sc = regnode_get_softc(regnode); if (sc->def->voltage_min == sc->def->voltage_max) { *uvolt = sc->def->voltage_min; return (0); } if (!sc->def->voltage_step) return (ENXIO); rk8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); rk8xx_regnode_reg_to_voltage(sc, val & sc->def->voltage_mask, uvolt); dprintf(sc, "Regulator %s is at %d uvolt\n", sc->def->name, *uvolt); return (0); } static regnode_method_t rk8xx_regnode_methods[] = { /* Regulator interface */ REGNODEMETHOD(regnode_init, rk8xx_regnode_init), REGNODEMETHOD(regnode_enable, rk8xx_regnode_enable), REGNODEMETHOD(regnode_status, rk8xx_regnode_status), REGNODEMETHOD(regnode_set_voltage, rk8xx_regnode_set_voltage), REGNODEMETHOD(regnode_get_voltage, rk8xx_regnode_get_voltage), REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage), REGNODEMETHOD_END }; DEFINE_CLASS_1(rk8xx_regnode, rk8xx_regnode_class, rk8xx_regnode_methods, sizeof(struct rk8xx_reg_sc), regnode_class); static struct rk8xx_reg_sc * rk8xx_reg_attach(device_t dev, phandle_t node, struct rk8xx_regdef *def) { struct rk8xx_reg_sc *reg_sc; struct regnode_init_def initdef; struct regnode *regnode; memset(&initdef, 0, sizeof(initdef)); if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) { device_printf(dev, "cannot create regulator\n"); return (NULL); } if (initdef.std_param.min_uvolt == 0) initdef.std_param.min_uvolt = def->voltage_min; if (initdef.std_param.max_uvolt == 0) initdef.std_param.max_uvolt = def->voltage_max; initdef.id = def->id; initdef.ofw_node = node; regnode = regnode_create(dev, &rk8xx_regnode_class, &initdef); if (regnode == NULL) { device_printf(dev, "cannot create regulator\n"); return (NULL); } reg_sc = regnode_get_softc(regnode); reg_sc->regnode = regnode; reg_sc->base_dev = dev; reg_sc->def = def; reg_sc->xref = OF_xref_from_node(node); reg_sc->param = regnode_get_stdparam(regnode); regnode_register(regnode); return (reg_sc); } /* -------------------------------------------------------------------------- */ /* Clock class and method */ struct rk8xx_clk_sc { device_t base_dev; }; #define CLK32OUT_REG 0x20 #define CLK32OUT_CLKOUT2_EN 1 static int rk8xx_clk_set_gate_1(struct clknode *clk, bool enable) { struct rk8xx_clk_sc *sc; uint8_t val; sc = clknode_get_softc(clk); rk8xx_read(sc->base_dev, CLK32OUT_REG, &val, sizeof(val)); if (enable) val |= CLK32OUT_CLKOUT2_EN; else val &= ~CLK32OUT_CLKOUT2_EN; rk8xx_write(sc->base_dev, CLK32OUT_REG, &val, 1); return (0); } static int rk8xx_clk_recalc(struct clknode *clk, uint64_t *freq) { *freq = 32768; return (0); } static clknode_method_t rk8xx_clk_clknode_methods_0[] = { CLKNODEMETHOD(clknode_recalc_freq, rk8xx_clk_recalc), CLKNODEMETHOD_END }; DEFINE_CLASS_1(rk8xx_clk_clknode_0, rk8xx_clk_clknode_class_0, rk8xx_clk_clknode_methods_0, sizeof(struct rk8xx_clk_sc), clknode_class); static clknode_method_t rk8xx_clk_clknode_methods_1[] = { CLKNODEMETHOD(clknode_set_gate, rk8xx_clk_set_gate_1), CLKNODEMETHOD_END }; DEFINE_CLASS_1(rk8xx_clk_clknode_1, rk8xx_clk_clknode_class_1, rk8xx_clk_clknode_methods_1, sizeof(struct rk8xx_clk_sc), rk8xx_clk_clknode_class_0); static int rk8xx_export_clocks(device_t dev) { struct clkdom *clkdom; struct clknode_init_def clkidef; struct clknode *clk; struct rk8xx_clk_sc *clksc; const char **clknames; phandle_t node; int nclks, rv; node = ofw_bus_get_node(dev); /* clock-output-names are optional. Could use them for clkidef.name. */ nclks = ofw_bus_string_list_to_array(node, "clock-output-names", &clknames); clkdom = clkdom_create(dev); memset(&clkidef, 0, sizeof(clkidef)); clkidef.id = 0; clkidef.name = (nclks = 2) ? clknames[0] : "clk32kout1"; clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_0, &clkidef); if (clk == NULL) { device_printf(dev, "Cannot create '%s'.\n", clkidef.name); return (ENXIO); } clksc = clknode_get_softc(clk); clksc->base_dev = dev; clknode_register(clkdom, clk); memset(&clkidef, 0, sizeof(clkidef)); clkidef.id = 1; clkidef.name = (nclks = 2) ? clknames[1] : "clk32kout2"; clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_1, &clkidef); if (clk == NULL) { device_printf(dev, "Cannot create '%s'.\n", clkidef.name); return (ENXIO); } clksc = clknode_get_softc(clk); clksc->base_dev = dev; clknode_register(clkdom, clk); rv = clkdom_finit(clkdom); if (rv != 0) { device_printf(dev, "Cannot finalize clkdom initialization: " "%d\n", rv); return (ENXIO); } if (bootverbose) clkdom_dump(clkdom); return (0); } /* -------------------------------------------------------------------------- */ static int rk8xx_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) return (ENXIO); device_set_desc(dev, "RockChip RK8XX PMIC"); return (BUS_PROBE_DEFAULT); } static void rk8xx_start(void *pdev) { struct rk8xx_softc *sc; device_t dev; uint8_t data[2]; int err; dev = pdev; sc = device_get_softc(dev); sc->dev = dev; /* No version register in RK808 */ if (bootverbose && sc->type == RK805) { err = rk8xx_read(dev, RK805_CHIP_NAME, data, 1); if (err != 0) { device_printf(dev, "Cannot read chip name reg\n"); return; } err = rk8xx_read(dev, RK805_CHIP_VER, data + 1, 1); if (err != 0) { device_printf(dev, "Cannot read chip version reg\n"); return; } device_printf(dev, "Chip Name: %x\n", data[0] << 4 | ((data[1] >> 4) & 0xf)); device_printf(dev, "Chip Version: %x\n", data[1] & 0xf); } /* Register this as a 1Hz clock */ clock_register(dev, 1000000); config_intrhook_disestablish(&sc->intr_hook); } -static int -rk8xx_gettime(device_t dev, struct timespec *ts) -{ - struct bcd_clocktime bct; - uint8_t data[7]; - uint8_t ctrl; - int error; - - /* Latch the RTC value into the shadow registers and set 24hr mode */ - error = rk8xx_read(dev, RK805_RTC_CTRL, &ctrl, 1); - if (error != 0) - return (error); - - ctrl |= RK805_RTC_READSEL; - ctrl &= ~(RK805_RTC_AMPM_MODE | RK805_RTC_GET_TIME); - error = rk8xx_write(dev, RK805_RTC_CTRL, &ctrl, 1); - if (error != 0) - return (error); - ctrl |= RK805_RTC_GET_TIME; - error = rk8xx_write(dev, RK805_RTC_CTRL, &ctrl, 1); - if (error != 0) - return (error); - ctrl &= ~RK805_RTC_GET_TIME; - error = rk8xx_write(dev, RK805_RTC_CTRL, &ctrl, 1); - if (error != 0) - return (error); - - /* This works as long as RK805_RTC_SECS = 0 */ - error = rk8xx_read(dev, RK805_RTC_SECS, data, 7); - if (error != 0) - return (error); - - /* - * If the reported year is earlier than 2019, assume the clock is unset. - * This is both later than the reset value for the RK805 and RK808 as - * well as being prior to the current time. - */ - if (data[RK805_RTC_YEARS] < 0x19) - return (EINVAL); - - memset(&bct, 0, sizeof(bct)); - bct.year = data[RK805_RTC_YEARS]; - bct.mon = data[RK805_RTC_MONTHS] & RK805_RTC_MONTHS_MASK; - bct.day = data[RK805_RTC_DAYS] & RK805_RTC_DAYS_MASK; - bct.hour = data[RK805_RTC_HOURS] & RK805_RTC_HOURS_MASK; - bct.min = data[RK805_RTC_MINUTES] & RK805_RTC_MINUTES_MASK; - bct.sec = data[RK805_RTC_SECS] & RK805_RTC_SECS_MASK; - bct.dow = data[RK805_RTC_WEEKS] & RK805_RTC_WEEKS_MASK; - /* The day of week is reported as 1-7 with 1 = Monday */ - if (bct.dow == 7) - bct.dow = 0; - bct.ispm = 0; - - if (bootverbose) - device_printf(dev, "Read RTC: %02x-%02x-%02x %02x:%02x:%02x\n", - bct.year, bct.mon, bct.day, bct.hour, bct.min, bct.sec); - - return (clock_bcd_to_ts(&bct, ts, false)); -} - -static int -rk8xx_settime(device_t dev, struct timespec *ts) -{ - struct bcd_clocktime bct; - uint8_t data[7]; - int error; - uint8_t ctrl; - - clock_ts_to_bcd(ts, &bct, false); - - /* This works as long as RK805_RTC_SECS = 0 */ - data[RK805_RTC_YEARS] = bct.year; - data[RK805_RTC_MONTHS] = bct.mon; - data[RK805_RTC_DAYS] = bct.day; - data[RK805_RTC_HOURS] = bct.hour; - data[RK805_RTC_MINUTES] = bct.min; - data[RK805_RTC_SECS] = bct.sec; - data[RK805_RTC_WEEKS] = bct.dow; - /* The day of week is reported as 1-7 with 1 = Monday */ - if (data[RK805_RTC_WEEKS] == 0) - data[RK805_RTC_WEEKS] = 7; - - error = rk8xx_read(dev, RK805_RTC_CTRL, &ctrl, 1); - if (error != 0) - return (error); - - ctrl |= RK805_RTC_CTRL_STOP; - ctrl &= ~RK805_RTC_AMPM_MODE; - error = rk8xx_write(dev, RK805_RTC_CTRL, &ctrl, 1); - if (error != 0) - return (error); - - error = rk8xx_write(dev, RK805_RTC_SECS, data, 7); - ctrl &= ~RK805_RTC_CTRL_STOP; - rk8xx_write(dev, RK805_RTC_CTRL, &ctrl, 1); - - return (error); -} - -static void -rk805_poweroff(void *arg, int howto) -{ - device_t dev = arg; - int error; - uint8_t val; - - if ((howto & RB_POWEROFF) == 0) - return; - - device_printf(dev, "Powering off...\n"); - error = rk805_read(dev, RK805_DEV_CTRL, &val, 1); - if (error == 0) { - val |= RK805_DEV_CTRL_OFF; - error = rk805_write(dev, RK805_DEV_CTRL, &val, 1); - - /* Wait a bit for the command to take effect. */ - if (error == 0) - DELAY(100); - } - device_printf(dev, "Power off failed\n"); -} - static int rk8xx_attach(device_t dev) { struct rk8xx_softc *sc; struct rk8xx_reg_sc *reg; struct rk8xx_regdef *regdefs; struct reg_list *regp; phandle_t rnode, child; int error, i; sc = device_get_softc(dev); sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; error = rk8xx_export_clocks(dev); if (error != 0) return (error); sc->intr_hook.ich_func = rk8xx_start; sc->intr_hook.ich_arg = dev; if (config_intrhook_establish(&sc->intr_hook) != 0) return (ENOMEM); switch (sc->type) { case RK805: regdefs = rk805_regdefs; sc->nregs = nitems(rk805_regdefs); + sc->rtc_regs.secs = RK805_RTC_SECS; + sc->rtc_regs.secs_mask = RK805_RTC_SECS_MASK; + sc->rtc_regs.minutes = RK805_RTC_MINUTES; + sc->rtc_regs.minutes_mask = RK805_RTC_MINUTES_MASK; + sc->rtc_regs.hours = RK805_RTC_HOURS; + sc->rtc_regs.hours_mask = RK805_RTC_HOURS_MASK; + sc->rtc_regs.days = RK805_RTC_DAYS; + sc->rtc_regs.days_mask = RK805_RTC_DAYS_MASK; + sc->rtc_regs.months = RK805_RTC_MONTHS; + sc->rtc_regs.months_mask = RK805_RTC_MONTHS_MASK; + sc->rtc_regs.years = RK805_RTC_YEARS; + sc->rtc_regs.weeks = RK805_RTC_WEEKS_MASK; + sc->rtc_regs.ctrl = RK805_RTC_CTRL; + sc->rtc_regs.ctrl_stop_mask = RK805_RTC_CTRL_STOP; + sc->rtc_regs.ctrl_ampm_mask = RK805_RTC_AMPM_MODE; + sc->rtc_regs.ctrl_gettime_mask = RK805_RTC_GET_TIME; + sc->rtc_regs.ctrl_readsel_mask = RK805_RTC_READSEL; break; case RK808: regdefs = rk808_regdefs; sc->nregs = nitems(rk808_regdefs); + sc->rtc_regs.secs = RK808_RTC_SECS; + sc->rtc_regs.secs_mask = RK808_RTC_SECS_MASK; + sc->rtc_regs.minutes = RK808_RTC_MINUTES; + sc->rtc_regs.minutes_mask = RK808_RTC_MINUTES_MASK; + sc->rtc_regs.hours = RK808_RTC_HOURS; + sc->rtc_regs.hours_mask = RK808_RTC_HOURS_MASK; + sc->rtc_regs.days = RK808_RTC_DAYS; + sc->rtc_regs.days_mask = RK808_RTC_DAYS_MASK; + sc->rtc_regs.months = RK808_RTC_MONTHS; + sc->rtc_regs.months_mask = RK808_RTC_MONTHS_MASK; + sc->rtc_regs.years = RK808_RTC_YEARS; + sc->rtc_regs.weeks = RK808_RTC_WEEKS_MASK; + sc->rtc_regs.ctrl = RK808_RTC_CTRL; + sc->rtc_regs.ctrl_stop_mask = RK808_RTC_CTRL_STOP; + sc->rtc_regs.ctrl_ampm_mask = RK808_RTC_AMPM_MODE; + sc->rtc_regs.ctrl_gettime_mask = RK808_RTC_GET_TIME; + sc->rtc_regs.ctrl_readsel_mask = RK808_RTC_READSEL; break; default: device_printf(dev, "Unknown type %d\n", sc->type); return (ENXIO); } TAILQ_INIT(&sc->regs); rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); if (rnode > 0) { for (i = 0; i < sc->nregs; i++) { child = ofw_bus_find_child(rnode, regdefs[i].name); if (child == 0) continue; if (OF_hasprop(child, "regulator-name") != 1) continue; reg = rk8xx_reg_attach(dev, child, ®defs[i]); if (reg == NULL) { device_printf(dev, "cannot attach regulator %s\n", regdefs[i].name); continue; } regp = malloc(sizeof(*regp), M_DEVBUF, M_WAITOK | M_ZERO); regp->reg = reg; TAILQ_INSERT_TAIL(&sc->regs, regp, next); if (bootverbose) device_printf(dev, "Regulator %s attached\n", regdefs[i].name); } } if (OF_hasprop(ofw_bus_get_node(dev), "rockchip,system-power-controller")) { /* * The priority is chosen to override PSCI and EFI shutdown * methods as those two just hang without powering off on Rock64 * at least. */ EVENTHANDLER_REGISTER(shutdown_final, rk805_poweroff, dev, SHUTDOWN_PRI_LAST - 2); } return (0); } static int rk8xx_detach(device_t dev) { /* We cannot detach regulators */ return (EBUSY); } static int rk8xx_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, intptr_t *id) { struct rk8xx_softc *sc; struct reg_list *regp; sc = device_get_softc(dev); TAILQ_FOREACH(regp, &sc->regs, next) { if (regp->reg->xref == xref) { *id = regp->reg->def->id; return (0); } } return (ERANGE); } static device_method_t rk8xx_methods[] = { DEVMETHOD(device_probe, rk8xx_probe), DEVMETHOD(device_attach, rk8xx_attach), DEVMETHOD(device_detach, rk8xx_detach), /* regdev interface */ DEVMETHOD(regdev_map, rk8xx_map), /* Clock interface */ DEVMETHOD(clock_gettime, rk8xx_gettime), DEVMETHOD(clock_settime, rk8xx_settime), DEVMETHOD_END }; static driver_t rk8xx_driver = { "rk8xx_pmu", rk8xx_methods, sizeof(struct rk8xx_softc), }; static devclass_t rk8xx_devclass; EARLY_DRIVER_MODULE(rk8xx, iicbus, rk8xx_driver, rk8xx_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); MODULE_DEPEND(rk8xx, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER); MODULE_VERSION(rk8xx, 1); diff --git a/sys/dev/iicbus/pmic/rockchip/rk8xx.h b/sys/dev/iicbus/pmic/rockchip/rk8xx.h new file mode 100644 index 000000000000..4351f8fe254c --- /dev/null +++ b/sys/dev/iicbus/pmic/rockchip/rk8xx.h @@ -0,0 +1,109 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2021 Emmanuel Vadot + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _RK8XX_H_ +#define _RK8XX_H_ + +#include + +#include +#include + +enum rk_pmic_type { + RK805 = 1, + RK808, +}; + +struct rk8xx_regdef { + intptr_t id; + char *name; + uint8_t enable_reg; + uint8_t enable_mask; + uint8_t voltage_reg; + uint8_t voltage_mask; + int voltage_min; + int voltage_max; + int voltage_step; + int voltage_nstep; +}; + +struct rk8xx_reg_sc { + struct regnode *regnode; + device_t base_dev; + struct rk8xx_regdef *def; + phandle_t xref; + struct regnode_std_param *param; +}; + +struct reg_list { + TAILQ_ENTRY(reg_list) next; + struct rk8xx_reg_sc *reg; +}; + +struct rk8xx_rtc_reg { + uint8_t secs; + uint8_t secs_mask; + uint8_t minutes; + uint8_t minutes_mask; + uint8_t hours; + uint8_t hours_mask; + uint8_t days; + uint8_t days_mask; + uint8_t months; + uint8_t months_mask; + uint8_t years; + uint8_t weeks; + uint8_t weeks_mask; + uint8_t ctrl; + uint8_t ctrl_stop_mask; + uint8_t ctrl_ampm_mask; + uint8_t ctrl_gettime_mask; + uint8_t ctrl_readsel_mask; +}; + +struct rk8xx_softc { + device_t dev; + struct mtx mtx; + struct resource * res[1]; + void * intrcookie; + struct intr_config_hook intr_hook; + enum rk_pmic_type type; + + TAILQ_HEAD(, reg_list) regs; + int nregs; + + struct rk8xx_rtc_reg rtc_regs; +}; + +int rk8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size); +int rk8xx_write(device_t dev, uint8_t reg, uint8_t *data, uint8_t size); + +/* rk8xx_rtc.c */ +int rk8xx_gettime(device_t dev, struct timespec *ts); +int rk8xx_settime(device_t dev, struct timespec *ts); + +#endif /* _RK8XX_H_ */ diff --git a/sys/dev/iicbus/pmic/rockchip/rk8xx_rtc.c b/sys/dev/iicbus/pmic/rockchip/rk8xx_rtc.c new file mode 100644 index 000000000000..2f755d16b164 --- /dev/null +++ b/sys/dev/iicbus/pmic/rockchip/rk8xx_rtc.c @@ -0,0 +1,142 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2021 Emmanuel Vadot + * Copyright (c) 2021 Peter Jeremy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include + +int +rk8xx_gettime(device_t dev, struct timespec *ts) +{ + struct rk8xx_softc *sc; + struct bcd_clocktime bct; + uint8_t data[7]; + uint8_t ctrl; + int error; + + sc = device_get_softc(dev); + + /* Latch the RTC value into the shadow registers and set 24hr mode */ + error = rk8xx_read(dev, sc->rtc_regs.ctrl, &ctrl, 1); + if (error != 0) + return (error); + + ctrl |= sc->rtc_regs.ctrl_readsel_mask; + ctrl &= ~(sc->rtc_regs.ctrl_ampm_mask | sc->rtc_regs.ctrl_gettime_mask); + error = rk8xx_write(dev, sc->rtc_regs.ctrl, &ctrl, 1); + if (error != 0) + return (error); + ctrl |= sc->rtc_regs.ctrl_gettime_mask; + error = rk8xx_write(dev, sc->rtc_regs.ctrl, &ctrl, 1); + if (error != 0) + return (error); + ctrl &= ~sc->rtc_regs.ctrl_gettime_mask; + error = rk8xx_write(dev, sc->rtc_regs.ctrl, &ctrl, 1); + if (error != 0) + return (error); + + /* This works as long as sc->rtc_regs.secs = 0 */ + error = rk8xx_read(dev, sc->rtc_regs.secs, data, 7); + if (error != 0) + return (error); + + /* + * If the reported year is earlier than 2019, assume the clock is unset. + * This is both later than the reset value for the RK805 and RK808 as + * well as being prior to the current time. + */ + if (data[sc->rtc_regs.years] < 0x19) + return (EINVAL); + + memset(&bct, 0, sizeof(bct)); + bct.year = data[sc->rtc_regs.years]; + bct.mon = data[sc->rtc_regs.months] & sc->rtc_regs.months_mask; + bct.day = data[sc->rtc_regs.days] & sc->rtc_regs.days_mask; + bct.hour = data[sc->rtc_regs.hours] & sc->rtc_regs.hours_mask; + bct.min = data[sc->rtc_regs.minutes] & sc->rtc_regs.minutes_mask; + bct.sec = data[sc->rtc_regs.secs] & sc->rtc_regs.secs_mask; + bct.dow = data[sc->rtc_regs.weeks] & sc->rtc_regs.weeks_mask; + /* The day of week is reported as 1-7 with 1 = Monday */ + if (bct.dow == 7) + bct.dow = 0; + bct.ispm = 0; + + if (bootverbose) + device_printf(dev, "Read RTC: %02x-%02x-%02x %02x:%02x:%02x\n", + bct.year, bct.mon, bct.day, bct.hour, bct.min, bct.sec); + + return (clock_bcd_to_ts(&bct, ts, false)); +} + +int +rk8xx_settime(device_t dev, struct timespec *ts) +{ + struct rk8xx_softc *sc; + struct bcd_clocktime bct; + uint8_t data[7]; + int error; + uint8_t ctrl; + + sc = device_get_softc(dev); + + clock_ts_to_bcd(ts, &bct, false); + + /* This works as long as RK805_RTC_SECS = 0 */ + data[sc->rtc_regs.years] = bct.year; + data[sc->rtc_regs.months] = bct.mon; + data[sc->rtc_regs.days] = bct.day; + data[sc->rtc_regs.hours] = bct.hour; + data[sc->rtc_regs.minutes] = bct.min; + data[sc->rtc_regs.secs] = bct.sec; + data[sc->rtc_regs.weeks] = bct.dow; + /* The day of week is reported as 1-7 with 1 = Monday */ + if (data[sc->rtc_regs.weeks] == 0) + data[sc->rtc_regs.weeks] = 7; + + error = rk8xx_read(dev, sc->rtc_regs.ctrl, &ctrl, 1); + if (error != 0) + return (error); + + ctrl |= sc->rtc_regs.ctrl_stop_mask; + ctrl &= ~sc->rtc_regs.ctrl_ampm_mask; + error = rk8xx_write(dev, sc->rtc_regs.ctrl, &ctrl, 1); + if (error != 0) + return (error); + + error = rk8xx_write(dev, sc->rtc_regs.secs, data, 7); + ctrl &= ~sc->rtc_regs.ctrl_stop_mask; + rk8xx_write(dev, sc->rtc_regs.ctrl, &ctrl, 1); + + return (error); +}