arm64: Add a multiple TLBI workaround

The Arm Cortex-A55, Cortex-A76, and Cortex-A510 CPUs have errata that
require multiple TLBI, DSB instructions to workaround.

Add support to pmap to implement these. As it appears that all
affected TLBI calls are via pmap.c this should be sufficient.

As all variants of this erratum are Category-B (rare) require the
user to enable it at boot time.

Reviewed by: alc
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D52190

(cherry picked from commit a884f699e4bfc1be4e721d3ec4fa93915be18a86)