diff --git a/share/man/man4/qat.4 b/share/man/man4/qat.4 index e8a46a99e949..77b85d729ffa 100644 --- a/share/man/man4/qat.4 +++ b/share/man/man4/qat.4 @@ -1,131 +1,186 @@ .\" SPDX-License-Identifier: BSD-3-Clause .\" Copyright(c) 2007-2022 Intel Corporation .\" $FreeBSD$ -.Dd September 1, 2022 +.Dd May 4, 2023 .Dt QAT 4 .Os .Sh NAME .Nm qat .Nd Intel (R) QuickAssist Technology (QAT) driver .Sh SYNOPSIS To load the driver call: .Pp .Bl -item -compact .It kldload qat .El .Pp In order to load the driver on boot add these lines to .Xr loader.conf 5 selecting firmware(s) suitable for installed device(s) .Pp .Bl -item -compact .It qat_200xx_fw_load="YES" .It qat_c3xxx_fw_load="YES" .It qat_c4xxx_fw_load="YES" .It qat_c62x_fw_load="YES" .It qat_dh895xcc_fw_load="YES" .It qat_4xxx_fw_load="YES" .It qat_load="YES" .El .Sh DESCRIPTION The .Nm driver supports cryptography and compression acceleration of the Intel (R) QuickAssist Technology (QAT) devices. .Pp The .Nm driver is intended for platforms that contain: .Bl -bullet -compact .It Intel (R) C62x Chipset .It Intel (R) Atom C3000 processor product family .It Intel (R) QuickAssist Adapter 8960/Intel (R) QuickAssist Adapter 8970 (formerly known as "Lewis Hill") .It Intel (R) Communications Chipset 8925 to 8955 Series .It Intel (R) Atom P5300 processor product family .It Intel (R) QAT 4xxx Series .El .Pp The .Nm driver supports cryptography and compression acceleration. A complete API for offloading these operations is exposed in the kernel and may be used by any other entity directly. For details of usage and supported operations and algorithms refer to the following documentation available from .Lk 01.org : .Bl -bullet -compact .It .Rs .%A Intel (R) .%T QuickAssist Technology API Programmer's Guide .Re .It .Rs .%A Intel (R) .%T QuickAssist Technology Cryptographic API Reference Manual .Re .It .Rs .%A Intel (R) .%T QuickAssist Technology Data Compression API Reference Manual .Re .It .Rs .%A Intel (R) .%T QuickAssist Technology Performance Optimization Guide .Re .El .Pp In addition to exposing complete kernel API for offloading cryptography and compression operations, the .Nm driver also integrates with .Xr crypto 4 , allowing offloading supported cryptography operations to Intel (R) QuickAssist Technology (QAT) devices. For details of usage and supported operations and algorithms refer to the documentation mentioned above and .Sx SEE ALSO section. +.Sh SYSCTL_VARIABLES +Following variables may be used to reconfigure the QAT device.\& +For configuration persistence those variables may be set before loading the driver, either via +.Xr kenv 1 +or +.Xr loader.conf(5). +The device specific configuration options are prefixed with +.Va dev.qat.X\&. +where X is the device number. +The specific device needs to be in "down" state before changing the configuration. +.Bl -tag -width indent +.It Va state +Show current state of the device. Override the device state. Possible values: "down", "up". + +NOTE: If the symmetric services are used for device the qat_ocf driver needs to be disabled prior the device +reconfiguration. +Following variable may be used to enable/disable the QAT cryptographic framework connectivity +.Va dev.qat_ocf.0.enable\&. +Enabled by default. +.It Va cfg_services +Override the device services enabled: symmetric, asymmetric, data compression. +Possible values: "sym", "asym", "dc", "sym;dc", "asym;dc", "sym;asym". +Default services configured are "sym;asym" for even and "dc" for odd devices. +.It Va cfg_mode +Override the device mode configuration for kernel space and user space instances. +Possible values: "ks", "us", "ks;us". +Default value "ks;us". +.It Va num_user_processes +Override the number of uio user space processes that can connect to the QAT device. +Default: 2 +.El +.Pp +The following +.Xr sysctl 8 +variables are read-only: +.Bl -tag -width indent +.It Va frequency +QAT device frequency value. +.It Va mmp_version +QAT MMP Library revision number. +.It Va hw_version +QAT hardware revision number. +.It Va fw_version +QAT firmware revision number. +.It Va dev_cfg +Summary of device specific configuration. +.It Va heartbeat +QAT device heartbeat status. Value '1' indicates that the device is operational. +'0' value means that the device is not responsive. Device requires restart. +.It Va heartbeat_failed +Number of QAT heartbeat failures received. +.It Va heartbeat_sent +Number of QAT heartbeat requests sent. +.El + .Sh COMPATIBILITY The .Nm driver replaced previous implementation introduced in .Fx 13.0 . Current version, in addition to .Xr crypto 4 integration, supports also data compression and exposes a complete API for offloading data compression and cryptography operations. .Sh SEE ALSO .Xr crypto 4 , .Xr ipsec 4 , .Xr pci 4 , .Xr crypto 7 , .Xr crypto 9 .Sh HISTORY This .Nm driver was introduced in .Fx 14.0 . .Fx 13.0 included a different version of .Nm driver. .Sh AUTHORS The .Nm driver was written by .An Intel (R) Corporation . diff --git a/sys/contrib/dev/qat/qat_4xxx.bin b/sys/contrib/dev/qat/qat_4xxx.bin index baec3ad9ca32..66dd803fe419 100644 Binary files a/sys/contrib/dev/qat/qat_4xxx.bin and b/sys/contrib/dev/qat/qat_4xxx.bin differ diff --git a/sys/dev/qat/include/adf_cfg_device.h b/sys/dev/qat/include/adf_cfg_device.h index 9def937cc9db..267905dd0c4f 100644 --- a/sys/dev/qat/include/adf_cfg_device.h +++ b/sys/dev/qat/include/adf_cfg_device.h @@ -1,75 +1,83 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_CFG_DEVICE_H_ #define ADF_CFG_DEVICE_H_ #include "adf_cfg.h" #include "sal_statistics_strings.h" #define ADF_CFG_STATIC_CONF_VER 2 #define ADF_CFG_STATIC_CONF_CY_ASYM_RING_SIZE 64 #define ADF_CFG_STATIC_CONF_CY_SYM_RING_SIZE 512 #define ADF_CFG_STATIC_CONF_DC_INTER_BUF_SIZE 64 #define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ENABLED 1 #define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DC 1 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DH 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DRBG 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DSA 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ECC 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_KEYGEN 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_LN 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_PRIME 0 -#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_RSA 0 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DH 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DRBG 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DSA 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ECC 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_KEYGEN 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_LN 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_PRIME 1 +#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_RSA 1 #define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_SYM 1 #define ADF_CFG_STATIC_CONF_POLL 1 #define ADF_CFG_STATIC_CONF_IRQ 0 #define ADF_CFG_STATIC_CONF_AUTO_RESET 0 #define ADF_CFG_STATIC_CONF_NUM_DC_ACCEL_UNITS 2 #define ADF_CFG_STATIC_CONF_NUM_INLINE_ACCEL_UNITS 0 #define ADF_CFG_STATIC_CONF_INST_NUM_DC 2 #define ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL 6 #define ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ 2 +#define ADF_CFG_STATIC_CONF_USER_PROCESSES_NUM 2 +#define ADF_CFG_STATIC_CONF_USER_INST_NUM_CY 6 +#define ADF_CFG_STATIC_CONF_USER_INST_NUM_DC 2 +#define ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL_VF 1 +#define ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ_VF 1 +#define ADF_CFG_STATIC_CONF_INST_NUM_DC_VF 2 +#define ADF_CFG_STATIC_CONF_USER_INST_NUM_CY_VF 2 +#define ADF_CFG_STATIC_CONF_USER_INST_NUM_DC_VF 2 #define ADF_CFG_FW_STRING_TO_ID(str, acc, id) \ do { \ typeof(id) id_ = (id); \ typeof(str) str_; \ memcpy(str_, (str), sizeof(str_)); \ if (!strncmp(str_, \ ADF_SERVICES_DEFAULT, \ sizeof(ADF_SERVICES_DEFAULT))) \ *id_ = ADF_FW_IMAGE_DEFAULT; \ else if (!strncmp(str_, \ ADF_SERVICES_CRYPTO, \ sizeof(ADF_SERVICES_CRYPTO))) \ *id_ = ADF_FW_IMAGE_CRYPTO; \ else if (!strncmp(str_, \ ADF_SERVICES_COMPRESSION, \ sizeof(ADF_SERVICES_COMPRESSION))) \ *id_ = ADF_FW_IMAGE_COMPRESSION; \ else if (!strncmp(str_, \ ADF_SERVICES_CUSTOM1, \ sizeof(ADF_SERVICES_CUSTOM1))) \ *id_ = ADF_FW_IMAGE_CUSTOM1; \ else { \ *id_ = ADF_FW_IMAGE_DEFAULT; \ device_printf(GET_DEV(acc), \ "Invalid SerivesProfile: %s," \ "Using DEFAULT image\n", \ str_); \ } \ } while (0) int adf_cfg_get_ring_pairs(struct adf_cfg_device *device, struct adf_cfg_instance *inst, const char *process_name, struct adf_accel_dev *accel_dev); int adf_cfg_device_init(struct adf_cfg_device *device, struct adf_accel_dev *accel_dev); void adf_cfg_device_clear(struct adf_cfg_device *device, struct adf_accel_dev *accel_dev); #endif diff --git a/sys/dev/qat/include/adf_gen2_pfvf.h b/sys/dev/qat/include/adf_gen2_pfvf.h new file mode 100644 index 000000000000..f5c565a9679b --- /dev/null +++ b/sys/dev/qat/include/adf_gen2_pfvf.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_GEN2_PFVF_H +#define ADF_GEN2_PFVF_H + +#include +#include "adf_accel_devices.h" + +#define ADF_GEN2_ERRSOU3 (0x3A000 + 0x0C) +#define ADF_GEN2_ERRSOU5 (0x3A000 + 0xD8) +#define ADF_GEN2_ERRMSK3 (0x3A000 + 0x1C) +#define ADF_GEN2_ERRMSK5 (0x3A000 + 0xDC) + +static inline void +adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) +{ + pfvf_ops->enable_comms = adf_pfvf_comms_disabled; +} + +static inline void +adf_gen2_init_vf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) +{ + pfvf_ops->enable_comms = adf_pfvf_comms_disabled; +} + +#endif /* ADF_GEN2_PFVF_H */ diff --git a/sys/dev/qat/include/adf_gen4_pfvf.h b/sys/dev/qat/include/adf_gen4_pfvf.h new file mode 100644 index 000000000000..45fa171ae364 --- /dev/null +++ b/sys/dev/qat/include/adf_gen4_pfvf.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_GEN4_PFVF_H +#define ADF_GEN4_PFVF_H + +#include "adf_accel_devices.h" + +void adf_gen4_init_vf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops); +static inline void +adf_gen4_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) +{ + pfvf_ops->enable_comms = adf_pfvf_comms_disabled; +} + +#endif /* ADF_GEN4_PFVF_H */ diff --git a/sys/dev/qat/include/adf_gen4_timer.h b/sys/dev/qat/include/adf_gen4_timer.h new file mode 100644 index 000000000000..e91591772e5e --- /dev/null +++ b/sys/dev/qat/include/adf_gen4_timer.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_GEN4_TIMER_H_ +#define ADF_GEN4_TIMER_H_ + +struct adf_accel_dev; + +struct adf_hb_timer_data { + struct adf_accel_dev *accel_dev; + struct work_struct hb_int_timer_work; +}; + +int adf_int_timer_init(struct adf_accel_dev *accel_dev); +void adf_int_timer_exit(struct adf_accel_dev *accel_dev); + +#endif /* ADF_GEN4_TIMER_H_ */ diff --git a/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h b/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h new file mode 100644 index 000000000000..27f10ae729db --- /dev/null +++ b/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_GEN4VF_HW_CSR_DATA_H_ +#define ADF_GEN4VF_HW_CSR_DATA_H_ + +#define ADF_RING_CSR_ADDR_OFFSET_GEN4VF 0x0 +#define ADF_RING_BUNDLE_SIZE_GEN4 0x2000 +#define ADF_RING_CSR_RING_HEAD 0x0C0 +#define ADF_RING_CSR_RING_TAIL 0x100 +#define ADF_RING_CSR_E_STAT 0x14C +#define ADF_RING_CSR_RING_CONFIG_GEN4 0x1000 +#define ADF_RING_CSR_RING_LBASE_GEN4 0x1040 +#define ADF_RING_CSR_RING_UBASE_GEN4 0x1080 +#define ADF_RING_CSR_INT_FLAG 0x170 +#define ADF_RING_CSR_INT_FLAG_AND_COL 0x184 +#define ADF_RING_CSR_NEXT_INT_SRCSEL 0x4 +#define ADF_RING_CSR_INT_SRCSEL 0x174 +#define ADF_RING_CSR_INT_COL_EN 0x17C +#define ADF_RING_CSR_INT_COL_CTL 0x180 +#define ADF_RING_CSR_RING_SRV_ARB_EN 0x19C +#define ADF_BANK_INT_SRC_SEL_MASK_GEN4 0x44UL +#define ADF_RING_CSR_INT_COL_CTL_ENABLE 0x80000000 +#define ADF_BANK_INT_FLAG_CLEAR_MASK_GEN4 0x3 +#define ADF_RINGS_PER_INT_SRCSEL_GEN4 2 + +#define BUILD_RING_BASE_ADDR_GEN4(addr, size) \ + ((((addr) >> 6) & (0xFFFFFFFFFFFFFFFFULL << (size))) << 6) +#define READ_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring) \ + ADF_CSR_RD((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_HEAD + ((ring) << 2)) +#define READ_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring) \ + ADF_CSR_RD((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_TAIL + ((ring) << 2)) +#define READ_CSR_E_STAT_GEN4VF(csr_base_addr, bank) \ + ADF_CSR_RD((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_E_STAT) +#define WRITE_CSR_RING_CONFIG_GEN4VF(csr_base_addr, bank, ring, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_CONFIG_GEN4 + ((ring) << 2), \ + (value)) +#define WRITE_CSR_RING_BASE_GEN4VF(csr_base_addr, bank, ring, value) \ + do { \ + struct resource *_csr_base_addr = csr_base_addr; \ + u32 _bank = bank; \ + u32 _ring = ring; \ + dma_addr_t _value = value; \ + u32 l_base = 0, u_base = 0; \ + l_base = (u32)((_value)&0xFFFFFFFF); \ + u_base = (u32)(((_value)&0xFFFFFFFF00000000ULL) >> 32); \ + ADF_CSR_WR((_csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (_bank)) + \ + ADF_RING_CSR_RING_LBASE_GEN4 + ((_ring) << 2), \ + l_base); \ + ADF_CSR_WR((_csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (_bank)) + \ + ADF_RING_CSR_RING_UBASE_GEN4 + ((_ring) << 2), \ + u_base); \ + } while (0) + +static inline u64 +read_base_gen4vf(struct resource *csr_base_addr, u32 bank, u32 ring) +{ + u32 l_base, u_base; + u64 addr; + + l_base = ADF_CSR_RD(csr_base_addr, + (ADF_RING_BUNDLE_SIZE_GEN4 * bank) + + ADF_RING_CSR_RING_LBASE_GEN4 + (ring << 2)); + u_base = ADF_CSR_RD(csr_base_addr, + (ADF_RING_BUNDLE_SIZE_GEN4 * bank) + + ADF_RING_CSR_RING_UBASE_GEN4 + (ring << 2)); + + addr = (u64)l_base & 0x00000000FFFFFFFFULL; + addr |= (u64)u_base << 32 & 0xFFFFFFFF00000000ULL; + + return addr; +} + +#define WRITE_CSR_INT_SRCSEL_GEN4VF(csr_base_addr, bank) \ + ADF_CSR_WR((csr_base_addr), \ + ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank) + \ + ADF_RING_CSR_INT_SRCSEL, \ + ADF_BANK_INT_SRC_SEL_MASK_GEN4) + +#define READ_CSR_RING_BASE_GEN4VF(csr_base_addr, bank, ring) \ + read_base_gen4vf((csr_base_addr), (bank), (ring)) + +#define WRITE_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_HEAD + ((ring) << 2), \ + (value)) +#define WRITE_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_TAIL + ((ring) << 2), \ + (value)) +#define WRITE_CSR_INT_FLAG_GEN4VF(csr_base_addr, bank, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_INT_FLAG, \ + (value)) +#define WRITE_CSR_INT_COL_EN_GEN4VF(csr_base_addr, bank, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_INT_COL_EN, \ + (value)) +#define WRITE_CSR_INT_COL_CTL_GEN4VF(csr_base_addr, bank, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_INT_COL_CTL, \ + (value)) +#define WRITE_CSR_INT_FLAG_AND_COL_GEN4VF(csr_base_addr, bank, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_INT_FLAG_AND_COL, \ + (value)) +#define READ_CSR_RING_SRV_ARB_EN_GEN4VF(csr_base_addr, bank) \ + ADF_CSR_RD((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_SRV_ARB_EN) +#define WRITE_CSR_RING_SRV_ARB_EN_GEN4VF(csr_base_addr, bank, value) \ + ADF_CSR_WR((csr_base_addr), \ + (ADF_RING_CSR_ADDR_OFFSET_GEN4VF + \ + ADF_RING_BUNDLE_SIZE_GEN4 * (bank)) + \ + ADF_RING_CSR_RING_SRV_ARB_EN, \ + (value)) + +struct adf_hw_csr_info; +void gen4vf_init_hw_csr_info(struct adf_hw_csr_info *csr_info); + +#endif /* ADF_GEN4VF_HW_CSR_DATA_H_ */ diff --git a/sys/dev/qat/include/adf_pf2vf_msg.h b/sys/dev/qat/include/adf_pf2vf_msg.h deleted file mode 100644 index 9c8462a8f6b6..000000000000 --- a/sys/dev/qat/include/adf_pf2vf_msg.h +++ /dev/null @@ -1,182 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2007-2022 Intel Corporation */ -/* $FreeBSD$ */ -#ifndef ADF_PF2VF_MSG_H -#define ADF_PF2VF_MSG_H - -/* - * PF<->VF Messaging - * The PF has an array of 32-bit PF2VF registers, one for each VF. The - * PF can access all these registers; each VF can access only the one - * register associated with that particular VF. - * - * The register functionally is split into two parts: - * The bottom half is for PF->VF messages. In particular when the first - * bit of this register (bit 0) gets set an interrupt will be triggered - * in the respective VF. - * The top half is for VF->PF messages. In particular when the first bit - * of this half of register (bit 16) gets set an interrupt will be triggered - * in the PF. - * - * The remaining bits within this register are available to encode messages. - * and implement a collision control mechanism to prevent concurrent use of - * the PF2VF register by both the PF and VF. - * - * 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 - * _______________________________________________ - * | | | | | | | | | | | | | | | | | - * +-----------------------------------------------+ - * \___________________________/ \_________/ ^ ^ - * ^ ^ | | - * | | | VF2PF Int - * | | Message Origin - * | Message Type - * Message-specific Data/Reserved - * - * 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - * _______________________________________________ - * | | | | | | | | | | | | | | | | | - * +-----------------------------------------------+ - * \___________________________/ \_________/ ^ ^ - * ^ ^ | | - * | | | PF2VF Int - * | | Message Origin - * | Message Type - * Message-specific Data/Reserved - * - * Message Origin (Should always be 1) - * A legacy out-of-tree QAT driver allowed for a set of messages not supported - * by this driver; these had a Msg Origin of 0 and are ignored by this driver. - * - * When a PF or VF attempts to send a message in the lower or upper 16 bits, - * respectively, the other 16 bits are written to first with a defined - * IN_USE_BY pattern as part of a collision control scheme (see adf_iov_putmsg). - */ - -/* VF/PF compatibility version. */ -/* ADF_PFVF_COMPATIBILITY_EXT_CAP: Support for extended capabilities */ -#define ADF_PFVF_COMPATIBILITY_CAPABILITIES 2 -/* ADF_PFVF_COMPATIBILITY_FAST_ACK: In-use pattern cleared by receiver */ -#define ADF_PFVF_COMPATIBILITY_FAST_ACK 3 -#define ADF_PFVF_COMPATIBILITY_RING_TO_SVC_MAP 4 -#define ADF_PFVF_COMPATIBILITY_VERSION 4 /* PF<->VF compat */ - -/* PF->VF messages */ -#define ADF_PF2VF_INT BIT(0) -#define ADF_PF2VF_MSGORIGIN_SYSTEM BIT(1) -#define ADF_PF2VF_MSGTYPE_MASK 0x0000003C -#define ADF_PF2VF_MSGTYPE_SHIFT 2 -#define ADF_PF2VF_MSGTYPE_RESTARTING 0x01 -#define ADF_PF2VF_MSGTYPE_VERSION_RESP 0x02 -#define ADF_PF2VF_MSGTYPE_BLOCK_RESP 0x03 -#define ADF_PF2VF_MSGTYPE_FATAL_ERROR 0x04 -#define ADF_PF2VF_IN_USE_BY_PF 0x6AC20000 -#define ADF_PF2VF_IN_USE_BY_PF_MASK 0xFFFE0000 - -/* PF->VF Version Response */ -#define ADF_PF2VF_VERSION_RESP_VERS_MASK 0x00003FC0 -#define ADF_PF2VF_VERSION_RESP_VERS_SHIFT 6 -#define ADF_PF2VF_VERSION_RESP_RESULT_MASK 0x0000C000 -#define ADF_PF2VF_VERSION_RESP_RESULT_SHIFT 14 -#define ADF_PF2VF_MINORVERSION_SHIFT 6 -#define ADF_PF2VF_MAJORVERSION_SHIFT 10 -#define ADF_PF2VF_VF_COMPATIBLE 1 -#define ADF_PF2VF_VF_INCOMPATIBLE 2 -#define ADF_PF2VF_VF_COMPAT_UNKNOWN 3 - -/* PF->VF Block Request Type */ -#define ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE 0 -#define ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE (ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE + 15) -#define ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE (ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE + 1) -#define ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE \ - (ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE + 7) -#define ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE (ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE + 1) -#define ADF_VF2PF_MAX_LARGE_MESSAGE_TYPE (ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE + 3) -#define ADF_VF2PF_SMALL_PAYLOAD_SIZE 30 -#define ADF_VF2PF_MEDIUM_PAYLOAD_SIZE 62 -#define ADF_VF2PF_LARGE_PAYLOAD_SIZE 126 - -#define ADF_VF2PF_MAX_BLOCK_TYPE 3 -#define ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT 22 -#define ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_SHIFT 24 -#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_SHIFT 25 -#define ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_SHIFT 26 -#define ADF_VF2PF_BLOCK_REQ_CRC_SHIFT 31 -#define ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_MASK 0x7F000000 -#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_MASK 0x7E000000 -#define ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_MASK 0x7C000000 -#define ADF_VF2PF_LARGE_BLOCK_REQ_TYPE_MASK 0xC00000 -#define ADF_VF2PF_MEDIUM_BLOCK_REQ_TYPE_MASK 0x1C00000 -#define ADF_VF2PF_SMALL_BLOCK_REQ_TYPE_MASK 0x3C00000 - -/* PF->VF Block Response Type */ -#define ADF_PF2VF_BLOCK_RESP_TYPE_DATA 0x0 -#define ADF_PF2VF_BLOCK_RESP_TYPE_CRC 0x1 -#define ADF_PF2VF_BLOCK_RESP_TYPE_ERROR 0x2 -#define ADF_PF2VF_BLOCK_RESP_TYPE_SHIFT 6 -#define ADF_PF2VF_BLOCK_RESP_DATA_SHIFT 8 -#define ADF_PF2VF_BLOCK_RESP_TYPE_MASK 0x000000C0 -#define ADF_PF2VF_BLOCK_RESP_DATA_MASK 0x0000FF00 - -/* PF-VF block message header bytes */ -#define ADF_VF2PF_BLOCK_VERSION_BYTE 0 -#define ADF_VF2PF_BLOCK_LEN_BYTE 1 -#define ADF_VF2PF_BLOCK_DATA 2 - -/* PF->VF Block Error Code */ -#define ADF_PF2VF_INVALID_BLOCK_TYPE 0x0 -#define ADF_PF2VF_INVALID_BYTE_NUM_REQ 0x1 -#define ADF_PF2VF_PAYLOAD_TRUNCATED 0x2 -#define ADF_PF2VF_UNSPECIFIED_ERROR 0x3 - -/* VF->PF messages */ -#define ADF_VF2PF_IN_USE_BY_VF 0x00006AC2 -#define ADF_VF2PF_IN_USE_BY_VF_MASK 0x0000FFFE -#define ADF_VF2PF_INT BIT(16) -#define ADF_VF2PF_MSGORIGIN_SYSTEM BIT(17) -#define ADF_VF2PF_MSGTYPE_MASK 0x003C0000 -#define ADF_VF2PF_MSGTYPE_SHIFT 18 -#define ADF_VF2PF_MSGTYPE_INIT 0x3 -#define ADF_VF2PF_MSGTYPE_SHUTDOWN 0x4 -#define ADF_VF2PF_MSGTYPE_VERSION_REQ 0x5 -#define ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ 0x6 -#define ADF_VF2PF_MSGTYPE_GET_LARGE_BLOCK_REQ 0x7 -#define ADF_VF2PF_MSGTYPE_GET_MEDIUM_BLOCK_REQ 0x8 -#define ADF_VF2PF_MSGTYPE_GET_SMALL_BLOCK_REQ 0x9 -#define ADF_VF2PF_MSGTYPE_NOTIFY 0xa -#define ADF_VF2PF_MSGGENC_RESTARTING_COMPLETE 0x0 - -/* Block message types - * 0..15 - 32 byte message - * 16..23 - 64 byte message - * 24..27 - 128 byte message - * 2 - Get Capability Request message - */ -#define ADF_VF2PF_BLOCK_MSG_CAP_SUMMARY 2 -#define ADF_VF2PF_BLOCK_MSG_GET_RING_TO_SVC_REQ 0x3 - -/* VF->PF Compatible Version Request */ -#define ADF_VF2PF_COMPAT_VER_REQ_SHIFT 22 - -/* How long to wait for far side to acknowledge receipt */ -#define ADF_IOV_MSG_ACK_DELAY_US 5 -#define ADF_IOV_MSG_ACK_EXP_MAX_DELAY_US (5 * 1000) -#define ADF_IOV_MSG_ACK_DELAY_MS 5 -#define ADF_IOV_MSG_ACK_LIN_MAX_DELAY_US (2 * 1000 * 1000) -/* If CSR is busy, how long to delay before retrying */ -#define ADF_IOV_MSG_RETRY_DELAY 5 -#define ADF_IOV_MSG_MAX_RETRIES 10 -/* How long to wait for a response from the other side */ -#define ADF_IOV_MSG_RESP_TIMEOUT 100 -/* How often to retry when there is no response */ -#define ADF_IOV_MSG_RESP_RETRIES 5 - -#define ADF_IOV_RATELIMIT_INTERVAL 8 -#define ADF_IOV_RATELIMIT_BURST 130 - -/* CRC Calculation */ -#define ADF_CRC8_INIT_VALUE 0xFF -/* PF VF message byte shift */ -#define ADF_PFVF_DATA_SHIFT 8 -#define ADF_PFVF_DATA_MASK 0xFF -#endif /* ADF_IOV_MSG_H */ diff --git a/sys/dev/qat/include/adf_pfvf_vf_msg.h b/sys/dev/qat/include/adf_pfvf_vf_msg.h new file mode 100644 index 000000000000..89ed5a740b29 --- /dev/null +++ b/sys/dev/qat/include/adf_pfvf_vf_msg.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_PFVF_VF_MSG_H +#define ADF_PFVF_VF_MSG_H + +int adf_vf2pf_notify_init(struct adf_accel_dev *accel_dev); +void adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev); +int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev); +int adf_vf2pf_get_capabilities(struct adf_accel_dev *accel_dev); +int adf_vf2pf_get_ring_to_svc(struct adf_accel_dev *accel_dev); + +#endif /* ADF_PFVF_VF_MSG_H */ diff --git a/sys/dev/qat/include/common/adf_accel_devices.h b/sys/dev/qat/include/common/adf_accel_devices.h index 9503069ac2a2..225b86a2a7e1 100644 --- a/sys/dev/qat/include/common/adf_accel_devices.h +++ b/sys/dev/qat/include/common/adf_accel_devices.h @@ -1,668 +1,716 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_ACCEL_DEVICES_H_ #define ADF_ACCEL_DEVICES_H_ #include "qat_freebsd.h" #include "adf_cfg_common.h" +#include "adf_pfvf_msg.h" #define ADF_CFG_NUM_SERVICES 4 #define ADF_DH895XCC_DEVICE_NAME "dh895xcc" #define ADF_DH895XCCVF_DEVICE_NAME "dh895xccvf" #define ADF_C62X_DEVICE_NAME "c6xx" #define ADF_C62XVF_DEVICE_NAME "c6xxvf" #define ADF_C3XXX_DEVICE_NAME "c3xxx" #define ADF_C3XXXVF_DEVICE_NAME "c3xxxvf" #define ADF_200XX_DEVICE_NAME "200xx" #define ADF_200XXVF_DEVICE_NAME "200xxvf" #define ADF_C4XXX_DEVICE_NAME "c4xxx" #define ADF_C4XXXVF_DEVICE_NAME "c4xxxvf" #define ADF_4XXX_DEVICE_NAME "4xxx" +#define ADF_4XXXVF_DEVICE_NAME "4xxxvf" #define ADF_DH895XCC_PCI_DEVICE_ID 0x435 #define ADF_DH895XCCIOV_PCI_DEVICE_ID 0x443 #define ADF_C62X_PCI_DEVICE_ID 0x37c8 #define ADF_C62XIOV_PCI_DEVICE_ID 0x37c9 #define ADF_C3XXX_PCI_DEVICE_ID 0x19e2 #define ADF_C3XXXIOV_PCI_DEVICE_ID 0x19e3 #define ADF_200XX_PCI_DEVICE_ID 0x18ee #define ADF_200XXIOV_PCI_DEVICE_ID 0x18ef #define ADF_D15XX_PCI_DEVICE_ID 0x6f54 #define ADF_D15XXIOV_PCI_DEVICE_ID 0x6f55 #define ADF_C4XXX_PCI_DEVICE_ID 0x18a0 #define ADF_C4XXXIOV_PCI_DEVICE_ID 0x18a1 #define ADF_4XXX_PCI_DEVICE_ID 0x4940 +#define ADF_4XXXIOV_PCI_DEVICE_ID 0x4941 #define ADF_401XX_PCI_DEVICE_ID 0x4942 +#define ADF_401XXIOV_PCI_DEVICE_ID 0x4943 #define IS_QAT_GEN3(ID) ({ (ID == ADF_C4XXX_PCI_DEVICE_ID); }) static inline bool IS_QAT_GEN4(const unsigned int id) { - return (id == ADF_4XXX_PCI_DEVICE_ID || id == ADF_401XX_PCI_DEVICE_ID); + return (id == ADF_4XXX_PCI_DEVICE_ID || id == ADF_401XX_PCI_DEVICE_ID || + id == ADF_4XXXIOV_PCI_DEVICE_ID || + id == ADF_401XXIOV_PCI_DEVICE_ID); } #define IS_QAT_GEN3_OR_GEN4(ID) (IS_QAT_GEN3(ID) || IS_QAT_GEN4(ID)) #define ADF_VF2PF_SET_SIZE 32 #define ADF_MAX_VF2PF_SET 4 #define ADF_VF2PF_SET_OFFSET(set_nr) ((set_nr)*ADF_VF2PF_SET_SIZE) #define ADF_VF2PF_VFNR_TO_SET(vf_nr) ((vf_nr) / ADF_VF2PF_SET_SIZE) #define ADF_VF2PF_VFNR_TO_MASK(vf_nr) \ ({ \ u32 vf_nr_ = (vf_nr); \ BIT((vf_nr_)-ADF_VF2PF_SET_SIZE *ADF_VF2PF_VFNR_TO_SET( \ vf_nr_)); \ }) #define ADF_DEVICE_FUSECTL_OFFSET 0x40 #define ADF_DEVICE_LEGFUSE_OFFSET 0x4C #define ADF_DEVICE_FUSECTL_MASK 0x80000000 #define ADF_PCI_MAX_BARS 3 #define ADF_DEVICE_NAME_LENGTH 32 #define ADF_ETR_MAX_RINGS_PER_BANK 16 #define ADF_MAX_MSIX_VECTOR_NAME 32 #define ADF_DEVICE_NAME_PREFIX "qat_" #define ADF_STOP_RETRY 50 #define ADF_NUM_THREADS_PER_AE (8) #define ADF_AE_ADMIN_THREAD (7) #define ADF_NUM_PKE_STRAND (2) #define ADF_AE_STRAND0_THREAD (8) #define ADF_AE_STRAND1_THREAD (9) #define ADF_CFG_NUM_SERVICES 4 #define ADF_SRV_TYPE_BIT_LEN 3 #define ADF_SRV_TYPE_MASK 0x7 #define ADF_RINGS_PER_SRV_TYPE 2 #define ADF_THRD_ABILITY_BIT_LEN 4 #define ADF_THRD_ABILITY_MASK 0xf #define ADF_VF_OFFSET 0x8 #define ADF_MAX_FUNC_PER_DEV 0x7 #define ADF_PCI_DEV_OFFSET 0x3 #define ADF_SRV_TYPE_BIT_LEN 3 #define ADF_SRV_TYPE_MASK 0x7 #define GET_SRV_TYPE(ena_srv_mask, srv) \ (((ena_srv_mask) >> (ADF_SRV_TYPE_BIT_LEN * (srv))) & ADF_SRV_TYPE_MASK) #define GET_CSR_OPS(accel_dev) (&(accel_dev)->hw_device->csr_info.csr_ops) - +#define GET_PFVF_OPS(accel_dev) (&(accel_dev)->hw_device->csr_info.pfvf_ops) #define ADF_DEFAULT_RING_TO_SRV_MAP \ (CRYPTO | CRYPTO << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ NA << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) enum adf_accel_capabilities { ADF_ACCEL_CAPABILITIES_NULL = 0, ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 1, ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 2, ADF_ACCEL_CAPABILITIES_CIPHER = 4, ADF_ACCEL_CAPABILITIES_AUTHENTICATION = 8, ADF_ACCEL_CAPABILITIES_COMPRESSION = 32, ADF_ACCEL_CAPABILITIES_DEPRECATED = 64, ADF_ACCEL_CAPABILITIES_RANDOM_NUMBER = 128 }; struct adf_bar { rman_res_t base_addr; struct resource *virt_addr; rman_res_t size; } __packed; struct adf_accel_msix { struct msix_entry *entries; u32 num_entries; } __packed; struct adf_accel_pci { device_t pci_dev; struct adf_accel_msix msix_entries; struct adf_bar pci_bars[ADF_PCI_MAX_BARS]; uint8_t revid; uint8_t sku; int node; } __packed; enum dev_state { DEV_DOWN = 0, DEV_UP }; enum dev_sku_info { DEV_SKU_1 = 0, DEV_SKU_2, DEV_SKU_3, DEV_SKU_4, DEV_SKU_VF, DEV_SKU_1_CY, DEV_SKU_2_CY, DEV_SKU_3_CY, DEV_SKU_UNKNOWN }; static inline const char * get_sku_info(enum dev_sku_info info) { switch (info) { case DEV_SKU_1: return "SKU1"; case DEV_SKU_1_CY: return "SKU1CY"; case DEV_SKU_2: return "SKU2"; case DEV_SKU_2_CY: return "SKU2CY"; case DEV_SKU_3: return "SKU3"; case DEV_SKU_3_CY: return "SKU3CY"; case DEV_SKU_4: return "SKU4"; case DEV_SKU_VF: return "SKUVF"; case DEV_SKU_UNKNOWN: default: break; } return "Unknown SKU"; } enum adf_accel_unit_services { ADF_ACCEL_SERVICE_NULL = 0, ADF_ACCEL_INLINE_CRYPTO = 1, ADF_ACCEL_CRYPTO = 2, ADF_ACCEL_COMPRESSION = 4, ADF_ACCEL_ASYM = 8, ADF_ACCEL_ADMIN = 16 }; struct adf_ae_info { u32 num_asym_thd; u32 num_sym_thd; u32 num_dc_thd; } __packed; struct adf_accel_unit { u8 au_mask; u32 accel_mask; u64 ae_mask; u64 comp_ae_mask; u32 num_ae; enum adf_accel_unit_services services; } __packed; struct adf_accel_unit_info { u32 inline_ingress_msk; u32 inline_egress_msk; u32 sym_ae_msk; u32 asym_ae_msk; u32 dc_ae_msk; u8 num_cy_au; u8 num_dc_au; u8 num_asym_au; u8 num_inline_au; struct adf_accel_unit *au; const struct adf_ae_info *ae_info; } __packed; struct adf_hw_aram_info { /* Inline Egress mask. "1" = AE is working with egress traffic */ u32 inline_direction_egress_mask; /* Inline congestion managmenet profiles set in config file */ u32 inline_congest_mngt_profile; /* Initialise CY AE mask, "1" = AE is used for CY operations */ u32 cy_ae_mask; /* Initialise DC AE mask, "1" = AE is used for DC operations */ u32 dc_ae_mask; /* Number of long words used to define the ARAM regions */ u32 num_aram_lw_entries; /* ARAM region definitions */ u32 mmp_region_size; u32 mmp_region_offset; u32 skm_region_size; u32 skm_region_offset; /* * Defines size and offset of compression intermediate buffers stored * in ARAM (device's on-chip memory). */ u32 inter_buff_aram_region_size; u32 inter_buff_aram_region_offset; u32 sadb_region_size; u32 sadb_region_offset; } __packed; struct adf_hw_device_class { const char *name; const enum adf_device_type type; uint32_t instances; } __packed; struct arb_info { u32 arbiter_offset; u32 wrk_thd_2_srv_arb_map; u32 wrk_cfg_offset; } __packed; struct admin_info { u32 admin_msg_ur; u32 admin_msg_lr; u32 mailbox_offset; } __packed; struct adf_hw_csr_ops { u64 (*build_csr_ring_base_addr)(bus_addr_t addr, u32 size); u32 (*read_csr_ring_head)(struct resource *csr_base_addr, u32 bank, u32 ring); void (*write_csr_ring_head)(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value); u32 (*read_csr_ring_tail)(struct resource *csr_base_addr, u32 bank, u32 ring); void (*write_csr_ring_tail)(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value); u32 (*read_csr_e_stat)(struct resource *csr_base_addr, u32 bank); void (*write_csr_ring_config)(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value); + bus_addr_t (*read_csr_ring_base)(struct resource *csr_base_addr, + u32 bank, + u32 ring); void (*write_csr_ring_base)(struct resource *csr_base_addr, u32 bank, u32 ring, bus_addr_t addr); void (*write_csr_int_flag)(struct resource *csr_base_addr, u32 bank, u32 value); void (*write_csr_int_srcsel)(struct resource *csr_base_addr, u32 bank); void (*write_csr_int_col_en)(struct resource *csr_base_addr, u32 bank, u32 value); void (*write_csr_int_col_ctl)(struct resource *csr_base_addr, u32 bank, u32 value); void (*write_csr_int_flag_and_col)(struct resource *csr_base_addr, u32 bank, u32 value); u32 (*read_csr_ring_srv_arb_en)(struct resource *csr_base_addr, u32 bank); void (*write_csr_ring_srv_arb_en)(struct resource *csr_base_addr, u32 bank, u32 value); + u32 (*get_src_sel_mask)(void); + u32 (*get_int_col_ctl_enable_mask)(void); + u32 (*get_bank_irq_mask)(u32 irq_mask); +}; + +struct adf_cfg_device_data; +struct adf_accel_dev; +struct adf_etr_data; +struct adf_etr_ring_data; + +struct adf_pfvf_ops { + int (*enable_comms)(struct adf_accel_dev *accel_dev); + u32 (*get_pf2vf_offset)(u32 i); + u32 (*get_vf2pf_offset)(u32 i); + void (*enable_vf2pf_interrupts)(struct resource *pmisc_addr, + u32 vf_mask); + void (*disable_all_vf2pf_interrupts)(struct resource *pmisc_addr); + u32 (*disable_pending_vf2pf_interrupts)(struct resource *pmisc_addr); + int (*send_msg)(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + u32 pfvf_offset, + struct mutex *csr_lock); + struct pfvf_message (*recv_msg)(struct adf_accel_dev *accel_dev, + u32 pfvf_offset, + u8 compat_ver); }; struct adf_hw_csr_info { struct adf_hw_csr_ops csr_ops; + struct adf_pfvf_ops pfvf_ops; u32 csr_addr_offset; u32 ring_bundle_size; u32 bank_int_flag_clear_mask; u32 num_rings_per_int_srcsel; u32 arb_enable_mask; }; -struct adf_cfg_device_data; -struct adf_accel_dev; -struct adf_etr_data; -struct adf_etr_ring_data; - struct adf_hw_device_data { struct adf_hw_device_class *dev_class; uint32_t (*get_accel_mask)(struct adf_accel_dev *accel_dev); uint32_t (*get_ae_mask)(struct adf_accel_dev *accel_dev); uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self); uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self); uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self); uint32_t (*get_num_aes)(struct adf_hw_device_data *self); uint32_t (*get_num_accels)(struct adf_hw_device_data *self); void (*notify_and_wait_ethernet)(struct adf_accel_dev *accel_dev); bool (*get_eth_doorbell_msg)(struct adf_accel_dev *accel_dev); - uint32_t (*get_pf2vf_offset)(uint32_t i); - uint32_t (*get_vintmsk_offset)(uint32_t i); - u32 (*get_vintsou_offset)(void); void (*get_arb_info)(struct arb_info *arb_csrs_info); void (*get_admin_info)(struct admin_info *admin_csrs_info); void (*get_errsou_offset)(u32 *errsou3, u32 *errsou5); uint32_t (*get_num_accel_units)(struct adf_hw_device_data *self); int (*init_accel_units)(struct adf_accel_dev *accel_dev); void (*exit_accel_units)(struct adf_accel_dev *accel_dev); uint32_t (*get_clock_speed)(struct adf_hw_device_data *self); enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self); bool (*check_prod_sku)(struct adf_accel_dev *accel_dev); int (*alloc_irq)(struct adf_accel_dev *accel_dev); void (*free_irq)(struct adf_accel_dev *accel_dev); void (*enable_error_correction)(struct adf_accel_dev *accel_dev); int (*check_uncorrectable_error)(struct adf_accel_dev *accel_dev); void (*print_err_registers)(struct adf_accel_dev *accel_dev); void (*disable_error_interrupts)(struct adf_accel_dev *accel_dev); int (*init_ras)(struct adf_accel_dev *accel_dev); void (*exit_ras)(struct adf_accel_dev *accel_dev); void (*disable_arb)(struct adf_accel_dev *accel_dev); void (*update_ras_errors)(struct adf_accel_dev *accel_dev, int error); bool (*ras_interrupts)(struct adf_accel_dev *accel_dev, bool *reset_required); int (*init_admin_comms)(struct adf_accel_dev *accel_dev); void (*exit_admin_comms)(struct adf_accel_dev *accel_dev); int (*send_admin_init)(struct adf_accel_dev *accel_dev); void (*set_asym_rings_mask)(struct adf_accel_dev *accel_dev); int (*get_ring_to_svc_map)(struct adf_accel_dev *accel_dev, u16 *ring_to_svc_map); uint32_t (*get_accel_cap)(struct adf_accel_dev *accel_dev); int (*init_arb)(struct adf_accel_dev *accel_dev); void (*exit_arb)(struct adf_accel_dev *accel_dev); void (*get_arb_mapping)(struct adf_accel_dev *accel_dev, const uint32_t **cfg); int (*init_device)(struct adf_accel_dev *accel_dev); int (*get_heartbeat_status)(struct adf_accel_dev *accel_dev); + int (*int_timer_init)(struct adf_accel_dev *accel_dev); + void (*int_timer_exit)(struct adf_accel_dev *accel_dev); uint32_t (*get_ae_clock)(struct adf_hw_device_data *self); uint32_t (*get_hb_clock)(struct adf_hw_device_data *self); void (*disable_iov)(struct adf_accel_dev *accel_dev); void (*configure_iov_threads)(struct adf_accel_dev *accel_dev, bool enable); void (*enable_ints)(struct adf_accel_dev *accel_dev); bool (*check_slice_hang)(struct adf_accel_dev *accel_dev); int (*set_ssm_wdtimer)(struct adf_accel_dev *accel_dev); - int (*enable_vf2pf_comms)(struct adf_accel_dev *accel_dev); - int (*disable_vf2pf_comms)(struct adf_accel_dev *accel_dev); + void (*enable_pf2vf_interrupt)(struct adf_accel_dev *accel_dev); + void (*disable_pf2vf_interrupt)(struct adf_accel_dev *accel_dev); + int (*interrupt_active_pf2vf)(struct adf_accel_dev *accel_dev); + int (*get_int_active_bundles)(struct adf_accel_dev *accel_dev); void (*reset_device)(struct adf_accel_dev *accel_dev); void (*reset_hw_units)(struct adf_accel_dev *accel_dev); int (*measure_clock)(struct adf_accel_dev *accel_dev); void (*restore_device)(struct adf_accel_dev *accel_dev); uint32_t (*get_obj_cfg_ae_mask)(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services services); enum adf_accel_unit_services ( *get_service_type)(struct adf_accel_dev *accel_dev, s32 obj_num); int (*add_pke_stats)(struct adf_accel_dev *accel_dev); void (*remove_pke_stats)(struct adf_accel_dev *accel_dev); int (*add_misc_error)(struct adf_accel_dev *accel_dev); int (*count_ras_event)(struct adf_accel_dev *accel_dev, u32 *ras_event, char *aeidstr); void (*remove_misc_error)(struct adf_accel_dev *accel_dev); int (*configure_accel_units)(struct adf_accel_dev *accel_dev); + int (*ring_pair_reset)(struct adf_accel_dev *accel_dev, + u32 bank_number); + void (*config_ring_irq)(struct adf_accel_dev *accel_dev, + u32 bank_number, + u16 ring_mask); uint32_t (*get_objs_num)(struct adf_accel_dev *accel_dev); const char *(*get_obj_name)(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services services); void (*pre_reset)(struct adf_accel_dev *accel_dev); void (*post_reset)(struct adf_accel_dev *accel_dev); void (*set_msix_rttable)(struct adf_accel_dev *accel_dev); void (*get_ring_svc_map_data)(int ring_pair_index, u16 ring_to_svc_map, u8 *serv_type, int *ring_index, int *num_rings_per_srv, int bundle_num); struct adf_hw_csr_info csr_info; const char *fw_name; const char *fw_mmp_name; bool reset_ack; uint32_t fuses; uint32_t accel_capabilities_mask; uint32_t instance_id; uint16_t accel_mask; u32 aerucm_mask; u32 ae_mask; u32 admin_ae_mask; u32 service_mask; u32 service_to_load_mask; u32 heartbeat_ctr_num; uint16_t tx_rings_mask; uint8_t tx_rx_gap; uint8_t num_banks; u8 num_rings_per_bank; uint8_t num_accel; uint8_t num_logical_accel; uint8_t num_engines; - uint8_t min_iov_compat_ver; int (*get_storage_enabled)(struct adf_accel_dev *accel_dev, uint32_t *storage_enabled); u8 query_storage_cap; u32 clock_frequency; u8 storage_enable; u32 extended_dc_capabilities; int (*config_device)(struct adf_accel_dev *accel_dev); + u32 asym_ae_active_thd_mask; u16 asym_rings_mask; int (*get_fw_image_type)(struct adf_accel_dev *accel_dev, enum adf_cfg_fw_image_type *fw_image_type); u16 ring_to_svc_map; } __packed; /* helper enum for performing CSR operations */ enum operation { AND, OR, }; /* 32-bit CSR write macro */ #define ADF_CSR_WR(csr_base, csr_offset, val) \ bus_write_4(csr_base, csr_offset, val) /* 64-bit CSR write macro */ #ifdef __x86_64__ #define ADF_CSR_WR64(csr_base, csr_offset, val) \ bus_write_8(csr_base, csr_offset, val) #else static __inline void adf_csr_wr64(struct resource *csr_base, bus_size_t offset, uint64_t value) { bus_write_4(csr_base, offset, (uint32_t)value); bus_write_4(csr_base, offset + 4, (uint32_t)(value >> 32)); } #define ADF_CSR_WR64(csr_base, csr_offset, val) \ adf_csr_wr64(csr_base, csr_offset, val) #endif /* 32-bit CSR read macro */ #define ADF_CSR_RD(csr_base, csr_offset) bus_read_4(csr_base, csr_offset) /* 64-bit CSR read macro */ #ifdef __x86_64__ #define ADF_CSR_RD64(csr_base, csr_offset) bus_read_8(csr_base, csr_offset) #else static __inline uint64_t adf_csr_rd64(struct resource *csr_base, bus_size_t offset) { return (((uint64_t)bus_read_4(csr_base, offset)) | (((uint64_t)bus_read_4(csr_base, offset + 4)) << 32)); } #define ADF_CSR_RD64(csr_base, csr_offset) adf_csr_rd64(csr_base, csr_offset) #endif #define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev) #define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars) #define GET_HW_DATA(accel_dev) (accel_dev->hw_device) #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks) #define GET_DEV_SKU(accel_dev) (accel_dev->accel_pci_dev.sku) #define GET_NUM_RINGS_PER_BANK(accel_dev) \ (GET_HW_DATA(accel_dev)->num_rings_per_bank) #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines) #define accel_to_pci_dev(accel_ptr) accel_ptr->accel_pci_dev.pci_dev #define GET_SRV_TYPE(ena_srv_mask, srv) \ (((ena_srv_mask) >> (ADF_SRV_TYPE_BIT_LEN * (srv))) & ADF_SRV_TYPE_MASK) #define SET_ASYM_MASK(asym_mask, srv) \ ({ \ typeof(srv) srv_ = (srv); \ (asym_mask) |= ((1 << (srv_)*ADF_RINGS_PER_SRV_TYPE) | \ (1 << ((srv_)*ADF_RINGS_PER_SRV_TYPE + 1))); \ }) #define GET_NUM_RINGS_PER_BANK(accel_dev) \ (GET_HW_DATA(accel_dev)->num_rings_per_bank) #define GET_MAX_PROCESSES(accel_dev) \ ({ \ typeof(accel_dev) dev = (accel_dev); \ (GET_MAX_BANKS(dev) * (GET_NUM_RINGS_PER_BANK(dev) / 2)); \ }) #define GET_DU_TABLE(accel_dev) (accel_dev->du_table) static inline void adf_csr_fetch_and_and(struct resource *csr, size_t offs, unsigned long mask) { unsigned int val = ADF_CSR_RD(csr, offs); val &= mask; ADF_CSR_WR(csr, offs, val); } static inline void adf_csr_fetch_and_or(struct resource *csr, size_t offs, unsigned long mask) { unsigned int val = ADF_CSR_RD(csr, offs); val |= mask; ADF_CSR_WR(csr, offs, val); } static inline void adf_csr_fetch_and_update(enum operation op, struct resource *csr, size_t offs, unsigned long mask) { switch (op) { case AND: adf_csr_fetch_and_and(csr, offs, mask); break; case OR: adf_csr_fetch_and_or(csr, offs, mask); break; } } struct pfvf_stats { struct dentry *stats_file; /* Messages put in CSR */ unsigned int tx; /* Messages read from CSR */ unsigned int rx; /* Interrupt fired but int bit was clear */ unsigned int spurious; /* Block messages sent */ unsigned int blk_tx; /* Block messages received */ unsigned int blk_rx; /* Blocks received with CRC errors */ unsigned int crc_err; /* CSR in use by other side */ unsigned int busy; /* Receiver did not acknowledge */ unsigned int no_ack; /* Collision detected */ unsigned int collision; /* Couldn't send a response */ unsigned int tx_timeout; /* Didn't receive a response */ unsigned int rx_timeout; /* Responses received */ unsigned int rx_rsp; /* Messages re-transmitted */ unsigned int retry; /* Event put timeout */ unsigned int event_timeout; }; #define NUM_PFVF_COUNTERS 14 void adf_get_admin_info(struct admin_info *admin_csrs_info); struct adf_admin_comms { bus_addr_t phy_addr; bus_addr_t const_tbl_addr; bus_addr_t aram_map_phys_addr; bus_addr_t phy_hb_addr; bus_dmamap_t aram_map; bus_dmamap_t const_tbl_map; bus_dmamap_t hb_map; char *virt_addr; char *virt_hb_addr; struct resource *mailbox_addr; struct sx lock; struct bus_dmamem dma_mem; struct bus_dmamem dma_hb; }; struct icp_qat_fw_loader_handle; struct adf_fw_loader_data { struct icp_qat_fw_loader_handle *fw_loader; const struct firmware *uof_fw; const struct firmware *mmp_fw; }; struct adf_accel_vf_info { struct adf_accel_dev *accel_dev; struct mutex pf2vf_lock; /* protect CSR access for PF2VF messages */ u32 vf_nr; bool init; u8 compat_ver; struct pfvf_stats pfvf_counters; }; struct adf_fw_versions { u8 fw_version_major; u8 fw_version_minor; u8 fw_version_patch; u8 mmp_version_major; u8 mmp_version_minor; u8 mmp_version_patch; }; +struct adf_int_timer { + struct adf_accel_dev *accel_dev; + struct workqueue_struct *timer_irq_wq; + struct timer_list timer; + u32 timeout_val; + u32 int_cnt; + bool enabled; +}; + #define ADF_COMPAT_CHECKER_MAX 8 typedef int (*adf_iov_compat_checker_t)(struct adf_accel_dev *accel_dev, u8 vf_compat_ver); struct adf_accel_compat_manager { u8 num_chker; adf_iov_compat_checker_t iov_compat_checkers[ADF_COMPAT_CHECKER_MAX]; }; struct adf_heartbeat; struct adf_accel_dev { struct adf_hw_aram_info *aram_info; struct adf_accel_unit_info *au_info; struct adf_etr_data *transport; struct adf_hw_device_data *hw_device; struct adf_cfg_device_data *cfg; struct adf_fw_loader_data *fw_loader; struct adf_admin_comms *admin; + struct adf_uio_control_accel *accel; struct adf_heartbeat *heartbeat; + struct adf_int_timer *int_timer; struct adf_fw_versions fw_versions; unsigned int autoreset_on_error; struct adf_fw_counters_data *fw_counters_data; struct sysctl_oid *debugfs_ae_config; struct list_head crypto_list; atomic_t *ras_counters; unsigned long status; atomic_t ref_count; bus_dma_tag_t dma_tag; struct sysctl_ctx_list sysctl_ctx; struct sysctl_oid *ras_correctable; struct sysctl_oid *ras_uncorrectable; struct sysctl_oid *ras_fatal; struct sysctl_oid *ras_reset; struct sysctl_oid *pke_replay_dbgfile; struct sysctl_oid *misc_error_dbgfile; struct list_head list; struct adf_accel_pci accel_pci_dev; struct adf_accel_compat_manager *cm; u8 compat_ver; union { struct { /* vf_info is non-zero when SR-IOV is init'ed */ struct adf_accel_vf_info *vf_info; int num_vfs; } pf; struct { + bool irq_enabled; struct resource *irq; void *cookie; - char *irq_name; struct task pf2vf_bh_tasklet; struct mutex vf2pf_lock; /* protect CSR access */ - int iov_msg_completion; - uint8_t compatible; - uint8_t pf_version; - u8 pf2vf_block_byte; - u8 pf2vf_block_resp_type; + struct completion msg_received; + struct pfvf_message + response; /* temp field holding pf2vf response */ + enum ring_reset_result rpreset_sts; + struct mutex rpreset_lock; /* protect rpreset_sts */ struct pfvf_stats pfvf_counters; + u8 pf_compat_ver; } vf; } u1; bool is_vf; u32 accel_id; void *lac_dev; }; #endif diff --git a/sys/dev/qat/include/common/adf_cfg.h b/sys/dev/qat/include/common/adf_cfg.h index 58502c8605b8..a3ac7678a7a8 100644 --- a/sys/dev/qat/include/common/adf_cfg.h +++ b/sys/dev/qat/include/common/adf_cfg.h @@ -1,89 +1,94 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_CFG_H_ #define ADF_CFG_H_ #include #include "adf_accel_devices.h" #include "adf_cfg_common.h" #include "adf_cfg_strings.h" +#define ADF_CFG_MAX_VAL 16 + struct adf_cfg_key_val { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; enum adf_cfg_val_type type; struct list_head list; }; struct adf_cfg_section { char name[ADF_CFG_MAX_SECTION_LEN_IN_BYTES]; bool processed; bool is_derived; struct list_head list; struct list_head param_head; }; struct adf_cfg_device_data { struct adf_cfg_device *dev; struct list_head sec_list; struct sysctl_oid *debug; struct sx lock; + char cfg_services[ADF_CFG_MAX_VAL]; + char cfg_mode[ADF_CFG_MAX_VAL]; + u16 num_user_processes; }; struct adf_cfg_depot_list { struct list_head sec_list; }; int adf_cfg_dev_add(struct adf_accel_dev *accel_dev); void adf_cfg_dev_remove(struct adf_accel_dev *accel_dev); int adf_cfg_depot_restore_all(struct adf_accel_dev *accel_dev, struct adf_cfg_depot_list *dev_hp_cfg); int adf_cfg_section_add(struct adf_accel_dev *accel_dev, const char *name); void adf_cfg_del_all(struct adf_accel_dev *accel_dev); void adf_cfg_depot_del_all(struct list_head *head); int adf_cfg_add_key_value_param(struct adf_accel_dev *accel_dev, const char *section_name, const char *key, const void *val, enum adf_cfg_val_type type); int adf_cfg_get_param_value(struct adf_accel_dev *accel_dev, const char *section, const char *name, char *value); int adf_cfg_save_section(struct adf_accel_dev *accel_dev, const char *name, struct adf_cfg_section *section); int adf_cfg_depot_save_all(struct adf_accel_dev *accel_dev, struct adf_cfg_depot_list *dev_hp_cfg); struct adf_cfg_section *adf_cfg_sec_find(struct adf_accel_dev *accel_dev, const char *sec_name); int adf_cfg_derived_section_add(struct adf_accel_dev *accel_dev, const char *name); int adf_cfg_remove_key_param(struct adf_accel_dev *accel_dev, const char *section_name, const char *key); int adf_cfg_setup_irq(struct adf_accel_dev *accel_dev); void adf_cfg_set_asym_rings_mask(struct adf_accel_dev *accel_dev); void adf_cfg_gen_dispatch_arbiter(struct adf_accel_dev *accel_dev, const u32 *thrd_to_arb_map, u32 *thrd_to_arb_map_gen, u32 total_engines); int adf_cfg_get_fw_image_type(struct adf_accel_dev *accel_dev, enum adf_cfg_fw_image_type *fw_image_type); int adf_cfg_get_services_enabled(struct adf_accel_dev *accel_dev, u16 *ring_to_svc_map); int adf_cfg_restore_section(struct adf_accel_dev *accel_dev, struct adf_cfg_section *section); void adf_cfg_keyval_del_all(struct list_head *head); static inline int adf_cy_inst_cross_banks(struct adf_accel_dev *accel_dev) { if (accel_dev->hw_device->num_rings_per_bank == 2) return 1; else return 0; } #endif diff --git a/sys/dev/qat/include/common/adf_cfg_common.h b/sys/dev/qat/include/common/adf_cfg_common.h index 65fc60fc8c3d..d8b1efe3dbe6 100644 --- a/sys/dev/qat/include/common/adf_cfg_common.h +++ b/sys/dev/qat/include/common/adf_cfg_common.h @@ -1,213 +1,232 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_CFG_COMMON_H_ #define ADF_CFG_COMMON_H_ #include #include #include #define ADF_CFG_MAX_STR_LEN 128 #define ADF_CFG_MAX_KEY_LEN_IN_BYTES ADF_CFG_MAX_STR_LEN /* * Max value length increased to 128 to support more length of values. * like Dc0CoreAffinity = 0, 1, 2,... config values to max cores */ #define ADF_CFG_MAX_VAL_LEN_IN_BYTES 128 #define ADF_CFG_MAX_SECTION_LEN_IN_BYTES ADF_CFG_MAX_STR_LEN #define ADF_CFG_NULL_TERM_SIZE 1 #define ADF_CFG_BASE_DEC 10 #define ADF_CFG_BASE_HEX 16 #define ADF_CFG_ALL_DEVICES 0xFFFE #define ADF_CFG_NO_DEVICE 0xFFFF #define ADF_CFG_AFFINITY_WHATEVER 0xFF #define MAX_DEVICE_NAME_SIZE 32 #define ADF_MAX_DEVICES (32 * 32) #define ADF_MAX_ACCELENGINES 12 #define ADF_CFG_STORAGE_ENABLED 1 #define ADF_DEVS_ARRAY_SIZE BITS_TO_LONGS(ADF_MAX_DEVICES) #define ADF_GEN2_SSM_WDT_PKE_DEFAULT_VALUE 0x3000000 #define ADF_WDT_TIMER_SYM_COMP_MS 3 #define ADF_MIN_HB_TIMER_MS 100 #define ADF_CFG_MAX_NUM_OF_SECTIONS 16 #define ADF_CFG_MAX_NUM_OF_TOKENS 16 #define ADF_CFG_MAX_TOKENS_IN_CONFIG 8 #define ADF_CFG_RESP_POLL 1 #define ADF_CFG_RESP_EPOLL 2 #define ADF_CFG_DEF_CY_RING_ASYM_SIZE 64 #define ADF_CFG_DEF_CY_RING_SYM_SIZE 512 #define ADF_CFG_DEF_DC_RING_SIZE 512 #define ADF_CFG_MAX_CORE_NUM 256 #define ADF_CFG_MAX_TOKENS ADF_CFG_MAX_CORE_NUM #define ADF_CFG_MAX_TOKEN_LEN 10 #define ADF_CFG_ACCEL_DEF_COALES 1 #define ADF_CFG_ACCEL_DEF_COALES_TIMER 10000 #define ADF_CFG_ACCEL_DEF_COALES_NUM_MSG 0 #define ADF_CFG_ASYM_SRV_MASK 1 #define ADF_CFG_SYM_SRV_MASK 2 #define ADF_CFG_DC_SRV_MASK 8 #define ADF_CFG_UNKNOWN_SRV_MASK 0 #define ADF_CFG_DEF_ASYM_MASK 0x03 #define ADF_CFG_MAX_SERVICES 4 #define ADF_MAX_SERVICES 3 enum adf_svc_type { ADF_SVC_ASYM = 0, ADF_SVC_SYM = 1, ADF_SVC_DC = 2, ADF_SVC_NONE = 3 }; struct adf_pci_address { unsigned char bus; unsigned char dev; unsigned char func; } __packed; #define ADF_CFG_SERV_RING_PAIR_0_SHIFT 0 #define ADF_CFG_SERV_RING_PAIR_1_SHIFT 3 #define ADF_CFG_SERV_RING_PAIR_2_SHIFT 6 #define ADF_CFG_SERV_RING_PAIR_3_SHIFT 9 enum adf_cfg_service_type { NA = 0, CRYPTO, COMP, SYM, ASYM, USED }; enum adf_cfg_bundle_type { FREE, KERNEL, USER }; enum adf_cfg_val_type { ADF_DEC, ADF_HEX, ADF_STR }; enum adf_device_type { DEV_UNKNOWN = 0, DEV_DH895XCC, DEV_DH895XCCVF, DEV_C62X, DEV_C62XVF, DEV_C3XXX, DEV_C3XXXVF, DEV_200XX, DEV_200XXVF, DEV_C4XXX, DEV_C4XXXVF, - DEV_4XXX + DEV_D15XX, + DEV_D15XXVF, + DEV_4XXX, + DEV_4XXXVF }; enum adf_cfg_fw_image_type { ADF_FW_IMAGE_DEFAULT = 0, ADF_FW_IMAGE_CRYPTO, ADF_FW_IMAGE_COMPRESSION, ADF_FW_IMAGE_CUSTOM1 }; struct adf_dev_status_info { enum adf_device_type type; uint16_t accel_id; uint16_t instance_id; uint8_t num_ae; uint8_t num_accel; uint8_t num_logical_accel; uint8_t banks_per_accel; uint8_t state; uint8_t bus; uint8_t dev; uint8_t fun; int domain; char name[MAX_DEVICE_NAME_SIZE]; u8 sku; u32 node_id; u32 device_mem_available; u32 pci_device_id; }; struct adf_cfg_device { /* contains all the bundles info */ struct adf_cfg_bundle **bundles; /* contains all the instances info */ struct adf_cfg_instance **instances; int bundle_num; int instance_index; char name[ADF_CFG_MAX_STR_LEN]; int dev_id; int max_kernel_bundle_nr; u16 total_num_inst; }; enum adf_accel_serv_type { ADF_ACCEL_SERV_NA = 0x0, ADF_ACCEL_SERV_ASYM, ADF_ACCEL_SERV_SYM, ADF_ACCEL_SERV_RND, ADF_ACCEL_SERV_DC }; struct adf_cfg_ring { u8 mode : 1; enum adf_accel_serv_type serv_type; u8 number : 4; }; struct adf_cfg_bundle { /* Section(s) name this bundle is shared by */ char **sections; int max_section; int section_index; int number; enum adf_cfg_bundle_type type; cpuset_t affinity_mask; int polling_mode; int instance_num; int num_of_rings; /* contains all the info about rings */ struct adf_cfg_ring **rings; u16 in_use; u16 max_cfg_svc_num; }; struct adf_cfg_instance { enum adf_cfg_service_type stype; char name[ADF_CFG_MAX_STR_LEN]; int polling_mode; cpuset_t affinity_mask; /* rings within an instance for services */ int asym_tx; int asym_rx; int sym_tx; int sym_rx; int dc_tx; int dc_rx; int bundle; }; #define ADF_CFG_MAX_CORE_NUM 256 #define ADF_CFG_MAX_TOKENS_IN_CONFIG 8 #define ADF_CFG_MAX_TOKEN_LEN 10 #define ADF_CFG_MAX_TOKENS ADF_CFG_MAX_CORE_NUM #define ADF_CFG_ACCEL_DEF_COALES 1 #define ADF_CFG_ACCEL_DEF_COALES_TIMER 10000 #define ADF_CFG_ACCEL_DEF_COALES_NUM_MSG 0 #define ADF_CFG_RESP_EPOLL 2 #define ADF_CFG_SERV_RING_PAIR_1_SHIFT 3 #define ADF_CFG_SERV_RING_PAIR_2_SHIFT 6 #define ADF_CFG_SERV_RING_PAIR_3_SHIFT 9 #define ADF_CFG_RESP_POLL 1 #define ADF_CFG_ASYM_SRV_MASK 1 #define ADF_CFG_SYM_SRV_MASK 2 #define ADF_CFG_DC_SRV_MASK 8 #define ADF_CFG_UNKNOWN_SRV_MASK 0 #define ADF_CFG_DEF_ASYM_MASK 0x03 #define ADF_CFG_MAX_SERVICES 4 +#define ADF_CTL_IOC_MAGIC 'a' +#define IOCTL_STATUS_ACCEL_DEV \ + _IOWR(ADF_CTL_IOC_MAGIC, 3, struct adf_dev_status_info) +#define IOCTL_RESERVE_RING \ + _IOWR(ADF_CTL_IOC_MAGIC, 10, struct adf_user_reserve_ring) +#define IOCTL_RELEASE_RING \ + _IOWR(ADF_CTL_IOC_MAGIC, 11, struct adf_user_reserve_ring) +#define IOCTL_ENABLE_RING \ + _IOWR(ADF_CTL_IOC_MAGIC, 12, struct adf_user_reserve_ring) +#define IOCTL_DISABLE_RING \ + _IOWR(ADF_CTL_IOC_MAGIC, 13, struct adf_user_reserve_ring) +#define IOCTL_GET_NUM_DEVICES _IOR(ADF_CTL_IOC_MAGIC, 4, int32_t) #define ADF_CFG_HB_DEFAULT_VALUE 500 #define ADF_CFG_HB_COUNT_THRESHOLD 3 #define ADF_MIN_HB_TIMER_MS 100 +#define IOCTL_GET_CFG_VAL \ + _IOW(ADF_CTL_IOC_MAGIC, 5, struct adf_user_cfg_ctl_data) enum adf_device_heartbeat_status { DEV_HB_UNRESPONSIVE = 0, DEV_HB_ALIVE, DEV_HB_UNSUPPORTED }; struct adf_dev_heartbeat_status_ctl { uint16_t device_id; enum adf_device_heartbeat_status status; }; +#define IOCTL_HEARTBEAT_ACCEL_DEV \ + _IOWR(ADF_CTL_IOC_MAGIC, 9, struct adf_dev_heartbeat_status_ctl) #endif diff --git a/sys/dev/qat/include/common/adf_cfg_strings.h b/sys/dev/qat/include/common/adf_cfg_strings.h index 933ffe0ba6ad..5d39fd6cdc3f 100644 --- a/sys/dev/qat/include/common/adf_cfg_strings.h +++ b/sys/dev/qat/include/common/adf_cfg_strings.h @@ -1,136 +1,142 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_CFG_STRINGS_H_ #define ADF_CFG_STRINGS_H_ #define ADF_GENERAL_SEC "GENERAL" #define ADF_KERNEL_SEC "KERNEL" #define ADF_ACCEL_SEC "Accelerator" +#define ADF_SAL_SEC "SSL" #define ADF_NUM_CY "NumberCyInstances" #define ADF_NUM_DC "NumberDcInstances" #define ADF_RING_SYM_SIZE "NumConcurrentSymRequests" #define ADF_RING_ASYM_SIZE "NumConcurrentAsymRequests" #define ADF_RING_DC_SIZE "NumConcurrentRequests" #define ADF_RING_ASYM_TX "RingAsymTx" #define ADF_RING_SYM_TX "RingSymTx" #define ADF_RING_RND_TX "RingNrbgTx" #define ADF_RING_ASYM_RX "RingAsymRx" #define ADF_RING_SYM_RX "RingSymRx" #define ADF_RING_RND_RX "RingNrbgRx" #define ADF_RING_DC_TX "RingTx" #define ADF_RING_DC_RX "RingRx" #define ADF_ETRMGR_BANK "Bank" #define ADF_RING_BANK_NUM "BankNumber" #define ADF_RING_BANK_NUM_ASYM "BankNumberAsym" #define ADF_RING_BANK_NUM_SYM "BankNumberSym" #define ADF_CY "Cy" #define ADF_DC "Dc" #define ADF_DC_EXTENDED_FEATURES "Device_DcExtendedFeatures" #define ADF_ETRMGR_COALESCING_ENABLED "InterruptCoalescingEnabled" #define ADF_ETRMGR_COALESCING_ENABLED_FORMAT \ ADF_ETRMGR_BANK "%d" ADF_ETRMGR_COALESCING_ENABLED #define ADF_ETRMGR_COALESCE_TIMER "InterruptCoalescingTimerNs" #define ADF_ETRMGR_COALESCE_TIMER_FORMAT \ ADF_ETRMGR_BANK "%d" ADF_ETRMGR_COALESCE_TIMER #define ADF_ETRMGR_COALESCING_MSG_ENABLED "InterruptCoalescingNumResponses" #define ADF_ETRMGR_COALESCING_MSG_ENABLED_FORMAT \ ADF_ETRMGR_BANK "%d" ADF_ETRMGR_COALESCING_MSG_ENABLED #define ADF_ETRMGR_CORE_AFFINITY "CoreAffinity" #define ADF_ETRMGR_CORE_AFFINITY_FORMAT \ ADF_ETRMGR_BANK "%d" ADF_ETRMGR_CORE_AFFINITY #define ADF_ACCEL_STR "Accelerator%d" #define ADF_INLINE_SEC "INLINE" #define ADF_NUM_CY_ACCEL_UNITS "NumCyAccelUnits" #define ADF_NUM_DC_ACCEL_UNITS "NumDcAccelUnits" #define ADF_NUM_INLINE_ACCEL_UNITS "NumInlineAccelUnits" #define ADF_INLINE_INGRESS "InlineIngress" #define ADF_INLINE_EGRESS "InlineEgress" #define ADF_INLINE_CONGEST_MNGT_PROFILE "InlineCongestionManagmentProfile" #define ADF_INLINE_IPSEC_ALGO_GROUP "InlineIPsecAlgoGroup" #define ADF_SERVICE_CY "cy" #define ADF_SERVICE_SYM "sym" #define ADF_SERVICE_DC "dc" #define ADF_CFG_CY "cy" #define ADF_CFG_DC "dc" #define ADF_CFG_ASYM "asym" #define ADF_CFG_SYM "sym" +#define ADF_CFG_SYM_ASYM "sym;asym" +#define ADF_CFG_SYM_DC "sym;dc" +#define ADF_CFG_KERNEL_USER "ks;us" +#define ADF_CFG_KERNEL "ks" +#define ADF_CFG_USER "us" #define ADF_SERVICE_INLINE "inline" #define ADF_SERVICES_ENABLED "ServicesEnabled" #define ADF_SERVICES_SEPARATOR ";" #define ADF_DEV_SSM_WDT_BULK "CySymAndDcWatchDogTimer" #define ADF_DEV_SSM_WDT_PKE "CyAsymWatchDogTimer" #define ADF_DH895XCC_AE_FW_NAME "icp_qat_ae.uof" #define ADF_CXXX_AE_FW_NAME "icp_qat_ae.suof" #define ADF_HEARTBEAT_TIMER "HeartbeatTimer" #define ADF_MMP_VER_KEY "Firmware_MmpVer" #define ADF_UOF_VER_KEY "Firmware_UofVer" #define ADF_HW_REV_ID_KEY "HW_RevId" #define ADF_STORAGE_FIRMWARE_ENABLED "StorageEnabled" #define ADF_DEV_MAX_BANKS "Device_Max_Banks" #define ADF_DEV_CAPABILITIES_MASK "Device_Capabilities_Mask" #define ADF_DEV_NODE_ID "Device_NodeId" #define ADF_DEV_PKG_ID "Device_PkgId" #define ADF_FIRST_USER_BUNDLE "FirstUserBundle" #define ADF_INTERNAL_USERSPACE_SEC_SUFF "_INT_" #define ADF_LIMIT_DEV_ACCESS "LimitDevAccess" #define DEV_LIMIT_CFG_ACCESS_TMPL "_D_L_ACC" #define ADF_DEV_MAX_RINGS_PER_BANK "Device_Max_Rings_Per_Bank" #define ADF_NUM_PROCESSES "NumProcesses" #define ADF_DH895XCC_AE_FW_NAME_COMPRESSION "compression.uof" #define ADF_DH895XCC_AE_FW_NAME_CRYPTO "crypto.uof" #define ADF_DH895XCC_AE_FW_NAME_CUSTOM1 "custom1.uof" #define ADF_CXXX_AE_FW_NAME_COMPRESSION "compression.suof" #define ADF_CXXX_AE_FW_NAME_CRYPTO "crypto.suof" #define ADF_CXXX_AE_FW_NAME_CUSTOM1 "custom1.suof" #define ADF_DC_EXTENDED_FEATURES "Device_DcExtendedFeatures" #define ADF_PKE_DISABLED "PkeServiceDisabled" #define ADF_INTER_BUF_SIZE "DcIntermediateBufferSizeInKB" #define ADF_AUTO_RESET_ON_ERROR "AutoResetOnError" #define ADF_KERNEL_SAL_SEC "KERNEL_QAT" #define ADF_CFG_DEF_CY_RING_ASYM_SIZE 64 #define ADF_CFG_DEF_CY_RING_SYM_SIZE 512 #define ADF_CFG_DEF_DC_RING_SIZE 512 #define ADF_NUM_PROCESSES "NumProcesses" #define ADF_SERVICES_ENABLED "ServicesEnabled" #define ADF_CFG_CY "cy" #define ADF_CFG_SYM "sym" #define ADF_CFG_ASYM "asym" #define ADF_CFG_DC "dc" #define ADF_POLL_MODE "IsPolled" #define ADF_DEV_KPT_ENABLE "KptEnabled" #define ADF_STORAGE_FIRMWARE_ENABLED "StorageEnabled" #define ADF_RL_FIRMWARE_ENABLED "RateLimitingEnabled" #define ADF_SERVICES_PROFILE "ServicesProfile" #define ADF_SERVICES_DEFAULT "DEFAULT" #define ADF_SERVICES_CRYPTO "CRYPTO" #define ADF_SERVICES_COMPRESSION "COMPRESSION" #define ADF_SERVICES_CUSTOM1 "CUSTOM1" #define ADF_DC_RING_SIZE (ADF_DC ADF_RING_DC_SIZE) #define ADF_CY_RING_SYM_SIZE (ADF_CY ADF_RING_SYM_SIZE) #define ADF_CY_RING_ASYM_SIZE (ADF_CY ADF_RING_ASYM_SIZE) #define ADF_CY_CORE_AFFINITY_FORMAT ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY #define ADF_DC_CORE_AFFINITY_FORMAT ADF_DC "%d" ADF_ETRMGR_CORE_AFFINITY #define ADF_CY_BANK_NUM_FORMAT ADF_CY "%d" ADF_RING_BANK_NUM #define ADF_CY_ASYM_BANK_NUM_FORMAT ADF_CY "%d" ADF_RING_BANK_NUM_ASYM #define ADF_CY_SYM_BANK_NUM_FORMAT ADF_CY "%d" ADF_RING_BANK_NUM_SYM #define ADF_DC_BANK_NUM_FORMAT ADF_DC "%d" ADF_RING_BANK_NUM #define ADF_CY_ASYM_TX_FORMAT ADF_CY "%d" ADF_RING_ASYM_TX #define ADF_CY_SYM_TX_FORMAT ADF_CY "%d" ADF_RING_SYM_TX #define ADF_CY_ASYM_RX_FORMAT ADF_CY "%d" ADF_RING_ASYM_RX #define ADF_CY_SYM_RX_FORMAT ADF_CY "%d" ADF_RING_SYM_RX #define ADF_DC_TX_FORMAT ADF_DC "%d" ADF_RING_DC_TX #define ADF_DC_RX_FORMAT ADF_DC "%d" ADF_RING_DC_RX #define ADF_CY_RING_SYM_SIZE_FORMAT ADF_CY "%d" ADF_RING_SYM_SIZE #define ADF_CY_RING_ASYM_SIZE_FORMAT ADF_CY "%d" ADF_RING_ASYM_SIZE #define ADF_DC_RING_SIZE_FORMAT ADF_DC "%d" ADF_RING_DC_SIZE #define ADF_CY_NAME_FORMAT ADF_CY "%dName" #define ADF_DC_NAME_FORMAT ADF_DC "%dName" #define ADF_CY_POLL_MODE_FORMAT ADF_CY "%d" ADF_POLL_MODE #define ADF_DC_POLL_MODE_FORMAT ADF_DC "%d" ADF_POLL_MODE #define ADF_USER_SECTION_NAME_FORMAT "%s_INT_%d" #define ADF_LIMITED_USER_SECTION_NAME_FORMAT "%s_DEV%d_INT_%d" #define ADF_CONFIG_VERSION "ConfigVersion" #endif diff --git a/sys/dev/qat/include/common/adf_cfg_sysctl.h b/sys/dev/qat/include/common/adf_cfg_sysctl.h new file mode 100644 index 000000000000..d6a7183c039a --- /dev/null +++ b/sys/dev/qat/include/common/adf_cfg_sysctl.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2023 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_CFG_SYSCTL_H_ +#define ADF_CFG_SYSCTL_H_ + +#include "adf_accel_devices.h" + +int adf_cfg_sysctl_add(struct adf_accel_dev *accel_dev); +void adf_cfg_sysctl_remove(struct adf_accel_dev *accel_dev); + +#endif /* ADF_CFG_SYSCTL_H_ */ diff --git a/sys/dev/qat/include/common/adf_common_drv.h b/sys/dev/qat/include/common/adf_common_drv.h index 7ec380540336..0c8bb565f748 100644 --- a/sys/dev/qat/include/common/adf_common_drv.h +++ b/sys/dev/qat/include/common/adf_common_drv.h @@ -1,370 +1,335 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_DRV_H #define ADF_DRV_H #include #include "adf_accel_devices.h" #include "icp_qat_fw_loader_handle.h" #include "icp_qat_hal.h" #include "adf_cfg_user.h" +#include "adf_uio.h" +#include "adf_uio_control.h" +#define QAT_UIO_IOC_MAGIC 'b' #define ADF_MAJOR_VERSION 0 #define ADF_MINOR_VERSION 6 #define ADF_BUILD_VERSION 0 #define ADF_DRV_VERSION \ __stringify(ADF_MAJOR_VERSION) "." __stringify( \ ADF_MINOR_VERSION) "." __stringify(ADF_BUILD_VERSION) +#define IOCTL_GET_BUNDLE_SIZE _IOR(QAT_UIO_IOC_MAGIC, 0, int32_t) +#define IOCTL_ALLOC_BUNDLE _IOW(QAT_UIO_IOC_MAGIC, 1, int) +#define IOCTL_GET_ACCEL_TYPE _IOR(QAT_UIO_IOC_MAGIC, 2, uint32_t) +#define IOCTL_ADD_MEM_FD _IOW(QAT_UIO_IOC_MAGIC, 3, int) #define ADF_STATUS_RESTARTING 0 #define ADF_STATUS_STARTING 1 #define ADF_STATUS_CONFIGURED 2 #define ADF_STATUS_STARTED 3 #define ADF_STATUS_AE_INITIALISED 4 #define ADF_STATUS_AE_UCODE_LOADED 5 #define ADF_STATUS_AE_STARTED 6 #define ADF_STATUS_PF_RUNNING 7 #define ADF_STATUS_IRQ_ALLOCATED 8 #define ADF_PCIE_FLR_ATTEMPT 10 #define ADF_STATUS_SYSCTL_CTX_INITIALISED 9 #define PCI_EXP_AERUCS 0x104 /* PMISC BAR upper and lower offsets in PCIe config space */ #define ADF_PMISC_L_OFFSET 0x18 #define ADF_PMISC_U_OFFSET 0x1c enum adf_dev_reset_mode { ADF_DEV_RESET_ASYNC = 0, ADF_DEV_RESET_SYNC }; enum adf_event { ADF_EVENT_INIT = 0, ADF_EVENT_START, ADF_EVENT_STOP, ADF_EVENT_SHUTDOWN, ADF_EVENT_RESTARTING, ADF_EVENT_RESTARTED, ADF_EVENT_ERROR, }; struct adf_state { enum adf_event dev_state; int dev_id; }; struct service_hndl { int (*event_hld)(struct adf_accel_dev *accel_dev, enum adf_event event); unsigned long init_status[ADF_DEVS_ARRAY_SIZE]; unsigned long start_status[ADF_DEVS_ARRAY_SIZE]; char *name; struct list_head list; }; static inline int get_current_node(void) { return PCPU_GET(domain); } int adf_service_register(struct service_hndl *service); int adf_service_unregister(struct service_hndl *service); int adf_dev_init(struct adf_accel_dev *accel_dev); int adf_dev_start(struct adf_accel_dev *accel_dev); int adf_dev_stop(struct adf_accel_dev *accel_dev); void adf_dev_shutdown(struct adf_accel_dev *accel_dev); int adf_dev_autoreset(struct adf_accel_dev *accel_dev); int adf_dev_reset(struct adf_accel_dev *accel_dev, enum adf_dev_reset_mode mode); int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev, enum adf_dev_reset_mode mode); void adf_error_notifier(uintptr_t arg); int adf_init_fatal_error_wq(void); void adf_exit_fatal_error_wq(void); -int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr); -int adf_iov_notify(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr); -void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev); int adf_notify_fatal_error(struct adf_accel_dev *accel_dev); -void adf_pf2vf_notify_fatal_error(struct adf_accel_dev *accel_dev); -void adf_pf2vf_notify_uncorrectable_error(struct adf_accel_dev *accel_dev); -void adf_pf2vf_notify_heartbeat_error(struct adf_accel_dev *accel_dev); -typedef int (*adf_iov_block_provider)(struct adf_accel_dev *accel_dev, - u8 **buffer, - u8 *length, - u8 *block_version, - u8 compatibility, - u8 byte_num); -int adf_iov_block_provider_register(u8 block_type, - const adf_iov_block_provider provider); -u8 adf_iov_is_block_provider_registered(u8 block_type); -int adf_iov_block_provider_unregister(u8 block_type, - const adf_iov_block_provider provider); -int adf_iov_block_get(struct adf_accel_dev *accel_dev, - u8 block_type, - u8 *block_version, - u8 *buffer, - u8 *length); -u8 adf_pfvf_crc(u8 start_crc, u8 *buf, u8 len); -int adf_iov_init_compat_manager(struct adf_accel_dev *accel_dev, - struct adf_accel_compat_manager **cm); -int adf_iov_shutdown_compat_manager(struct adf_accel_dev *accel_dev, - struct adf_accel_compat_manager **cm); -int adf_iov_register_compat_checker(struct adf_accel_dev *accel_dev, - const adf_iov_compat_checker_t cc); -int adf_iov_unregister_compat_checker(struct adf_accel_dev *accel_dev, - const adf_iov_compat_checker_t cc); -int adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev); -int adf_pf_disable_vf2pf_comms(struct adf_accel_dev *accel_dev); -int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev); -int adf_disable_vf2pf_comms(struct adf_accel_dev *accel_dev); -void adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info); void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); void adf_clean_vf_map(bool); int adf_sysctl_add_fw_versions(struct adf_accel_dev *accel_dev); int adf_sysctl_remove_fw_versions(struct adf_accel_dev *accel_dev); int adf_ctl_dev_register(void); void adf_ctl_dev_unregister(void); -int adf_pf_vf_capabilities_init(struct adf_accel_dev *accel_dev); -int adf_pf_ext_dc_cap_msg_provider(struct adf_accel_dev *accel_dev, - u8 **buffer, - u8 *length, - u8 *block_version, - u8 compatibility); -int adf_pf_vf_ring_to_svc_init(struct adf_accel_dev *accel_dev); -int adf_pf_ring_to_svc_msg_provider(struct adf_accel_dev *accel_dev, - u8 **buffer, - u8 *length, - u8 *block_version, - u8 compatibility, - u8 byte_num); +int adf_register_ctl_device_driver(void); +void adf_unregister_ctl_device_driver(void); +int adf_processes_dev_register(void); +void adf_processes_dev_unregister(void); +void adf_state_init(void); +void adf_state_destroy(void); int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, struct adf_accel_dev *pf); void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, struct adf_accel_dev *pf); struct list_head *adf_devmgr_get_head(void); struct adf_accel_dev *adf_devmgr_get_dev_by_id(uint32_t id); struct adf_accel_dev *adf_devmgr_get_first(void); struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(device_t pci_dev); int adf_devmgr_verify_id(uint32_t *id); void adf_devmgr_get_num_dev(uint32_t *num); int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); int adf_dev_started(struct adf_accel_dev *accel_dev); int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); int adf_dev_restarting_notify_sync(struct adf_accel_dev *accel_dev); int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); int adf_dev_stop_notify_sync(struct adf_accel_dev *accel_dev); int adf_ae_init(struct adf_accel_dev *accel_dev); int adf_ae_shutdown(struct adf_accel_dev *accel_dev); int adf_ae_fw_load(struct adf_accel_dev *accel_dev); void adf_ae_fw_release(struct adf_accel_dev *accel_dev); int adf_ae_start(struct adf_accel_dev *accel_dev); int adf_ae_stop(struct adf_accel_dev *accel_dev); int adf_aer_store_ppaerucm_reg(device_t pdev, struct adf_hw_device_data *hw_data); int adf_enable_aer(struct adf_accel_dev *accel_dev, device_t *adf); void adf_disable_aer(struct adf_accel_dev *accel_dev); void adf_reset_sbr(struct adf_accel_dev *accel_dev); void adf_reset_flr(struct adf_accel_dev *accel_dev); void adf_dev_pre_reset(struct adf_accel_dev *accel_dev); void adf_dev_post_reset(struct adf_accel_dev *accel_dev); void adf_dev_restore(struct adf_accel_dev *accel_dev); int adf_init_aer(void); void adf_exit_aer(void); int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, void *in, void *out); struct icp_qat_fw_init_admin_req; struct icp_qat_fw_init_admin_resp; int adf_send_admin(struct adf_accel_dev *accel_dev, struct icp_qat_fw_init_admin_req *req, struct icp_qat_fw_init_admin_resp *resp, u32 ae_mask); int adf_config_device(struct adf_accel_dev *accel_dev); int adf_init_admin_comms(struct adf_accel_dev *accel_dev); void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); int adf_send_admin_init(struct adf_accel_dev *accel_dev); int adf_get_fw_timestamp(struct adf_accel_dev *accel_dev, u64 *timestamp); int adf_get_fw_pke_stats(struct adf_accel_dev *accel_dev, u64 *suc_count, u64 *unsuc_count); int adf_dev_measure_clock(struct adf_accel_dev *accel_dev, u32 *frequency, u32 min, u32 max); int adf_clock_debugfs_add(struct adf_accel_dev *accel_dev); u64 adf_clock_get_current_time(void); int adf_init_arb(struct adf_accel_dev *accel_dev); int adf_init_gen2_arb(struct adf_accel_dev *accel_dev); void adf_exit_arb(struct adf_accel_dev *accel_dev); void adf_disable_arb(struct adf_accel_dev *accel_dev); void adf_update_ring_arb(struct adf_etr_ring_data *ring); void adf_enable_ring_arb(struct adf_accel_dev *accel_dev, void *csr_addr, unsigned int bank_nr, unsigned int mask); void adf_disable_ring_arb(struct adf_accel_dev *accel_dev, void *csr_addr, unsigned int bank_nr, unsigned int mask); int adf_set_ssm_wdtimer(struct adf_accel_dev *accel_dev); +void adf_update_uio_ring_arb(struct adf_uio_control_bundle *bundle); struct adf_accel_dev *adf_devmgr_get_dev_by_bdf(struct adf_pci_address *addr); struct adf_accel_dev *adf_devmgr_get_dev_by_pci_bus(u8 bus); int adf_get_vf_nr(struct adf_pci_address *vf_pci_addr, int *vf_nr); u32 adf_get_slices_for_svc(struct adf_accel_dev *accel_dev, enum adf_svc_type svc); bool adf_is_bdf_equal(struct adf_pci_address *bdf1, struct adf_pci_address *bdf2); int adf_is_vf_nr_valid(struct adf_accel_dev *accel_dev, int vf_nr); void adf_dev_get(struct adf_accel_dev *accel_dev); void adf_dev_put(struct adf_accel_dev *accel_dev); int adf_dev_in_use(struct adf_accel_dev *accel_dev); int adf_init_etr_data(struct adf_accel_dev *accel_dev); void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); struct qat_crypto_instance *qat_crypto_get_instance_node(int node); void qat_crypto_put_instance(struct qat_crypto_instance *inst); void qat_alg_callback(void *resp); void qat_alg_asym_callback(void *resp); int qat_algs_register(void); void qat_algs_unregister(void); int qat_asym_algs_register(void); void qat_asym_algs_unregister(void); int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); void adf_isr_resource_free(struct adf_accel_dev *accel_dev); int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); - +int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev); int qat_hal_init(struct adf_accel_dev *accel_dev); void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle); int qat_hal_start(struct icp_qat_fw_loader_handle *handle); void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask); void qat_hal_reset(struct icp_qat_fw_loader_handle *handle); int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle); void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask); int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, unsigned int ae); int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, enum icp_qat_uof_regtype lm_type, unsigned char mode); void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode); void qat_hal_set_ae_scs_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode); int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode); int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode); void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask, unsigned int upc); void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int uaddr, unsigned int words_num, const uint64_t *uword); void qat_hal_wr_coalesce_uwords(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int uaddr, unsigned int words_num, uint64_t *uword); void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int uword_addr, unsigned int words_num, unsigned int *data); int qat_hal_get_ins_num(void); int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, unsigned char ae, struct icp_qat_uof_batch_init *lm_init_header); int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata); int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata); int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata); int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, unsigned short reg_num, unsigned int regdata); int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned short lm_addr, unsigned int value); int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle); void qat_uclo_del_mof(struct icp_qat_fw_loader_handle *handle); int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, const void *addr_ptr, int mem_size); int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle, const void *addr_ptr, u32 mem_size, const char *obj_name); void qat_hal_get_scs_neigh_ae(unsigned char ae, unsigned char *ae_neigh); int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, unsigned int cfg_ae_mask); -void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); -void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); int adf_init_vf_wq(void); void adf_exit_vf_wq(void); -void adf_flush_vf_wq(void); -int adf_vf2pf_init(struct adf_accel_dev *accel_dev); -void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev); +void adf_flush_vf_wq(struct adf_accel_dev *accel_dev); +int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); +int adf_pf2vf_handle_pf_rp_reset(struct adf_accel_dev *accel_dev, + struct pfvf_message msg); +bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); static inline int adf_sriov_configure(device_t *pdev, int numvfs) { return 0; } static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev) { } static inline void adf_vf2pf_handler(struct adf_accel_vf_info *vf_info) { } static inline int adf_init_pf_wq(void) { return 0; } static inline void adf_exit_pf_wq(void) { } #endif diff --git a/sys/dev/qat/include/common/adf_gen2_hw_data.h b/sys/dev/qat/include/common/adf_gen2_hw_data.h index 395abec81b9f..cabfa6c9e5ff 100644 --- a/sys/dev/qat/include/common/adf_gen2_hw_data.h +++ b/sys/dev/qat/include/common/adf_gen2_hw_data.h @@ -1,172 +1,196 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2021 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_GEN2_HW_DATA_H_ #define ADF_GEN2_HW_DATA_H_ #include "adf_accel_devices.h" #include "adf_cfg_common.h" /* Transport access */ #define ADF_BANK_INT_SRC_SEL_MASK_0 0x4444444CUL #define ADF_BANK_INT_SRC_SEL_MASK_X 0x44444444UL #define ADF_RING_CSR_RING_CONFIG 0x000 #define ADF_RING_CSR_RING_LBASE 0x040 #define ADF_RING_CSR_RING_UBASE 0x080 #define ADF_RING_CSR_RING_HEAD 0x0C0 #define ADF_RING_CSR_RING_TAIL 0x100 #define ADF_RING_CSR_E_STAT 0x14C #define ADF_RING_CSR_INT_FLAG 0x170 #define ADF_RING_CSR_INT_SRCSEL 0x174 #define ADF_RING_CSR_INT_SRCSEL_2 0x178 #define ADF_RING_CSR_INT_COL_EN 0x17C #define ADF_RING_CSR_INT_COL_CTL 0x180 #define ADF_RING_CSR_INT_FLAG_AND_COL 0x184 #define ADF_RING_CSR_INT_COL_CTL_ENABLE 0x80000000 +#define ADF_RING_CSR_ADDR_OFFSET 0x0 #define ADF_RING_BUNDLE_SIZE 0x1000 #define ADF_GEN2_RX_RINGS_OFFSET 8 #define ADF_GEN2_TX_RINGS_MASK 0xFF #define BUILD_RING_BASE_ADDR(addr, size) \ (((addr) >> 6) & (GENMASK_ULL(63, 0) << (size))) #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ ADF_CSR_RD(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_RING_HEAD + \ ((ring) << 2)) #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ ADF_CSR_RD(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_RING_TAIL + \ ((ring) << 2)) #define READ_CSR_E_STAT(csr_base_addr, bank) \ ADF_CSR_RD(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_E_STAT) #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + \ ADF_RING_CSR_RING_CONFIG + ((ring) << 2), \ value) + +static inline uint64_t +read_base(struct resource *csr_base_addr, u32 bank, u32 ring) +{ + u32 l_base, u_base; + u64 addr; + + l_base = ADF_CSR_RD(csr_base_addr, + (ADF_RING_BUNDLE_SIZE * bank) + + ADF_RING_CSR_RING_LBASE + (ring << 2)); + u_base = ADF_CSR_RD(csr_base_addr, + (ADF_RING_BUNDLE_SIZE * bank) + + ADF_RING_CSR_RING_UBASE + (ring << 2)); + + addr = (uint64_t)l_base & 0x00000000FFFFFFFFULL; + addr |= (uint64_t)u_base << 32 & 0xFFFFFFFF00000000ULL; + + return addr; +} + +#define READ_CSR_RING_BASE(csr_base_addr, bank, ring) \ + read_base(csr_base_addr, bank, ring) + #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ do { \ u32 l_base = 0, u_base = 0; \ l_base = (u32)((value)&0xFFFFFFFF); \ u_base = (u32)(((value)&0xFFFFFFFF00000000ULL) >> 32); \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + \ ADF_RING_CSR_RING_LBASE + ((ring) << 2), \ l_base); \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + \ ADF_RING_CSR_RING_UBASE + ((ring) << 2), \ u_base); \ } while (0) #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_RING_HEAD + \ ((ring) << 2), \ value) #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_RING_TAIL + \ ((ring) << 2), \ value) #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_INT_FLAG, \ value) #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ do { \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + \ ADF_RING_CSR_INT_SRCSEL, \ ADF_BANK_INT_SRC_SEL_MASK_0); \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + \ ADF_RING_CSR_INT_SRCSEL_2, \ ADF_BANK_INT_SRC_SEL_MASK_X); \ } while (0) #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_INT_COL_EN, \ value) #define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + ADF_RING_CSR_INT_COL_CTL, \ ADF_RING_CSR_INT_COL_CTL_ENABLE | (value)) #define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \ ADF_CSR_WR(csr_base_addr, \ (ADF_RING_BUNDLE_SIZE * (bank)) + \ ADF_RING_CSR_INT_FLAG_AND_COL, \ value) /* AE to function map */ #define AE2FUNCTION_MAP_A_OFFSET (0x3A400 + 0x190) #define AE2FUNCTION_MAP_B_OFFSET (0x3A400 + 0x310) #define AE2FUNCTION_MAP_REG_SIZE 4 #define AE2FUNCTION_MAP_VALID BIT(7) #define READ_CSR_AE2FUNCTION_MAP_A(pmisc_bar_addr, index) \ ADF_CSR_RD(pmisc_bar_addr, \ AE2FUNCTION_MAP_A_OFFSET + \ AE2FUNCTION_MAP_REG_SIZE * (index)) #define WRITE_CSR_AE2FUNCTION_MAP_A(pmisc_bar_addr, index, value) \ ADF_CSR_WR(pmisc_bar_addr, \ AE2FUNCTION_MAP_A_OFFSET + \ AE2FUNCTION_MAP_REG_SIZE * (index), \ value) #define READ_CSR_AE2FUNCTION_MAP_B(pmisc_bar_addr, index) \ ADF_CSR_RD(pmisc_bar_addr, \ AE2FUNCTION_MAP_B_OFFSET + \ AE2FUNCTION_MAP_REG_SIZE * (index)) #define WRITE_CSR_AE2FUNCTION_MAP_B(pmisc_bar_addr, index, value) \ ADF_CSR_WR(pmisc_bar_addr, \ AE2FUNCTION_MAP_B_OFFSET + \ AE2FUNCTION_MAP_REG_SIZE * (index), \ value) /* Admin Interface Offsets */ #define ADF_ADMINMSGUR_OFFSET (0x3A000 + 0x574) #define ADF_ADMINMSGLR_OFFSET (0x3A000 + 0x578) #define ADF_MAILBOX_BASE_OFFSET 0x20970 /* Arbiter configuration */ #define ADF_ARB_OFFSET 0x30000 #define ADF_ARB_WRK_2_SER_MAP_OFFSET 0x180 #define ADF_ARB_CONFIG (BIT(31) | BIT(6) | BIT(0)) #define ADF_ARB_REG_SLOT 0x1000 #define ADF_ARB_RINGSRVARBEN_OFFSET 0x19C #define READ_CSR_RING_SRV_ARB_EN(csr_addr, index) \ ADF_CSR_RD(csr_addr, \ ADF_ARB_RINGSRVARBEN_OFFSET + (ADF_ARB_REG_SLOT * (index))) #define WRITE_CSR_RING_SRV_ARB_EN(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, \ ADF_ARB_RINGSRVARBEN_OFFSET + (ADF_ARB_REG_SLOT * (index)), \ value) /* Power gating */ #define ADF_POWERGATE_DC BIT(23) #define ADF_POWERGATE_PKE BIT(24) /* Default ring mapping */ #define ADF_GEN2_DEFAULT_RING_TO_SRV_MAP \ (CRYPTO << ADF_CFG_SERV_RING_PAIR_0_SHIFT | \ CRYPTO << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ UNUSED << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) /* Error detection and correction */ #define ADF_GEN2_AE_CTX_ENABLES(i) ((i)*0x1000 + 0x20818) #define ADF_GEN2_AE_MISC_CONTROL(i) ((i)*0x1000 + 0x20960) #define ADF_GEN2_ENABLE_AE_ECC_ERR BIT(28) #define ADF_GEN2_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12)) #define ADF_GEN2_UERRSSMSH(i) ((i)*0x4000 + 0x18) #define ADF_GEN2_CERRSSMSH(i) ((i)*0x4000 + 0x10) #define ADF_GEN2_ERRSSMSH_EN BIT(3) #define ADF_NUM_HB_CNT_PER_AE (ADF_NUM_THREADS_PER_AE + ADF_NUM_PKE_STRAND) void adf_gen2_init_hw_csr_info(struct adf_hw_csr_info *csr_info); #endif diff --git a/sys/dev/qat/include/common/adf_gen4_hw_data.h b/sys/dev/qat/include/common/adf_gen4_hw_data.h index c0ef0c92772e..c2c375f8a401 100644 --- a/sys/dev/qat/include/common/adf_gen4_hw_data.h +++ b/sys/dev/qat/include/common/adf_gen4_hw_data.h @@ -1,132 +1,173 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2021 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_GEN4_HW_CSR_DATA_H_ #define ADF_GEN4_HW_CSR_DATA_H_ #include "adf_accel_devices.h" /* Transport access */ #define ADF_BANK_INT_SRC_SEL_MASK 0x44UL #define ADF_RING_CSR_RING_CONFIG 0x1000 #define ADF_RING_CSR_RING_LBASE 0x1040 #define ADF_RING_CSR_RING_UBASE 0x1080 #define ADF_RING_CSR_RING_HEAD 0x0C0 #define ADF_RING_CSR_RING_TAIL 0x100 #define ADF_RING_CSR_E_STAT 0x14C #define ADF_RING_CSR_INT_FLAG 0x170 #define ADF_RING_CSR_INT_SRCSEL 0x174 #define ADF_RING_CSR_INT_COL_CTL 0x180 #define ADF_RING_CSR_INT_FLAG_AND_COL 0x184 #define ADF_RING_CSR_INT_COL_CTL_ENABLE 0x80000000 #define ADF_RING_CSR_INT_COL_EN 0x17C #define ADF_RING_CSR_ADDR_OFFSET 0x100000 #define ADF_RING_BUNDLE_SIZE 0x2000 +/* Ring reset */ +#define ADF_RPRESET_POLL_TIMEOUT_US (5 * USEC_PER_SEC) +#define ADF_RPRESET_POLL_DELAY_US 20 +#define ADF_WQM_CSR_RPRESETCTL_RESET BIT(0) +#define ADF_WQM_CSR_RPRESETCTL(bank) (0x6000 + ((bank) << 3)) +#define ADF_WQM_CSR_RPRESETSTS_STATUS BIT(0) +#define ADF_WQM_CSR_RPRESETSTS(bank) (ADF_WQM_CSR_RPRESETCTL(bank) + 4) + +#define ADF_WQM_CSR_RPRESETCTL_SHIFT 0 +#define ADF_WQM_CSR_RPRESETCTL_DRAIN_SHIFT 2 +#define ADF_WQM_CSR_RPRESETCTL_MASK (BIT(3) - 1) +#define ADF_WQM_CSR_RPRESETCTL(bank) (0x6000 + ((bank) << 3)) +#define ADF_WQM_CSR_RPRESETSTS_SHIFT 0 +#define ADF_WQM_CSR_RPRESETSTS_MASK (BIT(0)) +#define ADF_WQM_CSR_RPRESETSTS(bank) (ADF_WQM_CSR_RPRESETCTL(bank) + 4) + #define BUILD_RING_BASE_ADDR(addr, size) \ ((((addr) >> 6) & (GENMASK_ULL(63, 0) << (size))) << 6) #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ ADF_CSR_RD((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_HEAD + ((ring) << 2)) #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ ADF_CSR_RD((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_TAIL + ((ring) << 2)) #define READ_CSR_E_STAT(csr_base_addr, bank) \ ADF_CSR_RD((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_E_STAT) #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_CONFIG + ((ring) << 2), \ value) #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ do { \ struct resource *_csr_base_addr = csr_base_addr; \ u32 _bank = bank; \ u32 _ring = ring; \ dma_addr_t _value = value; \ u32 l_base = 0, u_base = 0; \ l_base = lower_32_bits(_value); \ u_base = upper_32_bits(_value); \ ADF_CSR_WR((_csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + \ ADF_RING_BUNDLE_SIZE * (_bank) + \ ADF_RING_CSR_RING_LBASE + ((_ring) << 2), \ l_base); \ ADF_CSR_WR((_csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + \ ADF_RING_BUNDLE_SIZE * (_bank) + \ ADF_RING_CSR_RING_UBASE + ((_ring) << 2), \ u_base); \ } while (0) +static inline u64 +read_base_gen4(struct resource *csr_base_addr, u32 bank, u32 ring) +{ + u32 l_base, u_base; + u64 addr; + + l_base = ADF_CSR_RD(csr_base_addr, + ADF_RING_CSR_ADDR_OFFSET + + (ADF_RING_BUNDLE_SIZE * bank) + + ADF_RING_CSR_RING_LBASE + (ring << 2)); + u_base = ADF_CSR_RD(csr_base_addr, + ADF_RING_CSR_ADDR_OFFSET + + (ADF_RING_BUNDLE_SIZE * bank) + + ADF_RING_CSR_RING_UBASE + (ring << 2)); + + addr = (u64)l_base & 0x00000000FFFFFFFFULL; + addr |= (u64)u_base << 32 & 0xFFFFFFFF00000000ULL; + + return addr; +} + +#define READ_CSR_RING_BASE(csr_base_addr, bank, ring) \ + read_base_gen4((csr_base_addr), (bank), (ring)) + #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_HEAD + ((ring) << 2), \ value) #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_TAIL + ((ring) << 2), \ value) #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_INT_FLAG, \ (value)) #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_INT_SRCSEL, \ ADF_BANK_INT_SRC_SEL_MASK) #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_INT_COL_EN, \ (value)) #define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_INT_COL_CTL, \ ADF_RING_CSR_INT_COL_CTL_ENABLE | (value)) #define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_INT_FLAG_AND_COL, \ (value)) /* Arbiter configuration */ #define ADF_RING_CSR_RING_SRV_ARB_EN 0x19C #define READ_CSR_RING_SRV_ARB_EN(csr_base_addr, bank) \ ADF_CSR_RD((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_SRV_ARB_EN) #define WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value) \ ADF_CSR_WR((csr_base_addr), \ ADF_RING_CSR_ADDR_OFFSET + ADF_RING_BUNDLE_SIZE * (bank) + \ ADF_RING_CSR_RING_SRV_ARB_EN, \ (value)) /* WDT timers * * Timeout is in cycles. Clock speed may vary across products but this * value should be a few milli-seconds. */ #define ADF_SSM_WDT_DEFAULT_VALUE 0x7000000ULL #define ADF_SSM_WDT_PKE_DEFAULT_VALUE 0x8000000 #define ADF_SSMWDTL_OFFSET 0x54 #define ADF_SSMWDTH_OFFSET 0x5C #define ADF_SSMWDTPKEL_OFFSET 0x58 #define ADF_SSMWDTPKEH_OFFSET 0x60 #define ADF_NUM_HB_CNT_PER_AE (ADF_NUM_THREADS_PER_AE) int adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev); void adf_gen4_init_hw_csr_info(struct adf_hw_csr_info *csr_info); +int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number); #endif diff --git a/sys/dev/qat/include/common/adf_pfvf_msg.h b/sys/dev/qat/include/common/adf_pfvf_msg.h new file mode 100644 index 000000000000..b0f3feb7d398 --- /dev/null +++ b/sys/dev/qat/include/common/adf_pfvf_msg.h @@ -0,0 +1,260 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_PFVF_MSG_H +#define ADF_PFVF_MSG_H + +/* + * PF<->VF Gen2 Messaging format + * + * The PF has an array of 32-bit PF2VF registers, one for each VF. The + * PF can access all these registers while each VF can access only the one + * register associated with that particular VF. + * + * The register functionally is split into two parts: + * The bottom half is for PF->VF messages. In particular when the first + * bit of this register (bit 0) gets set an interrupt will be triggered + * in the respective VF. + * The top half is for VF->PF messages. In particular when the first bit + * of this half of register (bit 16) gets set an interrupt will be triggered + * in the PF. + * + * The remaining bits within this register are available to encode messages. + * and implement a collision control mechanism to prevent concurrent use of + * the PF2VF register by both the PF and VF. + * + * 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 + * _______________________________________________ + * | | | | | | | | | | | | | | | | | + * +-----------------------------------------------+ + * \___________________________/ \_________/ ^ ^ + * ^ ^ | | + * | | | VF2PF Int + * | | Message Origin + * | Message Type + * Message-specific Data/Reserved + * + * 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 + * _______________________________________________ + * | | | | | | | | | | | | | | | | | + * +-----------------------------------------------+ + * \___________________________/ \_________/ ^ ^ + * ^ ^ | | + * | | | PF2VF Int + * | | Message Origin + * | Message Type + * Message-specific Data/Reserved + * + * Message Origin (Should always be 1) + * A legacy out-of-tree QAT driver allowed for a set of messages not supported + * by this driver; these had a Msg Origin of 0 and are ignored by this driver. + * + * When a PF or VF attempts to send a message in the lower or upper 16 bits, + * respectively, the other 16 bits are written to first with a defined + * IN_USE_BY pattern as part of a collision control scheme (see function + * adf_gen2_pfvf_send() in adf_pf2vf_msg.c). + * + * + * PF<->VF Gen4 Messaging format + * + * Similarly to the gen2 messaging format, 32-bit long registers are used for + * communication between PF and VFs. However, each VF and PF share a pair of + * 32-bits register to avoid collisions: one for PV to VF messages and one + * for VF to PF messages. + * + * Both the Interrupt bit and the Message Origin bit retain the same position + * and meaning, although non-system messages are now deprecated and not + * expected. + * + * 31 30 9 8 7 6 5 4 3 2 1 0 + * _______________________________________________ + * | | | . . . | | | | | | | | | | | + * +-----------------------------------------------+ + * \_____________________/ \_______________/ ^ ^ + * ^ ^ | | + * | | | PF/VF Int + * | | Message Origin + * | Message Type + * Message-specific Data/Reserved + * + * For both formats, the message reception is acknowledged by lowering the + * interrupt bit on the register where the message was sent. + */ + +/* PFVF message common bits */ +#define ADF_PFVF_INT BIT(0) +#define ADF_PFVF_MSGORIGIN_SYSTEM BIT(1) + +/* Different generations have different CSR layouts, use this struct + * to abstract these differences away + */ +struct pfvf_message { + u8 type; + u32 data; +}; + +/* PF->VF messages */ +enum pf2vf_msgtype { + ADF_PF2VF_MSGTYPE_RESTARTING = 0x01, + ADF_PF2VF_MSGTYPE_VERSION_RESP = 0x02, + ADF_PF2VF_MSGTYPE_BLKMSG_RESP = 0x03, + /* Values from 0x10 are Gen4 specific, message type is only 4 bits in + Gen2 devices. */ + ADF_PF2VF_MSGTYPE_RP_RESET_RESP = 0x10, +}; + +/* VF->PF messages */ +enum vf2pf_msgtype { + ADF_VF2PF_MSGTYPE_INIT = 0x03, + ADF_VF2PF_MSGTYPE_SHUTDOWN = 0x04, + ADF_VF2PF_MSGTYPE_VERSION_REQ = 0x05, + ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ = 0x06, + ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ = 0x07, + ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ = 0x08, + ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ = 0x09, + /* Values from 0x10 are Gen4 specific, message type is only 4 bits in + Gen2 devices. */ + ADF_VF2PF_MSGTYPE_RP_RESET = 0x10, +}; + +/* VF/PF compatibility version. */ +enum pfvf_compatibility_version { + /* Support for extended capabilities */ + ADF_PFVF_COMPAT_CAPABILITIES = 0x02, + /* In-use pattern cleared by receiver */ + ADF_PFVF_COMPAT_FAST_ACK = 0x03, + /* Ring to service mapping support for non-standard mappings */ + ADF_PFVF_COMPAT_RING_TO_SVC_MAP = 0x04, + /* Reference to the latest version */ + ADF_PFVF_COMPAT_THIS_VERSION = 0x04, +}; + +/* PF->VF Version Response */ +#define ADF_PF2VF_VERSION_RESP_VERS_MASK GENMASK(7, 0) +#define ADF_PF2VF_VERSION_RESP_RESULT_MASK GENMASK(9, 8) + +enum pf2vf_compat_response { + ADF_PF2VF_VF_COMPATIBLE = 0x01, + ADF_PF2VF_VF_INCOMPATIBLE = 0x02, + ADF_PF2VF_VF_COMPAT_UNKNOWN = 0x03, +}; + +enum ring_reset_result { + RPRESET_SUCCESS = 0x00, + RPRESET_NOT_SUPPORTED = 0x01, + RPRESET_INVAL_BANK = 0x02, + RPRESET_TIMEOUT = 0x03, +}; + +#define ADF_VF2PF_RNG_RESET_RP_MASK GENMASK(1, 0) +#define ADF_VF2PF_RNG_RESET_RSVD_MASK GENMASK(25, 2) + +/* PF->VF Block Responses */ +#define ADF_PF2VF_BLKMSG_RESP_TYPE_MASK GENMASK(1, 0) +#define ADF_PF2VF_BLKMSG_RESP_DATA_MASK GENMASK(9, 2) + +enum pf2vf_blkmsg_resp_type { + ADF_PF2VF_BLKMSG_RESP_TYPE_DATA = 0x00, + ADF_PF2VF_BLKMSG_RESP_TYPE_CRC = 0x01, + ADF_PF2VF_BLKMSG_RESP_TYPE_ERROR = 0x02, +}; + +/* PF->VF Block Error Code */ +enum pf2vf_blkmsg_error { + ADF_PF2VF_INVALID_BLOCK_TYPE = 0x00, + ADF_PF2VF_INVALID_BYTE_NUM_REQ = 0x01, + ADF_PF2VF_PAYLOAD_TRUNCATED = 0x02, + ADF_PF2VF_UNSPECIFIED_ERROR = 0x03, +}; + +/* VF->PF Block Requests */ +#define ADF_VF2PF_LARGE_BLOCK_TYPE_MASK GENMASK(1, 0) +#define ADF_VF2PF_LARGE_BLOCK_BYTE_MASK GENMASK(8, 2) +#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK GENMASK(2, 0) +#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK GENMASK(8, 3) +#define ADF_VF2PF_SMALL_BLOCK_TYPE_MASK GENMASK(3, 0) +#define ADF_VF2PF_SMALL_BLOCK_BYTE_MASK GENMASK(8, 4) +#define ADF_VF2PF_BLOCK_CRC_REQ_MASK BIT(9) + +/* PF->VF Block Request Types + * 0..15 - 32 byte message + * 16..23 - 64 byte message + * 24..27 - 128 byte message + */ +enum vf2pf_blkmsg_req_type { + ADF_VF2PF_BLKMSG_REQ_CAP_SUMMARY = 0x02, + ADF_VF2PF_BLKMSG_REQ_RING_SVC_MAP = 0x03, +}; + +#define ADF_VF2PF_SMALL_BLOCK_TYPE_MAX \ + (FIELD_MAX(ADF_VF2PF_SMALL_BLOCK_TYPE_MASK)) + +#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX \ + (FIELD_MAX(ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK) + \ + ADF_VF2PF_SMALL_BLOCK_TYPE_MAX + 1) + +#define ADF_VF2PF_LARGE_BLOCK_TYPE_MAX \ + (FIELD_MAX(ADF_VF2PF_LARGE_BLOCK_TYPE_MASK) + \ + ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX) + +#define ADF_VF2PF_SMALL_BLOCK_BYTE_MAX \ + FIELD_MAX(ADF_VF2PF_SMALL_BLOCK_BYTE_MASK) + +#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MAX \ + FIELD_MAX(ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK) + +#define ADF_VF2PF_LARGE_BLOCK_BYTE_MAX \ + FIELD_MAX(ADF_VF2PF_LARGE_BLOCK_BYTE_MASK) + +struct pfvf_blkmsg_header { + u8 version; + u8 payload_size; +} __packed; + +#define ADF_PFVF_BLKMSG_HEADER_SIZE (sizeof(struct pfvf_blkmsg_header)) +#define ADF_PFVF_BLKMSG_PAYLOAD_SIZE(blkmsg) \ + (sizeof(blkmsg) - ADF_PFVF_BLKMSG_HEADER_SIZE) +#define ADF_PFVF_BLKMSG_MSG_SIZE(blkmsg) \ + (ADF_PFVF_BLKMSG_HEADER_SIZE + (blkmsg)->hdr.payload_size) +#define ADF_PFVF_BLKMSG_MSG_MAX_SIZE 128 + +/* PF->VF Block message header bytes */ +#define ADF_PFVF_BLKMSG_VER_BYTE 0 +#define ADF_PFVF_BLKMSG_LEN_BYTE 1 + +/* PF/VF Capabilities message values */ +enum blkmsg_capabilities_versions { + ADF_PFVF_CAPABILITIES_V1_VERSION = 0x01, + ADF_PFVF_CAPABILITIES_V2_VERSION = 0x02, + ADF_PFVF_CAPABILITIES_V3_VERSION = 0x03, +}; + +struct capabilities_v1 { + struct pfvf_blkmsg_header hdr; + u32 ext_dc_caps; +} __packed; + +struct capabilities_v2 { + struct pfvf_blkmsg_header hdr; + u32 ext_dc_caps; + u32 capabilities; +} __packed; + +struct capabilities_v3 { + struct pfvf_blkmsg_header hdr; + u32 ext_dc_caps; + u32 capabilities; + u32 frequency; +} __packed; + +/* PF/VF Ring to service mapping values */ +enum blkmsg_ring_to_svc_versions { + ADF_PFVF_RING_TO_SVC_VERSION = 0x01, +}; + +struct ring_to_svc_map_v1 { + struct pfvf_blkmsg_header hdr; + u16 map; +} __packed; + +#endif /* ADF_PFVF_MSG_H */ diff --git a/sys/dev/qat/include/common/adf_pfvf_utils.h b/sys/dev/qat/include/common/adf_pfvf_utils.h new file mode 100644 index 000000000000..43eb7b52ef6b --- /dev/null +++ b/sys/dev/qat/include/common/adf_pfvf_utils.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_PFVF_UTILS_H +#define ADF_PFVF_UTILS_H + +#include +#include "adf_pfvf_msg.h" + +/* How long to wait for far side to acknowledge receipt */ +#define ADF_PFVF_MSG_ACK_DELAY_US 4 +#define ADF_PFVF_MSG_ACK_MAX_DELAY_US (1 * USEC_PER_SEC) + +u8 adf_pfvf_calc_blkmsg_crc(u8 const *buf, u8 buf_len); + +struct pfvf_field_format { + u8 offset; + u32 mask; +}; + +struct pfvf_csr_format { + struct pfvf_field_format type; + struct pfvf_field_format data; +}; + +u32 adf_pfvf_csr_msg_of(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + const struct pfvf_csr_format *fmt); +struct pfvf_message adf_pfvf_message_of(struct adf_accel_dev *accel_dev, + u32 raw_msg, + const struct pfvf_csr_format *fmt); + +static inline struct resource * +adf_get_pmisc_base(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + struct adf_bar *pmisc; + + pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; + + return pmisc->virt_addr; +} + +#endif /* ADF_PFVF_UTILS_H */ diff --git a/sys/dev/qat/include/common/adf_pfvf_vf_proto.h b/sys/dev/qat/include/common/adf_pfvf_vf_proto.h new file mode 100644 index 000000000000..f2623c1730bb --- /dev/null +++ b/sys/dev/qat/include/common/adf_pfvf_vf_proto.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_PFVF_VF_PROTO_H +#define ADF_PFVF_VF_PROTO_H + +#include +#include "adf_accel_devices.h" + +#define ADF_PFVF_MSG_COLLISION_DETECT_DELAY 10 +#define ADF_PFVF_MSG_ACK_DELAY 2 +#define ADF_PFVF_MSG_ACK_MAX_RETRY 100 + +/* How often to retry if there is no response */ +#define ADF_PFVF_MSG_RESP_RETRIES 5 +#define ADF_PFVF_MSG_RESP_TIMEOUT \ + (ADF_PFVF_MSG_ACK_DELAY * ADF_PFVF_MSG_ACK_MAX_RETRY + \ + ADF_PFVF_MSG_COLLISION_DETECT_DELAY) + +int adf_send_vf2pf_msg(struct adf_accel_dev *accel_dev, + struct pfvf_message msg); +int adf_send_vf2pf_req(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + struct pfvf_message *resp); +int adf_send_vf2pf_blkmsg_req(struct adf_accel_dev *accel_dev, + u8 type, + u8 *buffer, + unsigned int *buffer_len); + +int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev); + +#endif /* ADF_PFVF_VF_PROTO_H */ diff --git a/sys/dev/qat/include/common/adf_uio.h b/sys/dev/qat/include/common/adf_uio.h new file mode 100644 index 000000000000..07d33054c74b --- /dev/null +++ b/sys/dev/qat/include/common/adf_uio.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2023 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_UIO_H +#define ADF_UIO_H +#include "adf_accel_devices.h" + +struct qat_uio_bundle_dev { + u8 hardware_bundle_number; + struct adf_uio_control_bundle *bundle; + struct adf_uio_control_accel *accel; +}; + +int adf_uio_register(struct adf_accel_dev *accel_dev); +void adf_uio_remove(struct adf_accel_dev *accel_dev); + +#endif /* end of include guard: ADF_UIO_H */ diff --git a/sys/dev/qat/include/common/adf_uio_cleanup.h b/sys/dev/qat/include/common/adf_uio_cleanup.h new file mode 100644 index 000000000000..d8c59f74935b --- /dev/null +++ b/sys/dev/qat/include/common/adf_uio_cleanup.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2023 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_UIO_CLEANUP_H +#define ADF_UIO_CLEANUP_H + +void adf_uio_do_cleanup_orphan(int bank, + struct adf_uio_control_accel *accel); + + +#endif diff --git a/sys/dev/qat/include/common/adf_uio_control.h b/sys/dev/qat/include/common/adf_uio_control.h new file mode 100644 index 000000000000..0572a12764b6 --- /dev/null +++ b/sys/dev/qat/include/common/adf_uio_control.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2023 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef QAT_UIO_CONTROL_H +#define QAT_UIO_CONTROL_H +#include + +struct adf_uio_instance_rings { + unsigned int user_pid; + u16 ring_mask; + struct list_head list; +}; + +struct adf_uio_control_bundle { + uint8_t hardware_bundle_number; + bool used; + struct list_head list; + struct mutex list_lock; /* protects list struct */ + struct mutex lock; /* protects rings_used and csr_addr */ + u16 rings_used; + u32 rings_enabled; + void *csr_addr; + struct qat_uio_bundle_dev uio_priv; + vm_object_t obj; +}; + +struct adf_uio_control_accel { + struct adf_accel_dev *accel_dev; + struct cdev *cdev; + struct mtx lock; + struct adf_bar *bar; + unsigned int nb_bundles; + unsigned int num_ker_bundles; + unsigned int total_used_bundles; + unsigned int num_handles; + struct cv cleanup_ok; + /* bundle[] must be last to allow dynamic size allocation. */ + struct adf_uio_control_bundle bundle[0]; + +}; + + +#endif /* end of include guard: QAT_UIO_CONTROL_H */ diff --git a/sys/dev/qat/qat/qat_ocf.c b/sys/dev/qat/qat/qat_ocf.c index 7e5025b0fa28..4960a5248c0c 100644 --- a/sys/dev/qat/qat/qat_ocf.c +++ b/sys/dev/qat/qat/qat_ocf.c @@ -1,1223 +1,1303 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /* System headers */ #include #include #include #include #include #include #include #include +#include /* Cryptodev headers */ #include #include "cryptodev_if.h" /* QAT specific headers */ #include "cpa.h" #include "cpa_cy_im.h" #include "cpa_cy_sym_dp.h" #include "adf_accel_devices.h" #include "adf_common_drv.h" #include "lac_sym_hash_defs.h" #include "lac_sym_qat_hash_defs_lookup.h" /* To get only IRQ instances */ #include "icp_accel_devices.h" #include "icp_adf_accel_mgr.h" #include "lac_sal_types.h" /* To disable AEAD HW MAC verification */ #include "icp_sal_user.h" /* QAT OCF specific headers */ #include "qat_ocf_mem_pool.h" #include "qat_ocf_utils.h" #define QAT_OCF_MAX_INSTANCES (256) #define QAT_OCF_SESSION_WAIT_TIMEOUT_MS (1000) MALLOC_DEFINE(M_QAT_OCF, "qat_ocf", "qat_ocf(4) memory allocations"); /* QAT OCF internal structures */ struct qat_ocf_softc { device_t sc_dev; + struct sysctl_oid *rc; + uint32_t enabled; int32_t cryptodev_id; struct qat_ocf_instance cyInstHandles[QAT_OCF_MAX_INSTANCES]; int32_t numCyInstances; }; /* Function definitions */ static void qat_ocf_freesession(device_t dev, crypto_session_t cses); static int qat_ocf_probesession(device_t dev, const struct crypto_session_params *csp); static int qat_ocf_newsession(device_t dev, crypto_session_t cses, const struct crypto_session_params *csp); static int qat_ocf_attach(device_t dev); static int qat_ocf_detach(device_t dev); static void symDpCallback(CpaCySymDpOpData *pOpData, CpaStatus result, CpaBoolean verifyResult) { struct qat_ocf_cookie *qat_cookie; struct cryptop *crp; struct qat_ocf_dsession *qat_dsession = NULL; struct qat_ocf_session *qat_session = NULL; struct qat_ocf_instance *qat_instance = NULL; CpaStatus status; int rc = 0; qat_cookie = (struct qat_ocf_cookie *)pOpData->pCallbackTag; if (!qat_cookie) return; crp = qat_cookie->crp_op; qat_dsession = crypto_get_driver_session(crp->crp_session); qat_instance = qat_dsession->qatInstance; status = qat_ocf_cookie_dma_post_sync(crp, pOpData); if (CPA_STATUS_SUCCESS != status) { rc = EIO; goto exit; } status = qat_ocf_cookie_dma_unload(crp, pOpData); if (CPA_STATUS_SUCCESS != status) { rc = EIO; goto exit; } /* Verify result */ if (CPA_STATUS_SUCCESS != result) { rc = EBADMSG; goto exit; } /* Verify digest by FW (GCM and CCM only) */ if (CPA_TRUE != verifyResult) { rc = EBADMSG; goto exit; } if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) qat_session = &qat_dsession->encSession; else qat_session = &qat_dsession->decSession; /* Copy back digest result if it's stored in separated buffer */ if (pOpData->digestResult && qat_session->authLen > 0) { if ((crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) != 0) { char icv[QAT_OCF_MAX_DIGEST] = { 0 }; crypto_copydata(crp, crp->crp_digest_start, qat_session->authLen, icv); if (timingsafe_bcmp(icv, qat_cookie->qat_ocf_digest, qat_session->authLen) != 0) { rc = EBADMSG; goto exit; } } else { crypto_copyback(crp, crp->crp_digest_start, qat_session->authLen, qat_cookie->qat_ocf_digest); } } exit: qat_ocf_cookie_free(qat_instance, qat_cookie); crp->crp_etype = rc; crypto_done(crp); return; } static inline CpaPhysicalAddr qatVirtToPhys(void *virtAddr) { return (CpaPhysicalAddr)vtophys(virtAddr); } static int qat_ocf_probesession(device_t dev, const struct crypto_session_params *csp) { if ((csp->csp_flags & ~(CSP_F_SEPARATE_OUTPUT | CSP_F_SEPARATE_AAD)) != 0) { return EINVAL; } switch (csp->csp_mode) { case CSP_MODE_CIPHER: switch (csp->csp_cipher_alg) { case CRYPTO_AES_CBC: case CRYPTO_AES_ICM: if (csp->csp_ivlen != AES_BLOCK_LEN) return EINVAL; break; case CRYPTO_AES_XTS: if (csp->csp_ivlen != AES_XTS_IV_LEN) return EINVAL; break; default: return EINVAL; } break; case CSP_MODE_DIGEST: switch (csp->csp_auth_alg) { case CRYPTO_SHA1: case CRYPTO_SHA1_HMAC: case CRYPTO_SHA2_256: case CRYPTO_SHA2_256_HMAC: case CRYPTO_SHA2_384: case CRYPTO_SHA2_384_HMAC: case CRYPTO_SHA2_512: case CRYPTO_SHA2_512_HMAC: break; case CRYPTO_AES_NIST_GMAC: if (csp->csp_ivlen != AES_GCM_IV_LEN) return EINVAL; break; default: return EINVAL; } break; case CSP_MODE_AEAD: switch (csp->csp_cipher_alg) { case CRYPTO_AES_NIST_GCM_16: if (csp->csp_ivlen != AES_GCM_IV_LEN) return EINVAL; break; default: return EINVAL; } break; case CSP_MODE_ETA: switch (csp->csp_auth_alg) { case CRYPTO_SHA1_HMAC: case CRYPTO_SHA2_256_HMAC: case CRYPTO_SHA2_384_HMAC: case CRYPTO_SHA2_512_HMAC: switch (csp->csp_cipher_alg) { case CRYPTO_AES_CBC: case CRYPTO_AES_ICM: if (csp->csp_ivlen != AES_BLOCK_LEN) return EINVAL; break; case CRYPTO_AES_XTS: if (csp->csp_ivlen != AES_XTS_IV_LEN) return EINVAL; break; default: return EINVAL; } break; default: return EINVAL; } break; default: return EINVAL; } return CRYPTODEV_PROBE_HARDWARE; } static CpaStatus qat_ocf_session_init(device_t dev, struct cryptop *crp, struct qat_ocf_instance *qat_instance, struct qat_ocf_session *qat_ssession) { CpaStatus status = CPA_STATUS_SUCCESS; /* Crytpodev structures */ crypto_session_t cses; const struct crypto_session_params *csp; /* DP API Session configuration */ CpaCySymSessionSetupData sessionSetupData = { 0 }; CpaCySymSessionCtx sessionCtx = NULL; Cpa32U sessionCtxSize = 0; cses = crp->crp_session; if (NULL == cses) { device_printf(dev, "no crypto session in cryptodev request\n"); return CPA_STATUS_FAIL; } csp = crypto_get_params(cses); if (NULL == csp) { device_printf(dev, "no session in cryptodev session\n"); return CPA_STATUS_FAIL; } /* Common fields */ sessionSetupData.sessionPriority = CPA_CY_PRIORITY_HIGH; /* Cipher key */ if (crp->crp_cipher_key) sessionSetupData.cipherSetupData.pCipherKey = crp->crp_cipher_key; else sessionSetupData.cipherSetupData.pCipherKey = csp->csp_cipher_key; sessionSetupData.cipherSetupData.cipherKeyLenInBytes = csp->csp_cipher_klen; /* Auth key */ if (crp->crp_auth_key) sessionSetupData.hashSetupData.authModeSetupData.authKey = crp->crp_auth_key; else sessionSetupData.hashSetupData.authModeSetupData.authKey = csp->csp_auth_key; sessionSetupData.hashSetupData.authModeSetupData.authKeyLenInBytes = csp->csp_auth_klen; qat_ssession->aadLen = crp->crp_aad_length; if (CPA_TRUE == is_sep_aad_supported(csp)) sessionSetupData.hashSetupData.authModeSetupData.aadLenInBytes = crp->crp_aad_length; else sessionSetupData.hashSetupData.authModeSetupData.aadLenInBytes = 0; /* Just setup algorithm - regardless of mode */ if (csp->csp_cipher_alg) { sessionSetupData.symOperation = CPA_CY_SYM_OP_CIPHER; switch (csp->csp_cipher_alg) { case CRYPTO_AES_CBC: sessionSetupData.cipherSetupData.cipherAlgorithm = CPA_CY_SYM_CIPHER_AES_CBC; break; case CRYPTO_AES_ICM: sessionSetupData.cipherSetupData.cipherAlgorithm = CPA_CY_SYM_CIPHER_AES_CTR; break; case CRYPTO_AES_XTS: sessionSetupData.cipherSetupData.cipherAlgorithm = CPA_CY_SYM_CIPHER_AES_XTS; break; case CRYPTO_AES_NIST_GCM_16: sessionSetupData.cipherSetupData.cipherAlgorithm = CPA_CY_SYM_CIPHER_AES_GCM; sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_AES_GCM; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; break; default: device_printf(dev, "cipher_alg: %d not supported\n", csp->csp_cipher_alg); status = CPA_STATUS_UNSUPPORTED; goto fail; } } if (csp->csp_auth_alg) { switch (csp->csp_auth_alg) { case CRYPTO_SHA1_HMAC: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; break; case CRYPTO_SHA1: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; break; case CRYPTO_SHA2_256_HMAC: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA256; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; break; case CRYPTO_SHA2_256: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA256; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; break; case CRYPTO_SHA2_224_HMAC: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA224; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; break; case CRYPTO_SHA2_224: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA224; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; break; case CRYPTO_SHA2_384_HMAC: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA384; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; break; case CRYPTO_SHA2_384: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA384; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; break; case CRYPTO_SHA2_512_HMAC: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA512; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; break; case CRYPTO_SHA2_512: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA512; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; break; case CRYPTO_AES_NIST_GMAC: sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_AES_GMAC; break; default: status = CPA_STATUS_UNSUPPORTED; goto fail; } } /* csp->csp_auth_alg */ /* Setting digest-length if no cipher-only mode is set */ if (csp->csp_mode != CSP_MODE_CIPHER) { lac_sym_qat_hash_defs_t *pHashDefsInfo = NULL; if (csp->csp_auth_mlen) { sessionSetupData.hashSetupData.digestResultLenInBytes = csp->csp_auth_mlen; qat_ssession->authLen = csp->csp_auth_mlen; } else { LacSymQat_HashDefsLookupGet( qat_instance->cyInstHandle, sessionSetupData.hashSetupData.hashAlgorithm, &pHashDefsInfo); if (NULL == pHashDefsInfo) { device_printf( dev, "unable to find corresponding hash data\n"); status = CPA_STATUS_UNSUPPORTED; goto fail; } sessionSetupData.hashSetupData.digestResultLenInBytes = pHashDefsInfo->algInfo->digestLength; qat_ssession->authLen = pHashDefsInfo->algInfo->digestLength; } sessionSetupData.verifyDigest = CPA_FALSE; } switch (csp->csp_mode) { case CSP_MODE_AEAD: case CSP_MODE_ETA: sessionSetupData.symOperation = CPA_CY_SYM_OP_ALGORITHM_CHAINING; /* Place the digest result in a buffer unrelated to srcBuffer */ sessionSetupData.digestIsAppended = CPA_FALSE; /* Due to FW limitation to verify only appended MACs */ sessionSetupData.verifyDigest = CPA_FALSE; if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) { sessionSetupData.cipherSetupData.cipherDirection = CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; sessionSetupData.algChainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH; } else { sessionSetupData.cipherSetupData.cipherDirection = CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT; sessionSetupData.algChainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER; } break; case CSP_MODE_CIPHER: if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) { sessionSetupData.cipherSetupData.cipherDirection = CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; } else { sessionSetupData.cipherSetupData.cipherDirection = CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT; } sessionSetupData.symOperation = CPA_CY_SYM_OP_CIPHER; break; case CSP_MODE_DIGEST: sessionSetupData.symOperation = CPA_CY_SYM_OP_HASH; if (csp->csp_auth_alg == CRYPTO_AES_NIST_GMAC) { sessionSetupData.symOperation = CPA_CY_SYM_OP_ALGORITHM_CHAINING; /* GMAC is always encrypt */ sessionSetupData.cipherSetupData.cipherDirection = CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; sessionSetupData.algChainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH; sessionSetupData.cipherSetupData.cipherAlgorithm = CPA_CY_SYM_CIPHER_AES_GCM; sessionSetupData.hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_AES_GMAC; sessionSetupData.hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; /* Same key for cipher and auth */ sessionSetupData.cipherSetupData.pCipherKey = csp->csp_auth_key; sessionSetupData.cipherSetupData.cipherKeyLenInBytes = csp->csp_auth_klen; /* Generated GMAC stored in separated buffer */ sessionSetupData.digestIsAppended = CPA_FALSE; /* Digest verification not allowed in GMAC case */ sessionSetupData.verifyDigest = CPA_FALSE; /* No AAD allowed */ sessionSetupData.hashSetupData.authModeSetupData .aadLenInBytes = 0; } else { sessionSetupData.cipherSetupData.cipherDirection = CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; sessionSetupData.symOperation = CPA_CY_SYM_OP_HASH; sessionSetupData.digestIsAppended = CPA_FALSE; } break; default: device_printf(dev, "%s: unhandled crypto algorithm %d, %d\n", __func__, csp->csp_cipher_alg, csp->csp_auth_alg); status = CPA_STATUS_FAIL; goto fail; } /* Extracting session size */ status = cpaCySymSessionCtxGetSize(qat_instance->cyInstHandle, &sessionSetupData, &sessionCtxSize); if (CPA_STATUS_SUCCESS != status) { device_printf(dev, "unable to get session size\n"); goto fail; } /* Allocating contiguous memory for session */ sessionCtx = contigmalloc(sessionCtxSize, M_QAT_OCF, M_NOWAIT, 0, ~1UL, 1 << (bsrl(sessionCtxSize - 1) + 1), 0); if (NULL == sessionCtx) { device_printf(dev, "unable to allocate memory for session\n"); status = CPA_STATUS_RESOURCE; goto fail; } status = cpaCySymDpInitSession(qat_instance->cyInstHandle, &sessionSetupData, sessionCtx); if (CPA_STATUS_SUCCESS != status) { device_printf(dev, "session initialization failed\n"); goto fail; } /* NOTE: lets keep double session (both directions) approach to overcome * lack of direction update in FBSD QAT. */ qat_ssession->sessionCtx = sessionCtx; qat_ssession->sessionCtxSize = sessionCtxSize; return CPA_STATUS_SUCCESS; fail: /* Release resources if any */ if (sessionCtx) contigfree(sessionCtx, sessionCtxSize, M_QAT_OCF); return status; } static int qat_ocf_newsession(device_t dev, crypto_session_t cses, const struct crypto_session_params *csp) { /* Cryptodev QAT structures */ struct qat_ocf_softc *qat_softc; struct qat_ocf_dsession *qat_dsession; struct qat_ocf_instance *qat_instance; u_int cpu_id = PCPU_GET(cpuid); /* Create cryptodev session */ qat_softc = device_get_softc(dev); - qat_instance = - &qat_softc->cyInstHandles[cpu_id % qat_softc->numCyInstances]; - qat_dsession = crypto_get_driver_session(cses); - if (NULL == qat_dsession) { - device_printf(dev, "Unable to create new session\n"); - return (EINVAL); - } + if (qat_softc->numCyInstances > 0) { + qat_instance = + &qat_softc + ->cyInstHandles[cpu_id % qat_softc->numCyInstances]; + qat_dsession = crypto_get_driver_session(cses); + if (NULL == qat_dsession) { + device_printf(dev, "Unable to create new session\n"); + return (EINVAL); + } - /* Add only instance at this point remaining operations moved to - * lazy session init */ - qat_dsession->qatInstance = qat_instance; + /* Add only instance at this point remaining operations moved to + * lazy session init */ + qat_dsession->qatInstance = qat_instance; + } else { + return ENXIO; + } return 0; } static CpaStatus qat_ocf_remove_session(device_t dev, CpaInstanceHandle cyInstHandle, struct qat_ocf_session *qat_session) { CpaStatus status = CPA_STATUS_SUCCESS; if (NULL == qat_session->sessionCtx) return CPA_STATUS_SUCCESS; /* User callback is executed right before decrementing pending * callback atomic counter. To avoid removing session rejection * we have to wait a very short while for counter update * after call back execution. */ status = qat_ocf_wait_for_session(qat_session->sessionCtx, QAT_OCF_SESSION_WAIT_TIMEOUT_MS); if (CPA_STATUS_SUCCESS != status) { device_printf(dev, "waiting for session un-busy failed\n"); return CPA_STATUS_FAIL; } status = cpaCySymDpRemoveSession(cyInstHandle, qat_session->sessionCtx); if (CPA_STATUS_SUCCESS != status) { device_printf(dev, "error while removing session\n"); return CPA_STATUS_FAIL; } explicit_bzero(qat_session->sessionCtx, qat_session->sessionCtxSize); contigfree(qat_session->sessionCtx, qat_session->sessionCtxSize, M_QAT_OCF); qat_session->sessionCtx = NULL; qat_session->sessionCtxSize = 0; return CPA_STATUS_SUCCESS; } static void qat_ocf_freesession(device_t dev, crypto_session_t cses) { CpaStatus status = CPA_STATUS_SUCCESS; struct qat_ocf_dsession *qat_dsession = NULL; struct qat_ocf_instance *qat_instance = NULL; qat_dsession = crypto_get_driver_session(cses); qat_instance = qat_dsession->qatInstance; mtx_lock(&qat_instance->cyInstMtx); status = qat_ocf_remove_session(dev, qat_dsession->qatInstance->cyInstHandle, &qat_dsession->encSession); if (CPA_STATUS_SUCCESS != status) device_printf(dev, "unable to remove encrypt session\n"); status = qat_ocf_remove_session(dev, qat_dsession->qatInstance->cyInstHandle, &qat_dsession->decSession); if (CPA_STATUS_SUCCESS != status) device_printf(dev, "unable to remove decrypt session\n"); mtx_unlock(&qat_instance->cyInstMtx); } /* QAT GCM/CCM FW API are only algorithms which support separated AAD. */ static CpaStatus qat_ocf_load_aad_gcm(struct cryptop *crp, struct qat_ocf_cookie *qat_cookie) { CpaCySymDpOpData *pOpData; pOpData = &qat_cookie->pOpdata; if (NULL != crp->crp_aad) memcpy(qat_cookie->qat_ocf_gcm_aad, crp->crp_aad, crp->crp_aad_length); else crypto_copydata(crp, crp->crp_aad_start, crp->crp_aad_length, qat_cookie->qat_ocf_gcm_aad); pOpData->pAdditionalAuthData = qat_cookie->qat_ocf_gcm_aad; pOpData->additionalAuthData = qat_cookie->qat_ocf_gcm_aad_paddr; return CPA_STATUS_SUCCESS; } static CpaStatus qat_ocf_load_aad(struct cryptop *crp, struct qat_ocf_cookie *qat_cookie) { CpaStatus status = CPA_STATUS_SUCCESS; const struct crypto_session_params *csp; CpaCySymDpOpData *pOpData; struct qat_ocf_load_cb_arg args; pOpData = &qat_cookie->pOpdata; pOpData->pAdditionalAuthData = NULL; pOpData->additionalAuthData = 0UL; if (crp->crp_aad_length == 0) return CPA_STATUS_SUCCESS; if (crp->crp_aad_length > ICP_QAT_FW_CCM_GCM_AAD_SZ_MAX) return CPA_STATUS_FAIL; csp = crypto_get_params(crp->crp_session); /* Handle GCM/CCM case */ if (CPA_TRUE == is_sep_aad_supported(csp)) return qat_ocf_load_aad_gcm(crp, qat_cookie); if (NULL == crp->crp_aad) { /* AAD already embedded in source buffer */ pOpData->messageLenToCipherInBytes = crp->crp_payload_length; pOpData->cryptoStartSrcOffsetInBytes = crp->crp_payload_start; pOpData->messageLenToHashInBytes = crp->crp_aad_length + crp->crp_payload_length; pOpData->hashStartSrcOffsetInBytes = crp->crp_aad_start; return CPA_STATUS_SUCCESS; } /* Separated AAD not supported by QAT - lets place the content * of ADD buffer at the very beginning of source SGL */ args.crp_op = crp; args.qat_cookie = qat_cookie; args.pOpData = pOpData; args.error = 0; status = bus_dmamap_load(qat_cookie->gcm_aad_dma_mem.dma_tag, qat_cookie->gcm_aad_dma_mem.dma_map, crp->crp_aad, crp->crp_aad_length, qat_ocf_crypto_load_aadbuf_cb, &args, BUS_DMA_NOWAIT); qat_cookie->is_sep_aad_used = CPA_TRUE; /* Right after this step we have AAD placed in the first flat buffer * in source SGL */ pOpData->messageLenToCipherInBytes = crp->crp_payload_length; pOpData->cryptoStartSrcOffsetInBytes = crp->crp_aad_length + crp->crp_aad_start + crp->crp_payload_start; pOpData->messageLenToHashInBytes = crp->crp_aad_length + crp->crp_payload_length; pOpData->hashStartSrcOffsetInBytes = crp->crp_aad_start; return status; } static CpaStatus qat_ocf_load(struct cryptop *crp, struct qat_ocf_cookie *qat_cookie) { CpaStatus status = CPA_STATUS_SUCCESS; CpaCySymDpOpData *pOpData; struct qat_ocf_load_cb_arg args; /* cryptodev internals */ const struct crypto_session_params *csp; pOpData = &qat_cookie->pOpdata; csp = crypto_get_params(crp->crp_session); /* Load IV buffer if present */ if (csp->csp_ivlen > 0) { memset(qat_cookie->qat_ocf_iv_buf, 0, sizeof(qat_cookie->qat_ocf_iv_buf)); crypto_read_iv(crp, qat_cookie->qat_ocf_iv_buf); pOpData->iv = qat_cookie->qat_ocf_iv_buf_paddr; pOpData->pIv = qat_cookie->qat_ocf_iv_buf; pOpData->ivLenInBytes = csp->csp_ivlen; } /* GCM/CCM - load AAD to separated buffer * AES+SHA - load AAD to first flat in SGL */ status = qat_ocf_load_aad(crp, qat_cookie); if (CPA_STATUS_SUCCESS != status) goto fail; /* Load source buffer */ args.crp_op = crp; args.qat_cookie = qat_cookie; args.pOpData = pOpData; args.error = 0; status = bus_dmamap_load_crp_buffer(qat_cookie->src_dma_mem.dma_tag, qat_cookie->src_dma_mem.dma_map, &crp->crp_buf, qat_ocf_crypto_load_buf_cb, &args, BUS_DMA_NOWAIT); if (CPA_STATUS_SUCCESS != status) goto fail; pOpData->srcBuffer = qat_cookie->src_buffer_list_paddr; pOpData->srcBufferLen = CPA_DP_BUFLIST; /* Load destination buffer */ if (CRYPTO_HAS_OUTPUT_BUFFER(crp)) { status = bus_dmamap_load_crp_buffer(qat_cookie->dst_dma_mem.dma_tag, qat_cookie->dst_dma_mem.dma_map, &crp->crp_obuf, qat_ocf_crypto_load_obuf_cb, &args, BUS_DMA_NOWAIT); if (CPA_STATUS_SUCCESS != status) goto fail; pOpData->dstBuffer = qat_cookie->dst_buffer_list_paddr; pOpData->dstBufferLen = CPA_DP_BUFLIST; } else { pOpData->dstBuffer = pOpData->srcBuffer; pOpData->dstBufferLen = pOpData->srcBufferLen; } if (CPA_TRUE == is_use_sep_digest(csp)) pOpData->digestResult = qat_cookie->qat_ocf_digest_paddr; else pOpData->digestResult = 0UL; /* GMAC - aka zero length buffer */ if (CPA_TRUE == is_gmac_exception(csp)) pOpData->messageLenToCipherInBytes = 0; fail: return status; } static int qat_ocf_check_input(device_t dev, struct cryptop *crp) { const struct crypto_session_params *csp; csp = crypto_get_params(crp->crp_session); if (crypto_buffer_len(&crp->crp_buf) > QAT_OCF_MAX_LEN) return E2BIG; if (CPA_TRUE == is_sep_aad_supported(csp) && (crp->crp_aad_length > ICP_QAT_FW_CCM_GCM_AAD_SZ_MAX)) return EBADMSG; return 0; } static int qat_ocf_process(device_t dev, struct cryptop *crp, int hint) { CpaStatus status = CPA_STATUS_SUCCESS; int rc = 0; struct qat_ocf_dsession *qat_dsession = NULL; struct qat_ocf_session *qat_session = NULL; struct qat_ocf_instance *qat_instance = NULL; CpaCySymDpOpData *pOpData = NULL; struct qat_ocf_cookie *qat_cookie = NULL; CpaBoolean memLoaded = CPA_FALSE; rc = qat_ocf_check_input(dev, crp); if (rc) goto fail; qat_dsession = crypto_get_driver_session(crp->crp_session); if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) qat_session = &qat_dsession->encSession; else qat_session = &qat_dsession->decSession; qat_instance = qat_dsession->qatInstance; status = qat_ocf_cookie_alloc(qat_instance, &qat_cookie); if (CPA_STATUS_SUCCESS != status) { rc = EAGAIN; goto fail; } qat_cookie->crp_op = crp; /* Common request fields */ pOpData = &qat_cookie->pOpdata; pOpData->instanceHandle = qat_instance->cyInstHandle; pOpData->sessionCtx = NULL; /* Cipher fields */ pOpData->cryptoStartSrcOffsetInBytes = crp->crp_payload_start; pOpData->messageLenToCipherInBytes = crp->crp_payload_length; /* Digest fields - any exceptions from this basic rules are covered * in qat_ocf_load */ pOpData->hashStartSrcOffsetInBytes = crp->crp_payload_start; pOpData->messageLenToHashInBytes = crp->crp_payload_length; status = qat_ocf_load(crp, qat_cookie); if (CPA_STATUS_SUCCESS != status) { device_printf(dev, "unable to load OCF buffers to QAT DMA " "transaction\n"); rc = EIO; goto fail; } memLoaded = CPA_TRUE; status = qat_ocf_cookie_dma_pre_sync(crp, pOpData); if (CPA_STATUS_SUCCESS != status) { device_printf(dev, "unable to sync DMA buffers\n"); rc = EIO; goto fail; } mtx_lock(&qat_instance->cyInstMtx); /* Session initialization at the first request. It's done * in such way to overcome missing QAT specific session data * such like AAD length and limited possibility to update * QAT session while handling traffic. */ if (NULL == qat_session->sessionCtx) { status = qat_ocf_session_init(dev, crp, qat_instance, qat_session); if (CPA_STATUS_SUCCESS != status) { mtx_unlock(&qat_instance->cyInstMtx); device_printf(dev, "unable to init session\n"); rc = EIO; goto fail; } } else { status = qat_ocf_handle_session_update(qat_dsession, crp); if (CPA_STATUS_RESOURCE == status) { mtx_unlock(&qat_instance->cyInstMtx); rc = EAGAIN; goto fail; } else if (CPA_STATUS_SUCCESS != status) { mtx_unlock(&qat_instance->cyInstMtx); rc = EIO; goto fail; } } pOpData->sessionCtx = qat_session->sessionCtx; status = cpaCySymDpEnqueueOp(pOpData, CPA_TRUE); mtx_unlock(&qat_instance->cyInstMtx); if (CPA_STATUS_SUCCESS != status) { if (CPA_STATUS_RETRY == status) { rc = EAGAIN; goto fail; } device_printf(dev, "unable to send request. Status: %d\n", status); rc = EIO; goto fail; } return 0; fail: if (qat_cookie) { if (memLoaded) qat_ocf_cookie_dma_unload(crp, pOpData); qat_ocf_cookie_free(qat_instance, qat_cookie); } crp->crp_etype = rc; crypto_done(crp); return 0; } static void qat_ocf_identify(driver_t *drv, device_t parent) { if (device_find_child(parent, "qat_ocf", -1) == NULL && BUS_ADD_CHILD(parent, 200, "qat_ocf", -1) == 0) device_printf(parent, "qat_ocf: could not attach!"); } static int qat_ocf_probe(device_t dev) { device_set_desc(dev, "QAT engine"); return (BUS_PROBE_NOWILDCARD); } static CpaStatus qat_ocf_get_irq_instances(CpaInstanceHandle *cyInstHandles, Cpa16U cyInstHandlesSize, Cpa16U *foundInstances) { CpaStatus status = CPA_STATUS_SUCCESS; icp_accel_dev_t **pAdfInsts = NULL; icp_accel_dev_t *dev_addr = NULL; sal_t *baseAddr = NULL; sal_list_t *listTemp = NULL; CpaInstanceHandle cyInstHandle; CpaInstanceInfo2 info; Cpa16U numDevices; Cpa32U instCtr = 0; Cpa32U i; /* Get the number of devices */ status = icp_amgr_getNumInstances(&numDevices); if (CPA_STATUS_SUCCESS != status) return status; /* Allocate memory to store addr of accel_devs */ pAdfInsts = malloc(numDevices * sizeof(icp_accel_dev_t *), M_QAT_OCF, M_WAITOK); /* Get ADF to return all accel_devs that support either * symmetric or asymmetric crypto */ status = icp_amgr_getAllAccelDevByCapabilities( (ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC), pAdfInsts, &numDevices); if (CPA_STATUS_SUCCESS != status) { free(pAdfInsts, M_QAT_OCF); return status; } for (i = 0; i < numDevices; i++) { dev_addr = (icp_accel_dev_t *)pAdfInsts[i]; baseAddr = dev_addr->pSalHandle; if (NULL == baseAddr) continue; listTemp = baseAddr->sym_services; + if (NULL == listTemp) { + listTemp = baseAddr->crypto_services; + } + while (NULL != listTemp) { cyInstHandle = SalList_getObject(listTemp); status = cpaCyInstanceGetInfo2(cyInstHandle, &info); if (CPA_STATUS_SUCCESS != status) continue; listTemp = SalList_next(listTemp); if (CPA_TRUE == info.isPolled) continue; if (instCtr >= cyInstHandlesSize) break; cyInstHandles[instCtr++] = cyInstHandle; } } free(pAdfInsts, M_QAT_OCF); *foundInstances = instCtr; return CPA_STATUS_SUCCESS; } static CpaStatus qat_ocf_start_instances(struct qat_ocf_softc *qat_softc, device_t dev) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa16U numInstances = 0; CpaInstanceHandle cyInstHandles[QAT_OCF_MAX_INSTANCES] = { 0 }; CpaInstanceHandle cyInstHandle = NULL; Cpa32U startedInstances = 0; Cpa32U i; qat_softc->numCyInstances = 0; status = qat_ocf_get_irq_instances(cyInstHandles, QAT_OCF_MAX_INSTANCES, &numInstances); if (CPA_STATUS_SUCCESS != status) return status; - if (0 == numInstances) - return CPA_STATUS_RESOURCE; for (i = 0; i < numInstances; i++) { struct qat_ocf_instance *qat_ocf_instance; cyInstHandle = cyInstHandles[i]; if (!cyInstHandle) continue; /* Starting instance */ status = cpaCyStartInstance(cyInstHandle); if (CPA_STATUS_SUCCESS != status) { device_printf(qat_softc->sc_dev, "unable to get start instance\n"); continue; } + qat_ocf_instance = &qat_softc->cyInstHandles[startedInstances]; + qat_ocf_instance->cyInstHandle = cyInstHandle; + mtx_init(&qat_ocf_instance->cyInstMtx, + "Instance MTX", + NULL, + MTX_DEF); + status = cpaCySetAddressTranslation(cyInstHandle, qatVirtToPhys); if (CPA_STATUS_SUCCESS != status) { device_printf(qat_softc->sc_dev, - "unable to add virt to phys callback"); + "unable to add virt to phys callback\n"); goto fail; } status = cpaCySymDpRegCbFunc(cyInstHandle, symDpCallback); if (CPA_STATUS_SUCCESS != status) { device_printf(qat_softc->sc_dev, "unable to add user callback\n"); goto fail; } - qat_ocf_instance = &qat_softc->cyInstHandles[startedInstances]; - qat_ocf_instance->cyInstHandle = cyInstHandle; - mtx_init(&qat_ocf_instance->cyInstMtx, - "Instance MTX", - NULL, - MTX_DEF); - /* Initialize cookie pool */ status = qat_ocf_cookie_pool_init(qat_ocf_instance, dev); if (CPA_STATUS_SUCCESS != status) { device_printf(qat_softc->sc_dev, "unable to create cookie pool\n"); goto fail; } /* Disable forcing HW MAC validation for AEAD */ status = icp_sal_setForceAEADMACVerify(cyInstHandle, CPA_FALSE); if (CPA_STATUS_SUCCESS != status) { device_printf( qat_softc->sc_dev, "unable to disable AEAD HW MAC verification\n"); goto fail; } qat_ocf_instance->driver_id = qat_softc->cryptodev_id; startedInstances++; continue; fail: + mtx_destroy(&qat_ocf_instance->cyInstMtx); + /* Stop instance */ status = cpaCyStopInstance(cyInstHandle); if (CPA_STATUS_SUCCESS != status) device_printf(qat_softc->sc_dev, "unable to stop the instance\n"); - continue; } qat_softc->numCyInstances = startedInstances; - /* Success if at least one instance has been set */ - if (!qat_softc->numCyInstances) - return CPA_STATUS_FAIL; - return CPA_STATUS_SUCCESS; } static CpaStatus qat_ocf_stop_instances(struct qat_ocf_softc *qat_softc) { CpaStatus status = CPA_STATUS_SUCCESS; int i; for (i = 0; i < qat_softc->numCyInstances; i++) { struct qat_ocf_instance *qat_instance; qat_instance = &qat_softc->cyInstHandles[i]; status = cpaCyStopInstance(qat_instance->cyInstHandle); if (CPA_STATUS_SUCCESS != status) { pr_err("QAT: stopping instance id: %d failed\n", i); - mtx_unlock(&qat_instance->cyInstMtx); continue; } qat_ocf_cookie_pool_deinit(qat_instance); mtx_destroy(&qat_instance->cyInstMtx); } + qat_softc->numCyInstances = 0; + return status; } static int -qat_ocf_attach(device_t dev) +qat_ocf_deinit(struct qat_ocf_softc *qat_softc) { - int status; - struct qat_ocf_softc *qat_softc; - int32_t cryptodev_id; + int status = 0; + CpaStatus cpaStatus; - qat_softc = device_get_softc(dev); - qat_softc->sc_dev = dev; + if (qat_softc->cryptodev_id >= 0) { + crypto_unregister_all(qat_softc->cryptodev_id); + qat_softc->cryptodev_id = -1; + } - cryptodev_id = crypto_get_driverid(dev, - sizeof(struct qat_ocf_dsession), - CRYPTOCAP_F_HARDWARE); - if (cryptodev_id < 0) { - device_printf(dev, "cannot initialize!\n"); - goto fail; + /* Stop QAT instances */ + cpaStatus = qat_ocf_stop_instances(qat_softc); + if (CPA_STATUS_SUCCESS != cpaStatus) { + device_printf(qat_softc->sc_dev, "unable to stop instances\n"); + status = EIO; } - qat_softc->cryptodev_id = cryptodev_id; + + return status; +} + +static int +qat_ocf_init(struct qat_ocf_softc *qat_softc) +{ + int32_t cryptodev_id; /* Starting instances for OCF */ - status = qat_ocf_start_instances(qat_softc, dev); - if (status) { - device_printf(dev, "no QAT IRQ instances available\n"); + if (qat_ocf_start_instances(qat_softc, qat_softc->sc_dev)) { + device_printf(qat_softc->sc_dev, + "unable to get QAT IRQ instances\n"); goto fail; } + /* Register only if instances available */ + if (qat_softc->numCyInstances) { + cryptodev_id = + crypto_get_driverid(qat_softc->sc_dev, + sizeof(struct qat_ocf_dsession), + CRYPTOCAP_F_HARDWARE); + if (cryptodev_id < 0) { + device_printf(qat_softc->sc_dev, + "cannot initialize!\n"); + goto fail; + } + qat_softc->cryptodev_id = cryptodev_id; + } + return 0; fail: - qat_ocf_detach(dev); + qat_ocf_deinit(qat_softc); - return (ENXIO); + return ENXIO; } -static int -qat_ocf_detach(device_t dev) +static int qat_ocf_sysctl_handle(SYSCTL_HANDLER_ARGS) { struct qat_ocf_softc *qat_softc = NULL; - CpaStatus cpaStatus; - int status = 0; + int ret = 0; + device_t dev = arg1; + u_int enabled; qat_softc = device_get_softc(dev); + enabled = qat_softc->enabled; - if (qat_softc->cryptodev_id >= 0) { - status = crypto_unregister_all(qat_softc->cryptodev_id); - if (status) - device_printf(dev, - "unable to unregister QAt backend\n"); + ret = sysctl_handle_int(oidp, &enabled, 0, req); + if (ret || !req->newptr) + return (ret); + + if (qat_softc->enabled != enabled) { + if (enabled) { + ret = qat_ocf_init(qat_softc); + + } else { + ret = qat_ocf_deinit(qat_softc); + } + + if (!ret) + qat_softc->enabled = enabled; } - /* Stop QAT instances */ - cpaStatus = qat_ocf_stop_instances(qat_softc); - if (CPA_STATUS_SUCCESS != cpaStatus) { - device_printf(dev, "unable to stop instances\n"); - status = EIO; + return ret; +} + +static int +qat_ocf_attach(device_t dev) +{ + int status; + struct qat_ocf_softc *qat_softc; + + qat_softc = device_get_softc(dev); + qat_softc->sc_dev = dev; + qat_softc->cryptodev_id = -1; + qat_softc->enabled = 1; + + qat_softc->rc = + SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), + OID_AUTO, + "enable", + CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + dev, + 0, + qat_ocf_sysctl_handle, + "I", + "QAT OCF support enablement"); + + if (!qat_softc->rc) + return ENOMEM; + if (qat_softc->enabled) { + status = qat_ocf_init(qat_softc); + if (status) { + device_printf(dev, "qat_ocf init failed\n"); + goto fail; + } } - return status; + return 0; +fail: + qat_ocf_deinit(qat_softc); + + return (ENXIO); +} + +static int +qat_ocf_detach(device_t dev) +{ + struct qat_ocf_softc *qat_softc = device_get_softc(dev); + + return qat_ocf_deinit(qat_softc); } static device_method_t qat_ocf_methods[] = { DEVMETHOD(device_identify, qat_ocf_identify), DEVMETHOD(device_probe, qat_ocf_probe), DEVMETHOD(device_attach, qat_ocf_attach), DEVMETHOD(device_detach, qat_ocf_detach), /* Cryptodev interface */ DEVMETHOD(cryptodev_probesession, qat_ocf_probesession), DEVMETHOD(cryptodev_newsession, qat_ocf_newsession), DEVMETHOD(cryptodev_freesession, qat_ocf_freesession), DEVMETHOD(cryptodev_process, qat_ocf_process), DEVMETHOD_END }; static driver_t qat_ocf_driver = { .name = "qat_ocf", .methods = qat_ocf_methods, .size = sizeof(struct qat_ocf_softc), }; DRIVER_MODULE_ORDERED(qat, nexus, qat_ocf_driver, NULL, NULL, SI_ORDER_ANY); MODULE_VERSION(qat, 1); MODULE_DEPEND(qat, qat_c62x, 1, 1, 1); MODULE_DEPEND(qat, qat_200xx, 1, 1, 1); MODULE_DEPEND(qat, qat_c3xxx, 1, 1, 1); MODULE_DEPEND(qat, qat_c4xxx, 1, 1, 1); MODULE_DEPEND(qat, qat_dh895xcc, 1, 1, 1); MODULE_DEPEND(qat, qat_4xxx, 1, 1, 1); MODULE_DEPEND(qat, crypto, 1, 1, 1); MODULE_DEPEND(qat, qat_common, 1, 1, 1); MODULE_DEPEND(qat, qat_api, 1, 1, 1); MODULE_DEPEND(qat, linuxkpi, 1, 1, 1); diff --git a/sys/dev/qat/qat_api/common/compression/dc_buffers.c b/sys/dev/qat/qat_api/common/compression/dc_buffers.c index 4f4e836ccf8f..efdc2de54197 100644 --- a/sys/dev/qat/qat_api/common/compression/dc_buffers.c +++ b/sys/dev/qat/qat_api/common/compression/dc_buffers.c @@ -1,174 +1,190 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file dc_buffers.c * * @defgroup Dc_DataCompression DC Data Compression * * @ingroup Dc_DataCompression * * @description * Implementation of the buffer management operations for * Data Compression service. * *****************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ #include "cpa.h" #include "cpa_dc.h" #include "cpa_dc_bp.h" #include "sal_types_compression.h" #include "icp_qat_fw_comp.h" #include "sal_hw_gen.h" #define CPA_DC_CEIL_DIV(x, y) (((x) + (y)-1) / (y)) #define DC_DEST_BUFF_EXTRA_DEFLATE_GEN2 (55) #define DC_DEST_BUFF_EXTRA_DEFLATE_GEN4_STATIC (1029) #define DC_DEST_BUFF_EXTRA_DEFLATE_GEN4_DYN (512) #define DC_DEST_BUFF_MIN_EXTRA_BYTES(x) ((x < 8) ? (8 - x) : 0) #define DC_BUF_MAX_SIZE (0xFFFFFFFF) CpaStatus cpaDcBufferListGetMetaSize(const CpaInstanceHandle instanceHandle, Cpa32U numBuffers, Cpa32U *pSizeInBytes) { CpaInstanceHandle insHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle) { insHandle = dcGetFirstHandle(); } else { insHandle = instanceHandle; } LAC_CHECK_INSTANCE_HANDLE(insHandle); LAC_CHECK_NULL_PARAM(pSizeInBytes); /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); if (0 == numBuffers) { QAT_UTILS_LOG("Number of buffers is 0.\n"); return CPA_STATUS_INVALID_PARAM; } *pSizeInBytes = (sizeof(icp_buffer_list_desc_t) + (sizeof(icp_flat_buffer_desc_t) * (numBuffers + 1)) + ICP_DESCRIPTOR_ALIGNMENT_BYTES); return CPA_STATUS_SUCCESS; } CpaStatus cpaDcBnpBufferListGetMetaSize(const CpaInstanceHandle instanceHandle, Cpa32U numJobs, Cpa32U *pSizeInBytes) { return CPA_STATUS_UNSUPPORTED; } static inline CpaStatus dcDeflateBoundGen2(CpaDcHuffType huffType, Cpa32U inputSize, Cpa32U *outputSize) { Cpa64U inBufferSize = inputSize; Cpa64U outBufferSize = 0; /* Formula for GEN2 deflate: * ceil(9 * Total input bytes / 8) + 55 bytes. * 55 bytes is the skid pad value for GEN2 devices. * Adding extra bytes = `DC_DEST_BUFF_MIN_EXTRA_BYTES(inputSize)` * when calculated value from `CPA_DC_CEIL_DIV(9 * inputSize, 8) + * DC_DEST_BUFF_EXTRA_DEFLATE_GEN2` is less than 64 bytes to * achieve a safer output buffer size of 64 bytes. */ outBufferSize = CPA_DC_CEIL_DIV(9 * inBufferSize, 8) + DC_DEST_BUFF_EXTRA_DEFLATE_GEN2 + DC_DEST_BUFF_MIN_EXTRA_BYTES(inputSize); if (outBufferSize > DC_BUF_MAX_SIZE) *outputSize = DC_BUF_MAX_SIZE; else *outputSize = (Cpa32U)outBufferSize; return CPA_STATUS_SUCCESS; } static inline CpaStatus dcDeflateBoundGen4(CpaDcHuffType huffType, Cpa32U inputSize, Cpa32U *outputSize) { Cpa64U outputSizeLong; Cpa64U inputSizeLong = (Cpa64U)inputSize; switch (huffType) { case CPA_DC_HT_STATIC: /* Formula for GEN4 static deflate: * ceil((9*sourceLen)/8) + 5 + 1024. */ outputSizeLong = CPA_DC_CEIL_DIV(9 * inputSizeLong, 8) + DC_DEST_BUFF_EXTRA_DEFLATE_GEN4_STATIC; break; case CPA_DC_HT_FULL_DYNAMIC: /* Formula for GEN4 dynamic deflate: * Ceil ((9*sourceLen)/8)â–’| + * ((((8/7) * sourceLen)/ 16KB) * (150+5)) + 512 */ outputSizeLong = DC_DEST_BUFF_EXTRA_DEFLATE_GEN4_DYN; outputSizeLong += CPA_DC_CEIL_DIV(9 * inputSizeLong, 8); outputSizeLong += ((8 * inputSizeLong * 155) / 7) / (16 * 1024); break; default: return CPA_STATUS_INVALID_PARAM; } /* Avoid output size overflow */ if (outputSizeLong & 0xffffffff00000000UL) return CPA_STATUS_INVALID_PARAM; *outputSize = (Cpa32U)outputSizeLong; return CPA_STATUS_SUCCESS; } CpaStatus cpaDcDeflateCompressBound(const CpaInstanceHandle dcInstance, CpaDcHuffType huffType, Cpa32U inputSize, Cpa32U *outputSize) { sal_compression_service_t *pService = NULL; CpaInstanceHandle insHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } LAC_CHECK_INSTANCE_HANDLE(insHandle); LAC_CHECK_NULL_PARAM(outputSize); /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); if (!inputSize) { QAT_UTILS_LOG( "The input size needs to be greater than zero.\n"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_DC_HT_STATIC != huffType) && (CPA_DC_HT_FULL_DYNAMIC != huffType)) { QAT_UTILS_LOG("Invalid huffType value.\n"); return CPA_STATUS_INVALID_PARAM; } pService = (sal_compression_service_t *)insHandle; if (isDcGen4x(pService)) { return dcDeflateBoundGen4(huffType, inputSize, outputSize); } else { return dcDeflateBoundGen2(huffType, inputSize, outputSize); } } + +CpaStatus +cpaDcLZ4CompressBound(const CpaInstanceHandle dcInstance, + Cpa32U inputSize, + Cpa32U *outputSize) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcLZ4SCompressBound(const CpaInstanceHandle dcInstance, + Cpa32U inputSize, + Cpa32U *outputSize) +{ + return CPA_STATUS_UNSUPPORTED; +} diff --git a/sys/dev/qat/qat_api/common/compression/dc_chain.c b/sys/dev/qat/qat_api/common/compression/dc_chain.c new file mode 100644 index 000000000000..6d7322720320 --- /dev/null +++ b/sys/dev/qat/qat_api/common/compression/dc_chain.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ + +/** + ***************************************************************************** + * @file dc_chain.c + * + * @ingroup Dc_Chaining + * + * @description + * Implementation of the chaining session operations. + * + *****************************************************************************/ + +/* + ******************************************************************************* + * Include public/global header files + ******************************************************************************* + */ +#include "cpa.h" + +#include "icp_qat_fw.h" +#include "icp_qat_fw_comp.h" +#include "icp_qat_hw.h" + +/* + ******************************************************************************* + * Include private header files + ******************************************************************************* + */ +#include "sal_types_compression.h" +#include "cpa_dc_chain.h" +#include "lac_session.h" +#include "dc_session.h" +#include "dc_datapath.h" +#include "dc_stats.h" +#include "lac_mem_pools.h" +#include "lac_log.h" +#include "sal_types_compression.h" +#include "lac_buffer_desc.h" +#include "sal_service_state.h" +#include "sal_qat_cmn_msg.h" +#include "lac_sym_qat_hash_defs_lookup.h" +#include "sal_string_parse.h" +#include "lac_sym.h" +#include "lac_session.h" +#include "lac_sym_qat.h" +#include "lac_sym_hash.h" +#include "lac_sym_alg_chain.h" +#include "lac_sym_auth_enc.h" + +CpaStatus +cpaDcChainGetSessionSize(CpaInstanceHandle dcInstance, + CpaDcChainOperations operation, + Cpa8U numSessions, + CpaDcChainSessionSetupData *pSessionData, + Cpa32U *pSessionSize) + +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcChainInitSession(CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle, + CpaDcChainOperations operation, + Cpa8U numSessions, + CpaDcChainSessionSetupData *pSessionData, + CpaDcCallbackFn callbackFn) + +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcChainRemoveSession(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcChainResetSession(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcChainPerformOp(CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle, + CpaBufferList *pSrcBuff, + CpaBufferList *pDestBuff, + CpaDcChainOperations operation, + Cpa8U numOpDatas, + CpaDcChainOpData *pChainOpData, + CpaDcChainRqResults *pResults, + void *callbackTag) +{ + return CPA_STATUS_UNSUPPORTED; +} diff --git a/sys/dev/qat/qat_api/common/compression/dc_datapath.c b/sys/dev/qat/qat_api/common/compression/dc_datapath.c index 526954e15227..880931e30ebb 100644 --- a/sys/dev/qat/qat_api/common/compression/dc_datapath.c +++ b/sys/dev/qat/qat_api/common/compression/dc_datapath.c @@ -1,1980 +1,1986 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file dc_datapath.c * * @defgroup Dc_DataCompression DC Data Compression * * @ingroup Dc_DataCompression * * @description * Implementation of the Data Compression datapath operations. * *****************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ #include "cpa.h" #include "cpa_dc.h" #include "cpa_dc_dp.h" /* ******************************************************************************* * Include private header files ******************************************************************************* */ #include "dc_session.h" #include "dc_datapath.h" #include "sal_statistics.h" #include "lac_common.h" #include "lac_mem.h" #include "lac_mem_pools.h" #include "sal_types_compression.h" #include "dc_stats.h" #include "lac_buffer_desc.h" #include "lac_sal.h" #include "lac_log.h" #include "lac_sync.h" #include "sal_service_state.h" #include "sal_qat_cmn_msg.h" #include "sal_hw_gen.h" #include "dc_error_counter.h" #define DC_COMP_MAX_BUFF_SIZE (1024 * 64) static QatUtilsAtomic dcErrorCount[MAX_DC_ERROR_TYPE]; void dcErrorLog(CpaDcReqStatus dcError) { Cpa32U absError = 0; absError = abs(dcError); if ((dcError < CPA_DC_OK) && (absError < MAX_DC_ERROR_TYPE)) { qatUtilsAtomicInc(&(dcErrorCount[absError])); } } Cpa64U getDcErrorCounter(CpaDcReqStatus dcError) { Cpa32U absError = 0; absError = abs(dcError); if (!(dcError >= CPA_DC_OK || dcError < CPA_DC_EMPTY_DYM_BLK)) { return (Cpa64U)qatUtilsAtomicGet(&dcErrorCount[absError]); } return 0; } static inline void dcUpdateXltOverflowChecksumsGen4(const dc_compression_cookie_t *pCookie, const icp_qat_fw_resp_comp_pars_t *pRespPars, CpaDcRqResults *pDcResults) { dc_session_desc_t *pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pCookie->pSessionHandle); /* Recompute CRC checksum when either the checksum type * is CPA_DC_CRC32 or when the integrity CRCs are enabled. */ if (CPA_DC_CRC32 == pSessionDesc->checksumType) { pDcResults->checksum = pRespPars->crc.legacy.curr_crc32; /* No need to recalculate the swCrc64I here as this will get * handled later in dcHandleIntegrityChecksumsGen4. */ } else if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { pDcResults->checksum = pRespPars->crc.legacy.curr_adler_32; } } void dcCompression_ProcessCallback(void *pRespMsg) { CpaStatus status = CPA_STATUS_SUCCESS; icp_qat_fw_comp_resp_t *pCompRespMsg = NULL; void *callbackTag = NULL; Cpa64U *pReqData = NULL; CpaDcDpOpData *pResponse = NULL; CpaDcRqResults *pResults = NULL; CpaDcCallbackFn pCbFunc = NULL; dc_session_desc_t *pSessionDesc = NULL; sal_compression_service_t *pService = NULL; dc_compression_cookie_t *pCookie = NULL; CpaDcOpData *pOpData = NULL; CpaBoolean cmpPass = CPA_TRUE, xlatPass = CPA_TRUE; CpaBoolean isDcDp = CPA_FALSE; CpaBoolean integrityCrcCheck = CPA_FALSE; CpaBoolean verifyHwIntegrityCrcs = CPA_FALSE; Cpa8U cmpErr = ERR_CODE_NO_ERROR, xlatErr = ERR_CODE_NO_ERROR; dc_request_dir_t compDecomp = DC_COMPRESSION_REQUEST; Cpa8U opStatus = ICP_QAT_FW_COMN_STATUS_FLAG_OK; Cpa8U hdrFlags = 0; /* Cast response message to compression response message type */ pCompRespMsg = (icp_qat_fw_comp_resp_t *)pRespMsg; /* Extract request data pointer from the opaque data */ LAC_MEM_SHARED_READ_TO_PTR(pCompRespMsg->opaque_data, pReqData); /* Extract fields from the request data structure */ pCookie = (dc_compression_cookie_t *)pReqData; if (!pCookie) return; pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pCookie->pSessionHandle); pService = (sal_compression_service_t *)(pCookie->dcInstance); isDcDp = pSessionDesc->isDcDp; if (CPA_TRUE == isDcDp) { pResponse = (CpaDcDpOpData *)pReqData; pResults = &(pResponse->results); if (CPA_DC_DIR_DECOMPRESS == pSessionDesc->sessDirection) { compDecomp = DC_DECOMPRESSION_REQUEST; } pCookie = NULL; } else { pResults = pCookie->pResults; callbackTag = pCookie->callbackTag; pCbFunc = pCookie->pSessionDesc->pCompressionCb; compDecomp = pCookie->compDecomp; pOpData = pCookie->pDcOpData; } opStatus = pCompRespMsg->comn_resp.comn_status; if (NULL != pOpData) { verifyHwIntegrityCrcs = pOpData->verifyHwIntegrityCrcs; integrityCrcCheck = pOpData->integrityCrcCheck; } hdrFlags = pCompRespMsg->comn_resp.hdr_flags; /* Get the cmp error code */ cmpErr = pCompRespMsg->comn_resp.comn_error.s1.cmp_err_code; if (ICP_QAT_FW_COMN_RESP_UNSUPPORTED_REQUEST_STAT_GET(opStatus)) { /* Compression not supported by firmware, set produced/consumed to zero and call the cb function with status CPA_STATUS_UNSUPPORTED */ QAT_UTILS_LOG("Compression feature not supported\n"); status = CPA_STATUS_UNSUPPORTED; pResults->status = (Cpa8S)cmpErr; pResults->consumed = 0; pResults->produced = 0; if (CPA_TRUE == isDcDp) { if (pResponse) pResponse->responseStatus = CPA_STATUS_UNSUPPORTED; (pService->pDcDpCb)(pResponse); } else { /* Free the memory pool */ Lac_MemPoolEntryFree(pCookie); pCookie = NULL; if (NULL != pCbFunc) { pCbFunc(callbackTag, status); } } if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC(numCompCompletedErrors, pService); } else { COMPRESSION_STAT_INC(numDecompCompletedErrors, pService); } return; } else { /* Check compression response status */ cmpPass = (CpaBoolean)(ICP_QAT_FW_COMN_STATUS_FLAG_OK == ICP_QAT_FW_COMN_RESP_CMP_STAT_GET(opStatus)); } if (isDcGen2x(pService)) { /* QAT1.7 and QAT 1.8 hardware */ if (CPA_DC_INCOMPLETE_FILE_ERR == (Cpa8S)cmpErr) { cmpPass = CPA_TRUE; cmpErr = ERR_CODE_NO_ERROR; } } else { /* QAT2.0 hardware cancels the incomplete file errors * only for DEFLATE algorithm. * Decompression direction is not tested in the callback as * the request does not allow it. */ if ((pSessionDesc->compType == CPA_DC_DEFLATE) && (CPA_DC_INCOMPLETE_FILE_ERR == (Cpa8S)cmpErr)) { cmpPass = CPA_TRUE; cmpErr = ERR_CODE_NO_ERROR; } } /* log the slice hang and endpoint push/pull error inside the response */ if (ERR_CODE_SSM_ERROR == (Cpa8S)cmpErr) { QAT_UTILS_LOG( "Slice hang detected on the compression slice.\n"); } else if (ERR_CODE_ENDPOINT_ERROR == (Cpa8S)cmpErr) { QAT_UTILS_LOG( "PCIe End Point Push/Pull or TI/RI Parity error detected.\n"); } /* We return the compression error code for now. We would need to update * the API if we decide to return both error codes */ pResults->status = (Cpa8S)cmpErr; /* Check the translator status */ if ((DC_COMPRESSION_REQUEST == compDecomp) && (CPA_DC_HT_FULL_DYNAMIC == pSessionDesc->huffType)) { /* Check translator response status */ xlatPass = (CpaBoolean)(ICP_QAT_FW_COMN_STATUS_FLAG_OK == ICP_QAT_FW_COMN_RESP_XLAT_STAT_GET(opStatus)); /* Get the translator error code */ xlatErr = pCompRespMsg->comn_resp.comn_error.s1.xlat_err_code; /* Return a fatal error or a potential error in the translator * slice if the compression slice did not return any error */ if ((CPA_DC_OK == pResults->status) || (CPA_DC_FATALERR == (Cpa8S)xlatErr)) { pResults->status = (Cpa8S)xlatErr; } } /* Update dc error counter */ dcErrorLog(pResults->status); if (CPA_FALSE == isDcDp) { /* In case of any error for an end of packet request, we need to * update * the request type for the following request */ if (CPA_DC_FLUSH_FINAL == pCookie->flushFlag && cmpPass && xlatPass) { pSessionDesc->requestType = DC_REQUEST_FIRST; } else { pSessionDesc->requestType = DC_REQUEST_SUBSEQUENT; } if ((CPA_DC_STATEFUL == pSessionDesc->sessState) || ((CPA_DC_STATELESS == pSessionDesc->sessState) && (DC_COMPRESSION_REQUEST == compDecomp))) { /* Overflow is a valid use case for Traditional API * only. Stateful Overflow is supported in both * compression and decompression direction. Stateless * Overflow is supported only in compression direction. */ if (CPA_DC_OVERFLOW == (Cpa8S)cmpErr) cmpPass = CPA_TRUE; if (CPA_DC_OVERFLOW == (Cpa8S)xlatErr) { if (isDcGen4x(pService) && (CPA_TRUE == pService->comp_device_data .translatorOverflow)) { pResults->consumed = pCompRespMsg->comp_resp_pars .input_byte_counter; dcUpdateXltOverflowChecksumsGen4( pCookie, &pCompRespMsg->comp_resp_pars, pResults); } xlatPass = CPA_TRUE; } } } else { if (CPA_DC_OVERFLOW == (Cpa8S)cmpErr) { cmpPass = CPA_FALSE; } if (CPA_DC_OVERFLOW == (Cpa8S)xlatErr) { /* XLT overflow is not valid for Data Plane requests */ xlatPass = CPA_FALSE; } } if ((CPA_TRUE == cmpPass) && (CPA_TRUE == xlatPass)) { /* Extract the response from the firmware */ pResults->consumed = pCompRespMsg->comp_resp_pars.input_byte_counter; pResults->produced = pCompRespMsg->comp_resp_pars.output_byte_counter; pSessionDesc->cumulativeConsumedBytes += pResults->consumed; /* Handle Checksum for end to end data integrity. */ if (CPA_TRUE == pService->generic_service_info.integrityCrcCheck && CPA_TRUE == integrityCrcCheck) { pSessionDesc->previousChecksum = pSessionDesc->seedSwCrc.swCrc32I; } else if (CPA_DC_OVERFLOW != (Cpa8S)xlatErr) { if (CPA_DC_CRC32 == pSessionDesc->checksumType) { pResults->checksum = pCompRespMsg->comp_resp_pars.crc.legacy .curr_crc32; } else if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { pResults->checksum = pCompRespMsg->comp_resp_pars.crc.legacy .curr_adler_32; } pSessionDesc->previousChecksum = pResults->checksum; } if (DC_DECOMPRESSION_REQUEST == compDecomp) { pResults->endOfLastBlock = (ICP_QAT_FW_COMN_STATUS_CMP_END_OF_LAST_BLK_FLAG_SET == ICP_QAT_FW_COMN_RESP_CMP_END_OF_LAST_BLK_FLAG_GET( opStatus)); + } else { + /* Check if returned data is a stored block + * in compression direction + */ + pResults->dataUncompressed = + ICP_QAT_FW_COMN_HDR_ST_BLK_FLAG_GET(hdrFlags); } /* Save the checksum for the next request */ if ((CPA_DC_OVERFLOW != (Cpa8S)xlatErr) && (CPA_TRUE == verifyHwIntegrityCrcs)) { pSessionDesc->previousChecksum = pSessionDesc->seedSwCrc.swCrc32I; } /* Check if a CNV recovery happened and * increase stats counter */ if ((DC_COMPRESSION_REQUEST == compDecomp) && ICP_QAT_FW_COMN_HDR_CNV_FLAG_GET(hdrFlags) && ICP_QAT_FW_COMN_HDR_CNVNR_FLAG_GET(hdrFlags)) { COMPRESSION_STAT_INC(numCompCnvErrorsRecovered, pService); } if (CPA_TRUE == isDcDp) { if (pResponse) pResponse->responseStatus = CPA_STATUS_SUCCESS; } else { if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC(numCompCompleted, pService); } else { COMPRESSION_STAT_INC(numDecompCompleted, pService); } } } else { #ifdef ICP_DC_RETURN_COUNTERS_ON_ERROR /* Extract the response from the firmware */ pResults->consumed = pCompRespMsg->comp_resp_pars.input_byte_counter; pResults->produced = pCompRespMsg->comp_resp_pars.output_byte_counter; if (CPA_DC_STATEFUL == pSessionDesc->sessState) { pSessionDesc->cumulativeConsumedBytes += pResults->consumed; } else { /* In the stateless case all requests have both SOP and * EOP set */ pSessionDesc->cumulativeConsumedBytes = pResults->consumed; } #else pResults->consumed = 0; pResults->produced = 0; #endif if (CPA_DC_OVERFLOW == pResults->status && CPA_DC_STATELESS == pSessionDesc->sessState) { /* This error message will be returned by Data Plane API * in both * compression and decompression direction. With * Traditional API * this error message will be returned only in stateless * decompression direction */ QAT_UTILS_LOG( "Unrecoverable error: stateless overflow. You may need to increase the size of your destination buffer.\n"); } if (CPA_TRUE == isDcDp) { if (pResponse) pResponse->responseStatus = CPA_STATUS_FAIL; } else { if (CPA_DC_OK != pResults->status && CPA_DC_INCOMPLETE_FILE_ERR != pResults->status) { status = CPA_STATUS_FAIL; } if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC(numCompCompletedErrors, pService); } else { COMPRESSION_STAT_INC(numDecompCompletedErrors, pService); } } } if (CPA_TRUE == isDcDp) { /* Decrement number of stateless pending callbacks for session */ pSessionDesc->pendingDpStatelessCbCount--; (pService->pDcDpCb)(pResponse); } else { /* Decrement number of pending callbacks for session */ if (CPA_DC_STATELESS == pSessionDesc->sessState) { qatUtilsAtomicDec( &(pCookie->pSessionDesc->pendingStatelessCbCount)); } else if (0 != qatUtilsAtomicGet(&pCookie->pSessionDesc ->pendingStatefulCbCount)) { qatUtilsAtomicDec( &(pCookie->pSessionDesc->pendingStatefulCbCount)); } /* Free the memory pool */ Lac_MemPoolEntryFree(pCookie); pCookie = NULL; if (NULL != pCbFunc) { pCbFunc(callbackTag, status); } } } /** ***************************************************************************** * @ingroup Dc_DataCompression * Check that all the parameters in the pOpData structure are valid * * @description * Check that all the parameters in the pOpData structure are valid * * @param[in] pService Pointer to the compression service * @param[in] pOpData Pointer to request information structure * holding parameters for cpaDcCompress2 and * CpaDcDecompressData2 * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * *****************************************************************************/ CpaStatus dcCheckOpData(sal_compression_service_t *pService, CpaDcOpData *pOpData) { CpaDcSkipMode skipMode = 0; if ((pOpData->flushFlag < CPA_DC_FLUSH_NONE) || (pOpData->flushFlag > CPA_DC_FLUSH_FULL)) { LAC_INVALID_PARAM_LOG("Invalid flushFlag value"); return CPA_STATUS_INVALID_PARAM; } skipMode = pOpData->inputSkipData.skipMode; if ((skipMode < CPA_DC_SKIP_DISABLED) || (skipMode > CPA_DC_SKIP_STRIDE)) { LAC_INVALID_PARAM_LOG("Invalid input skip mode value"); return CPA_STATUS_INVALID_PARAM; } skipMode = pOpData->outputSkipData.skipMode; if ((skipMode < CPA_DC_SKIP_DISABLED) || (skipMode > CPA_DC_SKIP_STRIDE)) { LAC_INVALID_PARAM_LOG("Invalid output skip mode value"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->integrityCrcCheck == CPA_FALSE && pOpData->verifyHwIntegrityCrcs == CPA_TRUE) { LAC_INVALID_PARAM_LOG( "integrityCrcCheck must be set to true" "in order to enable verifyHwIntegrityCrcs"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->integrityCrcCheck != CPA_TRUE && pOpData->integrityCrcCheck != CPA_FALSE) { LAC_INVALID_PARAM_LOG("Invalid integrityCrcCheck value"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->verifyHwIntegrityCrcs != CPA_TRUE && pOpData->verifyHwIntegrityCrcs != CPA_FALSE) { LAC_INVALID_PARAM_LOG("Invalid verifyHwIntegrityCrcs value"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->compressAndVerify != CPA_TRUE && pOpData->compressAndVerify != CPA_FALSE) { LAC_INVALID_PARAM_LOG("Invalid cnv decompress check value"); return CPA_STATUS_INVALID_PARAM; } if (CPA_TRUE == pOpData->integrityCrcCheck && CPA_FALSE == pService->generic_service_info.integrityCrcCheck) { LAC_INVALID_PARAM_LOG("Integrity CRC check is not " "supported on this device"); return CPA_STATUS_INVALID_PARAM; } if (CPA_TRUE == pOpData->integrityCrcCheck && NULL == pOpData->pCrcData) { LAC_INVALID_PARAM_LOG("Integrity CRC data structure " "not intialized in CpaDcOpData"); return CPA_STATUS_INVALID_PARAM; } return CPA_STATUS_SUCCESS; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Check the compression source buffer for Batch and Pack API. * * @description * Check that all the parameters used for Pack compression * request are valid. This function essentially checks the source buffer * parameters and results structure parameters. * * @param[in] pSessionHandle Session handle * @param[in] pSrcBuff Pointer to data buffer for compression * @param[in] pDestBuff Pointer to buffer space allocated for * output data * @param[in] pResults Pointer to results structure * @param[in] flushFlag Indicates the type of flush to be * performed * @param[in] srcBuffSize Size of the source buffer * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * *****************************************************************************/ static CpaStatus dcCheckSourceData(CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, Cpa64U srcBuffSize, CpaDcSkipData *skipData) { dc_session_desc_t *pSessionDesc = NULL; LAC_CHECK_NULL_PARAM(pSessionHandle); LAC_CHECK_NULL_PARAM(pSrcBuff); LAC_CHECK_NULL_PARAM(pDestBuff); LAC_CHECK_NULL_PARAM(pResults); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); if (NULL == pSessionDesc) { LAC_INVALID_PARAM_LOG("Session handle not as expected"); return CPA_STATUS_INVALID_PARAM; } if ((flushFlag < CPA_DC_FLUSH_NONE) || (flushFlag > CPA_DC_FLUSH_FULL)) { LAC_INVALID_PARAM_LOG("Invalid flushFlag value"); return CPA_STATUS_INVALID_PARAM; } if (pSrcBuff == pDestBuff) { LAC_INVALID_PARAM_LOG("In place operation not supported"); return CPA_STATUS_INVALID_PARAM; } /* Compressing zero bytes is not supported for stateless sessions * for non Batch and Pack requests */ if ((CPA_DC_STATELESS == pSessionDesc->sessState) && (0 == srcBuffSize) && (NULL == skipData)) { LAC_INVALID_PARAM_LOG( "The source buffer size needs to be greater than " "zero bytes for stateless sessions"); return CPA_STATUS_INVALID_PARAM; } if (srcBuffSize > DC_BUFFER_MAX_SIZE) { LAC_INVALID_PARAM_LOG( "The source buffer size needs to be less than or " "equal to 2^32-1 bytes"); return CPA_STATUS_INVALID_PARAM; } return CPA_STATUS_SUCCESS; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Check the compression or decompression function parameters. * * @description * Check that all the parameters used for a Batch and Pack compression * request are valid. This function essentially checks the destination * buffer parameters and intermediate buffer parameters. * * @param[in] pService Pointer to the compression service * @param[in] pSessionHandle Session handle * @param[in] pDestBuff Pointer to buffer space allocated for * output data * @param[in] compDecomp Direction of the operation * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * *****************************************************************************/ static CpaStatus dcCheckDestinationData(sal_compression_service_t *pService, CpaDcSessionHandle pSessionHandle, CpaBufferList *pDestBuff, dc_request_dir_t compDecomp) { dc_session_desc_t *pSessionDesc = NULL; Cpa64U destBuffSize = 0; LAC_CHECK_NULL_PARAM(pSessionHandle); LAC_CHECK_NULL_PARAM(pDestBuff); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); if (NULL == pSessionDesc) { LAC_INVALID_PARAM_LOG("Session handle not as expected"); return CPA_STATUS_INVALID_PARAM; } if (LacBuffDesc_BufferListVerify(pDestBuff, &destBuffSize, LAC_NO_ALIGNMENT_SHIFT) != CPA_STATUS_SUCCESS) { LAC_INVALID_PARAM_LOG( "Invalid destination buffer list parameter"); return CPA_STATUS_INVALID_PARAM; } if (destBuffSize > DC_BUFFER_MAX_SIZE) { LAC_INVALID_PARAM_LOG( "The destination buffer size needs to be less " "than or equal to 2^32-1 bytes"); return CPA_STATUS_INVALID_PARAM; } if (CPA_TRUE == pSessionDesc->isDcDp) { LAC_INVALID_PARAM_LOG( "The session type should not be data plane"); return CPA_STATUS_INVALID_PARAM; } if (DC_COMPRESSION_REQUEST == compDecomp) { if (CPA_DC_HT_FULL_DYNAMIC == pSessionDesc->huffType) { /* Check if intermediate buffers are supported */ if ((isDcGen2x(pService)) && ((0 == pService->pInterBuffPtrsArrayPhyAddr) || (NULL == pService->pInterBuffPtrsArray))) { LAC_LOG_ERROR( "No intermediate buffer defined for this instance " "- see cpaDcStartInstance"); return CPA_STATUS_INVALID_PARAM; } /* Ensure that the destination buffer size is greater or * equal to 128B */ if (destBuffSize < DC_DEST_BUFFER_DYN_MIN_SIZE) { LAC_INVALID_PARAM_LOG( "Destination buffer size should be " "greater or equal to 128B"); return CPA_STATUS_INVALID_PARAM; } } else { /* Ensure that the destination buffer size is greater or * equal to devices min output buff size */ if (destBuffSize < pService->comp_device_data.minOutputBuffSize) { LAC_INVALID_PARAM_LOG1( "Destination buffer size should be " "greater or equal to %d bytes", pService->comp_device_data .minOutputBuffSize); return CPA_STATUS_INVALID_PARAM; } } } else { /* Ensure that the destination buffer size is greater than * 0 bytes */ if (destBuffSize < DC_DEST_BUFFER_DEC_MIN_SIZE) { LAC_INVALID_PARAM_LOG( "Destination buffer size should be " "greater than 0 bytes"); return CPA_STATUS_INVALID_PARAM; } } return CPA_STATUS_SUCCESS; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Populate the compression request parameters * * @description * This function will populate the compression request parameters * * @param[out] pCompReqParams Pointer to the compression request parameters * @param[in] pCookie Pointer to the compression cookie * *****************************************************************************/ static void dcCompRequestParamsPopulate(icp_qat_fw_comp_req_params_t *pCompReqParams, dc_compression_cookie_t *pCookie) { pCompReqParams->comp_len = pCookie->srcTotalDataLenInBytes; pCompReqParams->out_buffer_sz = pCookie->dstTotalDataLenInBytes; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Create the requests for compression or decompression * * @description * Create the requests for compression or decompression. This function * will update the cookie will all required information. * * @param{out] pCookie Pointer to the compression cookie * @param[in] pService Pointer to the compression service * @param[in] pSessionDesc Pointer to the session descriptor * @param[in pSessionHandle Session handle * @param[in] pSrcBuff Pointer to data buffer for compression * @param[in] pDestBuff Pointer to buffer space for data after * compression * @param[in] pResults Pointer to results structure * @param[in] flushFlag Indicates the type of flush to be * performed * @param[in] pOpData Pointer to request information structure * holding parameters for cpaDcCompress2 * and CpaDcDecompressData2 * @param[in] callbackTag Pointer to the callback tag * @param[in] compDecomp Direction of the operation * @param[in] compressAndVerify Compress and Verify * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * *****************************************************************************/ static CpaStatus dcCreateRequest(dc_compression_cookie_t *pCookie, sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, CpaDcOpData *pOpData, void *callbackTag, dc_request_dir_t compDecomp, dc_cnv_mode_t cnvMode) { icp_qat_fw_comp_req_t *pMsg = NULL; icp_qat_fw_comp_req_params_t *pCompReqParams = NULL; Cpa64U srcAddrPhys = 0, dstAddrPhys = 0; Cpa64U srcTotalDataLenInBytes = 0, dstTotalDataLenInBytes = 0; Cpa32U rpCmdFlags = 0; Cpa8U sop = ICP_QAT_FW_COMP_SOP; Cpa8U eop = ICP_QAT_FW_COMP_EOP; Cpa8U bFinal = ICP_QAT_FW_COMP_NOT_BFINAL; Cpa8U crcMode = ICP_QAT_FW_COMP_CRC_MODE_LEGACY; Cpa8U cnvDecompReq = ICP_QAT_FW_COMP_NO_CNV; Cpa8U cnvRecovery = ICP_QAT_FW_COMP_NO_CNV_RECOVERY; CpaBoolean cnvErrorInjection = ICP_QAT_FW_COMP_NO_CNV_DFX; CpaBoolean integrityCrcCheck = CPA_FALSE; CpaStatus status = CPA_STATUS_SUCCESS; CpaDcFlush flush = CPA_DC_FLUSH_NONE; Cpa32U initial_adler = 1; Cpa32U initial_crc32 = 0; icp_qat_fw_comp_req_t *pReqCache = NULL; /* Write the buffer descriptors */ status = LacBuffDesc_BufferListDescWriteAndGetSize( pSrcBuff, &srcAddrPhys, CPA_FALSE, &srcTotalDataLenInBytes, &(pService->generic_service_info)); if (status != CPA_STATUS_SUCCESS) { return status; } status = LacBuffDesc_BufferListDescWriteAndGetSize( pDestBuff, &dstAddrPhys, CPA_FALSE, &dstTotalDataLenInBytes, &(pService->generic_service_info)); if (status != CPA_STATUS_SUCCESS) { return status; } /* Populate the compression cookie */ pCookie->dcInstance = pService; pCookie->pSessionHandle = pSessionHandle; pCookie->callbackTag = callbackTag; pCookie->pSessionDesc = pSessionDesc; pCookie->pDcOpData = pOpData; pCookie->pResults = pResults; pCookie->compDecomp = compDecomp; pCookie->pUserSrcBuff = NULL; pCookie->pUserDestBuff = NULL; /* Extract flush flag from either the opData or from the * parameter. Opdata have been introduce with APIs * cpaDcCompressData2 and cpaDcDecompressData2 */ if (NULL != pOpData) { flush = pOpData->flushFlag; integrityCrcCheck = pOpData->integrityCrcCheck; } else { flush = flushFlag; } pCookie->flushFlag = flush; /* The firmware expects the length in bytes for source and destination * to be Cpa32U parameters. However the total data length could be * bigger as allocated by the user. We ensure that this is not the case * in dcCheckSourceData and cast the values to Cpa32U here */ pCookie->srcTotalDataLenInBytes = (Cpa32U)srcTotalDataLenInBytes; if ((isDcGen2x(pService)) && (DC_COMPRESSION_REQUEST == compDecomp) && (CPA_DC_HT_FULL_DYNAMIC == pSessionDesc->huffType)) { if (pService->minInterBuffSizeInBytes < (Cpa32U)dstTotalDataLenInBytes) { pCookie->dstTotalDataLenInBytes = (Cpa32U)(pService->minInterBuffSizeInBytes); } else { pCookie->dstTotalDataLenInBytes = (Cpa32U)dstTotalDataLenInBytes; } } else { pCookie->dstTotalDataLenInBytes = (Cpa32U)dstTotalDataLenInBytes; } /* Device can not decompress an odd byte decompression request * if bFinal is not set */ if (CPA_TRUE != pService->comp_device_data.oddByteDecompNobFinal) { if ((CPA_DC_STATEFUL == pSessionDesc->sessState) && (CPA_DC_FLUSH_FINAL != flushFlag) && (DC_DECOMPRESSION_REQUEST == compDecomp) && (pCookie->srcTotalDataLenInBytes & 0x1)) { pCookie->srcTotalDataLenInBytes--; } } /* Device can not decompress odd byte interim requests */ if (CPA_TRUE != pService->comp_device_data.oddByteDecompInterim) { if ((CPA_DC_STATEFUL == pSessionDesc->sessState) && (CPA_DC_FLUSH_FINAL != flushFlag) && (CPA_DC_FLUSH_FULL != flushFlag) && (DC_DECOMPRESSION_REQUEST == compDecomp) && (pCookie->srcTotalDataLenInBytes & 0x1)) { pCookie->srcTotalDataLenInBytes--; } } pMsg = (icp_qat_fw_comp_req_t *)&pCookie->request; if (DC_COMPRESSION_REQUEST == compDecomp) { pReqCache = &(pSessionDesc->reqCacheComp); } else { pReqCache = &(pSessionDesc->reqCacheDecomp); } /* Fills the msg from the template cached in the session descriptor */ memcpy((void *)pMsg, (void *)(pReqCache), LAC_QAT_DC_REQ_SZ_LW * LAC_LONG_WORD_IN_BYTES); if (DC_REQUEST_FIRST == pSessionDesc->requestType) { initial_adler = 1; initial_crc32 = 0; if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { pSessionDesc->previousChecksum = initial_adler; } else { pSessionDesc->previousChecksum = initial_crc32; } } else if (CPA_DC_STATELESS == pSessionDesc->sessState) { pSessionDesc->previousChecksum = pResults->checksum; if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { initial_adler = pSessionDesc->previousChecksum; } else { initial_crc32 = pSessionDesc->previousChecksum; } } /* Backup source and destination buffer addresses, * CRC calculations both for CNV and translator overflow * will be performed on them in the callback function. */ pCookie->pUserSrcBuff = pSrcBuff; pCookie->pUserDestBuff = pDestBuff; /* * Due to implementation of CNV support and need for backwards * compatibility certain fields in the request and response structs had * been changed, moved or placed in unions cnvMode flag signifies fields * to be selected from req/res * * Doing extended crc checks makes sense only when we want to do the * actual CNV */ if (CPA_TRUE == pService->generic_service_info.integrityCrcCheck && CPA_TRUE == integrityCrcCheck) { pMsg->comp_pars.crc.crc_data_addr = pSessionDesc->physDataIntegrityCrcs; crcMode = ICP_QAT_FW_COMP_CRC_MODE_E2E; } else { /* Legacy request structure */ pMsg->comp_pars.crc.legacy.initial_adler = initial_adler; pMsg->comp_pars.crc.legacy.initial_crc32 = initial_crc32; crcMode = ICP_QAT_FW_COMP_CRC_MODE_LEGACY; } /* Populate the cmdFlags */ if (CPA_DC_STATEFUL == pSessionDesc->sessState) { pSessionDesc->previousRequestType = pSessionDesc->requestType; if (DC_REQUEST_FIRST == pSessionDesc->requestType) { /* Update the request type for following requests */ pSessionDesc->requestType = DC_REQUEST_SUBSEQUENT; /* Reinitialise the cumulative amount of consumed bytes */ pSessionDesc->cumulativeConsumedBytes = 0; if (DC_COMPRESSION_REQUEST == compDecomp) { pSessionDesc->isSopForCompressionProcessed = CPA_TRUE; } else if (DC_DECOMPRESSION_REQUEST == compDecomp) { pSessionDesc->isSopForDecompressionProcessed = CPA_TRUE; } } else { if (DC_COMPRESSION_REQUEST == compDecomp) { if (CPA_TRUE == pSessionDesc ->isSopForCompressionProcessed) { sop = ICP_QAT_FW_COMP_NOT_SOP; } else { pSessionDesc ->isSopForCompressionProcessed = CPA_TRUE; } } else if (DC_DECOMPRESSION_REQUEST == compDecomp) { if (CPA_TRUE == pSessionDesc ->isSopForDecompressionProcessed) { sop = ICP_QAT_FW_COMP_NOT_SOP; } else { pSessionDesc ->isSopForDecompressionProcessed = CPA_TRUE; } } } if ((CPA_DC_FLUSH_FINAL == flush) || (CPA_DC_FLUSH_FULL == flush)) { /* Update the request type for following requests */ pSessionDesc->requestType = DC_REQUEST_FIRST; } else { eop = ICP_QAT_FW_COMP_NOT_EOP; } } else { if (DC_REQUEST_FIRST == pSessionDesc->requestType) { /* Reinitialise the cumulative amount of consumed bytes */ pSessionDesc->cumulativeConsumedBytes = 0; } } /* (LW 14 - 15) */ pCompReqParams = &(pMsg->comp_pars); dcCompRequestParamsPopulate(pCompReqParams, pCookie); if (CPA_DC_FLUSH_FINAL == flush) { bFinal = ICP_QAT_FW_COMP_BFINAL; } switch (cnvMode) { case DC_CNVNR: cnvRecovery = ICP_QAT_FW_COMP_CNV_RECOVERY; /* Fall through is intended here, because for CNVNR * cnvDecompReq also needs to be set */ case DC_CNV: cnvDecompReq = ICP_QAT_FW_COMP_CNV; if (isDcGen4x(pService)) { cnvErrorInjection = pSessionDesc->cnvErrorInjection; } break; case DC_NO_CNV: cnvDecompReq = ICP_QAT_FW_COMP_NO_CNV; cnvRecovery = ICP_QAT_FW_COMP_NO_CNV_RECOVERY; break; } /* LW 18 */ rpCmdFlags = ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD(sop, eop, bFinal, cnvDecompReq, cnvRecovery, cnvErrorInjection, crcMode); pMsg->comp_pars.req_par_flags = rpCmdFlags; /* Populates the QAT common request middle part of the message * (LW 6 to 11) */ SalQatMsg_CmnMidWrite((icp_qat_fw_la_bulk_req_t *)pMsg, pCookie, DC_DEFAULT_QAT_PTR_TYPE, srcAddrPhys, dstAddrPhys, 0, 0); return CPA_STATUS_SUCCESS; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Send a compression request to QAT * * @description * Send the requests for compression or decompression to QAT * * @param{in] pCookie Pointer to the compression cookie * @param[in] pService Pointer to the compression service * @param[in] pSessionDesc Pointer to the session descriptor * @param[in] compDecomp Direction of the operation * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * *****************************************************************************/ static CpaStatus dcSendRequest(dc_compression_cookie_t *pCookie, sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, dc_request_dir_t compDecomp) { CpaStatus status = CPA_STATUS_SUCCESS; /* Send to QAT */ status = icp_adf_transPutMsg(pService->trans_handle_compression_tx, (void *)&(pCookie->request), LAC_QAT_DC_REQ_SZ_LW); if ((CPA_DC_STATEFUL == pSessionDesc->sessState) && (CPA_STATUS_RETRY == status)) { /* reset requestType after receiving an retry on * the stateful request */ pSessionDesc->requestType = pSessionDesc->previousRequestType; } return status; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Process the synchronous and asynchronous case for compression or * decompression * * @description * Process the synchronous and asynchronous case for compression or * decompression. This function will then create and send the request to * the firmware. * * @param[in] pService Pointer to the compression service * @param[in] pSessionDesc Pointer to the session descriptor * @param[in] dcInstance Instance handle derived from discovery * functions * @param[in] pSessionHandle Session handle * @param[in] numRequests Number of operations in the batch request * @param[in] pBatchOpData Address of the list of jobs to be processed * @param[in] pSrcBuff Pointer to data buffer for compression * @param[in] pDestBuff Pointer to buffer space for data after * compression * @param[in] pResults Pointer to results structure * @param[in] flushFlag Indicates the type of flush to be * performed * @param[in] pOpData Pointer to request information structure * holding parameters for cpaDcCompress2 and * CpaDcDecompressData2 * @param[in] callbackTag Pointer to the callback tag * @param[in] compDecomp Direction of the operation * @param[in] isAsyncMode Used to know if synchronous or asynchronous * mode * @param[in] cnvMode CNV Mode * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_RETRY Retry operation * @retval CPA_STATUS_FAIL Function failed * @retval CPA_STATUS_RESOURCE Resource error * *****************************************************************************/ static CpaStatus dcCompDecompData(sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, CpaDcOpData *pOpData, void *callbackTag, dc_request_dir_t compDecomp, CpaBoolean isAsyncMode, dc_cnv_mode_t cnvMode) { CpaStatus status = CPA_STATUS_SUCCESS; dc_compression_cookie_t *pCookie = NULL; if ((LacSync_GenWakeupSyncCaller == pSessionDesc->pCompressionCb) && isAsyncMode == CPA_TRUE) { lac_sync_op_data_t *pSyncCallbackData = NULL; status = LacSync_CreateSyncCookie(&pSyncCallbackData); if (CPA_STATUS_SUCCESS == status) { status = dcCompDecompData(pService, pSessionDesc, dcInstance, pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, pOpData, pSyncCallbackData, compDecomp, CPA_FALSE, cnvMode); } else { return status; } if (CPA_STATUS_SUCCESS == status) { CpaStatus syncStatus = CPA_STATUS_SUCCESS; syncStatus = LacSync_WaitForCallback(pSyncCallbackData, DC_SYNC_CALLBACK_TIMEOUT, &status, NULL); /* If callback doesn't come back */ if (CPA_STATUS_SUCCESS != syncStatus) { if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC( numCompCompletedErrors, pService); } else { COMPRESSION_STAT_INC( numDecompCompletedErrors, pService); } LAC_LOG_ERROR("Callback timed out"); status = syncStatus; } } else { /* As the Request was not sent the Callback will never * be called, so need to indicate that we're finished * with cookie so it can be destroyed. */ LacSync_SetSyncCookieComplete(pSyncCallbackData); } LacSync_DestroySyncCookie(&pSyncCallbackData); return status; } /* Allocate the compression cookie * The memory is freed in callback or in sendRequest if an error occurs */ pCookie = (dc_compression_cookie_t *)Lac_MemPoolEntryAlloc( pService->compression_mem_pool); if (NULL == pCookie) { LAC_LOG_ERROR("Cannot get mem pool entry for compression"); status = CPA_STATUS_RESOURCE; } else if ((void *)CPA_STATUS_RETRY == pCookie) { pCookie = NULL; status = CPA_STATUS_RETRY; } if (CPA_STATUS_SUCCESS == status) { status = dcCreateRequest(pCookie, pService, pSessionDesc, pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, pOpData, callbackTag, compDecomp, cnvMode); } if (CPA_STATUS_SUCCESS == status) { /* Increment number of pending callbacks for session */ if (CPA_DC_STATELESS == pSessionDesc->sessState) { qatUtilsAtomicInc( &(pSessionDesc->pendingStatelessCbCount)); } status = dcSendRequest(pCookie, pService, pSessionDesc, compDecomp); } if (CPA_STATUS_SUCCESS == status) { if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC(numCompRequests, pService); } else { COMPRESSION_STAT_INC(numDecompRequests, pService); } } else { if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC(numCompRequestsErrors, pService); } else { COMPRESSION_STAT_INC(numDecompRequestsErrors, pService); } /* Decrement number of pending callbacks for session */ if (CPA_DC_STATELESS == pSessionDesc->sessState) { qatUtilsAtomicDec( &(pSessionDesc->pendingStatelessCbCount)); } else { qatUtilsAtomicDec( &(pSessionDesc->pendingStatefulCbCount)); } /* Free the memory pool */ if (NULL != pCookie) { if (status != CPA_STATUS_UNSUPPORTED) { /* Free the memory pool */ Lac_MemPoolEntryFree(pCookie); pCookie = NULL; } } } return status; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Handle zero length compression or decompression requests * * @description * Handle zero length compression or decompression requests * * @param[in] pService Pointer to the compression service * @param[in] pSessionDesc Pointer to the session descriptor * @param[in] pResults Pointer to results structure * @param[in] flushFlag Indicates the type of flush to be * performed * @param[in] callbackTag User supplied value to help correlate * the callback with its associated request * @param[in] compDecomp Direction of the operation * * @retval CPA_TRUE Zero length SOP or MOP processed * @retval CPA_FALSE Zero length EOP * *****************************************************************************/ static CpaStatus dcZeroLengthRequests(sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, CpaDcRqResults *pResults, CpaDcFlush flushFlag, void *callbackTag, dc_request_dir_t compDecomp) { CpaBoolean status = CPA_FALSE; CpaDcCallbackFn pCbFunc = pSessionDesc->pCompressionCb; if (DC_REQUEST_FIRST == pSessionDesc->requestType) { /* Reinitialise the cumulative amount of consumed bytes */ pSessionDesc->cumulativeConsumedBytes = 0; /* Zero length SOP */ if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { pResults->checksum = 1; } else { pResults->checksum = 0; } status = CPA_TRUE; } else if ((CPA_DC_FLUSH_NONE == flushFlag) || (CPA_DC_FLUSH_SYNC == flushFlag)) { /* Zero length MOP */ pResults->checksum = pSessionDesc->previousChecksum; status = CPA_TRUE; } if (CPA_TRUE == status) { pResults->status = CPA_DC_OK; pResults->produced = 0; pResults->consumed = 0; /* Increment statistics */ if (DC_COMPRESSION_REQUEST == compDecomp) { COMPRESSION_STAT_INC(numCompRequests, pService); COMPRESSION_STAT_INC(numCompCompleted, pService); } else { COMPRESSION_STAT_INC(numDecompRequests, pService); COMPRESSION_STAT_INC(numDecompCompleted, pService); } LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); if ((NULL != pCbFunc) && (LacSync_GenWakeupSyncCaller != pCbFunc)) { pCbFunc(callbackTag, CPA_STATUS_SUCCESS); } return CPA_TRUE; } return CPA_FALSE; } static CpaStatus dcParamCheck(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, sal_compression_service_t *pService, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, dc_session_desc_t *pSessionDesc, CpaDcFlush flushFlag, Cpa64U srcBuffSize) { if (dcCheckSourceData(pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, srcBuffSize, NULL) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } if (dcCheckDestinationData( pService, pSessionHandle, pDestBuff, DC_COMPRESSION_REQUEST) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } if (CPA_DC_DIR_DECOMPRESS == pSessionDesc->sessDirection) { LAC_INVALID_PARAM_LOG("Invalid sessDirection value"); return CPA_STATUS_INVALID_PARAM; } return CPA_STATUS_SUCCESS; } CpaStatus cpaDcCompressData(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, void *callbackTag) { sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; CpaInstanceHandle insHandle = NULL; Cpa64U srcBuffSize = 0; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } pService = (sal_compression_service_t *)insHandle; LAC_CHECK_NULL_PARAM(insHandle); LAC_CHECK_NULL_PARAM(pSessionHandle); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(insHandle); /* This check is outside the parameter checking as it is needed to * manage zero length requests */ if (LacBuffDesc_BufferListVerifyNull(pSrcBuff, &srcBuffSize, LAC_NO_ALIGNMENT_SHIFT) != CPA_STATUS_SUCCESS) { LAC_INVALID_PARAM_LOG("Invalid source buffer list parameter"); return CPA_STATUS_INVALID_PARAM; } /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); if (CPA_STATUS_SUCCESS != dcParamCheck(insHandle, pSessionHandle, pService, pSrcBuff, pDestBuff, pResults, pSessionDesc, flushFlag, srcBuffSize)) { return CPA_STATUS_INVALID_PARAM; } if (CPA_DC_STATEFUL == pSessionDesc->sessState) { LAC_INVALID_PARAM_LOG( "Invalid session state, stateful sessions " "are not supported"); return CPA_STATUS_UNSUPPORTED; } if (!(pService->generic_service_info.dcExtendedFeatures & DC_CNV_EXTENDED_CAPABILITY)) { LAC_INVALID_PARAM_LOG( "CompressAndVerify feature not supported"); return CPA_STATUS_UNSUPPORTED; } if (!(pService->generic_service_info.dcExtendedFeatures & DC_CNVNR_EXTENDED_CAPABILITY)) { LAC_INVALID_PARAM_LOG( "CompressAndVerifyAndRecovery feature not supported"); return CPA_STATUS_UNSUPPORTED; } return dcCompDecompData(pService, pSessionDesc, insHandle, pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, NULL, callbackTag, DC_COMPRESSION_REQUEST, CPA_TRUE, DC_CNVNR); } CpaStatus cpaDcCompressData2(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcOpData *pOpData, CpaDcRqResults *pResults, void *callbackTag) { sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; CpaInstanceHandle insHandle = NULL; Cpa64U srcBuffSize = 0; dc_cnv_mode_t cnvMode = DC_NO_CNV; LAC_CHECK_NULL_PARAM(pOpData); if (((CPA_TRUE != pOpData->compressAndVerify) && (CPA_FALSE != pOpData->compressAndVerify)) || ((CPA_FALSE != pOpData->compressAndVerifyAndRecover) && (CPA_TRUE != pOpData->compressAndVerifyAndRecover))) { return CPA_STATUS_INVALID_PARAM; } if ((CPA_FALSE == pOpData->compressAndVerify) && (CPA_TRUE == pOpData->compressAndVerifyAndRecover)) { return CPA_STATUS_INVALID_PARAM; } if ((CPA_TRUE == pOpData->compressAndVerify) && (CPA_TRUE == pOpData->compressAndVerifyAndRecover) && (CPA_FALSE == pOpData->integrityCrcCheck)) { return cpaDcCompressData(dcInstance, pSessionHandle, pSrcBuff, pDestBuff, pResults, pOpData->flushFlag, callbackTag); } if (CPA_FALSE == pOpData->compressAndVerify) { LAC_INVALID_PARAM_LOG( "Data compression without verification not allowed"); return CPA_STATUS_UNSUPPORTED; } if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } pService = (sal_compression_service_t *)insHandle; LAC_CHECK_NULL_PARAM(insHandle); LAC_CHECK_NULL_PARAM(pSessionHandle); LAC_CHECK_NULL_PARAM(pOpData); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(insHandle); /* This check is outside the parameter checking as it is needed to * manage zero length requests */ if (LacBuffDesc_BufferListVerifyNull(pSrcBuff, &srcBuffSize, LAC_NO_ALIGNMENT_SHIFT) != CPA_STATUS_SUCCESS) { LAC_INVALID_PARAM_LOG("Invalid source buffer list parameter"); return CPA_STATUS_INVALID_PARAM; } /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); if (CPA_TRUE == pOpData->compressAndVerify && CPA_DC_STATEFUL == pSessionDesc->sessState) { LAC_INVALID_PARAM_LOG( "Invalid session state, stateful sessions " "not supported with CNV"); return CPA_STATUS_UNSUPPORTED; } if (!(pService->generic_service_info.dcExtendedFeatures & DC_CNV_EXTENDED_CAPABILITY) && (CPA_TRUE == pOpData->compressAndVerify)) { LAC_INVALID_PARAM_LOG( "CompressAndVerify feature not supported"); return CPA_STATUS_UNSUPPORTED; } if (CPA_STATUS_SUCCESS != dcParamCheck(insHandle, pSessionHandle, pService, pSrcBuff, pDestBuff, pResults, pSessionDesc, pOpData->flushFlag, srcBuffSize)) { return CPA_STATUS_INVALID_PARAM; } if (CPA_STATUS_SUCCESS != dcCheckOpData(pService, pOpData)) { return CPA_STATUS_INVALID_PARAM; } if (CPA_TRUE != pOpData->compressAndVerify) { if (srcBuffSize > DC_COMP_MAX_BUFF_SIZE) { LAC_LOG_ERROR( "Compression payload greater than 64KB is " "unsupported, when CnV is disabled\n"); return CPA_STATUS_UNSUPPORTED; } } if (CPA_DC_STATEFUL == pSessionDesc->sessState) { /* Lock the session to check if there are in-flight stateful * requests */ LAC_SPINLOCK(&(pSessionDesc->sessionLock)); /* Check if there is already one in-flight stateful request */ if (0 != qatUtilsAtomicGet( &(pSessionDesc->pendingStatefulCbCount))) { LAC_LOG_ERROR( "Only one in-flight stateful request supported"); LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); return CPA_STATUS_RETRY; } if (0 == srcBuffSize) { if (CPA_TRUE == dcZeroLengthRequests(pService, pSessionDesc, pResults, pOpData->flushFlag, callbackTag, DC_COMPRESSION_REQUEST)) { return CPA_STATUS_SUCCESS; } } qatUtilsAtomicInc(&(pSessionDesc->pendingStatefulCbCount)); LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); } if (CPA_TRUE == pOpData->compressAndVerify) { cnvMode = DC_CNV; } return dcCompDecompData(pService, pSessionDesc, insHandle, pSessionHandle, pSrcBuff, pDestBuff, pResults, pOpData->flushFlag, pOpData, callbackTag, DC_COMPRESSION_REQUEST, CPA_TRUE, cnvMode); } static CpaStatus dcDecompressDataCheck(CpaInstanceHandle insHandle, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, Cpa64U *srcBufferSize) { sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; Cpa64U srcBuffSize = 0; pService = (sal_compression_service_t *)insHandle; LAC_CHECK_NULL_PARAM(insHandle); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(insHandle); /* This check is outside the parameter checking as it is needed to * manage zero length requests */ if (LacBuffDesc_BufferListVerifyNull(pSrcBuff, &srcBuffSize, LAC_NO_ALIGNMENT_SHIFT) != CPA_STATUS_SUCCESS) { LAC_INVALID_PARAM_LOG("Invalid source buffer list parameter"); return CPA_STATUS_INVALID_PARAM; } /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); if (dcCheckSourceData(pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, srcBuffSize, NULL) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } if (dcCheckDestinationData(pService, pSessionHandle, pDestBuff, DC_DECOMPRESSION_REQUEST) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); if (CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection) { LAC_INVALID_PARAM_LOG("Invalid sessDirection value"); return CPA_STATUS_INVALID_PARAM; } *srcBufferSize = srcBuffSize; return CPA_STATUS_SUCCESS; } CpaStatus cpaDcDecompressData(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, void *callbackTag) { sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; CpaInstanceHandle insHandle = NULL; Cpa64U srcBuffSize = 0; CpaStatus status = CPA_STATUS_SUCCESS; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } status = dcDecompressDataCheck(insHandle, pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, &srcBuffSize); if (CPA_STATUS_SUCCESS != status) { return status; } pService = (sal_compression_service_t *)insHandle; /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(insHandle); /* This check is outside the parameter checking as it is needed to * manage zero length requests */ if (CPA_STATUS_SUCCESS != LacBuffDesc_BufferListVerifyNull(pSrcBuff, &srcBuffSize, LAC_NO_ALIGNMENT_SHIFT)) { QAT_UTILS_LOG("Invalid source buffer list parameter"); return CPA_STATUS_INVALID_PARAM; } /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); if (dcCheckSourceData(pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, srcBuffSize, NULL) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } if (dcCheckDestinationData(pService, pSessionHandle, pDestBuff, DC_DECOMPRESSION_REQUEST) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); if (CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection) { QAT_UTILS_LOG("Invalid sessDirection value"); return CPA_STATUS_INVALID_PARAM; } if (CPA_DC_STATEFUL == pSessionDesc->sessState) { /* Lock the session to check if there are in-flight stateful * requests */ LAC_SPINLOCK(&(pSessionDesc->sessionLock)); /* Check if there is already one in-flight stateful request */ if (0 != qatUtilsAtomicGet( &(pSessionDesc->pendingStatefulCbCount))) { LAC_LOG_ERROR( "Only one in-flight stateful request supported"); LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); return CPA_STATUS_RETRY; } /* Gen 4 handle 0 len requests in FW */ if (isDcGen2x(pService)) { if ((0 == srcBuffSize) || ((1 == srcBuffSize) && (CPA_DC_FLUSH_FINAL != flushFlag) && (CPA_DC_FLUSH_FULL != flushFlag))) { if (CPA_TRUE == dcZeroLengthRequests( pService, pSessionDesc, pResults, flushFlag, callbackTag, DC_DECOMPRESSION_REQUEST)) { return CPA_STATUS_SUCCESS; } } } qatUtilsAtomicInc(&(pSessionDesc->pendingStatefulCbCount)); LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); } return dcCompDecompData(pService, pSessionDesc, insHandle, pSessionHandle, pSrcBuff, pDestBuff, pResults, flushFlag, NULL, callbackTag, DC_DECOMPRESSION_REQUEST, CPA_TRUE, DC_NO_CNV); } CpaStatus cpaDcDecompressData2(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcOpData *pOpData, CpaDcRqResults *pResults, void *callbackTag) { sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; CpaInstanceHandle insHandle = NULL; CpaStatus status = CPA_STATUS_SUCCESS; Cpa64U srcBuffSize = 0; LAC_CHECK_NULL_PARAM(pOpData); if (CPA_FALSE == pOpData->integrityCrcCheck) { return cpaDcDecompressData(dcInstance, pSessionHandle, pSrcBuff, pDestBuff, pResults, pOpData->flushFlag, callbackTag); } if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } status = dcDecompressDataCheck(insHandle, pSessionHandle, pSrcBuff, pDestBuff, pResults, pOpData->flushFlag, &srcBuffSize); if (CPA_STATUS_SUCCESS != status) { return status; } pService = (sal_compression_service_t *)insHandle; pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); LAC_CHECK_NULL_PARAM(insHandle); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(insHandle); /* This check is outside the parameter checking as it is needed to * manage zero length requests */ if (CPA_STATUS_SUCCESS != LacBuffDesc_BufferListVerifyNull(pSrcBuff, &srcBuffSize, LAC_NO_ALIGNMENT_SHIFT)) { QAT_UTILS_LOG("Invalid source buffer list parameter"); return CPA_STATUS_INVALID_PARAM; } /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); if (CPA_STATUS_SUCCESS != dcCheckSourceData(pSessionHandle, pSrcBuff, pDestBuff, pResults, CPA_DC_FLUSH_NONE, srcBuffSize, NULL)) { return CPA_STATUS_INVALID_PARAM; } if (CPA_STATUS_SUCCESS != dcCheckDestinationData(pService, pSessionHandle, pDestBuff, DC_DECOMPRESSION_REQUEST)) { return CPA_STATUS_INVALID_PARAM; } if (CPA_STATUS_SUCCESS != dcCheckOpData(pService, pOpData)) { return CPA_STATUS_INVALID_PARAM; } if (CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection) { QAT_UTILS_LOG("Invalid sessDirection value"); return CPA_STATUS_INVALID_PARAM; } if (CPA_DC_STATEFUL == pSessionDesc->sessState) { /* Lock the session to check if there are in-flight stateful * requests */ LAC_SPINLOCK(&(pSessionDesc->sessionLock)); /* Check if there is already one in-flight stateful request */ if (0 != qatUtilsAtomicGet( &(pSessionDesc->pendingStatefulCbCount))) { LAC_LOG_ERROR( "Only one in-flight stateful request supported"); LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); return CPA_STATUS_RETRY; } /* Gen 4 handle 0 len requests in FW */ if (isDcGen2x(pService)) { if ((0 == srcBuffSize) || ((1 == srcBuffSize) && (CPA_DC_FLUSH_FINAL != pOpData->flushFlag) && (CPA_DC_FLUSH_FULL != pOpData->flushFlag))) { if (CPA_TRUE == dcZeroLengthRequests( pService, pSessionDesc, pResults, pOpData->flushFlag, callbackTag, DC_DECOMPRESSION_REQUEST)) { return CPA_STATUS_SUCCESS; } } } qatUtilsAtomicInc(&(pSessionDesc->pendingStatefulCbCount)); LAC_SPINUNLOCK(&(pSessionDesc->sessionLock)); } return dcCompDecompData(pService, pSessionDesc, insHandle, pSessionHandle, pSrcBuff, pDestBuff, pResults, pOpData->flushFlag, pOpData, callbackTag, DC_DECOMPRESSION_REQUEST, CPA_TRUE, DC_NO_CNV); } diff --git a/sys/dev/qat/qat_api/common/compression/dc_dp.c b/sys/dev/qat/qat_api/common/compression/dc_dp.c index 9b00c5b09d7e..b9d3d17a8548 100644 --- a/sys/dev/qat/qat_api/common/compression/dc_dp.c +++ b/sys/dev/qat/qat_api/common/compression/dc_dp.c @@ -1,560 +1,568 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file dc_dp.c * * @defgroup cpaDcDp Data Compression Data Plane API * * @ingroup cpaDcDp * * @description * Implementation of the Data Compression DP operations. * *****************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ #include "cpa.h" #include "cpa_dc.h" #include "cpa_dc_dp.h" #include "icp_qat_fw_comp.h" /* ******************************************************************************* * Include private header files ******************************************************************************* */ #include "dc_session.h" #include "dc_datapath.h" #include "lac_common.h" #include "lac_mem.h" #include "lac_mem_pools.h" #include "sal_types_compression.h" #include "lac_sal.h" #include "lac_sync.h" #include "sal_service_state.h" #include "sal_qat_cmn_msg.h" #include "icp_sal_poll.h" #include "sal_hw_gen.h" /** ***************************************************************************** * @ingroup cpaDcDp * Check that pOpData is valid * * @description * Check that all the parameters defined in the pOpData are valid * * @param[in] pOpData Pointer to a structure containing the * request parameters * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * *****************************************************************************/ static CpaStatus dcDataPlaneParamCheck(const CpaDcDpOpData *pOpData) { sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; LAC_CHECK_NULL_PARAM(pOpData); LAC_CHECK_NULL_PARAM(pOpData->dcInstance); LAC_CHECK_NULL_PARAM(pOpData->pSessionHandle); /* Ensure this is a compression instance */ SAL_CHECK_INSTANCE_TYPE(pOpData->dcInstance, SAL_SERVICE_TYPE_COMPRESSION); pService = (sal_compression_service_t *)(pOpData->dcInstance); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pOpData->pSessionHandle); if (NULL == pSessionDesc) { QAT_UTILS_LOG("Session handle not as expected.\n"); return CPA_STATUS_INVALID_PARAM; } if (CPA_FALSE == pSessionDesc->isDcDp) { QAT_UTILS_LOG("The session type should be data plane.\n"); return CPA_STATUS_INVALID_PARAM; } /* Compressing zero byte is not supported */ if ((CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection) && (0 == pOpData->bufferLenToCompress)) { QAT_UTILS_LOG("The source buffer length to compress needs to " "be greater than zero byte.\n"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->sessDirection > CPA_DC_DIR_DECOMPRESS) { QAT_UTILS_LOG("Invalid direction of operation.\n"); return CPA_STATUS_INVALID_PARAM; } if (0 == pOpData->srcBuffer) { QAT_UTILS_LOG("Invalid srcBuffer\n"); return CPA_STATUS_INVALID_PARAM; } if (0 == pOpData->destBuffer) { QAT_UTILS_LOG("Invalid destBuffer\n"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->srcBuffer == pOpData->destBuffer) { QAT_UTILS_LOG("In place operation is not supported.\n"); return CPA_STATUS_INVALID_PARAM; } if (0 == pOpData->thisPhys) { QAT_UTILS_LOG("Invalid thisPhys\n"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_TRUE != pOpData->compressAndVerify) && (CPA_FALSE != pOpData->compressAndVerify)) { QAT_UTILS_LOG("Invalid compressAndVerify\n"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_TRUE == pOpData->compressAndVerify) && !(pService->generic_service_info.dcExtendedFeatures & DC_CNV_EXTENDED_CAPABILITY)) { QAT_UTILS_LOG("Invalid compressAndVerify, no CNV capability\n"); return CPA_STATUS_UNSUPPORTED; } if ((CPA_TRUE != pOpData->compressAndVerifyAndRecover) && (CPA_FALSE != pOpData->compressAndVerifyAndRecover)) { QAT_UTILS_LOG("Invalid compressAndVerifyAndRecover\n"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_TRUE == pOpData->compressAndVerifyAndRecover) && (CPA_FALSE == pOpData->compressAndVerify)) { QAT_UTILS_LOG("CnVnR option set without setting CnV\n"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_TRUE == pOpData->compressAndVerifyAndRecover) && !(pService->generic_service_info.dcExtendedFeatures & DC_CNVNR_EXTENDED_CAPABILITY)) { QAT_UTILS_LOG( "Invalid CnVnR option set and no CnVnR capability.\n"); return CPA_STATUS_UNSUPPORTED; } if ((CPA_DP_BUFLIST == pOpData->srcBufferLen) && (CPA_DP_BUFLIST != pOpData->destBufferLen)) { QAT_UTILS_LOG( "The source and destination buffers need to be of the same type (both flat buffers or buffer lists).\n"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_DP_BUFLIST != pOpData->srcBufferLen) && (CPA_DP_BUFLIST == pOpData->destBufferLen)) { QAT_UTILS_LOG( "The source and destination buffers need to be of the same type (both flat buffers or buffer lists).\n"); return CPA_STATUS_INVALID_PARAM; } if (CPA_DP_BUFLIST != pOpData->srcBufferLen) { if (pOpData->srcBufferLen < pOpData->bufferLenToCompress) { QAT_UTILS_LOG( "srcBufferLen is smaller than bufferLenToCompress.\n"); return CPA_STATUS_INVALID_PARAM; } if (pOpData->destBufferLen < pOpData->bufferLenForData) { QAT_UTILS_LOG( "destBufferLen is smaller than bufferLenForData.\n"); return CPA_STATUS_INVALID_PARAM; } } else { /* We are assuming that there is enough memory in the source and * destination buffer lists. We only receive physical addresses * of the buffers so we are unable to test it here */ LAC_CHECK_8_BYTE_ALIGNMENT(pOpData->srcBuffer); LAC_CHECK_8_BYTE_ALIGNMENT(pOpData->destBuffer); } LAC_CHECK_8_BYTE_ALIGNMENT(pOpData->thisPhys); if ((CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection) || (CPA_DC_DIR_COMBINED == pSessionDesc->sessDirection)) { if (CPA_DC_HT_FULL_DYNAMIC == pSessionDesc->huffType) { /* Check if Intermediate Buffer Array pointer is NULL */ if (isDcGen2x(pService) && ((0 == pService->pInterBuffPtrsArrayPhyAddr) || (NULL == pService->pInterBuffPtrsArray))) { QAT_UTILS_LOG( "No intermediate buffer defined for this instance - see cpaDcStartInstance.\n"); return CPA_STATUS_INVALID_PARAM; } /* Ensure that the destination buffer length for data is * greater * or equal to 128B */ if (pOpData->bufferLenForData < DC_DEST_BUFFER_DYN_MIN_SIZE) { QAT_UTILS_LOG( "Destination buffer length for data should be greater or equal to 128B.\n"); return CPA_STATUS_INVALID_PARAM; } } else { /* Ensure that the destination buffer length for data is * greater * or equal to min output buffsize */ if (pOpData->bufferLenForData < pService->comp_device_data.minOutputBuffSize) { QAT_UTILS_LOG( "Destination buffer size should be greater or equal to %d bytes.\n", pService->comp_device_data .minOutputBuffSize); return CPA_STATUS_INVALID_PARAM; } } } return CPA_STATUS_SUCCESS; } CpaStatus cpaDcDpGetSessionSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData *pSessionData, Cpa32U *pSessionSize) { return dcGetSessionSize(dcInstance, pSessionData, pSessionSize, NULL); } CpaStatus cpaDcDpInitSession(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaDcSessionSetupData *pSessionData) { CpaStatus status = CPA_STATUS_SUCCESS; dc_session_desc_t *pSessionDesc = NULL; sal_compression_service_t *pService = NULL; LAC_CHECK_INSTANCE_HANDLE(dcInstance); SAL_CHECK_INSTANCE_TYPE(dcInstance, SAL_SERVICE_TYPE_COMPRESSION); pService = (sal_compression_service_t *)dcInstance; /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(pService); /* Stateful is not supported */ if (CPA_DC_STATELESS != pSessionData->sessState) { QAT_UTILS_LOG("Invalid sessState value\n"); return CPA_STATUS_INVALID_PARAM; } status = dcInitSession(dcInstance, pSessionHandle, pSessionData, NULL, NULL); if (CPA_STATUS_SUCCESS == status) { pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); pSessionDesc->isDcDp = CPA_TRUE; ICP_QAT_FW_COMN_PTR_TYPE_SET( pSessionDesc->reqCacheDecomp.comn_hdr.comn_req_flags, DC_DP_QAT_PTR_TYPE); ICP_QAT_FW_COMN_PTR_TYPE_SET( pSessionDesc->reqCacheComp.comn_hdr.comn_req_flags, DC_DP_QAT_PTR_TYPE); } return status; } CpaStatus cpaDcDpRemoveSession(const CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle) { return cpaDcRemoveSession(dcInstance, pSessionHandle); } +CpaStatus +cpaDcDpUpdateSession(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle, + CpaDcSessionUpdateData *pUpdateSessionData) +{ + return CPA_STATUS_UNSUPPORTED; +} + CpaStatus cpaDcDpRegCbFunc(const CpaInstanceHandle dcInstance, const CpaDcDpCallbackFn pNewCb) { sal_compression_service_t *pService = NULL; LAC_CHECK_NULL_PARAM(dcInstance); SAL_CHECK_INSTANCE_TYPE(dcInstance, SAL_SERVICE_TYPE_COMPRESSION); LAC_CHECK_NULL_PARAM(pNewCb); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(dcInstance); pService = (sal_compression_service_t *)dcInstance; pService->pDcDpCb = pNewCb; return CPA_STATUS_SUCCESS; } /** ***************************************************************************** * @ingroup cpaDcDp * * @description * Writes the message to the ring * * @param[in] pOpData Pointer to a structure containing the * request parameters * @param[in] pCurrentQatMsg Pointer to current QAT message on the ring * *****************************************************************************/ static void dcDpWriteRingMsg(CpaDcDpOpData *pOpData, icp_qat_fw_comp_req_t *pCurrentQatMsg) { icp_qat_fw_comp_req_t *pReqCache = NULL; dc_session_desc_t *pSessionDesc = NULL; Cpa8U bufferFormat; Cpa8U cnvDecompReq = ICP_QAT_FW_COMP_NO_CNV; Cpa8U cnvnrCompReq = ICP_QAT_FW_COMP_NO_CNV_RECOVERY; CpaBoolean cnvErrorInjection = ICP_QAT_FW_COMP_NO_CNV_DFX; sal_compression_service_t *pService = NULL; pService = (sal_compression_service_t *)(pOpData->dcInstance); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pOpData->pSessionHandle); if (CPA_DC_DIR_COMPRESS == pOpData->sessDirection) { pReqCache = &(pSessionDesc->reqCacheComp); /* CNV check */ if (CPA_TRUE == pOpData->compressAndVerify) { cnvDecompReq = ICP_QAT_FW_COMP_CNV; if (isDcGen4x(pService)) { cnvErrorInjection = pSessionDesc->cnvErrorInjection; } /* CNVNR check */ if (CPA_TRUE == pOpData->compressAndVerifyAndRecover) { cnvnrCompReq = ICP_QAT_FW_COMP_CNV_RECOVERY; } } } else { pReqCache = &(pSessionDesc->reqCacheDecomp); } /* Fills in the template DC ET ring message - cached from the * session descriptor */ memcpy((void *)pCurrentQatMsg, (void *)(pReqCache), (LAC_QAT_DC_REQ_SZ_LW * LAC_LONG_WORD_IN_BYTES)); if (CPA_DP_BUFLIST == pOpData->srcBufferLen) { bufferFormat = QAT_COMN_PTR_TYPE_SGL; } else { bufferFormat = QAT_COMN_PTR_TYPE_FLAT; } pCurrentQatMsg->comp_pars.req_par_flags |= ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( ICP_QAT_FW_COMP_NOT_SOP, ICP_QAT_FW_COMP_NOT_EOP, ICP_QAT_FW_COMP_NOT_BFINAL, cnvDecompReq, cnvnrCompReq, cnvErrorInjection, ICP_QAT_FW_COMP_CRC_MODE_LEGACY); SalQatMsg_CmnMidWrite((icp_qat_fw_la_bulk_req_t *)pCurrentQatMsg, pOpData, bufferFormat, pOpData->srcBuffer, pOpData->destBuffer, pOpData->srcBufferLen, pOpData->destBufferLen); pCurrentQatMsg->comp_pars.comp_len = pOpData->bufferLenToCompress; pCurrentQatMsg->comp_pars.out_buffer_sz = pOpData->bufferLenForData; } CpaStatus cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow) { icp_qat_fw_comp_req_t *pCurrentQatMsg = NULL; icp_comms_trans_handle trans_handle = NULL; dc_session_desc_t *pSessionDesc = NULL; CpaStatus status = CPA_STATUS_SUCCESS; status = dcDataPlaneParamCheck(pOpData); if (CPA_STATUS_SUCCESS != status) { return status; } if ((CPA_FALSE == pOpData->compressAndVerify) && (CPA_DC_DIR_COMPRESS == pOpData->sessDirection)) { return CPA_STATUS_UNSUPPORTED; } /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(pOpData->dcInstance); trans_handle = ((sal_compression_service_t *)pOpData->dcInstance) ->trans_handle_compression_tx; pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pOpData->pSessionHandle); if ((CPA_DC_DIR_COMPRESS == pOpData->sessDirection) && (CPA_DC_DIR_DECOMPRESS == pSessionDesc->sessDirection)) { QAT_UTILS_LOG( "The session does not support this direction of operation.\n"); return CPA_STATUS_INVALID_PARAM; } else if ((CPA_DC_DIR_DECOMPRESS == pOpData->sessDirection) && (CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection)) { QAT_UTILS_LOG( "The session does not support this direction of operation.\n"); return CPA_STATUS_INVALID_PARAM; } icp_adf_getSingleQueueAddr(trans_handle, (void **)&pCurrentQatMsg); if (NULL == pCurrentQatMsg) { return CPA_STATUS_RETRY; } dcDpWriteRingMsg(pOpData, pCurrentQatMsg); pSessionDesc->pendingDpStatelessCbCount++; if (CPA_TRUE == performOpNow) { SalQatMsg_updateQueueTail(trans_handle); } return CPA_STATUS_SUCCESS; } CpaStatus cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, CpaDcDpOpData *pOpData[], const CpaBoolean performOpNow) { icp_qat_fw_comp_req_t *pCurrentQatMsg = NULL; icp_comms_trans_handle trans_handle = NULL; dc_session_desc_t *pSessionDesc = NULL; Cpa32U i = 0; CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *pService = NULL; LAC_CHECK_NULL_PARAM(pOpData); LAC_CHECK_NULL_PARAM(pOpData[0]); LAC_CHECK_NULL_PARAM(pOpData[0]->dcInstance); pService = (sal_compression_service_t *)(pOpData[0]->dcInstance); if ((numberRequests == 0) || (numberRequests > pService->maxNumCompConcurrentReq)) { QAT_UTILS_LOG( "The number of requests needs to be between 1 and %d.\n", pService->maxNumCompConcurrentReq); return CPA_STATUS_INVALID_PARAM; } for (i = 0; i < numberRequests; i++) { status = dcDataPlaneParamCheck(pOpData[i]); if (CPA_STATUS_SUCCESS != status) { return status; } /* Check that all instance handles and session handles are the * same */ if (pOpData[i]->dcInstance != pOpData[0]->dcInstance) { QAT_UTILS_LOG( "All instance handles should be the same in the pOpData.\n"); return CPA_STATUS_INVALID_PARAM; } if (pOpData[i]->pSessionHandle != pOpData[0]->pSessionHandle) { QAT_UTILS_LOG( "All session handles should be the same in the pOpData.\n"); return CPA_STATUS_INVALID_PARAM; } } for (i = 0; i < numberRequests; i++) { if ((CPA_FALSE == pOpData[i]->compressAndVerify) && (CPA_DC_DIR_COMPRESS == pOpData[i]->sessDirection)) { return CPA_STATUS_UNSUPPORTED; } } /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(pOpData[0]->dcInstance); trans_handle = ((sal_compression_service_t *)pOpData[0]->dcInstance) ->trans_handle_compression_tx; pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pOpData[0]->pSessionHandle); for (i = 0; i < numberRequests; i++) { if ((CPA_DC_DIR_COMPRESS == pOpData[i]->sessDirection) && (CPA_DC_DIR_DECOMPRESS == pSessionDesc->sessDirection)) { QAT_UTILS_LOG( "The session does not support this direction of operation.\n"); return CPA_STATUS_INVALID_PARAM; } else if ((CPA_DC_DIR_DECOMPRESS == pOpData[i]->sessDirection) && (CPA_DC_DIR_COMPRESS == pSessionDesc->sessDirection)) { QAT_UTILS_LOG( "The session does not support this direction of operation.\n"); return CPA_STATUS_INVALID_PARAM; } } icp_adf_getQueueMemory(trans_handle, numberRequests, (void **)&pCurrentQatMsg); if (NULL == pCurrentQatMsg) { return CPA_STATUS_RETRY; } for (i = 0; i < numberRequests; i++) { dcDpWriteRingMsg(pOpData[i], pCurrentQatMsg); icp_adf_getQueueNext(trans_handle, (void **)&pCurrentQatMsg); } pSessionDesc->pendingDpStatelessCbCount += numberRequests; if (CPA_TRUE == performOpNow) { SalQatMsg_updateQueueTail(trans_handle); } return CPA_STATUS_SUCCESS; } CpaStatus icp_sal_DcPollDpInstance(CpaInstanceHandle dcInstance, Cpa32U responseQuota) { icp_comms_trans_handle trans_handle = NULL; LAC_CHECK_INSTANCE_HANDLE(dcInstance); SAL_CHECK_INSTANCE_TYPE(dcInstance, SAL_SERVICE_TYPE_COMPRESSION); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(dcInstance); trans_handle = ((sal_compression_service_t *)dcInstance) ->trans_handle_compression_rx; return icp_adf_pollQueue(trans_handle, responseQuota); } CpaStatus cpaDcDpPerformOpNow(CpaInstanceHandle dcInstance) { icp_comms_trans_handle trans_handle = NULL; LAC_CHECK_NULL_PARAM(dcInstance); SAL_CHECK_INSTANCE_TYPE(dcInstance, SAL_SERVICE_TYPE_COMPRESSION); /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(dcInstance); trans_handle = ((sal_compression_service_t *)dcInstance) ->trans_handle_compression_tx; if (CPA_TRUE == icp_adf_queueDataToSend(trans_handle)) { SalQatMsg_updateQueueTail(trans_handle); } return CPA_STATUS_SUCCESS; } diff --git a/sys/dev/qat/qat_api/common/compression/dc_ns_datapath.c b/sys/dev/qat/qat_api/common/compression/dc_ns_datapath.c new file mode 100644 index 000000000000..24602282dc5e --- /dev/null +++ b/sys/dev/qat/qat_api/common/compression/dc_ns_datapath.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ + +/** + ***************************************************************************** + * @file dc_ns_datapath.c + * + * @defgroup Dc_DataCompression DC Data Compression + * + * @ingroup Dc_DataCompression + * + * @description + * Implementation of the Data Compression datapath operations. + * + *****************************************************************************/ + +/* +******************************************************************************* +* Include public/global header files +******************************************************************************* +*/ +#include "cpa.h" +#include "cpa_dc.h" +#include "cpa_dc_dp.h" + +/* +******************************************************************************* +* Include private header files +******************************************************************************* +*/ +#include "dc_session.h" +#include "dc_datapath.h" +#include "sal_statistics.h" +#include "lac_common.h" +#include "lac_mem.h" +#include "lac_mem_pools.h" +#include "lac_log.h" +#include "sal_types_compression.h" +#include "dc_stats.h" +#include "lac_buffer_desc.h" +#include "lac_sal.h" +#include "lac_sync.h" +#include "sal_service_state.h" +#include "sal_qat_cmn_msg.h" +#include "dc_error_counter.h" + +CpaStatus +cpaDcNsDecompressData(CpaInstanceHandle dcInstance, + CpaDcNsSetupData *pSetupData, + CpaBufferList *pSrcBuff, + CpaBufferList *pDestBuff, + CpaDcOpData *pOpData, + CpaDcRqResults *pResults, + CpaDcCallbackFn callbackFn, + void *callbackTag) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcNsCompressData(CpaInstanceHandle dcInstance, + CpaDcNsSetupData *pSetupData, + CpaBufferList *pSrcBuff, + CpaBufferList *pDestBuff, + CpaDcOpData *pOpData, + CpaDcRqResults *pResults, + CpaDcCallbackFn callbackFn, + void *callbackTag) +{ + return CPA_STATUS_UNSUPPORTED; +} diff --git a/sys/dev/qat/qat_api/common/compression/dc_ns_header_footer.c b/sys/dev/qat/qat_api/common/compression/dc_ns_header_footer.c new file mode 100644 index 000000000000..a4031c0bd513 --- /dev/null +++ b/sys/dev/qat/qat_api/common/compression/dc_ns_header_footer.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ + +/** + ***************************************************************************** + * @file dc_ns_header_footer.c + * + * @ingroup Dc_DataCompression + * + * @description + * Implementation of the Data Compression header and footer operations. + * + *****************************************************************************/ + +/* + ******************************************************************************* + * Include public/global header files + ******************************************************************************* + */ +#include "cpa.h" +#include "cpa_dc.h" + +/* + ******************************************************************************* + * Include private header files + ******************************************************************************* + */ +#include "dc_session.h" + +CpaStatus +cpaDcNsGenerateHeader(CpaDcNsSetupData *pSetupData, + CpaFlatBuffer *pDestBuff, + Cpa32U *count) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcNsGenerateFooter(CpaDcNsSetupData *pSetupData, + Cpa64U totalLength, + CpaFlatBuffer *pDestBuff, + CpaDcRqResults *pResults) +{ + return CPA_STATUS_UNSUPPORTED; +} diff --git a/sys/dev/qat/qat_api/common/compression/dc_session.c b/sys/dev/qat/qat_api/common/compression/dc_session.c index fbce72cb7bfb..ab433adc18fd 100644 --- a/sys/dev/qat/qat_api/common/compression/dc_session.c +++ b/sys/dev/qat/qat_api/common/compression/dc_session.c @@ -1,1258 +1,1279 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file dc_session.c * * @ingroup Dc_DataCompression * * @description * Implementation of the Data Compression session operations. * *****************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ #include "cpa.h" #include "cpa_dc.h" #include "icp_qat_fw.h" #include "icp_qat_fw_comp.h" #include "icp_qat_hw.h" #include "icp_qat_hw_20_comp.h" /* ******************************************************************************* * Include private header files ******************************************************************************* */ #include "dc_session.h" #include "dc_datapath.h" #include "lac_mem_pools.h" #include "sal_types_compression.h" #include "lac_buffer_desc.h" #include "sal_service_state.h" #include "sal_qat_cmn_msg.h" #include "sal_hw_gen.h" /** ***************************************************************************** * @ingroup Dc_DataCompression * Check that pSessionData is valid * * @description * Check that all the parameters defined in the pSessionData are valid * * @param[in] pSessionData Pointer to a user instantiated structure * containing session data * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_FAIL Function failed to find device * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * @retval CPA_STATUS_UNSUPPORTED Unsupported algorithm/feature * *****************************************************************************/ CpaStatus dcCheckSessionData(const CpaDcSessionSetupData *pSessionData, CpaInstanceHandle dcInstance) { CpaDcInstanceCapabilities instanceCapabilities = { 0 }; cpaDcQueryCapabilities(dcInstance, &instanceCapabilities); if ((pSessionData->compLevel < CPA_DC_L1) || - (pSessionData->compLevel > CPA_DC_L9)) { + (pSessionData->compLevel > CPA_DC_L12)) { QAT_UTILS_LOG("Invalid compLevel value\n"); return CPA_STATUS_INVALID_PARAM; } if ((pSessionData->autoSelectBestHuffmanTree < CPA_DC_ASB_DISABLED) || - (pSessionData->autoSelectBestHuffmanTree > - CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_NO_HDRS)) { + (pSessionData->autoSelectBestHuffmanTree > CPA_DC_ASB_ENABLED)) { QAT_UTILS_LOG("Invalid autoSelectBestHuffmanTree value\n"); return CPA_STATUS_INVALID_PARAM; } if (pSessionData->compType != CPA_DC_DEFLATE) { QAT_UTILS_LOG("Invalid compType value\n"); return CPA_STATUS_INVALID_PARAM; } if ((pSessionData->huffType < CPA_DC_HT_STATIC) || (pSessionData->huffType > CPA_DC_HT_FULL_DYNAMIC) || (CPA_DC_HT_PRECOMP == pSessionData->huffType)) { QAT_UTILS_LOG("Invalid huffType value\n"); return CPA_STATUS_INVALID_PARAM; } if ((pSessionData->sessDirection < CPA_DC_DIR_COMPRESS) || (pSessionData->sessDirection > CPA_DC_DIR_COMBINED)) { QAT_UTILS_LOG("Invalid sessDirection value\n"); return CPA_STATUS_INVALID_PARAM; } if ((pSessionData->sessState < CPA_DC_STATEFUL) || (pSessionData->sessState > CPA_DC_STATELESS)) { QAT_UTILS_LOG("Invalid sessState value\n"); return CPA_STATUS_INVALID_PARAM; } if ((pSessionData->checksum < CPA_DC_NONE) || (pSessionData->checksum > CPA_DC_ADLER32)) { QAT_UTILS_LOG("Invalid checksum value\n"); return CPA_STATUS_INVALID_PARAM; } return CPA_STATUS_SUCCESS; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Populate the compression hardware block * * @description * This function will populate the compression hardware block and update * the size in bytes of the block * * @param[in] pSessionDesc Pointer to the session descriptor * @param[in] pCompConfig Pointer to slice config word * @param[in] compDecomp Direction of the operation * @param[in] enableDmm Delayed Match Mode * *****************************************************************************/ static void dcCompHwBlockPopulate(sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, icp_qat_hw_compression_config_t *pCompConfig, dc_request_dir_t compDecomp) { icp_qat_hw_compression_direction_t dir = ICP_QAT_HW_COMPRESSION_DIR_COMPRESS; icp_qat_hw_compression_algo_t algo = ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE; icp_qat_hw_compression_depth_t depth = ICP_QAT_HW_COMPRESSION_DEPTH_1; icp_qat_hw_compression_file_type_t filetype = ICP_QAT_HW_COMPRESSION_FILE_TYPE_0; icp_qat_hw_compression_delayed_match_t dmm; /* Set the direction */ if (DC_COMPRESSION_REQUEST == compDecomp) { dir = ICP_QAT_HW_COMPRESSION_DIR_COMPRESS; } else { dir = ICP_QAT_HW_COMPRESSION_DIR_DECOMPRESS; } if (CPA_DC_DEFLATE == pSessionDesc->compType) { algo = ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE; } else { QAT_UTILS_LOG("Algorithm not supported for Compression\n"); } /* Set delay match mode */ if (CPA_TRUE == pService->comp_device_data.enableDmm) { dmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_ENABLED; } else { dmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED; } /* Set the depth */ if (DC_DECOMPRESSION_REQUEST == compDecomp) { depth = ICP_QAT_HW_COMPRESSION_DEPTH_1; } else { switch (pSessionDesc->compLevel) { case CPA_DC_L1: depth = ICP_QAT_HW_COMPRESSION_DEPTH_1; break; case CPA_DC_L2: depth = ICP_QAT_HW_COMPRESSION_DEPTH_4; break; case CPA_DC_L3: depth = ICP_QAT_HW_COMPRESSION_DEPTH_8; break; case CPA_DC_L4: depth = ICP_QAT_HW_COMPRESSION_DEPTH_16; break; default: depth = pService->comp_device_data .highestHwCompressionDepth; break; } } /* The file type is set to ICP_QAT_HW_COMPRESSION_FILE_TYPE_0. The other * modes will be used in the future for precompiled huffman trees */ filetype = ICP_QAT_HW_COMPRESSION_FILE_TYPE_0; pCompConfig->lower_val = ICP_QAT_HW_COMPRESSION_CONFIG_BUILD( dir, dmm, algo, depth, filetype); /* Upper 32-bits of the configuration word do not need to be * configured with legacy devices. */ pCompConfig->upper_val = 0; } static void dcCompHwBlockPopulateGen4(sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, icp_qat_hw_compression_config_t *pCompConfig, dc_request_dir_t compDecomp) { /* Compression related */ if (DC_COMPRESSION_REQUEST == compDecomp) { icp_qat_hw_comp_20_config_csr_upper_t hw_comp_upper_csr; icp_qat_hw_comp_20_config_csr_lower_t hw_comp_lower_csr; memset(&hw_comp_upper_csr, 0, sizeof hw_comp_upper_csr); memset(&hw_comp_lower_csr, 0, sizeof hw_comp_lower_csr); /* Disable Literal + Length Limit Block Drop by default and * enable it only for dynamic deflate compression. */ hw_comp_lower_csr.lllbd = ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_DISABLED; switch (pSessionDesc->compType) { case CPA_DC_DEFLATE: /* DEFLATE algorithm settings */ hw_comp_lower_csr.skip_ctrl = ICP_QAT_HW_COMP_20_BYTE_SKIP_3BYTE_LITERAL; if (CPA_DC_HT_FULL_DYNAMIC == pSessionDesc->huffType) { hw_comp_lower_csr.algo = ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_ILZ77; } else /* Static DEFLATE */ { hw_comp_lower_csr.algo = ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_DEFLATE; hw_comp_upper_csr.scb_ctrl = ICP_QAT_HW_COMP_20_SCB_CONTROL_DISABLE; } if (CPA_DC_STATEFUL == pSessionDesc->sessState) { hw_comp_upper_csr.som_ctrl = ICP_QAT_HW_COMP_20_SOM_CONTROL_REPLAY_MODE; } break; default: QAT_UTILS_LOG("Compression algorithm not supported\n"); break; } /* Set the search depth */ switch (pSessionDesc->compLevel) { case CPA_DC_L1: case CPA_DC_L2: case CPA_DC_L3: case CPA_DC_L4: case CPA_DC_L5: hw_comp_lower_csr.sd = ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_1; hw_comp_lower_csr.hash_col = ICP_QAT_HW_COMP_20_SKIP_HASH_COLLISION_DONT_ALLOW; break; case CPA_DC_L6: case CPA_DC_L7: case CPA_DC_L8: hw_comp_lower_csr.sd = ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_6; break; case CPA_DC_L9: hw_comp_lower_csr.sd = ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_9; break; default: hw_comp_lower_csr.sd = pService->comp_device_data .highestHwCompressionDepth; if ((CPA_DC_HT_FULL_DYNAMIC == pSessionDesc->huffType) && (CPA_DC_DEFLATE == pSessionDesc->compType)) { /* Enable Literal + Length Limit Block Drop * with dynamic deflate compression when * highest compression levels are selected. */ hw_comp_lower_csr.lllbd = ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_ENABLED; } break; } /* Same for all algorithms */ hw_comp_lower_csr.abd = ICP_QAT_HW_COMP_20_ABD_ABD_DISABLED; hw_comp_lower_csr.hash_update = ICP_QAT_HW_COMP_20_SKIP_HASH_UPDATE_DONT_ALLOW; hw_comp_lower_csr.edmm = (CPA_TRUE == pService->comp_device_data.enableDmm) ? ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_ENABLED : ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_DISABLED; /* Hard-coded HW-specific values */ hw_comp_upper_csr.nice = ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_DEFAULT_VAL; hw_comp_upper_csr.lazy = ICP_QAT_HW_COMP_20_CONFIG_CSR_LAZY_PARAM_DEFAULT_VAL; pCompConfig->upper_val = ICP_QAT_FW_COMP_20_BUILD_CONFIG_UPPER(hw_comp_upper_csr); pCompConfig->lower_val = ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER(hw_comp_lower_csr); } else /* Decompress */ { icp_qat_hw_decomp_20_config_csr_lower_t hw_decomp_lower_csr; memset(&hw_decomp_lower_csr, 0, sizeof hw_decomp_lower_csr); /* Set the algorithm */ if (CPA_DC_DEFLATE == pSessionDesc->compType) { hw_decomp_lower_csr.algo = ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_DEFLATE; } else { QAT_UTILS_LOG("Algorithm not supported for " "Decompression\n"); } pCompConfig->upper_val = 0; pCompConfig->lower_val = ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_LOWER( hw_decomp_lower_csr); } } /** ***************************************************************************** * @ingroup Dc_DataCompression * Populate the compression content descriptor * * @description * This function will populate the compression content descriptor * * @param[in] pService Pointer to the service * @param[in] pSessionDesc Pointer to the session descriptor * @param[in] contextBufferAddrPhys Physical address of the context buffer * @param[out] pMsg Pointer to the compression message * @param[in] nextSlice Next slice * @param[in] compDecomp Direction of the operation * *****************************************************************************/ static void dcCompContentDescPopulate(sal_compression_service_t *pService, dc_session_desc_t *pSessionDesc, CpaPhysicalAddr contextBufferAddrPhys, icp_qat_fw_comp_req_t *pMsg, icp_qat_fw_slice_t nextSlice, dc_request_dir_t compDecomp) { icp_qat_fw_comp_cd_hdr_t *pCompControlBlock = NULL; icp_qat_hw_compression_config_t *pCompConfig = NULL; CpaBoolean bankEnabled = CPA_FALSE; pCompControlBlock = (icp_qat_fw_comp_cd_hdr_t *)&(pMsg->comp_cd_ctrl); pCompConfig = (icp_qat_hw_compression_config_t *)(pMsg->cd_pars.sl .comp_slice_cfg_word); ICP_QAT_FW_COMN_NEXT_ID_SET(pCompControlBlock, nextSlice); ICP_QAT_FW_COMN_CURR_ID_SET(pCompControlBlock, ICP_QAT_FW_SLICE_COMP); pCompControlBlock->comp_cfg_offset = 0; if ((CPA_DC_STATEFUL == pSessionDesc->sessState) && (CPA_DC_DEFLATE == pSessionDesc->compType) && (DC_DECOMPRESSION_REQUEST == compDecomp)) { /* Enable A, B, C, D, and E (CAMs). */ pCompControlBlock->ram_bank_flags = ICP_QAT_FW_COMP_RAM_FLAGS_BUILD( ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank I */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank H */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank G */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank F */ ICP_QAT_FW_COMP_BANK_ENABLED, /* Bank E */ ICP_QAT_FW_COMP_BANK_ENABLED, /* Bank D */ ICP_QAT_FW_COMP_BANK_ENABLED, /* Bank C */ ICP_QAT_FW_COMP_BANK_ENABLED, /* Bank B */ ICP_QAT_FW_COMP_BANK_ENABLED); /* Bank A */ bankEnabled = CPA_TRUE; } else { /* Disable all banks */ pCompControlBlock->ram_bank_flags = ICP_QAT_FW_COMP_RAM_FLAGS_BUILD( ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank I */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank H */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank G */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank F */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank E */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank D */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank C */ ICP_QAT_FW_COMP_BANK_DISABLED, /* Bank B */ ICP_QAT_FW_COMP_BANK_DISABLED); /* Bank A */ } if (DC_COMPRESSION_REQUEST == compDecomp) { LAC_MEM_SHARED_WRITE_VIRT_TO_PHYS_PTR_EXTERNAL( pService->generic_service_info, pCompControlBlock->comp_state_addr, pSessionDesc->stateRegistersComp); } else { LAC_MEM_SHARED_WRITE_VIRT_TO_PHYS_PTR_EXTERNAL( pService->generic_service_info, pCompControlBlock->comp_state_addr, pSessionDesc->stateRegistersDecomp); } if (CPA_TRUE == bankEnabled) { pCompControlBlock->ram_banks_addr = contextBufferAddrPhys; } else { pCompControlBlock->ram_banks_addr = 0; } pCompControlBlock->resrvd = 0; /* Populate Compression Hardware Setup Block */ if (isDcGen4x(pService)) { dcCompHwBlockPopulateGen4(pService, pSessionDesc, pCompConfig, compDecomp); } else if (isDcGen2x(pService)) { dcCompHwBlockPopulate(pService, pSessionDesc, pCompConfig, compDecomp); } else { QAT_UTILS_LOG("Invalid QAT generation value\n"); } } /** ***************************************************************************** * @ingroup Dc_DataCompression * Populate the translator content descriptor * * @description * This function will populate the translator content descriptor * * @param[out] pMsg Pointer to the compression message * @param[in] nextSlice Next slice * *****************************************************************************/ void dcTransContentDescPopulate(icp_qat_fw_comp_req_t *pMsg, icp_qat_fw_slice_t nextSlice) { icp_qat_fw_xlt_cd_hdr_t *pTransControlBlock = NULL; pTransControlBlock = (icp_qat_fw_xlt_cd_hdr_t *)&(pMsg->u2.xlt_cd_ctrl); ICP_QAT_FW_COMN_NEXT_ID_SET(pTransControlBlock, nextSlice); ICP_QAT_FW_COMN_CURR_ID_SET(pTransControlBlock, ICP_QAT_FW_SLICE_XLAT); pTransControlBlock->resrvd1 = 0; pTransControlBlock->resrvd2 = 0; pTransControlBlock->resrvd3 = 0; } /** ***************************************************************************** * @ingroup Dc_DataCompression * Get the context size and the history size * * @description * This function will get the size of the context buffer and the history * buffer. The history buffer is a subset of the context buffer and its * size is needed for stateful compression. * @param[in] dcInstance DC Instance Handle * * @param[in] pSessionData Pointer to a user instantiated * structure containing session data * @param[out] pContextSize Pointer to the context size * * @retval CPA_STATUS_SUCCESS Function executed successfully * * *****************************************************************************/ static CpaStatus dcGetContextSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData *pSessionData, Cpa32U *pContextSize) { sal_compression_service_t *pCompService = NULL; pCompService = (sal_compression_service_t *)dcInstance; *pContextSize = 0; if ((CPA_DC_STATEFUL == pSessionData->sessState) && (CPA_DC_DIR_COMPRESS != pSessionData->sessDirection)) { switch (pSessionData->compType) { case CPA_DC_DEFLATE: *pContextSize = pCompService->comp_device_data.inflateContextSize; break; default: QAT_UTILS_LOG("Invalid compression algorithm."); return CPA_STATUS_FAIL; } } return CPA_STATUS_SUCCESS; } CpaStatus dcGetCompressCommandId(sal_compression_service_t *pService, CpaDcSessionSetupData *pSessionData, Cpa8U *pDcCmdId) { CpaStatus status = CPA_STATUS_SUCCESS; LAC_CHECK_NULL_PARAM(pService); LAC_CHECK_NULL_PARAM(pSessionData); LAC_CHECK_NULL_PARAM(pDcCmdId); switch (pSessionData->compType) { case CPA_DC_DEFLATE: *pDcCmdId = (CPA_DC_HT_FULL_DYNAMIC == pSessionData->huffType) ? ICP_QAT_FW_COMP_CMD_DYNAMIC : ICP_QAT_FW_COMP_CMD_STATIC; break; default: QAT_UTILS_LOG("Algorithm not supported for " "compression\n"); status = CPA_STATUS_UNSUPPORTED; break; } return status; } CpaStatus dcGetDecompressCommandId(sal_compression_service_t *pService, CpaDcSessionSetupData *pSessionData, Cpa8U *pDcCmdId) { CpaStatus status = CPA_STATUS_SUCCESS; LAC_CHECK_NULL_PARAM(pService); LAC_CHECK_NULL_PARAM(pSessionData); LAC_CHECK_NULL_PARAM(pDcCmdId); switch (pSessionData->compType) { case CPA_DC_DEFLATE: *pDcCmdId = ICP_QAT_FW_COMP_CMD_DECOMPRESS; break; default: QAT_UTILS_LOG("Algorithm not supported for " "decompression\n"); status = CPA_STATUS_UNSUPPORTED; break; } return status; } CpaStatus dcInitSession(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaDcSessionSetupData *pSessionData, CpaBufferList *pContextBuffer, CpaDcCallbackFn callbackFn) { CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *pService = NULL; icp_qat_fw_comp_req_t *pReqCache = NULL; dc_session_desc_t *pSessionDesc = NULL; CpaPhysicalAddr contextAddrPhys = 0; CpaPhysicalAddr physAddress = 0; CpaPhysicalAddr physAddressAligned = 0; Cpa32U minContextSize = 0, historySize = 0; Cpa32U rpCmdFlags = 0; icp_qat_fw_serv_specif_flags cmdFlags = 0; Cpa8U secureRam = ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF; Cpa8U sessType = ICP_QAT_FW_COMP_STATELESS_SESSION; Cpa8U autoSelectBest = ICP_QAT_FW_COMP_NOT_AUTO_SELECT_BEST; Cpa8U enhancedAutoSelectBest = ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST; Cpa8U disableType0EnhancedAutoSelectBest = ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST; icp_qat_fw_la_cmd_id_t dcCmdId = (icp_qat_fw_la_cmd_id_t)ICP_QAT_FW_COMP_CMD_STATIC; icp_qat_fw_comn_flags cmnRequestFlags = 0; dc_integrity_crc_fw_t *pDataIntegrityCrcs = NULL; cmnRequestFlags = ICP_QAT_FW_COMN_FLAGS_BUILD(DC_DEFAULT_QAT_PTR_TYPE, QAT_COMN_CD_FLD_TYPE_16BYTE_DATA); pService = (sal_compression_service_t *)dcInstance; secureRam = pService->comp_device_data.useDevRam; LAC_CHECK_NULL_PARAM(pSessionHandle); LAC_CHECK_NULL_PARAM(pSessionData); /* Check that the parameters defined in the pSessionData are valid for * the * device */ if (CPA_STATUS_SUCCESS != dcCheckSessionData(pSessionData, dcInstance)) { return CPA_STATUS_INVALID_PARAM; } if ((CPA_DC_STATEFUL == pSessionData->sessState) && (CPA_DC_DIR_DECOMPRESS != pSessionData->sessDirection)) { QAT_UTILS_LOG("Stateful sessions are not supported.\n"); return CPA_STATUS_UNSUPPORTED; } /* Check for Gen4 and stateful, return error if both exist */ if ((isDcGen4x(pService)) && (CPA_DC_STATEFUL == pSessionData->sessState && CPA_DC_DIR_DECOMPRESS != pSessionData->sessDirection)) { QAT_UTILS_LOG("Stateful sessions are not supported for " "compression direction"); return CPA_STATUS_UNSUPPORTED; } if ((isDcGen2x(pService)) && (CPA_DC_HT_FULL_DYNAMIC == pSessionData->huffType)) { /* Test if DRAM is available for the intermediate buffers */ if ((NULL == pService->pInterBuffPtrsArray) && (0 == pService->pInterBuffPtrsArrayPhyAddr)) { if (CPA_DC_ASB_STATIC_DYNAMIC == pSessionData->autoSelectBestHuffmanTree) { /* Define the Huffman tree as static */ pSessionData->huffType = CPA_DC_HT_STATIC; } else { QAT_UTILS_LOG( "No buffer defined for this instance - " "see cpaDcStartInstance.\n"); return CPA_STATUS_RESOURCE; } } } if ((CPA_DC_STATEFUL == pSessionData->sessState) && (CPA_DC_DEFLATE == pSessionData->compType)) { /* Get the size of the context buffer */ status = dcGetContextSize(dcInstance, pSessionData, &minContextSize); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG( "Unable to get the context size of the session.\n"); return CPA_STATUS_FAIL; } /* If the minContextSize is zero it means we will not save or * restore * any history */ if (0 != minContextSize) { Cpa64U contextBuffSize = 0; LAC_CHECK_NULL_PARAM(pContextBuffer); if (LacBuffDesc_BufferListVerify( pContextBuffer, &contextBuffSize, LAC_NO_ALIGNMENT_SHIFT) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } /* Ensure that the context buffer size is greater or * equal * to minContextSize */ if (contextBuffSize < minContextSize) { QAT_UTILS_LOG( "Context buffer size should be greater or equal to %d.\n", minContextSize); return CPA_STATUS_INVALID_PARAM; } } } /* Re-align the session structure to 64 byte alignment */ physAddress = LAC_OS_VIRT_TO_PHYS_EXTERNAL(pService->generic_service_info, (Cpa8U *)pSessionHandle + sizeof(void *)); if (physAddress == 0) { QAT_UTILS_LOG( "Unable to get the physical address of the session.\n"); return CPA_STATUS_FAIL; } physAddressAligned = (CpaPhysicalAddr)LAC_ALIGN_POW2_ROUNDUP(physAddress, LAC_64BYTE_ALIGNMENT); pSessionDesc = (dc_session_desc_t *) /* Move the session pointer by the physical offset between aligned and unaligned memory */ ((Cpa8U *)pSessionHandle + sizeof(void *) + (physAddressAligned - physAddress)); /* Save the aligned pointer in the first bytes (size of LAC_ARCH_UINT) * of the session memory */ *((LAC_ARCH_UINT *)pSessionHandle) = (LAC_ARCH_UINT)pSessionDesc; /* Zero the compression session */ LAC_OS_BZERO(pSessionDesc, sizeof(dc_session_desc_t)); /* Write the buffer descriptor for context/history */ if (0 != minContextSize) { status = LacBuffDesc_BufferListDescWrite( pContextBuffer, &contextAddrPhys, CPA_FALSE, &(pService->generic_service_info)); if (status != CPA_STATUS_SUCCESS) { return status; } pSessionDesc->pContextBuffer = pContextBuffer; pSessionDesc->historyBuffSize = historySize; } pSessionDesc->cumulativeConsumedBytes = 0; /* Initialise pSessionDesc */ pSessionDesc->requestType = DC_REQUEST_FIRST; pSessionDesc->huffType = pSessionData->huffType; pSessionDesc->compType = pSessionData->compType; pSessionDesc->checksumType = pSessionData->checksum; pSessionDesc->autoSelectBestHuffmanTree = pSessionData->autoSelectBestHuffmanTree; pSessionDesc->sessDirection = pSessionData->sessDirection; pSessionDesc->sessState = pSessionData->sessState; pSessionDesc->compLevel = pSessionData->compLevel; pSessionDesc->isDcDp = CPA_FALSE; pSessionDesc->minContextSize = minContextSize; pSessionDesc->isSopForCompressionProcessed = CPA_FALSE; pSessionDesc->isSopForDecompressionProcessed = CPA_FALSE; if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { pSessionDesc->previousChecksum = 1; } else { pSessionDesc->previousChecksum = 0; } if (CPA_DC_STATEFUL == pSessionData->sessState) { /* Init the spinlock used to lock the access to the number of * stateful * in-flight requests */ status = LAC_SPINLOCK_INIT(&(pSessionDesc->sessionLock)); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG( "Spinlock init failed for sessionLock.\n"); return CPA_STATUS_RESOURCE; } } /* For asynchronous - use the user supplied callback * for synchronous - use the internal synchronous callback */ pSessionDesc->pCompressionCb = ((void *)NULL != (void *)callbackFn) ? callbackFn : LacSync_GenWakeupSyncCaller; /* Reset the pending callback counters */ qatUtilsAtomicSet(0, &pSessionDesc->pendingStatelessCbCount); qatUtilsAtomicSet(0, &pSessionDesc->pendingStatefulCbCount); pSessionDesc->pendingDpStatelessCbCount = 0; if (CPA_DC_DIR_DECOMPRESS != pSessionData->sessDirection) { if ((isDcGen2x(pService)) && CPA_DC_HT_FULL_DYNAMIC == pSessionData->huffType) { /* Populate the compression section of the content * descriptor */ dcCompContentDescPopulate(pService, pSessionDesc, contextAddrPhys, &(pSessionDesc->reqCacheComp), ICP_QAT_FW_SLICE_XLAT, DC_COMPRESSION_REQUEST); /* Populate the translator section of the content * descriptor */ dcTransContentDescPopulate( &(pSessionDesc->reqCacheComp), ICP_QAT_FW_SLICE_DRAM_WR); if (0 != pService->pInterBuffPtrsArrayPhyAddr) { pReqCache = &(pSessionDesc->reqCacheComp); pReqCache->u1.xlt_pars.inter_buff_ptr = pService->pInterBuffPtrsArrayPhyAddr; } } else { dcCompContentDescPopulate(pService, pSessionDesc, contextAddrPhys, &(pSessionDesc->reqCacheComp), ICP_QAT_FW_SLICE_DRAM_WR, DC_COMPRESSION_REQUEST); } } /* Populate the compression section of the content descriptor for * the decompression case or combined */ if (CPA_DC_DIR_COMPRESS != pSessionData->sessDirection) { dcCompContentDescPopulate(pService, pSessionDesc, contextAddrPhys, &(pSessionDesc->reqCacheDecomp), ICP_QAT_FW_SLICE_DRAM_WR, DC_DECOMPRESSION_REQUEST); } if (CPA_DC_STATEFUL == pSessionData->sessState) { sessType = ICP_QAT_FW_COMP_STATEFUL_SESSION; LAC_OS_BZERO(&pSessionDesc->stateRegistersComp, sizeof(pSessionDesc->stateRegistersComp)); LAC_OS_BZERO(&pSessionDesc->stateRegistersDecomp, sizeof(pSessionDesc->stateRegistersDecomp)); } /* Get physical address of E2E CRC buffer */ pSessionDesc->physDataIntegrityCrcs = (icp_qat_addr_width_t) LAC_OS_VIRT_TO_PHYS_EXTERNAL(pService->generic_service_info, &pSessionDesc->dataIntegrityCrcs); if (0 == pSessionDesc->physDataIntegrityCrcs) { QAT_UTILS_LOG( "Unable to get the physical address of Data Integrity buffer.\n"); return CPA_STATUS_FAIL; } /* Initialize default CRC parameters */ pDataIntegrityCrcs = &pSessionDesc->dataIntegrityCrcs; pDataIntegrityCrcs->crc32 = 0; pDataIntegrityCrcs->adler32 = 1; if (isDcGen2x(pService)) { pDataIntegrityCrcs->oCrc32Cpr = DC_INVALID_CRC; pDataIntegrityCrcs->iCrc32Cpr = DC_INVALID_CRC; pDataIntegrityCrcs->oCrc32Xlt = DC_INVALID_CRC; pDataIntegrityCrcs->iCrc32Xlt = DC_INVALID_CRC; pDataIntegrityCrcs->xorFlags = DC_XOR_FLAGS_DEFAULT; pDataIntegrityCrcs->crcPoly = DC_CRC_POLY_DEFAULT; pDataIntegrityCrcs->xorOut = DC_XOR_OUT_DEFAULT; } else { pDataIntegrityCrcs->iCrc64Cpr = DC_INVALID_CRC; pDataIntegrityCrcs->oCrc64Cpr = DC_INVALID_CRC; pDataIntegrityCrcs->iCrc64Xlt = DC_INVALID_CRC; pDataIntegrityCrcs->oCrc64Xlt = DC_INVALID_CRC; pDataIntegrityCrcs->crc64Poly = DC_CRC64_POLY_DEFAULT; pDataIntegrityCrcs->xor64Out = DC_XOR64_OUT_DEFAULT; } /* Initialise seed checksums. * It initializes swCrc32I, swCrc32O, too(union). */ pSessionDesc->seedSwCrc.swCrc64I = 0; pSessionDesc->seedSwCrc.swCrc64O = 0; /* Populate the cmdFlags */ switch (pSessionDesc->autoSelectBestHuffmanTree) { case CPA_DC_ASB_DISABLED: break; case CPA_DC_ASB_STATIC_DYNAMIC: autoSelectBest = ICP_QAT_FW_COMP_AUTO_SELECT_BEST; break; case CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_STORED_HDRS: autoSelectBest = ICP_QAT_FW_COMP_AUTO_SELECT_BEST; enhancedAutoSelectBest = ICP_QAT_FW_COMP_ENH_AUTO_SELECT_BEST; break; case CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_NO_HDRS: autoSelectBest = ICP_QAT_FW_COMP_AUTO_SELECT_BEST; enhancedAutoSelectBest = ICP_QAT_FW_COMP_ENH_AUTO_SELECT_BEST; disableType0EnhancedAutoSelectBest = ICP_QAT_FW_COMP_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST; break; + case CPA_DC_ASB_ENABLED: + if (pService->comp_device_data.asbEnableSupport == CPA_FALSE) { + autoSelectBest = ICP_QAT_FW_COMP_AUTO_SELECT_BEST; + enhancedAutoSelectBest = + ICP_QAT_FW_COMP_ENH_AUTO_SELECT_BEST; + } + break; default: break; } rpCmdFlags = ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( ICP_QAT_FW_COMP_SOP, ICP_QAT_FW_COMP_EOP, ICP_QAT_FW_COMP_BFINAL, ICP_QAT_FW_COMP_NO_CNV, ICP_QAT_FW_COMP_NO_CNV_RECOVERY, ICP_QAT_FW_COMP_NO_CNV_DFX, ICP_QAT_FW_COMP_CRC_MODE_LEGACY); cmdFlags = ICP_QAT_FW_COMP_FLAGS_BUILD(sessType, autoSelectBest, enhancedAutoSelectBest, disableType0EnhancedAutoSelectBest, secureRam); if (CPA_DC_DIR_DECOMPRESS != pSessionData->sessDirection) { status = dcGetCompressCommandId(pService, pSessionData, (Cpa8U *)&dcCmdId); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG( "Couldn't get compress command ID for current " "session data."); return status; } pReqCache = &(pSessionDesc->reqCacheComp); pReqCache->comp_pars.req_par_flags = rpCmdFlags; pReqCache->comp_pars.crc.legacy.initial_adler = 1; pReqCache->comp_pars.crc.legacy.initial_crc32 = 0; /* Populate header of the common request message */ SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)pReqCache, ICP_QAT_FW_COMN_REQ_CPM_FW_COMP, (uint8_t)dcCmdId, cmnRequestFlags, cmdFlags); } if (CPA_DC_DIR_COMPRESS != pSessionData->sessDirection) { status = dcGetDecompressCommandId(pService, pSessionData, (Cpa8U *)&dcCmdId); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG( "Couldn't get decompress command ID for current " "session data."); return status; } pReqCache = &(pSessionDesc->reqCacheDecomp); pReqCache->comp_pars.req_par_flags = rpCmdFlags; pReqCache->comp_pars.crc.legacy.initial_adler = 1; pReqCache->comp_pars.crc.legacy.initial_crc32 = 0; /* Populate header of the common request message */ SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)pReqCache, ICP_QAT_FW_COMN_REQ_CPM_FW_COMP, (uint8_t)dcCmdId, cmnRequestFlags, cmdFlags); } return status; } CpaStatus cpaDcInitSession(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaDcSessionSetupData *pSessionData, CpaBufferList *pContextBuffer, CpaDcCallbackFn callbackFn) { CpaInstanceHandle insHandle = NULL; sal_compression_service_t *pService = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } LAC_CHECK_INSTANCE_HANDLE(insHandle); SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); pService = (sal_compression_service_t *)insHandle; /* Check if SAL is initialised otherwise return an error */ SAL_RUNNING_CHECK(pService); return dcInitSession(insHandle, pSessionHandle, pSessionData, pContextBuffer, callbackFn); } CpaStatus cpaDcResetSession(const CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle) { CpaStatus status = CPA_STATUS_SUCCESS; CpaInstanceHandle insHandle = NULL; sal_compression_service_t *pService = NULL; dc_session_desc_t *pSessionDesc = NULL; Cpa64U numPendingStateless = 0; Cpa64U numPendingStateful = 0; icp_comms_trans_handle trans_handle = NULL; dc_integrity_crc_fw_t *pDataIntegrityCrcs = NULL; dc_sw_checksums_t *pSwCrcs = NULL; LAC_CHECK_NULL_PARAM(pSessionHandle); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); LAC_CHECK_NULL_PARAM(pSessionDesc); if (CPA_TRUE == pSessionDesc->isDcDp) { insHandle = dcInstance; } else { if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } } LAC_CHECK_NULL_PARAM(insHandle); SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); /* Check if SAL is running otherwise return an error */ SAL_RUNNING_CHECK(insHandle); if (CPA_TRUE == pSessionDesc->isDcDp) { trans_handle = ((sal_compression_service_t *)insHandle) ->trans_handle_compression_tx; if (CPA_TRUE == icp_adf_queueDataToSend(trans_handle)) { /* Process the remaining messages on the ring */ SalQatMsg_updateQueueTail(trans_handle); QAT_UTILS_LOG( "There are remaining messages on the ring\n"); return CPA_STATUS_RETRY; } /* Check if there are stateless pending requests */ if (0 != pSessionDesc->pendingDpStatelessCbCount) { QAT_UTILS_LOG( "There are %llu stateless DP requests pending.\n", (unsigned long long) pSessionDesc->pendingDpStatelessCbCount); return CPA_STATUS_RETRY; } } else { numPendingStateless = qatUtilsAtomicGet(&(pSessionDesc->pendingStatelessCbCount)); numPendingStateful = qatUtilsAtomicGet(&(pSessionDesc->pendingStatefulCbCount)); /* Check if there are stateless pending requests */ if (0 != numPendingStateless) { QAT_UTILS_LOG( "There are %llu stateless requests pending.\n", (unsigned long long)numPendingStateless); return CPA_STATUS_RETRY; } /* Check if there are stateful pending requests */ if (0 != numPendingStateful) { QAT_UTILS_LOG( "There are %llu stateful requests pending.\n", (unsigned long long)numPendingStateful); return CPA_STATUS_RETRY; } /* Reset pSessionDesc */ pSessionDesc->requestType = DC_REQUEST_FIRST; pSessionDesc->cumulativeConsumedBytes = 0; if (CPA_DC_ADLER32 == pSessionDesc->checksumType) { pSessionDesc->previousChecksum = 1; } else { pSessionDesc->previousChecksum = 0; } pSessionDesc->cnvErrorInjection = ICP_QAT_FW_COMP_NO_CNV_DFX; /* Reset integrity CRCs to default parameters. */ pDataIntegrityCrcs = &pSessionDesc->dataIntegrityCrcs; memset(pDataIntegrityCrcs, 0, sizeof(dc_integrity_crc_fw_t)); pDataIntegrityCrcs->adler32 = 1; pService = (sal_compression_service_t *)insHandle; if (isDcGen2x(pService)) { pDataIntegrityCrcs->xorFlags = DC_XOR_FLAGS_DEFAULT; pDataIntegrityCrcs->crcPoly = DC_CRC_POLY_DEFAULT; pDataIntegrityCrcs->xorOut = DC_XOR_OUT_DEFAULT; } else { pDataIntegrityCrcs->crc64Poly = DC_CRC64_POLY_DEFAULT; pDataIntegrityCrcs->xor64Out = DC_XOR64_OUT_DEFAULT; } /* Reset seed SW checksums. */ pSwCrcs = &pSessionDesc->seedSwCrc; memset(pSwCrcs, 0, sizeof(dc_sw_checksums_t)); /* Reset integrity SW checksums. */ pSwCrcs = &pSessionDesc->integritySwCrc; memset(pSwCrcs, 0, sizeof(dc_sw_checksums_t)); } /* Reset the pending callback counters */ qatUtilsAtomicSet(0, &pSessionDesc->pendingStatelessCbCount); qatUtilsAtomicSet(0, &pSessionDesc->pendingStatefulCbCount); pSessionDesc->pendingDpStatelessCbCount = 0; if (CPA_DC_STATEFUL == pSessionDesc->sessState) { LAC_OS_BZERO(&pSessionDesc->stateRegistersComp, sizeof(pSessionDesc->stateRegistersComp)); LAC_OS_BZERO(&pSessionDesc->stateRegistersDecomp, sizeof(pSessionDesc->stateRegistersDecomp)); } return status; } +CpaStatus +cpaDcResetXXHashState(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaDcUpdateSession(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle, + CpaDcSessionUpdateData *pUpdateSessionData) +{ + return CPA_STATUS_UNSUPPORTED; +} + CpaStatus cpaDcRemoveSession(const CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle) { CpaStatus status = CPA_STATUS_SUCCESS; CpaInstanceHandle insHandle = NULL; dc_session_desc_t *pSessionDesc = NULL; Cpa64U numPendingStateless = 0; Cpa64U numPendingStateful = 0; icp_comms_trans_handle trans_handle = NULL; LAC_CHECK_NULL_PARAM(pSessionHandle); pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); LAC_CHECK_NULL_PARAM(pSessionDesc); if (CPA_TRUE == pSessionDesc->isDcDp) { insHandle = dcInstance; } else { if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } } LAC_CHECK_NULL_PARAM(insHandle); SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); /* Check if SAL is running otherwise return an error */ SAL_RUNNING_CHECK(insHandle); if (CPA_TRUE == pSessionDesc->isDcDp) { trans_handle = ((sal_compression_service_t *)insHandle) ->trans_handle_compression_tx; if (CPA_TRUE == icp_adf_queueDataToSend(trans_handle)) { /* Process the remaining messages on the ring */ SalQatMsg_updateQueueTail(trans_handle); QAT_UTILS_LOG( "There are remaining messages on the ring.\n"); return CPA_STATUS_RETRY; } /* Check if there are stateless pending requests */ if (0 != pSessionDesc->pendingDpStatelessCbCount) { QAT_UTILS_LOG( "There are %llu stateless DP requests pending.\n", (unsigned long long) pSessionDesc->pendingDpStatelessCbCount); return CPA_STATUS_RETRY; } } else { numPendingStateless = qatUtilsAtomicGet(&(pSessionDesc->pendingStatelessCbCount)); numPendingStateful = qatUtilsAtomicGet(&(pSessionDesc->pendingStatefulCbCount)); /* Check if there are stateless pending requests */ if (0 != numPendingStateless) { QAT_UTILS_LOG( "There are %llu stateless requests pending.\n", (unsigned long long)numPendingStateless); status = CPA_STATUS_RETRY; } /* Check if there are stateful pending requests */ if (0 != numPendingStateful) { QAT_UTILS_LOG( "There are %llu stateful requests pending.\n", (unsigned long long)numPendingStateful); status = CPA_STATUS_RETRY; } if ((CPA_DC_STATEFUL == pSessionDesc->sessState) && (CPA_STATUS_SUCCESS == status)) { LAC_SPINLOCK_DESTROY(&(pSessionDesc->sessionLock)); } } return status; } CpaStatus dcGetSessionSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData *pSessionData, Cpa32U *pSessionSize, Cpa32U *pContextSize) { CpaStatus status = CPA_STATUS_SUCCESS; CpaInstanceHandle insHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } /* Check parameters */ LAC_CHECK_NULL_PARAM(insHandle); LAC_CHECK_NULL_PARAM(pSessionData); LAC_CHECK_NULL_PARAM(pSessionSize); if (dcCheckSessionData(pSessionData, insHandle) != CPA_STATUS_SUCCESS) { return CPA_STATUS_INVALID_PARAM; } /* Get session size for session data */ *pSessionSize = sizeof(dc_session_desc_t) + LAC_64BYTE_ALIGNMENT + sizeof(LAC_ARCH_UINT); if (NULL != pContextSize) { status = dcGetContextSize(insHandle, pSessionData, pContextSize); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG( "Unable to get the context size of the session.\n"); return CPA_STATUS_FAIL; } } return CPA_STATUS_SUCCESS; } CpaStatus cpaDcGetSessionSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData *pSessionData, Cpa32U *pSessionSize, Cpa32U *pContextSize) { LAC_CHECK_NULL_PARAM(pContextSize); return dcGetSessionSize(dcInstance, pSessionData, pSessionSize, pContextSize); } CpaStatus dcSetCnvError(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle) { LAC_CHECK_NULL_PARAM(pSessionHandle); dc_session_desc_t *pSessionDesc = NULL; CpaInstanceHandle insHandle = NULL; sal_compression_service_t *pService = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } pService = (sal_compression_service_t *)insHandle; if (isDcGen2x(pService)) { QAT_UTILS_LOG("Unsupported compression feature.\n"); return CPA_STATUS_UNSUPPORTED; } pSessionDesc = DC_SESSION_DESC_FROM_CTX_GET(pSessionHandle); LAC_CHECK_NULL_PARAM(pSessionDesc); pSessionDesc->cnvErrorInjection = ICP_QAT_FW_COMP_CNV_DFX; return CPA_STATUS_SUCCESS; } diff --git a/sys/dev/qat/qat_api/common/compression/include/dc_session.h b/sys/dev/qat/qat_api/common/compression/include/dc_session.h index 041c60e5845c..108159f1190c 100644 --- a/sys/dev/qat/qat_api/common/compression/include/dc_session.h +++ b/sys/dev/qat/qat_api/common/compression/include/dc_session.h @@ -1,430 +1,428 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file dc_session.h * * @ingroup Dc_DataCompression * * @description * Definition of the Data Compression session parameters. * *****************************************************************************/ #ifndef DC_SESSION_H #define DC_SESSION_H #include "cpa_dc_dp.h" #include "icp_qat_fw_comp.h" #include "sal_qat_cmn_msg.h" #include "sal_types_compression.h" /* Maximum number of intermediate buffers SGLs for devices * with a maximum of 6 compression slices */ #define DC_QAT_MAX_NUM_INTER_BUFFERS_6COMP_SLICES (12) /* Maximum number of intermediate buffers SGLs for devices * with a maximum of 10 max compression slices */ #define DC_QAT_MAX_NUM_INTER_BUFFERS_10COMP_SLICES (20) /* Maximum number of intermediate buffers SGLs for devices * with a maximum of 24 max compression slices and 32 MEs */ #define DC_QAT_MAX_NUM_INTER_BUFFERS_24COMP_SLICES (64) /* Maximum size of the state registers 64 bytes */ #define DC_QAT_STATE_REGISTERS_MAX_SIZE (64) /* Size of the history window. * Base 2 logarithm of maximum window size minus 8 */ #define DC_4K_WINDOW_SIZE (4) #define DC_8K_WINDOW_SIZE (5) #define DC_16K_WINDOW_SIZE (6) #define DC_32K_WINDOW_SIZE (7) /* Context size */ #define DC_DEFLATE_MAX_CONTEXT_SIZE (49152) #define DC_INFLATE_CONTEXT_SIZE (36864) #define DC_DEFLATE_EH_MAX_CONTEXT_SIZE (65536) #define DC_DEFLATE_EH_MIN_CONTEXT_SIZE (49152) #define DC_INFLATE_EH_CONTEXT_SIZE (34032) /* Retrieve the session descriptor pointer from the session context structure * that the user allocates. The pointer to the internally realigned address * is stored at the start of the session context that the user allocates */ #define DC_SESSION_DESC_FROM_CTX_GET(pSession) \ (dc_session_desc_t *)(*(LAC_ARCH_UINT *)pSession) /* Maximum size for the compression part of the content descriptor */ #define DC_QAT_COMP_CONTENT_DESC_SIZE sizeof(icp_qat_fw_comp_cd_hdr_t) /* Maximum size for the translator part of the content descriptor */ #define DC_QAT_TRANS_CONTENT_DESC_SIZE \ (sizeof(icp_qat_fw_xlt_cd_hdr_t) + DC_QAT_MAX_TRANS_SETUP_BLK_SZ) /* Maximum size of the decompression content descriptor */ #define DC_QAT_CONTENT_DESC_DECOMP_MAX_SIZE \ LAC_ALIGN_POW2_ROUNDUP(DC_QAT_COMP_CONTENT_DESC_SIZE, \ (1 << LAC_64BYTE_ALIGNMENT_SHIFT)) /* Maximum size of the compression content descriptor */ #define DC_QAT_CONTENT_DESC_COMP_MAX_SIZE \ LAC_ALIGN_POW2_ROUNDUP(DC_QAT_COMP_CONTENT_DESC_SIZE + \ DC_QAT_TRANS_CONTENT_DESC_SIZE, \ (1 << LAC_64BYTE_ALIGNMENT_SHIFT)) /* Direction of the request */ typedef enum dc_request_dir_e { DC_COMPRESSION_REQUEST = 1, DC_DECOMPRESSION_REQUEST } dc_request_dir_t; /* Type of the compression request */ typedef enum dc_request_type_e { DC_REQUEST_FIRST = 1, DC_REQUEST_SUBSEQUENT } dc_request_type_t; typedef enum dc_block_type_e { DC_CLEARTEXT_TYPE = 0, DC_STATIC_TYPE, DC_DYNAMIC_TYPE } dc_block_type_t; /* Internal data structure supporting end to end data integrity checks. */ typedef struct dc_integrity_crc_fw_s { Cpa32U crc32; /* CRC32 checksum returned for compressed data */ Cpa32U adler32; /* ADLER32 checksum returned for compressed data */ union { struct { Cpa32U oCrc32Cpr; /* CRC32 checksum returned for data output by * compression accelerator */ Cpa32U iCrc32Cpr; /* CRC32 checksum returned for input data to compression * accelerator */ Cpa32U oCrc32Xlt; /* CRC32 checksum returned for data output by translator * accelerator */ Cpa32U iCrc32Xlt; /* CRC32 checksum returned for input data to translator * accelerator */ Cpa32U xorFlags; /* Initialise transactor pCRC controls in state register */ Cpa32U crcPoly; /* CRC32 polynomial used by hardware */ Cpa32U xorOut; /* CRC32 from XOR stage (Input CRC is xor'ed with value * in the state) */ Cpa32U deflateBlockType; /* Bit 1 - Bit 0 * 0 0 -> RAW DATA + Deflate header. * This will not produced any CRC check * because the output will not come * from the slices. It will be a simple * copy from input to output buffer * list. 0 1 -> Static deflate block type 1 0 -> * Dynamic deflate block type 1 1 -> Invalid type */ }; struct { Cpa64U iCrc64Cpr; /* CRC64 checksum returned for input data to compression * accelerator */ Cpa64U oCrc64Cpr; /* CRC64 checksum returned for data output by * compression accelerator */ Cpa64U iCrc64Xlt; /* CRC64 checksum returned for input data to translator * accelerator */ Cpa64U oCrc64Xlt; /* CRC64 checksum returned for data output by translator * accelerator */ Cpa64U crc64Poly; /* CRC64 polynomial used by hardware */ Cpa64U xor64Out; /* CRC64 from XOR stage (Input CRC is xor'ed with value * in the state) */ }; }; } dc_integrity_crc_fw_t; typedef struct dc_sw_checksums_s { union { struct { Cpa32U swCrc32I; Cpa32U swCrc32O; }; struct { Cpa64U swCrc64I; Cpa64U swCrc64O; }; }; } dc_sw_checksums_t; /* Session descriptor structure for compression */ typedef struct dc_session_desc_s { Cpa8U stateRegistersComp[DC_QAT_STATE_REGISTERS_MAX_SIZE]; /**< State registers for compression */ Cpa8U stateRegistersDecomp[DC_QAT_STATE_REGISTERS_MAX_SIZE]; /**< State registers for decompression */ icp_qat_fw_comp_req_t reqCacheComp; /**< Cache as much as possible of the compression request in a pre-built * request */ icp_qat_fw_comp_req_t reqCacheDecomp; /**< Cache as much as possible of the decompression request in a * pre-built * request */ dc_request_type_t requestType; /**< Type of the compression request. As stateful mode do not support * more * than one in-flight request there is no need to use spinlocks */ dc_request_type_t previousRequestType; /**< Type of the previous compression request. Used in cases where there * the * stateful operation needs to be resubmitted */ CpaDcHuffType huffType; /**< Huffman tree type */ CpaDcCompType compType; /**< Compression type */ CpaDcChecksum checksumType; /**< Type of checksum */ CpaDcAutoSelectBest autoSelectBestHuffmanTree; /**< Indicates if the implementation selects the best Huffman encoding */ CpaDcSessionDir sessDirection; /**< Session direction */ CpaDcSessionState sessState; /**< Session state */ - Cpa32U deflateWindowSize; - /**< Window size */ CpaDcCompLvl compLevel; /**< Compression level */ CpaDcCallbackFn pCompressionCb; /**< Callback function defined for the traditional compression session */ QatUtilsAtomic pendingStatelessCbCount; /**< Keeps track of number of pending requests on stateless session */ QatUtilsAtomic pendingStatefulCbCount; /**< Keeps track of number of pending requests on stateful session */ Cpa64U pendingDpStatelessCbCount; /**< Keeps track of number of data plane pending requests on stateless * session */ struct mtx sessionLock; /**< Lock used to provide exclusive access for number of stateful * in-flight * requests update */ CpaBoolean isDcDp; /**< Indicates if the data plane API is used */ Cpa32U minContextSize; /**< Indicates the minimum size required to allocate the context buffer */ CpaBufferList *pContextBuffer; /**< Context buffer */ Cpa32U historyBuffSize; /**< Size of the history buffer */ Cpa64U cumulativeConsumedBytes; /**< Cumulative amount of consumed bytes. Used to build the footer in * the * stateful case */ Cpa32U previousChecksum; /**< Save the previous value of the checksum. Used to process zero byte * stateful compression or decompression requests */ CpaBoolean isSopForCompressionProcessed; /**< Indicates whether a Compression Request is received in this session */ CpaBoolean isSopForDecompressionProcessed; /**< Indicates whether a Decompression Request is received in this * session */ /**< Data integrity table */ dc_integrity_crc_fw_t dataIntegrityCrcs; /**< Physical address of Data integrity buffer */ CpaPhysicalAddr physDataIntegrityCrcs; /* Seed checksums structure used to calculate software calculated * checksums. */ dc_sw_checksums_t seedSwCrc; /* Driver calculated integrity software CRC */ dc_sw_checksums_t integritySwCrc; /* Flag to disable or enable CnV Error Injection mechanism */ CpaBoolean cnvErrorInjection; } dc_session_desc_t; /** ***************************************************************************** * @ingroup Dc_DataCompression * Initialise a compression session * * @description * This function will initialise a compression session * * @param[in] dcInstance Instance handle derived from discovery * functions * @param[in,out] pSessionHandle Pointer to a session handle * @param[in,out] pSessionData Pointer to a user instantiated structure * containing session data * @param[in] pContextBuffer Pointer to context buffer * * @param[in] callbackFn For synchronous operation this callback * shall be a null pointer * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_FAIL Function failed * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * @retval CPA_STATUS_RESOURCE Error related to system resources *****************************************************************************/ CpaStatus dcInitSession(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaDcSessionSetupData *pSessionData, CpaBufferList *pContextBuffer, CpaDcCallbackFn callbackFn); /** ***************************************************************************** * @ingroup Dc_DataCompression * Get the size of the memory required to hold the session information * * @description * This function will get the size of the memory required to hold the * session information * * @param[in] dcInstance Instance handle derived from discovery * functions * @param[in] pSessionData Pointer to a user instantiated structure * containing session data * @param[out] pSessionSize On return, this parameter will be the size * of the memory that will be * required by cpaDcInitSession() for session * data. * @param[out] pContextSize On return, this parameter will be the size * of the memory that will be required * for context data. Context data is * save/restore data including history and * any implementation specific data that is * required for a save/restore operation. * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_FAIL Function failed * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in *****************************************************************************/ CpaStatus dcGetSessionSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData *pSessionData, Cpa32U *pSessionSize, Cpa32U *pContextSize); /** ***************************************************************************** * @ingroup Dc_DataCompression * Set the cnvErrorInjection flag in session descriptor * * @description * This function enables the CnVError injection for the session * passed in. All Compression requests sent within the session * are injected with CnV errors. This error injection is for the * duration of the session. Resetting the session results in * setting being cleared. CnV error injection does not apply to * Data Plane API. * * @param[in] dcInstance Instance Handle * @param[in] pSessionHandle Pointer to a session handle * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * @retval CPA_STATUS_UNSUPPORTED Unsupported feature *****************************************************************************/ CpaStatus dcSetCnvError(CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle); /** ***************************************************************************** * @ingroup Dc_DataCompression * Check that pSessionData is valid * * @description * Check that all the parameters defined in the pSessionData are valid * * @param[in] pSessionData Pointer to a user instantiated structure * containing session data * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_FAIL Function failed to find device * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in * @retval CPA_STATUS_UNSUPPORTED Unsupported algorithm/feature * *****************************************************************************/ CpaStatus dcCheckSessionData(const CpaDcSessionSetupData *pSessionData, CpaInstanceHandle dcInstance); /** ***************************************************************************** * @ingroup Dc_DataCompression * Get the compression command id for the given session setup data. * * @description * This function will get the compression command id based on parameters * passed in the given session setup data. * * @param[in] pService Pointer to the service * @param[in] pSessionData Pointer to a user instantiated * structure containing session data * @param[out] pDcCmdId Pointer to the command id * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_UNSUPPORTED Unsupported algorithm/feature * *****************************************************************************/ CpaStatus dcGetCompressCommandId(sal_compression_service_t *pService, CpaDcSessionSetupData *pSessionData, Cpa8U *pDcCmdId); /** ***************************************************************************** * @ingroup Dc_DataCompression * Get the decompression command id for the given session setup data. * * @description * This function will get the decompression command id based on parameters * passed in the given session setup data. * * @param[in] pService Pointer to the service * @param[in] pSessionData Pointer to a user instantiated * structure containing session data * @param[out] pDcCmdId Pointer to the command id * * @retval CPA_STATUS_SUCCESS Function executed successfully * @retval CPA_STATUS_UNSUPPORTED Unsupported algorithm/feature * *****************************************************************************/ CpaStatus dcGetDecompressCommandId(sal_compression_service_t *pService, CpaDcSessionSetupData *pSessionData, Cpa8U *pDcCmdId); /** ***************************************************************************** * @ingroup Dc_DataCompression * Populate the translator content descriptor * * @description * This function will populate the translator content descriptor * * @param[out] pMsg Pointer to the compression message * @param[in] nextSlice Next slice * *****************************************************************************/ void dcTransContentDescPopulate(icp_qat_fw_comp_req_t *pMsg, icp_qat_fw_slice_t nextSlice); #endif /* DC_SESSION_H */ diff --git a/sys/dev/qat/qat_api/common/crypto/sym/key/lac_sym_key.c b/sys/dev/qat/qat_api/common/crypto/sym/key/lac_sym_key.c index 604e5751fba9..cab8d6c7796c 100644 --- a/sys/dev/qat/qat_api/common/crypto/sym/key/lac_sym_key.c +++ b/sys/dev/qat/qat_api/common/crypto/sym/key/lac_sym_key.c @@ -1,3024 +1,3016 @@ /*************************************************************************** * * * ***************************************************************************/ /** ***************************************************************************** * @file lac_sym_key.c * * @ingroup LacSymKey * * This file contains the implementation of all keygen functionality * *****************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ #include "cpa.h" #include "cpa_cy_key.h" #include "cpa_cy_im.h" /* ******************************************************************************* * Include private header files ******************************************************************************* */ #include "icp_accel_devices.h" #include "icp_adf_debug.h" #include "icp_adf_init.h" #include "icp_adf_transport.h" #include "qat_utils.h" #include "lac_log.h" #include "lac_hooks.h" #include "lac_sym.h" #include "lac_sym_qat_hash_defs_lookup.h" #include "lac_sym_qat.h" #include "lac_sal.h" #include "lac_sym_key.h" #include "lac_sal_types_crypto.h" #include "sal_service_state.h" #include "lac_sym_qat_key.h" #include "lac_sym_hash_defs.h" #include "sal_statistics.h" /* Number of statistics */ #define LAC_KEY_NUM_STATS (sizeof(CpaCyKeyGenStats64) / sizeof(Cpa64U)) #define LAC_KEY_STAT_INC(statistic, instanceHandle) \ do { \ sal_crypto_service_t *pService = NULL; \ pService = (sal_crypto_service_t *)instanceHandle; \ if (CPA_TRUE == \ pService->generic_service_info.stats \ ->bKeyGenStatsEnabled) { \ qatUtilsAtomicInc( \ &pService \ ->pLacKeyStats[offsetof(CpaCyKeyGenStats64, \ statistic) / \ sizeof(Cpa64U)]); \ } \ } while (0) /**< Macro to increment a Key stat (derives offset into array of atomics) */ #define LAC_KEY_STATS32_GET(keyStats, instanceHandle) \ do { \ int i; \ sal_crypto_service_t *pService = \ (sal_crypto_service_t *)instanceHandle; \ for (i = 0; i < LAC_KEY_NUM_STATS; i++) { \ ((Cpa32U *)&(keyStats))[i] = \ (Cpa32U)qatUtilsAtomicGet( \ &pService->pLacKeyStats[i]); \ } \ } while (0) /**< Macro to get all 32bit Key stats (from internal array of atomics) */ #define LAC_KEY_STATS64_GET(keyStats, instanceHandle) \ do { \ int i; \ sal_crypto_service_t *pService = \ (sal_crypto_service_t *)instanceHandle; \ for (i = 0; i < LAC_KEY_NUM_STATS; i++) { \ ((Cpa64U *)&(keyStats))[i] = \ qatUtilsAtomicGet(&pService->pLacKeyStats[i]); \ } \ } while (0) /**< Macro to get all 64bit Key stats (from internal array of atomics) */ #define IS_HKDF_UNSUPPORTED(cmdId, hkdfSupported) \ ((ICP_QAT_FW_LA_CMD_HKDF_EXTRACT <= cmdId && \ ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND_LABEL >= cmdId) && \ !hkdfSupported) /**< macro to check whether the HKDF algorithm can be \ supported on the device */ /* Sublabel for HKDF TLS Key Generation, as defined in RFC8446. */ const static Cpa8U key256[HKDF_SUB_LABEL_KEY_LENGTH] = { 0, 16, 9, 't', 'l', 's', '1', '3', ' ', 'k', 'e', 'y', 0 }; const static Cpa8U key384[HKDF_SUB_LABEL_KEY_LENGTH] = { 0, 32, 9, 't', 'l', 's', '1', '3', ' ', 'k', 'e', 'y', 0 }; const static Cpa8U keyChaChaPoly[HKDF_SUB_LABEL_KEY_LENGTH] = { 0, 32, 9, 't', 'l', 's', '1', '3', ' ', 'k', 'e', 'y', 0 }; /* Sublabel for HKDF TLS IV key Generation, as defined in RFC8446. */ const static Cpa8U iv256[HKDF_SUB_LABEL_IV_LENGTH] = { 0, 12, 8, 't', 'l', 's', '1', '3', ' ', 'i', 'v', 0 }; const static Cpa8U iv384[HKDF_SUB_LABEL_IV_LENGTH] = { 0, 12, 8, 't', 'l', 's', '1', '3', ' ', 'i', 'v', 0 }; /* Sublabel for HKDF TLS RESUMPTION key Generation, as defined in RFC8446. */ const static Cpa8U resumption256[HKDF_SUB_LABEL_RESUMPTION_LENGTH] = { 0, 32, 16, 't', 'l', 's', '1', '3', ' ', 'r', 'e', 's', 'u', 'm', 'p', 't', 'i', 'o', 'n', 0 }; const static Cpa8U resumption384[HKDF_SUB_LABEL_RESUMPTION_LENGTH] = { 0, 48, 16, 't', 'l', 's', '1', '3', ' ', 'r', 'e', 's', 'u', 'm', 'p', 't', 'i', 'o', 'n', 0 }; /* Sublabel for HKDF TLS FINISHED key Generation, as defined in RFC8446. */ const static Cpa8U finished256[HKDF_SUB_LABEL_FINISHED_LENGTH] = { 0, 32, 14, 't', 'l', 's', '1', '3', ' ', 'f', 'i', 'n', 'i', 's', 'h', 'e', 'd', 0 }; const static Cpa8U finished384[HKDF_SUB_LABEL_FINISHED_LENGTH] = { 0, 48, 14, 't', 'l', 's', '1', '3', ' ', 'f', 'i', 'n', 'i', 's', 'h', 'e', 'd', 0 }; /** ****************************************************************************** * @ingroup LacSymKey * SSL/TLS stat type * * @description * This enum determines which stat should be incremented *****************************************************************************/ typedef enum { LAC_KEY_REQUESTS = 0, /**< Key requests sent */ LAC_KEY_REQUEST_ERRORS, /**< Key requests errors */ LAC_KEY_COMPLETED, /**< Key requests which received responses */ LAC_KEY_COMPLETED_ERRORS /**< Key requests which received responses with errors */ } lac_key_stat_type_t; /*** Local functions prototypes ***/ static void LacSymKey_MgfHandleResponse(icp_qat_fw_la_cmd_id_t lacCmdId, void *pOpaqueData, icp_qat_fw_comn_flags cmnRespFlags); static CpaStatus LacSymKey_MgfSync(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const void *pKeyGenMgfOpData, CpaFlatBuffer *pGeneratedMaskBuffer, CpaBoolean bIsExtRequest); static void LacSymKey_SslTlsHandleResponse(icp_qat_fw_la_cmd_id_t lacCmdId, void *pOpaqueData, icp_qat_fw_comn_flags cmnRespFlags); static CpaStatus LacSymKey_SslTlsSync(CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, icp_qat_fw_la_cmd_id_t lacCmdId, void *pKeyGenSslTlsOpData, Cpa8U hashAlgorithm, CpaFlatBuffer *pKeyGenOutpuData); /*** Implementation ***/ /** ****************************************************************************** * @ingroup LacSymKey * Get the instance handle. Support single handle. * @param[in] instanceHandle_in user supplied handle. * @retval CpaInstanceHandle the instance handle */ static CpaInstanceHandle LacKey_GetHandle(CpaInstanceHandle instanceHandle_in) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } return instanceHandle; } /** ******************************************************************************* * @ingroup LacSymKey * Perform SSL/TLS key gen operation * * @description * Perform SSL/TLS key gen operation * * @param[in] instanceHandle QAT device handle. * @param[in] pKeyGenCb Pointer to callback function to be invoked * when the operation is complete. * @param[in] pCallbackTag Opaque User Data for this specific call. * @param[in] lacCmdId Lac command ID (identify SSL & TLS ops) * @param[in] pKeyGenSslTlsOpData Structure containing all the data needed to * perform the SSL/TLS key generation * operation. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pKeyGenOutputData pointer to where output result should be * written * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Function should be retried. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * *****************************************************************************/ static CpaStatus LacSymKey_KeyGenSslTls_GenCommon(CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, icp_qat_fw_la_cmd_id_t lacCmdId, void *pKeyGenSslTlsOpData, Cpa8U hashAlgorithm, CpaFlatBuffer *pKeyGenOutputData); /** ****************************************************************************** * @ingroup LacSymKey * Increment stat for TLS or SSL operation * * @description * This is a generic function to update the stats for either a TLS or SSL * operation. * * @param[in] lacCmdId Indicate SSL or TLS operations * @param[in] statType Statistics Type * @param[in] instanceHandle Instance Handle * * @return None * *****************************************************************************/ static void LacKey_StatsInc(icp_qat_fw_la_cmd_id_t lacCmdId, lac_key_stat_type_t statType, CpaInstanceHandle instanceHandle) { if (ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE == lacCmdId) { switch (statType) { case LAC_KEY_REQUESTS: LAC_KEY_STAT_INC(numSslKeyGenRequests, instanceHandle); break; case LAC_KEY_REQUEST_ERRORS: LAC_KEY_STAT_INC(numSslKeyGenRequestErrors, instanceHandle); break; case LAC_KEY_COMPLETED: LAC_KEY_STAT_INC(numSslKeyGenCompleted, instanceHandle); break; case LAC_KEY_COMPLETED_ERRORS: LAC_KEY_STAT_INC(numSslKeyGenCompletedErrors, instanceHandle); break; default: QAT_UTILS_LOG("Invalid statistics type\n"); break; } } else /* TLS v1.0/1.1 and 1.2 */ { switch (statType) { case LAC_KEY_REQUESTS: LAC_KEY_STAT_INC(numTlsKeyGenRequests, instanceHandle); break; case LAC_KEY_REQUEST_ERRORS: LAC_KEY_STAT_INC(numTlsKeyGenRequestErrors, instanceHandle); break; case LAC_KEY_COMPLETED: LAC_KEY_STAT_INC(numTlsKeyGenCompleted, instanceHandle); break; case LAC_KEY_COMPLETED_ERRORS: LAC_KEY_STAT_INC(numTlsKeyGenCompletedErrors, instanceHandle); break; default: QAT_UTILS_LOG("Invalid statistics type\n"); break; } } } void LacKeygen_StatsShow(CpaInstanceHandle instanceHandle) { CpaCyKeyGenStats64 keyStats = { 0 }; LAC_KEY_STATS64_GET(keyStats, instanceHandle); QAT_UTILS_LOG(SEPARATOR BORDER " Key Stats: " BORDER "\n" SEPARATOR); QAT_UTILS_LOG(BORDER " SSL Key Requests: %16llu " BORDER "\n" BORDER " SSL Key Request Errors: %16llu " BORDER "\n" BORDER " SSL Key Completed %16llu " BORDER "\n" BORDER " SSL Key Complete Errors: %16llu " BORDER "\n" SEPARATOR, (unsigned long long)keyStats.numSslKeyGenRequests, (unsigned long long)keyStats.numSslKeyGenRequestErrors, (unsigned long long)keyStats.numSslKeyGenCompleted, (unsigned long long)keyStats.numSslKeyGenCompletedErrors); QAT_UTILS_LOG(BORDER " TLS Key Requests: %16llu " BORDER "\n" BORDER " TLS Key Request Errors: %16llu " BORDER "\n" BORDER " TLS Key Completed %16llu " BORDER "\n" BORDER " TLS Key Complete Errors: %16llu " BORDER "\n" SEPARATOR, (unsigned long long)keyStats.numTlsKeyGenRequests, (unsigned long long)keyStats.numTlsKeyGenRequestErrors, (unsigned long long)keyStats.numTlsKeyGenCompleted, (unsigned long long)keyStats.numTlsKeyGenCompletedErrors); QAT_UTILS_LOG(BORDER " MGF Key Requests: %16llu " BORDER "\n" BORDER " MGF Key Request Errors: %16llu " BORDER "\n" BORDER " MGF Key Completed %16llu " BORDER "\n" BORDER " MGF Key Complete Errors: %16llu " BORDER "\n" SEPARATOR, (unsigned long long)keyStats.numMgfKeyGenRequests, (unsigned long long)keyStats.numMgfKeyGenRequestErrors, (unsigned long long)keyStats.numMgfKeyGenCompleted, (unsigned long long)keyStats.numMgfKeyGenCompletedErrors); } /** @ingroup LacSymKey */ CpaStatus cpaCyKeyGenQueryStats(CpaInstanceHandle instanceHandle_in, struct _CpaCyKeyGenStats *pSymKeyStats) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } LAC_CHECK_INSTANCE_HANDLE(instanceHandle); SAL_CHECK_INSTANCE_TYPE(instanceHandle, (SAL_SERVICE_TYPE_CRYPTO | SAL_SERVICE_TYPE_CRYPTO_SYM)); LAC_CHECK_NULL_PARAM(pSymKeyStats); SAL_RUNNING_CHECK(instanceHandle); LAC_KEY_STATS32_GET(*pSymKeyStats, instanceHandle); return CPA_STATUS_SUCCESS; } /** @ingroup LacSymKey */ CpaStatus cpaCyKeyGenQueryStats64(CpaInstanceHandle instanceHandle_in, CpaCyKeyGenStats64 *pSymKeyStats) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } LAC_CHECK_INSTANCE_HANDLE(instanceHandle); SAL_CHECK_INSTANCE_TYPE(instanceHandle, (SAL_SERVICE_TYPE_CRYPTO | SAL_SERVICE_TYPE_CRYPTO_SYM)); LAC_CHECK_NULL_PARAM(pSymKeyStats); SAL_RUNNING_CHECK(instanceHandle); LAC_KEY_STATS64_GET(*pSymKeyStats, instanceHandle); return CPA_STATUS_SUCCESS; } /** ****************************************************************************** * @ingroup LacSymKey * Return the size of the digest for a specific hash algorithm. * @description * Return the expected digest size based on the sha algorithm submitted. * The only supported value are sha256, sha384 and sha512. * * @param[in] hashAlgorithm either sha256, sha384 or sha512. * @return the expected size or 0 for an invalid hash. * *****************************************************************************/ static Cpa32U getDigestSizeFromHashAlgo(CpaCySymHashAlgorithm hashAlgorithm) { switch (hashAlgorithm) { case CPA_CY_SYM_HASH_SHA256: return LAC_HASH_SHA256_DIGEST_SIZE; case CPA_CY_SYM_HASH_SHA384: return LAC_HASH_SHA384_DIGEST_SIZE; case CPA_CY_SYM_HASH_SHA512: return LAC_HASH_SHA512_DIGEST_SIZE; case CPA_CY_SYM_HASH_SM3: return LAC_HASH_SM3_DIGEST_SIZE; default: return 0; } } /** ****************************************************************************** * @ingroup LacSymKey * Return the hash algorithm for a specific cipher. * @description * Return the hash algorithm related to the cipher suite. * Supported hash's are SHA256, and SHA384. * * @param[in] cipherSuite AES_128_GCM, AES_256_GCM, AES_128_CCM, * and CHACHA20_POLY1305. * @return the expected hash algorithm or 0 for an invalid cipher. * *****************************************************************************/ static CpaCySymHashAlgorithm getHashAlgorithmFromCipherSuiteHKDF(CpaCyKeyHKDFCipherSuite cipherSuite) { switch (cipherSuite) { case CPA_CY_HKDF_TLS_AES_128_GCM_SHA256: /* Fall through */ case CPA_CY_HKDF_TLS_CHACHA20_POLY1305_SHA256: case CPA_CY_HKDF_TLS_AES_128_CCM_SHA256: case CPA_CY_HKDF_TLS_AES_128_CCM_8_SHA256: return CPA_CY_SYM_HASH_SHA256; case CPA_CY_HKDF_TLS_AES_256_GCM_SHA384: return CPA_CY_SYM_HASH_SHA384; default: return 0; } } /** ****************************************************************************** * @ingroup LacSymKey * Return the digest size of cipher. * @description * Return the output key size of specific cipher, for specified sub label * * @param[in] cipherSuite = AES_128_GCM, AES_256_GCM, AES_128_CCM, * and CHACHA20_POLY1305. * subLabels = KEY, IV, RESUMPTION, and FINISHED. * @return the expected digest size of the cipher. * *****************************************************************************/ static const Cpa32U cipherSuiteHKDFHashSizes [LAC_KEY_HKDF_CIPHERS_MAX][LAC_KEY_HKDF_SUBLABELS_MAX] = { {}, /* Not used */ { 32, 16, 12, 32, 32 }, /* AES_128_GCM_SHA256 */ { 48, 32, 12, 48, 48 }, /* AES_256_GCM_SHA384 */ { 32, 32, 12, 32, 32 }, /* CHACHA20_POLY1305_SHA256 */ { 32, 16, 12, 32, 32 }, /* AES_128_CCM_SHA256 */ { 32, 16, 12, 32, 32 } /* AES_128_CCM_8_SHA256 */ }; /** ****************************************************************************** * @ingroup LacSymKey * Key Generation MGF response handler * * @description * Handles Key Generation MGF response messages from the QAT. * * @param[in] lacCmdId Command id of the original request * @param[in] pOpaqueData Pointer to opaque data that was in request * @param[in] cmnRespFlags Indicates whether request succeeded * * @return void * *****************************************************************************/ static void LacSymKey_MgfHandleResponse(icp_qat_fw_la_cmd_id_t lacCmdId, void *pOpaqueData, icp_qat_fw_comn_flags cmnRespFlags) { CpaCyKeyGenMgfOpData *pMgfOpData = NULL; lac_sym_key_cookie_t *pCookie = NULL; CpaCyGenFlatBufCbFunc pKeyGenMgfCb = NULL; void *pCallbackTag = NULL; CpaFlatBuffer *pGeneratedKeyBuffer = NULL; CpaStatus status = CPA_STATUS_SUCCESS; CpaBoolean respStatusOk = (ICP_QAT_FW_COMN_STATUS_FLAG_OK == ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(cmnRespFlags)) ? CPA_TRUE : CPA_FALSE; pCookie = (lac_sym_key_cookie_t *)pOpaqueData; if (CPA_TRUE == respStatusOk) { status = CPA_STATUS_SUCCESS; LAC_KEY_STAT_INC(numMgfKeyGenCompleted, pCookie->instanceHandle); } else { status = CPA_STATUS_FAIL; LAC_KEY_STAT_INC(numMgfKeyGenCompletedErrors, pCookie->instanceHandle); } pKeyGenMgfCb = (CpaCyGenFlatBufCbFunc)(pCookie->pKeyGenCb); pMgfOpData = pCookie->pKeyGenOpData; pCallbackTag = pCookie->pCallbackTag; pGeneratedKeyBuffer = pCookie->pKeyGenOutputData; Lac_MemPoolEntryFree(pCookie); (*pKeyGenMgfCb)(pCallbackTag, status, pMgfOpData, pGeneratedKeyBuffer); } /** ****************************************************************************** * @ingroup LacSymKey * Synchronous mode of operation wrapper function * * @description * Wrapper function to implement synchronous mode of operation for * cpaCyKeyGenMgf and cpaCyKeyGenMgfExt function. * * @param[in] instanceHandle Instance handle * @param[in] pKeyGenCb Internal callback function pointer * @param[in] pCallbackTag Callback tag * @param[in] pKeyGenMgfOpData Pointer to user provided Op Data structure * @param[in] pGeneratedMaskBuffer Pointer to a buffer where generated mask * will be stored * @param[in] bIsExtRequest Indicates origin of function call; * if CPA_TRUE then the call comes from * cpaCyKeyGenMgfExt function, otherwise * from cpaCyKeyGenMgf * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Function should be retried. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * *****************************************************************************/ static CpaStatus LacSymKey_MgfSync(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const void *pKeyGenMgfOpData, CpaFlatBuffer *pGeneratedMaskBuffer, CpaBoolean bIsExtRequest) { CpaStatus status = CPA_STATUS_SUCCESS; lac_sync_op_data_t *pSyncCallbackData = NULL; status = LacSync_CreateSyncCookie(&pSyncCallbackData); if (CPA_STATUS_SUCCESS == status) { if (CPA_TRUE == bIsExtRequest) { status = cpaCyKeyGenMgfExt( instanceHandle, LacSync_GenFlatBufCb, pSyncCallbackData, (const CpaCyKeyGenMgfOpDataExt *)pKeyGenMgfOpData, pGeneratedMaskBuffer); } else { status = cpaCyKeyGenMgf(instanceHandle, LacSync_GenFlatBufCb, pSyncCallbackData, (const CpaCyKeyGenMgfOpData *) pKeyGenMgfOpData, pGeneratedMaskBuffer); } } else { /* Failure allocating sync cookie */ LAC_KEY_STAT_INC(numMgfKeyGenRequestErrors, instanceHandle); return status; } if (CPA_STATUS_SUCCESS == status) { CpaStatus syncStatus = CPA_STATUS_SUCCESS; syncStatus = LacSync_WaitForCallback(pSyncCallbackData, LAC_SYM_SYNC_CALLBACK_TIMEOUT, &status, NULL); /* If callback doesn't come back */ if (CPA_STATUS_SUCCESS != syncStatus) { LAC_KEY_STAT_INC(numMgfKeyGenCompletedErrors, instanceHandle); LAC_LOG_ERROR("Callback timed out"); status = syncStatus; } } else { /* As the Request was not sent the Callback will never * be called, so need to indicate that we're finished * with cookie so it can be destroyed. */ LacSync_SetSyncCookieComplete(pSyncCallbackData); } LacSync_DestroySyncCookie(&pSyncCallbackData); return status; } /** ****************************************************************************** * @ingroup LacSymKey * Perform MGF key gen operation * * @description * This function performs MGF key gen operation. It is common for requests * coming from both cpaCyKeyGenMgf and cpaCyKeyGenMgfExt QAT API * functions. * * @param[in] instanceHandle Instance handle * @param[in] pKeyGenCb Pointer to callback function to be invoked * when the operation is complete. * @param[in] pCallbackTag Opaque User Data for this specific call. * @param[in] pOpData Pointer to the Op Data structure provided by * the user in API function call. For calls * originating from cpaCyKeyGenMgfExt it will * point to CpaCyKeyGenMgfOpDataExt type of * structure while for calls originating from * cpaCyKeyGenMgf it will point to * CpaCyKeyGenMgfOpData type of structure. * @param[in] pKeyGenMgfOpData Pointer to the user provided * CpaCyKeyGenMgfOpData structure. For calls * originating from cpaCyKeyGenMgf it will * point to the same structure as pOpData * parameter; for calls originating from * cpaCyKeyGenMgfExt it will point to the * baseOpData member of the * CpaCyKeyGenMgfOpDataExt structure passed in * as a parameter to the API function call. * @param[in] pGeneratedMaskBuffer Pointer to a buffer where generated mask * will be stored * @param[in] hashAlgorithm Indicates which hash algorithm is to be used * to perform MGF key gen operation. For calls * originating from cpaCyKeyGenMgf it will * always be CPA_CY_SYM_HASH_SHA1. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Function should be retried. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * *****************************************************************************/ static CpaStatus LacSymKey_MgfCommon(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const void *pOpData, const CpaCyKeyGenMgfOpData *pKeyGenMgfOpData, CpaFlatBuffer *pGeneratedMaskBuffer, CpaCySymHashAlgorithm hashAlgorithm) { CpaStatus status = CPA_STATUS_SUCCESS; icp_qat_fw_la_bulk_req_t keyGenReq = { { 0 } }; icp_qat_la_bulk_req_hdr_t keyGenReqHdr = { { 0 } }; icp_qat_fw_la_key_gen_common_t keyGenReqMid = { { 0 } }; icp_qat_la_bulk_req_ftr_t keyGenReqFtr = { { { 0 } } }; Cpa8U *pMsgDummy = NULL; Cpa8U *pCacheDummyHdr = NULL; Cpa8U *pCacheDummyMid = NULL; Cpa8U *pCacheDummyFtr = NULL; sal_qat_content_desc_info_t contentDescInfo = { 0 }; lac_sym_key_cookie_t *pCookie = NULL; lac_sym_cookie_t *pSymCookie = NULL; sal_crypto_service_t *pService = NULL; Cpa64U inputPhysAddr = 0; Cpa64U outputPhysAddr = 0; /* Structure initializer is supported by C99, but it is * not supported by some former Intel compiler. */ CpaCySymHashSetupData hashSetupData = { 0 }; Cpa32U hashBlkSizeInBytes = 0; lac_sym_qat_hash_alg_info_t *pHashAlgInfo = NULL; icp_qat_fw_serv_specif_flags laCmdFlags = 0; icp_qat_fw_comn_flags cmnRequestFlags = ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_PTR_TYPE_FLAT, QAT_COMN_CD_FLD_TYPE_64BIT_ADR); pService = (sal_crypto_service_t *)instanceHandle; LAC_CHECK_INSTANCE_HANDLE(instanceHandle); SAL_CHECK_INSTANCE_TYPE(instanceHandle, (SAL_SERVICE_TYPE_CRYPTO | SAL_SERVICE_TYPE_CRYPTO_SYM)); SAL_RUNNING_CHECK(instanceHandle); LAC_CHECK_NULL_PARAM(pOpData); LAC_CHECK_NULL_PARAM(pKeyGenMgfOpData); LAC_CHECK_NULL_PARAM(pGeneratedMaskBuffer); LAC_CHECK_NULL_PARAM(pGeneratedMaskBuffer->pData); LAC_CHECK_NULL_PARAM(pKeyGenMgfOpData->seedBuffer.pData); /* Maximum seed length for MGF1 request */ if (pKeyGenMgfOpData->seedBuffer.dataLenInBytes > ICP_QAT_FW_LA_MGF_SEED_LEN_MAX) { LAC_INVALID_PARAM_LOG("seedBuffer.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } /* Maximum mask length for MGF1 request */ if (pKeyGenMgfOpData->maskLenInBytes > ICP_QAT_FW_LA_MGF_MASK_LEN_MAX) { LAC_INVALID_PARAM_LOG("maskLenInBytes"); return CPA_STATUS_INVALID_PARAM; } /* check for enough space in the flat buffer */ if (pKeyGenMgfOpData->maskLenInBytes > pGeneratedMaskBuffer->dataLenInBytes) { LAC_INVALID_PARAM_LOG("pGeneratedMaskBuffer.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } /* Get hash alg info */ LacSymQat_HashAlgLookupGet(instanceHandle, hashAlgorithm, &pHashAlgInfo); /* Allocate the cookie */ pCookie = (lac_sym_key_cookie_t *)Lac_MemPoolEntryAlloc( pService->lac_sym_cookie_pool); if (NULL == pCookie) { LAC_LOG_ERROR("Cannot get mem pool entry"); status = CPA_STATUS_RESOURCE; } else if ((void *)CPA_STATUS_RETRY == pCookie) { pCookie = NULL; status = CPA_STATUS_RETRY; } else { pSymCookie = (lac_sym_cookie_t *)pCookie; } if (CPA_STATUS_SUCCESS == status) { /* populate the cookie */ pCookie->instanceHandle = instanceHandle; pCookie->pCallbackTag = pCallbackTag; pCookie->pKeyGenOpData = (void *)LAC_CONST_PTR_CAST(pOpData); pCookie->pKeyGenCb = pKeyGenCb; pCookie->pKeyGenOutputData = pGeneratedMaskBuffer; hashSetupData.hashAlgorithm = hashAlgorithm; hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; hashSetupData.digestResultLenInBytes = pHashAlgInfo->digestLength; /* Populate the CD ctrl Block (LW 27 - LW 31) * and the CD Hash HW setup block */ LacSymQat_HashContentDescInit( &(keyGenReqFtr), instanceHandle, &hashSetupData, /* point to base of hw setup block */ (Cpa8U *)pCookie->contentDesc, LAC_SYM_KEY_NO_HASH_BLK_OFFSET_QW, ICP_QAT_FW_SLICE_DRAM_WR, ICP_QAT_HW_AUTH_MODE0, /* just a plain hash */ CPA_FALSE, /* Not using sym Constants Table in Shared SRAM */ CPA_FALSE, /* not using the optimised Content Desc */ CPA_FALSE, /* Not using the stateful SHA3 Content Desc */ NULL, &hashBlkSizeInBytes); /* Populate the Req param LW 14-26 */ LacSymQat_KeyMgfRequestPopulate( &keyGenReqHdr, &keyGenReqMid, pKeyGenMgfOpData->seedBuffer.dataLenInBytes, pKeyGenMgfOpData->maskLenInBytes, (Cpa8U)pHashAlgInfo->digestLength); contentDescInfo.pData = pCookie->contentDesc; contentDescInfo.hardwareSetupBlockPhys = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyContentDescPhyAddr); contentDescInfo.hwBlkSzQuadWords = LAC_BYTES_TO_QUADWORDS(hashBlkSizeInBytes); /* Populate common request fields */ inputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64(LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, pKeyGenMgfOpData->seedBuffer.pData)); if (inputPhysAddr == 0) { LAC_LOG_ERROR( "Unable to get the seed buffer physical address"); status = CPA_STATUS_FAIL; } outputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64( LAC_OS_VIRT_TO_PHYS_EXTERNAL(pService->generic_service_info, pGeneratedMaskBuffer->pData)); if (outputPhysAddr == 0) { LAC_LOG_ERROR( "Unable to get the physical address of the mask"); status = CPA_STATUS_FAIL; } } if (CPA_STATUS_SUCCESS == status) { /* Make up the full keyGenReq struct from its constituents */ pMsgDummy = (Cpa8U *)&(keyGenReq); pCacheDummyHdr = (Cpa8U *)&(keyGenReqHdr); pCacheDummyMid = (Cpa8U *)&(keyGenReqMid); pCacheDummyFtr = (Cpa8U *)&(keyGenReqFtr); memcpy(pMsgDummy, pCacheDummyHdr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)); memset((pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)), 0, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_TO_CLEAR_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_MID_IN_LW), pCacheDummyMid, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_MID_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), pCacheDummyFtr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_FTR_IN_LW)); SalQatMsg_ContentDescHdrWrite((icp_qat_fw_comn_req_t *)&( keyGenReq), &(contentDescInfo)); SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)&keyGenReq, ICP_QAT_FW_COMN_REQ_CPM_FW_LA, ICP_QAT_FW_LA_CMD_MGF1, cmnRequestFlags, laCmdFlags); /* * MGF uses a flat buffer but we can use zero for source and * dest length because the firmware will use the seed length, * hash length and mask length to find source length. */ SalQatMsg_CmnMidWrite((icp_qat_fw_la_bulk_req_t *)&(keyGenReq), pCookie, LAC_SYM_KEY_QAT_PTR_TYPE, inputPhysAddr, outputPhysAddr, 0, 0); /* Send to QAT */ status = icp_adf_transPutMsg(pService->trans_handle_sym_tx, (void *)&(keyGenReq), LAC_QAT_SYM_REQ_SZ_LW); } if (CPA_STATUS_SUCCESS == status) { /* Update stats */ LAC_KEY_STAT_INC(numMgfKeyGenRequests, instanceHandle); } else { LAC_KEY_STAT_INC(numMgfKeyGenRequestErrors, instanceHandle); /* clean up memory */ if (NULL != pCookie) { Lac_MemPoolEntryFree(pCookie); } } return status; } /** * cpaCyKeyGenMgf */ CpaStatus cpaCyKeyGenMgf(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenMgfOpData *pKeyGenMgfOpData, CpaFlatBuffer *pGeneratedMaskBuffer) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } /* If synchronous Operation */ if (NULL == pKeyGenCb) { return LacSymKey_MgfSync(instanceHandle, pKeyGenCb, pCallbackTag, (const void *)pKeyGenMgfOpData, pGeneratedMaskBuffer, CPA_FALSE); } /* Asynchronous Operation */ return LacSymKey_MgfCommon(instanceHandle, pKeyGenCb, pCallbackTag, (const void *)pKeyGenMgfOpData, pKeyGenMgfOpData, pGeneratedMaskBuffer, CPA_CY_SYM_HASH_SHA1); } /** * cpaCyKeyGenMgfExt */ CpaStatus cpaCyKeyGenMgfExt(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenMgfOpDataExt *pKeyGenMgfOpDataExt, CpaFlatBuffer *pGeneratedMaskBuffer) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } /* If synchronous Operation */ if (NULL == pKeyGenCb) { return LacSymKey_MgfSync(instanceHandle, pKeyGenCb, pCallbackTag, (const void *)pKeyGenMgfOpDataExt, pGeneratedMaskBuffer, CPA_TRUE); } /* Param check specific for Ext function, rest of parameters validated * in LacSymKey_MgfCommon */ LAC_CHECK_NULL_PARAM(pKeyGenMgfOpDataExt); if (CPA_CY_SYM_HASH_MD5 > pKeyGenMgfOpDataExt->hashAlgorithm || CPA_CY_SYM_HASH_SHA512 < pKeyGenMgfOpDataExt->hashAlgorithm) { LAC_INVALID_PARAM_LOG("hashAlgorithm"); return CPA_STATUS_INVALID_PARAM; } /* Asynchronous Operation */ return LacSymKey_MgfCommon(instanceHandle, pKeyGenCb, pCallbackTag, (const void *)pKeyGenMgfOpDataExt, &pKeyGenMgfOpDataExt->baseOpData, pGeneratedMaskBuffer, pKeyGenMgfOpDataExt->hashAlgorithm); } /** ****************************************************************************** * @ingroup LacSymKey * Key Generation SSL & TLS response handler * * @description * Handles Key Generation SSL & TLS response messages from the QAT. * * @param[in] lacCmdId Command id of the original request * @param[in] pOpaqueData Pointer to opaque data that was in request * @param[in] cmnRespFlags LA response flags * * @return void * *****************************************************************************/ static void LacSymKey_SslTlsHandleResponse(icp_qat_fw_la_cmd_id_t lacCmdId, void *pOpaqueData, icp_qat_fw_comn_flags cmnRespFlags) { void *pSslTlsOpData = NULL; CpaCyGenFlatBufCbFunc pKeyGenSslTlsCb = NULL; lac_sym_key_cookie_t *pCookie = NULL; void *pCallbackTag = NULL; CpaFlatBuffer *pGeneratedKeyBuffer = NULL; CpaStatus status = CPA_STATUS_SUCCESS; CpaBoolean respStatusOk = (ICP_QAT_FW_COMN_STATUS_FLAG_OK == ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(cmnRespFlags)) ? CPA_TRUE : CPA_FALSE; pCookie = (lac_sym_key_cookie_t *)pOpaqueData; pSslTlsOpData = pCookie->pKeyGenOpData; if (CPA_TRUE == respStatusOk) { LacKey_StatsInc(lacCmdId, LAC_KEY_COMPLETED, pCookie->instanceHandle); } else { status = CPA_STATUS_FAIL; LacKey_StatsInc(lacCmdId, LAC_KEY_COMPLETED_ERRORS, pCookie->instanceHandle); } pKeyGenSslTlsCb = (CpaCyGenFlatBufCbFunc)(pCookie->pKeyGenCb); pCallbackTag = pCookie->pCallbackTag; pGeneratedKeyBuffer = pCookie->pKeyGenOutputData; Lac_MemPoolEntryFree(pCookie); (*pKeyGenSslTlsCb)(pCallbackTag, status, pSslTlsOpData, pGeneratedKeyBuffer); } /** ******************************************************************************* * @ingroup LacSymKey * Synchronous mode of operation function wrapper for performing SSL/TLS * key gen operation * * @description * Synchronous mode of operation function wrapper for performing SSL/TLS * key gen operation * * @param[in] instanceHandle QAT device handle. * @param[in] pKeyGenCb Pointer to callback function to be invoked * when the operation is complete. * @param[in] pCallbackTag Opaque User Data for this specific call. * @param[in] lacCmdId Lac command ID (identify SSL & TLS ops) * @param[in] pKeyGenSslTlsOpData Structure containing all the data needed to * perform the SSL/TLS key generation * operation. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pKeyGenOutputData pointer to where output result should be * written * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Function should be retried. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * *****************************************************************************/ static CpaStatus LacSymKey_SslTlsSync(CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, icp_qat_fw_la_cmd_id_t lacCmdId, void *pKeyGenSslTlsOpData, Cpa8U hashAlgorithm, CpaFlatBuffer *pKeyGenOutpuData) { lac_sync_op_data_t *pSyncCallbackData = NULL; CpaStatus status = CPA_STATUS_SUCCESS; status = LacSync_CreateSyncCookie(&pSyncCallbackData); if (CPA_STATUS_SUCCESS == status) { status = LacSymKey_KeyGenSslTls_GenCommon(instanceHandle, pKeyGenCb, pSyncCallbackData, lacCmdId, pKeyGenSslTlsOpData, hashAlgorithm, pKeyGenOutpuData); } else { /* Failure allocating sync cookie */ LacKey_StatsInc(lacCmdId, LAC_KEY_REQUEST_ERRORS, instanceHandle); return status; } if (CPA_STATUS_SUCCESS == status) { CpaStatus syncStatus = CPA_STATUS_SUCCESS; syncStatus = LacSync_WaitForCallback(pSyncCallbackData, LAC_SYM_SYNC_CALLBACK_TIMEOUT, &status, NULL); /* If callback doesn't come back */ if (CPA_STATUS_SUCCESS != syncStatus) { LacKey_StatsInc(lacCmdId, LAC_KEY_COMPLETED_ERRORS, instanceHandle); LAC_LOG_ERROR("Callback timed out"); status = syncStatus; } } else { /* As the Request was not sent the Callback will never * be called, so need to indicate that we're finished * with cookie so it can be destroyed. */ LacSync_SetSyncCookieComplete(pSyncCallbackData); } LacSync_DestroySyncCookie(&pSyncCallbackData); return status; } static CpaStatus computeHashKey(CpaFlatBuffer *secret, CpaFlatBuffer *hash, CpaCySymHashAlgorithm *hashAlgorithm) { CpaStatus status = CPA_STATUS_SUCCESS; switch (*hashAlgorithm) { case CPA_CY_SYM_HASH_MD5: status = qatUtilsHashMD5Full(secret->pData, hash->pData, secret->dataLenInBytes); break; case CPA_CY_SYM_HASH_SHA1: status = qatUtilsHashSHA1Full(secret->pData, hash->pData, secret->dataLenInBytes); break; case CPA_CY_SYM_HASH_SHA256: status = qatUtilsHashSHA256Full(secret->pData, hash->pData, secret->dataLenInBytes); break; case CPA_CY_SYM_HASH_SHA384: status = qatUtilsHashSHA384Full(secret->pData, hash->pData, secret->dataLenInBytes); break; case CPA_CY_SYM_HASH_SHA512: status = qatUtilsHashSHA512Full(secret->pData, hash->pData, secret->dataLenInBytes); break; default: status = CPA_STATUS_FAIL; } return status; } static CpaStatus LacSymKey_KeyGenSslTls_GenCommon(CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, icp_qat_fw_la_cmd_id_t lacCmdId, void *pKeyGenSslTlsOpData, Cpa8U hashAlgCipher, CpaFlatBuffer *pKeyGenOutputData) { CpaStatus status = CPA_STATUS_SUCCESS; CpaBoolean precompute = CPA_FALSE; icp_qat_fw_la_bulk_req_t keyGenReq = { { 0 } }; icp_qat_la_bulk_req_hdr_t keyGenReqHdr = { { 0 } }; icp_qat_fw_la_key_gen_common_t keyGenReqMid = { { 0 } }; icp_qat_la_bulk_req_ftr_t keyGenReqFtr = { { { 0 } } }; Cpa8U *pMsgDummy = NULL; Cpa8U *pCacheDummyHdr = NULL; Cpa8U *pCacheDummyMid = NULL; Cpa8U *pCacheDummyFtr = NULL; lac_sym_key_cookie_t *pCookie = NULL; lac_sym_cookie_t *pSymCookie = NULL; Cpa64U inputPhysAddr = 0; Cpa64U outputPhysAddr = 0; /* Structure initializer is supported by C99, but it is * not supported by some former Intel compiler. */ CpaCySymHashSetupData hashSetupData = { 0 }; sal_qat_content_desc_info_t contentDescInfo = { 0 }; Cpa32U hashBlkSizeInBytes = 0; Cpa32U tlsPrefixLen = 0; CpaFlatBuffer inputSecret = { 0 }; CpaFlatBuffer hashKeyOutput = { 0 }; Cpa32U uSecretLen = 0; CpaCySymHashNestedModeSetupData *pNestedModeSetupData = &(hashSetupData.nestedModeSetupData); icp_qat_fw_serv_specif_flags laCmdFlags = 0; icp_qat_fw_comn_flags cmnRequestFlags = ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_PTR_TYPE_FLAT, QAT_COMN_CD_FLD_TYPE_64BIT_ADR); sal_crypto_service_t *pService = (sal_crypto_service_t *)instanceHandle; /* If synchronous Operation */ if (NULL == pKeyGenCb) { return LacSymKey_SslTlsSync(instanceHandle, LacSync_GenFlatBufCb, pCallbackTag, lacCmdId, pKeyGenSslTlsOpData, hashAlgCipher, pKeyGenOutputData); } /* Allocate the cookie */ pCookie = (lac_sym_key_cookie_t *)Lac_MemPoolEntryAlloc( pService->lac_sym_cookie_pool); if (NULL == pCookie) { LAC_LOG_ERROR("Cannot get mem pool entry"); status = CPA_STATUS_RESOURCE; } else if ((void *)CPA_STATUS_RETRY == pCookie) { pCookie = NULL; status = CPA_STATUS_RETRY; } else { pSymCookie = (lac_sym_cookie_t *)pCookie; } if (CPA_STATUS_SUCCESS == status) { icp_qat_hw_auth_mode_t qatHashMode = 0; if (ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE == lacCmdId) { qatHashMode = ICP_QAT_HW_AUTH_MODE0; } else /* TLS v1.1, v1.2, v1.3 */ { qatHashMode = ICP_QAT_HW_AUTH_MODE2; } pCookie->instanceHandle = pService; pCookie->pCallbackTag = pCallbackTag; pCookie->pKeyGenCb = pKeyGenCb; pCookie->pKeyGenOpData = pKeyGenSslTlsOpData; pCookie->pKeyGenOutputData = pKeyGenOutputData; hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_NESTED; /* SSL3 */ if (ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE == lacCmdId) { hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1; hashSetupData.digestResultLenInBytes = LAC_HASH_MD5_DIGEST_SIZE; pNestedModeSetupData->outerHashAlgorithm = CPA_CY_SYM_HASH_MD5; pNestedModeSetupData->pInnerPrefixData = NULL; pNestedModeSetupData->innerPrefixLenInBytes = 0; pNestedModeSetupData->pOuterPrefixData = NULL; pNestedModeSetupData->outerPrefixLenInBytes = 0; } /* TLS v1.1 */ else if (ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE == lacCmdId) { CpaCyKeyGenTlsOpData *pKeyGenTlsOpData = (CpaCyKeyGenTlsOpData *)pKeyGenSslTlsOpData; hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1; hashSetupData.digestResultLenInBytes = LAC_HASH_MD5_DIGEST_SIZE; pNestedModeSetupData->outerHashAlgorithm = CPA_CY_SYM_HASH_MD5; uSecretLen = pKeyGenTlsOpData->secret.dataLenInBytes; /* We want to handle pre_master_secret > 128 bytes * therefore we * only verify if the current operation is Master Secret * Derive. * The other operations remain unchanged. */ if ((uSecretLen > ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX) && (CPA_CY_KEY_TLS_OP_MASTER_SECRET_DERIVE == pKeyGenTlsOpData->tlsOp || CPA_CY_KEY_TLS_OP_USER_DEFINED == pKeyGenTlsOpData->tlsOp)) { CpaCySymHashAlgorithm hashAlgorithm = (CpaCySymHashAlgorithm)hashAlgCipher; /* secret = [s1 | s2 ] * s1 = outer prefix, s2 = inner prefix * length of s1 and s2 = ceil(secret_length / 2) * (secret length + 1)/2 will always give the * ceil as * division by 2 * (>>1) will give the smallest integral value * not less than * arg */ tlsPrefixLen = (pKeyGenTlsOpData->secret.dataLenInBytes + 1) >> 1; inputSecret.dataLenInBytes = tlsPrefixLen; inputSecret.pData = pKeyGenTlsOpData->secret.pData; /* Since the pre_master_secret is > 128, we * split the input * pre_master_secret in 2 halves and compute the * MD5 of the * first half and the SHA1 on the second half. */ hashAlgorithm = CPA_CY_SYM_HASH_MD5; /* Initialize pointer where MD5 key will go. */ hashKeyOutput.pData = &pCookie->hashKeyBuffer[0]; hashKeyOutput.dataLenInBytes = LAC_HASH_MD5_DIGEST_SIZE; computeHashKey(&inputSecret, &hashKeyOutput, &hashAlgorithm); pNestedModeSetupData->pOuterPrefixData = &pCookie->hashKeyBuffer[0]; pNestedModeSetupData->outerPrefixLenInBytes = LAC_HASH_MD5_DIGEST_SIZE; /* Point to the second half of the * pre_master_secret */ inputSecret.pData = pKeyGenTlsOpData->secret.pData + (pKeyGenTlsOpData->secret.dataLenInBytes - tlsPrefixLen); /* Compute SHA1 on the second half of the * pre_master_secret */ hashAlgorithm = CPA_CY_SYM_HASH_SHA1; /* Initialize pointer where SHA1 key will go. */ hashKeyOutput.pData = &pCookie->hashKeyBuffer [LAC_HASH_MD5_DIGEST_SIZE]; hashKeyOutput.dataLenInBytes = LAC_HASH_SHA1_DIGEST_SIZE; computeHashKey(&inputSecret, &hashKeyOutput, &hashAlgorithm); pNestedModeSetupData->pInnerPrefixData = &pCookie->hashKeyBuffer [LAC_HASH_MD5_DIGEST_SIZE]; pNestedModeSetupData->innerPrefixLenInBytes = LAC_HASH_SHA1_DIGEST_SIZE; } else { /* secret = [s1 | s2 ] * s1 = outer prefix, s2 = inner prefix * length of s1 and s2 = ceil(secret_length / 2) * (secret length + 1)/2 will always give the * ceil as * division by 2 * (>>1) will give the smallest integral value * not less than * arg */ tlsPrefixLen = (pKeyGenTlsOpData->secret.dataLenInBytes + 1) >> 1; /* last byte of s1 will be first byte of s2 if * Length is odd */ pNestedModeSetupData->pInnerPrefixData = pKeyGenTlsOpData->secret.pData + (pKeyGenTlsOpData->secret.dataLenInBytes - tlsPrefixLen); pNestedModeSetupData->pOuterPrefixData = pKeyGenTlsOpData->secret.pData; pNestedModeSetupData->innerPrefixLenInBytes = pNestedModeSetupData ->outerPrefixLenInBytes = tlsPrefixLen; } } /* TLS v1.2 */ else if (ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE == lacCmdId) { CpaCyKeyGenTlsOpData *pKeyGenTlsOpData = (CpaCyKeyGenTlsOpData *)pKeyGenSslTlsOpData; CpaCySymHashAlgorithm hashAlgorithm = (CpaCySymHashAlgorithm)hashAlgCipher; uSecretLen = pKeyGenTlsOpData->secret.dataLenInBytes; hashSetupData.hashAlgorithm = (CpaCySymHashAlgorithm)hashAlgorithm; hashSetupData.digestResultLenInBytes = (Cpa32U)getDigestSizeFromHashAlgo(hashAlgorithm); pNestedModeSetupData->outerHashAlgorithm = (CpaCySymHashAlgorithm)hashAlgorithm; if (CPA_CY_KEY_TLS_OP_MASTER_SECRET_DERIVE == pKeyGenTlsOpData->tlsOp || CPA_CY_KEY_TLS_OP_USER_DEFINED == pKeyGenTlsOpData->tlsOp) { switch (hashAlgorithm) { case CPA_CY_SYM_HASH_SM3: precompute = CPA_FALSE; break; case CPA_CY_SYM_HASH_SHA256: if (uSecretLen > ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX) { precompute = CPA_TRUE; } break; case CPA_CY_SYM_HASH_SHA384: case CPA_CY_SYM_HASH_SHA512: if (uSecretLen > ICP_QAT_FW_LA_TLS_SECRET_LEN_MAX) { precompute = CPA_TRUE; } break; default: break; } } if (CPA_TRUE == precompute) { /* Case when secret > algorithm block size * RFC 4868: For SHA-256 Block size is 512 bits, * for SHA-384 * and SHA-512 Block size is 1024 bits * Initialize pointer * where SHAxxx key will go. */ hashKeyOutput.pData = &pCookie->hashKeyBuffer[0]; hashKeyOutput.dataLenInBytes = hashSetupData.digestResultLenInBytes; computeHashKey(&pKeyGenTlsOpData->secret, &hashKeyOutput, &hashSetupData.hashAlgorithm); /* Outer prefix = secret , inner prefix = secret * secret < 64 bytes */ pNestedModeSetupData->pInnerPrefixData = hashKeyOutput.pData; pNestedModeSetupData->pOuterPrefixData = hashKeyOutput.pData; pNestedModeSetupData->innerPrefixLenInBytes = hashKeyOutput.dataLenInBytes; pNestedModeSetupData->outerPrefixLenInBytes = hashKeyOutput.dataLenInBytes; } else { /* Outer prefix = secret , inner prefix = secret * secret <= 64 bytes */ pNestedModeSetupData->pInnerPrefixData = pKeyGenTlsOpData->secret.pData; pNestedModeSetupData->pOuterPrefixData = pKeyGenTlsOpData->secret.pData; pNestedModeSetupData->innerPrefixLenInBytes = pKeyGenTlsOpData->secret.dataLenInBytes; pNestedModeSetupData->outerPrefixLenInBytes = pKeyGenTlsOpData->secret.dataLenInBytes; } } /* TLS v1.3 */ else if ((ICP_QAT_FW_LA_CMD_HKDF_EXTRACT <= lacCmdId) && (ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND_LABEL >= lacCmdId)) { CpaCyKeyGenHKDFOpData *pKeyGenTlsOpData = (CpaCyKeyGenHKDFOpData *)pKeyGenSslTlsOpData; CpaCySymHashAlgorithm hashAlgorithm = getHashAlgorithmFromCipherSuiteHKDF(hashAlgCipher); /* Set HASH data */ hashSetupData.hashAlgorithm = hashAlgorithm; /* Calculate digest length from the HASH type */ hashSetupData.digestResultLenInBytes = cipherSuiteHKDFHashSizes[hashAlgCipher] [LAC_KEY_HKDF_DIGESTS]; /* Outer Hash type is the same as inner hash type */ pNestedModeSetupData->outerHashAlgorithm = hashAlgorithm; /* EXPAND (PRK): * Outer prefix = secret, inner prefix = secret * EXTRACT (SEED/SALT): * Outer prefix = seed, inner prefix = seed * Secret <= 64 Bytes * We do not pre compute as secret can't be larger than * 64 bytes */ if ((ICP_QAT_FW_LA_CMD_HKDF_EXPAND == lacCmdId) || (ICP_QAT_FW_LA_CMD_HKDF_EXPAND_LABEL == lacCmdId)) { pNestedModeSetupData->pInnerPrefixData = pKeyGenTlsOpData->secret; pNestedModeSetupData->pOuterPrefixData = pKeyGenTlsOpData->secret; pNestedModeSetupData->innerPrefixLenInBytes = pKeyGenTlsOpData->secretLen; pNestedModeSetupData->outerPrefixLenInBytes = pKeyGenTlsOpData->secretLen; } else { pNestedModeSetupData->pInnerPrefixData = pKeyGenTlsOpData->seed; pNestedModeSetupData->pOuterPrefixData = pKeyGenTlsOpData->seed; pNestedModeSetupData->innerPrefixLenInBytes = pKeyGenTlsOpData->seedLen; pNestedModeSetupData->outerPrefixLenInBytes = pKeyGenTlsOpData->seedLen; } } /* Set the footer Data. * Note that following function doesn't look at inner/outer * prefix pointers in nested digest ctx */ LacSymQat_HashContentDescInit( &keyGenReqFtr, instanceHandle, &hashSetupData, pCookie ->contentDesc, /* Pointer to base of hw setup block */ LAC_SYM_KEY_NO_HASH_BLK_OFFSET_QW, ICP_QAT_FW_SLICE_DRAM_WR, qatHashMode, CPA_FALSE, /* Not using sym Constants Table in Shared SRAM */ CPA_FALSE, /* not using the optimised content Desc */ CPA_FALSE, /* Not using the stateful SHA3 Content Desc */ NULL, /* precompute data */ &hashBlkSizeInBytes); /* SSL3 */ if (ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE == lacCmdId) { CpaCyKeyGenSslOpData *pKeyGenSslOpData = (CpaCyKeyGenSslOpData *)pKeyGenSslTlsOpData; Cpa8U *pLabel = NULL; Cpa32U labelLen = 0; Cpa8U iterations = 0; Cpa64U labelPhysAddr = 0; /* Iterations = ceiling of output required / output per * iteration Ceiling of a / b = (a + (b-1)) / b */ iterations = (pKeyGenSslOpData->generatedKeyLenInBytes + (LAC_SYM_QAT_KEY_SSL_BYTES_PER_ITERATION - 1)) >> LAC_SYM_QAT_KEY_SSL_ITERATIONS_SHIFT; if (CPA_CY_KEY_SSL_OP_USER_DEFINED == pKeyGenSslOpData->sslOp) { pLabel = pKeyGenSslOpData->userLabel.pData; labelLen = pKeyGenSslOpData->userLabel.dataLenInBytes; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, pLabel); if (labelPhysAddr == 0) { LAC_LOG_ERROR( "Unable to get the physical address of the" " label"); status = CPA_STATUS_FAIL; } } else { pLabel = pService->pSslLabel; /* Calculate label length. * eg. 3 iterations is ABBCCC so length is 6 */ labelLen = ((iterations * iterations) + iterations) >> 1; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_INTERNAL(pLabel); } LacSymQat_KeySslRequestPopulate( &keyGenReqHdr, &keyGenReqMid, pKeyGenSslOpData->generatedKeyLenInBytes, labelLen, pKeyGenSslOpData->secret.dataLenInBytes, iterations); LacSymQat_KeySslKeyMaterialInputPopulate( &(pService->generic_service_info), &(pCookie->u.sslKeyInput), pKeyGenSslOpData->seed.pData, labelPhysAddr, pKeyGenSslOpData->secret.pData); inputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keySslKeyInputPhyAddr); } /* TLS v1.1, v1.2 */ else if (ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE == lacCmdId || ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE == lacCmdId) { CpaCyKeyGenTlsOpData *pKeyGenTlsOpData = (CpaCyKeyGenTlsOpData *)pKeyGenSslTlsOpData; lac_sym_qat_hash_state_buffer_info_t hashStateBufferInfo = { 0 }; CpaBoolean hashStateBuffer = CPA_FALSE; icp_qat_fw_auth_cd_ctrl_hdr_t *pHashControlBlock = (icp_qat_fw_auth_cd_ctrl_hdr_t *)&( keyGenReqFtr.cd_ctrl); icp_qat_la_auth_req_params_t *pHashReqParams = NULL; Cpa8U *pLabel = NULL; Cpa32U labelLen = 0; Cpa64U labelPhysAddr = 0; hashStateBufferInfo.pData = pCookie->hashStateBuffer; hashStateBufferInfo.pDataPhys = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyHashStateBufferPhyAddr); hashStateBufferInfo.stateStorageSzQuadWords = 0; LacSymQat_HashSetupReqParamsMetaData(&(keyGenReqFtr), instanceHandle, &(hashSetupData), hashStateBuffer, qatHashMode, CPA_FALSE); pHashReqParams = (icp_qat_la_auth_req_params_t *)&( keyGenReqFtr.serv_specif_rqpars); hashStateBufferInfo.prefixAadSzQuadWords = LAC_BYTES_TO_QUADWORDS( pHashReqParams->u2.inner_prefix_sz + pHashControlBlock->outer_prefix_sz); /* Copy prefix data into hash state buffer */ pMsgDummy = (Cpa8U *)&(keyGenReq); pCacheDummyHdr = (Cpa8U *)&(keyGenReqHdr); pCacheDummyMid = (Cpa8U *)&(keyGenReqMid); pCacheDummyFtr = (Cpa8U *)&(keyGenReqFtr); memcpy(pMsgDummy, pCacheDummyHdr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_MID_IN_LW), pCacheDummyMid, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_MID_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), pCacheDummyFtr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_FTR_IN_LW)); LacSymQat_HashStatePrefixAadBufferPopulate( &hashStateBufferInfo, &keyGenReqFtr, pNestedModeSetupData->pInnerPrefixData, pNestedModeSetupData->innerPrefixLenInBytes, pNestedModeSetupData->pOuterPrefixData, pNestedModeSetupData->outerPrefixLenInBytes); /* Firmware only looks at hash state buffer pointer and * the * hash state buffer size so all other fields are set to * 0 */ LacSymQat_HashRequestParamsPopulate( &(keyGenReq), 0, /* Auth offset */ 0, /* Auth length */ &(pService->generic_service_info), &hashStateBufferInfo, /* Hash state prefix buffer */ ICP_QAT_FW_LA_PARTIAL_NONE, 0, /* Hash result size */ CPA_FALSE, NULL, CPA_CY_SYM_HASH_NONE, /* Hash algorithm */ NULL); /* HKDF only */ /* Set up the labels and their length */ if (CPA_CY_KEY_TLS_OP_USER_DEFINED == pKeyGenTlsOpData->tlsOp) { pLabel = pKeyGenTlsOpData->userLabel.pData; labelLen = pKeyGenTlsOpData->userLabel.dataLenInBytes; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, pLabel); if (labelPhysAddr == 0) { LAC_LOG_ERROR( "Unable to get the physical address of the" " label"); status = CPA_STATUS_FAIL; } } else if (CPA_CY_KEY_TLS_OP_MASTER_SECRET_DERIVE == pKeyGenTlsOpData->tlsOp) { pLabel = pService->pTlsLabel->masterSecret; labelLen = sizeof( LAC_SYM_KEY_TLS_MASTER_SECRET_LABEL) - 1; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_INTERNAL(pLabel); } else if (CPA_CY_KEY_TLS_OP_KEY_MATERIAL_DERIVE == pKeyGenTlsOpData->tlsOp) { pLabel = pService->pTlsLabel->keyMaterial; labelLen = sizeof(LAC_SYM_KEY_TLS_KEY_MATERIAL_LABEL) - 1; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_INTERNAL(pLabel); } else if (CPA_CY_KEY_TLS_OP_CLIENT_FINISHED_DERIVE == pKeyGenTlsOpData->tlsOp) { pLabel = pService->pTlsLabel->clientFinished; labelLen = sizeof(LAC_SYM_KEY_TLS_CLIENT_FIN_LABEL) - 1; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_INTERNAL(pLabel); } else { pLabel = pService->pTlsLabel->serverFinished; labelLen = sizeof(LAC_SYM_KEY_TLS_SERVER_FIN_LABEL) - 1; labelPhysAddr = LAC_OS_VIRT_TO_PHYS_INTERNAL(pLabel); } LacSymQat_KeyTlsRequestPopulate( &keyGenReqMid, pKeyGenTlsOpData->generatedKeyLenInBytes, labelLen, pKeyGenTlsOpData->secret.dataLenInBytes, pKeyGenTlsOpData->seed.dataLenInBytes, lacCmdId); LacSymQat_KeyTlsKeyMaterialInputPopulate( &(pService->generic_service_info), &(pCookie->u.tlsKeyInput), pKeyGenTlsOpData->seed.pData, labelPhysAddr); inputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyTlsKeyInputPhyAddr); } /* TLS v1.3 */ else if (ICP_QAT_FW_LA_CMD_HKDF_EXTRACT <= lacCmdId && ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND >= lacCmdId) { CpaCyKeyGenHKDFOpData *pKeyGenTlsOpData = (CpaCyKeyGenHKDFOpData *)pKeyGenSslTlsOpData; lac_sym_qat_hash_state_buffer_info_t hashStateBufferInfo = { 0 }; CpaBoolean hashStateBuffer = CPA_FALSE; icp_qat_fw_auth_cd_ctrl_hdr_t *pHashControlBlock = (icp_qat_fw_auth_cd_ctrl_hdr_t *)&( keyGenReqFtr.cd_ctrl); icp_qat_la_auth_req_params_t *pHashReqParams = NULL; hashStateBufferInfo.pData = pCookie->hashStateBuffer; hashStateBufferInfo.pDataPhys = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyHashStateBufferPhyAddr); hashStateBufferInfo.stateStorageSzQuadWords = 0; LacSymQat_HashSetupReqParamsMetaData(&(keyGenReqFtr), instanceHandle, &(hashSetupData), hashStateBuffer, qatHashMode, CPA_FALSE); pHashReqParams = (icp_qat_la_auth_req_params_t *)&( keyGenReqFtr.serv_specif_rqpars); hashStateBufferInfo.prefixAadSzQuadWords = LAC_BYTES_TO_QUADWORDS( pHashReqParams->u2.inner_prefix_sz + pHashControlBlock->outer_prefix_sz); /* Copy prefix data into hash state buffer */ pMsgDummy = (Cpa8U *)&(keyGenReq); pCacheDummyHdr = (Cpa8U *)&(keyGenReqHdr); pCacheDummyMid = (Cpa8U *)&(keyGenReqMid); pCacheDummyFtr = (Cpa8U *)&(keyGenReqFtr); memcpy(pMsgDummy, pCacheDummyHdr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_MID_IN_LW), pCacheDummyMid, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_MID_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), pCacheDummyFtr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_FTR_IN_LW)); LacSymQat_HashStatePrefixAadBufferPopulate( &hashStateBufferInfo, &keyGenReqFtr, pNestedModeSetupData->pInnerPrefixData, pNestedModeSetupData->innerPrefixLenInBytes, pNestedModeSetupData->pOuterPrefixData, pNestedModeSetupData->outerPrefixLenInBytes); /* Firmware only looks at hash state buffer pointer and * the * hash state buffer size so all other fields are set to * 0 */ LacSymQat_HashRequestParamsPopulate( &(keyGenReq), 0, /* Auth offset */ 0, /* Auth length */ &(pService->generic_service_info), &hashStateBufferInfo, /* Hash state prefix buffer */ ICP_QAT_FW_LA_PARTIAL_NONE, 0, /* Hash result size */ CPA_FALSE, NULL, CPA_CY_SYM_HASH_NONE, /* Hash algorithm */ pKeyGenTlsOpData->secret); /* IKM or PRK */ LacSymQat_KeyTlsRequestPopulate( &keyGenReqMid, cipherSuiteHKDFHashSizes[hashAlgCipher] [LAC_KEY_HKDF_DIGESTS], /* For EXTRACT, EXPAND, FW expects info to be passed as label */ pKeyGenTlsOpData->infoLen, pKeyGenTlsOpData->secretLen, pKeyGenTlsOpData->seedLen, lacCmdId); LacSymQat_KeyTlsHKDFKeyMaterialInputPopulate( &(pService->generic_service_info), &(pCookie->u.tlsHKDFKeyInput), pKeyGenTlsOpData, 0, /* No subLabels used */ lacCmdId); /* Pass op being performed */ inputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyTlsKeyInputPhyAddr); } /* TLS v1.3 LABEL */ else if (ICP_QAT_FW_LA_CMD_HKDF_EXPAND_LABEL == lacCmdId || ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND_LABEL == lacCmdId) { CpaCyKeyGenHKDFOpData *pKeyGenTlsOpData = (CpaCyKeyGenHKDFOpData *)pKeyGenSslTlsOpData; Cpa64U subLabelsPhysAddr = 0; lac_sym_qat_hash_state_buffer_info_t hashStateBufferInfo = { 0 }; CpaBoolean hashStateBuffer = CPA_FALSE; icp_qat_fw_auth_cd_ctrl_hdr_t *pHashControlBlock = (icp_qat_fw_auth_cd_ctrl_hdr_t *)&( keyGenReqFtr.cd_ctrl); icp_qat_la_auth_req_params_t *pHashReqParams = NULL; hashStateBufferInfo.pData = pCookie->hashStateBuffer; hashStateBufferInfo.pDataPhys = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyHashStateBufferPhyAddr); hashStateBufferInfo.stateStorageSzQuadWords = 0; LacSymQat_HashSetupReqParamsMetaData(&(keyGenReqFtr), instanceHandle, &(hashSetupData), hashStateBuffer, qatHashMode, CPA_FALSE); pHashReqParams = (icp_qat_la_auth_req_params_t *)&( keyGenReqFtr.serv_specif_rqpars); hashStateBufferInfo.prefixAadSzQuadWords = LAC_BYTES_TO_QUADWORDS( pHashReqParams->u2.inner_prefix_sz + pHashControlBlock->outer_prefix_sz); /* Copy prefix data into hash state buffer */ pMsgDummy = (Cpa8U *)&(keyGenReq); pCacheDummyHdr = (Cpa8U *)&(keyGenReqHdr); pCacheDummyMid = (Cpa8U *)&(keyGenReqMid); pCacheDummyFtr = (Cpa8U *)&(keyGenReqFtr); memcpy(pMsgDummy, pCacheDummyHdr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_MID_IN_LW), pCacheDummyMid, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_MID_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), pCacheDummyFtr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_FTR_IN_LW)); LacSymQat_HashStatePrefixAadBufferPopulate( &hashStateBufferInfo, &keyGenReqFtr, pNestedModeSetupData->pInnerPrefixData, pNestedModeSetupData->innerPrefixLenInBytes, pNestedModeSetupData->pOuterPrefixData, pNestedModeSetupData->outerPrefixLenInBytes); /* Firmware only looks at hash state buffer pointer and * the * hash state buffer size so all other fields are set to * 0 */ LacSymQat_HashRequestParamsPopulate( &(keyGenReq), 0, /* Auth offset */ 0, /* Auth length */ &(pService->generic_service_info), &hashStateBufferInfo, /* Hash state prefix buffer */ ICP_QAT_FW_LA_PARTIAL_NONE, 0, /* Hash result size */ CPA_FALSE, NULL, CPA_CY_SYM_HASH_NONE, /* Hash algorithm */ pKeyGenTlsOpData->secret); /* IKM or PRK */ LacSymQat_KeyTlsRequestPopulate( &keyGenReqMid, cipherSuiteHKDFHashSizes[hashAlgCipher] [LAC_KEY_HKDF_DIGESTS], pKeyGenTlsOpData->numLabels, /* Number of Labels */ pKeyGenTlsOpData->secretLen, pKeyGenTlsOpData->seedLen, lacCmdId); /* Get physical address of subLabels */ switch (hashAlgCipher) { case CPA_CY_HKDF_TLS_AES_128_GCM_SHA256: /* Fall Through */ case CPA_CY_HKDF_TLS_AES_128_CCM_SHA256: case CPA_CY_HKDF_TLS_AES_128_CCM_8_SHA256: subLabelsPhysAddr = pService->pTlsHKDFSubLabel ->sublabelPhysAddr256; break; case CPA_CY_HKDF_TLS_CHACHA20_POLY1305_SHA256: subLabelsPhysAddr = pService->pTlsHKDFSubLabel ->sublabelPhysAddrChaChaPoly; break; case CPA_CY_HKDF_TLS_AES_256_GCM_SHA384: subLabelsPhysAddr = pService->pTlsHKDFSubLabel ->sublabelPhysAddr384; break; default: break; } LacSymQat_KeyTlsHKDFKeyMaterialInputPopulate( &(pService->generic_service_info), &(pCookie->u.tlsHKDFKeyInput), pKeyGenTlsOpData, subLabelsPhysAddr, lacCmdId); /* Pass op being performed */ inputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyTlsKeyInputPhyAddr); } outputPhysAddr = LAC_MEM_CAST_PTR_TO_UINT64( LAC_OS_VIRT_TO_PHYS_EXTERNAL(pService->generic_service_info, pKeyGenOutputData->pData)); if (outputPhysAddr == 0) { LAC_LOG_ERROR( "Unable to get the physical address of the" " output buffer"); status = CPA_STATUS_FAIL; } } if (CPA_STATUS_SUCCESS == status) { Cpa8U lw26[4]; char *tmp = NULL; unsigned char a; int n = 0; /* Make up the full keyGenReq struct from its constituents * before calling the SalQatMsg functions below. * Note: The full cache struct has been reduced to a * header, mid and footer for memory size reduction */ pMsgDummy = (Cpa8U *)&(keyGenReq); pCacheDummyHdr = (Cpa8U *)&(keyGenReqHdr); pCacheDummyMid = (Cpa8U *)&(keyGenReqMid); pCacheDummyFtr = (Cpa8U *)&(keyGenReqFtr); memcpy(pMsgDummy, pCacheDummyHdr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_MID_IN_LW), pCacheDummyMid, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_MID_IN_LW)); memcpy(&lw26, pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), LAC_LONG_WORD_IN_BYTES); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), pCacheDummyFtr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_FTR_IN_LW)); tmp = (char *)(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW)); /* Copy LW26, or'd with what's already there, into the Msg, for * TLS */ for (n = 0; n < LAC_LONG_WORD_IN_BYTES; n++) { a = (unsigned char)*(tmp + n); lw26[n] = lw26[n] | a; } memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), &lw26, LAC_LONG_WORD_IN_BYTES); contentDescInfo.pData = pCookie->contentDesc; contentDescInfo.hardwareSetupBlockPhys = LAC_MEM_CAST_PTR_TO_UINT64( pSymCookie->keyContentDescPhyAddr); contentDescInfo.hwBlkSzQuadWords = LAC_BYTES_TO_QUADWORDS(hashBlkSizeInBytes); /* Populate common request fields */ SalQatMsg_ContentDescHdrWrite((icp_qat_fw_comn_req_t *)&( keyGenReq), &(contentDescInfo)); SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)&keyGenReq, ICP_QAT_FW_COMN_REQ_CPM_FW_LA, lacCmdId, cmnRequestFlags, laCmdFlags); SalQatMsg_CmnMidWrite((icp_qat_fw_la_bulk_req_t *)&(keyGenReq), pCookie, LAC_SYM_KEY_QAT_PTR_TYPE, inputPhysAddr, outputPhysAddr, 0, 0); /* Send to QAT */ status = icp_adf_transPutMsg(pService->trans_handle_sym_tx, (void *)&(keyGenReq), LAC_QAT_SYM_REQ_SZ_LW); } if (CPA_STATUS_SUCCESS == status) { /* Update stats */ LacKey_StatsInc(lacCmdId, LAC_KEY_REQUESTS, pCookie->instanceHandle); } else { /* Clean up cookie memory */ if (NULL != pCookie) { LacKey_StatsInc(lacCmdId, LAC_KEY_REQUEST_ERRORS, pCookie->instanceHandle); Lac_MemPoolEntryFree(pCookie); } } return status; } /** * @ingroup LacSymKey * Parameters check for TLS v1.0/1.1, v1.2, v1.3 and SSL3 * @description * Check user parameters against the firmware/spec requirements. * * @param[in] pKeyGenOpData Pointer to a structure containing all * the data needed to perform the key * generation operation. * @param[in] hashAlgCipher Specifies the hash algorithm, * or cipher we are using. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[in] pGeneratedKeyBuffer User output buffers. * @param[in] cmdId Keygen operation to perform. */ static CpaStatus LacSymKey_CheckParamSslTls(const void *pKeyGenOpData, Cpa8U hashAlgCipher, const CpaFlatBuffer *pGeneratedKeyBuffer, icp_qat_fw_la_cmd_id_t cmdId) { /* Api max value */ Cpa32U maxSecretLen = 0; Cpa32U maxSeedLen = 0; Cpa32U maxOutputLen = 0; Cpa32U maxInfoLen = 0; Cpa32U maxLabelLen = 0; /* User info */ Cpa32U uSecretLen = 0; Cpa32U uSeedLen = 0; Cpa32U uOutputLen = 0; LAC_CHECK_NULL_PARAM(pKeyGenOpData); LAC_CHECK_NULL_PARAM(pGeneratedKeyBuffer); LAC_CHECK_NULL_PARAM(pGeneratedKeyBuffer->pData); if (ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE == cmdId) { CpaCyKeyGenSslOpData *opData = (CpaCyKeyGenSslOpData *)pKeyGenOpData; /* User info */ uSecretLen = opData->secret.dataLenInBytes; uSeedLen = opData->seed.dataLenInBytes; uOutputLen = opData->generatedKeyLenInBytes; /* Api max value */ maxSecretLen = ICP_QAT_FW_LA_SSL_SECRET_LEN_MAX; maxSeedLen = ICP_QAT_FW_LA_SSL_SEED_LEN_MAX; maxOutputLen = ICP_QAT_FW_LA_SSL_OUTPUT_LEN_MAX; /* Check user buffers */ LAC_CHECK_NULL_PARAM(opData->secret.pData); LAC_CHECK_NULL_PARAM(opData->seed.pData); /* Check operation */ if ((Cpa32U)opData->sslOp > CPA_CY_KEY_SSL_OP_USER_DEFINED) { LAC_INVALID_PARAM_LOG("opData->sslOp"); return CPA_STATUS_INVALID_PARAM; } if ((Cpa32U)opData->sslOp == CPA_CY_KEY_SSL_OP_USER_DEFINED) { LAC_CHECK_NULL_PARAM(opData->userLabel.pData); /* Maximum label length for SSL Key Gen request */ if (opData->userLabel.dataLenInBytes > ICP_QAT_FW_LA_SSL_LABEL_LEN_MAX) { LAC_INVALID_PARAM_LOG( "userLabel.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } } /* Only seed length for SSL3 Key Gen request */ if (maxSeedLen != uSeedLen) { LAC_INVALID_PARAM_LOG("seed.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } /* Maximum output length for SSL3 Key Gen request */ if (uOutputLen > maxOutputLen) { LAC_INVALID_PARAM_LOG("generatedKeyLenInBytes"); return CPA_STATUS_INVALID_PARAM; } } /* TLS v1.1 or TLS v.12 */ else if (ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE == cmdId || ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE == cmdId) { CpaCyKeyGenTlsOpData *opData = (CpaCyKeyGenTlsOpData *)pKeyGenOpData; /* User info */ uSecretLen = opData->secret.dataLenInBytes; uSeedLen = opData->seed.dataLenInBytes; uOutputLen = opData->generatedKeyLenInBytes; if (ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE == cmdId) { /* Api max value */ /* ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX needs to be * multiplied * by 4 in order to verifiy the 512 conditions. We did * not change * ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX as it * represents * the max value tha firmware can handle. */ maxSecretLen = ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX * 4; } else { /* Api max value */ /* ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX needs to be * multiplied * by 8 in order to verifiy the 512 conditions. We did * not change * ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX as it * represents * the max value tha firmware can handle. */ maxSecretLen = ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX * 8; /* Check Hash algorithm */ if (0 == getDigestSizeFromHashAlgo(hashAlgCipher)) { LAC_INVALID_PARAM_LOG("hashAlgorithm"); return CPA_STATUS_INVALID_PARAM; } } maxSeedLen = ICP_QAT_FW_LA_TLS_SEED_LEN_MAX; maxOutputLen = ICP_QAT_FW_LA_TLS_OUTPUT_LEN_MAX; /* Check user buffers */ LAC_CHECK_NULL_PARAM(opData->secret.pData); LAC_CHECK_NULL_PARAM(opData->seed.pData); /* Check operation */ if ((Cpa32U)opData->tlsOp > CPA_CY_KEY_TLS_OP_USER_DEFINED) { LAC_INVALID_PARAM_LOG("opData->tlsOp"); return CPA_STATUS_INVALID_PARAM; } else if ((Cpa32U)opData->tlsOp == CPA_CY_KEY_TLS_OP_USER_DEFINED) { LAC_CHECK_NULL_PARAM(opData->userLabel.pData); /* Maximum label length for TLS Key Gen request */ if (opData->userLabel.dataLenInBytes > ICP_QAT_FW_LA_TLS_LABEL_LEN_MAX) { LAC_INVALID_PARAM_LOG( "userLabel.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } } /* Maximum/only seed length for TLS Key Gen request */ if (((Cpa32U)opData->tlsOp != CPA_CY_KEY_TLS_OP_MASTER_SECRET_DERIVE) && ((Cpa32U)opData->tlsOp != CPA_CY_KEY_TLS_OP_KEY_MATERIAL_DERIVE)) { if (uSeedLen > maxSeedLen) { LAC_INVALID_PARAM_LOG("seed.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } } else { if (maxSeedLen != uSeedLen) { LAC_INVALID_PARAM_LOG("seed.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } } /* Maximum output length for TLS Key Gen request */ if (uOutputLen > maxOutputLen) { LAC_INVALID_PARAM_LOG("generatedKeyLenInBytes"); return CPA_STATUS_INVALID_PARAM; } } /* TLS v1.3 */ else if (cmdId >= ICP_QAT_FW_LA_CMD_HKDF_EXTRACT && cmdId <= ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND_LABEL) { CpaCyKeyGenHKDFOpData *HKDF_Data = (CpaCyKeyGenHKDFOpData *)pKeyGenOpData; CpaCyKeyHKDFCipherSuite cipherSuite = hashAlgCipher; CpaCySymHashAlgorithm hashAlgorithm = getHashAlgorithmFromCipherSuiteHKDF(cipherSuite); maxSeedLen = cipherSuiteHKDFHashSizes[cipherSuite][LAC_KEY_HKDF_DIGESTS]; maxSecretLen = CPA_CY_HKDF_KEY_MAX_SECRET_SZ; maxInfoLen = CPA_CY_HKDF_KEY_MAX_INFO_SZ; maxLabelLen = CPA_CY_HKDF_KEY_MAX_LABEL_SZ; uSecretLen = HKDF_Data->secretLen; /* Check using supported hash function */ if (0 == (uOutputLen = getDigestSizeFromHashAlgo(hashAlgorithm))) { LAC_INVALID_PARAM_LOG("Hash function not supported"); return CPA_STATUS_INVALID_PARAM; } /* Number of labels does not exceed the MAX */ if (HKDF_Data->numLabels > CPA_CY_HKDF_KEY_MAX_LABEL_COUNT) { LAC_INVALID_PARAM_LOG( "CpaCyKeyGenHKDFOpData.numLabels"); return CPA_STATUS_INVALID_PARAM; } switch (cmdId) { case ICP_QAT_FW_LA_CMD_HKDF_EXTRACT: if (maxSeedLen < HKDF_Data->seedLen) { LAC_INVALID_PARAM_LOG( "CpaCyKeyGenHKDFOpData.seedLen"); return CPA_STATUS_INVALID_PARAM; } break; case ICP_QAT_FW_LA_CMD_HKDF_EXPAND: maxSecretLen = cipherSuiteHKDFHashSizes[cipherSuite] [LAC_KEY_HKDF_DIGESTS]; if (maxInfoLen < HKDF_Data->infoLen) { LAC_INVALID_PARAM_LOG( "CpaCyKeyGenHKDFOpData.infoLen"); return CPA_STATUS_INVALID_PARAM; } break; case ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND: uOutputLen *= 2; if (maxSeedLen < HKDF_Data->seedLen) { LAC_INVALID_PARAM_LOG( "CpaCyKeyGenHKDFOpData.seedLen"); return CPA_STATUS_INVALID_PARAM; } if (maxInfoLen < HKDF_Data->infoLen) { LAC_INVALID_PARAM_LOG( "CpaCyKeyGenHKDFOpData.infoLen"); return CPA_STATUS_INVALID_PARAM; } break; case ICP_QAT_FW_LA_CMD_HKDF_EXPAND_LABEL: /* Fall through */ case ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND_LABEL: { Cpa8U subl_mask = 0, subl_number = 1; Cpa8U i = 0; if (maxSeedLen < HKDF_Data->seedLen) { LAC_INVALID_PARAM_LOG( "CpaCyKeyGenHKDFOpData.seedLen"); return CPA_STATUS_INVALID_PARAM; } /* If EXPAND set uOutputLen to zero */ if (ICP_QAT_FW_LA_CMD_HKDF_EXPAND_LABEL == cmdId) { uOutputLen = 0; maxSecretLen = cipherSuiteHKDFHashSizes [cipherSuite][LAC_KEY_HKDF_DIGESTS]; } for (i = 0; i < HKDF_Data->numLabels; i++) { /* Check that the labelLen does not overflow */ if (maxLabelLen < HKDF_Data->label[i].labelLen) { LAC_INVALID_PARAM_LOG1( "CpaCyKeyGenHKDFOpData.label[%d].labelLen", i); return CPA_STATUS_INVALID_PARAM; } if (HKDF_Data->label[i].sublabelFlag & ~HKDF_SUB_LABELS_ALL) { LAC_INVALID_PARAM_LOG1( "CpaCyKeyGenHKDFOpData.label[%d]." "subLabelFlag", i); return CPA_STATUS_INVALID_PARAM; } /* Calculate the appended subLabel output * lengths and * check that the output buffer that the user * has * supplied is the correct length. */ uOutputLen += cipherSuiteHKDFHashSizes [cipherSuite][LAC_KEY_HKDF_DIGESTS]; /* Get mask of subLabel */ subl_mask = HKDF_Data->label[i].sublabelFlag; for (subl_number = 1; subl_number <= LAC_KEY_HKDF_SUBLABELS_NUM; subl_number++) { /* Add the used subLabel key lengths */ if (subl_mask & 1) { uOutputLen += cipherSuiteHKDFHashSizes [cipherSuite] [subl_number]; } subl_mask >>= 1; } } } break; default: break; } } else { LAC_INVALID_PARAM_LOG("TLS/SSL operation"); return CPA_STATUS_INVALID_PARAM; } /* Maximum secret length for TLS/SSL Key Gen request */ if (uSecretLen > maxSecretLen) { LAC_INVALID_PARAM_LOG("HKFD.secretLen/secret.dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } /* Check for enough space in the flat buffer */ if (uOutputLen > pGeneratedKeyBuffer->dataLenInBytes) { LAC_INVALID_PARAM_LOG("pGeneratedKeyBuffer->dataLenInBytes"); return CPA_STATUS_INVALID_PARAM; } return CPA_STATUS_SUCCESS; } /** * */ /** * @ingroup LacSymKey * Common Keygen Code for TLS v1.0/1.1, v1.2 and SSL3. * @description * Check user parameters and perform the required operation. * * @param[in] instanceHandle_in Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenOpData Pointer to a structure containing all * the data needed to perform the key * generation operation. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pGeneratedKeyBuffer User output buffer. * @param[in] cmdId Keygen operation to perform. */ static CpaStatus LacSymKey_KeyGenSslTls(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const void *pKeyGenOpData, Cpa8U hashAlgorithm, CpaFlatBuffer *pGeneratedKeyBuffer, icp_qat_fw_la_cmd_id_t cmdId) { CpaStatus status = CPA_STATUS_FAIL; CpaInstanceHandle instanceHandle = LacKey_GetHandle(instanceHandle_in); - CpaCyCapabilitiesInfo cyCapInfo; LAC_CHECK_INSTANCE_HANDLE(instanceHandle); SAL_CHECK_INSTANCE_TYPE(instanceHandle, (SAL_SERVICE_TYPE_CRYPTO | SAL_SERVICE_TYPE_CRYPTO_SYM)); - SAL_RUNNING_CHECK(instanceHandle); - SalCtrl_CyQueryCapabilities(instanceHandle, &cyCapInfo); - - if (IS_HKDF_UNSUPPORTED(cmdId, cyCapInfo.hkdfSupported)) { - LAC_LOG_ERROR("The device does not support HKDF"); - return CPA_STATUS_UNSUPPORTED; - } status = LacSymKey_CheckParamSslTls(pKeyGenOpData, hashAlgorithm, pGeneratedKeyBuffer, cmdId); if (CPA_STATUS_SUCCESS != status) return status; return LacSymKey_KeyGenSslTls_GenCommon(instanceHandle, pKeyGenCb, pCallbackTag, cmdId, LAC_CONST_PTR_CAST( pKeyGenOpData), hashAlgorithm, pGeneratedKeyBuffer); } /** * @ingroup LacSymKey * SSL Key Generation Function. * @description * This function is used for SSL key generation. It implements the key * generation function defined in section 6.2.2 of the SSL 3.0 * specification as described in * http://www.mozilla.org/projects/security/pki/nss/ssl/draft302.txt. * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * * @param[in] instanceHandle_in Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenSslOpData Pointer to a structure containing all * the data needed to perform the SSL key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. */ CpaStatus cpaCyKeyGenSsl(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenSslOpData *pKeyGenSslOpData, CpaFlatBuffer *pGeneratedKeyBuffer) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } return LacSymKey_KeyGenSslTls(instanceHandle, pKeyGenCb, pCallbackTag, LAC_CONST_PTR_CAST(pKeyGenSslOpData), CPA_CY_SYM_HASH_NONE, /* Hash algorithm */ pGeneratedKeyBuffer, ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE); } /** * @ingroup LacSymKey * TLS Key Generation Function. * @description * This function is used for TLS key generation. It implements the * TLS PRF (Pseudo Random Function) as defined by RFC2246 (TLS v1.0) * and RFC4346 (TLS v1.1). * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * * @param[in] instanceHandle_in Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenTlsOpData Pointer to a structure containing all * the data needed to perform the TLS key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * */ CpaStatus cpaCyKeyGenTls(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenTlsOpData *pKeyGenTlsOpData, CpaFlatBuffer *pGeneratedKeyBuffer) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } return LacSymKey_KeyGenSslTls(instanceHandle, pKeyGenCb, pCallbackTag, LAC_CONST_PTR_CAST(pKeyGenTlsOpData), CPA_CY_SYM_HASH_NONE, /* Hash algorithm */ pGeneratedKeyBuffer, ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE); } /** * @ingroup LacSymKey * @description * This function is used for TLS key generation. It implements the * TLS PRF (Pseudo Random Function) as defined by RFC5246 (TLS v1.2). * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * * @param[in] instanceHandle_in Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenTlsOpData Pointer to a structure containing all * the data needed to perform the TLS key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. */ CpaStatus cpaCyKeyGenTls2(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenTlsOpData *pKeyGenTlsOpData, CpaCySymHashAlgorithm hashAlgorithm, CpaFlatBuffer *pGeneratedKeyBuffer) { CpaInstanceHandle instanceHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM); } else { instanceHandle = instanceHandle_in; } return LacSymKey_KeyGenSslTls(instanceHandle, pKeyGenCb, pCallbackTag, LAC_CONST_PTR_CAST(pKeyGenTlsOpData), hashAlgorithm, pGeneratedKeyBuffer, ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE); } /** * @ingroup LacSymKey * @description * This function is used for TLS1.3 HKDF key generation. It implements * the "extract-then-expand" paradigm as defined by RFC 5869. * * The input seed/secret/info is taken as a flat buffer and the generated * key(s)/labels are returned to caller in a flat data buffer. * * @param[in] instanceHandle_in Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenTlsOpData Pointer to a structure containing * the data needed to perform the HKDF key * generation operation. * The client code allocates the memory * for this structure as contiguous * pinned memory. * This component takes ownership of the * memory until it is returned in the * callback. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. */ CpaStatus cpaCyKeyGenTls3(const CpaInstanceHandle instanceHandle_in, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenHKDFOpData *pKeyGenTlsOpData, CpaCyKeyHKDFCipherSuite cipherSuite, CpaFlatBuffer *pGeneratedKeyBuffer) { LAC_CHECK_NULL_PARAM(pKeyGenTlsOpData); switch (pKeyGenTlsOpData->hkdfKeyOp) { case CPA_CY_HKDF_KEY_EXTRACT: /* Fall through */ case CPA_CY_HKDF_KEY_EXPAND: case CPA_CY_HKDF_KEY_EXTRACT_EXPAND: case CPA_CY_HKDF_KEY_EXPAND_LABEL: case CPA_CY_HKDF_KEY_EXTRACT_EXPAND_LABEL: break; default: LAC_INVALID_PARAM_LOG("HKDF operation not supported"); return CPA_STATUS_INVALID_PARAM; } return LacSymKey_KeyGenSslTls(instanceHandle_in, pKeyGenCb, pCallbackTag, LAC_CONST_PTR_CAST(pKeyGenTlsOpData), cipherSuite, pGeneratedKeyBuffer, (icp_qat_fw_la_cmd_id_t) pKeyGenTlsOpData->hkdfKeyOp); } /* * LacSymKey_Init */ CpaStatus LacSymKey_Init(CpaInstanceHandle instanceHandle_in) { CpaStatus status = CPA_STATUS_SUCCESS; CpaInstanceHandle instanceHandle = LacKey_GetHandle(instanceHandle_in); sal_crypto_service_t *pService = NULL; LAC_CHECK_INSTANCE_HANDLE(instanceHandle); pService = (sal_crypto_service_t *)instanceHandle; pService->pLacKeyStats = LAC_OS_MALLOC(LAC_KEY_NUM_STATS * sizeof(QatUtilsAtomic)); if (NULL != pService->pLacKeyStats) { LAC_OS_BZERO((void *)pService->pLacKeyStats, LAC_KEY_NUM_STATS * sizeof(QatUtilsAtomic)); status = LAC_OS_CAMALLOC(&pService->pSslLabel, ICP_QAT_FW_LA_SSL_LABEL_LEN_MAX, LAC_8BYTE_ALIGNMENT, pService->nodeAffinity); } else { status = CPA_STATUS_RESOURCE; } if (CPA_STATUS_SUCCESS == status) { Cpa32U i = 0; Cpa32U offset = 0; /* Initialise SSL label ABBCCC..... */ for (i = 0; i < ICP_QAT_FW_LA_SSL_ITERATES_LEN_MAX; i++) { memset(pService->pSslLabel + offset, 'A' + i, i + 1); offset += (i + 1); } /* Allocate memory for TLS labels */ status = LAC_OS_CAMALLOC(&pService->pTlsLabel, sizeof(lac_sym_key_tls_labels_t), LAC_8BYTE_ALIGNMENT, pService->nodeAffinity); } if (CPA_STATUS_SUCCESS == status) { /* Allocate memory for HKDF sub_labels */ status = LAC_OS_CAMALLOC(&pService->pTlsHKDFSubLabel, sizeof(lac_sym_key_tls_hkdf_sub_labels_t), LAC_8BYTE_ALIGNMENT, pService->nodeAffinity); } if (CPA_STATUS_SUCCESS == status) { LAC_OS_BZERO(pService->pTlsLabel, sizeof(lac_sym_key_tls_labels_t)); /* Copy the TLS v1.2 labels into the dynamically allocated * structure */ memcpy(pService->pTlsLabel->masterSecret, LAC_SYM_KEY_TLS_MASTER_SECRET_LABEL, sizeof(LAC_SYM_KEY_TLS_MASTER_SECRET_LABEL) - 1); memcpy(pService->pTlsLabel->keyMaterial, LAC_SYM_KEY_TLS_KEY_MATERIAL_LABEL, sizeof(LAC_SYM_KEY_TLS_KEY_MATERIAL_LABEL) - 1); memcpy(pService->pTlsLabel->clientFinished, LAC_SYM_KEY_TLS_CLIENT_FIN_LABEL, sizeof(LAC_SYM_KEY_TLS_CLIENT_FIN_LABEL) - 1); memcpy(pService->pTlsLabel->serverFinished, LAC_SYM_KEY_TLS_SERVER_FIN_LABEL, sizeof(LAC_SYM_KEY_TLS_SERVER_FIN_LABEL) - 1); LAC_OS_BZERO(pService->pTlsHKDFSubLabel, sizeof(lac_sym_key_tls_hkdf_sub_labels_t)); /* Copy the TLS v1.3 subLabels into the dynamically allocated * struct */ /* KEY SHA-256 */ memcpy(&pService->pTlsHKDFSubLabel->keySublabel256, &key256, HKDF_SUB_LABEL_KEY_LENGTH); pService->pTlsHKDFSubLabel->keySublabel256.labelLen = HKDF_SUB_LABEL_KEY_LENGTH; pService->pTlsHKDFSubLabel->keySublabel256.sublabelFlag = 1 << QAT_FW_HKDF_INNER_SUBLABEL_16_BYTE_OKM_BITPOS; /* KEY SHA-384 */ memcpy(&pService->pTlsHKDFSubLabel->keySublabel384, &key384, HKDF_SUB_LABEL_KEY_LENGTH); pService->pTlsHKDFSubLabel->keySublabel384.labelLen = HKDF_SUB_LABEL_KEY_LENGTH; pService->pTlsHKDFSubLabel->keySublabel384.sublabelFlag = 1 << QAT_FW_HKDF_INNER_SUBLABEL_32_BYTE_OKM_BITPOS; /* KEY CHACHAPOLY */ memcpy(&pService->pTlsHKDFSubLabel->keySublabelChaChaPoly, &keyChaChaPoly, HKDF_SUB_LABEL_KEY_LENGTH); pService->pTlsHKDFSubLabel->keySublabelChaChaPoly.labelLen = HKDF_SUB_LABEL_KEY_LENGTH; pService->pTlsHKDFSubLabel->keySublabelChaChaPoly.sublabelFlag = 1 << QAT_FW_HKDF_INNER_SUBLABEL_32_BYTE_OKM_BITPOS; /* IV SHA-256 */ memcpy(&pService->pTlsHKDFSubLabel->ivSublabel256, &iv256, HKDF_SUB_LABEL_IV_LENGTH); pService->pTlsHKDFSubLabel->ivSublabel256.labelLen = HKDF_SUB_LABEL_IV_LENGTH; pService->pTlsHKDFSubLabel->ivSublabel256.sublabelFlag = 1 << QAT_FW_HKDF_INNER_SUBLABEL_12_BYTE_OKM_BITPOS; /* IV SHA-384 */ memcpy(&pService->pTlsHKDFSubLabel->ivSublabel384, &iv384, HKDF_SUB_LABEL_IV_LENGTH); pService->pTlsHKDFSubLabel->ivSublabel384.labelLen = HKDF_SUB_LABEL_IV_LENGTH; pService->pTlsHKDFSubLabel->ivSublabel384.sublabelFlag = 1 << QAT_FW_HKDF_INNER_SUBLABEL_12_BYTE_OKM_BITPOS; /* IV CHACHAPOLY */ memcpy(&pService->pTlsHKDFSubLabel->ivSublabelChaChaPoly, &iv256, HKDF_SUB_LABEL_IV_LENGTH); pService->pTlsHKDFSubLabel->ivSublabelChaChaPoly.labelLen = HKDF_SUB_LABEL_IV_LENGTH; pService->pTlsHKDFSubLabel->ivSublabelChaChaPoly.sublabelFlag = 1 << QAT_FW_HKDF_INNER_SUBLABEL_12_BYTE_OKM_BITPOS; /* RESUMPTION SHA-256 */ memcpy(&pService->pTlsHKDFSubLabel->resumptionSublabel256, &resumption256, HKDF_SUB_LABEL_RESUMPTION_LENGTH); pService->pTlsHKDFSubLabel->resumptionSublabel256.labelLen = HKDF_SUB_LABEL_RESUMPTION_LENGTH; /* RESUMPTION SHA-384 */ memcpy(&pService->pTlsHKDFSubLabel->resumptionSublabel384, &resumption384, HKDF_SUB_LABEL_RESUMPTION_LENGTH); pService->pTlsHKDFSubLabel->resumptionSublabel384.labelLen = HKDF_SUB_LABEL_RESUMPTION_LENGTH; /* RESUMPTION CHACHAPOLY */ memcpy( &pService->pTlsHKDFSubLabel->resumptionSublabelChaChaPoly, &resumption256, HKDF_SUB_LABEL_RESUMPTION_LENGTH); pService->pTlsHKDFSubLabel->resumptionSublabelChaChaPoly .labelLen = HKDF_SUB_LABEL_RESUMPTION_LENGTH; /* FINISHED SHA-256 */ memcpy(&pService->pTlsHKDFSubLabel->finishedSublabel256, &finished256, HKDF_SUB_LABEL_FINISHED_LENGTH); pService->pTlsHKDFSubLabel->finishedSublabel256.labelLen = HKDF_SUB_LABEL_FINISHED_LENGTH; /* FINISHED SHA-384 */ memcpy(&pService->pTlsHKDFSubLabel->finishedSublabel384, &finished384, HKDF_SUB_LABEL_FINISHED_LENGTH); pService->pTlsHKDFSubLabel->finishedSublabel384.labelLen = HKDF_SUB_LABEL_FINISHED_LENGTH; /* FINISHED CHACHAPOLY */ memcpy(&pService->pTlsHKDFSubLabel->finishedSublabelChaChaPoly, &finished256, HKDF_SUB_LABEL_FINISHED_LENGTH); pService->pTlsHKDFSubLabel->finishedSublabelChaChaPoly .labelLen = HKDF_SUB_LABEL_FINISHED_LENGTH; /* Set physical address of sublabels */ pService->pTlsHKDFSubLabel->sublabelPhysAddr256 = LAC_OS_VIRT_TO_PHYS_INTERNAL( &pService->pTlsHKDFSubLabel->keySublabel256); pService->pTlsHKDFSubLabel->sublabelPhysAddr384 = LAC_OS_VIRT_TO_PHYS_INTERNAL( &pService->pTlsHKDFSubLabel->keySublabel384); pService->pTlsHKDFSubLabel->sublabelPhysAddrChaChaPoly = LAC_OS_VIRT_TO_PHYS_INTERNAL( &pService->pTlsHKDFSubLabel->keySublabelChaChaPoly); /* Register request handlers */ LacSymQat_RespHandlerRegister(ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister( ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister( ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister(ICP_QAT_FW_LA_CMD_HKDF_EXTRACT, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister(ICP_QAT_FW_LA_CMD_HKDF_EXPAND, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister( ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister( ICP_QAT_FW_LA_CMD_HKDF_EXPAND_LABEL, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister( ICP_QAT_FW_LA_CMD_HKDF_EXTRACT_AND_EXPAND_LABEL, LacSymKey_SslTlsHandleResponse); LacSymQat_RespHandlerRegister(ICP_QAT_FW_LA_CMD_MGF1, LacSymKey_MgfHandleResponse); } if (CPA_STATUS_SUCCESS != status) { LAC_OS_FREE(pService->pLacKeyStats); LAC_OS_CAFREE(pService->pSslLabel); LAC_OS_CAFREE(pService->pTlsLabel); LAC_OS_CAFREE(pService->pTlsHKDFSubLabel); } return status; } /* * LacSymKey_Shutdown */ CpaStatus LacSymKey_Shutdown(CpaInstanceHandle instanceHandle_in) { CpaStatus status = CPA_STATUS_SUCCESS; CpaInstanceHandle instanceHandle = LacKey_GetHandle(instanceHandle_in); sal_crypto_service_t *pService = NULL; LAC_CHECK_INSTANCE_HANDLE(instanceHandle); pService = (sal_crypto_service_t *)instanceHandle; if (NULL != pService->pLacKeyStats) { LAC_OS_FREE(pService->pLacKeyStats); } LAC_OS_CAFREE(pService->pSslLabel); LAC_OS_CAFREE(pService->pTlsLabel); LAC_OS_CAFREE(pService->pTlsHKDFSubLabel); return status; } diff --git a/sys/dev/qat/qat_api/common/crypto/sym/lac_sym_alg_chain.c b/sys/dev/qat/qat_api/common/crypto/sym/lac_sym_alg_chain.c index 9234b649cf2f..5b4ebdc85654 100644 --- a/sys/dev/qat/qat_api/common/crypto/sym/lac_sym_alg_chain.c +++ b/sys/dev/qat/qat_api/common/crypto/sym/lac_sym_alg_chain.c @@ -1,2395 +1,2395 @@ /*************************************************************************** * * * ***************************************************************************/ /** *************************************************************************** * @file lac_sym_alg_chain.c Algorithm Chaining Perform * * @ingroup LacAlgChain ***************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ #include "cpa.h" #include "cpa_cy_sym.h" #include "icp_accel_devices.h" #include "icp_adf_init.h" #include "icp_adf_transport.h" #include "icp_adf_debug.h" /* ******************************************************************************* * Include private header files ******************************************************************************* */ #include "lac_mem.h" #include "lac_log.h" #include "lac_sym.h" #include "lac_list.h" #include "icp_qat_fw_la.h" #include "lac_sal_types_crypto.h" #include "lac_sal.h" #include "lac_sal_ctrl.h" #include "lac_sym_alg_chain.h" #include "lac_sym_cipher.h" #include "lac_sym_cipher_defs.h" #include "lac_sym_hash.h" #include "lac_sym_hash_defs.h" #include "lac_sym_qat_cipher.h" #include "lac_sym_qat_hash.h" #include "lac_sym_stats.h" #include "lac_sym_queue.h" #include "lac_sym_cb.h" #include "sal_string_parse.h" #include "lac_sym_auth_enc.h" #include "lac_sym_qat.h" #include "sal_hw_gen.h" /** * @ingroup LacAlgChain * This callback function will be invoked whenever a hash precompute * operation completes. It will dequeue and send any QAT requests * which were queued up while the precompute was in progress. * * @param[in] callbackTag Opaque value provided by user. This will * be a pointer to the session descriptor. * * @retval * None * */ static void LacSymAlgChain_HashPrecomputeDoneCb(void *callbackTag) { LacSymCb_PendingReqsDequeue((lac_session_desc_t *)callbackTag); } /** * @ingroup LacAlgChain * Walk the buffer list and find the address for the given offset within * a buffer. * * @param[in] pBufferList Buffer List * @param[in] packetOffset Offset in the buffer list for which address * is to be found. * @param[out] ppDataPtr This is where the sought pointer will be put * @param[out] pSpaceLeft Pointer to a variable in which information about * available space from the given offset to the end * of the flat buffer it is located in will be returned * * @retval CPA_STATUS_SUCCESS Address with a given offset is found in the list * @retval CPA_STATUS_FAIL Address with a given offset not found in the list. * */ static CpaStatus LacSymAlgChain_PtrFromOffsetGet(const CpaBufferList *pBufferList, const Cpa32U packetOffset, Cpa8U **ppDataPtr) { Cpa32U currentOffset = 0; Cpa32U i = 0; for (i = 0; i < pBufferList->numBuffers; i++) { Cpa8U *pCurrData = pBufferList->pBuffers[i].pData; Cpa32U currDataSize = pBufferList->pBuffers[i].dataLenInBytes; /* If the offset is within the address space of the current * buffer */ if ((packetOffset >= currentOffset) && (packetOffset < (currentOffset + currDataSize))) { /* increment by offset of the address in the current * buffer */ *ppDataPtr = pCurrData + (packetOffset - currentOffset); return CPA_STATUS_SUCCESS; } /* Increment by the size of the buffer */ currentOffset += currDataSize; } return CPA_STATUS_FAIL; } /** * @ingroup LacAlgChain * Function which checks for support of partial packets for symmetric * crypto operations * * @param[in] pService Pointer to service descriptor * @param[in/out] pSessionDesc Pointer to session descriptor * */ static void LacSymCheck_IsPartialSupported(Cpa32U capabilitiesMask, lac_session_desc_t *pSessionDesc) { CpaBoolean isHashPartialSupported = CPA_FALSE; CpaBoolean isCipherPartialSupported = CPA_FALSE; CpaBoolean isPartialSupported = CPA_FALSE; switch (pSessionDesc->cipherAlgorithm) { /* Following ciphers don't support partial */ case CPA_CY_SYM_CIPHER_KASUMI_F8: case CPA_CY_SYM_CIPHER_AES_F8: case CPA_CY_SYM_CIPHER_SNOW3G_UEA2: case CPA_CY_SYM_CIPHER_CHACHA: case CPA_CY_SYM_CIPHER_ZUC_EEA3: break; /* All others support partial */ default: isCipherPartialSupported = CPA_TRUE; break; } switch (pSessionDesc->hashAlgorithm) { /* Following hash don't support partial */ case CPA_CY_SYM_HASH_KASUMI_F9: case CPA_CY_SYM_HASH_SNOW3G_UIA2: case CPA_CY_SYM_HASH_POLY: case CPA_CY_SYM_HASH_ZUC_EIA3: break; /* Following hash may support partial based on device capabilities */ case CPA_CY_SYM_HASH_SHA3_256: if (ICP_ACCEL_CAPABILITIES_SHA3_EXT & capabilitiesMask) { isHashPartialSupported = CPA_TRUE; } break; /* All others support partial */ default: isHashPartialSupported = CPA_TRUE; break; } switch (pSessionDesc->symOperation) { case CPA_CY_SYM_OP_CIPHER: isPartialSupported = isCipherPartialSupported; break; case CPA_CY_SYM_OP_HASH: isPartialSupported = isHashPartialSupported; break; case CPA_CY_SYM_OP_ALGORITHM_CHAINING: if (isCipherPartialSupported && isHashPartialSupported) { isPartialSupported = CPA_TRUE; } break; case CPA_CY_SYM_OP_NONE: break; default: break; } if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE == pSessionDesc->cipherSliceType) { /* UCS slice has no support for state flush and * because of that is not able to do partial processing */ isPartialSupported = CPA_FALSE; } pSessionDesc->isPartialSupported = isPartialSupported; } static void LacAlgChain_CipherCDBuild_ForOptimisedCD( const CpaCySymCipherSetupData *pCipherData, lac_session_desc_t *pSessionDesc, icp_qat_fw_slice_t nextSlice, Cpa8U cipherOffsetInConstantsTable, Cpa8U *pOptimisedHwBlockBaseInDRAM, Cpa32U *pOptimisedHwBlockOffsetInDRAM) { Cpa8U *pCipherKeyField = NULL; Cpa32U sizeInBytes = 0; pCipherKeyField = pOptimisedHwBlockBaseInDRAM; /* Need to build up the alternative CD for SHRAM Constants Table use * with an optimised content desc of 64 bytes for this case. Cipher key * will be in the Content desc in DRAM, The cipher config data * is now in the SHRAM constants table. */ LacSymQat_CipherHwBlockPopulateKeySetup( pSessionDesc, pCipherData, pCipherData->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, pCipherKeyField, &sizeInBytes); LacSymQat_CipherCtrlBlockWrite(&(pSessionDesc->shramReqCacheFtr), pSessionDesc->cipherAlgorithm, pSessionDesc->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, nextSlice, cipherOffsetInConstantsTable); *pOptimisedHwBlockOffsetInDRAM += sizeInBytes; } static void LacAlgChain_CipherCDBuild_ForSHRAM(const CpaCySymCipherSetupData *pCipherData, lac_session_desc_t *pSessionDesc, icp_qat_fw_slice_t nextSlice, Cpa8U cipherOffsetInConstantsTable) { Cpa32U sizeInBytes = 0; Cpa8U *pCipherKeyField = NULL; /* Need to build up the alternative CD for SHRAM Constants Table use * Cipher key will be in the Request, The cipher config data is now in * the SHRAM constants table. And nothing is now stored in the content * desc */ pCipherKeyField = (Cpa8U *)&( pSessionDesc->shramReqCacheHdr.cd_pars.s1.serv_specif_fields); LacSymQat_CipherHwBlockPopulateKeySetup( pSessionDesc, pCipherData, pCipherData->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, pCipherKeyField, &sizeInBytes); LacSymQat_CipherCtrlBlockWrite(&(pSessionDesc->shramReqCacheFtr), pSessionDesc->cipherAlgorithm, pSessionDesc->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, nextSlice, cipherOffsetInConstantsTable); } static void LacAlgChain_CipherCDBuild(const CpaCySymCipherSetupData *pCipherData, lac_session_desc_t *pSessionDesc, icp_qat_fw_slice_t nextSlice, Cpa8U cipherOffsetInConstantsTable, icp_qat_fw_comn_flags *pCmnRequestFlags, icp_qat_fw_serv_specif_flags *pLaCmdFlags, Cpa8U *pHwBlockBaseInDRAM, Cpa32U *pHwBlockOffsetInDRAM, Cpa32U capabilitiesMask) { Cpa8U *pCipherKeyField = NULL; Cpa8U cipherOffsetInReqQW = 0; Cpa32U sizeInBytes = 0; void *pCfgData = NULL; Cpa32U cfgOffset = 0; /* Construct the ContentDescriptor in DRAM */ cipherOffsetInReqQW = (*pHwBlockOffsetInDRAM / LAC_QUAD_WORD_IN_BYTES); ICP_QAT_FW_LA_CIPH_AUTH_CFG_OFFSET_FLAG_SET( *pLaCmdFlags, ICP_QAT_FW_CIPH_AUTH_CFG_OFFSET_IN_CD_SETUP); /* construct cipherConfig in CD in DRAM */ cfgOffset = *pHwBlockOffsetInDRAM; pCfgData = pHwBlockBaseInDRAM + cfgOffset; LacSymQat_CipherHwBlockPopulateCfgData(pSessionDesc, pCfgData, &sizeInBytes); ICP_QAT_FW_LA_SLICE_TYPE_SET(*pLaCmdFlags, pSessionDesc->cipherSliceType); *pHwBlockOffsetInDRAM += sizeInBytes; /* Cipher key will be in CD in DRAM. * The Request contains a ptr to the CD. * This ptr will be copied into the request later once the CD is * fully constructed, but the flag is set here. */ pCipherKeyField = pHwBlockBaseInDRAM + *pHwBlockOffsetInDRAM; ICP_QAT_FW_COMN_CD_FLD_TYPE_SET(*pCmnRequestFlags, QAT_COMN_CD_FLD_TYPE_64BIT_ADR); LacSymQat_CipherHwBlockPopulateKeySetup( pSessionDesc, pCipherData, pCipherData->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, pCipherKeyField, &sizeInBytes); /* update offset */ *pHwBlockOffsetInDRAM += sizeInBytes; LacSymQat_CipherCtrlBlockWrite(&(pSessionDesc->reqCacheFtr), pSessionDesc->cipherAlgorithm, pSessionDesc->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, nextSlice, cipherOffsetInReqQW); if (NON_SPC != pSessionDesc->singlePassState) { LacSymQat_CipherCtrlBlockWrite( &(pSessionDesc->reqSpcCacheFtr), pSessionDesc->cipherAlgorithm, pSessionDesc->cipherKeyLenInBytes, pSessionDesc->cipherSliceType, ICP_QAT_FW_SLICE_DRAM_WR, cipherOffsetInReqQW); } } static void LacAlgChain_HashCDBuild( const CpaCySymHashSetupData *pHashData, CpaInstanceHandle instanceHandle, lac_session_desc_t *pSessionDesc, icp_qat_fw_slice_t nextSlice, Cpa8U hashOffsetInConstantsTable, icp_qat_fw_comn_flags *pCmnRequestFlags, icp_qat_fw_serv_specif_flags *pLaCmdFlags, lac_sym_qat_hash_precompute_info_t *pPrecomputeData, lac_sym_qat_hash_precompute_info_t *pPrecomputeDataOptimisedCd, Cpa8U *pHwBlockBaseInDRAM, Cpa32U *pHwBlockOffsetInDRAM, Cpa8U *pOptimisedHwBlockBaseInDRAM, Cpa32U *pOptimisedHwBlockOffsetInDRAM) { Cpa32U sizeInBytes = 0; Cpa32U hwBlockOffsetInQuadWords = *pHwBlockOffsetInDRAM / LAC_QUAD_WORD_IN_BYTES; /* build: * - the hash part of the ContentDescriptor in DRAM */ /* - the hash part of the CD control block in the Request template */ LacSymQat_HashContentDescInit(&(pSessionDesc->reqCacheFtr), instanceHandle, pHashData, pHwBlockBaseInDRAM, hwBlockOffsetInQuadWords, nextSlice, pSessionDesc->qatHashMode, CPA_FALSE, CPA_FALSE, pSessionDesc->useStatefulSha3ContentDesc, pPrecomputeData, &sizeInBytes); /* Using DRAM CD so update offset */ *pHwBlockOffsetInDRAM += sizeInBytes; sizeInBytes = 0; if (pSessionDesc->useOptimisedContentDesc) { LacSymQat_HashContentDescInit(&(pSessionDesc->shramReqCacheFtr), instanceHandle, pHashData, pOptimisedHwBlockBaseInDRAM, hashOffsetInConstantsTable, nextSlice, pSessionDesc->qatHashMode, CPA_TRUE, CPA_TRUE, CPA_FALSE, pPrecomputeDataOptimisedCd, &sizeInBytes); *pOptimisedHwBlockOffsetInDRAM += sizeInBytes; } else if (pSessionDesc->useSymConstantsTable) { /* Need to build up the alternative CD for SHRAM Constants Table * use */ LacSymQat_HashContentDescInit(&(pSessionDesc->shramReqCacheFtr), instanceHandle, pHashData, pHwBlockBaseInDRAM, hashOffsetInConstantsTable, nextSlice, pSessionDesc->qatHashMode, CPA_TRUE, CPA_FALSE, CPA_FALSE, pPrecomputeData, &sizeInBytes); } } static Cpa16U LacAlgChain_GetCipherConfigSize(lac_session_desc_t *pSessionDesc) { if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE == pSessionDesc->cipherSliceType) { return sizeof(icp_qat_hw_ucs_cipher_config_t); } else { return sizeof(icp_qat_hw_cipher_config_t); } } static Cpa16U LacAlgChain_GetCipherConfigOffset(lac_session_desc_t *pSessionDesc) { Cpa16U offset = 0; if (CPA_CY_SYM_OP_ALGORITHM_CHAINING == pSessionDesc->symOperation || SPC == pSessionDesc->singlePassState) { icp_qat_fw_cipher_auth_cd_ctrl_hdr_t *cd_ctrl = (icp_qat_fw_cipher_auth_cd_ctrl_hdr_t *)&pSessionDesc ->reqCacheFtr.cd_ctrl; offset = cd_ctrl->cipher_cfg_offset; } else if (CPA_CY_SYM_OP_CIPHER == pSessionDesc->symOperation) { icp_qat_fw_cipher_cd_ctrl_hdr_t *cd_ctrl = (icp_qat_fw_cipher_cd_ctrl_hdr_t *)&pSessionDesc ->reqCacheFtr.cd_ctrl; offset = cd_ctrl->cipher_cfg_offset; } return offset * LAC_QUAD_WORD_IN_BYTES; } CpaStatus LacAlgChain_SessionAADUpdate(lac_session_desc_t *pSessionDesc, Cpa32U newAADLength) { icp_qat_la_bulk_req_ftr_t *req_ftr = &pSessionDesc->reqCacheFtr; icp_qat_la_auth_req_params_t *req_params = &req_ftr->serv_specif_rqpars; if (!pSessionDesc) return CPA_STATUS_FAIL; pSessionDesc->aadLenInBytes = newAADLength; req_params->u2.aad_sz = LAC_ALIGN_POW2_ROUNDUP(newAADLength, LAC_HASH_AES_GCM_BLOCK_SIZE); if (SPC == pSessionDesc->singlePassState) { Cpa8U *pHwBlockBaseInDRAM = NULL; Cpa32U hwBlockOffsetInDRAM = 0; Cpa32U pSizeInBytes = 0; CpaCySymCipherAlgorithm cipher = pSessionDesc->cipherAlgorithm; pHwBlockBaseInDRAM = (Cpa8U *)pSessionDesc->contentDescInfo.pData; if (pSessionDesc->cipherDirection == CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT) { if (LAC_CIPHER_IS_GCM(cipher)) { hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_GCM_SPC_OFFSET_IN_DRAM); } else { hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_CHACHA_SPC_OFFSET_IN_DRAM); } } LacSymQat_CipherHwBlockPopulateCfgData(pSessionDesc, pHwBlockBaseInDRAM + hwBlockOffsetInDRAM, &pSizeInBytes); } return CPA_STATUS_SUCCESS; } CpaStatus LacAlgChain_SessionCipherKeyUpdate(lac_session_desc_t *pSessionDesc, Cpa8U *pCipherKey) { CpaStatus status = CPA_STATUS_SUCCESS; if (pSessionDesc == NULL || pCipherKey == NULL) return CPA_STATUS_FAIL; if (LAC_CIPHER_IS_ARC4(pSessionDesc->cipherAlgorithm)) { LacSymQat_CipherArc4StateInit( pCipherKey, pSessionDesc->cipherKeyLenInBytes, pSessionDesc->cipherARC4InitialState); } else { CpaCySymCipherSetupData cipherSetupData = { 0 }; Cpa32U sizeInBytes; Cpa8U *pCipherKeyField; Cpa16U cipherConfigSize; Cpa16U cipherConfigOffset; sal_qat_content_desc_info_t *pCdInfo = &(pSessionDesc->contentDescInfo); cipherSetupData.cipherAlgorithm = pSessionDesc->cipherAlgorithm; cipherSetupData.cipherKeyLenInBytes = pSessionDesc->cipherKeyLenInBytes; cipherSetupData.pCipherKey = pCipherKey; cipherSetupData.cipherDirection = pSessionDesc->cipherDirection; cipherConfigSize = LacAlgChain_GetCipherConfigSize(pSessionDesc); cipherConfigOffset = LacAlgChain_GetCipherConfigOffset(pSessionDesc); pCipherKeyField = (Cpa8U *)pCdInfo->pData + cipherConfigOffset + cipherConfigSize; switch (pSessionDesc->symOperation) { case CPA_CY_SYM_OP_CIPHER: { LacSymQat_CipherHwBlockPopulateKeySetup( pSessionDesc, &(cipherSetupData), cipherSetupData.cipherKeyLenInBytes, pSessionDesc->cipherSliceType, pCipherKeyField, &sizeInBytes); if (pSessionDesc->useSymConstantsTable) { pCipherKeyField = (Cpa8U *)&( pSessionDesc->shramReqCacheHdr.cd_pars.s1 .serv_specif_fields); LacSymQat_CipherHwBlockPopulateKeySetup( pSessionDesc, &(cipherSetupData), cipherSetupData.cipherKeyLenInBytes, pSessionDesc->cipherSliceType, pCipherKeyField, &sizeInBytes); } } break; case CPA_CY_SYM_OP_ALGORITHM_CHAINING: { LacSymQat_CipherHwBlockPopulateKeySetup( pSessionDesc, &(cipherSetupData), cipherSetupData.cipherKeyLenInBytes, pSessionDesc->cipherSliceType, pCipherKeyField, &sizeInBytes); } break; default: LAC_LOG_ERROR("Invalid sym operation\n"); status = CPA_STATUS_INVALID_PARAM; break; } } return status; } CpaStatus LacAlgChain_SessionAuthKeyUpdate(lac_session_desc_t *pSessionDesc, Cpa8U *pAuthKey) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa8U *pHwBlockBaseInDRAM = NULL; Cpa8U *pOutHashSetup = NULL; Cpa8U *pInnerState1 = NULL; Cpa8U *pInnerState2 = NULL; CpaCySymSessionSetupData sessionSetup = { 0 }; Cpa16U cipherConfigSize; if (pSessionDesc == NULL || pAuthKey == NULL) return CPA_STATUS_FAIL; cipherConfigSize = LacAlgChain_GetCipherConfigSize(pSessionDesc); icp_qat_fw_cipher_auth_cd_ctrl_hdr_t *cd_ctrl = (icp_qat_fw_cipher_auth_cd_ctrl_hdr_t *)&pSessionDesc->reqCacheFtr .cd_ctrl; pHwBlockBaseInDRAM = (Cpa8U *)pSessionDesc->contentDescInfo.pData; sessionSetup.hashSetupData.hashAlgorithm = pSessionDesc->hashAlgorithm; sessionSetup.hashSetupData.hashMode = pSessionDesc->hashMode; sessionSetup.hashSetupData.authModeSetupData.authKey = pAuthKey; sessionSetup.hashSetupData.authModeSetupData.authKeyLenInBytes = pSessionDesc->authKeyLenInBytes; sessionSetup.hashSetupData.authModeSetupData.aadLenInBytes = pSessionDesc->aadLenInBytes; sessionSetup.hashSetupData.digestResultLenInBytes = pSessionDesc->hashResultSize; sessionSetup.cipherSetupData.cipherAlgorithm = pSessionDesc->cipherAlgorithm; sessionSetup.cipherSetupData.cipherKeyLenInBytes = pSessionDesc->cipherKeyLenInBytes; /* Calculate hash states offsets */ pInnerState1 = pHwBlockBaseInDRAM + cd_ctrl->hash_cfg_offset * LAC_QUAD_WORD_IN_BYTES + sizeof(icp_qat_hw_auth_setup_t); pInnerState2 = pInnerState1 + cd_ctrl->inner_state1_sz; pOutHashSetup = pInnerState2 + cd_ctrl->inner_state2_sz; /* Calculate offset of cipher key */ if (pSessionDesc->laCmdId == ICP_QAT_FW_LA_CMD_CIPHER_HASH) { sessionSetup.cipherSetupData.pCipherKey = (Cpa8U *)pHwBlockBaseInDRAM + cipherConfigSize; } else if (pSessionDesc->laCmdId == ICP_QAT_FW_LA_CMD_HASH_CIPHER) { sessionSetup.cipherSetupData.pCipherKey = pOutHashSetup + cipherConfigSize; } else if (SPC == pSessionDesc->singlePassState) { CpaCySymCipherAlgorithm cipher = pSessionDesc->cipherAlgorithm; Cpa32U hwBlockOffsetInDRAM = 0; if (pSessionDesc->cipherDirection == CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT) { sessionSetup.cipherSetupData.pCipherKey = (Cpa8U *)pHwBlockBaseInDRAM + cipherConfigSize; } else { if (LAC_CIPHER_IS_GCM(cipher)) hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_GCM_SPC_OFFSET_IN_DRAM); else hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_CHACHA_SPC_OFFSET_IN_DRAM); sessionSetup.cipherSetupData.pCipherKey = (Cpa8U *)pHwBlockBaseInDRAM + hwBlockOffsetInDRAM + cipherConfigSize; } } if (!sessionSetup.cipherSetupData.pCipherKey) return CPA_STATUS_FAIL; if (CPA_CY_SYM_HASH_SHA3_256 == pSessionDesc->hashAlgorithm) { if (CPA_FALSE == pSessionDesc->isAuthEncryptOp) { lac_sym_qat_hash_state_buffer_info_t *pHashStateBufferInfo = &(pSessionDesc->hashStateBufferInfo); sal_crypto_service_t *pService = (sal_crypto_service_t *)pSessionDesc->pInstance; status = LacHash_StatePrefixAadBufferInit( &(pService->generic_service_info), &(sessionSetup.hashSetupData), &(pSessionDesc->reqCacheFtr), pSessionDesc->qatHashMode, pSessionDesc->hashStatePrefixBuffer, pHashStateBufferInfo); /* SHRAM Constants Table not used for Auth-Enc */ } } else if (CPA_CY_SYM_HASH_SNOW3G_UIA2 == pSessionDesc->hashAlgorithm) { Cpa8U *authKey = (Cpa8U *)pOutHashSetup + cipherConfigSize; memcpy(authKey, pAuthKey, pSessionDesc->authKeyLenInBytes); } else if (CPA_CY_SYM_HASH_ZUC_EIA3 == pSessionDesc->hashAlgorithm || CPA_CY_SYM_HASH_AES_CBC_MAC == pSessionDesc->hashAlgorithm) { memcpy(pInnerState2, pAuthKey, pSessionDesc->authKeyLenInBytes); } else if (CPA_CY_SYM_HASH_AES_CMAC == pSessionDesc->hashAlgorithm || CPA_CY_SYM_HASH_KASUMI_F9 == pSessionDesc->hashAlgorithm || IS_HASH_MODE_1(pSessionDesc->qatHashMode)) { if (CPA_CY_SYM_HASH_AES_CMAC == pSessionDesc->hashAlgorithm) { memset(pInnerState2, 0, cd_ctrl->inner_state2_sz); } /* Block messages until precompute is completed */ pSessionDesc->nonBlockingOpsInProgress = CPA_FALSE; status = LacHash_PrecomputeDataCreate( pSessionDesc->pInstance, (CpaCySymSessionSetupData *)&(sessionSetup), LacSymAlgChain_HashPrecomputeDoneCb, pSessionDesc, pSessionDesc->hashStatePrefixBuffer, pInnerState1, pInnerState2); } return status; } static void buildCmdData(sal_crypto_service_t *pService, lac_session_desc_t *pSessionDesc, CpaCySymAlgChainOrder *chainOrder, Cpa16U *proto, icp_qat_fw_serv_specif_flags *laCmdFlags, icp_qat_fw_comn_flags *cmnRequestFlags) { /* LW 28 is used to set hash flags for AlgChaining. */ icp_qat_fw_cipher_auth_cd_ctrl_hdr_t *cd_ctrl = (icp_qat_fw_cipher_auth_cd_ctrl_hdr_t *)&pSessionDesc->reqCacheFtr .cd_ctrl; /* proto refers to Protocol Flags, which is legacy FW <=> IA interface * for ZUC and Snow3G. Use extended protocol flags for AlgChaining. */ *proto = ICP_QAT_FW_LA_NO_PROTO; /* no CCM/GCM/Snow3G */ switch (pSessionDesc->symOperation) { case CPA_CY_SYM_OP_CIPHER: pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_CIPHER; if (CPA_CY_SYM_CIPHER_SNOW3G_UEA2 == pSessionDesc->cipherAlgorithm) { *proto = ICP_QAT_FW_LA_SNOW_3G_PROTO; } else if (CPA_CY_SYM_CIPHER_ZUC_EEA3 == pSessionDesc->cipherAlgorithm) { *proto = ICP_QAT_FW_LA_ZUC_3G_PROTO; } if (LAC_CIPHER_IS_CCM(pSessionDesc->cipherAlgorithm)) { *proto = ICP_QAT_FW_LA_CCM_PROTO; } break; case CPA_CY_SYM_OP_HASH: pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_AUTH; if (CPA_CY_SYM_HASH_SNOW3G_UIA2 == pSessionDesc->hashAlgorithm) { *proto = ICP_QAT_FW_LA_SNOW_3G_PROTO; } else if (CPA_CY_SYM_HASH_ZUC_EIA3 == pSessionDesc->hashAlgorithm) { *proto = ICP_QAT_FW_LA_ZUC_3G_PROTO; } break; case CPA_CY_SYM_OP_ALGORITHM_CHAINING: if (LAC_CIPHER_IS_CCM(pSessionDesc->cipherAlgorithm)) { *proto = ICP_QAT_FW_LA_CCM_PROTO; /* Derive chainOrder from direction for isAuthEncryptOp * cases */ /* For CCM & GCM modes: force digest verify flag _TRUE for decrypt and _FALSE for encrypt. For all other cases use user defined value */ if (CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT == pSessionDesc->cipherDirection) { *chainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER; pSessionDesc->digestVerify = CPA_FALSE; } else { *chainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH; if (CPA_TRUE == pService->forceAEADMacVerify) { pSessionDesc->digestVerify = CPA_TRUE; } } } else if (LAC_CIPHER_IS_GCM(pSessionDesc->cipherAlgorithm)) { *proto = ICP_QAT_FW_LA_GCM_PROTO; /* Derive chainOrder from direction for isAuthEncryptOp * cases */ /* For CCM & GCM modes: force digest verify flag _TRUE for decrypt and _FALSE for encrypt. For all other cases use user defined value */ if (CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT == pSessionDesc->cipherDirection) { *chainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH; pSessionDesc->digestVerify = CPA_FALSE; } else { *chainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER; if (CPA_TRUE == pService->forceAEADMacVerify) { pSessionDesc->digestVerify = CPA_TRUE; } } } else if (LAC_CIPHER_IS_CHACHA( pSessionDesc->cipherAlgorithm)) { if (CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT == pSessionDesc->cipherDirection) { *chainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH; } else { *chainOrder = CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER; } } else { pSessionDesc->isAuthEncryptOp = CPA_FALSE; if (CPA_CY_SYM_CIPHER_SNOW3G_UEA2 == pSessionDesc->cipherAlgorithm) { *proto = ICP_QAT_FW_LA_SNOW_3G_PROTO; } else if (CPA_CY_SYM_CIPHER_ZUC_EEA3 == pSessionDesc->cipherAlgorithm) { *proto = ICP_QAT_FW_LA_ZUC_3G_PROTO; } if (CPA_CY_SYM_HASH_SNOW3G_UIA2 == pSessionDesc->hashAlgorithm) { /* Need to set LW 28 hash flags as well. */ ICP_QAT_FW_HASH_FLAG_SNOW3G_UIA2_SET( cd_ctrl->hash_flags, QAT_FW_LA_SNOW3G_UIA2); } else if (CPA_CY_SYM_HASH_ZUC_EIA3 == pSessionDesc->hashAlgorithm) { /* Need to set LW 28 hash flags as well. */ ICP_QAT_FW_HASH_FLAG_ZUC_EIA3_SET( cd_ctrl->hash_flags, QAT_FW_LA_ZUC_EIA3); } } if (CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH == *chainOrder) { pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_CIPHER_HASH; } else if (CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER == *chainOrder) { pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_HASH_CIPHER; } break; default: break; } /* * Build the header flags with the default settings for this session. */ if (pSessionDesc->isDPSession == CPA_TRUE) { *cmnRequestFlags = ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_64BIT_ADR, LAC_SYM_DP_QAT_PTR_TYPE); } else { *cmnRequestFlags = ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_64BIT_ADR, LAC_SYM_DEFAULT_QAT_PTR_TYPE); } LacSymQat_LaSetDefaultFlags(laCmdFlags, pSessionDesc->symOperation); return; } static void updateLaCmdFlags(lac_session_desc_t *pSessionDesc, Cpa16U proto, icp_qat_fw_serv_specif_flags *laCmdFlags) { if (pSessionDesc->isAuth) { if (pSessionDesc->digestVerify) { ICP_QAT_FW_LA_CMP_AUTH_SET(*laCmdFlags, ICP_QAT_FW_LA_CMP_AUTH_RES); ICP_QAT_FW_LA_RET_AUTH_SET( *laCmdFlags, ICP_QAT_FW_LA_NO_RET_AUTH_RES); } else { ICP_QAT_FW_LA_RET_AUTH_SET(*laCmdFlags, ICP_QAT_FW_LA_RET_AUTH_RES); ICP_QAT_FW_LA_CMP_AUTH_SET( *laCmdFlags, ICP_QAT_FW_LA_NO_CMP_AUTH_RES); } } if ((CPA_CY_SYM_CIPHER_ZUC_EEA3 == pSessionDesc->cipherAlgorithm) || (CPA_CY_SYM_HASH_ZUC_EIA3 == pSessionDesc->hashAlgorithm)) { /* New bit position (12) for ZUC. The FW provides a specific * macro to use to set the ZUC proto flag. With the new FW I/F * this needs to be set for both Cipher and Auth */ ICP_QAT_FW_LA_ZUC_3G_PROTO_FLAG_SET(*laCmdFlags, proto); } else { /* Configure the common header */ ICP_QAT_FW_LA_PROTO_SET(*laCmdFlags, proto); } /* set Append flag, if digest is appended */ if (pSessionDesc->digestIsAppended) { ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET( *laCmdFlags, ICP_QAT_FW_LA_DIGEST_IN_BUFFER); } else { ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET( *laCmdFlags, ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER); } } static lac_single_pass_state_t LacSymAlgChain_GetSpcState(CpaCySymCipherAlgorithm cipher, CpaCySymHashAlgorithm hash, Cpa32U capabilitiesMask) { lac_single_pass_state_t state = NON_SPC; if (capabilitiesMask & ICP_ACCEL_CAPABILITIES_CHACHA_POLY) { switch (cipher) { case CPA_CY_SYM_CIPHER_CHACHA: { if (CPA_CY_SYM_HASH_POLY == hash) state = SPC; break; } case CPA_CY_SYM_CIPHER_AES_GCM: { if ((CPA_CY_SYM_HASH_AES_GCM == hash) || (CPA_CY_SYM_HASH_AES_GMAC == hash)) state = LIKELY_SPC; break; } case CPA_CY_SYM_CIPHER_AES_CCM: { if (LAC_CIPHER_AES_V2(capabilitiesMask)) state = SPC; } default: /* Do Nothing as it is NON_SPC */ break; } } return state; } static CpaBoolean LacAlgChain_UseStatefulSha3ContentDesc(CpaBoolean partialsNotRequired, Cpa32U capabilitiesMask, lac_session_desc_t *pSessionDesc) { CpaBoolean hasSha3Ext = ICP_ACCEL_CAPABILITIES_SHA3_EXT & capabilitiesMask; CpaBoolean useStatefulSha3DescFlag = CPA_FALSE; if (hasSha3Ext && !partialsNotRequired && (pSessionDesc->symOperation == CPA_CY_SYM_OP_HASH) && LAC_HASH_IS_SHA3(pSessionDesc->hashAlgorithm)) { useStatefulSha3DescFlag = CPA_TRUE; } return useStatefulSha3DescFlag; } /** @ingroup LacAlgChain */ CpaStatus LacAlgChain_SessionInit(const CpaInstanceHandle instanceHandle, const CpaCySymSessionSetupData *pSessionSetupData, lac_session_desc_t *pSessionDesc) { CpaStatus stat, status = CPA_STATUS_SUCCESS; sal_qat_content_desc_info_t *pCdInfo = NULL; sal_qat_content_desc_info_t *pCdInfoOptimised = NULL; sal_crypto_service_t *pService = (sal_crypto_service_t *)instanceHandle; Cpa32U capabilitiesMask = pService->generic_service_info.capabilitiesMask; Cpa8U *pHwBlockBaseInDRAM = NULL; Cpa8U *pOptimisedHwBlockBaseInDRAM = NULL; Cpa32U hwBlockOffsetInDRAM = 0; Cpa32U optimisedHwBlockOffsetInDRAM = 0; Cpa8U cipherOffsetInConstantsTable = 0; Cpa8U hashOffsetInConstantsTable = 0; icp_qat_fw_comn_flags cmnRequestFlags = 0; icp_qat_fw_comn_req_t *pMsg = NULL; icp_qat_fw_comn_req_t *pMsgS = NULL; const CpaCySymCipherSetupData *pCipherData; const CpaCySymHashSetupData *pHashData; Cpa16U proto = ICP_QAT_FW_LA_NO_PROTO; /* no CCM/GCM/Snow3G */ CpaCySymAlgChainOrder chainOrder = 0; lac_sym_qat_hash_precompute_info_t precomputeData = { 0 }; lac_sym_qat_hash_precompute_info_t precomputeDataOptimisedCd = { 0 }; pCipherData = &(pSessionSetupData->cipherSetupData); pHashData = &(pSessionSetupData->hashSetupData); /*------------------------------------------------------------------------- * Populate session data *-----------------------------------------------------------------------*/ /* Initialise Request Queue */ stat = LAC_SPINLOCK_INIT(&pSessionDesc->requestQueueLock); if (CPA_STATUS_SUCCESS != stat) { LAC_LOG_ERROR("Spinlock init failed for sessionLock"); return CPA_STATUS_RESOURCE; } pSessionDesc->pRequestQueueHead = NULL; pSessionDesc->pRequestQueueTail = NULL; pSessionDesc->nonBlockingOpsInProgress = CPA_TRUE; pSessionDesc->pInstance = instanceHandle; pSessionDesc->digestIsAppended = pSessionSetupData->digestIsAppended; pSessionDesc->digestVerify = pSessionSetupData->verifyDigest; /* Reset the pending callback counter */ qatUtilsAtomicSet(0, &pSessionDesc->u.pendingCbCount); qatUtilsAtomicSet(0, &pSessionDesc->u.pendingDpCbCount); /* Partial state must be set to full, to indicate that next packet * expected on the session is a full packet or the start of a * partial packet. */ pSessionDesc->partialState = CPA_CY_SYM_PACKET_TYPE_FULL; pSessionDesc->symOperation = pSessionSetupData->symOperation; switch (pSessionDesc->symOperation) { case CPA_CY_SYM_OP_CIPHER: pSessionDesc->isCipher = CPA_TRUE; pSessionDesc->isAuth = CPA_FALSE; pSessionDesc->isAuthEncryptOp = CPA_FALSE; pSessionDesc->singlePassState = NON_SPC; break; case CPA_CY_SYM_OP_HASH: pSessionDesc->isCipher = CPA_FALSE; pSessionDesc->isAuth = CPA_TRUE; pSessionDesc->isAuthEncryptOp = CPA_FALSE; pSessionDesc->singlePassState = NON_SPC; break; case CPA_CY_SYM_OP_ALGORITHM_CHAINING: { pSessionDesc->isCipher = CPA_TRUE; pSessionDesc->isAuth = CPA_TRUE; pSessionDesc->singlePassState = LacSymAlgChain_GetSpcState(pCipherData->cipherAlgorithm, pHashData->hashAlgorithm, capabilitiesMask); switch (pSessionSetupData->cipherSetupData.cipherAlgorithm) { case CPA_CY_SYM_CIPHER_AES_CCM: { pSessionDesc->isAuthEncryptOp = CPA_TRUE; pSessionDesc->digestIsAppended = CPA_TRUE; } break; case CPA_CY_SYM_CIPHER_AES_GCM: case CPA_CY_SYM_CIPHER_CHACHA: pSessionDesc->isAuthEncryptOp = CPA_TRUE; break; default: { pSessionDesc->isAuthEncryptOp = CPA_FALSE; /* Use the chainOrder passed in */ chainOrder = pSessionSetupData->algChainOrder; if ((chainOrder != CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER) && (chainOrder != CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH)) { LAC_INVALID_PARAM_LOG("algChainOrder"); return CPA_STATUS_INVALID_PARAM; } } break; } } break; default: pSessionDesc->singlePassState = NON_SPC; break; } if (pSessionDesc->isCipher) { /* Populate cipher specific session data */ status = LacCipher_SessionSetupDataCheck(pCipherData, capabilitiesMask); if (CPA_STATUS_SUCCESS == status) { pSessionDesc->cipherAlgorithm = pCipherData->cipherAlgorithm; pSessionDesc->cipherKeyLenInBytes = pCipherData->cipherKeyLenInBytes; pSessionDesc->cipherDirection = pCipherData->cipherDirection; /* ARC4 base key isn't added to the content descriptor, * because we don't need to pass it directly to the QAT * engine. Instead an initial cipher state & key matrix * is derived from the base key and provided to the QAT * through the state pointer in the request params. * We'll store this initial state in the session * descriptor. */ if (LAC_CIPHER_IS_ARC4(pSessionDesc->cipherAlgorithm)) { LacSymQat_CipherArc4StateInit( pCipherData->pCipherKey, pSessionDesc->cipherKeyLenInBytes, pSessionDesc->cipherARC4InitialState); pSessionDesc->cipherARC4InitialStatePhysAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, pSessionDesc->cipherARC4InitialState); if (0 == pSessionDesc ->cipherARC4InitialStatePhysAddr) { LAC_LOG_ERROR( "Unable to get the physical address of " "the initial state for ARC4\n"); status = CPA_STATUS_FAIL; } } } } if ((CPA_STATUS_SUCCESS == status) && pSessionDesc->isAuth) { /* Populate auth-specific session data */ const CpaCySymHashSetupData *pHashData = &pSessionSetupData->hashSetupData; status = LacHash_HashContextCheck(instanceHandle, pHashData); if (CPA_STATUS_SUCCESS == status) { pSessionDesc->hashResultSize = pHashData->digestResultLenInBytes; pSessionDesc->hashMode = pHashData->hashMode; pSessionDesc->hashAlgorithm = pHashData->hashAlgorithm; /* Save the authentication key length for further update */ if (CPA_CY_SYM_HASH_MODE_AUTH == pHashData->hashMode) { pSessionDesc->authKeyLenInBytes = pHashData->authModeSetupData .authKeyLenInBytes; } if (CPA_TRUE == pSessionDesc->isAuthEncryptOp || (pHashData->hashAlgorithm == CPA_CY_SYM_HASH_SNOW3G_UIA2 || pHashData->hashAlgorithm == CPA_CY_SYM_HASH_ZUC_EIA3)) { pSessionDesc->aadLenInBytes = pHashData->authModeSetupData.aadLenInBytes; } /* Set the QAT hash mode */ if ((pHashData->hashMode == CPA_CY_SYM_HASH_MODE_NESTED) || (pHashData->hashMode == CPA_CY_SYM_HASH_MODE_PLAIN) || (pHashData->hashMode == CPA_CY_SYM_HASH_MODE_AUTH && pHashData->hashAlgorithm == CPA_CY_SYM_HASH_AES_CBC_MAC)) { pSessionDesc->qatHashMode = ICP_QAT_HW_AUTH_MODE0; } else /* CPA_CY_SYM_HASH_MODE_AUTH && anything except CPA_CY_SYM_HASH_AES_CBC_MAC */ { if (IS_HMAC_ALG(pHashData->hashAlgorithm)) { /* SHA3 HMAC and SM3 do not support * precompute, force MODE2 for AUTH */ if (LAC_HASH_IS_SHA3( pHashData->hashAlgorithm) || (CPA_CY_SYM_HASH_SM3 == pHashData->hashAlgorithm)) { pSessionDesc->qatHashMode = ICP_QAT_HW_AUTH_MODE2; } else { pSessionDesc->qatHashMode = pService->qatHmacMode; } } else if (CPA_CY_SYM_HASH_ZUC_EIA3 == pHashData->hashAlgorithm) { pSessionDesc->qatHashMode = ICP_QAT_HW_AUTH_MODE0; } else { pSessionDesc->qatHashMode = ICP_QAT_HW_AUTH_MODE1; } } } } /*------------------------------------------------------------------------- * build the message templates * create two content descriptors in the case we can support using SHRAM * constants and an optimised content descriptor. we have to do this in - *case of partials. 64 byte content descriptor is used in the SHRAM case - *for AES-128-HMAC-SHA1 + * case of partials. 64 byte content descriptor is used in the SHRAM + * case for AES-128-HMAC-SHA1 *-----------------------------------------------------------------------*/ if (CPA_STATUS_SUCCESS == status) { pSessionDesc->cipherSliceType = LacCipher_GetCipherSliceType(pService, pSessionDesc->cipherAlgorithm, pSessionDesc->hashAlgorithm); LacSymCheck_IsPartialSupported(capabilitiesMask, pSessionDesc); pSessionDesc->useOptimisedContentDesc = CPA_FALSE; pSessionDesc->useStatefulSha3ContentDesc = CPA_FALSE; /* Build configuration data */ buildCmdData(pService, pSessionDesc, &chainOrder, &proto, &pSessionDesc->laCmdFlags, &cmnRequestFlags); if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE == pSessionDesc->cipherSliceType) pSessionDesc->useSymConstantsTable = CPA_FALSE; else pSessionDesc->useSymConstantsTable = LacSymQat_UseSymConstantsTable( pSessionDesc, &cipherOffsetInConstantsTable, &hashOffsetInConstantsTable); /* for a certain combination of Algorthm Chaining we want to use an optimised cd block */ if (pSessionDesc->symOperation == CPA_CY_SYM_OP_ALGORITHM_CHAINING && pSessionDesc->useSymConstantsTable == CPA_TRUE) { pSessionDesc->useOptimisedContentDesc = LacSymQat_UseOptimisedContentDesc(pSessionDesc); } /* check whether we need to construct content desc for stateful * SHA3 */ pSessionDesc->useStatefulSha3ContentDesc = LacAlgChain_UseStatefulSha3ContentDesc( pSessionSetupData->partialsNotRequired, capabilitiesMask, pSessionDesc); /* setup some convenience pointers */ pCdInfo = &(pSessionDesc->contentDescInfo); pHwBlockBaseInDRAM = (Cpa8U *)pCdInfo->pData; hwBlockOffsetInDRAM = 0; /* set up the pointer for the optimised content desc if this is * possible we still have to support both cd types in case of * partials so we construct both */ if (pSessionDesc->useOptimisedContentDesc == CPA_TRUE) { pCdInfoOptimised = &(pSessionDesc->contentDescOptimisedInfo); pOptimisedHwBlockBaseInDRAM = (Cpa8U *)pCdInfoOptimised->pData; optimisedHwBlockOffsetInDRAM = 0; } switch (pSessionDesc->symOperation) { case CPA_CY_SYM_OP_CIPHER: { LacAlgChain_CipherCDBuild( pCipherData, pSessionDesc, ICP_QAT_FW_SLICE_DRAM_WR, cipherOffsetInConstantsTable, &pSessionDesc->cmnRequestFlags, &pSessionDesc->laCmdFlags, pHwBlockBaseInDRAM, &hwBlockOffsetInDRAM, capabilitiesMask); if (pSessionDesc->useSymConstantsTable) { LacAlgChain_CipherCDBuild_ForSHRAM( pCipherData, pSessionDesc, ICP_QAT_FW_SLICE_DRAM_WR, cipherOffsetInConstantsTable); } } break; case CPA_CY_SYM_OP_HASH: LacAlgChain_HashCDBuild(pHashData, instanceHandle, pSessionDesc, ICP_QAT_FW_SLICE_NULL, hashOffsetInConstantsTable, &pSessionDesc->cmnRequestFlags, &pSessionDesc->laCmdFlags, &precomputeData, &precomputeDataOptimisedCd, pHwBlockBaseInDRAM, &hwBlockOffsetInDRAM, NULL, NULL); break; case CPA_CY_SYM_OP_ALGORITHM_CHAINING: /* For CCM/GCM, CPM firmware currently expects the * cipher and hash h/w setup blocks to be arranged * according to the chain order (Except for GCM/CCM, * order doesn't actually matter as long as the config * offsets are set correctly in CD control blocks */ if (CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER == chainOrder) { LacAlgChain_HashCDBuild( pHashData, instanceHandle, pSessionDesc, ICP_QAT_FW_SLICE_CIPHER, hashOffsetInConstantsTable, &pSessionDesc->cmnRequestFlags, &pSessionDesc->laCmdFlags, &precomputeData, &precomputeDataOptimisedCd, pHwBlockBaseInDRAM, &hwBlockOffsetInDRAM, pOptimisedHwBlockBaseInDRAM, &optimisedHwBlockOffsetInDRAM); LacAlgChain_CipherCDBuild( pCipherData, pSessionDesc, ICP_QAT_FW_SLICE_DRAM_WR, cipherOffsetInConstantsTable, &pSessionDesc->cmnRequestFlags, &pSessionDesc->laCmdFlags, pHwBlockBaseInDRAM, &hwBlockOffsetInDRAM, capabilitiesMask); if (pSessionDesc->useOptimisedContentDesc) { LacAlgChain_CipherCDBuild_ForOptimisedCD( pCipherData, pSessionDesc, ICP_QAT_FW_SLICE_DRAM_WR, cipherOffsetInConstantsTable, pOptimisedHwBlockBaseInDRAM, &optimisedHwBlockOffsetInDRAM); } if (NON_SPC != pSessionDesc->singlePassState) { pCdInfo->hwBlkSzQuadWords = (LAC_BYTES_TO_QUADWORDS( hwBlockOffsetInDRAM)); pMsg = (icp_qat_fw_comn_req_t *)&( pSessionDesc->reqSpcCacheHdr); SalQatMsg_ContentDescHdrWrite( (icp_qat_fw_comn_req_t *)pMsg, pCdInfo); } } else /* CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH */ { LacAlgChain_CipherCDBuild( pCipherData, pSessionDesc, ICP_QAT_FW_SLICE_AUTH, cipherOffsetInConstantsTable, &pSessionDesc->cmnRequestFlags, &pSessionDesc->laCmdFlags, pHwBlockBaseInDRAM, &hwBlockOffsetInDRAM, capabilitiesMask); if (pSessionDesc->useOptimisedContentDesc) { LacAlgChain_CipherCDBuild_ForOptimisedCD( pCipherData, pSessionDesc, ICP_QAT_FW_SLICE_AUTH, cipherOffsetInConstantsTable, pOptimisedHwBlockBaseInDRAM, &optimisedHwBlockOffsetInDRAM); } if (NON_SPC != pSessionDesc->singlePassState) { pCdInfo->hwBlkSzQuadWords = LAC_BYTES_TO_QUADWORDS( hwBlockOffsetInDRAM); pMsg = (icp_qat_fw_comn_req_t *)&( pSessionDesc->reqSpcCacheHdr); SalQatMsg_ContentDescHdrWrite( (icp_qat_fw_comn_req_t *)pMsg, pCdInfo); } LacAlgChain_HashCDBuild( pHashData, instanceHandle, pSessionDesc, ICP_QAT_FW_SLICE_DRAM_WR, hashOffsetInConstantsTable, &pSessionDesc->cmnRequestFlags, &pSessionDesc->laCmdFlags, &precomputeData, &precomputeDataOptimisedCd, pHwBlockBaseInDRAM, &hwBlockOffsetInDRAM, pOptimisedHwBlockBaseInDRAM, &optimisedHwBlockOffsetInDRAM); } break; default: LAC_LOG_ERROR("Invalid sym operation\n"); status = CPA_STATUS_INVALID_PARAM; } } if ((CPA_STATUS_SUCCESS == status) && pSessionDesc->isAuth) { lac_sym_qat_hash_state_buffer_info_t *pHashStateBufferInfo = &(pSessionDesc->hashStateBufferInfo); CpaBoolean hashStateBuffer = CPA_TRUE; /* set up fields in both the cd_ctrl and reqParams which * describe the ReqParams block */ LacSymQat_HashSetupReqParamsMetaData( &(pSessionDesc->reqCacheFtr), instanceHandle, pHashData, hashStateBuffer, pSessionDesc->qatHashMode, pSessionDesc->digestVerify); if (pSessionDesc->useSymConstantsTable) { /* Need to set up for SHRAM Constants Table use also */ LacSymQat_HashSetupReqParamsMetaData( &(pSessionDesc->shramReqCacheFtr), instanceHandle, pHashData, hashStateBuffer, pSessionDesc->qatHashMode, pSessionDesc->digestVerify); } /* populate the hash state prefix buffer info structure * (part of user allocated session memory & the * buffer itself. For CCM/GCM the buffer is stored in the * cookie and is not initialised here) */ if (CPA_FALSE == pSessionDesc->isAuthEncryptOp) { LAC_CHECK_64_BYTE_ALIGNMENT( &(pSessionDesc->hashStatePrefixBuffer[0])); status = LacHash_StatePrefixAadBufferInit( &(pService->generic_service_info), pHashData, &(pSessionDesc->reqCacheFtr), pSessionDesc->qatHashMode, pSessionDesc->hashStatePrefixBuffer, pHashStateBufferInfo); /* SHRAM Constants Table not used for Auth-Enc */ } if (CPA_STATUS_SUCCESS == status) { if (IS_HASH_MODE_1(pSessionDesc->qatHashMode) || CPA_CY_SYM_HASH_ZUC_EIA3 == pHashData->hashAlgorithm) { LAC_CHECK_64_BYTE_ALIGNMENT( &(pSessionDesc->hashStatePrefixBuffer[0])); /* Block messages until precompute is completed */ pSessionDesc->nonBlockingOpsInProgress = CPA_FALSE; status = LacHash_PrecomputeDataCreate( instanceHandle, (CpaCySymSessionSetupData *) pSessionSetupData, LacSymAlgChain_HashPrecomputeDoneCb, pSessionDesc, pSessionDesc->hashStatePrefixBuffer, precomputeData.pState1, precomputeData.pState2); if (pSessionDesc->useOptimisedContentDesc) { status = LacHash_PrecomputeDataCreate( instanceHandle, (CpaCySymSessionSetupData *) pSessionSetupData, LacSymAlgChain_HashPrecomputeDoneCb, pSessionDesc, pSessionDesc->hashStatePrefixBuffer, precomputeDataOptimisedCd.pState1, precomputeDataOptimisedCd.pState2); } } else if (pHashData->hashAlgorithm == CPA_CY_SYM_HASH_AES_CBC_MAC) { if (NULL != precomputeData.pState2) { LAC_OS_BZERO(precomputeData.pState2, precomputeData.state2Size); memcpy(precomputeData.pState2, pHashData->authModeSetupData .authKey, pHashData->authModeSetupData .authKeyLenInBytes); } } } } if (CPA_STATUS_SUCCESS == status) { /* Configure the ContentDescriptor field in the request if not done already */ pCdInfo->hwBlkSzQuadWords = LAC_BYTES_TO_QUADWORDS(hwBlockOffsetInDRAM); pMsg = (icp_qat_fw_comn_req_t *)&(pSessionDesc->reqCacheHdr); SalQatMsg_ContentDescHdrWrite((icp_qat_fw_comn_req_t *)pMsg, pCdInfo); pMsgS = (icp_qat_fw_comn_req_t *)&(pSessionDesc->shramReqCacheHdr); /*If we are using the optimised CD then we have to set this up correctly in the SHARM reqCache*/ if (pSessionDesc->useOptimisedContentDesc) { pCdInfoOptimised->hwBlkSzQuadWords = LAC_BYTES_TO_QUADWORDS( optimisedHwBlockOffsetInDRAM); SalQatMsg_ContentDescHdrWrite( (icp_qat_fw_comn_req_t *)pMsgS, pCdInfoOptimised); } /* Updates command flags basing on configured alg */ updateLaCmdFlags(pSessionDesc, proto, &pSessionDesc->laCmdFlags); SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)pMsg, ICP_QAT_FW_COMN_REQ_CPM_FW_LA, pSessionDesc->laCmdId, pSessionDesc->cmnRequestFlags, pSessionDesc->laCmdFlags); /* Need to duplicate if SHRAM Constants Table used */ if (pSessionDesc->useSymConstantsTable) { ICP_QAT_FW_LA_CIPH_AUTH_CFG_OFFSET_FLAG_SET( pSessionDesc->laCmdFlags, ICP_QAT_FW_CIPH_AUTH_CFG_OFFSET_IN_SHRAM_CP); if (pSessionDesc->isCipher && !pSessionDesc->useOptimisedContentDesc) { ICP_QAT_FW_COMN_CD_FLD_TYPE_SET( cmnRequestFlags, QAT_COMN_CD_FLD_TYPE_16BYTE_DATA); } SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)pMsgS, ICP_QAT_FW_COMN_REQ_CPM_FW_LA, pSessionDesc->laCmdId, cmnRequestFlags, pSessionDesc->laCmdFlags); } } return status; } static void LacAlgChain_StatefulSha3_SkipStateLoadFlags(icp_qat_fw_la_bulk_req_t *pMsg, Cpa32U packetType, icp_qat_hw_auth_mode_t qatHashMode) { icp_qat_fw_auth_cd_ctrl_hdr_t *pAuthCdCtrlHdr = NULL; pAuthCdCtrlHdr = (icp_qat_fw_auth_cd_ctrl_hdr_t *)&(pMsg->cd_ctrl); if (IS_HASH_MODE_2(qatHashMode)) { if ((ICP_QAT_FW_LA_PARTIAL_START == packetType) || (ICP_QAT_FW_LA_PARTIAL_NONE == packetType)) { ICP_QAT_FW_HASH_FLAG_SKIP_INNER_STATE1_LOAD_SET( pAuthCdCtrlHdr->hash_flags, QAT_FW_LA_SKIP_INNER_STATE1_LOAD); ICP_QAT_FW_HASH_FLAG_SKIP_OUTER_STATE1_LOAD_SET( pAuthCdCtrlHdr->hash_flags, QAT_FW_LA_SKIP_OUTER_STATE1_LOAD); } else if (ICP_QAT_FW_LA_PARTIAL_END == packetType) { ICP_QAT_FW_HASH_FLAG_SKIP_OUTER_STATE1_LOAD_SET( pAuthCdCtrlHdr->hash_flags, QAT_FW_LA_SKIP_OUTER_STATE1_LOAD); } } else { if ((ICP_QAT_FW_LA_PARTIAL_START == packetType) || (ICP_QAT_FW_LA_PARTIAL_NONE == packetType)) { ICP_QAT_FW_HASH_FLAG_SKIP_INNER_STATE1_LOAD_SET( pAuthCdCtrlHdr->hash_flags, QAT_FW_LA_SKIP_INNER_STATE1_LOAD); } } } /** @ingroup LacAlgChain */ CpaStatus LacAlgChain_Perform(const CpaInstanceHandle instanceHandle, lac_session_desc_t *pSessionDesc, void *pCallbackTag, const CpaCySymOpData *pOpData, const CpaBufferList *pSrcBuffer, CpaBufferList *pDstBuffer, CpaBoolean *pVerifyResult) { CpaStatus status = CPA_STATUS_SUCCESS; sal_crypto_service_t *pService = (sal_crypto_service_t *)instanceHandle; Cpa32U capabilitiesMask = pService->generic_service_info.capabilitiesMask; lac_sym_bulk_cookie_t *pCookie = NULL; lac_sym_cookie_t *pSymCookie = NULL; icp_qat_fw_la_bulk_req_t *pMsg = NULL; Cpa8U *pMsgDummy = NULL; Cpa8U *pCacheDummyHdr = NULL; Cpa8U *pCacheDummyFtr = NULL; Cpa32U qatPacketType = 0; CpaBufferList *pBufferList = NULL; Cpa8U *pDigestResult = NULL; Cpa64U srcAddrPhys = 0; Cpa64U dstAddrPhys = 0; icp_qat_fw_la_cmd_id_t laCmdId; sal_qat_content_desc_info_t *pCdInfo = NULL; Cpa8U *pHwBlockBaseInDRAM = NULL; Cpa32U hwBlockOffsetInDRAM = 0; Cpa32U sizeInBytes = 0; icp_qat_fw_cipher_cd_ctrl_hdr_t *pSpcCdCtrlHdr = NULL; CpaCySymCipherAlgorithm cipher; CpaCySymHashAlgorithm hash; Cpa8U paddingLen = 0; Cpa8U blockLen = 0; CpaBoolean digestIsAppended = CPA_FALSE; Cpa32U aadLenInBytes = 0; Cpa64U srcPktSize = 0; Cpa64U dstPktSize = 0; /* Set the command id */ laCmdId = pSessionDesc->laCmdId; cipher = pSessionDesc->cipherAlgorithm; hash = pSessionDesc->hashAlgorithm; CpaBoolean isSpCcm = (LAC_CIPHER_IS_CCM(cipher) && LAC_CIPHER_AES_V2(capabilitiesMask)); if (CPA_CY_SYM_HASH_AES_GMAC == hash) { pSessionDesc->aadLenInBytes = pOpData->messageLenToHashInBytes; if (pOpData->messageLenToHashInBytes == 0 || pOpData->pAdditionalAuthData != NULL) { LAC_INVALID_PARAM_LOG( "For AES_GMAC, AAD Length " "(messageLenToHashInBytes) must " "be non zero and pAdditionalAuthData " "must be NULL"); return CPA_STATUS_INVALID_PARAM; } } aadLenInBytes = pSessionDesc->aadLenInBytes; /* Convert Alg Chain Request to Cipher Request for CCP and * AES_GCM single pass */ if ((NON_SPC != pSessionDesc->singlePassState) && (isSpCcm || (LAC_CIPHER_SPC_IV_SIZE == pOpData->ivLenInBytes))) { pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_CIPHER; laCmdId = pSessionDesc->laCmdId; pSessionDesc->symOperation = CPA_CY_SYM_OP_CIPHER; pSessionDesc->singlePassState = SPC; pSessionDesc->isCipher = CPA_TRUE; pSessionDesc->isAuthEncryptOp = CPA_FALSE; pSessionDesc->isAuth = CPA_FALSE; if (CPA_CY_SYM_HASH_AES_GMAC == hash) { if (ICP_QAT_FW_SPC_AAD_SZ_MAX < aadLenInBytes) { LAC_INVALID_PARAM_LOG( "aadLenInBytes for AES_GMAC"); return CPA_STATUS_INVALID_PARAM; } } /* New bit position (13) for SINGLE PASS. * The FW provides a specific macro to use to set the proto flag */ ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET( pSessionDesc->laCmdFlags, ICP_QAT_FW_LA_SINGLE_PASS_PROTO); if (isCyGen2x(pService)) { ICP_QAT_FW_LA_PROTO_SET(pSessionDesc->laCmdFlags, 0); } pCdInfo = &(pSessionDesc->contentDescInfo); pHwBlockBaseInDRAM = (Cpa8U *)pCdInfo->pData; if (CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT == pSessionDesc->cipherDirection) { if (LAC_CIPHER_IS_GCM(cipher)) hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_GCM_SPC_OFFSET_IN_DRAM); else if (LAC_CIPHER_IS_CHACHA(cipher)) hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_CHACHA_SPC_OFFSET_IN_DRAM); } else if (isSpCcm) { hwBlockOffsetInDRAM = LAC_QUADWORDS_TO_BYTES( LAC_SYM_QAT_CIPHER_CCM_SPC_OFFSET_IN_DRAM); } /* Update cipher slice type */ pSessionDesc->cipherSliceType = LacCipher_GetCipherSliceType(pService, pSessionDesc->cipherAlgorithm, pSessionDesc->hashAlgorithm); ICP_QAT_FW_LA_SLICE_TYPE_SET(pSessionDesc->laCmdFlags, pSessionDesc->cipherSliceType); /* construct cipherConfig in CD in DRAM */ LacSymQat_CipherHwBlockPopulateCfgData(pSessionDesc, pHwBlockBaseInDRAM + hwBlockOffsetInDRAM, &sizeInBytes); SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)&( pSessionDesc->reqSpcCacheHdr), ICP_QAT_FW_COMN_REQ_CPM_FW_LA, laCmdId, pSessionDesc->cmnRequestFlags, pSessionDesc->laCmdFlags); } else if ((SPC == pSessionDesc->singlePassState) && (LAC_CIPHER_SPC_IV_SIZE != pOpData->ivLenInBytes)) { pSessionDesc->symOperation = CPA_CY_SYM_OP_ALGORITHM_CHAINING; pSessionDesc->singlePassState = LIKELY_SPC; pSessionDesc->isCipher = CPA_TRUE; pSessionDesc->isAuthEncryptOp = CPA_TRUE; pSessionDesc->isAuth = CPA_TRUE; pCdInfo = &(pSessionDesc->contentDescInfo); pHwBlockBaseInDRAM = (Cpa8U *)pCdInfo->pData; if (CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT == pSessionDesc->cipherDirection) { pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_CIPHER_HASH; } else { pSessionDesc->laCmdId = ICP_QAT_FW_LA_CMD_HASH_CIPHER; } laCmdId = pSessionDesc->laCmdId; ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET( pSessionDesc->laCmdFlags, 0); ICP_QAT_FW_LA_PROTO_SET(pSessionDesc->laCmdFlags, ICP_QAT_FW_LA_GCM_PROTO); LacSymQat_CipherHwBlockPopulateCfgData(pSessionDesc, pHwBlockBaseInDRAM + hwBlockOffsetInDRAM, &sizeInBytes); SalQatMsg_CmnHdrWrite((icp_qat_fw_comn_req_t *)&( pSessionDesc->reqCacheHdr), ICP_QAT_FW_COMN_REQ_CPM_FW_LA, laCmdId, pSessionDesc->cmnRequestFlags, pSessionDesc->laCmdFlags); } else if (LAC_CIPHER_IS_CHACHA(cipher) && (LAC_CIPHER_SPC_IV_SIZE != pOpData->ivLenInBytes)) { LAC_INVALID_PARAM_LOG("IV for CHACHA"); return CPA_STATUS_INVALID_PARAM; } if ((CPA_TRUE == pSessionDesc->isAuthEncryptOp) || isSpCcm) { if (CPA_CY_SYM_HASH_AES_CCM == hash) { status = LacSymAlgChain_CheckCCMData( pOpData->pAdditionalAuthData, pOpData->pIv, pOpData->messageLenToCipherInBytes, pOpData->ivLenInBytes); if (CPA_STATUS_SUCCESS == status) { LacSymAlgChain_PrepareCCMData( pSessionDesc, pOpData->pAdditionalAuthData, pOpData->pIv, pOpData->messageLenToCipherInBytes, pOpData->ivLenInBytes); } } else if (CPA_CY_SYM_HASH_AES_GCM == hash) { if (aadLenInBytes != 0 && pOpData->pAdditionalAuthData == NULL) { LAC_INVALID_PARAM_LOG("pAdditionalAuthData"); status = CPA_STATUS_INVALID_PARAM; } if (CPA_STATUS_SUCCESS == status) { LacSymAlgChain_PrepareGCMData( pSessionDesc, pOpData->pAdditionalAuthData); } } } /* allocate cookie (used by callback function) */ if (CPA_STATUS_SUCCESS == status) { pSymCookie = (lac_sym_cookie_t *)Lac_MemPoolEntryAlloc( pService->lac_sym_cookie_pool); if (pSymCookie == NULL) { LAC_LOG_ERROR("Cannot allocate cookie - NULL"); status = CPA_STATUS_RESOURCE; } else if ((void *)CPA_STATUS_RETRY == pSymCookie) { pSymCookie = NULL; status = CPA_STATUS_RETRY; } else { pCookie = &(pSymCookie->u.bulkCookie); } } if (CPA_STATUS_SUCCESS == status) { /* write the buffer descriptors */ if (IS_ZERO_LENGTH_BUFFER_SUPPORTED(cipher, hash)) { status = LacBuffDesc_BufferListDescWriteAndAllowZeroBuffer( (CpaBufferList *)pSrcBuffer, &srcAddrPhys, CPA_FALSE, &(pService->generic_service_info)); if (CPA_STATUS_SUCCESS != status) { LAC_LOG_ERROR( "Unable to write src buffer descriptors"); } /* For out of place operations */ if ((pSrcBuffer != pDstBuffer) && (CPA_STATUS_SUCCESS == status)) { status = LacBuffDesc_BufferListDescWriteAndAllowZeroBuffer( pDstBuffer, &dstAddrPhys, CPA_FALSE, &(pService->generic_service_info)); if (CPA_STATUS_SUCCESS != status) { LAC_LOG_ERROR( "Unable to write dest buffer descriptors"); } } } else { status = LacBuffDesc_BufferListDescWrite( (CpaBufferList *)pSrcBuffer, &srcAddrPhys, CPA_FALSE, &(pService->generic_service_info)); if (CPA_STATUS_SUCCESS != status) { LAC_LOG_ERROR( "Unable to write src buffer descriptors in " "LacBuffDesc_BufferListDescWrite"); } /* For out of place operations */ if ((pSrcBuffer != pDstBuffer) && (CPA_STATUS_SUCCESS == status)) { status = LacBuffDesc_BufferListDescWrite( pDstBuffer, &dstAddrPhys, CPA_FALSE, &(pService->generic_service_info)); if (CPA_STATUS_SUCCESS != status) { LAC_LOG_ERROR( "Unable to write dest buffer descriptors in " "LacBuffDesc_BufferListDescWrite"); } } } } if (CPA_STATUS_SUCCESS == status) { /* populate the cookie */ pCookie->pCallbackTag = pCallbackTag; pCookie->sessionCtx = pOpData->sessionCtx; pCookie->pOpData = (const CpaCySymOpData *)pOpData; pCookie->pDstBuffer = pDstBuffer; pCookie->updateSessionIvOnSend = CPA_FALSE; pCookie->updateUserIvOnRecieve = CPA_FALSE; pCookie->updateKeySizeOnRecieve = CPA_FALSE; pCookie->pNext = NULL; pCookie->instanceHandle = pService; /* get the qat packet type for LAC packet type */ LacSymQat_packetTypeGet(pOpData->packetType, pSessionDesc->partialState, &qatPacketType); /* * For XTS mode, the key size must be updated after * the first partial has been sent. Set a flag here so the * response knows to do this. */ if (LAC_CIPHER_IS_XTS_MODE(cipher) && (laCmdId != ICP_QAT_FW_LA_CMD_AUTH) && (CPA_CY_SYM_PACKET_TYPE_PARTIAL == pOpData->packetType) && (qatPacketType == ICP_QAT_FW_LA_PARTIAL_START)) { pCookie->updateKeySizeOnRecieve = CPA_TRUE; } /* * Now create the Request. * Start by populating it from the cache in the session * descriptor. */ pMsg = &(pCookie->qatMsg); pMsgDummy = (Cpa8U *)pMsg; if (SPC == pSessionDesc->singlePassState) { pCacheDummyHdr = (Cpa8U *)&(pSessionDesc->reqSpcCacheHdr); pCacheDummyFtr = (Cpa8U *)&(pSessionDesc->reqSpcCacheFtr); } else { /* Normally, we want to use the SHRAM Constants Table if * possible for best performance (less DRAM accesses * incurred by CPM). But we can't use it for * partial-packet hash operations. This is why we build * 2 versions of the message template at sessionInit, * one for SHRAM Constants Table usage and the other * (default) for Content Descriptor h/w setup data in * DRAM. And we chose between them here on a * per-request basis, when we know the packetType */ if ((!pSessionDesc->useSymConstantsTable) || (pSessionDesc->isAuth && (CPA_CY_SYM_PACKET_TYPE_FULL != pOpData->packetType))) { pCacheDummyHdr = (Cpa8U *)&(pSessionDesc->reqCacheHdr); pCacheDummyFtr = (Cpa8U *)&(pSessionDesc->reqCacheFtr); } else { pCacheDummyHdr = (Cpa8U *)&(pSessionDesc->shramReqCacheHdr); pCacheDummyFtr = (Cpa8U *)&(pSessionDesc->shramReqCacheFtr); } } memcpy(pMsgDummy, pCacheDummyHdr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)); memset((pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_HDR_IN_LW)), 0, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_TO_CLEAR_IN_LW)); memcpy(pMsgDummy + (LAC_LONG_WORD_IN_BYTES * LAC_START_OF_CACHE_FTR_IN_LW), pCacheDummyFtr, (LAC_LONG_WORD_IN_BYTES * LAC_SIZE_OF_CACHE_FTR_IN_LW)); /* * Populate the comn_mid section */ SalQatMsg_CmnMidWrite(pMsg, pCookie, LAC_SYM_DEFAULT_QAT_PTR_TYPE, srcAddrPhys, dstAddrPhys, 0, 0); /* * Populate the serv_specif_flags field of the Request header * Some of the flags are set up here. * Others are set up later when the RequestParams are set up. */ LacSymQat_LaPacketCommandFlagSet( qatPacketType, laCmdId, cipher, &pMsg->comn_hdr.serv_specif_flags, pOpData->ivLenInBytes); if (SPC == pSessionDesc->singlePassState) { ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET( pMsg->comn_hdr.serv_specif_flags, ICP_QAT_FW_LA_GCM_IV_LEN_NOT_12_OCTETS); if (CPA_CY_SYM_PACKET_TYPE_PARTIAL == pOpData->packetType) { ICP_QAT_FW_LA_RET_AUTH_SET( pMsg->comn_hdr.serv_specif_flags, ICP_QAT_FW_LA_NO_RET_AUTH_RES); ICP_QAT_FW_LA_CMP_AUTH_SET( pMsg->comn_hdr.serv_specif_flags, ICP_QAT_FW_LA_NO_CMP_AUTH_RES); } } ICP_QAT_FW_LA_SLICE_TYPE_SET(pMsg->comn_hdr.serv_specif_flags, pSessionDesc->cipherSliceType); LacBuffDesc_BufferListTotalSizeGet(pSrcBuffer, &srcPktSize); LacBuffDesc_BufferListTotalSizeGet(pDstBuffer, &dstPktSize); /* * Populate the CipherRequestParams section of the Request */ if (laCmdId != ICP_QAT_FW_LA_CMD_AUTH) { Cpa8U *pIvBuffer = NULL; status = LacCipher_PerformParamCheck(cipher, pOpData, srcPktSize); if (CPA_STATUS_SUCCESS != status) { /* free the cookie */ Lac_MemPoolEntryFree(pCookie); return status; } if (CPA_STATUS_SUCCESS == status) { /* align cipher IV */ status = LacCipher_PerformIvCheck( &(pService->generic_service_info), pCookie, qatPacketType, &pIvBuffer); } if ((SPC == pSessionDesc->singlePassState) && ((ICP_QAT_FW_LA_PARTIAL_MID == qatPacketType) || (ICP_QAT_FW_LA_PARTIAL_END == qatPacketType))) { /* For SPC stateful cipher state size for mid * and end partial packet is 48 bytes */ pSpcCdCtrlHdr = (icp_qat_fw_cipher_cd_ctrl_hdr_t *)&( pMsg->cd_ctrl); pSpcCdCtrlHdr->cipher_state_sz = LAC_BYTES_TO_QUADWORDS( LAC_SYM_QAT_CIPHER_SPC_STATE_SIZE); } /*populate the cipher request parameters */ if (CPA_STATUS_SUCCESS == status) { Cpa64U ivBufferPhysAddr = 0; if (pIvBuffer != NULL) { /* User OpData memory being used for IV * buffer */ /* get the physical address */ ivBufferPhysAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, pIvBuffer); if (0 == ivBufferPhysAddr) { LAC_LOG_ERROR( "Unable to get the physical address " "of the IV\n"); status = CPA_STATUS_FAIL; } } if (status == CPA_STATUS_SUCCESS) { status = LacSymQat_CipherRequestParamsPopulate( pSessionDesc, pMsg, pOpData ->cryptoStartSrcOffsetInBytes, pOpData ->messageLenToCipherInBytes, ivBufferPhysAddr, pIvBuffer); } } if ((SPC == pSessionDesc->singlePassState) && CPA_STATUS_SUCCESS == status) { Cpa64U aadBufferPhysAddr = 0; /* For CHACHA and AES-GCM there is an AAD buffer * if aadLenInBytes is nonzero In case of * AES-GMAC, AAD buffer passed in the src * buffer. */ if ((0 != aadLenInBytes && CPA_CY_SYM_HASH_AES_GMAC != hash) || isSpCcm) { LAC_CHECK_NULL_PARAM( pOpData->pAdditionalAuthData); Cpa32U aadDataLen = pSessionDesc->aadLenInBytes; /* In case of AES_CCM, B0 block size and * 2 bytes of AAD len encoding need to * be added to total AAD data len */ if (isSpCcm) aadDataLen += LAC_CIPHER_CCM_AAD_OFFSET; blockLen = LacSymQat_CipherBlockSizeBytesGet( cipher); if ((aadDataLen % blockLen) != 0) { paddingLen = blockLen - (aadDataLen % blockLen); memset( &pOpData ->pAdditionalAuthData [aadDataLen], 0, paddingLen); } /* User OpData memory being used for AAD * buffer */ /* get the physical address */ aadBufferPhysAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, pOpData->pAdditionalAuthData); if (0 == aadBufferPhysAddr) { LAC_LOG_ERROR( "Unable to get the physical address " "of the aad\n"); status = CPA_STATUS_FAIL; } } if (CPA_STATUS_SUCCESS == status) { icp_qat_fw_la_cipher_req_params_t *pCipherReqParams = (icp_qat_fw_la_cipher_req_params_t *)((Cpa8U *)&( pMsg->serv_specif_rqpars) + ICP_QAT_FW_CIPHER_REQUEST_PARAMETERS_OFFSET); icp_qat_fw_la_cipher_20_req_params_t *pCipher20ReqParams = (void *)((Cpa8U *)&( pMsg->serv_specif_rqpars) + ICP_QAT_FW_CIPHER_REQUEST_PARAMETERS_OFFSET); if (isCyGen4x(pService)) { pCipher20ReqParams ->spc_aad_addr = aadBufferPhysAddr; pCipher20ReqParams->spc_aad_sz = pSessionDesc->aadLenInBytes; pCipher20ReqParams ->spc_aad_offset = 0; if (isSpCcm) pCipher20ReqParams ->spc_aad_sz += LAC_CIPHER_CCM_AAD_OFFSET; } else { pCipherReqParams->spc_aad_addr = aadBufferPhysAddr; pCipherReqParams->spc_aad_sz = (Cpa16U)pSessionDesc ->aadLenInBytes; } if (CPA_TRUE != pSessionDesc->digestIsAppended) { Cpa64U digestBufferPhysAddr = 0; /* User OpData memory being used * for digest buffer */ /* get the physical address */ digestBufferPhysAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService ->generic_service_info, pOpData->pDigestResult); if (0 != digestBufferPhysAddr) { if (isCyGen4x( pService)) { pCipher20ReqParams ->spc_auth_res_addr = digestBufferPhysAddr; pCipher20ReqParams ->spc_auth_res_sz = (Cpa8U)pSessionDesc ->hashResultSize; } else { pCipherReqParams ->spc_auth_res_addr = digestBufferPhysAddr; pCipherReqParams ->spc_auth_res_sz = (Cpa8U)pSessionDesc ->hashResultSize; } } else { LAC_LOG_ERROR( "Unable to get the physical address " "of the digest\n"); status = CPA_STATUS_FAIL; } } else { /* Check if the dest buffer can * handle the digest, only for * last packet */ if (((ICP_QAT_FW_LA_PARTIAL_NONE == qatPacketType) || (ICP_QAT_FW_LA_PARTIAL_END == qatPacketType))) { if (dstPktSize < (pOpData ->cryptoStartSrcOffsetInBytes + pOpData ->messageLenToCipherInBytes + pSessionDesc ->hashResultSize)) status = CPA_STATUS_INVALID_PARAM; } if (isCyGen4x(pService)) { pCipher20ReqParams ->spc_auth_res_sz = (Cpa8U)pSessionDesc ->hashResultSize; } else { pCipherReqParams ->spc_auth_res_sz = (Cpa8U)pSessionDesc ->hashResultSize; } } } } } /* * Set up HashRequestParams part of Request */ if ((status == CPA_STATUS_SUCCESS) && (laCmdId != ICP_QAT_FW_LA_CMD_CIPHER)) { Cpa32U authOffsetInBytes = pOpData->hashStartSrcOffsetInBytes; Cpa32U authLenInBytes = pOpData->messageLenToHashInBytes; status = LacHash_PerformParamCheck(instanceHandle, pSessionDesc, pOpData, srcPktSize, pVerifyResult); if (CPA_STATUS_SUCCESS != status) { /* free the cookie */ Lac_MemPoolEntryFree(pCookie); return status; } if (CPA_STATUS_SUCCESS == status) { /* Info structure for CCM/GCM */ lac_sym_qat_hash_state_buffer_info_t hashStateBufferInfo = { 0 }; lac_sym_qat_hash_state_buffer_info_t *pHashStateBufferInfo = &(pSessionDesc->hashStateBufferInfo); if (CPA_TRUE == pSessionDesc->isAuthEncryptOp) { icp_qat_fw_la_auth_req_params_t *pHashReqParams = (icp_qat_fw_la_auth_req_params_t *)((Cpa8U *)&( pMsg->serv_specif_rqpars) + ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET); hashStateBufferInfo.pData = pOpData->pAdditionalAuthData; if (pOpData->pAdditionalAuthData == NULL) { hashStateBufferInfo.pDataPhys = 0; } else { hashStateBufferInfo .pDataPhys = LAC_MEM_CAST_PTR_TO_UINT64( LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService ->generic_service_info, pOpData ->pAdditionalAuthData)); } hashStateBufferInfo .stateStorageSzQuadWords = 0; hashStateBufferInfo .prefixAadSzQuadWords = LAC_BYTES_TO_QUADWORDS( pHashReqParams->u2.aad_sz); /* Overwrite hash state buffer info * structure pointer with the one * created for CCM/GCM */ pHashStateBufferInfo = &hashStateBufferInfo; /* Aad buffer could be null in the GCM * case */ if (0 == hashStateBufferInfo.pDataPhys && CPA_CY_SYM_HASH_AES_GCM != hash && CPA_CY_SYM_HASH_AES_GMAC != hash) { LAC_LOG_ERROR( "Unable to get the physical address" "of the AAD\n"); status = CPA_STATUS_FAIL; } /* for CCM/GCM the hash and cipher data * regions are equal */ authOffsetInBytes = pOpData ->cryptoStartSrcOffsetInBytes; /* For authenticated encryption, * authentication length is determined * by messageLenToCipherInBytes for * AES-GCM and AES-CCM, and by * messageLenToHashInBytes for AES-GMAC. * You don't see the latter here, as * that is the initial value of * authLenInBytes. */ if (hash != CPA_CY_SYM_HASH_AES_GMAC) authLenInBytes = pOpData ->messageLenToCipherInBytes; } else if (CPA_CY_SYM_HASH_SNOW3G_UIA2 == hash || CPA_CY_SYM_HASH_ZUC_EIA3 == hash) { hashStateBufferInfo.pData = pOpData->pAdditionalAuthData; hashStateBufferInfo.pDataPhys = LAC_OS_VIRT_TO_PHYS_EXTERNAL( pService->generic_service_info, hashStateBufferInfo.pData); hashStateBufferInfo .stateStorageSzQuadWords = 0; hashStateBufferInfo .prefixAadSzQuadWords = LAC_BYTES_TO_QUADWORDS( aadLenInBytes); pHashStateBufferInfo = &hashStateBufferInfo; if (0 == hashStateBufferInfo.pDataPhys) { LAC_LOG_ERROR( "Unable to get the physical address" "of the AAD\n"); status = CPA_STATUS_FAIL; } } if (CPA_CY_SYM_HASH_AES_CCM == hash) { if (CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT == pSessionDesc->cipherDirection) { /* On a decrypt path pSrcBuffer * is used as this is where * encrypted digest is located. * Firmware uses encrypted * digest for * compare/verification*/ pBufferList = (CpaBufferList *)pSrcBuffer; } else { /* On an encrypt path pDstBuffer * is used as this is where * encrypted digest will be * written */ pBufferList = (CpaBufferList *)pDstBuffer; } status = LacSymAlgChain_PtrFromOffsetGet( pBufferList, pOpData->cryptoStartSrcOffsetInBytes + pOpData ->messageLenToCipherInBytes, &pDigestResult); if (CPA_STATUS_SUCCESS != status) { LAC_LOG_ERROR( "Cannot set digest pointer within the" " buffer list - offset out of bounds"); } } else { pDigestResult = pOpData->pDigestResult; } if (CPA_TRUE == pSessionDesc->useStatefulSha3ContentDesc) { LacAlgChain_StatefulSha3_SkipStateLoadFlags( pMsg, qatPacketType, pSessionDesc->qatHashMode); } if (CPA_CY_SYM_OP_ALGORITHM_CHAINING == pSessionDesc->symOperation) { /* In alg chaining mode, packets are not * seen as partials for hash operations. * Override to NONE. */ qatPacketType = ICP_QAT_FW_LA_PARTIAL_NONE; } digestIsAppended = pSessionDesc->digestIsAppended; if (CPA_TRUE == digestIsAppended) { /*Check if the destination buffer can * handle the digest if digestIsAppend * is true*/ if (srcPktSize < (authOffsetInBytes + authLenInBytes + pSessionDesc->hashResultSize)) { status = CPA_STATUS_INVALID_PARAM; } } if (CPA_STATUS_SUCCESS == status) { /* populate the hash request parameters */ status = LacSymQat_HashRequestParamsPopulate( pMsg, authOffsetInBytes, authLenInBytes, &(pService ->generic_service_info), pHashStateBufferInfo, qatPacketType, pSessionDesc->hashResultSize, pSessionDesc->digestVerify, digestIsAppended ? NULL : pDigestResult, hash, NULL); } } } } /* * send the message to the QAT */ if (CPA_STATUS_SUCCESS == status) { qatUtilsAtomicInc(&(pSessionDesc->u.pendingCbCount)); status = LacSymQueue_RequestSend(instanceHandle, pCookie, pSessionDesc); if (CPA_STATUS_SUCCESS != status) { /* Decrease pending callback counter on send fail. */ qatUtilsAtomicDec(&(pSessionDesc->u.pendingCbCount)); } } /* Case that will catch all error status's for this function */ if (CPA_STATUS_SUCCESS != status) { /* free the cookie */ if (NULL != pSymCookie) { Lac_MemPoolEntryFree(pSymCookie); } } return status; } diff --git a/sys/dev/qat/qat_api/common/ctrl/sal_compression.c b/sys/dev/qat/qat_api/common/ctrl/sal_compression.c index 9827015767bf..1a59d81da53b 100644 --- a/sys/dev/qat/qat_api/common/ctrl/sal_compression.c +++ b/sys/dev/qat/qat_api/common/ctrl/sal_compression.c @@ -1,1621 +1,1676 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file sal_compression.c * * @ingroup SalCtrl * * @description * This file contains the sal implementation for compression. * *****************************************************************************/ /* QAT-API includes */ #include "cpa.h" #include "cpa_dc.h" /* QAT utils includes */ #include "qat_utils.h" /* ADF includes */ #include "icp_adf_init.h" #include "icp_adf_transport.h" #include "icp_accel_devices.h" #include "icp_adf_cfg.h" #include "icp_adf_accel_mgr.h" #include "icp_adf_poll.h" #include "icp_adf_debug.h" #include "icp_adf_esram.h" #include "icp_qat_hw.h" /* SAL includes */ #include "lac_mem.h" #include "lac_common.h" #include "lac_mem_pools.h" #include "sal_statistics.h" #include "lac_list.h" #include "icp_sal_poll.h" #include "sal_types_compression.h" #include "dc_session.h" #include "dc_datapath.h" #include "dc_stats.h" #include "lac_sal.h" #include "lac_sal_ctrl.h" #include "sal_string_parse.h" #include "sal_service_state.h" #include "lac_buffer_desc.h" #include "icp_qat_fw_comp.h" #include "icp_qat_hw_20_comp_defs.h" #include "icp_sal_versions.h" /* C string null terminator size */ #define SAL_NULL_TERM_SIZE 1 /* Type to access extended features bit fields */ typedef struct dc_extended_features_s { unsigned is_cnv : 1; /* Bit<0> */ unsigned padding : 7; unsigned is_cnvnr : 1; /* Bit<8> */ unsigned not_used : 23; } dc_extd_ftrs_t; /* * Prints statistics for a compression instance */ static int SalCtrl_CompresionDebug(void *private_data, char *data, int size, int offset) { sal_compression_service_t *pCompressionService = (sal_compression_service_t *)private_data; CpaStatus status = CPA_STATUS_SUCCESS; CpaDcStats dcStats = { 0 }; Cpa32S len = 0; status = cpaDcGetStats(pCompressionService, &dcStats); if (status != CPA_STATUS_SUCCESS) { QAT_UTILS_LOG("cpaDcGetStats returned error.\n"); return (-1); } /* Engine Info */ if (NULL != pCompressionService->debug_file) { len += snprintf(data + len, size - len, SEPARATOR BORDER " Statistics for Instance %24s | \n" SEPARATOR, pCompressionService->debug_file->name); } /* Perform Info */ len += snprintf(data + len, size - len, BORDER " DC comp Requests: %16llu " BORDER "\n" BORDER " DC comp Request Errors: %16llu " BORDER "\n" BORDER " DC comp Completed: %16llu " BORDER "\n" BORDER " DC comp Completed Errors: %16llu " BORDER "\n" SEPARATOR, (long long unsigned int)dcStats.numCompRequests, (long long unsigned int)dcStats.numCompRequestsErrors, (long long unsigned int)dcStats.numCompCompleted, (long long unsigned int)dcStats.numCompCompletedErrors); /* Perform Info */ len += snprintf( data + len, size - len, BORDER " DC decomp Requests: %16llu " BORDER "\n" BORDER " DC decomp Request Errors: %16llu " BORDER "\n" BORDER " DC decomp Completed: %16llu " BORDER "\n" BORDER " DC decomp Completed Errors: %16llu " BORDER "\n" SEPARATOR, (long long unsigned int)dcStats.numDecompRequests, (long long unsigned int)dcStats.numDecompRequestsErrors, (long long unsigned int)dcStats.numDecompCompleted, (long long unsigned int)dcStats.numDecompCompletedErrors); return 0; } /* Initialise device specific information needed by compression service */ static CpaStatus SalCtrl_CompressionInit_CompData(icp_accel_dev_t *device, sal_compression_service_t *pCompService) { int level = 0; - + pCompService->comp_device_data.asbEnableSupport = CPA_FALSE; pCompService->comp_device_data.uniqueCompressionLevels[0] = CPA_FALSE; switch (device->deviceType) { case DEVICE_DH895XCC: case DEVICE_DH895XCCVF: pCompService->generic_service_info.integrityCrcCheck = CPA_FALSE; pCompService->numInterBuffs = DC_QAT_MAX_NUM_INTER_BUFFERS_6COMP_SLICES; pCompService->comp_device_data.minOutputBuffSize = DC_DEST_BUFFER_STA_MIN_SIZE; pCompService->comp_device_data.oddByteDecompNobFinal = CPA_TRUE; pCompService->comp_device_data.oddByteDecompInterim = CPA_FALSE; pCompService->comp_device_data.translatorOverflow = CPA_FALSE; pCompService->comp_device_data.useDevRam = ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF; pCompService->comp_device_data.enableDmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED; pCompService->comp_device_data.inflateContextSize = DC_INFLATE_CONTEXT_SIZE; pCompService->comp_device_data.highestHwCompressionDepth = ICP_QAT_HW_COMPRESSION_DEPTH_16; pCompService->comp_device_data.windowSizeMask = (1 << DC_8K_WINDOW_SIZE | 1 << DC_32K_WINDOW_SIZE); pCompService->comp_device_data.cnvnrSupported = CPA_FALSE; + for (level = CPA_DC_L1; level <= CPA_DC_L12; level++) { + switch (level) { + case CPA_DC_L1: + case CPA_DC_L2: + case CPA_DC_L3: + case CPA_DC_L4: + pCompService->comp_device_data + .uniqueCompressionLevels[level] = CPA_TRUE; + break; + default: + pCompService->comp_device_data + .uniqueCompressionLevels[level] = CPA_FALSE; + break; + } + } + pCompService->comp_device_data.numCompressionLevels = + DC_NUM_COMPRESSION_LEVELS; break; case DEVICE_C3XXX: case DEVICE_C3XXXVF: case DEVICE_200XX: case DEVICE_200XXVF: pCompService->generic_service_info.integrityCrcCheck = CPA_FALSE; pCompService->numInterBuffs = DC_QAT_MAX_NUM_INTER_BUFFERS_6COMP_SLICES; pCompService->comp_device_data.oddByteDecompNobFinal = CPA_FALSE; pCompService->comp_device_data.oddByteDecompInterim = CPA_TRUE; pCompService->comp_device_data.translatorOverflow = CPA_FALSE; pCompService->comp_device_data.useDevRam = ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_USED_AS_INTMD_BUF; pCompService->comp_device_data.inflateContextSize = DC_INFLATE_EH_CONTEXT_SIZE; pCompService->comp_device_data.highestHwCompressionDepth = ICP_QAT_HW_COMPRESSION_DEPTH_16; pCompService->comp_device_data.windowSizeMask = (1 << DC_16K_WINDOW_SIZE | 1 << DC_32K_WINDOW_SIZE); pCompService->comp_device_data.minOutputBuffSize = DC_DEST_BUFFER_STA_MIN_SIZE; pCompService->comp_device_data.enableDmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_ENABLED; pCompService->comp_device_data.cnvnrSupported = CPA_TRUE; + + for (level = CPA_DC_L1; level <= CPA_DC_L12; level++) { + switch (level) { + case CPA_DC_L1: + case CPA_DC_L2: + case CPA_DC_L3: + case CPA_DC_L4: + pCompService->comp_device_data + .uniqueCompressionLevels[level] = CPA_TRUE; + break; + default: + pCompService->comp_device_data + .uniqueCompressionLevels[level] = CPA_FALSE; + break; + } + } + pCompService->comp_device_data.numCompressionLevels = + DC_NUM_COMPRESSION_LEVELS; break; case DEVICE_C62X: case DEVICE_C62XVF: pCompService->generic_service_info.integrityCrcCheck = CPA_FALSE; pCompService->numInterBuffs = DC_QAT_MAX_NUM_INTER_BUFFERS_10COMP_SLICES; pCompService->comp_device_data.oddByteDecompNobFinal = CPA_FALSE; pCompService->comp_device_data.oddByteDecompInterim = CPA_TRUE; pCompService->comp_device_data.translatorOverflow = CPA_FALSE; pCompService->comp_device_data.useDevRam = ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF; pCompService->comp_device_data.inflateContextSize = DC_INFLATE_EH_CONTEXT_SIZE; pCompService->comp_device_data.highestHwCompressionDepth = ICP_QAT_HW_COMPRESSION_DEPTH_16; pCompService->comp_device_data.windowSizeMask = (1 << DC_4K_WINDOW_SIZE | 1 << DC_8K_WINDOW_SIZE | 1 << DC_16K_WINDOW_SIZE | 1 << DC_32K_WINDOW_SIZE); pCompService->comp_device_data.minOutputBuffSize = DC_DEST_BUFFER_STA_MIN_SIZE; pCompService->comp_device_data.minOutputBuffSizeDynamic = pCompService->comp_device_data.minOutputBuffSize; pCompService->comp_device_data.enableDmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_ENABLED; pCompService->comp_device_data.cnvnrSupported = CPA_TRUE; - for (level = CPA_DC_L1; level <= CPA_DC_L9; level++) { + for (level = CPA_DC_L1; level <= CPA_DC_L12; level++) { switch (level) { case CPA_DC_L1: case CPA_DC_L2: case CPA_DC_L3: case CPA_DC_L4: pCompService->comp_device_data .uniqueCompressionLevels[level] = CPA_TRUE; break; default: pCompService->comp_device_data .uniqueCompressionLevels[level] = CPA_FALSE; break; } } pCompService->comp_device_data.numCompressionLevels = DC_NUM_COMPRESSION_LEVELS; break; case DEVICE_C4XXX: case DEVICE_C4XXXVF: pCompService->generic_service_info.integrityCrcCheck = CPA_TRUE; pCompService->numInterBuffs = DC_QAT_MAX_NUM_INTER_BUFFERS_24COMP_SLICES; pCompService->comp_device_data.minOutputBuffSize = DC_DEST_BUFFER_MIN_SIZE; pCompService->comp_device_data.oddByteDecompNobFinal = CPA_TRUE; pCompService->comp_device_data.oddByteDecompInterim = CPA_TRUE; pCompService->comp_device_data.translatorOverflow = CPA_TRUE; if (pCompService->generic_service_info.capabilitiesMask & ICP_ACCEL_CAPABILITIES_INLINE) { pCompService->comp_device_data.useDevRam = ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_USED_AS_INTMD_BUF; } else { pCompService->comp_device_data.useDevRam = ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF; } pCompService->comp_device_data.enableDmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_ENABLED; pCompService->comp_device_data.inflateContextSize = DC_INFLATE_EH_CONTEXT_SIZE; pCompService->comp_device_data.highestHwCompressionDepth = ICP_QAT_HW_COMPRESSION_DEPTH_128; pCompService->comp_device_data.windowSizeMask = (1 << DC_16K_WINDOW_SIZE | 1 << DC_32K_WINDOW_SIZE); pCompService->comp_device_data.cnvnrSupported = CPA_TRUE; + + for (level = CPA_DC_L1; level <= CPA_DC_L12; level++) { + switch (level) { + case CPA_DC_L1: + case CPA_DC_L2: + case CPA_DC_L3: + case CPA_DC_L4: + case CPA_DC_L5: + pCompService->comp_device_data + .uniqueCompressionLevels[level] = CPA_TRUE; + break; + default: + pCompService->comp_device_data + .uniqueCompressionLevels[level] = CPA_FALSE; + break; + } + } + pCompService->comp_device_data.numCompressionLevels = + DC_NUM_COMPRESSION_LEVELS; break; - case DEVICE_GEN4: + case DEVICE_4XXX: + case DEVICE_4XXXVF: pCompService->generic_service_info.integrityCrcCheck = CPA_TRUE; pCompService->numInterBuffs = 0; pCompService->comp_device_data.minOutputBuffSize = DC_DEST_BUFFER_STA_MIN_SIZE_GEN4; pCompService->comp_device_data.minOutputBuffSizeDynamic = DC_DEST_BUFFER_DYN_MIN_SIZE_GEN4; pCompService->comp_device_data.oddByteDecompNobFinal = CPA_TRUE; pCompService->comp_device_data.oddByteDecompInterim = CPA_FALSE; pCompService->comp_device_data.translatorOverflow = CPA_TRUE; pCompService->comp_device_data.useDevRam = ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF; pCompService->comp_device_data.enableDmm = ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_ENABLED; pCompService->comp_device_data.inflateContextSize = DC_INFLATE_CONTEXT_SIZE; pCompService->comp_device_data.highestHwCompressionDepth = ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_9; pCompService->comp_device_data.windowSizeMask = (1 << DC_4K_WINDOW_SIZE | 1 << DC_8K_WINDOW_SIZE | 1 << DC_16K_WINDOW_SIZE | 1 << DC_32K_WINDOW_SIZE); - for (level = CPA_DC_L1; level <= CPA_DC_L9; level++) { + for (level = CPA_DC_L1; level <= CPA_DC_L12; level++) { switch (level) { case CPA_DC_L1: case CPA_DC_L6: case CPA_DC_L9: pCompService->comp_device_data .uniqueCompressionLevels[level] = CPA_TRUE; break; default: pCompService->comp_device_data .uniqueCompressionLevels[level] = CPA_FALSE; break; } } pCompService->comp_device_data.numCompressionLevels = DC_NUM_COMPRESSION_LEVELS; break; default: QAT_UTILS_LOG("Unknown device type! - %d.\n", device->deviceType); return CPA_STATUS_FAIL; } return CPA_STATUS_SUCCESS; } CpaStatus SalCtrl_CompressionInit(icp_accel_dev_t *device, sal_service_t *service) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa32U numCompConcurrentReq = 0; Cpa32U request_ring_id = 0; Cpa32U response_ring_id = 0; char adfGetParam[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; char compMemPool[SAL_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; char temp_string[SAL_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; char temp_string2[SAL_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; char *instance_name = NULL; sal_statistics_collection_t *pStatsCollection = (sal_statistics_collection_t *)device->pQatStats; icp_resp_deliv_method rx_resp_type = ICP_RESP_TYPE_IRQ; sal_compression_service_t *pCompressionService = (sal_compression_service_t *)service; Cpa32U msgSize = 0; char *section = DYN_SEC; SAL_SERVICE_GOOD_FOR_INIT(pCompressionService); pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_INITIALIZING; if (CPA_FALSE == pCompressionService->generic_service_info.is_dyn) { section = icpGetProcessName(); } if (pStatsCollection == NULL) { return CPA_STATUS_FAIL; } /* Get Config Info: Accel Num, bank Num, packageID, coreAffinity, nodeAffinity and response mode */ pCompressionService->acceleratorNum = 0; /* Initialise device specific compression data */ SalCtrl_CompressionInit_CompData(device, pCompressionService); status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "BankNumber", temp_string); LAC_CHECK_STATUS(status); status = icp_adf_cfgGetParamValue(device, section, temp_string, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", temp_string); return status; } pCompressionService->bankNum = Sal_Strtoul(adfGetParam, NULL, SAL_CFG_BASE_DEC); status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "IsPolled", temp_string); LAC_CHECK_STATUS(status); status = icp_adf_cfgGetParamValue(device, section, temp_string, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", temp_string); return status; } pCompressionService->isPolled = (Cpa8U)Sal_Strtoul(adfGetParam, NULL, SAL_CFG_BASE_DEC); /* User instances only support poll and epoll mode */ if (SAL_RESP_POLL_CFG_FILE != pCompressionService->isPolled) { QAT_UTILS_LOG( "IsPolled %u is not supported for user instance %s.\n", pCompressionService->isPolled, temp_string); return CPA_STATUS_FAIL; } if (SAL_RESP_POLL_CFG_FILE == pCompressionService->isPolled) { rx_resp_type = ICP_RESP_TYPE_POLL; } status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, ADF_DEV_PKG_ID, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", ADF_DEV_PKG_ID); return status; } pCompressionService->pkgID = (Cpa16U)Sal_Strtoul(adfGetParam, NULL, SAL_CFG_BASE_DEC); status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, ADF_DEV_NODE_ID, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", ADF_DEV_NODE_ID); return status; } pCompressionService->nodeAffinity = (Cpa32U)Sal_Strtoul(adfGetParam, NULL, SAL_CFG_BASE_DEC); /* In case of interrupt instance, use the bank affinity set by adf_ctl * Otherwise, use the instance affinity for backwards compatibility */ if (SAL_RESP_POLL_CFG_FILE != pCompressionService->isPolled) { /* Next need to read the [AcceleratorX] section of the config * file */ status = Sal_StringParsing("Accelerator", pCompressionService->acceleratorNum, "", temp_string2); LAC_CHECK_STATUS(status); status = Sal_StringParsing("Bank", pCompressionService->bankNum, "CoreAffinity", temp_string); LAC_CHECK_STATUS(status); } else { strncpy(temp_string2, section, sizeof(temp_string2) - SAL_NULL_TERM_SIZE); temp_string2[SAL_CFG_MAX_VAL_LEN_IN_BYTES - SAL_NULL_TERM_SIZE] = '\0'; status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "CoreAffinity", temp_string); LAC_CHECK_STATUS(status); } status = icp_adf_cfgGetParamValue(device, temp_string2, temp_string, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", temp_string); return status; } pCompressionService->coreAffinity = (Cpa32U)Sal_Strtoul(adfGetParam, NULL, SAL_CFG_BASE_DEC); status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "NumConcurrentRequests", temp_string); LAC_CHECK_STATUS(status); status = icp_adf_cfgGetParamValue(device, section, temp_string, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", temp_string); return status; } numCompConcurrentReq = (Cpa32U)Sal_Strtoul(adfGetParam, NULL, SAL_CFG_BASE_DEC); if (validateConcurrRequest(numCompConcurrentReq)) { QAT_UTILS_LOG( "Invalid NumConcurrentRequests, valid values are: {64, 128, 256, ... 32768, 65536}.\n"); return CPA_STATUS_FAIL; } /* ADF does not allow us to completely fill the ring for batch requests */ pCompressionService->maxNumCompConcurrentReq = (numCompConcurrentReq - SAL_BATCH_SUBMIT_FREE_SPACE); /* 1. Create transport handles */ status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "RingTx", temp_string); LAC_CHECK_STATUS(status); msgSize = LAC_QAT_DC_REQ_SZ_LW * LAC_LONG_WORD_IN_BYTES; status = icp_adf_transCreateHandle( device, ICP_TRANS_TYPE_ETR, section, pCompressionService->acceleratorNum, pCompressionService->bankNum, temp_string, lac_getRingType(SAL_RING_TYPE_DC), NULL, ICP_RESP_TYPE_NONE, numCompConcurrentReq, msgSize, (icp_comms_trans_handle *)&( pCompressionService->trans_handle_compression_tx)); LAC_CHECK_STATUS(status); if (icp_adf_transGetRingNum( pCompressionService->trans_handle_compression_tx, &request_ring_id) != CPA_STATUS_SUCCESS) { icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); QAT_UTILS_LOG("Failed to get DC TX ring number.\n"); return CPA_STATUS_FAIL; } status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "RingRx", temp_string); if (CPA_STATUS_SUCCESS != status) { icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); return status; } msgSize = LAC_QAT_DC_RESP_SZ_LW * LAC_LONG_WORD_IN_BYTES; status = icp_adf_transCreateHandle( device, ICP_TRANS_TYPE_ETR, section, pCompressionService->acceleratorNum, pCompressionService->bankNum, temp_string, lac_getRingType(SAL_RING_TYPE_NONE), (icp_trans_callback)dcCompression_ProcessCallback, rx_resp_type, numCompConcurrentReq, msgSize, (icp_comms_trans_handle *)&( pCompressionService->trans_handle_compression_rx)); if (CPA_STATUS_SUCCESS != status) { icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); return status; } if (icp_adf_transGetRingNum( pCompressionService->trans_handle_compression_rx, &response_ring_id) != CPA_STATUS_SUCCESS) { icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); QAT_UTILS_LOG("Failed to get DC RX ring number.\n"); return CPA_STATUS_FAIL; } /* 2. Allocates memory pools */ /* Valid initialisation value for a pool ID */ pCompressionService->compression_mem_pool = LAC_MEM_POOL_INIT_POOL_ID; status = Sal_StringParsing( "Comp", pCompressionService->generic_service_info.instance, "_MemPool", compMemPool); if (CPA_STATUS_SUCCESS != status) { icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); return status; } status = Lac_MemPoolCreate(&pCompressionService->compression_mem_pool, compMemPool, (numCompConcurrentReq + 1), sizeof(dc_compression_cookie_t), LAC_64BYTE_ALIGNMENT, CPA_FALSE, pCompressionService->nodeAffinity); if (CPA_STATUS_SUCCESS != status) { icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); return status; } /* Init compression statistics */ status = dcStatsInit(pCompressionService); if (CPA_STATUS_SUCCESS != status) { Lac_MemPoolDestroy(pCompressionService->compression_mem_pool); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); return status; } if (CPA_TRUE == pStatsCollection->bDcStatsEnabled) { /* Get instance name for stats */ instance_name = LAC_OS_MALLOC(ADF_CFG_MAX_VAL_LEN_IN_BYTES); if (NULL == instance_name) { Lac_MemPoolDestroy( pCompressionService->compression_mem_pool); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); return CPA_STATUS_RESOURCE; } status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "Name", temp_string); if (CPA_STATUS_SUCCESS != status) { Lac_MemPoolDestroy( pCompressionService->compression_mem_pool); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); LAC_OS_FREE(instance_name); return status; } status = icp_adf_cfgGetParamValue(device, section, temp_string, adfGetParam); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get %s from configuration.\n", temp_string); Lac_MemPoolDestroy( pCompressionService->compression_mem_pool); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); LAC_OS_FREE(instance_name); return status; } snprintf(instance_name, ADF_CFG_MAX_VAL_LEN_IN_BYTES, "%s", adfGetParam); pCompressionService->debug_file = LAC_OS_MALLOC(sizeof(debug_file_info_t)); if (NULL == pCompressionService->debug_file) { Lac_MemPoolDestroy( pCompressionService->compression_mem_pool); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); LAC_OS_FREE(instance_name); return CPA_STATUS_RESOURCE; } memset(pCompressionService->debug_file, 0, sizeof(debug_file_info_t)); pCompressionService->debug_file->name = instance_name; pCompressionService->debug_file->seq_read = SalCtrl_CompresionDebug; pCompressionService->debug_file->private_data = pCompressionService; pCompressionService->debug_file->parent = pCompressionService->generic_service_info.debug_parent_dir; status = icp_adf_debugAddFile(device, pCompressionService->debug_file); if (CPA_STATUS_SUCCESS != status) { Lac_MemPoolDestroy( pCompressionService->compression_mem_pool); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); LAC_OS_FREE(instance_name); LAC_OS_FREE(pCompressionService->debug_file); return status; } } pCompressionService->generic_service_info.stats = pStatsCollection; pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_INITIALIZED; return status; } CpaStatus SalCtrl_CompressionStart(icp_accel_dev_t *device, sal_service_t *service) { CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *pCompressionService = (sal_compression_service_t *)service; if (SAL_SERVICE_STATE_INITIALIZED != pCompressionService->generic_service_info.state) { QAT_UTILS_LOG("Not in the correct state to call start.\n"); return CPA_STATUS_FAIL; } /**************************************************************/ /* Obtain Extended Features. I.e. Compress And Verify */ /**************************************************************/ pCompressionService->generic_service_info.dcExtendedFeatures = device->dcExtendedFeatures; pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_RUNNING; return status; } CpaStatus SalCtrl_CompressionStop(icp_accel_dev_t *device, sal_service_t *service) { sal_compression_service_t *pCompressionService = (sal_compression_service_t *)service; if (SAL_SERVICE_STATE_RUNNING != pCompressionService->generic_service_info.state) { QAT_UTILS_LOG("Not in the correct state to call stop.\n"); return CPA_STATUS_FAIL; } if (icp_adf_is_dev_in_reset(device)) { pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_RESTARTING; return CPA_STATUS_SUCCESS; } pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_SHUTTING_DOWN; return CPA_STATUS_RETRY; } CpaStatus SalCtrl_CompressionShutdown(icp_accel_dev_t *device, sal_service_t *service) { CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *pCompressionService = (sal_compression_service_t *)service; sal_statistics_collection_t *pStatsCollection = (sal_statistics_collection_t *)device->pQatStats; if ((SAL_SERVICE_STATE_INITIALIZED != pCompressionService->generic_service_info.state) && (SAL_SERVICE_STATE_SHUTTING_DOWN != pCompressionService->generic_service_info.state) && (SAL_SERVICE_STATE_RESTARTING != pCompressionService->generic_service_info.state)) { QAT_UTILS_LOG("Not in the correct state to call shutdown.\n"); return CPA_STATUS_FAIL; } Lac_MemPoolDestroy(pCompressionService->compression_mem_pool); status = icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_tx); LAC_CHECK_STATUS(status); status = icp_adf_transReleaseHandle( pCompressionService->trans_handle_compression_rx); LAC_CHECK_STATUS(status); if (CPA_TRUE == pStatsCollection->bDcStatsEnabled) { /* Clean stats */ if (NULL != pCompressionService->debug_file) { icp_adf_debugRemoveFile( pCompressionService->debug_file); LAC_OS_FREE(pCompressionService->debug_file->name); LAC_OS_FREE(pCompressionService->debug_file); pCompressionService->debug_file = NULL; } } pCompressionService->generic_service_info.stats = NULL; dcStatsFree(pCompressionService); if (icp_adf_is_dev_in_reset(device)) { pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_RESTARTING; return CPA_STATUS_SUCCESS; } pCompressionService->generic_service_info.state = SAL_SERVICE_STATE_SHUTDOWN; return status; } CpaStatus cpaDcGetStatusText(const CpaInstanceHandle dcInstance, const CpaStatus errStatus, Cpa8S *pStatusText) { CpaStatus status = CPA_STATUS_SUCCESS; LAC_CHECK_NULL_PARAM(pStatusText); switch (errStatus) { case CPA_STATUS_SUCCESS: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_SUCCESS); break; case CPA_STATUS_FAIL: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_FAIL); break; case CPA_STATUS_RETRY: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_RETRY); break; case CPA_STATUS_RESOURCE: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_RESOURCE); break; case CPA_STATUS_INVALID_PARAM: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_INVALID_PARAM); break; case CPA_STATUS_FATAL: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_FATAL); break; case CPA_STATUS_UNSUPPORTED: LAC_COPY_STRING(pStatusText, CPA_STATUS_STR_UNSUPPORTED); break; default: status = CPA_STATUS_INVALID_PARAM; break; } return status; } CpaStatus cpaDcGetNumIntermediateBuffers(CpaInstanceHandle dcInstance, Cpa16U *pNumBuffers) { CpaInstanceHandle insHandle = NULL; sal_compression_service_t *pService = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); } else { insHandle = dcInstance; } LAC_CHECK_NULL_PARAM(insHandle); LAC_CHECK_NULL_PARAM(pNumBuffers); pService = (sal_compression_service_t *)insHandle; *pNumBuffers = pService->numInterBuffs; return CPA_STATUS_SUCCESS; } CpaStatus cpaDcStartInstance(CpaInstanceHandle instanceHandle, Cpa16U numBuffers, CpaBufferList **pIntermediateBufferPtrsArray) { icp_qat_addr_width_t *pInterBuffPtrsArray = NULL; icp_qat_addr_width_t pArrayBufferListDescPhyAddr = 0; icp_qat_addr_width_t bufListDescPhyAddr; icp_qat_addr_width_t bufListAlignedPhyAddr; CpaFlatBuffer *pClientCurrFlatBuffer = NULL; icp_buffer_list_desc_t *pBufferListDesc = NULL; icp_flat_buffer_desc_t *pCurrFlatBufDesc = NULL; CpaInstanceInfo2 info = { 0 }; icp_accel_dev_t *dev = NULL; CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *pService = NULL; CpaInstanceHandle insHandle = NULL; Cpa16U bufferIndex = 0; Cpa32U numFlatBuffers = 0; Cpa64U clientListSize = 0; CpaBufferList *pClientCurrentIntermediateBuffer = NULL; Cpa32U bufferIndex2 = 0; CpaBufferList **pTempIntermediateBufferPtrsArray; Cpa64U lastClientListSize = 0; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle) { insHandle = dcGetFirstHandle(); } else { insHandle = instanceHandle; } LAC_CHECK_NULL_PARAM(insHandle); status = cpaDcInstanceGetInfo2(insHandle, &info); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Can not get instance info.\n"); return status; } dev = icp_adf_getAccelDevByAccelId(info.physInstId.packageId); if (NULL == dev) { QAT_UTILS_LOG("Can not find device for the instance\n"); return CPA_STATUS_FAIL; } if (NULL == pIntermediateBufferPtrsArray) { /* Increment dev ref counter and return - DRAM is not used */ icp_qa_dev_get(dev); return CPA_STATUS_SUCCESS; } if (0 == numBuffers) { /* Increment dev ref counter and return - DRAM is not used */ icp_qa_dev_get(dev); return CPA_STATUS_SUCCESS; } pService = (sal_compression_service_t *)insHandle; LAC_CHECK_NULL_PARAM(insHandle); if ((numBuffers > 0) && (NULL == pIntermediateBufferPtrsArray)) { QAT_UTILS_LOG("Invalid Intermediate Buffers Array pointer\n"); return CPA_STATUS_INVALID_PARAM; } /* Check number of intermediate buffers allocated by user */ if ((pService->numInterBuffs != numBuffers)) { QAT_UTILS_LOG("Invalid number of buffers\n"); return CPA_STATUS_INVALID_PARAM; } pTempIntermediateBufferPtrsArray = pIntermediateBufferPtrsArray; for (bufferIndex = 0; bufferIndex < numBuffers; bufferIndex++) { if (NULL == *pTempIntermediateBufferPtrsArray) { QAT_UTILS_LOG( "Intermediate Buffer - Invalid Buffer List pointer\n"); return CPA_STATUS_INVALID_PARAM; } if (NULL == (*pTempIntermediateBufferPtrsArray)->pBuffers) { QAT_UTILS_LOG( "Intermediate Buffer - Invalid Flat Buffer descriptor pointer\n"); return CPA_STATUS_INVALID_PARAM; } if (NULL == (*pTempIntermediateBufferPtrsArray)->pPrivateMetaData) { QAT_UTILS_LOG( "Intermediate Buffer - Invalid Private MetaData descriptor pointer\n"); return CPA_STATUS_INVALID_PARAM; } clientListSize = 0; for (bufferIndex2 = 0; bufferIndex2 < (*pTempIntermediateBufferPtrsArray)->numBuffers; bufferIndex2++) { if ((0 != (*pTempIntermediateBufferPtrsArray) ->pBuffers[bufferIndex2] .dataLenInBytes) && NULL == (*pTempIntermediateBufferPtrsArray) ->pBuffers[bufferIndex2] .pData) { QAT_UTILS_LOG( "Intermediate Buffer - Invalid Flat Buffer pointer\n"); return CPA_STATUS_INVALID_PARAM; } clientListSize += (*pTempIntermediateBufferPtrsArray) ->pBuffers[bufferIndex2] .dataLenInBytes; } if (bufferIndex != 0) { if (lastClientListSize != clientListSize) { QAT_UTILS_LOG( "SGLs have to be of the same size.\n"); return CPA_STATUS_INVALID_PARAM; } } else { lastClientListSize = clientListSize; } pTempIntermediateBufferPtrsArray++; } /* Allocate array of physical pointers to icp_buffer_list_desc_t */ status = LAC_OS_CAMALLOC(&pInterBuffPtrsArray, (numBuffers * sizeof(icp_qat_addr_width_t)), LAC_64BYTE_ALIGNMENT, pService->nodeAffinity); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Can not allocate Intermediate Buffers array.\n"); return status; } /* Get physical address of the intermediate buffer pointers array */ pArrayBufferListDescPhyAddr = LAC_MEM_CAST_PTR_TO_UINT64( LAC_OS_VIRT_TO_PHYS_INTERNAL(pInterBuffPtrsArray)); pService->pInterBuffPtrsArray = pInterBuffPtrsArray; pService->pInterBuffPtrsArrayPhyAddr = pArrayBufferListDescPhyAddr; /* Get the full size of the buffer list */ /* Assumption: all the SGLs allocated by the user have the same size */ clientListSize = 0; for (bufferIndex = 0; bufferIndex < (*pIntermediateBufferPtrsArray)->numBuffers; bufferIndex++) { clientListSize += ((*pIntermediateBufferPtrsArray) ->pBuffers[bufferIndex] .dataLenInBytes); } pService->minInterBuffSizeInBytes = clientListSize; for (bufferIndex = 0; bufferIndex < numBuffers; bufferIndex++) { /* Get pointer to the client Intermediate Buffer List * (CpaBufferList) */ pClientCurrentIntermediateBuffer = *pIntermediateBufferPtrsArray; /* Get number of flat buffers in the buffer list */ numFlatBuffers = pClientCurrentIntermediateBuffer->numBuffers; /* Get pointer to the client array of CpaFlatBuffers */ pClientCurrFlatBuffer = pClientCurrentIntermediateBuffer->pBuffers; /* Calculate Physical address of current private SGL */ bufListDescPhyAddr = LAC_OS_VIRT_TO_PHYS_EXTERNAL( (*pService), pClientCurrentIntermediateBuffer->pPrivateMetaData); if (bufListDescPhyAddr == 0) { QAT_UTILS_LOG( "Unable to get the physical address of the metadata.\n"); return CPA_STATUS_FAIL; } /* Align SGL physical address */ bufListAlignedPhyAddr = LAC_ALIGN_POW2_ROUNDUP(bufListDescPhyAddr, ICP_DESCRIPTOR_ALIGNMENT_BYTES); /* Set physical address of the Intermediate Buffer SGL in the * SGLs array */ *pInterBuffPtrsArray = LAC_MEM_CAST_PTR_TO_UINT64(bufListAlignedPhyAddr); /* Calculate (virtual) offset to the buffer list descriptor */ pBufferListDesc = (icp_buffer_list_desc_t *)((LAC_ARCH_UINT)pClientCurrentIntermediateBuffer ->pPrivateMetaData + (LAC_ARCH_UINT)(bufListAlignedPhyAddr - bufListDescPhyAddr)); /* Set number of flat buffers in the physical Buffer List * descriptor */ pBufferListDesc->numBuffers = numFlatBuffers; /* Go past the Buffer List descriptor to the list of buffer * descriptors */ pCurrFlatBufDesc = (icp_flat_buffer_desc_t *)((pBufferListDesc->phyBuffers)); /* Loop for each flat buffer in the SGL */ while (0 != numFlatBuffers) { /* Set length of the current flat buffer */ pCurrFlatBufDesc->dataLenInBytes = pClientCurrFlatBuffer->dataLenInBytes; /* Set physical address of the flat buffer */ pCurrFlatBufDesc->phyBuffer = LAC_MEM_CAST_PTR_TO_UINT64( LAC_OS_VIRT_TO_PHYS_EXTERNAL( (*pService), pClientCurrFlatBuffer->pData)); if (pCurrFlatBufDesc->phyBuffer == 0) { QAT_UTILS_LOG( "Unable to get the physical address of the flat buffer.\n"); return CPA_STATUS_FAIL; } pCurrFlatBufDesc++; pClientCurrFlatBuffer++; numFlatBuffers--; } pIntermediateBufferPtrsArray++; pInterBuffPtrsArray++; } pService->generic_service_info.isInstanceStarted = CPA_TRUE; /* Increment dev ref counter */ icp_qa_dev_get(dev); return CPA_STATUS_SUCCESS; } CpaStatus cpaDcStopInstance(CpaInstanceHandle instanceHandle) { CpaInstanceHandle insHandle = NULL; CpaInstanceInfo2 info = { 0 }; icp_accel_dev_t *dev = NULL; CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *pService = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle) { insHandle = dcGetFirstHandle(); } else { insHandle = instanceHandle; } LAC_CHECK_NULL_PARAM(insHandle); pService = (sal_compression_service_t *)insHandle; /* Free Intermediate Buffer Pointers Array */ if (pService->pInterBuffPtrsArray != NULL) { LAC_OS_CAFREE(pService->pInterBuffPtrsArray); pService->pInterBuffPtrsArray = 0; } pService->pInterBuffPtrsArrayPhyAddr = 0; status = cpaDcInstanceGetInfo2(insHandle, &info); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Can not get instance info.\n"); return status; } dev = icp_adf_getAccelDevByAccelId(info.physInstId.packageId); if (NULL == dev) { QAT_UTILS_LOG("Can not find device for the instance.\n"); return CPA_STATUS_FAIL; } pService->generic_service_info.isInstanceStarted = CPA_FALSE; /* Decrement dev ref counter */ icp_qa_dev_put(dev); return CPA_STATUS_SUCCESS; } CpaStatus cpaDcGetNumInstances(Cpa16U *pNumInstances) { CpaStatus status = CPA_STATUS_SUCCESS; icp_accel_dev_t **pAdfInsts = NULL; icp_accel_dev_t *dev_addr = NULL; sal_t *base_addr = NULL; sal_list_t *list_temp = NULL; Cpa16U num_accel_dev = 0; Cpa16U num = 0; Cpa16U i = 0; LAC_CHECK_NULL_PARAM(pNumInstances); /* Get the number of accel_dev in the system */ status = icp_amgr_getNumInstances(&num_accel_dev); LAC_CHECK_STATUS(status); /* Allocate memory to store addr of accel_devs */ pAdfInsts = malloc(num_accel_dev * sizeof(icp_accel_dev_t *), M_QAT, M_WAITOK); num_accel_dev = 0; /* Get ADF to return accel_devs with dc enabled */ status = icp_amgr_getAllAccelDevByCapabilities( ICP_ACCEL_CAPABILITIES_COMPRESSION, pAdfInsts, &num_accel_dev); if (CPA_STATUS_SUCCESS == status) { for (i = 0; i < num_accel_dev; i++) { dev_addr = (icp_accel_dev_t *)pAdfInsts[i]; if (NULL != dev_addr) { base_addr = dev_addr->pSalHandle; if (NULL != base_addr) { list_temp = base_addr->compression_services; while (NULL != list_temp) { num++; list_temp = SalList_next(list_temp); } } } } *pNumInstances = num; } free(pAdfInsts, M_QAT); return status; } CpaStatus cpaDcGetInstances(Cpa16U numInstances, CpaInstanceHandle *dcInstances) { CpaStatus status = CPA_STATUS_SUCCESS; icp_accel_dev_t **pAdfInsts = NULL; icp_accel_dev_t *dev_addr = NULL; sal_t *base_addr = NULL; sal_list_t *list_temp = NULL; Cpa16U num_accel_dev = 0; Cpa16U index = 0; Cpa16U i = 0; LAC_CHECK_NULL_PARAM(dcInstances); if (0 == numInstances) { QAT_UTILS_LOG("numInstances is 0.\n"); return CPA_STATUS_INVALID_PARAM; } /* Get the number of accel_dev in the system */ status = icp_amgr_getNumInstances(&num_accel_dev); LAC_CHECK_STATUS(status); /* Allocate memory to store addr of accel_devs */ pAdfInsts = malloc(num_accel_dev * sizeof(icp_accel_dev_t *), M_QAT, M_WAITOK); num_accel_dev = 0; /* Get ADF to return accel_devs with dc enabled */ status = icp_amgr_getAllAccelDevByCapabilities( ICP_ACCEL_CAPABILITIES_COMPRESSION, pAdfInsts, &num_accel_dev); if (CPA_STATUS_SUCCESS == status) { /* First check the number of instances in the system */ for (i = 0; i < num_accel_dev; i++) { dev_addr = (icp_accel_dev_t *)pAdfInsts[i]; if (NULL != dev_addr) { base_addr = dev_addr->pSalHandle; if (NULL != base_addr) { list_temp = base_addr->compression_services; while (NULL != list_temp) { if (index > (numInstances - 1)) { break; } dcInstances[index] = SalList_getObject( list_temp); list_temp = SalList_next(list_temp); index++; } } } } if (numInstances > index) { QAT_UTILS_LOG("Only %d dc instances available.\n", index); status = CPA_STATUS_RESOURCE; } } if (CPA_STATUS_SUCCESS == status) { index = 0; for (i = 0; i < num_accel_dev; i++) { dev_addr = (icp_accel_dev_t *)pAdfInsts[i]; /* Note dev_addr cannot be NULL here as numInstances=0 is not valid and if dev_addr=NULL then index=0 (which is less than numInstances and status is set to _RESOURCE above */ base_addr = dev_addr->pSalHandle; if (NULL != base_addr) { list_temp = base_addr->compression_services; while (NULL != list_temp) { if (index > (numInstances - 1)) { break; } dcInstances[index] = SalList_getObject(list_temp); list_temp = SalList_next(list_temp); index++; } } } } free(pAdfInsts, M_QAT); return status; } CpaStatus cpaDcInstanceGetInfo2(const CpaInstanceHandle instanceHandle, CpaInstanceInfo2 *pInstanceInfo2) { sal_compression_service_t *pCompressionService = NULL; CpaInstanceHandle insHandle = NULL; icp_accel_dev_t *dev = NULL; CpaStatus status = CPA_STATUS_SUCCESS; char keyStr[ADF_CFG_MAX_KEY_LEN_IN_BYTES] = { 0 }; char valStr[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; char *section = DYN_SEC; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle) { insHandle = dcGetFirstHandle(); } else { insHandle = instanceHandle; } LAC_CHECK_NULL_PARAM(insHandle); SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); LAC_CHECK_NULL_PARAM(pInstanceInfo2); LAC_OS_BZERO(pInstanceInfo2, sizeof(CpaInstanceInfo2)); pInstanceInfo2->accelerationServiceType = CPA_ACC_SVC_TYPE_DATA_COMPRESSION; snprintf((char *)pInstanceInfo2->vendorName, CPA_INST_VENDOR_NAME_SIZE, "%s", SAL_INFO2_VENDOR_NAME); pInstanceInfo2->vendorName[CPA_INST_VENDOR_NAME_SIZE - 1] = '\0'; snprintf((char *)pInstanceInfo2->swVersion, CPA_INST_SW_VERSION_SIZE, "Version %d.%d", SAL_INFO2_DRIVER_SW_VERSION_MAJ_NUMBER, SAL_INFO2_DRIVER_SW_VERSION_MIN_NUMBER); pInstanceInfo2->swVersion[CPA_INST_SW_VERSION_SIZE - 1] = '\0'; /* Note we can safely read the contents of the compression service instance here because icp_amgr_getAccelDevByCapabilities() only returns devs that have started */ pCompressionService = (sal_compression_service_t *)insHandle; pInstanceInfo2->physInstId.packageId = pCompressionService->pkgID; pInstanceInfo2->physInstId.acceleratorId = pCompressionService->acceleratorNum; pInstanceInfo2->physInstId.executionEngineId = 0; pInstanceInfo2->physInstId.busAddress = icp_adf_get_busAddress(pInstanceInfo2->physInstId.packageId); /* set coreAffinity to zero before use */ LAC_OS_BZERO(pInstanceInfo2->coreAffinity, sizeof(pInstanceInfo2->coreAffinity)); CPA_BITMAP_BIT_SET(pInstanceInfo2->coreAffinity, pCompressionService->coreAffinity); pInstanceInfo2->nodeAffinity = pCompressionService->nodeAffinity; if (CPA_TRUE == pCompressionService->generic_service_info.isInstanceStarted) { pInstanceInfo2->operState = CPA_OPER_STATE_UP; } else { pInstanceInfo2->operState = CPA_OPER_STATE_DOWN; } pInstanceInfo2->requiresPhysicallyContiguousMemory = CPA_TRUE; if (SAL_RESP_POLL_CFG_FILE == pCompressionService->isPolled) { pInstanceInfo2->isPolled = CPA_TRUE; } else { pInstanceInfo2->isPolled = CPA_FALSE; } pInstanceInfo2->isOffloaded = CPA_TRUE; /* Get the instance name and part name from the config file */ dev = icp_adf_getAccelDevByAccelId(pCompressionService->pkgID); if (NULL == dev) { QAT_UTILS_LOG("Can not find device for the instance.\n"); LAC_OS_BZERO(pInstanceInfo2, sizeof(CpaInstanceInfo2)); return CPA_STATUS_FAIL; } snprintf((char *)pInstanceInfo2->partName, CPA_INST_PART_NAME_SIZE, SAL_INFO2_PART_NAME, dev->deviceName); pInstanceInfo2->partName[CPA_INST_PART_NAME_SIZE - 1] = '\0'; if (CPA_FALSE == pCompressionService->generic_service_info.is_dyn) { section = icpGetProcessName(); } status = Sal_StringParsing( "Dc", pCompressionService->generic_service_info.instance, "Name", keyStr); LAC_CHECK_STATUS(status); status = icp_adf_cfgGetParamValue(dev, section, keyStr, valStr); LAC_CHECK_STATUS(status); strncpy((char *)pInstanceInfo2->instName, valStr, sizeof(pInstanceInfo2->instName) - 1); pInstanceInfo2->instName[CPA_INST_NAME_SIZE - 1] = '\0'; #if __GNUC__ >= 7 #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wformat-truncation" #endif snprintf((char *)pInstanceInfo2->instID, CPA_INST_ID_SIZE, "%s_%s", section, valStr); #if __GNUC__ >= 7 #pragma GCC diagnostic pop #endif return CPA_STATUS_SUCCESS; } CpaStatus cpaDcQueryCapabilities(CpaInstanceHandle dcInstance, CpaDcInstanceCapabilities *pInstanceCapabilities) { CpaInstanceHandle insHandle = NULL; sal_compression_service_t *pService = NULL; Cpa32U capabilitiesMask = 0; dc_extd_ftrs_t *pExtendedFtrs = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) { insHandle = dcGetFirstHandle(); if (NULL == insHandle) { QAT_UTILS_LOG("Can not get the instance.\n"); return CPA_STATUS_FAIL; } } else { insHandle = dcInstance; } pService = (sal_compression_service_t *)insHandle; LAC_CHECK_NULL_PARAM(insHandle); SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); LAC_CHECK_NULL_PARAM(pInstanceCapabilities); memset(pInstanceCapabilities, 0, sizeof(CpaDcInstanceCapabilities)); capabilitiesMask = pService->generic_service_info.capabilitiesMask; /* Set compression capabilities */ if (capabilitiesMask & ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY) { pInstanceCapabilities->integrityCrcs = CPA_TRUE; } pInstanceCapabilities->endOfLastBlock = CPA_TRUE; pInstanceCapabilities->statefulDeflateCompression = CPA_FALSE; pInstanceCapabilities->statefulDeflateDecompression = CPA_TRUE; pInstanceCapabilities->statelessDeflateCompression = CPA_TRUE; pInstanceCapabilities->statelessDeflateDecompression = CPA_TRUE; pInstanceCapabilities->checksumCRC32 = CPA_TRUE; pInstanceCapabilities->checksumAdler32 = CPA_TRUE; pInstanceCapabilities->dynamicHuffman = CPA_TRUE; pInstanceCapabilities->precompiledHuffman = CPA_FALSE; pInstanceCapabilities->dynamicHuffmanBufferReq = CPA_TRUE; pInstanceCapabilities->autoSelectBestHuffmanTree = CPA_TRUE; pInstanceCapabilities->validWindowSizeMaskCompression = pService->comp_device_data.windowSizeMask; pInstanceCapabilities->validWindowSizeMaskDecompression = pService->comp_device_data.windowSizeMask; pExtendedFtrs = (dc_extd_ftrs_t *)&( ((sal_service_t *)insHandle)->dcExtendedFeatures); pInstanceCapabilities->batchAndPack = CPA_FALSE; pInstanceCapabilities->compressAndVerify = (CpaBoolean)pExtendedFtrs->is_cnv; pInstanceCapabilities->compressAndVerifyStrict = CPA_TRUE; pInstanceCapabilities->compressAndVerifyAndRecover = (CpaBoolean)pExtendedFtrs->is_cnvnr; return CPA_STATUS_SUCCESS; } CpaStatus cpaDcSetAddressTranslation(const CpaInstanceHandle instanceHandle, CpaVirtualToPhysical virtual2Physical) { sal_service_t *pService = NULL; CpaInstanceHandle insHandle = NULL; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle) { insHandle = dcGetFirstHandle(); } else { insHandle = instanceHandle; } LAC_CHECK_NULL_PARAM(insHandle); SAL_CHECK_INSTANCE_TYPE(insHandle, SAL_SERVICE_TYPE_COMPRESSION); LAC_CHECK_NULL_PARAM(virtual2Physical); pService = (sal_service_t *)insHandle; pService->virt2PhysClient = virtual2Physical; return CPA_STATUS_SUCCESS; } /** ****************************************************************************** * @ingroup cpaDcCommon * Data compression specific polling function which polls a DC instance. *****************************************************************************/ CpaStatus icp_sal_DcPollInstance(CpaInstanceHandle instanceHandle_in, Cpa32U response_quota) { CpaStatus status = CPA_STATUS_SUCCESS; sal_compression_service_t *dc_handle = NULL; sal_service_t *gen_handle = NULL; icp_comms_trans_handle trans_hndTable[DC_NUM_RX_RINGS]; if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) { dc_handle = (sal_compression_service_t *)dcGetFirstHandle(); } else { dc_handle = (sal_compression_service_t *)instanceHandle_in; } LAC_CHECK_NULL_PARAM(dc_handle); SAL_RUNNING_CHECK(dc_handle); gen_handle = &(dc_handle->generic_service_info); if (SAL_SERVICE_TYPE_COMPRESSION != gen_handle->type) { QAT_UTILS_LOG("Instance handle type is incorrect.\n"); return CPA_STATUS_FAIL; } /* * From the instanceHandle we must get the trans_handle and send * down to adf for polling. * Populate our trans handle table with the appropriate handles. */ trans_hndTable[0] = dc_handle->trans_handle_compression_rx; /* Call adf to do the polling. */ status = icp_adf_pollInstance(trans_hndTable, DC_NUM_RX_RINGS, response_quota); return status; } /** ****************************************************************************** * @ingroup cpaDcCommon *****************************************************************************/ CpaStatus cpaDcInstanceSetNotificationCb( const CpaInstanceHandle instanceHandle, const CpaDcInstanceNotificationCbFunc pInstanceNotificationCb, void *pCallbackTag) { CpaStatus status = CPA_STATUS_SUCCESS; sal_service_t *gen_handle = instanceHandle; LAC_CHECK_NULL_PARAM(gen_handle); gen_handle->notification_cb = pInstanceNotificationCb; gen_handle->cb_tag = pCallbackTag; return status; } CpaInstanceHandle dcGetFirstHandle(void) { CpaStatus status = CPA_STATUS_SUCCESS; static icp_accel_dev_t *adfInsts[ADF_MAX_DEVICES] = { 0 }; CpaInstanceHandle dcInst = NULL; icp_accel_dev_t *dev_addr = NULL; sal_t *base_addr = NULL; sal_list_t *list_temp = NULL; Cpa16U i, num_dc = 0; /* Only need 1 dev with compression enabled - so check all devices */ status = icp_amgr_getAllAccelDevByCapabilities( ICP_ACCEL_CAPABILITIES_COMPRESSION, adfInsts, &num_dc); if ((0 == num_dc) || (CPA_STATUS_SUCCESS != status)) { QAT_UTILS_LOG( "No compression devices enabled in the system.\n"); return dcInst; } for (i = 0; i < num_dc; i++) { dev_addr = (icp_accel_dev_t *)adfInsts[i]; if (NULL != dev_addr) { base_addr = dev_addr->pSalHandle; if (NULL != base_addr) { list_temp = base_addr->compression_services; if (NULL != list_temp) { dcInst = SalList_getObject(list_temp); break; } } } } return dcInst; } diff --git a/sys/dev/qat/qat_api/common/ctrl/sal_ctrl_services.c b/sys/dev/qat/qat_api/common/ctrl/sal_ctrl_services.c index 10ce54c0ce43..d0a92081b532 100644 --- a/sys/dev/qat/qat_api/common/ctrl/sal_ctrl_services.c +++ b/sys/dev/qat/qat_api/common/ctrl/sal_ctrl_services.c @@ -1,1380 +1,1479 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * @file sal_ctrl_services.c * * @ingroup SalCtrl * * @description * This file contains the core of the service controller implementation. * *****************************************************************************/ /* QAT-API includes */ #include "cpa.h" #include "cpa_cy_key.h" #include "cpa_cy_ln.h" #include "cpa_cy_dh.h" #include "cpa_cy_dsa.h" #include "cpa_cy_rsa.h" #include "cpa_cy_ec.h" #include "cpa_cy_prime.h" #include "cpa_cy_sym.h" #include "cpa_dc.h" /* QAT utils includes */ #include "qat_utils.h" /* ADF includes */ #include "icp_adf_init.h" #include "icp_adf_transport.h" #include "icp_accel_devices.h" #include "icp_adf_cfg.h" #include "icp_adf_init.h" #include "icp_adf_accel_mgr.h" #include "icp_adf_debug.h" /* FW includes */ #include "icp_qat_fw_la.h" /* SAL includes */ #include "lac_mem.h" #include "lac_mem_pools.h" #include "lac_list.h" #include "lac_hooks.h" #include "sal_string_parse.h" #include "lac_common.h" #include "lac_sal_types.h" #include "lac_sal.h" #include "lac_sal_ctrl.h" #include "icp_sal_versions.h" #define MAX_SUBSYSTEM_RETRY 64 static char *subsystem_name = "SAL"; /**< Name used by ADF to identify this component. */ static char *cy_dir_name = "cy"; static char *asym_dir_name = "asym"; static char *sym_dir_name = "sym"; static char *dc_dir_name = "dc"; /**< Stats dir names. */ static char *ver_file_name = "version"; static subservice_registation_handle_t sal_service_reg_handle; /**< Data structure used by ADF to keep a reference to this component. */ /* * @ingroup SalCtrl * @description * This function is used to parse the results from ADF * in response to ServiceEnabled query.The results are * semi-colon separated. Internally, the bitmask represented * by the enabled_service is used to track which features are enabled. * * @context * This functions is called from the SalCtrl_ServiceEventInit function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device pointer to icp_accel_dev_t structure * @param[in] pEnabledServices pointer to memory where enabled services will * be written. * @retval Status */ CpaStatus SalCtrl_GetEnabledServices(icp_accel_dev_t *device, Cpa32U *pEnabledServices) { CpaStatus status = CPA_STATUS_SUCCESS; char param_value[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; char *token = NULL; char *running = NULL; *pEnabledServices = 0; memset(param_value, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES); status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, "ServicesEnabled", param_value); if (CPA_STATUS_SUCCESS == status) { running = param_value; token = strsep(&running, ";"); while (NULL != token) { do { if (strncmp(token, "asym", strlen("asym")) == 0) { *pEnabledServices |= SAL_SERVICE_TYPE_CRYPTO_ASYM; break; } if (strncmp(token, "sym", strlen("sym")) == 0) { *pEnabledServices |= SAL_SERVICE_TYPE_CRYPTO_SYM; break; } if (strncmp(token, "cy", strlen("cy")) == 0) { *pEnabledServices |= SAL_SERVICE_TYPE_CRYPTO; break; } if (strncmp(token, "dc", strlen("dc")) == 0) { *pEnabledServices |= SAL_SERVICE_TYPE_COMPRESSION; break; } QAT_UTILS_LOG( "Error parsing enabled services from ADF.\n"); return CPA_STATUS_FAIL; } while (0); token = strsep(&running, ";"); } } else { QAT_UTILS_LOG("Failed to get enabled services from ADF.\n"); } return status; } /* * @ingroup SalCtrl * @description * This function is used to check whether a service is enabled * * @context * This functions is called from the SalCtrl_ServiceEventInit function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * param[in] enabled_services It is the bitmask for the enabled services * param[in] service It is the service we want to check for */ CpaBoolean SalCtrl_IsServiceEnabled(Cpa32U enabled_services, sal_service_type_t service) { return (CpaBoolean)((enabled_services & (Cpa32U)(service)) != 0); } /* * @ingroup SalCtrl * @description * This function is used to check whether enabled services has associated * hardware capability support * * @context * This functions is called from the SalCtrl_ServiceEventInit function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * param[in] device A pointer to an icp_accel_dev_t * param[in] enabled_services It is the bitmask for the enabled services */ CpaStatus SalCtrl_GetSupportedServices(icp_accel_dev_t *device, Cpa32U enabled_services) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa32U capabilitiesMask = 0; status = icp_amgr_getAccelDevCapabilities(device, &capabilitiesMask); if (CPA_STATUS_SUCCESS == status) { if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC) || !(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC)) { QAT_UTILS_LOG( "Device does not support Crypto service\n"); status = CPA_STATUS_FAIL; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_ASYM)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC)) { QAT_UTILS_LOG( "Device does not support Asym service\n"); status = CPA_STATUS_FAIL; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_SYM)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC)) { QAT_UTILS_LOG( "Device does not support Sym service\n"); status = CPA_STATUS_FAIL; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_COMPRESSION)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_COMPRESSION)) { QAT_UTILS_LOG( "Device does not support Compression service.\n"); status = CPA_STATUS_FAIL; } } } return status; } /************************************************************************* * @ingroup SalCtrl * @description * This function is used to check if a service is supported * on the device. The key difference between this and * SalCtrl_GetSupportedServices() is that the latter treats it as * an error if the service is unsupported. * * @context * This can be called anywhere. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * param[in] device * param[in] service service or services to check * *************************************************************************/ CpaBoolean SalCtrl_IsServiceSupported(icp_accel_dev_t *device, sal_service_type_t service_to_check) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa32U capabilitiesMask = 0; CpaBoolean service_supported = CPA_TRUE; if (!(SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_CRYPTO)) && !(SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_CRYPTO_ASYM)) && !(SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_CRYPTO_SYM)) && !(SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_COMPRESSION))) { QAT_UTILS_LOG("Invalid service type\n"); service_supported = CPA_FALSE; } status = icp_amgr_getAccelDevCapabilities(device, &capabilitiesMask); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Can not get device capabilities.\n"); return CPA_FALSE; } if (SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_CRYPTO)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC) || !(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC)) { QAT_UTILS_LOG( "Device does not support Crypto service\n"); service_supported = CPA_FALSE; } } if (SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_CRYPTO_ASYM)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC)) { QAT_UTILS_LOG("Device does not support Asym service\n"); service_supported = CPA_FALSE; } } if (SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_CRYPTO_SYM)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC)) { QAT_UTILS_LOG("Device does not support Sym service\n"); service_supported = CPA_FALSE; } } if (SalCtrl_IsServiceEnabled((Cpa32U)service_to_check, SAL_SERVICE_TYPE_COMPRESSION)) { if (!(capabilitiesMask & ICP_ACCEL_CAPABILITIES_COMPRESSION)) { QAT_UTILS_LOG( "Device does not support Compression service.\n"); service_supported = CPA_FALSE; } } return service_supported; } /* * @ingroup SalCtrl * @description * This function is used to retrieve how many instances are * to be configured for process specific service. * * @context * This functions is called from the SalCtrl_ServiceEventInit function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device A pointer to an icp_accel_dev_t * @param[in] key Represents the parameter's name we want to query * @param[out] pCount Pointer to memory where num instances will be stored * @retval status returned status from ADF or _FAIL if number of instances * is out of range for the device. */ static CpaStatus SalCtrl_GetInstanceCount(icp_accel_dev_t *device, char *key, Cpa32U *pCount) { CpaStatus status = CPA_STATUS_FAIL; char param_value[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; memset(param_value, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES); status = icp_adf_cfgGetParamValue(device, icpGetProcessName(), key, param_value); if (CPA_STATUS_SUCCESS == status) { *pCount = (Cpa32U)(Sal_Strtoul(param_value, NULL, SAL_CFG_BASE_DEC)); if (*pCount > SAL_MAX_NUM_INSTANCES_PER_DEV) { QAT_UTILS_LOG("Number of instances is out of range.\n"); status = CPA_STATUS_FAIL; } } return status; } /************************************************************************** * @ingroup SalCtrl * @description * This function calls the shutdown function on all the * service instances. * It also frees all service instance memory allocated at Init. * * @context * This function is called from the SalCtrl_ServiceEventShutdown * function. * * @assumptions * params[in] should not be NULL * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] services A pointer to the container of services * @param[in] dbg_dir A pointer to the debug directory * @param[in] svc_type The type of the service instance * ****************************************************************************/ static CpaStatus SalCtrl_ServiceShutdown(icp_accel_dev_t *device, sal_list_t **services, debug_dir_info_t **debug_dir, sal_service_type_t svc_type) { CpaStatus status = CPA_STATUS_SUCCESS; sal_list_t *dyn_service = NULL; sal_service_t *inst = NULL; /* Call Shutdown function for each service instance */ SAL_FOR_EACH(*services, sal_service_t, device, shutdown, status); if (*debug_dir) { icp_adf_debugRemoveDir(*debug_dir); LAC_OS_FREE(*debug_dir); *debug_dir = NULL; } if (!icp_adf_is_dev_in_reset(device)) { dyn_service = *services; while (dyn_service) { inst = (sal_service_t *)SalList_getObject(dyn_service); if (CPA_TRUE == inst->is_dyn) { icp_adf_putDynInstance(device, (adf_service_type_t) svc_type, inst->instance); } dyn_service = SalList_next(dyn_service); } /* Free Sal services controller memory */ SalList_free(services); } else { sal_list_t *curr_element = NULL; sal_service_t *service = NULL; curr_element = *services; while (NULL != curr_element) { service = (sal_service_t *)SalList_getObject(curr_element); service->state = SAL_SERVICE_STATE_RESTARTING; curr_element = SalList_next(curr_element); } } return status; } static CpaStatus selectGeneration(device_type_t deviceType, sal_service_t *pInst) { switch (deviceType) { case DEVICE_C62X: case DEVICE_C62XVF: case DEVICE_DH895XCC: case DEVICE_DH895XCCVF: case DEVICE_C3XXX: case DEVICE_C3XXXVF: case DEVICE_200XX: case DEVICE_200XXVF: pInst->gen = GEN2; break; case DEVICE_C4XXX: case DEVICE_C4XXXVF: pInst->gen = GEN3; break; - case DEVICE_GEN4: + case DEVICE_4XXX: + case DEVICE_4XXXVF: pInst->gen = GEN4; break; default: QAT_UTILS_LOG("deviceType not initialised\n"); return CPA_STATUS_FAIL; } return CPA_STATUS_SUCCESS; } /************************************************************************* * @ingroup SalCtrl * @description * This function is used to initialise the service instances. * It allocates memory for service instances and invokes the * Init function on them. * * @context * This function is called from the SalCtrl_ServiceEventInit function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] services A pointer to the container of services * @param[in] dbg_dir A pointer to the debug directory * @param[in] dbg_dir_name Name of the debug directory * @param[in] tail_list SAL's list of services * @param[in] instance_count Number of instances * @param[in] svc_type The type of the service instance * *************************************************************************/ static CpaStatus SalCtrl_ServiceInit(icp_accel_dev_t *device, sal_list_t **services, debug_dir_info_t **dbg_dir, char *dbg_dir_name, sal_list_t *tail_list, Cpa32U instance_count, sal_service_type_t svc_type) { CpaStatus status = CPA_STATUS_SUCCESS; sal_service_t *pInst = NULL; Cpa32U i = 0; debug_dir_info_t *debug_dir = NULL; debug_dir = LAC_OS_MALLOC(sizeof(debug_dir_info_t)); if (NULL == debug_dir) { QAT_UTILS_LOG("Failed to allocate memory for debug dir.\n"); return CPA_STATUS_RESOURCE; } debug_dir->name = dbg_dir_name; debug_dir->parent = NULL; status = icp_adf_debugAddDir(device, debug_dir); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to add debug dir.\n"); LAC_OS_FREE(debug_dir); debug_dir = NULL; return status; } if (!icp_adf_is_dev_in_reset(device)) { for (i = 0; i < instance_count; i++) { status = SalCtrl_ServiceCreate(svc_type, i, &pInst); if (CPA_STATUS_SUCCESS != status) { break; } pInst->debug_parent_dir = debug_dir; pInst->capabilitiesMask = device->accelCapabilitiesMask; status = selectGeneration(device->deviceType, pInst); if (CPA_STATUS_SUCCESS == status) { status = SalList_add(services, &tail_list, pInst); } if (CPA_STATUS_SUCCESS != status) { free(pInst, M_QAT); } } } else { sal_list_t *curr_element = *services; sal_service_t *service = NULL; while (NULL != curr_element) { service = (sal_service_t *)SalList_getObject(curr_element); service->debug_parent_dir = debug_dir; if (CPA_TRUE == service->isInstanceStarted) { icp_qa_dev_get(device); } curr_element = SalList_next(curr_element); } } if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to allocate all instances.\n"); icp_adf_debugRemoveDir(debug_dir); LAC_OS_FREE(debug_dir); debug_dir = NULL; SalList_free(services); return status; } /* Call init function for each service instance */ SAL_FOR_EACH(*services, sal_service_t, device, init, status); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to initialise all service instances.\n"); /* shutdown all instances initialised before error */ SAL_FOR_EACH_STATE(*services, sal_service_t, device, shutdown, SAL_SERVICE_STATE_INITIALIZED); icp_adf_debugRemoveDir(debug_dir); LAC_OS_FREE(debug_dir); debug_dir = NULL; SalList_free(services); return status; } /* initialize the debug directory for relevant service */ *dbg_dir = debug_dir; return status; } /************************************************************************** * @ingroup SalCtrl * @description * This function calls the start function on all the service instances. * * @context * This function is called from the SalCtrl_ServiceEventStart function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] services A pointer to the container of services * **************************************************************************/ static CpaStatus SalCtrl_ServiceStart(icp_accel_dev_t *device, sal_list_t *services) { CpaStatus status = CPA_STATUS_SUCCESS; /* Call Start function for each service instance */ SAL_FOR_EACH(services, sal_service_t, device, start, status); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to start all instances.\n"); /* stop all instances started before error */ SAL_FOR_EACH_STATE(services, sal_service_t, device, stop, SAL_SERVICE_STATE_RUNNING); return status; } if (icp_adf_is_dev_in_reset(device)) { sal_list_t *curr_element = services; sal_service_t *service = NULL; while (NULL != curr_element) { service = (sal_service_t *)SalList_getObject(curr_element); if (service->notification_cb) { service->notification_cb( service, service->cb_tag, CPA_INSTANCE_EVENT_RESTARTED); } curr_element = SalList_next(curr_element); } } return status; } /**************************************************************************** * @ingroup SalCtrl * @description * This function calls the stop function on all the * service instances. * * @context * This function is called from the SalCtrl_ServiceEventStop function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] services A pointer to the container of services * *************************************************************************/ static CpaStatus SalCtrl_ServiceStop(icp_accel_dev_t *device, sal_list_t *services) { CpaStatus status = CPA_STATUS_SUCCESS; /* Calling restarting functions */ if (icp_adf_is_dev_in_reset(device)) { sal_list_t *curr_element = services; sal_service_t *service = NULL; while (NULL != curr_element) { service = (sal_service_t *)SalList_getObject(curr_element); if (service->notification_cb) { service->notification_cb( service, service->cb_tag, CPA_INSTANCE_EVENT_RESTARTING); } curr_element = SalList_next(curr_element); } } /* Call Stop function for each service instance */ SAL_FOR_EACH(services, sal_service_t, device, stop, status); return status; } +static CpaStatus +SalCtrl_ServiceError(icp_accel_dev_t *device, sal_list_t *services) +{ + CpaStatus status = CPA_STATUS_SUCCESS; + + /* Calling error handling functions */ + sal_list_t *curr_element = services; + sal_service_t *service = NULL; + while (NULL != curr_element) { + service = (sal_service_t *)SalList_getObject(curr_element); + if (service->notification_cb) { + service->notification_cb( + service, + service->cb_tag, + CPA_INSTANCE_EVENT_FATAL_ERROR); + } + curr_element = SalList_next(curr_element); + } + + return status; +} + /* * @ingroup SalCtrl * @description * This function is used to print hardware and software versions in proc * filesystem entry via ADF Debug interface * * @context * This functions is called from proc filesystem interface * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] private_data A pointer to a private data passed to the * function while adding a debug file. * @param[out] data Pointer to a buffer where version information * needs to be printed to. * @param[in] size Size of a buffer pointed by data. * @param[in] offset Offset in a debug file * * @retval 0 This function always returns 0 */ static int SalCtrl_VersionDebug(void *private_data, char *data, int size, int offset) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa32U len = 0; icp_accel_dev_t *device = (icp_accel_dev_t *)private_data; char param_value[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; len += snprintf( data + len, size - len, SEPARATOR BORDER " Hardware and Software versions for device %d " BORDER "\n" SEPARATOR, device->accelId); memset(param_value, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES); status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, ICP_CFG_HW_REV_ID_KEY, param_value); LAC_CHECK_STATUS(status); len += snprintf(data + len, size - len, " Hardware Version: %s %s \n", param_value, get_sku_info(device->sku)); memset(param_value, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES); status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, ICP_CFG_UOF_VER_KEY, param_value); LAC_CHECK_STATUS(status); len += snprintf(data + len, size - len, " Firmware Version: %s \n", param_value); memset(param_value, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES); status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, ICP_CFG_MMP_VER_KEY, param_value); LAC_CHECK_STATUS(status); len += snprintf(data + len, size - len, " MMP Version: %s \n", param_value); len += snprintf(data + len, size - len, " Driver Version: %d.%d.%d \n", SAL_INFO2_DRIVER_SW_VERSION_MAJ_NUMBER, SAL_INFO2_DRIVER_SW_VERSION_MIN_NUMBER, SAL_INFO2_DRIVER_SW_VERSION_PATCH_NUMBER); memset(param_value, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES); status = icp_adf_cfgGetParamValue(device, LAC_CFG_SECTION_GENERAL, ICP_CFG_LO_COMPATIBLE_DRV_KEY, param_value); LAC_CHECK_STATUS(status); len += snprintf(data + len, size - len, " Lowest Compatible Driver: %s \n", param_value); len += snprintf(data + len, size - len, " QuickAssist API CY Version: %d.%d \n", CPA_CY_API_VERSION_NUM_MAJOR, CPA_CY_API_VERSION_NUM_MINOR); len += snprintf(data + len, size - len, " QuickAssist API DC Version: %d.%d \n", CPA_DC_API_VERSION_NUM_MAJOR, CPA_DC_API_VERSION_NUM_MINOR); len += snprintf(data + len, size - len, SEPARATOR); return 0; } /************************************************************************** * @ingroup SalCtrl * @description * This function calls the shutdown function on all the service * instances. It also frees all service instance memory * allocated at Init. * * @context * This function is called from the SalCtrl_ServiceEventHandler function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] enabled_services Services enabled by user * ****************************************************************************/ static CpaStatus SalCtrl_ServiceEventShutdown(icp_accel_dev_t *device, Cpa32U enabled_services) { CpaStatus status = CPA_STATUS_SUCCESS; CpaStatus ret_status = CPA_STATUS_SUCCESS; sal_t *service_container = (sal_t *)device->pSalHandle; if (NULL == service_container) { QAT_UTILS_LOG("Private data is NULL\n"); return CPA_STATUS_FATAL; } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO)) { status = SalCtrl_ServiceShutdown(device, &service_container->crypto_services, &service_container->cy_dir, SAL_SERVICE_TYPE_CRYPTO); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_ASYM)) { status = SalCtrl_ServiceShutdown(device, &service_container->asym_services, &service_container->asym_dir, SAL_SERVICE_TYPE_CRYPTO_ASYM); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_SYM)) { status = SalCtrl_ServiceShutdown(device, &service_container->sym_services, &service_container->sym_dir, SAL_SERVICE_TYPE_CRYPTO_SYM); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_COMPRESSION)) { status = SalCtrl_ServiceShutdown( device, &service_container->compression_services, &service_container->dc_dir, SAL_SERVICE_TYPE_COMPRESSION); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (service_container->ver_file) { icp_adf_debugRemoveFile(service_container->ver_file); LAC_OS_FREE(service_container->ver_file); service_container->ver_file = NULL; } if (!icp_adf_is_dev_in_reset(device)) { /* Free container also */ free(service_container, M_QAT); device->pSalHandle = NULL; } return ret_status; } /************************************************************************* * @ingroup SalCtrl * @description * This function is used to initialize the service instances. * It first checks (via ADF query) which services are enabled in the * system and the number of each services. * It then invokes the init function on them which creates the * instances and allocates memory for them. * * @context * This function is called from the SalCtrl_ServiceEventHandler function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] enabled_services Services enabled by user * *************************************************************************/ static CpaStatus SalCtrl_ServiceEventInit(icp_accel_dev_t *device, Cpa32U enabled_services) { sal_t *service_container = NULL; CpaStatus status = CPA_STATUS_SUCCESS; sal_list_t *tail_list = NULL; Cpa32U instance_count = 0; status = SalCtrl_GetSupportedServices(device, enabled_services); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get supported services.\n"); return status; } if (!icp_adf_is_dev_in_reset(device)) { service_container = malloc(sizeof(sal_t), M_QAT, M_WAITOK); device->pSalHandle = service_container; service_container->asym_services = NULL; service_container->sym_services = NULL; service_container->crypto_services = NULL; service_container->compression_services = NULL; } else { service_container = device->pSalHandle; } service_container->asym_dir = NULL; service_container->sym_dir = NULL; service_container->cy_dir = NULL; service_container->dc_dir = NULL; service_container->ver_file = NULL; service_container->ver_file = LAC_OS_MALLOC(sizeof(debug_file_info_t)); if (NULL == service_container->ver_file) { free(service_container, M_QAT); return CPA_STATUS_RESOURCE; } memset(service_container->ver_file, 0, sizeof(debug_file_info_t)); service_container->ver_file->name = ver_file_name; service_container->ver_file->seq_read = SalCtrl_VersionDebug; service_container->ver_file->private_data = device; service_container->ver_file->parent = NULL; status = icp_adf_debugAddFile(device, service_container->ver_file); if (CPA_STATUS_SUCCESS != status) { LAC_OS_FREE(service_container->ver_file); free(service_container, M_QAT); return status; } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_ASYM)) { status = SalCtrl_GetInstanceCount(device, "NumberCyInstances", &instance_count); if (CPA_STATUS_SUCCESS != status) { instance_count = 0; } status = SalCtrl_ServiceInit(device, &service_container->asym_services, &service_container->asym_dir, asym_dir_name, tail_list, instance_count, SAL_SERVICE_TYPE_CRYPTO_ASYM); if (CPA_STATUS_SUCCESS != status) { goto err_init; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_SYM)) { status = SalCtrl_GetInstanceCount(device, "NumberCyInstances", &instance_count); if (CPA_STATUS_SUCCESS != status) { instance_count = 0; } status = SalCtrl_ServiceInit(device, &service_container->sym_services, &service_container->sym_dir, sym_dir_name, tail_list, instance_count, SAL_SERVICE_TYPE_CRYPTO_SYM); if (CPA_STATUS_SUCCESS != status) { goto err_init; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO)) { status = SalCtrl_GetInstanceCount(device, "NumberCyInstances", &instance_count); if (CPA_STATUS_SUCCESS != status) { instance_count = 0; } status = SalCtrl_ServiceInit(device, &service_container->crypto_services, &service_container->cy_dir, cy_dir_name, tail_list, instance_count, SAL_SERVICE_TYPE_CRYPTO); if (CPA_STATUS_SUCCESS != status) { goto err_init; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_COMPRESSION)) { status = SalCtrl_GetInstanceCount(device, "NumberDcInstances", &instance_count); if (CPA_STATUS_SUCCESS != status) { instance_count = 0; } status = SalCtrl_ServiceInit( device, &service_container->compression_services, &service_container->dc_dir, dc_dir_name, tail_list, instance_count, SAL_SERVICE_TYPE_COMPRESSION); if (CPA_STATUS_SUCCESS != status) { goto err_init; } } return status; err_init: SalCtrl_ServiceEventShutdown(device, enabled_services); return status; } /**************************************************************************** * @ingroup SalCtrl * @description * This function calls the stop function on all the service instances. * * @context * This function is called from the SalCtrl_ServiceEventHandler function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] enabled_services Enabled services by user * *************************************************************************/ static CpaStatus SalCtrl_ServiceEventStop(icp_accel_dev_t *device, Cpa32U enabled_services) { CpaStatus status = CPA_STATUS_SUCCESS; CpaStatus ret_status = CPA_STATUS_SUCCESS; sal_t *service_container = device->pSalHandle; if (service_container == NULL) { QAT_UTILS_LOG("Private data is NULL.\n"); return CPA_STATUS_FATAL; } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_ASYM)) { status = SalCtrl_ServiceStop(device, service_container->asym_services); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_SYM)) { status = SalCtrl_ServiceStop(device, service_container->sym_services); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO)) { status = SalCtrl_ServiceStop(device, service_container->crypto_services); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_COMPRESSION)) { status = SalCtrl_ServiceStop( device, service_container->compression_services); if (CPA_STATUS_SUCCESS != status) { ret_status = status; } } return ret_status; } +/************************************************************************** + * @ingroup SalCtrl + * @description + * This function calls the error function on all the service instances. + * + * @context + * This function is called from the SalCtrl_ServiceEventHandler function. + * + * @assumptions + * None + * @sideEffects + * None + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] device An icp_accel_dev_t* type + * @param[in] enabled_services Enabled services by user + * + **************************************************************************/ +static CpaStatus +SalCtrl_ServiceEventError(icp_accel_dev_t *device, Cpa32U enabled_services) +{ + CpaStatus status = CPA_STATUS_SUCCESS; + CpaStatus ret_status = CPA_STATUS_SUCCESS; + sal_t *service_container = device->pSalHandle; + + if (service_container == NULL) { + QAT_UTILS_LOG("Private data is NULL\n"); + return CPA_STATUS_FATAL; + } + if (SalCtrl_IsServiceEnabled(enabled_services, + SAL_SERVICE_TYPE_CRYPTO_ASYM)) { + status = SalCtrl_ServiceError(device, + service_container->asym_services); + if (CPA_STATUS_SUCCESS != status) { + ret_status = status; + } + } + + if (SalCtrl_IsServiceEnabled(enabled_services, + SAL_SERVICE_TYPE_CRYPTO_SYM)) { + status = SalCtrl_ServiceError(device, + service_container->sym_services); + if (CPA_STATUS_SUCCESS != status) { + ret_status = status; + } + } + + if (SalCtrl_IsServiceEnabled(enabled_services, + SAL_SERVICE_TYPE_CRYPTO)) { + status = + SalCtrl_ServiceError(device, + service_container->crypto_services); + if (CPA_STATUS_SUCCESS != status) { + ret_status = status; + } + } + + if (SalCtrl_IsServiceEnabled(enabled_services, + SAL_SERVICE_TYPE_COMPRESSION)) { + status = SalCtrl_ServiceError( + device, service_container->compression_services); + if (CPA_STATUS_SUCCESS != status) { + ret_status = status; + } + } + + return ret_status; +} + /************************************************************************** * @ingroup SalCtrl * @description * This function calls the start function on all the service instances. * * @context * This function is called from the SalCtrl_ServiceEventHandler function. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] enabled_services Enabled services by user * **************************************************************************/ static CpaStatus SalCtrl_ServiceEventStart(icp_accel_dev_t *device, Cpa32U enabled_services) { CpaStatus status = CPA_STATUS_SUCCESS; sal_t *service_container = device->pSalHandle; if (service_container == NULL) { QAT_UTILS_LOG("Private data is NULL.\n"); return CPA_STATUS_FATAL; } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_ASYM)) { status = SalCtrl_ServiceStart(device, service_container->asym_services); if (CPA_STATUS_SUCCESS != status) { goto err_start; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO_SYM)) { status = SalCtrl_ServiceStart(device, service_container->sym_services); if (CPA_STATUS_SUCCESS != status) { goto err_start; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_CRYPTO)) { status = SalCtrl_ServiceStart(device, service_container->crypto_services); if (CPA_STATUS_SUCCESS != status) { goto err_start; } } if (SalCtrl_IsServiceEnabled(enabled_services, SAL_SERVICE_TYPE_COMPRESSION)) { status = SalCtrl_ServiceStart( device, service_container->compression_services); if (CPA_STATUS_SUCCESS != status) { goto err_start; } } return status; err_start: SalCtrl_ServiceEventStop(device, enabled_services); return status; } /************************************************************************* * @ingroup SalCtrl * @description * This function is the events handler registered with ADF * for the QA API services (cy, dc) - kernel and user * * @context * This function is called from an ADF context. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] device An icp_accel_dev_t* type * @param[in] event Event from ADF * @param[in] param Parameter used for back compatibility * ***********************************************************************/ static CpaStatus SalCtrl_ServiceEventHandler(icp_accel_dev_t *device, icp_adf_subsystemEvent_t event, void *param) { CpaStatus status = CPA_STATUS_SUCCESS; CpaStatus stats_status = CPA_STATUS_SUCCESS; Cpa32U enabled_services = 0; status = SalCtrl_GetEnabledServices(device, &enabled_services); if (CPA_STATUS_SUCCESS != status) { QAT_UTILS_LOG("Failed to get enabled services.\n"); return status; } switch (event) { case ICP_ADF_EVENT_INIT: { /* In case there is no QAT SAL needs to call InitStats */ if (NULL == device->pQatStats) { status = SalStatistics_InitStatisticsCollection(device); } if (CPA_STATUS_SUCCESS != status) { return status; } status = SalCtrl_ServiceEventInit(device, enabled_services); break; } case ICP_ADF_EVENT_START: { status = SalCtrl_ServiceEventStart(device, enabled_services); break; } case ICP_ADF_EVENT_STOP: { status = SalCtrl_ServiceEventStop(device, enabled_services); break; } case ICP_ADF_EVENT_SHUTDOWN: { status = SalCtrl_ServiceEventShutdown(device, enabled_services); stats_status = SalStatistics_CleanStatisticsCollection(device); if (CPA_STATUS_SUCCESS != status || CPA_STATUS_SUCCESS != stats_status) { return CPA_STATUS_FAIL; } break; } + case ICP_ADF_EVENT_ERROR: { + status = SalCtrl_ServiceEventError(device, enabled_services); + break; + } default: status = CPA_STATUS_SUCCESS; break; } return status; } CpaStatus SalCtrl_AdfServicesRegister(void) { /* Fill out the global sal_service_reg_handle structure */ sal_service_reg_handle.subserviceEventHandler = SalCtrl_ServiceEventHandler; /* Set subsystem name to globally defined name */ sal_service_reg_handle.subsystem_name = subsystem_name; return icp_adf_subsystemRegister(&sal_service_reg_handle); } CpaStatus SalCtrl_AdfServicesUnregister(void) { return icp_adf_subsystemUnregister(&sal_service_reg_handle); } CpaStatus SalCtrl_AdfServicesStartedCheck(void) { CpaStatus status = CPA_STATUS_SUCCESS; Cpa32U retry_num = 0; CpaBoolean state = CPA_FALSE; do { state = icp_adf_isSubsystemStarted(&sal_service_reg_handle); retry_num++; } while ((CPA_FALSE == state) && (retry_num < MAX_SUBSYSTEM_RETRY)); if (CPA_FALSE == state) { QAT_UTILS_LOG("Sal Ctrl failed to start in given time.\n"); status = CPA_STATUS_FAIL; } return status; } CpaStatus validateConcurrRequest(Cpa32U numConcurrRequests) { Cpa32U baseReq = SAL_64_CONCURR_REQUESTS; if (SAL_64_CONCURR_REQUESTS > numConcurrRequests) { QAT_UTILS_LOG( "Invalid numConcurrRequests, it is less than min value.\n"); return CPA_STATUS_FAIL; } while (SAL_MAX_CONCURR_REQUESTS >= baseReq) { if (baseReq != numConcurrRequests) { baseReq = baseReq << 1; } else { break; } } if (SAL_MAX_CONCURR_REQUESTS < baseReq) { QAT_UTILS_LOG( "Invalid baseReg, it is greater than max value.\n"); return CPA_STATUS_FAIL; } return CPA_STATUS_SUCCESS; } diff --git a/sys/dev/qat/qat_api/common/ctrl/sal_get_instances.c b/sys/dev/qat/qat_api/common/ctrl/sal_get_instances.c new file mode 100644 index 000000000000..1857d58c6907 --- /dev/null +++ b/sys/dev/qat/qat_api/common/ctrl/sal_get_instances.c @@ -0,0 +1,288 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ + +/** + ***************************************************************************** + * @file sal_get_instances.c + * + * @defgroup SalCtrl Service Access Layer Controller + * + * @ingroup SalCtrl + * + * @description + * This file contains the main function to get SAL instances. + * + *****************************************************************************/ + +/* +******************************************************************************* +* Include public/global header files +******************************************************************************* +*/ + +/* QAT-API includes */ +#include "cpa.h" +#include "cpa_cy_common.h" +#include "cpa_cy_im.h" +#include "cpa_dc.h" + +/* ADF includes */ +#include "icp_accel_devices.h" +#include "icp_adf_accel_mgr.h" + +/* SAL includes */ +#include "lac_mem.h" +#include "lac_list.h" +#include "lac_sal_types.h" + +/** + ****************************************************************************** + * @ingroup SalCtrl + * @description + * Get either sym or asym instance number + *****************************************************************************/ +static CpaStatus +Lac_GetSingleCyNumInstances( + const CpaAccelerationServiceType accelerationServiceType, + Cpa16U *pNumInstances) +{ + CpaStatus status = CPA_STATUS_SUCCESS; + icp_accel_dev_t **pAdfInsts = NULL; + icp_accel_dev_t *dev_addr = NULL; + sal_t *base_addr = NULL; + sal_list_t *list_temp = NULL; + Cpa16U num_accel_dev = 0; + Cpa16U num_inst = 0; + Cpa16U i = 0; + Cpa32U accel_capability = 0; + char *service = NULL; + + LAC_CHECK_NULL_PARAM(pNumInstances); + *pNumInstances = 0; + + switch (accelerationServiceType) { + case CPA_ACC_SVC_TYPE_CRYPTO_ASYM: + accel_capability = ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; + service = "asym"; + break; + + case CPA_ACC_SVC_TYPE_CRYPTO_SYM: + accel_capability = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC; + service = "sym"; + break; + + default: + QAT_UTILS_LOG("Invalid service type\n"); + return CPA_STATUS_INVALID_PARAM; + } + + /* Get the number of accel_dev in the system */ + status = icp_amgr_getNumInstances(&num_accel_dev); + LAC_CHECK_STATUS(status); + + /* Allocate memory to store addr of accel_devs */ + pAdfInsts = malloc(num_accel_dev * sizeof(icp_accel_dev_t *), + M_QAT, + M_WAITOK | M_ZERO); + if (NULL == pAdfInsts) { + QAT_UTILS_LOG("Failed to allocate dev instance memory\n"); + return CPA_STATUS_RESOURCE; + } + + num_accel_dev = 0; + status = icp_amgr_getAllAccelDevByCapabilities(accel_capability, + pAdfInsts, + &num_accel_dev); + if (CPA_STATUS_SUCCESS != status) { + QAT_UTILS_LOG("No support for service %s\n", service); + free(pAdfInsts, M_QAT); + return status; + } + + for (i = 0; i < num_accel_dev; i++) { + dev_addr = pAdfInsts[i]; + if (NULL == dev_addr || NULL == dev_addr->pSalHandle) { + continue; + } + base_addr = dev_addr->pSalHandle; + + if (CPA_ACC_SVC_TYPE_CRYPTO_ASYM == accelerationServiceType) { + list_temp = base_addr->asym_services; + } else { + list_temp = base_addr->sym_services; + } + while (NULL != list_temp) { + num_inst++; + list_temp = SalList_next(list_temp); + } + } + + *pNumInstances = num_inst; + free(pAdfInsts, M_QAT); + + return status; +} + +/** + ****************************************************************************** + * @ingroup SalCtrl + * @description + * Get either sym or asym instance + *****************************************************************************/ +static CpaStatus +Lac_GetSingleCyInstances( + const CpaAccelerationServiceType accelerationServiceType, + Cpa16U numInstances, + CpaInstanceHandle *pInstances) +{ + CpaStatus status = CPA_STATUS_SUCCESS; + icp_accel_dev_t **pAdfInsts = NULL; + icp_accel_dev_t *dev_addr = NULL; + sal_t *base_addr = NULL; + sal_list_t *list_temp = NULL; + Cpa16U num_accel_dev = 0; + Cpa16U num_allocated_instances = 0; + Cpa16U index = 0; + Cpa16U i = 0; + Cpa32U accel_capability = 0; + char *service = NULL; + + LAC_CHECK_NULL_PARAM(pInstances); + if (0 == numInstances) { + QAT_UTILS_LOG("NumInstances is 0\n"); + return CPA_STATUS_INVALID_PARAM; + } + + switch (accelerationServiceType) { + case CPA_ACC_SVC_TYPE_CRYPTO_ASYM: + accel_capability = ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; + service = "asym"; + break; + + case CPA_ACC_SVC_TYPE_CRYPTO_SYM: + accel_capability = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC; + service = "sym"; + break; + default: + QAT_UTILS_LOG("Invalid service type\n"); + return CPA_STATUS_INVALID_PARAM; + } + + /* Get the number of instances */ + status = cpaGetNumInstances(accelerationServiceType, + &num_allocated_instances); + if (CPA_STATUS_SUCCESS != status) { + return status; + } + + if (numInstances > num_allocated_instances) { + QAT_UTILS_LOG("Only %d instances available\n", + num_allocated_instances); + return CPA_STATUS_RESOURCE; + } + + /* Get the number of accel devices in the system */ + status = icp_amgr_getNumInstances(&num_accel_dev); + LAC_CHECK_STATUS(status); + + /* Allocate memory to store addr of accel_devs */ + pAdfInsts = malloc(num_accel_dev * sizeof(icp_accel_dev_t *), + M_QAT, + M_WAITOK | M_ZERO); + if (NULL == pAdfInsts) { + QAT_UTILS_LOG("Failed to allocate dev instance memory\n"); + return CPA_STATUS_RESOURCE; + } + + num_accel_dev = 0; + status = icp_amgr_getAllAccelDevByCapabilities(accel_capability, + pAdfInsts, + &num_accel_dev); + if (CPA_STATUS_SUCCESS != status) { + QAT_UTILS_LOG("No support for service %s\n", service); + free(pAdfInsts, M_QAT); + return status; + } + + for (i = 0; i < num_accel_dev; i++) { + dev_addr = pAdfInsts[i]; + /* Note dev_addr cannot be NULL here as numInstances = 0 + * is not valid and if dev_addr = NULL then index = 0 (which + * is less than numInstances and status is set to _RESOURCE + * above) + */ + base_addr = dev_addr->pSalHandle; + if (NULL == base_addr) { + continue; + } + + if (CPA_ACC_SVC_TYPE_CRYPTO_ASYM == accelerationServiceType) + list_temp = base_addr->asym_services; + else + list_temp = base_addr->sym_services; + while (NULL != list_temp) { + if (index > (numInstances - 1)) + break; + + pInstances[index] = SalList_getObject(list_temp); + list_temp = SalList_next(list_temp); + index++; + } + } + free(pAdfInsts, M_QAT); + + return status; +} + +/** + ****************************************************************************** + * @ingroup SalCtrl + *****************************************************************************/ +CpaStatus +cpaGetNumInstances(const CpaAccelerationServiceType accelerationServiceType, + Cpa16U *pNumInstances) +{ + switch (accelerationServiceType) { + case CPA_ACC_SVC_TYPE_CRYPTO_ASYM: + case CPA_ACC_SVC_TYPE_CRYPTO_SYM: + return Lac_GetSingleCyNumInstances(accelerationServiceType, + pNumInstances); + case CPA_ACC_SVC_TYPE_CRYPTO: + return cpaCyGetNumInstances(pNumInstances); + case CPA_ACC_SVC_TYPE_DATA_COMPRESSION: + return cpaDcGetNumInstances(pNumInstances); + + default: + QAT_UTILS_LOG("Invalid service type\n"); + *pNumInstances = 0; + return CPA_STATUS_INVALID_PARAM; + } +} + +/** + ****************************************************************************** + * @ingroup SalCtrl + *****************************************************************************/ +CpaStatus +cpaGetInstances(const CpaAccelerationServiceType accelerationServiceType, + Cpa16U numInstances, + CpaInstanceHandle *pInstances) +{ + switch (accelerationServiceType) { + case CPA_ACC_SVC_TYPE_CRYPTO_ASYM: + case CPA_ACC_SVC_TYPE_CRYPTO_SYM: + return Lac_GetSingleCyInstances(accelerationServiceType, + numInstances, + pInstances); + + case CPA_ACC_SVC_TYPE_CRYPTO: + return cpaCyGetInstances(numInstances, pInstances); + case CPA_ACC_SVC_TYPE_DATA_COMPRESSION: + return cpaDcGetInstances(numInstances, pInstances); + + default: + QAT_UTILS_LOG("Invalid service type\n"); + return CPA_STATUS_INVALID_PARAM; + } +} diff --git a/sys/dev/qat/qat_api/common/include/sal_types_compression.h b/sys/dev/qat/qat_api/common/include/sal_types_compression.h index 80e3c89ea699..2851a82b730b 100644 --- a/sys/dev/qat/qat_api/common/include/sal_types_compression.h +++ b/sys/dev/qat/qat_api/common/include/sal_types_compression.h @@ -1,159 +1,162 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** *************************************************************************** * @file sal_types_compression.h * * @ingroup SalCtrl * * Generic compression instance type definition * ***************************************************************************/ #ifndef SAL_TYPES_COMPRESSION_H_ #define SAL_TYPES_COMPRESSION_H_ #include "cpa_dc.h" #include "cpa_dc_dp.h" #include "lac_sal_types.h" #include "icp_qat_hw.h" #include "icp_buffer_desc.h" #include "lac_mem_pools.h" #include "icp_adf_transport.h" #define DC_NUM_RX_RINGS (1) -#define DC_NUM_COMPRESSION_LEVELS (CPA_DC_L9) +#define DC_NUM_COMPRESSION_LEVELS (CPA_DC_L12) /** ***************************************************************************** * @ingroup SalCtrl * Compression device specific data * * @description * Contains device specific information for a compression service. * *****************************************************************************/ typedef struct sal_compression_device_data { /* Device specific minimum output buffer size for static compression */ Cpa32U minOutputBuffSize; /* Device specific minimum output buffer size for dynamic compression */ Cpa32U minOutputBuffSizeDynamic; /* Enable/disable secureRam/acceleratorRam for intermediate buffers*/ Cpa8U useDevRam; /* When set, implies device can decompress interim odd byte length * stateful decompression requests. */ CpaBoolean oddByteDecompInterim; /* When set, implies device can decompress odd byte length * stateful decompression requests when bFinal is absent */ CpaBoolean oddByteDecompNobFinal; /* Flag to indicate if translator slice overflow is supported */ CpaBoolean translatorOverflow; /* Flag to enable/disable delayed match mode */ icp_qat_hw_compression_delayed_match_t enableDmm; Cpa32U inflateContextSize; Cpa8U highestHwCompressionDepth; /* Mask that reports supported window sizes for comp/decomp */ Cpa8U windowSizeMask; /* List representing compression levels that are the first to have a unique search depth. */ CpaBoolean uniqueCompressionLevels[DC_NUM_COMPRESSION_LEVELS + 1]; Cpa8U numCompressionLevels; /* Flag to indicate CompressAndVerifyAndRecover feature support */ CpaBoolean cnvnrSupported; + + /* When set, implies device supports ASB_ENABLE */ + CpaBoolean asbEnableSupport; } sal_compression_device_data_t; /** ***************************************************************************** * @ingroup SalCtrl * Compression specific Service Container * * @description * Contains information required per compression service instance. * *****************************************************************************/ typedef struct sal_compression_service_s { /* An instance of the Generic Service Container */ sal_service_t generic_service_info; /* Memory pool ID used for compression */ lac_memory_pool_id_t compression_mem_pool; /* Pointer to an array of atomic stats for compression */ QatUtilsAtomic *pCompStatsArr; /* Size of the DRAM intermediate buffer in bytes */ Cpa64U minInterBuffSizeInBytes; /* Number of DRAM intermediate buffers */ Cpa16U numInterBuffs; /* Address of the array of DRAM intermediate buffers*/ icp_qat_addr_width_t *pInterBuffPtrsArray; CpaPhysicalAddr pInterBuffPtrsArrayPhyAddr; icp_comms_trans_handle trans_handle_compression_tx; icp_comms_trans_handle trans_handle_compression_rx; /* Maximum number of in flight requests */ Cpa32U maxNumCompConcurrentReq; /* Callback function defined for the DcDp API compression session */ CpaDcDpCallbackFn pDcDpCb; /* Config info */ Cpa16U acceleratorNum; Cpa16U bankNum; Cpa16U pkgID; Cpa16U isPolled; Cpa32U coreAffinity; Cpa32U nodeAffinity; sal_compression_device_data_t comp_device_data; /* Statistics handler */ debug_file_info_t *debug_file; } sal_compression_service_t; /************************************************************************* * @ingroup SalCtrl * @description * This function returns a valid compression instance handle for the system * if it exists. * * @performance * To avoid calling this function the user of the QA api should not use * instanceHandle = CPA_INSTANCE_HANDLE_SINGLE. * * @context * This function is called whenever instanceHandle = * CPA_INSTANCE_HANDLE_SINGLE at the QA Dc api. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @retval Pointer to first compression instance handle or NULL if no * compression instances in the system. * *************************************************************************/ CpaInstanceHandle dcGetFirstHandle(void); #endif /*SAL_TYPES_COMPRESSION_H_*/ diff --git a/sys/dev/qat/qat_api/common/stubs/lac_stubs.c b/sys/dev/qat/qat_api/common/stubs/lac_stubs.c index b9c0c3237a6c..f6c90e5e79d6 100644 --- a/sys/dev/qat/qat_api/common/stubs/lac_stubs.c +++ b/sys/dev/qat/qat_api/common/stubs/lac_stubs.c @@ -1,413 +1,604 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** ***************************************************************************** * * @file lac_stubs.c * * @defgroup kernel stubs * * All PKE and KPT API won't be supported in kernel API * *****************************************************************************/ /* ******************************************************************************* * Include public/global header files ******************************************************************************* */ /* API Includes */ #include "cpa.h" #include "cpa_cy_dh.h" #include "cpa_cy_dsa.h" #include "cpa_cy_ecdh.h" #include "cpa_cy_ecdsa.h" #include "cpa_cy_ec.h" #include "cpa_cy_prime.h" #include "cpa_cy_rsa.h" #include "cpa_cy_ln.h" #include "cpa_dc.h" +#include "cpa_dc_chain.h" +#include "cpa_cy_ecsm2.h" +#include "cpa_cy_kpt.h" #include "icp_accel_devices.h" #include "icp_adf_init.h" #include "icp_adf_transport.h" #include "icp_sal_poll.h" #include "cpa_cy_sym.h" #include "cpa_cy_sym_dp.h" #include "cpa_cy_key.h" #include "cpa_cy_common.h" #include "cpa_cy_im.h" #include "icp_sal_user.h" /* Diffie Hellman */ CpaStatus cpaCyDhKeyGenPhase1(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pDhPhase1Cb, void *pCallbackTag, const CpaCyDhPhase1KeyGenOpData *pPhase1KeyGenData, CpaFlatBuffer *pLocalOctetStringPV) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDhKeyGenPhase2Secret( const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pDhPhase2Cb, void *pCallbackTag, const CpaCyDhPhase2SecretKeyGenOpData *pPhase2SecretKeyGenData, CpaFlatBuffer *pOctetStringSecretKey) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDhQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyDhStats64 *pDhStats) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDhQueryStats(const CpaInstanceHandle instanceHandle, CpaCyDhStats *pDhStats) { return CPA_STATUS_UNSUPPORTED; } /* DSA */ CpaStatus cpaCyDsaGenPParam(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaPParamGenOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pP) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaGenGParam(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaGParamGenOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pG) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaGenYParam(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaYParamGenOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pY) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaSignR(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaRSignOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pR) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaSignS(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaSSignOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pS) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaSignRS(const CpaInstanceHandle instanceHandle, const CpaCyDsaRSSignCbFunc pCb, void *pCallbackTag, const CpaCyDsaRSSignOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pR, CpaFlatBuffer *pS) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaVerify(const CpaInstanceHandle instanceHandle, const CpaCyDsaVerifyCbFunc pCb, void *pCallbackTag, const CpaCyDsaVerifyOpData *pOpData, CpaBoolean *pVerifyStatus) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaQueryStats(const CpaInstanceHandle instanceHandle, CpaCyDsaStats *pDsaStats) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyDsaQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyDsaStats64 *pDsaStats) { return CPA_STATUS_UNSUPPORTED; } /* ECDH */ CpaStatus cpaCyEcdhPointMultiply(const CpaInstanceHandle instanceHandle, const CpaCyEcdhPointMultiplyCbFunc pCb, void *pCallbackTag, const CpaCyEcdhPointMultiplyOpData *pOpData, CpaBoolean *pMultiplyStatus, CpaFlatBuffer *pXk, CpaFlatBuffer *pYk) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcdhQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyEcdhStats64 *pEcdhStats) { return CPA_STATUS_UNSUPPORTED; } /* ECDSA */ CpaStatus cpaCyEcdsaSignR(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaGenSignCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaSignROpData *pOpData, CpaBoolean *pSignStatus, CpaFlatBuffer *pR) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcdsaSignS(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaGenSignCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaSignSOpData *pOpData, CpaBoolean *pSignStatus, CpaFlatBuffer *pS) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcdsaSignRS(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaSignRSCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaSignRSOpData *pOpData, CpaBoolean *pSignStatus, CpaFlatBuffer *pR, CpaFlatBuffer *pS) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcdsaVerify(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaVerifyCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaVerifyOpData *pOpData, CpaBoolean *pVerifyStatus) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcdsaQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyEcdsaStats64 *pEcdsaStats) { return CPA_STATUS_UNSUPPORTED; } /* EC */ CpaStatus cpaCyEcPointMultiply(const CpaInstanceHandle instanceHandle, const CpaCyEcPointMultiplyCbFunc pCb, void *pCallbackTag, const CpaCyEcPointMultiplyOpData *pOpData, CpaBoolean *pMultiplyStatus, CpaFlatBuffer *pXk, CpaFlatBuffer *pYk) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcPointVerify(const CpaInstanceHandle instanceHandle, const CpaCyEcPointVerifyCbFunc pCb, void *pCallbackTag, const CpaCyEcPointVerifyOpData *pOpData, CpaBoolean *pVerifyStatus) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyEcStats64 *pEcStats) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyEcMontEdwdsPointMultiply( const CpaInstanceHandle instanceHandle, const CpaCyEcPointMultiplyCbFunc pCb, void *pCallbackTag, const CpaCyEcMontEdwdsPointMultiplyOpData *pOpData, CpaBoolean *pMultiplyStatus, CpaFlatBuffer *pXk, CpaFlatBuffer *pYk) { return CPA_STATUS_UNSUPPORTED; } +CpaStatus +cpaCyEcGenericPointVerify(const CpaInstanceHandle instanceHandle, + const CpaCyEcPointVerifyCbFunc pCb, + void *pCallbackTag, + const CpaCyEcGenericPointVerifyOpData *pOpData, + CpaBoolean *pVerifyStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcGenericPointMultiply(const CpaInstanceHandle instanceHandle, + const CpaCyEcPointMultiplyCbFunc pCb, + void *pCallbackTag, + const CpaCyEcGenericPointMultiplyOpData *pOpData, + CpaBoolean *pMultiplyStatus, + CpaFlatBuffer *pOutX, + CpaFlatBuffer *pOutY) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2PointMultiply( + const CpaInstanceHandle instanceHandle_in, + const CpaCyEcPointMultiplyCbFunc pEcsm2PointMulCb, + void *pCallbackTag, + const CpaCyEcsm2PointMultiplyOpData *pEcsm2PointMulOpData, + CpaBoolean *pMultiplyStatus, + CpaFlatBuffer *pXk, + CpaFlatBuffer *pYk) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2GeneratorMultiply( + const CpaInstanceHandle instanceHandle_in, + const CpaCyEcPointMultiplyCbFunc pEcsm2GenMulCb, + void *pCallbackTag, + const CpaCyEcsm2GeneratorMultiplyOpData *pEcsm2GenMulOpData, + CpaBoolean *pMultiplyStatus, + CpaFlatBuffer *pXk, + CpaFlatBuffer *pYk) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2PointVerify( + const CpaInstanceHandle instanceHandle_in, + const CpaCyEcPointVerifyCbFunc pEcsm2PointVeirfyCb, + void *pCallbackTag, + const CpaCyEcsm2PointVerifyOpData *pEcsm2PointVerifyOpData, + CpaBoolean *pPointVerifyStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2Sign(const CpaInstanceHandle instanceHandle_in, + const CpaCyEcsm2SignCbFunc pEcsm2SignCb, + void *pCallbackTag, + const CpaCyEcsm2SignOpData *pEcsm2SignOpData, + CpaBoolean *pSignStatus, + CpaFlatBuffer *pR, + CpaFlatBuffer *pS) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2Verify(const CpaInstanceHandle instanceHandle_in, + const CpaCyEcsm2VerifyCbFunc pEcsm2VerifyCb, + void *pCallbackTag, + const CpaCyEcsm2VerifyOpData *pEcsm2VerifyOpData, + CpaBoolean *pVerifyStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2Encrypt(const CpaInstanceHandle instanceHandle_in, + const CpaCyGenFlatBufCbFunc pEcsm2EncCb, + void *pCallbackTag, + const CpaCyEcsm2EncryptOpData *pEcsm2EncOpData, + CpaCyEcsm2EncryptOutputData *pEcsm2EncOutputData) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2Decrypt(const CpaInstanceHandle instanceHandle_in, + const CpaCyGenFlatBufCbFunc pEcsm2DecCb, + void *pCallbackTag, + const CpaCyEcsm2DecryptOpData *pEcsm2DecOpData, + CpaCyEcsm2DecryptOutputData *pEcsm2DecOutputData) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2KeyExPhase1( + const CpaInstanceHandle instanceHandle_in, + const CpaCyGenFlatBufCbFunc pEcsm2KeyExPhase1Cb, + void *pCallbackTag, + const CpaCyEcsm2KeyExPhase1OpData *pEcsm2KeyExPhase1OpData, + CpaCyEcsm2KeyExOutputData *pEcsm2KeyExPhase1OutputData) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2KeyExPhase2( + const CpaInstanceHandle instanceHandle_in, + const CpaCyGenFlatBufCbFunc pEcsm2KeyExPhase2Cb, + void *pCallbackTag, + const CpaCyEcsm2KeyExPhase2OpData *pEcsm2KeyExPhase2OpData, + CpaCyEcsm2KeyExOutputData *pEcsm2KeyExPhase2OutputData) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyEcsm2QueryStats64(const CpaInstanceHandle instanceHandle_in, + CpaCyEcsm2Stats64 *pEcsm2Stats) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyKptEcdsaSignRS(const CpaInstanceHandle instanceHandle, + const CpaCyEcdsaSignRSCbFunc pCb, + void *pCallbackTag, + const CpaCyKptEcdsaSignRSOpData *pOpData, + CpaBoolean *pSignStatus, + CpaFlatBuffer *pR, + CpaFlatBuffer *pS, + CpaCyKptUnwrapContext *pKptUnwrapContext) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyKptRsaDecrypt(const CpaInstanceHandle instanceHandle, + const CpaCyGenFlatBufCbFunc pRsaDecryptCb, + void *pCallbackTag, + const CpaCyKptRsaDecryptOpData *pDecryptOpData, + CpaFlatBuffer *pOutputData, + CpaCyKptUnwrapContext *pKptUnwrapContext) + +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyKptQueryIssuingKeys(const CpaInstanceHandle instanceHandle_in, + CpaFlatBuffer *pPublicX509IssueCert, + CpaCyKptKeyManagementStatus *pKptStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyKptQueryDeviceCredentials(const CpaInstanceHandle instanceHandle, + CpaCyKptValidationKey *pDevCredential, + CpaCyKptKeyManagementStatus *pKptStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyKptLoadKey(CpaInstanceHandle instanceHandle, + CpaCyKptLoadKey *pSWK, + CpaCyKptHandle *keyHandle, + CpaCyKptKeyManagementStatus *pKptStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + +CpaStatus +cpaCyKptDeleteKey(CpaInstanceHandle instanceHandle, + CpaCyKptHandle keyHandle, + CpaCyKptKeyManagementStatus *pKptStatus) +{ + return CPA_STATUS_UNSUPPORTED; +} + /* Prime */ CpaStatus cpaCyPrimeTest(const CpaInstanceHandle instanceHandle, const CpaCyPrimeTestCbFunc pCb, void *pCallbackTag, const CpaCyPrimeTestOpData *pOpData, CpaBoolean *pTestPassed) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyPrimeQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyPrimeStats64 *pPrimeStats) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyPrimeQueryStats(const CpaInstanceHandle instanceHandle, CpaCyPrimeStats *pPrimeStats) { return CPA_STATUS_UNSUPPORTED; } /* RSA */ CpaStatus cpaCyRsaGenKey(const CpaInstanceHandle instanceHandle, const CpaCyRsaKeyGenCbFunc pRsaKeyGenCb, void *pCallbackTag, const CpaCyRsaKeyGenOpData *pKeyGenOpData, CpaCyRsaPrivateKey *pPrivateKey, CpaCyRsaPublicKey *pPublicKey) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyRsaEncrypt(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pRsaEncryptCb, void *pCallbackTag, const CpaCyRsaEncryptOpData *pEncryptOpData, CpaFlatBuffer *pOutputData) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyRsaDecrypt(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pRsaDecryptCb, void *pCallbackTag, const CpaCyRsaDecryptOpData *pDecryptOpData, CpaFlatBuffer *pOutputData) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyRsaQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyRsaStats64 *pRsaStats) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyRsaQueryStats(const CpaInstanceHandle instanceHandle, CpaCyRsaStats *pRsaStats) { return CPA_STATUS_UNSUPPORTED; } /* Large Number */ CpaStatus cpaCyLnModExp(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pLnModExpCb, void *pCallbackTag, const CpaCyLnModExpOpData *pLnModExpOpData, CpaFlatBuffer *pResult) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyLnModInv(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pLnModInvCb, void *pCallbackTag, const CpaCyLnModInvOpData *pLnModInvOpData, CpaFlatBuffer *pResult) { return CPA_STATUS_UNSUPPORTED; } CpaStatus cpaCyLnStatsQuery64(const CpaInstanceHandle instanceHandle, CpaCyLnStats64 *pLnStats) { return CPA_STATUS_UNSUPPORTED; } /* Dynamic Instance */ CpaStatus icp_adf_putDynInstance(icp_accel_dev_t *accel_dev, adf_service_type_t stype, Cpa32U instance_id) { return CPA_STATUS_FAIL; } CpaStatus icp_sal_CyPollAsymRing(CpaInstanceHandle instanceHandle_in, Cpa32U response_quota) { return CPA_STATUS_UNSUPPORTED; } CpaStatus icp_sal_AsymGetInflightRequests(CpaInstanceHandle instanceHandle, Cpa32U *maxInflightRequests, Cpa32U *numInflightRequests) { return CPA_STATUS_UNSUPPORTED; } CpaStatus icp_sal_AsymPerformOpNow(CpaInstanceHandle instanceHandle) { return CPA_STATUS_UNSUPPORTED; } diff --git a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp.h b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp.h index 855e83905f5c..6893cbedb594 100644 --- a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp.h +++ b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp.h @@ -1,5926 +1,7248 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ + +/* --- (Automatically generated (build v. 2.7), do not modify manually) --- */ + + /** * @file icp_qat_fw_mmp.h * @defgroup icp_qat_fw_mmp ICP QAT FW MMP Processing Definitions * @ingroup icp_qat_fw * $Revision: 0.1 $ * @brief * This file documents the external interfaces that the QAT FW running * on the QAT Acceleration Engine provides to clients wanting to * accelerate crypto assymetric applications */ + #ifndef __ICP_QAT_FW_MMP__ #define __ICP_QAT_FW_MMP__ + /************************************************************************** * Include local header files ************************************************************************** */ + #include "icp_qat_fw.h" + /************************************************************************** * Local constants ************************************************************************** */ -#define ICP_QAT_FW_PKE_INPUT_COUNT_MAX 7 +#define ICP_QAT_FW_PKE_INPUT_COUNT_MAX 7 /**< @ingroup icp_qat_fw_pke * Maximum number of input paramaters in all PKE request */ -#define ICP_QAT_FW_PKE_OUTPUT_COUNT_MAX 5 +#define ICP_QAT_FW_PKE_OUTPUT_COUNT_MAX 5 /**< @ingroup icp_qat_fw_pke * Maximum number of output paramaters in all PKE request */ +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC P384 Variable Point Multiplication [k]P , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_EC_POINT_MULTIPLICATION_P384. + */ +typedef struct icp_qat_fw_mmp_ec_point_multiplication_p384_input_s +{ + uint64_t xp; /**< xP = affine coordinate X of point P (6 qwords)*/ + uint64_t yp; /**< yP = affine coordinate Y of point P (6 qwords)*/ + uint64_t k; /**< k = scalar (6 qwords)*/ +} icp_qat_fw_mmp_ec_point_multiplication_p384_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC P384 Generator Point Multiplication [k]G , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_EC_GENERATOR_MULTIPLICATION_P384. + */ +typedef struct icp_qat_fw_mmp_ec_generator_multiplication_p384_input_s +{ + uint64_t k; /**< k = scalar (6 qwords)*/ +} icp_qat_fw_mmp_ec_generator_multiplication_p384_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC P384 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_ECDSA_SIGN_RS_P384. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s +{ + uint64_t k; /**< k = random value, > 0 and < n (order of G for P384) + (6 qwords)*/ + uint64_t e; /**< (6 qwords)*/ + uint64_t d; /**< (6 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC P256 Variable Point Multiplication [k]P , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_EC_POINT_MULTIPLICATION_P256. + */ +typedef struct icp_qat_fw_mmp_ec_point_multiplication_p256_input_s +{ + uint64_t xp; /**< xP = affine coordinate X of point P (4 qwords)*/ + uint64_t yp; /**< yP = affine coordinate Y of point P (4 qwords)*/ + uint64_t k; /**< k = scalar (4 qwords)*/ +} icp_qat_fw_mmp_ec_point_multiplication_p256_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC P256 Generator Point Multiplication [k]G , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_EC_GENERATOR_MULTIPLICATION_P256. + */ +typedef struct icp_qat_fw_mmp_ec_generator_multiplication_p256_input_s +{ + uint64_t k; /**< k = scalar (4 qwords)*/ +} icp_qat_fw_mmp_ec_generator_multiplication_p256_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC P256 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_ECDSA_SIGN_RS_P256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s +{ + uint64_t k; /**< k = random value, > 0 and < n (order of G for P256) + (4 qwords)*/ + uint64_t e; /**< (4 qwords)*/ + uint64_t d; /**< (4 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC SM2 point multiply [k]G , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_ECSM2_GENERATOR_MULTIPLICATION. + */ +typedef struct icp_qat_fw_mmp_ecsm2_generator_multiplication_input_s +{ + uint64_t k; /**< k = multiplicand (4 qwords)*/ +} icp_qat_fw_mmp_ecsm2_generator_multiplication_input_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Initialisation sequence , * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_INIT. */ -typedef struct icp_qat_fw_mmp_init_input_s { - uint64_t z; /**< zeroed quadword (1 qwords)*/ +typedef struct icp_qat_fw_mmp_init_input_s +{ + uint64_t z; /**< zeroed quadword (1 qwords)*/ } icp_qat_fw_mmp_init_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 768-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_G2_768. + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for 768-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_G2_768. */ -typedef struct icp_qat_fw_mmp_dh_g2_768_input_s { - uint64_t e; /**< exponent > 0 and < 2^768 (12 qwords)*/ - uint64_t m; /**< modulus ≥ 2^767 and < 2^768 (12 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_768_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^768 (12 qwords)*/ + uint64_t m; /**< modulus ≥ 2^767 and < 2^768 (12 qwords)*/ } icp_qat_fw_mmp_dh_g2_768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation for 768-bit - * numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_768. + * Input parameter list for Diffie-Hellman Modular exponentiation for 768-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_768. */ -typedef struct icp_qat_fw_mmp_dh_768_input_s { - uint64_t g; /**< base ≥ 0 and < 2^768 (12 qwords)*/ - uint64_t e; /**< exponent > 0 and < 2^768 (12 qwords)*/ - uint64_t m; /**< modulus ≥ 2^767 and < 2^768 (12 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_768_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^768 (12 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^768 (12 qwords)*/ + uint64_t m; /**< modulus ≥ 2^767 and < 2^768 (12 qwords)*/ } icp_qat_fw_mmp_dh_768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 1024-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_G2_1024. + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for 1024-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_G2_1024. */ -typedef struct icp_qat_fw_mmp_dh_g2_1024_input_s { - uint64_t e; /**< exponent > 0 and < 2^1024 (16 qwords)*/ - uint64_t m; /**< modulus ≥ 2^1023 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_1024_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^1024 (16 qwords)*/ + uint64_t m; /**< modulus ≥ 2^1023 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_dh_g2_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation for - * 1024-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_1024. + * Input parameter list for Diffie-Hellman Modular exponentiation for 1024-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_1024. */ -typedef struct icp_qat_fw_mmp_dh_1024_input_s { - uint64_t g; /**< base ≥ 0 and < 2^1024 (16 qwords)*/ - uint64_t e; /**< exponent > 0 and < 2^1024 (16 qwords)*/ - uint64_t m; /**< modulus ≥ 2^1023 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_1024_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^1024 (16 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^1024 (16 qwords)*/ + uint64_t m; /**< modulus ≥ 2^1023 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_dh_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 1536-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_G2_1536. + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for 1536-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_G2_1536. */ -typedef struct icp_qat_fw_mmp_dh_g2_1536_input_s { - uint64_t e; /**< exponent > 0 and < 2^1536 (24 qwords)*/ - uint64_t m; /**< modulus ≥ 2^1535 and < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_1536_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^1536 (24 qwords)*/ + uint64_t m; /**< modulus ≥ 2^1535 and < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_dh_g2_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation for - * 1536-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_1536. + * Input parameter list for Diffie-Hellman Modular exponentiation for 1536-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_1536. */ -typedef struct icp_qat_fw_mmp_dh_1536_input_s { - uint64_t g; /**< base ≥ 0 and < 2^1536 (24 qwords)*/ - uint64_t e; /**< exponent > 0 and < 2^1536 (24 qwords)*/ - uint64_t m; /**< modulus ≥ 2^1535 and < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_1536_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^1536 (24 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^1536 (24 qwords)*/ + uint64_t m; /**< modulus ≥ 2^1535 and < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_dh_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 2048-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_G2_2048. + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for 2048-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_G2_2048. */ -typedef struct icp_qat_fw_mmp_dh_g2_2048_input_s { - uint64_t e; /**< exponent > 0 and < 2^2048 (32 qwords)*/ - uint64_t m; /**< modulus ≥ 2^2047 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_2048_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^2048 (32 qwords)*/ + uint64_t m; /**< modulus ≥ 2^2047 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_dh_g2_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation for - * 2048-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_2048. + * Input parameter list for Diffie-Hellman Modular exponentiation for 2048-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_2048. */ -typedef struct icp_qat_fw_mmp_dh_2048_input_s { - uint64_t g; /**< base ≥ 0 and < 2^2048 (32 qwords)*/ - uint64_t e; /**< exponent > 0 and < 2^2048 (32 qwords)*/ - uint64_t m; /**< modulus ≥ 2^2047 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_2048_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^2048 (32 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^2048 (32 qwords)*/ + uint64_t m; /**< modulus ≥ 2^2047 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_dh_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 3072-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_G2_3072. + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for 3072-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_G2_3072. */ -typedef struct icp_qat_fw_mmp_dh_g2_3072_input_s { - uint64_t e; /**< exponent > 0 and < 2^3072 (48 qwords)*/ - uint64_t m; /**< modulus ≥ 2^3071 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_3072_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^3072 (48 qwords)*/ + uint64_t m; /**< modulus ≥ 2^3071 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_dh_g2_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation for - * 3072-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_3072. + * Input parameter list for Diffie-Hellman Modular exponentiation for 3072-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_3072. */ -typedef struct icp_qat_fw_mmp_dh_3072_input_s { - uint64_t g; /**< base ≥ 0 and < 2^3072 (48 qwords)*/ - uint64_t e; /**< exponent > 0 and < 2^3072 (48 qwords)*/ - uint64_t m; /**< modulus ≥ 2^3071 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_3072_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^3072 (48 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^3072 (48 qwords)*/ + uint64_t m; /**< modulus ≥ 2^3071 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_dh_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 4096-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_G2_4096. + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for 4096-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_G2_4096. */ -typedef struct icp_qat_fw_mmp_dh_g2_4096_input_s { - uint64_t e; /**< exponent > 0 and < 2^4096 (64 qwords)*/ - uint64_t m; /**< modulus ≥ 2^4095 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_4096_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^4096 (64 qwords)*/ + uint64_t m; /**< modulus ≥ 2^4095 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_dh_g2_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Diffie-Hellman Modular exponentiation for - * 4096-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DH_4096. + * Input parameter list for Diffie-Hellman Modular exponentiation for 4096-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DH_4096. */ -typedef struct icp_qat_fw_mmp_dh_4096_input_s { - uint64_t g; /**< base ≥ 0 and < 2^4096 (64 qwords)*/ - uint64_t e; /**< exponent > 0 and < 2^4096 (64 qwords)*/ - uint64_t m; /**< modulus ≥ 2^4095 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_dh_4096_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^4096 (64 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^4096 (64 qwords)*/ + uint64_t m; /**< modulus ≥ 2^4095 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_dh_4096_input_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for Diffie-Hellman Modular exponentiation base 2 for + * 8192-bit numbers , to be used when icp_qat_fw_pke_request_s::functionalityId + * is #PKE_DH_G2_8192. + */ +typedef struct icp_qat_fw_mmp_dh_g2_8192_input_s +{ + uint64_t e; /**< exponent > 0 and < 2^8192 (128 qwords)*/ + uint64_t m; /**< modulus ≥ 2^8191 and < 2^8192 (128 qwords)*/ +} icp_qat_fw_mmp_dh_g2_8192_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for Diffie-Hellman Modular exponentiation for + * 8192-bit numbers , to be used when icp_qat_fw_pke_request_s::functionalityId + * is #PKE_DH_8192. + */ +typedef struct icp_qat_fw_mmp_dh_8192_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^8192 (128 qwords)*/ + uint64_t e; /**< exponent > 0 and < 2^8192 (128 qwords)*/ + uint64_t m; /**< modulus ≥ 2^8191 and < 2^8192 (128 qwords)*/ +} icp_qat_fw_mmp_dh_8192_input_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 512 key generation first form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP1_512. - */ -typedef struct icp_qat_fw_mmp_rsa_kp1_512_input_s { - uint64_t - p; /**< RSA parameter, prime,  2 < p < 2^256 (4 qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2 < q < 2^256 (4 qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (8 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP1_512. + */ +typedef struct icp_qat_fw_mmp_rsa_kp1_512_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2 < p < 2^256 (4 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2 < q < 2^256 (4 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (8 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 512 key generation second form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP2_512. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_512_input_s { - uint64_t - p; /**< RSA parameter, prime,  2^255 < p < 2^256 (4 - qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2^255 < q < 2^256 (4 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (8 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP2_512. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_512_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2^255 < p < 2^256 (4 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^255 < q < 2^256 (4 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (8 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 512 Encryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_EP_512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_EP_512. */ -typedef struct icp_qat_fw_mmp_rsa_ep_512_input_s { - uint64_t m; /**< message representative, < n (8 qwords)*/ - uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (8 qwords)*/ - uint64_t n; /**< RSA key, > 0 and < 2^256 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_512_input_s +{ + uint64_t m; /**< message representative, < n (8 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (8 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^256 (8 qwords)*/ } icp_qat_fw_mmp_rsa_ep_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 512 Decryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP1_512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP1_512. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_512_input_s { - uint64_t c; /**< cipher text representative, < n (8 qwords)*/ - uint64_t d; /**< RSA private key (RSADP first form) (8 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^256 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_512_input_s +{ + uint64_t c; /**< cipher text representative, < n (8 qwords)*/ + uint64_t d; /**< RSA private key (RSADP first form) (8 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^256 (8 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1024 Decryption with CRT , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP2_512. - */ -typedef struct icp_qat_fw_mmp_rsa_dp2_512_input_s { - uint64_t c; /**< cipher text representative, < (p*q) (8 qwords)*/ - uint64_t - p; /**< RSA parameter, prime,  2^255 < p < 2^256 (4 - qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2^255 < q < 2^256 (4 - qwords)*/ - uint64_t dp; /**< RSA private key, 0 < dp < p-1 (4 qwords)*/ - uint64_t dq; /**< RSA private key 0 < dq < q-1 (4 qwords)*/ - uint64_t qinv; /**< RSA private key 0 < qInv < p (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP2_512. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_512_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (8 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^255 < p < 2^256 (4 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^255 < q < 2^256 (4 qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (4 qwords)*/ + uint64_t dq; /**< RSA private key 0 < dq < q-1 (4 qwords)*/ + uint64_t qinv; /**< RSA private key 0 < qInv < p (4 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1024 key generation first form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP1_1024. - */ -typedef struct icp_qat_fw_mmp_rsa_kp1_1024_input_s { - uint64_t - p; /**< RSA parameter, prime,  2 < p < 2^512 (8 qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2 < q < 2^512 (8 qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (16 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP1_1024. + */ +typedef struct icp_qat_fw_mmp_rsa_kp1_1024_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2 < p < 2^512 (8 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2 < q < 2^512 (8 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (16 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1024 key generation second form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP2_1024. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_1024_input_s { - uint64_t - p; /**< RSA parameter, prime,  2^511 < p < 2^512 (8 - qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2^511 < q < 2^512 (8 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (16 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP2_1024. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_1024_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2^511 < p < 2^512 (8 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^511 < q < 2^512 (8 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (16 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1024 Encryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_EP_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_EP_1024. */ -typedef struct icp_qat_fw_mmp_rsa_ep_1024_input_s { - uint64_t m; /**< message representative, < n (16 qwords)*/ - uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (16 qwords)*/ - uint64_t n; /**< RSA key, > 0 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_1024_input_s +{ + uint64_t m; /**< message representative, < n (16 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (16 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_rsa_ep_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1024 Decryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP1_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP1_1024. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_1024_input_s { - uint64_t c; /**< cipher text representative, < n (16 qwords)*/ - uint64_t d; /**< RSA private key (RSADP first form) (16 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_1024_input_s +{ + uint64_t c; /**< cipher text representative, < n (16 qwords)*/ + uint64_t d; /**< RSA private key (RSADP first form) (16 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1024 Decryption with CRT , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP2_1024. - */ -typedef struct icp_qat_fw_mmp_rsa_dp2_1024_input_s { - uint64_t c; /**< cipher text representative, < (p*q) (16 qwords)*/ - uint64_t - p; /**< RSA parameter, prime,  2^511 < p < 2^512 (8 - qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2^511 < q < 2^512 (8 - qwords)*/ - uint64_t dp; /**< RSA private key, 0 < dp < p-1 (8 qwords)*/ - uint64_t dq; /**< RSA private key 0 < dq < q-1 (8 qwords)*/ - uint64_t qinv; /**< RSA private key 0 < qInv < p (8 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP2_1024. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_1024_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (16 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^511 < p < 2^512 (8 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^511 < q < 2^512 (8 qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (8 qwords)*/ + uint64_t dq; /**< RSA private key 0 < dq < q-1 (8 qwords)*/ + uint64_t qinv; /**< RSA private key 0 < qInv < p (8 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1536 key generation first form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP1_1536. - */ -typedef struct icp_qat_fw_mmp_rsa_kp1_1536_input_s { - uint64_t p; /**< RSA parameter, prime,  2 < p < 2^768 (12 - qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2 < q < 2^768 (12 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (24 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP1_1536. + */ +typedef struct icp_qat_fw_mmp_rsa_kp1_1536_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2 < p < 2^768 (12 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2 < q < 2^768 (12 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (24 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1536 key generation second form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP2_1536. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_1536_input_s { - uint64_t - p; /**< RSA parameter, prime,  2^767 < p < 2^768 (12 - qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2^767 < q < 2^768 (12 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (24 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP2_1536. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_1536_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2^767 < p < 2^768 (12 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^767 < q < 2^768 (12 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (24 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1536 Encryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_EP_1536. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_EP_1536. */ -typedef struct icp_qat_fw_mmp_rsa_ep_1536_input_s { - uint64_t m; /**< message representative, < n (24 qwords)*/ - uint64_t e; /**< RSA public key, ≥ 3 and ≤ (p*q)-1 (24 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_1536_input_s +{ + uint64_t m; /**< message representative, < n (24 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ (p*q)-1 (24 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_rsa_ep_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1536 Decryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP1_1536. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP1_1536. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_1536_input_s { - uint64_t c; /**< cipher text representative, < n (24 qwords)*/ - uint64_t d; /**< RSA private key (24 qwords)*/ - uint64_t n; /**< RSA key, > 0 and < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_1536_input_s +{ + uint64_t c; /**< cipher text representative, < n (24 qwords)*/ + uint64_t d; /**< RSA private key (24 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 1536 Decryption with CRT , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP2_1536. - */ -typedef struct icp_qat_fw_mmp_rsa_dp2_1536_input_s { - uint64_t c; /**< cipher text representative, < (p*q) (24 qwords)*/ - uint64_t - p; /**< RSA parameter, prime,  2^767 < p < 2^768 (12 - qwords)*/ - uint64_t - q; /**< RSA parameter, prime,  2^767 < p < 2^768 (12 - qwords)*/ - uint64_t dp; /**< RSA private key, 0 < dp < p-1 (12 qwords)*/ - uint64_t dq; /**< RSA private key, 0 < dq < q-1 (12 qwords)*/ - uint64_t qinv; /**< RSA private key, 0 < qInv < p (12 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP2_1536. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_1536_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (24 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^767 < p < 2^768 (12 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^767 < p < 2^768 (12 qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (12 qwords)*/ + uint64_t dq; /**< RSA private key, 0 < dq < q-1 (12 qwords)*/ + uint64_t qinv; /**< RSA private key, 0 < qInv < p (12 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 2048 key generation first form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP1_2048. - */ -typedef struct icp_qat_fw_mmp_rsa_kp1_2048_input_s { - uint64_t p; /**< RSA parameter, prime,  2 < p < 2^1024 (16 - qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2 < q < 2^1024 (16 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP1_2048. + */ +typedef struct icp_qat_fw_mmp_rsa_kp1_2048_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2 < p < 2^1024 (16 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2 < q < 2^1024 (16 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (32 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 2048 key generation second form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP2_2048. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_2048_input_s { - uint64_t p; /**< RSA parameter, prime,  2^1023 < p < 2^1024 - (16 qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2^1023 < q < 2^1024 - (16 qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP2_2048. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_2048_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2^1023 < p < 2^1024 (16 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^1023 < q < 2^1024 (16 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (32 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 2048 Encryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_EP_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_EP_2048. */ -typedef struct icp_qat_fw_mmp_rsa_ep_2048_input_s { - uint64_t m; /**< message representative, < n (32 qwords)*/ - uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (32 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_2048_input_s +{ + uint64_t m; /**< message representative, < n (32 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (32 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_rsa_ep_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 2048 Decryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP1_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP1_2048. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_2048_input_s { - uint64_t c; /**< cipher text representative, < n (32 qwords)*/ - uint64_t d; /**< RSA private key (32 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_2048_input_s +{ + uint64_t c; /**< cipher text representative, < n (32 qwords)*/ + uint64_t d; /**< RSA private key (32 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 2048 Decryption with CRT , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP2_2048. - */ -typedef struct icp_qat_fw_mmp_rsa_dp2_2048_input_s { - uint64_t c; /**< cipher text representative, < (p*q) (32 qwords)*/ - uint64_t p; /**< RSA parameter, prime,  2^1023 < p < 2^1024 - (16 qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2^1023 < q < 2^1024 - (16 qwords)*/ - uint64_t dp; /**< RSA private key, 0 < dp < p-1 (16 qwords)*/ - uint64_t dq; /**< RSA private key, 0 < dq < q-1 (16 qwords)*/ - uint64_t qinv; /**< RSA private key, 0 < qInv < p (16 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP2_2048. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_2048_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (32 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^1023 < p < 2^1024 (16 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^1023 < q < 2^1024 (16 qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (16 qwords)*/ + uint64_t dq; /**< RSA private key, 0 < dq < q-1 (16 qwords)*/ + uint64_t qinv; /**< RSA private key, 0 < qInv < p (16 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 3072 key generation first form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP1_3072. - */ -typedef struct icp_qat_fw_mmp_rsa_kp1_3072_input_s { - uint64_t p; /**< RSA parameter, prime,  2 < p < 2^1536 (24 - qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2 < q < 2^1536 (24 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (48 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP1_3072. + */ +typedef struct icp_qat_fw_mmp_rsa_kp1_3072_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2 < p < 2^1536 (24 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2 < q < 2^1536 (24 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (48 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 3072 key generation second form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP2_3072. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_3072_input_s { - uint64_t p; /**< RSA parameter, prime,  2^1535 < p < 2^1536 - (24 qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2^1535 < q < 2^1536 - (24 qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (48 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP2_3072. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_3072_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2^1535 < p < 2^1536 (24 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^1535 < q < 2^1536 (24 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (48 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 3072 Encryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_EP_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_EP_3072. */ -typedef struct icp_qat_fw_mmp_rsa_ep_3072_input_s { - uint64_t m; /**< message representative, < n (48 qwords)*/ - uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (48 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_3072_input_s +{ + uint64_t m; /**< message representative, < n (48 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (48 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_rsa_ep_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 3072 Decryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP1_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP1_3072. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_3072_input_s { - uint64_t c; /**< cipher text representative, < n (48 qwords)*/ - uint64_t d; /**< RSA private key (48 qwords)*/ - uint64_t n; /**< RSA key > 0 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_3072_input_s +{ + uint64_t c; /**< cipher text representative, < n (48 qwords)*/ + uint64_t d; /**< RSA private key (48 qwords)*/ + uint64_t n; /**< RSA key > 0 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 3072 Decryption with CRT , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP2_3072. - */ -typedef struct icp_qat_fw_mmp_rsa_dp2_3072_input_s { - uint64_t c; /**< cipher text representative, < (p*q) (48 qwords)*/ - uint64_t p; /**< RSA parameter, prime,  2^1535 < p < 2^1536 - (24 qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2^1535 < q < 2^1536 - (24 qwords)*/ - uint64_t dp; /**< RSA private key, 0 < dp < p-1 (24 qwords)*/ - uint64_t dq; /**< RSA private key, 0 < dq < q-1 (24 qwords)*/ - uint64_t qinv; /**< RSA private key, 0 < qInv < p (24 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP2_3072. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_3072_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (48 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^1535 < p < 2^1536 (24 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^1535 < q < 2^1536 (24 qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (24 qwords)*/ + uint64_t dq; /**< RSA private key, 0 < dq < q-1 (24 qwords)*/ + uint64_t qinv; /**< RSA private key, 0 < qInv < p (24 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 4096 key generation first form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP1_4096. - */ -typedef struct icp_qat_fw_mmp_rsa_kp1_4096_input_s { - uint64_t p; /**< RSA parameter, prime,  2 < p < 2^2048 (32 - qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2 < q < 2^2048 (32 - qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (64 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP1_4096. + */ +typedef struct icp_qat_fw_mmp_rsa_kp1_4096_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2 < p < 2^2048 (32 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2 < q < 2^2048 (32 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (64 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 4096 key generation second form , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_KP2_4096. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_4096_input_s { - uint64_t p; /**< RSA parameter, prime,  2^2047 < p < 2^2048 - (32 qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2^2047 < q < 2^2048 - (32 qwords)*/ - uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1, -  with GCD(e, p-1, q-1) = 1 (64 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_KP2_4096. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_4096_input_s +{ + uint64_t p; /**< RSA parameter, prime,  2^2047 < p < 2^2048 (32 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^2047 < q < 2^2048 (32 qwords)*/ + uint64_t e; /**< RSA public key, must be odd, ≥ 3 and ≤ (p*q)-1,  with GCD(e, p-1, q-1) = 1 (64 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 4096 Encryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_EP_4096. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_EP_4096. */ -typedef struct icp_qat_fw_mmp_rsa_ep_4096_input_s { - uint64_t m; /**< message representative, < n (64 qwords)*/ - uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (64 qwords)*/ - uint64_t n; /**< RSA key, > 0 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_4096_input_s +{ + uint64_t m; /**< message representative, < n (64 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (64 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_rsa_ep_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 4096 Decryption , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP1_4096. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP1_4096. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_4096_input_s { - uint64_t c; /**< cipher text representative, < n (64 qwords)*/ - uint64_t d; /**< RSA private key (64 qwords)*/ - uint64_t n; /**< RSA key, > 0 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_4096_input_s +{ + uint64_t c; /**< cipher text representative, < n (64 qwords)*/ + uint64_t d; /**< RSA private key (64 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for RSA 4096 Decryption with CRT , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_RSA_DP2_4096. - */ -typedef struct icp_qat_fw_mmp_rsa_dp2_4096_input_s { - uint64_t c; /**< cipher text representative, < (p*q) (64 qwords)*/ - uint64_t p; /**< RSA parameter, prime,  2^2047 < p < 2^2048 - (32 qwords)*/ - uint64_t q; /**< RSA parameter, prime,  2^2047 < q < 2^2048 - (32 qwords)*/ - uint64_t dp; /**< RSA private key, 0 < dp < p-1 (32 qwords)*/ - uint64_t dq; /**< RSA private key, 0 < dq < q-1 (32 qwords)*/ - uint64_t qinv; /**< RSA private key, 0 < qInv < p (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_RSA_DP2_4096. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_4096_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (64 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^2047 < p < 2^2048 (32 qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^2047 < q < 2^2048 (32 qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (32 qwords)*/ + uint64_t dq; /**< RSA private key, 0 < dq < q-1 (32 qwords)*/ + uint64_t qinv; /**< RSA private key, 0 < qInv < p (32 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_4096_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for GCD primality test for 192-bit numbers , + * Input parameter list for RSA 8192 Encryption , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_RSA_EP_8192. + */ +typedef struct icp_qat_fw_mmp_rsa_ep_8192_input_s +{ + uint64_t m; /**< message representative, < n (128 qwords)*/ + uint64_t e; /**< RSA public key, ≥ 3 and ≤ n-1 (128 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^8192 (128 qwords)*/ +} icp_qat_fw_mmp_rsa_ep_8192_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for RSA 8192 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_192. + * #PKE_RSA_DP1_8192. + */ +typedef struct icp_qat_fw_mmp_rsa_dp1_8192_input_s +{ + uint64_t c; /**< cipher text representative, < n (128 qwords)*/ + uint64_t d; /**< RSA private key (128 qwords)*/ + uint64_t n; /**< RSA key, > 0 and < 2^8192 (128 qwords)*/ +} icp_qat_fw_mmp_rsa_dp1_8192_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for RSA 8192 Decryption with CRT , + * to be used when icp_qat_fw_pke_request_s::functionalityId is + * #PKE_RSA_DP2_8192. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_8192_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (128 qwords)*/ + uint64_t p; /**< RSA parameter, prime,  2^4095 < p < 2^4096 (64 + qwords)*/ + uint64_t q; /**< RSA parameter, prime,  2^4095 < q < 2^4096 (64 + qwords)*/ + uint64_t dp; /**< RSA private key, 0 < dp < p-1 (64 qwords)*/ + uint64_t dq; /**< RSA private key, 0 < dq < q-1 (64 qwords)*/ + uint64_t qinv; /**< RSA private key, 0 < qInv < p (64 qwords)*/ +} icp_qat_fw_mmp_rsa_dp2_8192_input_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for GCD primality test for 192-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_192. */ -typedef struct icp_qat_fw_mmp_gcd_pt_192_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^192 (3 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_192_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^192 (3 qwords)*/ } icp_qat_fw_mmp_gcd_pt_192_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 256-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_256. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_256. */ -typedef struct icp_qat_fw_mmp_gcd_pt_256_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^256 (4 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_256_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^256 (4 qwords)*/ } icp_qat_fw_mmp_gcd_pt_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 384-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_384. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_384. */ -typedef struct icp_qat_fw_mmp_gcd_pt_384_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^384 (6 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_384_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^384 (6 qwords)*/ } icp_qat_fw_mmp_gcd_pt_384_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_512. */ -typedef struct icp_qat_fw_mmp_gcd_pt_512_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_512_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_gcd_pt_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_768. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_768. */ -typedef struct icp_qat_fw_mmp_gcd_pt_768_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^768 (12 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_768_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^768 (12 qwords)*/ } icp_qat_fw_mmp_gcd_pt_768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 1024-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_1024. */ -typedef struct icp_qat_fw_mmp_gcd_pt_1024_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_1024_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_gcd_pt_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 1536-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_1536. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_1536. */ -typedef struct icp_qat_fw_mmp_gcd_pt_1536_input_s { - uint64_t m; /**< (24 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_1536_input_s +{ + uint64_t m; /**< (24 qwords)*/ } icp_qat_fw_mmp_gcd_pt_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 2048-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_2048. */ -typedef struct icp_qat_fw_mmp_gcd_pt_2048_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_2048_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_gcd_pt_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 3072-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_3072. */ -typedef struct icp_qat_fw_mmp_gcd_pt_3072_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_3072_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_gcd_pt_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for GCD primality test for 4096-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_GCD_PT_4096. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_GCD_PT_4096. */ -typedef struct icp_qat_fw_mmp_gcd_pt_4096_input_s { - uint64_t m; /**< prime candidate > 1 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_gcd_pt_4096_input_s +{ + uint64_t m; /**< prime candidate > 1 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_gcd_pt_4096_input_t; -/** + + +/** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 160-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_160. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_160. */ -typedef struct icp_qat_fw_mmp_fermat_pt_160_input_s { - uint64_t m; /**< prime candidate, 2^159 < m < 2^160 (3 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_160_input_s +{ + uint64_t m; /**< prime candidate, 2^159 < m < 2^160 (3 qwords)*/ } icp_qat_fw_mmp_fermat_pt_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_512. */ -typedef struct icp_qat_fw_mmp_fermat_pt_512_input_s { - uint64_t m; /**< prime candidate, 2^511 < m < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_512_input_s +{ + uint64_t m; /**< prime candidate, 2^511 < m < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_fermat_pt_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for <e; 512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_L512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_L512. */ -typedef struct icp_qat_fw_mmp_fermat_pt_l512_input_s { - uint64_t m; /**< prime candidate, 5 < m < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_l512_input_s +{ + uint64_t m; /**< prime candidate, 5 < m < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_fermat_pt_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_768. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_768. */ -typedef struct icp_qat_fw_mmp_fermat_pt_768_input_s { - uint64_t m; /**< prime candidate, 2^767 < m < 2^768 (12 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_768_input_s +{ + uint64_t m; /**< prime candidate, 2^767 < m < 2^768 (12 qwords)*/ } icp_qat_fw_mmp_fermat_pt_768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 1024-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_1024. */ -typedef struct icp_qat_fw_mmp_fermat_pt_1024_input_s { - uint64_t - m; /**< prime candidate, 2^1023 < m < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_1024_input_s +{ + uint64_t m; /**< prime candidate, 2^1023 < m < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_fermat_pt_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 1536-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_1536. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_1536. */ -typedef struct icp_qat_fw_mmp_fermat_pt_1536_input_s { - uint64_t - m; /**< prime candidate, 2^1535 < m < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_1536_input_s +{ + uint64_t m; /**< prime candidate, 2^1535 < m < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_fermat_pt_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 2048-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_2048. */ -typedef struct icp_qat_fw_mmp_fermat_pt_2048_input_s { - uint64_t - m; /**< prime candidate, 2^2047 < m < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_2048_input_s +{ + uint64_t m; /**< prime candidate, 2^2047 < m < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_fermat_pt_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 3072-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_3072. */ -typedef struct icp_qat_fw_mmp_fermat_pt_3072_input_s { - uint64_t - m; /**< prime candidate, 2^3071 < m < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_3072_input_s +{ + uint64_t m; /**< prime candidate, 2^3071 < m < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_fermat_pt_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Fermat primality test for 4096-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_FERMAT_PT_4096. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_FERMAT_PT_4096. */ -typedef struct icp_qat_fw_mmp_fermat_pt_4096_input_s { - uint64_t - m; /**< prime candidate, 2^4095 < m < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_fermat_pt_4096_input_s +{ + uint64_t m; /**< prime candidate, 2^4095 < m < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_fermat_pt_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Miller-Rabin primality test for 160-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_160. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_160. */ -typedef struct icp_qat_fw_mmp_mr_pt_160_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (3 qwords)*/ - uint64_t m; /**< prime candidate > 2^159 and < 2^160 (3 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_160_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (3 qwords)*/ + uint64_t m; /**< prime candidate > 2^159 and < 2^160 (3 qwords)*/ } icp_qat_fw_mmp_mr_pt_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Miller-Rabin primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_512. */ -typedef struct icp_qat_fw_mmp_mr_pt_512_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (8 qwords)*/ - uint64_t m; /**< prime candidate > 2^511 and < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_512_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (8 qwords)*/ + uint64_t m; /**< prime candidate > 2^511 and < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_mr_pt_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Miller-Rabin primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_768. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_768. */ -typedef struct icp_qat_fw_mmp_mr_pt_768_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (12 qwords)*/ - uint64_t m; /**< prime candidate > 2^767 and < 2^768 (12 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_768_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (12 qwords)*/ + uint64_t m; /**< prime candidate > 2^767 and < 2^768 (12 qwords)*/ } icp_qat_fw_mmp_mr_pt_768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Miller-Rabin primality test for 1024-bit numbers - * , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_1024. + * Input parameter list for Miller-Rabin primality test for 1024-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_1024. */ -typedef struct icp_qat_fw_mmp_mr_pt_1024_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (16 qwords)*/ - uint64_t - m; /**< prime candidate > 2^1023 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_1024_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (16 qwords)*/ + uint64_t m; /**< prime candidate > 2^1023 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_mr_pt_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Miller-Rabin primality test for 1536-bit numbers - * , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_1536. + * Input parameter list for Miller-Rabin primality test for 1536-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_1536. */ -typedef struct icp_qat_fw_mmp_mr_pt_1536_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (24 qwords)*/ - uint64_t - m; /**< prime candidate > 2^1535 and < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_1536_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (24 qwords)*/ + uint64_t m; /**< prime candidate > 2^1535 and < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_mr_pt_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Miller-Rabin primality test for 2048-bit numbers - * , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_2048. + * Input parameter list for Miller-Rabin primality test for 2048-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_2048. */ -typedef struct icp_qat_fw_mmp_mr_pt_2048_input_s { - uint64_t x; /**< randomness > 1 and <m-1 (32 qwords)*/ - uint64_t - m; /**< prime candidate > 2^2047 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_2048_input_s +{ + uint64_t x; /**< randomness > 1 and <m-1 (32 qwords)*/ + uint64_t m; /**< prime candidate > 2^2047 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_mr_pt_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Miller-Rabin primality test for 3072-bit numbers - * , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_3072. + * Input parameter list for Miller-Rabin primality test for 3072-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_3072. */ -typedef struct icp_qat_fw_mmp_mr_pt_3072_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (48 qwords)*/ - uint64_t - m; /**< prime candidate > 2^3071 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_3072_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (48 qwords)*/ + uint64_t m; /**< prime candidate > 2^3071 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_mr_pt_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Miller-Rabin primality test for 4096-bit numbers - * , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_4096. + * Input parameter list for Miller-Rabin primality test for 4096-bit numbers , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_4096. */ -typedef struct icp_qat_fw_mmp_mr_pt_4096_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (64 qwords)*/ - uint64_t - m; /**< prime candidate > 2^4095 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_4096_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (64 qwords)*/ + uint64_t m; /**< prime candidate > 2^4095 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_mr_pt_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Miller-Rabin primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_MR_PT_L512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_MR_PT_L512. */ -typedef struct icp_qat_fw_mmp_mr_pt_l512_input_s { - uint64_t x; /**< randomness > 1 and < m-1 (8 qwords)*/ - uint64_t m; /**< prime candidate > 1 and < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_mr_pt_l512_input_s +{ + uint64_t x; /**< randomness > 1 and < m-1 (8 qwords)*/ + uint64_t m; /**< prime candidate > 1 and < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_mr_pt_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 160-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_160. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_160. */ -typedef struct icp_qat_fw_mmp_lucas_pt_160_input_s { - uint64_t - m; /**< odd prime candidate > 2^159 and < 2^160 (3 qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_160_input_s +{ + uint64_t m; /**< odd prime candidate > 2^159 and < 2^160 (3 qwords)*/ } icp_qat_fw_mmp_lucas_pt_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_512. */ -typedef struct icp_qat_fw_mmp_lucas_pt_512_input_s { - uint64_t - m; /**< odd prime candidate > 2^511 and < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_512_input_s +{ + uint64_t m; /**< odd prime candidate > 2^511 and < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_lucas_pt_512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_768. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_768. */ -typedef struct icp_qat_fw_mmp_lucas_pt_768_input_s { - uint64_t - m; /**< odd prime candidate > 2^767 and < 2^768 (12 qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_768_input_s +{ + uint64_t m; /**< odd prime candidate > 2^767 and < 2^768 (12 qwords)*/ } icp_qat_fw_mmp_lucas_pt_768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 1024-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_1024. */ -typedef struct icp_qat_fw_mmp_lucas_pt_1024_input_s { - uint64_t m; /**< odd prime candidate > 2^1023 and < 2^1024 (16 - qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_1024_input_s +{ + uint64_t m; /**< odd prime candidate > 2^1023 and < 2^1024 (16 qwords)*/ } icp_qat_fw_mmp_lucas_pt_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 1536-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_1536. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_1536. */ -typedef struct icp_qat_fw_mmp_lucas_pt_1536_input_s { - uint64_t m; /**< odd prime candidate > 2^1535 and < 2^1536 (24 - qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_1536_input_s +{ + uint64_t m; /**< odd prime candidate > 2^1535 and < 2^1536 (24 qwords)*/ } icp_qat_fw_mmp_lucas_pt_1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 2048-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_2048. */ -typedef struct icp_qat_fw_mmp_lucas_pt_2048_input_s { - uint64_t m; /**< odd prime candidate > 2^2047 and < 2^2048 (32 - qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_2048_input_s +{ + uint64_t m; /**< odd prime candidate > 2^2047 and < 2^2048 (32 qwords)*/ } icp_qat_fw_mmp_lucas_pt_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 3072-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_3072. */ -typedef struct icp_qat_fw_mmp_lucas_pt_3072_input_s { - uint64_t m; /**< odd prime candidate > 2^3071 and < 2^3072 (48 - qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_3072_input_s +{ + uint64_t m; /**< odd prime candidate > 2^3071 and < 2^3072 (48 qwords)*/ } icp_qat_fw_mmp_lucas_pt_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for 4096-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_4096. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_4096. */ -typedef struct icp_qat_fw_mmp_lucas_pt_4096_input_s { - uint64_t m; /**< odd prime candidate > 2^4096 and < 2^4096 (64 - qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_4096_input_s +{ + uint64_t m; /**< odd prime candidate > 2^4096 and < 2^4096 (64 qwords)*/ } icp_qat_fw_mmp_lucas_pt_4096_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Lucas primality test for L512-bit numbers , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_LUCAS_PT_L512. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_LUCAS_PT_L512. */ -typedef struct icp_qat_fw_mmp_lucas_pt_l512_input_s { - uint64_t m; /**< odd prime candidate > 5 and < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_mmp_lucas_pt_l512_input_s +{ + uint64_t m; /**< odd prime candidate > 5 and < 2^512 (8 qwords)*/ } icp_qat_fw_mmp_lucas_pt_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 512-bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L512. + * Input parameter list for Modular exponentiation for numbers less than 512-bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L512. */ -typedef struct icp_qat_fw_maths_modexp_l512_input_s { - uint64_t g; /**< base ≥ 0 and < 2^512 (8 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^512 (8 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^512 (8 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l512_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^512 (8 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^512 (8 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^512 (8 qwords)*/ } icp_qat_fw_maths_modexp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 1024-bit , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L1024. + * Input parameter list for Modular exponentiation for numbers less than 1024-bit , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L1024. */ -typedef struct icp_qat_fw_maths_modexp_l1024_input_s { - uint64_t g; /**< base ≥ 0 and < 2^1024 (16 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^1024 (16 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^1024 (16 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l1024_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^1024 (16 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^1024 (16 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^1024 (16 qwords)*/ } icp_qat_fw_maths_modexp_l1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 1536-bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L1536. + * Input parameter list for Modular exponentiation for numbers less than 1536-bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L1536. */ -typedef struct icp_qat_fw_maths_modexp_l1536_input_s { - uint64_t g; /**< base ≥ 0 and < 2^1536 (24 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^1536 (24 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^1536 (24 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l1536_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^1536 (24 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^1536 (24 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^1536 (24 qwords)*/ } icp_qat_fw_maths_modexp_l1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 2048-bit , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L2048. + * Input parameter list for Modular exponentiation for numbers less than 2048-bit , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L2048. */ -typedef struct icp_qat_fw_maths_modexp_l2048_input_s { - uint64_t g; /**< base ≥ 0 and < 2^2048 (32 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^2048 (32 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^2048 (32 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l2048_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^2048 (32 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^2048 (32 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^2048 (32 qwords)*/ } icp_qat_fw_maths_modexp_l2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 2560-bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L2560. + * Input parameter list for Modular exponentiation for numbers less than 2560-bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L2560. */ -typedef struct icp_qat_fw_maths_modexp_l2560_input_s { - uint64_t g; /**< base ≥ 0 and < 2^2560 (40 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^2560 (40 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^2560 (40 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l2560_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^2560 (40 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^2560 (40 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^2560 (40 qwords)*/ } icp_qat_fw_maths_modexp_l2560_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 3072-bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L3072. + * Input parameter list for Modular exponentiation for numbers less than 3072-bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L3072. */ -typedef struct icp_qat_fw_maths_modexp_l3072_input_s { - uint64_t g; /**< base ≥ 0 and < 2^3072 (48 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^3072 (48 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^3072 (48 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l3072_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^3072 (48 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^3072 (48 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^3072 (48 qwords)*/ } icp_qat_fw_maths_modexp_l3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 3584-bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L3584. + * Input parameter list for Modular exponentiation for numbers less than 3584-bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L3584. */ -typedef struct icp_qat_fw_maths_modexp_l3584_input_s { - uint64_t g; /**< base ≥ 0 and < 2^3584 (56 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^3584 (56 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^3584 (56 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l3584_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^3584 (56 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^3584 (56 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^3584 (56 qwords)*/ } icp_qat_fw_maths_modexp_l3584_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular exponentiation for numbers less than - * 4096-bit , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODEXP_L4096. + * Input parameter list for Modular exponentiation for numbers less than 4096-bit , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODEXP_L4096. */ -typedef struct icp_qat_fw_maths_modexp_l4096_input_s { - uint64_t g; /**< base ≥ 0 and < 2^4096 (64 qwords)*/ - uint64_t e; /**< exponent ≥ 0 and < 2^4096 (64 qwords)*/ - uint64_t m; /**< modulus > 0 and < 2^4096 (64 qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l4096_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^4096 (64 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^4096 (64 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^4096 (64 qwords)*/ } icp_qat_fw_maths_modexp_l4096_input_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for Modular exponentiation for numbers up to 8192 + * bits , to be used when icp_qat_fw_pke_request_s::functionalityId is + * #MATHS_MODEXP_L8192. + */ +typedef struct icp_qat_fw_maths_modexp_l8192_input_s +{ + uint64_t g; /**< base ≥ 0 and < 2^8192 (128 qwords)*/ + uint64_t e; /**< exponent ≥ 0 and < 2^8192 (128 qwords)*/ + uint64_t m; /**< modulus > 0 and < 2^8192 (128 qwords)*/ +} icp_qat_fw_maths_modexp_l8192_input_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Modular multiplicative inverse for numbers less - * than 128 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is + * than 128 bits , to be used when icp_qat_fw_pke_request_s::functionalityId is * #MATHS_MODINV_ODD_L128. */ -typedef struct icp_qat_fw_maths_modinv_odd_l128_input_s { - uint64_t a; /**< number > 0 and < 2^128 (2 qwords)*/ - uint64_t - b; /**< odd modulus > 0 and < 2^128, coprime to a (2 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l128_input_s +{ + uint64_t a; /**< number > 0 and < 2^128 (2 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^128, coprime to a (2 qwords)*/ } icp_qat_fw_maths_modinv_odd_l128_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 192 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L192. + * Input parameter list for Modular multiplicative inverse for numbers less than 192 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L192. */ -typedef struct icp_qat_fw_maths_modinv_odd_l192_input_s { - uint64_t a; /**< number > 0 and < 2^192 (3 qwords)*/ - uint64_t - b; /**< odd modulus > 0 and < 2^192, coprime to a (3 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l192_input_s +{ + uint64_t a; /**< number > 0 and < 2^192 (3 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^192, coprime to a (3 qwords)*/ } icp_qat_fw_maths_modinv_odd_l192_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 256 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L256. + * Input parameter list for Modular multiplicative inverse for numbers less than 256 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L256. */ -typedef struct icp_qat_fw_maths_modinv_odd_l256_input_s { - uint64_t a; /**< number > 0 and < 2^256 (4 qwords)*/ - uint64_t - b; /**< odd modulus > 0 and < 2^256, coprime to a (4 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l256_input_s +{ + uint64_t a; /**< number > 0 and < 2^256 (4 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^256, coprime to a (4 qwords)*/ } icp_qat_fw_maths_modinv_odd_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 384 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L384. + * Input parameter list for Modular multiplicative inverse for numbers less than 384 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L384. */ -typedef struct icp_qat_fw_maths_modinv_odd_l384_input_s { - uint64_t a; /**< number > 0 and < 2^384 (6 qwords)*/ - uint64_t - b; /**< odd modulus > 0 and < 2^384, coprime to a (6 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l384_input_s +{ + uint64_t a; /**< number > 0 and < 2^384 (6 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^384, coprime to a (6 qwords)*/ } icp_qat_fw_maths_modinv_odd_l384_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 512 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L512. + * Input parameter list for Modular multiplicative inverse for numbers less than 512 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L512. */ -typedef struct icp_qat_fw_maths_modinv_odd_l512_input_s { - uint64_t a; /**< number > 0 and < 2^512 (8 qwords)*/ - uint64_t - b; /**< odd modulus > 0 and < 2^512, coprime to a (8 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l512_input_s +{ + uint64_t a; /**< number > 0 and < 2^512 (8 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^512, coprime to a (8 qwords)*/ } icp_qat_fw_maths_modinv_odd_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 768 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L768. + * Input parameter list for Modular multiplicative inverse for numbers less than 768 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L768. */ -typedef struct icp_qat_fw_maths_modinv_odd_l768_input_s { - uint64_t a; /**< number > 0 and < 2^768 (12 qwords)*/ - uint64_t b; /**< odd modulus > 0 and < 2^768 ,coprime to a (12 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l768_input_s +{ + uint64_t a; /**< number > 0 and < 2^768 (12 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^768 ,coprime to a (12 qwords)*/ } icp_qat_fw_maths_modinv_odd_l768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 1024 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L1024. + * Input parameter list for Modular multiplicative inverse for numbers less than 1024 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L1024. */ -typedef struct icp_qat_fw_maths_modinv_odd_l1024_input_s { - uint64_t a; /**< number > 0 and < 2^1024 (16 qwords)*/ - uint64_t b; /**< odd modulus > 0 and < 2^1024, coprime to a (16 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l1024_input_s +{ + uint64_t a; /**< number > 0 and < 2^1024 (16 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^1024, coprime to a (16 qwords)*/ } icp_qat_fw_maths_modinv_odd_l1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 1536 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L1536. + * Input parameter list for Modular multiplicative inverse for numbers less than 1536 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L1536. */ -typedef struct icp_qat_fw_maths_modinv_odd_l1536_input_s { - uint64_t a; /**< number > 0 and < 2^1536 (24 qwords)*/ - uint64_t b; /**< odd modulus > 0 and < 2^1536, coprime to a (24 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l1536_input_s +{ + uint64_t a; /**< number > 0 and < 2^1536 (24 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^1536, coprime to a (24 qwords)*/ } icp_qat_fw_maths_modinv_odd_l1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 2048 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L2048. + * Input parameter list for Modular multiplicative inverse for numbers less than 2048 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L2048. */ -typedef struct icp_qat_fw_maths_modinv_odd_l2048_input_s { - uint64_t a; /**< number > 0 and < 2^2048 (32 qwords)*/ - uint64_t b; /**< odd modulus > 0 and < 2^2048, coprime to a (32 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l2048_input_s +{ + uint64_t a; /**< number > 0 and < 2^2048 (32 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^2048, coprime to a (32 qwords)*/ } icp_qat_fw_maths_modinv_odd_l2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 3072 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L3072. + * Input parameter list for Modular multiplicative inverse for numbers less than 3072 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L3072. */ -typedef struct icp_qat_fw_maths_modinv_odd_l3072_input_s { - uint64_t a; /**< number > 0 and < 2^3072 (48 qwords)*/ - uint64_t b; /**< odd modulus > 0 and < 2^3072, coprime to a (48 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l3072_input_s +{ + uint64_t a; /**< number > 0 and < 2^3072 (48 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^3072, coprime to a (48 qwords)*/ } icp_qat_fw_maths_modinv_odd_l3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 4096 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_ODD_L4096. + * Input parameter list for Modular multiplicative inverse for numbers less than 4096 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_ODD_L4096. */ -typedef struct icp_qat_fw_maths_modinv_odd_l4096_input_s { - uint64_t a; /**< number > 0 and < 2^4096 (64 qwords)*/ - uint64_t b; /**< odd modulus > 0 and < 2^4096, coprime to a (64 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l4096_input_s +{ + uint64_t a; /**< number > 0 and < 2^4096 (64 qwords)*/ + uint64_t b; /**< odd modulus > 0 and < 2^4096, coprime to a (64 qwords)*/ } icp_qat_fw_maths_modinv_odd_l4096_input_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for Modular multiplicative inverse for numbers up to + * 8192 bits , to be used when icp_qat_fw_pke_request_s::functionalityId is + * #MATHS_MODINV_ODD_L8192. + */ +typedef struct icp_qat_fw_maths_modinv_odd_l8192_input_s +{ + uint64_t a; /**< number > 0 and < 2^8192 (128 qwords)*/ + uint64_t + b; /**< odd modulus > 0 and < 2^8192, coprime to a (128 qwords)*/ +} icp_qat_fw_maths_modinv_odd_l8192_input_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for Modular multiplicative inverse for numbers less - * than 128 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is + * than 128 bits , to be used when icp_qat_fw_pke_request_s::functionalityId is * #MATHS_MODINV_EVEN_L128. */ -typedef struct icp_qat_fw_maths_modinv_even_l128_input_s { - uint64_t a; /**< odd number > 0 and < 2^128 (2 qwords)*/ - uint64_t - b; /**< even modulus > 0 and < 2^128, coprime with a (2 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l128_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^128 (2 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^128, coprime with a (2 qwords)*/ } icp_qat_fw_maths_modinv_even_l128_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 192 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L192. + * Input parameter list for Modular multiplicative inverse for numbers less than 192 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L192. */ -typedef struct icp_qat_fw_maths_modinv_even_l192_input_s { - uint64_t a; /**< odd number > 0 and < 2^192 (3 qwords)*/ - uint64_t - b; /**< even modulus > 0 and < 2^192, coprime with a (3 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l192_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^192 (3 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^192, coprime with a (3 qwords)*/ } icp_qat_fw_maths_modinv_even_l192_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 256 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L256. + * Input parameter list for Modular multiplicative inverse for numbers less than 256 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L256. */ -typedef struct icp_qat_fw_maths_modinv_even_l256_input_s { - uint64_t a; /**< odd number > 0 and < 2^256 (4 qwords)*/ - uint64_t - b; /**< even modulus > 0 and < 2^256, coprime with a (4 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l256_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^256 (4 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^256, coprime with a (4 qwords)*/ } icp_qat_fw_maths_modinv_even_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 384 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L384. + * Input parameter list for Modular multiplicative inverse for numbers less than 384 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L384. */ -typedef struct icp_qat_fw_maths_modinv_even_l384_input_s { - uint64_t a; /**< odd number > 0 and < 2^384 (6 qwords)*/ - uint64_t - b; /**< even modulus > 0 and < 2^384, coprime with a (6 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l384_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^384 (6 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^384, coprime with a (6 qwords)*/ } icp_qat_fw_maths_modinv_even_l384_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 512 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L512. + * Input parameter list for Modular multiplicative inverse for numbers less than 512 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L512. */ -typedef struct icp_qat_fw_maths_modinv_even_l512_input_s { - uint64_t a; /**< odd number > 0 and < 2^512 (8 qwords)*/ - uint64_t - b; /**< even modulus > 0 and < 2^512, coprime with a (8 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l512_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^512 (8 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^512, coprime with a (8 qwords)*/ } icp_qat_fw_maths_modinv_even_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 768 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L768. + * Input parameter list for Modular multiplicative inverse for numbers less than 768 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L768. */ -typedef struct icp_qat_fw_maths_modinv_even_l768_input_s { - uint64_t a; /**< odd number > 0 and < 2^768 (12 qwords)*/ - uint64_t b; /**< even modulus > 0 and < 2^768, coprime with a - (12 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l768_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^768 (12 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^768, coprime with a (12 qwords)*/ } icp_qat_fw_maths_modinv_even_l768_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 1024 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L1024. + * Input parameter list for Modular multiplicative inverse for numbers less than 1024 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L1024. */ -typedef struct icp_qat_fw_maths_modinv_even_l1024_input_s { - uint64_t a; /**< odd number > 0 and < 2^1024 (16 qwords)*/ - uint64_t b; /**< even modulus > 0 and < 2^1024, coprime with a - (16 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l1024_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^1024 (16 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^1024, coprime with a (16 qwords)*/ } icp_qat_fw_maths_modinv_even_l1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 1536 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L1536. + * Input parameter list for Modular multiplicative inverse for numbers less than 1536 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L1536. */ -typedef struct icp_qat_fw_maths_modinv_even_l1536_input_s { - uint64_t a; /**< odd number > 0 and < 2^1536 (24 qwords)*/ - uint64_t b; /**< even modulus > 0 and < 2^1536, coprime with a - (24 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l1536_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^1536 (24 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^1536, coprime with a (24 qwords)*/ } icp_qat_fw_maths_modinv_even_l1536_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 2048 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L2048. + * Input parameter list for Modular multiplicative inverse for numbers less than 2048 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L2048. */ -typedef struct icp_qat_fw_maths_modinv_even_l2048_input_s { - uint64_t a; /**< odd number > 0 and < 2^2048 (32 qwords)*/ - uint64_t b; /**< even modulus > 0 and < 2^2048, coprime with a - (32 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l2048_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^2048 (32 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^2048, coprime with a (32 qwords)*/ } icp_qat_fw_maths_modinv_even_l2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 3072 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L3072. + * Input parameter list for Modular multiplicative inverse for numbers less than 3072 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L3072. */ -typedef struct icp_qat_fw_maths_modinv_even_l3072_input_s { - uint64_t a; /**< odd number > 0 and < 2^3072 (48 qwords)*/ - uint64_t b; /**< even modulus > 0 and < 2^3072, coprime with a - (48 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l3072_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^3072 (48 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^3072, coprime with a (48 qwords)*/ } icp_qat_fw_maths_modinv_even_l3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for Modular multiplicative inverse for numbers less - * than 4096 bits , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_MODINV_EVEN_L4096. + * Input parameter list for Modular multiplicative inverse for numbers less than 4096 bits , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_MODINV_EVEN_L4096. */ -typedef struct icp_qat_fw_maths_modinv_even_l4096_input_s { - uint64_t a; /**< odd number > 0 and < 2^4096 (64 qwords)*/ - uint64_t b; /**< even modulus > 0 and < 2^4096, coprime with a - (64 qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l4096_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^4096 (64 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^4096, coprime with a (64 qwords)*/ } icp_qat_fw_maths_modinv_even_l4096_input_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for Modular multiplicative inverse for numbers up to + * 8192 bits , to be used when icp_qat_fw_pke_request_s::functionalityId is + * #MATHS_MODINV_EVEN_L8192. + */ +typedef struct icp_qat_fw_maths_modinv_even_l8192_input_s +{ + uint64_t a; /**< odd number > 0 and < 2^8192 (128 qwords)*/ + uint64_t b; /**< even modulus > 0 and < 2^8192, coprime with a (128 + qwords)*/ +} icp_qat_fw_maths_modinv_even_l8192_input_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_P_1024_160. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_P_1024_160. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_1024_160_input_s { - uint64_t x; /**< DSA 1024-bit randomness (16 qwords)*/ - uint64_t q; /**< DSA 160-bit parameter (3 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_1024_160_input_s +{ + uint64_t x; /**< DSA 1024-bit randomness (16 qwords)*/ + uint64_t q; /**< DSA 160-bit parameter (3 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_1024_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA key generation G , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_G_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_G_1024. */ -typedef struct icp_qat_fw_mmp_dsa_gen_g_1024_input_s { - uint64_t p; /**< DSA 1024-bit parameter (16 qwords)*/ - uint64_t q; /**< DSA 160-bit parameter (3 qwords)*/ - uint64_t h; /**< DSA 1024-bit parameter (16 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_g_1024_input_s +{ + uint64_t p; /**< DSA 1024-bit parameter (16 qwords)*/ + uint64_t q; /**< DSA 160-bit parameter (3 qwords)*/ + uint64_t h; /**< DSA 1024-bit parameter (16 qwords)*/ } icp_qat_fw_mmp_dsa_gen_g_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA key generation Y , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_Y_1024. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_Y_1024. */ -typedef struct icp_qat_fw_mmp_dsa_gen_y_1024_input_s { - uint64_t p; /**< DSA 1024-bit parameter (16 qwords)*/ - uint64_t g; /**< DSA parameter (16 qwords)*/ - uint64_t - x; /**< randomly generated DSA parameter (160 bits), (3 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_y_1024_input_s +{ + uint64_t p; /**< DSA 1024-bit parameter (16 qwords)*/ + uint64_t g; /**< DSA parameter (16 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (160 bits), (3 qwords)*/ } icp_qat_fw_mmp_dsa_gen_y_1024_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_1024_160. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_1024_160_input_s { - uint64_t k; /**< randomly generated DSA parameter (3 qwords)*/ - uint64_t p; /**< DSA parameter, (16 qwords)*/ - uint64_t q; /**< DSA parameter (3 qwords)*/ - uint64_t g; /**< DSA parameter (16 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_1024_160. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_1024_160_input_s +{ + uint64_t k; /**< randomly generated DSA parameter (3 qwords)*/ + uint64_t p; /**< DSA parameter, (16 qwords)*/ + uint64_t q; /**< DSA parameter (3 qwords)*/ + uint64_t g; /**< DSA parameter (16 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_1024_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_S_160. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_s_160_input_s { - uint64_t m; /**< digest message to be signed (3 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (3 qwords)*/ - uint64_t q; /**< DSA parameter (3 qwords)*/ - uint64_t r; /**< DSA parameter (3 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (3 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_S_160. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_s_160_input_s +{ + uint64_t m; /**< digest message to be signed (3 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (3 qwords)*/ + uint64_t q; /**< DSA parameter (3 qwords)*/ + uint64_t r; /**< DSA parameter (3 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (3 qwords)*/ } icp_qat_fw_mmp_dsa_sign_s_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_S_1024_160. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s { - uint64_t m; /**< digest of the message to be signed (3 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (3 qwords)*/ - uint64_t p; /**< DSA parameter (16 qwords)*/ - uint64_t q; /**< DSA parameter (3 qwords)*/ - uint64_t g; /**< DSA parameter (16 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (3 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_S_1024_160. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s +{ + uint64_t m; /**< digest of the message to be signed (3 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (3 qwords)*/ + uint64_t p; /**< DSA parameter (16 qwords)*/ + uint64_t q; /**< DSA parameter (3 qwords)*/ + uint64_t g; /**< DSA parameter (16 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (3 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_VERIFY_1024_160. - */ -typedef struct icp_qat_fw_mmp_dsa_verify_1024_160_input_s { - uint64_t r; /**< DSA 160-bits signature (3 qwords)*/ - uint64_t s; /**< DSA 160-bits signature (3 qwords)*/ - uint64_t m; /**< digest of the message (3 qwords)*/ - uint64_t p; /**< DSA parameter (16 qwords)*/ - uint64_t q; /**< DSA parameter (3 qwords)*/ - uint64_t g; /**< DSA parameter (16 qwords)*/ - uint64_t y; /**< DSA parameter (16 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_VERIFY_1024_160. + */ +typedef struct icp_qat_fw_mmp_dsa_verify_1024_160_input_s +{ + uint64_t r; /**< DSA 160-bits signature (3 qwords)*/ + uint64_t s; /**< DSA 160-bits signature (3 qwords)*/ + uint64_t m; /**< digest of the message (3 qwords)*/ + uint64_t p; /**< DSA parameter (16 qwords)*/ + uint64_t q; /**< DSA parameter (3 qwords)*/ + uint64_t g; /**< DSA parameter (16 qwords)*/ + uint64_t y; /**< DSA parameter (16 qwords)*/ } icp_qat_fw_mmp_dsa_verify_1024_160_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_P_2048_224. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_P_2048_224. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_224_input_s { - uint64_t x; /**< DSA 2048-bit randomness (32 qwords)*/ - uint64_t q; /**< DSA 224-bit parameter (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_224_input_s +{ + uint64_t x; /**< DSA 2048-bit randomness (32 qwords)*/ + uint64_t q; /**< DSA 224-bit parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_2048_224_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA key generation Y , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_Y_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_Y_2048. */ -typedef struct icp_qat_fw_mmp_dsa_gen_y_2048_input_s { - uint64_t p; /**< DSA 2048-bit parameter (32 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (224/256 bits), (4 - qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_y_2048_input_s +{ + uint64_t p; /**< DSA 2048-bit parameter (32 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (224/256 bits), (4 qwords)*/ } icp_qat_fw_mmp_dsa_gen_y_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_2048_224. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_224_input_s { - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t p; /**< DSA parameter, (32 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_2048_224. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_224_input_s +{ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t p; /**< DSA parameter, (32 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_2048_224_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_S_224. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_s_224_input_s { - uint64_t m; /**< digest message to be signed (4 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t r; /**< DSA parameter (4 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_S_224. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_s_224_input_s +{ + uint64_t m; /**< digest message to be signed (4 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t r; /**< DSA parameter (4 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_s_224_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_S_2048_224. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s { - uint64_t m; /**< digest of the message to be signed (4 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t p; /**< DSA parameter (32 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_S_2048_224. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s +{ + uint64_t m; /**< digest of the message to be signed (4 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t p; /**< DSA parameter (32 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_VERIFY_2048_224. - */ -typedef struct icp_qat_fw_mmp_dsa_verify_2048_224_input_s { - uint64_t r; /**< DSA 224-bits signature (4 qwords)*/ - uint64_t s; /**< DSA 224-bits signature (4 qwords)*/ - uint64_t m; /**< digest of the message (4 qwords)*/ - uint64_t p; /**< DSA parameter (32 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ - uint64_t y; /**< DSA parameter (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_VERIFY_2048_224. + */ +typedef struct icp_qat_fw_mmp_dsa_verify_2048_224_input_s +{ + uint64_t r; /**< DSA 224-bits signature (4 qwords)*/ + uint64_t s; /**< DSA 224-bits signature (4 qwords)*/ + uint64_t m; /**< digest of the message (4 qwords)*/ + uint64_t p; /**< DSA parameter (32 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ + uint64_t y; /**< DSA parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_verify_2048_224_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_P_2048_256. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_P_2048_256. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_256_input_s { - uint64_t x; /**< DSA 2048-bit randomness (32 qwords)*/ - uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_256_input_s +{ + uint64_t x; /**< DSA 2048-bit randomness (32 qwords)*/ + uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_2048_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA key generation G , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_G_2048. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_G_2048. */ -typedef struct icp_qat_fw_mmp_dsa_gen_g_2048_input_s { - uint64_t p; /**< DSA 2048-bit parameter (32 qwords)*/ - uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ - uint64_t h; /**< DSA 2048-bit parameter (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_g_2048_input_s +{ + uint64_t p; /**< DSA 2048-bit parameter (32 qwords)*/ + uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ + uint64_t h; /**< DSA 2048-bit parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_gen_g_2048_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_2048_256. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_256_input_s { - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t p; /**< DSA parameter, (32 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_2048_256. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_256_input_s +{ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t p; /**< DSA parameter, (32 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_2048_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_S_256. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_s_256_input_s { - uint64_t m; /**< digest message to be signed (4 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t r; /**< DSA parameter (4 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_S_256. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_s_256_input_s +{ + uint64_t m; /**< digest message to be signed (4 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t r; /**< DSA parameter (4 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_s_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_S_2048_256. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s { - uint64_t m; /**< digest of the message to be signed (4 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t p; /**< DSA parameter (32 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_S_2048_256. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s +{ + uint64_t m; /**< digest of the message to be signed (4 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t p; /**< DSA parameter (32 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_VERIFY_2048_256. - */ -typedef struct icp_qat_fw_mmp_dsa_verify_2048_256_input_s { - uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ - uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ - uint64_t m; /**< digest of the message (4 qwords)*/ - uint64_t p; /**< DSA parameter (32 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (32 qwords)*/ - uint64_t y; /**< DSA parameter (32 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_VERIFY_2048_256. + */ +typedef struct icp_qat_fw_mmp_dsa_verify_2048_256_input_s +{ + uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ + uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ + uint64_t m; /**< digest of the message (4 qwords)*/ + uint64_t p; /**< DSA parameter (32 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (32 qwords)*/ + uint64_t y; /**< DSA parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_verify_2048_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_P_3072_256. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_P_3072_256. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_3072_256_input_s { - uint64_t x; /**< DSA 3072-bit randomness (48 qwords)*/ - uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_3072_256_input_s +{ + uint64_t x; /**< DSA 3072-bit randomness (48 qwords)*/ + uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_3072_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA key generation G , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_G_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_G_3072. */ -typedef struct icp_qat_fw_mmp_dsa_gen_g_3072_input_s { - uint64_t p; /**< DSA 3072-bit parameter (48 qwords)*/ - uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ - uint64_t h; /**< DSA 3072-bit parameter (48 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_g_3072_input_s +{ + uint64_t p; /**< DSA 3072-bit parameter (48 qwords)*/ + uint64_t q; /**< DSA 256-bit parameter (4 qwords)*/ + uint64_t h; /**< DSA 3072-bit parameter (48 qwords)*/ } icp_qat_fw_mmp_dsa_gen_g_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA key generation Y , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_GEN_Y_3072. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_GEN_Y_3072. */ -typedef struct icp_qat_fw_mmp_dsa_gen_y_3072_input_s { - uint64_t p; /**< DSA 3072-bit parameter (48 qwords)*/ - uint64_t g; /**< DSA parameter (48 qwords)*/ - uint64_t - x; /**< randomly generated DSA parameter (3072 bits), (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_y_3072_input_s +{ + uint64_t p; /**< DSA 3072-bit parameter (48 qwords)*/ + uint64_t g; /**< DSA parameter (48 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (3072 bits), (4 qwords)*/ } icp_qat_fw_mmp_dsa_gen_y_3072_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_3072_256. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_3072_256_input_s { - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t p; /**< DSA parameter, (48 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (48 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_3072_256. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_3072_256_input_s +{ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t p; /**< DSA parameter, (48 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (48 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_3072_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_SIGN_R_S_3072_256. - */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s { - uint64_t m; /**< digest of the message to be signed (4 qwords)*/ - uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ - uint64_t p; /**< DSA parameter (48 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (48 qwords)*/ - uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_SIGN_R_S_3072_256. + */ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s +{ + uint64_t m; /**< digest of the message to be signed (4 qwords)*/ + uint64_t k; /**< randomly generated DSA parameter (4 qwords)*/ + uint64_t p; /**< DSA parameter (48 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (48 qwords)*/ + uint64_t x; /**< randomly generated DSA parameter (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_DSA_VERIFY_3072_256. - */ -typedef struct icp_qat_fw_mmp_dsa_verify_3072_256_input_s { - uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ - uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ - uint64_t m; /**< digest of the message (4 qwords)*/ - uint64_t p; /**< DSA parameter (48 qwords)*/ - uint64_t q; /**< DSA parameter (4 qwords)*/ - uint64_t g; /**< DSA parameter (48 qwords)*/ - uint64_t y; /**< DSA parameter (48 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_DSA_VERIFY_3072_256. + */ +typedef struct icp_qat_fw_mmp_dsa_verify_3072_256_input_s +{ + uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ + uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ + uint64_t m; /**< digest of the message (4 qwords)*/ + uint64_t p; /**< DSA parameter (48 qwords)*/ + uint64_t q; /**< DSA parameter (4 qwords)*/ + uint64_t g; /**< DSA parameter (48 qwords)*/ + uint64_t y; /**< DSA parameter (48 qwords)*/ } icp_qat_fw_mmp_dsa_verify_3072_256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for ECDSA Sign RS for curves B/K-163 and B/K-233 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GF2_L256. + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_RS_GF2_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input_s { - uint64_t in; /**< concatenated input parameters (G, n, q, a, b, k, e, d) - (36 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input_s +{ + uint64_t in; /**< concatenated input parameters (G, n, q, a, b, k, e, d) (36 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for ECDSA Sign R for curves B/K-163 and B/K-233 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GF2_L256. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s { - uint64_t - xg; /**< x coordinate of base point G of B/K-163 of B/K-233 (4 - qwords)*/ - uint64_t - yg; /**< y coordinate of base point G of B/K-163 or B/K-233 (4 - qwords)*/ - uint64_t - n; /**< order of the base point of B/K-163 or B/K-233 (4 qwords)*/ - uint64_t q; /**< field polynomial of B/K-163 or B/K-233 (4 qwords)*/ - uint64_t - a; /**< a equation coefficient of B/K-163 of B/K-233 (4 qwords)*/ - uint64_t - b; /**< b equation coefficient of B/K-163 or B/K-233 (4 qwords)*/ - uint64_t k; /**< random value > 0 and < n (4 qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_R_GF2_L256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s +{ + uint64_t xg; /**< x coordinate of base point G of B/K-163 of B/K-233 (4 qwords)*/ + uint64_t yg; /**< y coordinate of base point G of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t n; /**< order of the base point of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t q; /**< field polynomial of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t a; /**< a equation coefficient of B/K-163 of B/K-233 (4 qwords)*/ + uint64_t b; /**< b equation coefficient of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t k; /**< random value > 0 and < n (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Input parameter list for ECDSA Sign S for curves with n < 2^256 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GF2_L256. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s { - uint64_t e; /**< hash of message (0 < e < 2^256) (4 qwords)*/ - uint64_t d; /**< private key (>0 and < n) (4 qwords)*/ - uint64_t - r; /**< ECDSA r signature value (>0 and < n) (4 qwords)*/ - uint64_t k; /**< random value > 0 and < n (4 qwords)*/ - uint64_t n; /**< order of the base point G (2 < n < 2^256) (4 - qwords)*/ + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_S_GF2_L256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s +{ + uint64_t e; /**< hash of message (0 < e < 2^256) (4 qwords)*/ + uint64_t d; /**< private key (>0 and < n) (4 qwords)*/ + uint64_t r; /**< ECDSA r signature value (>0 and < n) (4 qwords)*/ + uint64_t k; /**< random value > 0 and < n (4 qwords)*/ + uint64_t n; /**< order of the base point G (2 < n < 2^256) (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_t; + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA Verify for curves B/K-163 and B/K-233 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_VERIFY_GF2_L256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_s +{ + uint64_t in; /**< concatenated curve parameter (e,s,r,n,G,Q,a,b,q) (44 qwords)*/ +} icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA Sign RS , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_RS_GF2_L512. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_s +{ + uint64_t in; /**< concatenated input parameters (G, n, q, a, b, k, e, d) (72 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Sign R , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_R_GF2_L512. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s +{ + uint64_t xg; /**< x coordinate of verified base point (> 0 and degree(x(G)) < degree(q)) (8 qwords)*/ + uint64_t yg; /**< y coordinate of verified base point (> 0 and degree(y(G)) < degree(q)) (8 qwords)*/ + uint64_t n; /**< order of the base point G, which must be prime and a divisor of #E and < 2^512) (8 qwords)*/ + uint64_t q; /**< field polynomial of degree > 2 and < 512 (8 qwords)*/ + uint64_t a; /**< a equation coefficient (degree(a) < degree(q)) (8 qwords)*/ + uint64_t b; /**< b equation coefficient (degree(b) < degree(q)) (8 qwords)*/ + uint64_t k; /**< random value > 0 and < n (8 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Sign S , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_S_GF2_L512. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s +{ + uint64_t e; /**< hash of message (0 < e < 2^512) (8 qwords)*/ + uint64_t d; /**< private key (>0 and < n) (8 qwords)*/ + uint64_t r; /**< ECDSA r signature value (>0 and < n) (8 qwords)*/ + uint64_t k; /**< random value > 0 and < n (8 qwords)*/ + uint64_t n; /**< order of the base point G, which must be prime and a divisor of #E and < 2^512) (8 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Verify , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_VERIFY_GF2_L512. + */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_s +{ + uint64_t in; /**< concatenated curve parameters (e, s, r, n, xG, yG, xQ, yQ, a, b, q) (88 qwords)*/ +} icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Sign RS for curves B-571/K-571 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_RS_GF2_571. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_s +{ + uint64_t in; /**< concatenated input parameters (x(G), y(G), n, q, a, b, k, e, d) (81 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Sign S for curves with deg(q) < 576 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_S_GF2_571. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s +{ + uint64_t e; /**< hash of message < 2^576 (9 qwords)*/ + uint64_t d; /**< private key (> 0 and < n) (9 qwords)*/ + uint64_t r; /**< ECDSA r signature value (> 0 and < n) (9 qwords)*/ + uint64_t k; /**< random value (> 0 and < n) (9 qwords)*/ + uint64_t n; /**< order of the base point of the curve (n < 2^576) (9 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Sign R for degree 571 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_R_GF2_571. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s +{ + uint64_t xg; /**< x coordinate of verified base point belonging to B/K-571 (9 qwords)*/ + uint64_t yg; /**< y coordinate of verified base point belonging to B/K-571 (9 qwords)*/ + uint64_t n; /**< order of the base point G (9 qwords)*/ + uint64_t q; /**< irreducible field polynomial of B/K-571 (9 qwords)*/ + uint64_t a; /**< a coefficient of curve B/K-571 (degree(a) < degree(q)) (9 qwords)*/ + uint64_t b; /**< b coefficient of curve B/K-571 (degree(b) < degree(q)) (9 qwords)*/ + uint64_t k; /**< random value > 0 and < n (9 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GF2 Verify for degree 571 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_VERIFY_GF2_571. + */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_s +{ + uint64_t in; /**< concatenated input (e, s, r, n, G, Q, a, b, q) (99 qwords)*/ +} icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for MATHS GF2 Point Multiplication , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GF2_L256. + */ +typedef struct icp_qat_fw_maths_point_multiplication_gf2_l256_input_s +{ + uint64_t k; /**< scalar multiplier > 0 and < 2^256 (4 qwords)*/ + uint64_t xg; /**< x coordinate of curve point (degree(xG) < 256) (4 qwords)*/ + uint64_t yg; /**< y coordinate of curve point (degree(yG) < 256) (4 qwords)*/ + uint64_t a; /**< a equation coefficient of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t b; /**< b equation coefficient of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t q; /**< field polynomial of B/K-163 or B/K-233 (4 qwords)*/ + uint64_t h; /**< cofactor of B/K-163 or B/K-233 (4 qwords)*/ +} icp_qat_fw_maths_point_multiplication_gf2_l256_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for MATHS GF2 Point Verification , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_VERIFY_GF2_L256. + */ +typedef struct icp_qat_fw_maths_point_verify_gf2_l256_input_s +{ + uint64_t xq; /**< x coordinate of input point (4 qwords)*/ + uint64_t yq; /**< y coordinate of input point (4 qwords)*/ + uint64_t q; /**< field polynomial of curve, degree(q) < 256 (4 qwords)*/ + uint64_t a; /**< a equation coefficient of curve, degree(a) < 256 (4 qwords)*/ + uint64_t b; /**< b equation coefficient of curve, degree(b) < 256 (4 qwords)*/ +} icp_qat_fw_maths_point_verify_gf2_l256_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for MATHS GF2 Point Multiplication , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GF2_L512. + */ +typedef struct icp_qat_fw_maths_point_multiplication_gf2_l512_input_s +{ + uint64_t k; /**< scalar multiplier > 0 and < 2^512 (8 qwords)*/ + uint64_t xg; /**< x coordinate of curve point (degree(xG) < 512) (8 qwords)*/ + uint64_t yg; /**< y coordinate of curve point (degree(yG) < 512) (8 qwords)*/ + uint64_t a; /**< a equation coefficient (degree(a) < 512) (8 qwords)*/ + uint64_t b; /**< b equation coefficient (degree(b) < 512) (8 qwords)*/ + uint64_t q; /**< field polynomial of degree > 2 and < 512 (8 qwords)*/ + uint64_t h; /**< cofactor (< 2^512) (8 qwords)*/ +} icp_qat_fw_maths_point_multiplication_gf2_l512_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for MATHS GF2 Point Verification , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_VERIFY_GF2_L512. + */ +typedef struct icp_qat_fw_maths_point_verify_gf2_l512_input_s +{ + uint64_t xq; /**< x coordinate of input point (8 qwords)*/ + uint64_t yq; /**< y coordinate of input point (8 qwords)*/ + uint64_t q; /**< field polynomial of degree > 2 and < 512 (8 qwords)*/ + uint64_t a; /**< a equation coefficient (degree(a) < 512) (8 qwords)*/ + uint64_t b; /**< b equation coefficient (degree(a) < 512) (8 qwords)*/ +} icp_qat_fw_maths_point_verify_gf2_l512_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC GF2 Point Multiplication for curves B-571/K-571 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GF2_571. + */ +typedef struct icp_qat_fw_maths_point_multiplication_gf2_571_input_s +{ + uint64_t k; /**< scalar value > 0 and < 2^576 (9 qwords)*/ + uint64_t xg; /**< x coordinate of curve point (degree(xG) < degree(q)) (9 qwords)*/ + uint64_t yg; /**< y coordinate of curve point (degree(xG) < degree(q)) (9 qwords)*/ + uint64_t a; /**< a equation coefficient for B/K-571 (9 qwords)*/ + uint64_t b; /**< b equation coefficient for B/K-571 (9 qwords)*/ + uint64_t q; /**< field polynomial of B/K-571 (9 qwords)*/ + uint64_t h; /**< cofactor for B/K-571 (1 qwords)*/ +} icp_qat_fw_maths_point_multiplication_gf2_571_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECC GF2 Point Verification for degree 571 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_VERIFY_GF2_571. + */ +typedef struct icp_qat_fw_maths_point_verify_gf2_571_input_s +{ + uint64_t xq; /**< x coordinate of candidate public key (9 qwords)*/ + uint64_t yq; /**< y coordinate of candidate public key (9 qwords)*/ + uint64_t q; /**< field polynomial of B/K-571 (9 qwords)*/ + uint64_t a; /**< a equation coefficient of B/K-571 (9 qwords)*/ + uint64_t b; /**< b equation coefficient of B/K-571 (9 qwords)*/ +} icp_qat_fw_maths_point_verify_gf2_571_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GFP Sign R , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_R_GFP_L256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s +{ + uint64_t xg; /**< x coordinate of base point G, (4 qwords)*/ + uint64_t yg; /**< y coordinate of base point G, (4 qwords)*/ + uint64_t n; /**< order of the base point G, which shall be prime (4 qwords)*/ + uint64_t q; /**< modulus (4 qwords)*/ + uint64_t a; /**< a equation coefficient (4 qwords)*/ + uint64_t b; /**< b equation coefficient (4 qwords)*/ + uint64_t k; /**< random value (4 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_t; + + + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Input parameter list for ECDSA GFP Sign S , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_S_GFP_L256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s +{ + uint64_t e; /**< digest of the message to be signed (4 qwords)*/ + uint64_t d; /**< private key (4 qwords)*/ + uint64_t r; /**< DSA r signature value (4 qwords)*/ + uint64_t k; /**< random value (4 qwords)*/ + uint64_t n; /**< order of the base point G, which shall be prime (4 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_t; + + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA Verify for curves B/K-163 and B/K-233 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_VERIFY_GF2_L256. + * Input parameter list for ECDSA GFP Sign RS , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_RS_GFP_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_s { - uint64_t - in; /**< concatenated curve parameter (e,s,r,n,G,Q,a,b,q) (44 - qwords)*/ -} icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_t; +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_s +{ + uint64_t in; /**< {xG, yG, n, q, a, b, k, e, d} concatenated (36 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA Sign RS , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GF2_L512. + * Input parameter list for ECDSA GFP Verify , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_VERIFY_GFP_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_s { - uint64_t in; /**< concatenated input parameters (G, n, q, a, b, k, e, d) - (72 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_t; +typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_s +{ + uint64_t in; /**< in = {e, s, r, n, xG, yG, xQ, yQ, a, b ,q} concatenated (44 qwords)*/ +} icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GF2_L512. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s { - uint64_t xg; /**< x coordinate of verified base point (> 0 and - degree(x(G)) < degree(q)) (8 qwords)*/ - uint64_t yg; /**< y coordinate of verified base point (> 0 and - degree(y(G)) < degree(q)) (8 qwords)*/ - uint64_t n; /**< order of the base point G, which must be prime and a - divisor of #E and < 2^512) (8 qwords)*/ - uint64_t - q; /**< field polynomial of degree > 2 and < 512 (8 qwords)*/ - uint64_t a; /**< a equation coefficient (degree(a) < degree(q)) (8 - qwords)*/ - uint64_t b; /**< b equation coefficient (degree(b) < degree(q)) (8 - qwords)*/ - uint64_t k; /**< random value > 0 and < n (8 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_t; + * Input parameter list for ECDSA GFP Sign R , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_R_GFP_L512. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s +{ + uint64_t xg; /**< x coordinate of base point G, (8 qwords)*/ + uint64_t yg; /**< y coordinate of base point G, (8 qwords)*/ + uint64_t n; /**< order of the base point G, which shall be prime (8 qwords)*/ + uint64_t q; /**< modulus (8 qwords)*/ + uint64_t a; /**< a equation coefficient (8 qwords)*/ + uint64_t b; /**< b equation coefficient (8 qwords)*/ + uint64_t k; /**< random value (8 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Sign S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GF2_L512. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s { - uint64_t e; /**< hash of message (0 < e < 2^512) (8 qwords)*/ - uint64_t d; /**< private key (>0 and < n) (8 qwords)*/ - uint64_t - r; /**< ECDSA r signature value (>0 and < n) (8 qwords)*/ - uint64_t k; /**< random value > 0 and < n (8 qwords)*/ - uint64_t n; /**< order of the base point G, which must be prime and a - divisor of #E and < 2^512) (8 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_t; + * Input parameter list for ECDSA GFP Sign S , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_S_GFP_L512. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s +{ + uint64_t e; /**< digest of the message to be signed (8 qwords)*/ + uint64_t d; /**< private key (8 qwords)*/ + uint64_t r; /**< DSA r signature value (8 qwords)*/ + uint64_t k; /**< random value (8 qwords)*/ + uint64_t n; /**< order of the base point G, which shall be prime (8 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_VERIFY_GF2_L512. + * Input parameter list for ECDSA GFP Sign RS , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_RS_GFP_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_s { - uint64_t - in; /**< concatenated curve parameters (e, s, r, n, xG, yG, xQ, yQ, - a, b, q) (88 qwords)*/ -} icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_t; +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_s +{ + uint64_t in; /**< {xG, yG, n, q, a, b, k, e, d} concatenated (72 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Sign RS for curves B-571/K-571 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GF2_571. + * Input parameter list for ECDSA GFP Verify , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_VERIFY_GFP_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_s { - uint64_t - in; /**< concatenated input parameters (x(G), y(G), n, q, a, b, k, - e, d) (81 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_t; +typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_s +{ + uint64_t in; /**< in = {e, s, r, n, xG, yG, xQ, yQ, a, b ,q} concatenated (88 qwords)*/ +} icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Sign S for curves with deg(q) < 576 - * , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GF2_571. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s { - uint64_t e; /**< hash of message < 2^576 (9 qwords)*/ - uint64_t d; /**< private key (> 0 and < n) (9 qwords)*/ - uint64_t - r; /**< ECDSA r signature value (> 0 and < n) (9 qwords)*/ - uint64_t k; /**< random value (> 0 and < n) (9 qwords)*/ - uint64_t - n; /**< order of the base point of the curve (n < 2^576) (9 - qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_t; + * Input parameter list for ECDSA GFP Sign R , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_R_GFP_521. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s +{ + uint64_t xg; /**< x coordinate of base point G, (9 qwords)*/ + uint64_t yg; /**< y coordinate of base point G, (9 qwords)*/ + uint64_t n; /**< order of the base point G, which shall be prime (9 qwords)*/ + uint64_t q; /**< modulus (9 qwords)*/ + uint64_t a; /**< a equation coefficient (9 qwords)*/ + uint64_t b; /**< b equation coefficient (9 qwords)*/ + uint64_t k; /**< random value (9 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Sign R for degree 571 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GF2_571. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s { - uint64_t xg; /**< x coordinate of verified base point belonging to - B/K-571 (9 qwords)*/ - uint64_t yg; /**< y coordinate of verified base point belonging to - B/K-571 (9 qwords)*/ - uint64_t n; /**< order of the base point G (9 qwords)*/ - uint64_t q; /**< irreducible field polynomial of B/K-571 (9 qwords)*/ - uint64_t a; /**< a coefficient of curve B/K-571 (degree(a) < - degree(q)) (9 qwords)*/ - uint64_t b; /**< b coefficient of curve B/K-571 (degree(b) < - degree(q)) (9 qwords)*/ - uint64_t k; /**< random value > 0 and < n (9 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_t; + * Input parameter list for ECDSA GFP Sign S , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_S_GFP_521. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s +{ + uint64_t e; /**< digest of the message to be signed (9 qwords)*/ + uint64_t d; /**< private key (9 qwords)*/ + uint64_t r; /**< DSA r signature value (9 qwords)*/ + uint64_t k; /**< random value (9 qwords)*/ + uint64_t n; /**< order of the base point G, which shall be prime (9 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GF2 Verify for degree 571 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_VERIFY_GF2_571. + * Input parameter list for ECDSA GFP Sign RS , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_SIGN_RS_GFP_521. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_s { - uint64_t in; /**< concatenated input (e, s, r, n, G, Q, a, b, q) (99 - qwords)*/ -} icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_t; +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_s +{ + uint64_t in; /**< {xG, yG, n, q, a, b, k, e, d} concatenated (81 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for MATHS GF2 Point Multiplication , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GF2_L256. - */ -typedef struct icp_qat_fw_maths_point_multiplication_gf2_l256_input_s { - uint64_t k; /**< scalar multiplier > 0 and < 2^256 (4 qwords)*/ - uint64_t xg; /**< x coordinate of curve point (degree(xG) < 256) (4 - qwords)*/ - uint64_t yg; /**< y coordinate of curve point (degree(yG) < 256) (4 - qwords)*/ - uint64_t - a; /**< a equation coefficient of B/K-163 or B/K-233 (4 qwords)*/ - uint64_t - b; /**< b equation coefficient of B/K-163 or B/K-233 (4 qwords)*/ - uint64_t q; /**< field polynomial of B/K-163 or B/K-233 (4 qwords)*/ - uint64_t h; /**< cofactor of B/K-163 or B/K-233 (4 qwords)*/ -} icp_qat_fw_maths_point_multiplication_gf2_l256_input_t; + * Input parameter list for ECDSA GFP Verify , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #PKE_ECDSA_VERIFY_GFP_521. + */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_s +{ + uint64_t in; /**< in = {e, s, r, n, xG, yG, xQ, yQ, a, b ,q} concatenated (99 qwords)*/ +} icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for MATHS GF2 Point Verification , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_VERIFY_GF2_L256. - */ -typedef struct icp_qat_fw_maths_point_verify_gf2_l256_input_s { - uint64_t xq; /**< x coordinate of input point (4 qwords)*/ - uint64_t yq; /**< y coordinate of input point (4 qwords)*/ - uint64_t - q; /**< field polynomial of curve, degree(q) < 256 (4 qwords)*/ - uint64_t - a; /**< a equation coefficient of curve, degree(a) < 256 (4 - qwords)*/ - uint64_t - b; /**< b equation coefficient of curve, degree(b) < 256 (4 - qwords)*/ -} icp_qat_fw_maths_point_verify_gf2_l256_input_t; + * Input parameter list for ECC GFP Point Multiplication , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GFP_L256. + */ +typedef struct icp_qat_fw_maths_point_multiplication_gfp_l256_input_s +{ + uint64_t k; /**< scalar multiplier (4 qwords)*/ + uint64_t xg; /**< x coordinate of curve point (4 qwords)*/ + uint64_t yg; /**< y coordinate of curve point (4 qwords)*/ + uint64_t a; /**< a equation coefficient (4 qwords)*/ + uint64_t b; /**< b equation coefficient (4 qwords)*/ + uint64_t q; /**< modulus (4 qwords)*/ + uint64_t h; /**< cofactor (4 qwords)*/ +} icp_qat_fw_maths_point_multiplication_gfp_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for MATHS GF2 Point Multiplication , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GF2_L512. - */ -typedef struct icp_qat_fw_maths_point_multiplication_gf2_l512_input_s { - uint64_t k; /**< scalar multiplier > 0 and < 2^512 (8 qwords)*/ - uint64_t xg; /**< x coordinate of curve point (degree(xG) < 512) (8 - qwords)*/ - uint64_t yg; /**< y coordinate of curve point (degree(yG) < 512) (8 - qwords)*/ - uint64_t - a; /**< a equation coefficient (degree(a) < 512) (8 qwords)*/ - uint64_t - b; /**< b equation coefficient (degree(b) < 512) (8 qwords)*/ - uint64_t - q; /**< field polynomial of degree > 2 and < 512 (8 qwords)*/ - uint64_t h; /**< cofactor (< 2^512) (8 qwords)*/ -} icp_qat_fw_maths_point_multiplication_gf2_l512_input_t; + * Input parameter list for ECC GFP Partial Point Verification , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_VERIFY_GFP_L256. + */ +typedef struct icp_qat_fw_maths_point_verify_gfp_l256_input_s +{ + uint64_t xq; /**< x coordinate of candidate point (4 qwords)*/ + uint64_t yq; /**< y coordinate of candidate point (4 qwords)*/ + uint64_t q; /**< modulus (4 qwords)*/ + uint64_t a; /**< a equation coefficient (4 qwords)*/ + uint64_t b; /**< b equation coefficient (4 qwords)*/ +} icp_qat_fw_maths_point_verify_gfp_l256_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for MATHS GF2 Point Verification , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_VERIFY_GF2_L512. - */ -typedef struct icp_qat_fw_maths_point_verify_gf2_l512_input_s { - uint64_t xq; /**< x coordinate of input point (8 qwords)*/ - uint64_t yq; /**< y coordinate of input point (8 qwords)*/ - uint64_t - q; /**< field polynomial of degree > 2 and < 512 (8 qwords)*/ - uint64_t - a; /**< a equation coefficient (degree(a) < 512) (8 qwords)*/ - uint64_t - b; /**< b equation coefficient (degree(a) < 512) (8 qwords)*/ -} icp_qat_fw_maths_point_verify_gf2_l512_input_t; + * Input parameter list for ECC GFP Point Multiplication , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GFP_L512. + */ +typedef struct icp_qat_fw_maths_point_multiplication_gfp_l512_input_s +{ + uint64_t k; /**< scalar multiplier (8 qwords)*/ + uint64_t xg; /**< x coordinate of curve point (8 qwords)*/ + uint64_t yg; /**< y coordinate of curve point (8 qwords)*/ + uint64_t a; /**< a equation coefficient (8 qwords)*/ + uint64_t b; /**< b equation coefficient (8 qwords)*/ + uint64_t q; /**< modulus (8 qwords)*/ + uint64_t h; /**< cofactor (8 qwords)*/ +} icp_qat_fw_maths_point_multiplication_gfp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GF2 Point Multiplication for curves - * B-571/K-571 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GF2_571. - */ -typedef struct icp_qat_fw_maths_point_multiplication_gf2_571_input_s { - uint64_t k; /**< scalar value > 0 and < 2^576 (9 qwords)*/ - uint64_t xg; /**< x coordinate of curve point (degree(xG) < - degree(q)) (9 qwords)*/ - uint64_t yg; /**< y coordinate of curve point (degree(xG) < - degree(q)) (9 qwords)*/ - uint64_t a; /**< a equation coefficient for B/K-571 (9 qwords)*/ - uint64_t b; /**< b equation coefficient for B/K-571 (9 qwords)*/ - uint64_t q; /**< field polynomial of B/K-571 (9 qwords)*/ - uint64_t h; /**< cofactor for B/K-571 (1 qwords)*/ -} icp_qat_fw_maths_point_multiplication_gf2_571_input_t; + * Input parameter list for ECC GFP Partial Point , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_VERIFY_GFP_L512. + */ +typedef struct icp_qat_fw_maths_point_verify_gfp_l512_input_s +{ + uint64_t xq; /**< x coordinate of candidate point (8 qwords)*/ + uint64_t yq; /**< y coordinate of candidate point (8 qwords)*/ + uint64_t q; /**< modulus (8 qwords)*/ + uint64_t a; /**< a equation coefficient (8 qwords)*/ + uint64_t b; /**< b equation coefficient (8 qwords)*/ +} icp_qat_fw_maths_point_verify_gfp_l512_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GF2 Point Verification for degree 571 , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_VERIFY_GF2_571. - */ -typedef struct icp_qat_fw_maths_point_verify_gf2_571_input_s { - uint64_t xq; /**< x coordinate of candidate public key (9 qwords)*/ - uint64_t yq; /**< y coordinate of candidate public key (9 qwords)*/ - uint64_t q; /**< field polynomial of B/K-571 (9 qwords)*/ - uint64_t a; /**< a equation coefficient of B/K-571 (9 qwords)*/ - uint64_t b; /**< b equation coefficient of B/K-571 (9 qwords)*/ -} icp_qat_fw_maths_point_verify_gf2_571_input_t; + * Input parameter list for ECC GFP Point Multiplication , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GFP_521. + */ +typedef struct icp_qat_fw_maths_point_multiplication_gfp_521_input_s +{ + uint64_t k; /**< scalar multiplier (9 qwords)*/ + uint64_t xg; /**< x coordinate of curve point (9 qwords)*/ + uint64_t yg; /**< y coordinate of curve point (9 qwords)*/ + uint64_t a; /**< a equation coefficient (9 qwords)*/ + uint64_t b; /**< b equation coefficient (9 qwords)*/ + uint64_t q; /**< modulus (9 qwords)*/ + uint64_t h; /**< cofactor (1 qwords)*/ +} icp_qat_fw_maths_point_multiplication_gfp_521_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GFP_L256. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s { - uint64_t xg; /**< x coordinate of base point G, (4 qwords)*/ - uint64_t yg; /**< y coordinate of base point G, (4 qwords)*/ - uint64_t n; /**< order of the base point G, which shall be prime (4 - qwords)*/ - uint64_t q; /**< modulus (4 qwords)*/ - uint64_t a; /**< a equation coefficient (4 qwords)*/ - uint64_t b; /**< b equation coefficient (4 qwords)*/ - uint64_t k; /**< random value (4 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_t; + * Input parameter list for ECC GFP Partial Point Verification , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #MATHS_POINT_VERIFY_GFP_521. + */ +typedef struct icp_qat_fw_maths_point_verify_gfp_521_input_s +{ + uint64_t xq; /**< x coordinate of candidate point (9 qwords)*/ + uint64_t yq; /**< y coordinate of candidate point (9 qwords)*/ + uint64_t q; /**< modulus (9 qwords)*/ + uint64_t a; /**< a equation coefficient (9 qwords)*/ + uint64_t b; /**< b equation coefficient (9 qwords)*/ +} icp_qat_fw_maths_point_verify_gfp_521_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GFP_L256. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s { - uint64_t e; /**< digest of the message to be signed (4 qwords)*/ - uint64_t d; /**< private key (4 qwords)*/ - uint64_t r; /**< DSA r signature value (4 qwords)*/ - uint64_t k; /**< random value (4 qwords)*/ - uint64_t n; /**< order of the base point G, which shall be prime (4 - qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_t; + * Input parameter list for ECC curve25519 Variable Point Multiplication [k]P(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #POINT_MULTIPLICATION_C25519. + */ +typedef struct icp_qat_fw_point_multiplication_c25519_input_s +{ + uint64_t xp; /**< xP = Montgomery affine coordinate X of point P (4 qwords)*/ + uint64_t k; /**< k = scalar (4 qwords)*/ +} icp_qat_fw_point_multiplication_c25519_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign RS , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GFP_L256. + * Input parameter list for ECC curve25519 Generator Point Multiplication [k]G(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #GENERATOR_MULTIPLICATION_C25519. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_s { - uint64_t - in; /**< {xG, yG, n, q, a, b, k, e, d} concatenated (36 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_t; +typedef struct icp_qat_fw_generator_multiplication_c25519_input_s +{ + uint64_t k; /**< k = scalar (4 qwords)*/ +} icp_qat_fw_generator_multiplication_c25519_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_VERIFY_GFP_L256. + * Input parameter list for ECC edwards25519 Variable Point Multiplication [k]P, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #POINT_MULTIPLICATION_ED25519. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_s { - uint64_t in; /**< in = {e, s, r, n, xG, yG, xQ, yQ, a, b ,q} - concatenated (44 qwords)*/ -} icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_t; +typedef struct icp_qat_fw_point_multiplication_ed25519_input_s +{ + uint64_t xp; /**< xP = Twisted Edwards affine coordinate X of point P (4 qwords)*/ + uint64_t yp; /**< yP = Twisted Edwards affine coordinate Y of point P (4 qwords)*/ + uint64_t k; /**< k = scalar (4 qwords)*/ +} icp_qat_fw_point_multiplication_ed25519_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GFP_L512. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s { - uint64_t xg; /**< x coordinate of base point G, (8 qwords)*/ - uint64_t yg; /**< y coordinate of base point G, (8 qwords)*/ - uint64_t n; /**< order of the base point G, which shall be prime (8 - qwords)*/ - uint64_t q; /**< modulus (8 qwords)*/ - uint64_t a; /**< a equation coefficient (8 qwords)*/ - uint64_t b; /**< b equation coefficient (8 qwords)*/ - uint64_t k; /**< random value (8 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_t; + * Input parameter list for ECC edwards25519 Generator Point Multiplication [k]G, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #GENERATOR_MULTIPLICATION_ED25519. + */ +typedef struct icp_qat_fw_generator_multiplication_ed25519_input_s +{ + uint64_t k; /**< k = scalar (4 qwords)*/ +} icp_qat_fw_generator_multiplication_ed25519_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign S , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GFP_L512. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s { - uint64_t e; /**< digest of the message to be signed (8 qwords)*/ - uint64_t d; /**< private key (8 qwords)*/ - uint64_t r; /**< DSA r signature value (8 qwords)*/ - uint64_t k; /**< random value (8 qwords)*/ - uint64_t n; /**< order of the base point G, which shall be prime (8 - qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_t; + * Input parameter list for ECC curve448 Variable Point Multiplication [k]P(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #POINT_MULTIPLICATION_C448. + */ +typedef struct icp_qat_fw_point_multiplication_c448_input_s +{ + uint64_t xp; /**< xP = Montgomery affine coordinate X of point P (8 qwords)*/ + uint64_t k; /**< k = scalar (8 qwords)*/ +} icp_qat_fw_point_multiplication_c448_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign RS , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GFP_L512. + * Input parameter list for ECC curve448 Generator Point Multiplication [k]G(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #GENERATOR_MULTIPLICATION_C448. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_s { - uint64_t - in; /**< {xG, yG, n, q, a, b, k, e, d} concatenated (72 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_t; +typedef struct icp_qat_fw_generator_multiplication_c448_input_s +{ + uint64_t k; /**< k = scalar (8 qwords)*/ +} icp_qat_fw_generator_multiplication_c448_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Verify , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_VERIFY_GFP_L512. + * Input parameter list for ECC edwards448 Variable Point Multiplication [k]P, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #POINT_MULTIPLICATION_ED448. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_s { - uint64_t in; /**< in = {e, s, r, n, xG, yG, xQ, yQ, a, b ,q} - concatenated (88 qwords)*/ -} icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_t; +typedef struct icp_qat_fw_point_multiplication_ed448_input_s +{ + uint64_t xp; /**< xP = Edwards affine coordinate X of point P (8 qwords)*/ + uint64_t yp; /**< yP = Edwards affine coordinate Y of point P (8 qwords)*/ + uint64_t k; /**< k = scalar (8 qwords)*/ +} icp_qat_fw_point_multiplication_ed448_input_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign R , - * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GFP_521. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s { - uint64_t xg; /**< x coordinate of base point G, (9 qwords)*/ - uint64_t yg; /**< y coordinate of base point G, (9 qwords)*/ - uint64_t n; /**< order of the base point G, which shall be prime (9 - qwords)*/ - uint64_t q; /**< modulus (9 qwords)*/ - uint64_t a; /**< a equation coefficient (9 qwords)*/ - uint64_t b; /**< b equation coefficient (9 qwords)*/ - uint64_t k; /**< random value (9 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_t; + * Input parameter list for ECC edwards448 Generator Point Multiplication [k]P, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_request_s::functionalityId is #GENERATOR_MULTIPLICATION_ED448. + */ +typedef struct icp_qat_fw_generator_multiplication_ed448_input_s +{ + uint64_t k; /**< k = scalar (8 qwords)*/ +} icp_qat_fw_generator_multiplication_ed448_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign S , + * Input parameter list for ECC P521 ECDSA Sign RS , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GFP_521. - */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s { - uint64_t e; /**< digest of the message to be signed (9 qwords)*/ - uint64_t d; /**< private key (9 qwords)*/ - uint64_t r; /**< DSA r signature value (9 qwords)*/ - uint64_t k; /**< random value (9 qwords)*/ - uint64_t n; /**< order of the base point G, which shall be prime (9 - qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_t; + * #PKE_KPT_ECDSA_SIGN_RS_P521. + */ +typedef struct icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_input_s +{ + uint64_t kpt_wrapped; /**< (42 qwords)*/ + uint64_t kpt_wrapping_context; /**< unwrap context (8 qwords)*/ + uint64_t e; /**< (6 qwords)*/ +} icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Sign RS , + * Input parameter list for ECC P384 ECDSA Sign RS , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GFP_521. + * #PKE_KPT_ECDSA_SIGN_RS_P384. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_s { - uint64_t - in; /**< {xG, yG, n, q, a, b, k, e, d} concatenated (81 qwords)*/ -} icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_t; +typedef struct icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_input_s +{ + uint64_t kpt_wrapped; /**< (42 qwords)*/ + uint64_t kpt_wrapping_context; /**< unwrap context (8 qwords)*/ + uint64_t e; /**< (6 qwords)*/ +} icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECDSA GFP Verify , + * Input parameter list for ECC KPT P256 ECDSA Sign RS , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #PKE_ECDSA_VERIFY_GFP_521. + * #PKE_KPT_ECDSA_SIGN_RS_P256. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_s { - uint64_t in; /**< in = {e, s, r, n, xG, yG, xQ, yQ, a, b ,q} - concatenated (99 qwords)*/ -} icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_t; +typedef struct icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_input_s +{ + uint64_t kpt_wrapped; /**< (28 qwords)*/ + uint64_t key_unwrap_context; /**< unwrap context (8 qwords)*/ + uint64_t e; /**< (4 qwords)*/ +} icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GFP Point Multiplication , + * Input parameter list for KPT RSA 512 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GFP_L256. - */ -typedef struct icp_qat_fw_maths_point_multiplication_gfp_l256_input_s { - uint64_t k; /**< scalar multiplier (4 qwords)*/ - uint64_t xg; /**< x coordinate of curve point (4 qwords)*/ - uint64_t yg; /**< y coordinate of curve point (4 qwords)*/ - uint64_t a; /**< a equation coefficient (4 qwords)*/ - uint64_t b; /**< b equation coefficient (4 qwords)*/ - uint64_t q; /**< modulus (4 qwords)*/ - uint64_t h; /**< cofactor (4 qwords)*/ -} icp_qat_fw_maths_point_multiplication_gfp_l256_input_t; + * #PKE_KPT_RSA_DP1_512. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_512_input_s +{ + uint64_t c; /**< cipher text representative, < n (8 qwords)*/ + uint64_t kpt_wrapped; /**< (16 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_512_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GFP Partial Point Verification , + * Input parameter list for KPT RSA 1024 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_VERIFY_GFP_L256. - */ -typedef struct icp_qat_fw_maths_point_verify_gfp_l256_input_s { - uint64_t xq; /**< x coordinate of candidate point (4 qwords)*/ - uint64_t yq; /**< y coordinate of candidate point (4 qwords)*/ - uint64_t q; /**< modulus (4 qwords)*/ - uint64_t a; /**< a equation coefficient (4 qwords)*/ - uint64_t b; /**< b equation coefficient (4 qwords)*/ -} icp_qat_fw_maths_point_verify_gfp_l256_input_t; + * #PKE_KPT_RSA_DP1_1024. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_1024_input_s +{ + uint64_t c; /**< cipher text representative, < n (16 qwords)*/ + uint64_t kpt_wrapped; /**< (32 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_1024_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GFP Point Multiplication , + * Input parameter list for KPT RSA 1536 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GFP_L512. - */ -typedef struct icp_qat_fw_maths_point_multiplication_gfp_l512_input_s { - uint64_t k; /**< scalar multiplier (8 qwords)*/ - uint64_t xg; /**< x coordinate of curve point (8 qwords)*/ - uint64_t yg; /**< y coordinate of curve point (8 qwords)*/ - uint64_t a; /**< a equation coefficient (8 qwords)*/ - uint64_t b; /**< b equation coefficient (8 qwords)*/ - uint64_t q; /**< modulus (8 qwords)*/ - uint64_t h; /**< cofactor (8 qwords)*/ -} icp_qat_fw_maths_point_multiplication_gfp_l512_input_t; + * #PKE_KPT_RSA_DP1_1536. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_1536_input_s +{ + uint64_t c; /**< cipher text representative, < n (24 qwords)*/ + uint64_t kpt_wrapped; /**< (48 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_1536_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GFP Partial Point , + * Input parameter list for KPT RSA 2048 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_VERIFY_GFP_L512. - */ -typedef struct icp_qat_fw_maths_point_verify_gfp_l512_input_s { - uint64_t xq; /**< x coordinate of candidate point (8 qwords)*/ - uint64_t yq; /**< y coordinate of candidate point (8 qwords)*/ - uint64_t q; /**< modulus (8 qwords)*/ - uint64_t a; /**< a equation coefficient (8 qwords)*/ - uint64_t b; /**< b equation coefficient (8 qwords)*/ -} icp_qat_fw_maths_point_verify_gfp_l512_input_t; + * #PKE_KPT_RSA_DP1_2048. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_2048_input_s +{ + uint64_t c; /**< cipher text representative, < n (32 qwords)*/ + uint64_t kpt_wrapped; /**< (64 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_2048_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GFP Point Multiplication , + * Input parameter list for KPT RSA 3072 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GFP_521. - */ -typedef struct icp_qat_fw_maths_point_multiplication_gfp_521_input_s { - uint64_t k; /**< scalar multiplier (9 qwords)*/ - uint64_t xg; /**< x coordinate of curve point (9 qwords)*/ - uint64_t yg; /**< y coordinate of curve point (9 qwords)*/ - uint64_t a; /**< a equation coefficient (9 qwords)*/ - uint64_t b; /**< b equation coefficient (9 qwords)*/ - uint64_t q; /**< modulus (9 qwords)*/ - uint64_t h; /**< cofactor (1 qwords)*/ -} icp_qat_fw_maths_point_multiplication_gfp_521_input_t; + * #PKE_KPT_RSA_DP1_3072. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_3072_input_s +{ + uint64_t c; /**< cipher text representative, < n (48 qwords)*/ + uint64_t kpt_wrapped; /**< (96 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_3072_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC GFP Partial Point Verification , + * Input parameter list for KPT RSA 4096 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #MATHS_POINT_VERIFY_GFP_521. - */ -typedef struct icp_qat_fw_maths_point_verify_gfp_521_input_s { - uint64_t xq; /**< x coordinate of candidate point (9 qwords)*/ - uint64_t yq; /**< y coordinate of candidate point (9 qwords)*/ - uint64_t q; /**< modulus (9 qwords)*/ - uint64_t a; /**< a equation coefficient (9 qwords)*/ - uint64_t b; /**< b equation coefficient (9 qwords)*/ -} icp_qat_fw_maths_point_verify_gfp_521_input_t; + * #PKE_KPT_RSA_DP1_4096. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_4096_input_s +{ + uint64_t c; /**< cipher text representative, < n (64 qwords)*/ + uint64_t kpt_wrapped; /**< (128 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_4096_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC curve25519 Variable Point Multiplication - * [k]P(x), as specified in RFC7748 , + * Input parameter list for KPT RSA 8192 Decryption , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #POINT_MULTIPLICATION_C25519. + * #PKE_KPT_RSA_DP1_8192. */ -typedef struct icp_qat_fw_point_multiplication_c25519_input_s { - uint64_t xp; /**< xP = Montgomery affine coordinate X of point P (4 - qwords)*/ - uint64_t k; /**< k = scalar (4 qwords)*/ -} icp_qat_fw_point_multiplication_c25519_input_t; +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_8192_input_s +{ + uint64_t c; /**< cipher text representative, < n (128 qwords)*/ + uint64_t kpt_wrapped; /**< (256 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_8192_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC curve25519 Generator Point Multiplication - * [k]G(x), as specified in RFC7748 , + * Input parameter list for RSA 512 decryption second form , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #GENERATOR_MULTIPLICATION_C25519. + * #PKE_KPT_RSA_DP2_512. */ -typedef struct icp_qat_fw_generator_multiplication_c25519_input_s { - uint64_t k; /**< k = scalar (4 qwords)*/ -} icp_qat_fw_generator_multiplication_c25519_input_t; +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_512_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (8 qwords)*/ + uint64_t kpt_wrapped; /**< (28 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_512_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC edwards25519 Variable Point Multiplication - * [k]P, as specified in RFC8032 , + * Input parameter list for RSA 1024 Decryption with CRT , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #POINT_MULTIPLICATION_ED25519. - */ -typedef struct icp_qat_fw_point_multiplication_ed25519_input_s { - uint64_t xp; /**< xP = Twisted Edwards affine coordinate X of point P - (4 qwords)*/ - uint64_t yp; /**< yP = Twisted Edwards affine coordinate Y of point P - (4 qwords)*/ - uint64_t k; /**< k = scalar (4 qwords)*/ -} icp_qat_fw_point_multiplication_ed25519_input_t; + * #PKE_KPT_RSA_DP2_1024. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_1024_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (16 qwords)*/ + uint64_t kpt_wrapped; /**< (56 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_1024_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC edwards25519 Generator Point Multiplication - * [k]G, as specified in RFC8032 , + * Input parameter list for KPT RSA 1536 Decryption with CRT , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #GENERATOR_MULTIPLICATION_ED25519. + * #PKE_KPT_RSA_DP2_1536. */ -typedef struct icp_qat_fw_generator_multiplication_ed25519_input_s { - uint64_t k; /**< k = scalar (4 qwords)*/ -} icp_qat_fw_generator_multiplication_ed25519_input_t; +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_1536_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (24 qwords)*/ + uint64_t kpt_wrapped; /**< (84 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_1536_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC curve448 Variable Point Multiplication - * [k]P(x), as specified in RFC7748 , + * Input parameter list for RSA 2048 Decryption with CRT , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #POINT_MULTIPLICATION_C448. + * #PKE_KPT_RSA_DP2_2048. */ -typedef struct icp_qat_fw_point_multiplication_c448_input_s { - uint64_t xp; /**< xP = Montgomery affine coordinate X of point P (8 - qwords)*/ - uint64_t k; /**< k = scalar (8 qwords)*/ -} icp_qat_fw_point_multiplication_c448_input_t; +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_2048_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (32 qwords)*/ + uint64_t kpt_wrapped; /**< (112 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_2048_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC curve448 Generator Point Multiplication - * [k]G(x), as specified in RFC7748 , + * Input parameter list for , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #GENERATOR_MULTIPLICATION_C448. + * #PKE_KPT_RSA_DP2_3072. */ -typedef struct icp_qat_fw_generator_multiplication_c448_input_s { - uint64_t k; /**< k = scalar (8 qwords)*/ -} icp_qat_fw_generator_multiplication_c448_input_t; +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_3072_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (48 qwords)*/ + uint64_t kpt_wrapped; /**< (168 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_3072_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC edwards448 Variable Point Multiplication - * [k]P, as specified in RFC8032 , + * Input parameter list for RSA 4096 Decryption with CRT , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #POINT_MULTIPLICATION_ED448. - */ -typedef struct icp_qat_fw_point_multiplication_ed448_input_s { - uint64_t - xp; /**< xP = Edwards affine coordinate X of point P (8 qwords)*/ - uint64_t - yp; /**< yP = Edwards affine coordinate Y of point P (8 qwords)*/ - uint64_t k; /**< k = scalar (8 qwords)*/ -} icp_qat_fw_point_multiplication_ed448_input_t; + * #PKE_KPT_RSA_DP2_4096. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_4096_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (64 qwords)*/ + uint64_t kpt_wrapped; /**< (224 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_4096_input_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Input parameter list for ECC edwards448 Generator Point Multiplication - * [k]P, as specified in RFC8032 , + * Input parameter list for RSA 8192 Decryption with CRT , * to be used when icp_qat_fw_pke_request_s::functionalityId is - * #GENERATOR_MULTIPLICATION_ED448. + * #PKE_KPT_RSA_DP2_8192. */ -typedef struct icp_qat_fw_generator_multiplication_ed448_input_s { - uint64_t k; /**< k = scalar (8 qwords)*/ -} icp_qat_fw_generator_multiplication_ed448_input_t; +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_8192_input_s +{ + uint64_t c; /**< cipher text representative, < (p*q) (128 qwords)*/ + uint64_t kpt_wrapped; /**< (448 qwords)*/ + uint64_t kpt_unwrap_context; /**< unwrap context (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_8192_input_t; /** * @ingroup icp_qat_fw_mmp * @brief * MMP input parameters */ -typedef union icp_qat_fw_mmp_input_param_u { - /** Generic parameter structure : All members of this wrapper structure - * are pointers to large integers. - */ - uint64_t flat_array[ICP_QAT_FW_PKE_INPUT_COUNT_MAX]; +typedef union icp_qat_fw_mmp_input_param_u +{ + /** Generic parameter structure : All members of this wrapper structure + * are pointers to large integers. + */ + uint64_t flat_array[ICP_QAT_FW_PKE_INPUT_COUNT_MAX]; + /** ECC P384 Variable Point Multiplication [k]P */ + + icp_qat_fw_mmp_ec_point_multiplication_p384_input_t + mmp_ec_point_multiplication_p384; + + /** ECC P384 Generator Point Multiplication [k]G */ + icp_qat_fw_mmp_ec_generator_multiplication_p384_input_t + mmp_ec_generator_multiplication_p384; + + /** ECC P384 ECDSA Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_t mmp_ecdsa_sign_rs_p384; + + /** ECC P256 Variable Point Multiplication [k]P */ + icp_qat_fw_mmp_ec_point_multiplication_p256_input_t + mmp_ec_point_multiplication_p256; + + /** ECC P256 Generator Point Multiplication [k]G */ + icp_qat_fw_mmp_ec_generator_multiplication_p256_input_t + mmp_ec_generator_multiplication_p256; + + /** ECC P256 ECDSA Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_t mmp_ecdsa_sign_rs_p256; + + /** Initialisation sequence */ + icp_qat_fw_mmp_init_input_t mmp_init; + + /** Diffie-Hellman Modular exponentiation base 2 for 768-bit numbers */ + icp_qat_fw_mmp_dh_g2_768_input_t mmp_dh_g2_768; + + /** Diffie-Hellman Modular exponentiation for 768-bit numbers */ + icp_qat_fw_mmp_dh_768_input_t mmp_dh_768; + + /** Diffie-Hellman Modular exponentiation base 2 for 1024-bit numbers */ + icp_qat_fw_mmp_dh_g2_1024_input_t mmp_dh_g2_1024; + + /** Diffie-Hellman Modular exponentiation for 1024-bit numbers */ + icp_qat_fw_mmp_dh_1024_input_t mmp_dh_1024; + + /** Diffie-Hellman Modular exponentiation base 2 for 1536-bit numbers */ + icp_qat_fw_mmp_dh_g2_1536_input_t mmp_dh_g2_1536; + + /** Diffie-Hellman Modular exponentiation for 1536-bit numbers */ + icp_qat_fw_mmp_dh_1536_input_t mmp_dh_1536; + + /** Diffie-Hellman Modular exponentiation base 2 for 2048-bit numbers */ + icp_qat_fw_mmp_dh_g2_2048_input_t mmp_dh_g2_2048; + + /** Diffie-Hellman Modular exponentiation for 2048-bit numbers */ + icp_qat_fw_mmp_dh_2048_input_t mmp_dh_2048; + + /** Diffie-Hellman Modular exponentiation base 2 for 3072-bit numbers */ + icp_qat_fw_mmp_dh_g2_3072_input_t mmp_dh_g2_3072; + + /** Diffie-Hellman Modular exponentiation for 3072-bit numbers */ + icp_qat_fw_mmp_dh_3072_input_t mmp_dh_3072; + + /** Diffie-Hellman Modular exponentiation base 2 for 4096-bit numbers */ + icp_qat_fw_mmp_dh_g2_4096_input_t mmp_dh_g2_4096; + + /** Diffie-Hellman Modular exponentiation for 4096-bit numbers */ + icp_qat_fw_mmp_dh_4096_input_t mmp_dh_4096; + + /** Diffie-Hellman Modular exponentiation base 2 for 8192-bit numbers */ + icp_qat_fw_mmp_dh_g2_8192_input_t mmp_dh_g2_8192; - /** Initialisation sequence */ - icp_qat_fw_mmp_init_input_t mmp_init; + /** Diffie-Hellman Modular exponentiation for 8192-bit numbers */ + icp_qat_fw_mmp_dh_8192_input_t mmp_dh_8192; - /** Diffie-Hellman Modular exponentiation base 2 for 768-bit numbers */ - icp_qat_fw_mmp_dh_g2_768_input_t mmp_dh_g2_768; + /** RSA 512 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_512_input_t mmp_rsa_kp1_512; - /** Diffie-Hellman Modular exponentiation for 768-bit numbers */ - icp_qat_fw_mmp_dh_768_input_t mmp_dh_768; + /** RSA 512 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_512_input_t mmp_rsa_kp2_512; - /** Diffie-Hellman Modular exponentiation base 2 for 1024-bit numbers */ - icp_qat_fw_mmp_dh_g2_1024_input_t mmp_dh_g2_1024; + /** RSA 512 Encryption */ + icp_qat_fw_mmp_rsa_ep_512_input_t mmp_rsa_ep_512; - /** Diffie-Hellman Modular exponentiation for 1024-bit numbers */ - icp_qat_fw_mmp_dh_1024_input_t mmp_dh_1024; + /** RSA 512 Decryption */ + icp_qat_fw_mmp_rsa_dp1_512_input_t mmp_rsa_dp1_512; - /** Diffie-Hellman Modular exponentiation base 2 for 1536-bit numbers */ - icp_qat_fw_mmp_dh_g2_1536_input_t mmp_dh_g2_1536; + /** RSA 1024 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_512_input_t mmp_rsa_dp2_512; - /** Diffie-Hellman Modular exponentiation for 1536-bit numbers */ - icp_qat_fw_mmp_dh_1536_input_t mmp_dh_1536; + /** RSA 1024 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_1024_input_t mmp_rsa_kp1_1024; - /** Diffie-Hellman Modular exponentiation base 2 for 2048-bit numbers */ - icp_qat_fw_mmp_dh_g2_2048_input_t mmp_dh_g2_2048; + /** RSA 1024 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_1024_input_t mmp_rsa_kp2_1024; - /** Diffie-Hellman Modular exponentiation for 2048-bit numbers */ - icp_qat_fw_mmp_dh_2048_input_t mmp_dh_2048; + /** RSA 1024 Encryption */ + icp_qat_fw_mmp_rsa_ep_1024_input_t mmp_rsa_ep_1024; - /** Diffie-Hellman Modular exponentiation base 2 for 3072-bit numbers */ - icp_qat_fw_mmp_dh_g2_3072_input_t mmp_dh_g2_3072; + /** RSA 1024 Decryption */ + icp_qat_fw_mmp_rsa_dp1_1024_input_t mmp_rsa_dp1_1024; - /** Diffie-Hellman Modular exponentiation for 3072-bit numbers */ - icp_qat_fw_mmp_dh_3072_input_t mmp_dh_3072; + /** RSA 1024 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_1024_input_t mmp_rsa_dp2_1024; - /** Diffie-Hellman Modular exponentiation base 2 for 4096-bit numbers */ - icp_qat_fw_mmp_dh_g2_4096_input_t mmp_dh_g2_4096; + /** RSA 1536 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_1536_input_t mmp_rsa_kp1_1536; - /** Diffie-Hellman Modular exponentiation for 4096-bit numbers */ - icp_qat_fw_mmp_dh_4096_input_t mmp_dh_4096; + /** RSA 1536 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_1536_input_t mmp_rsa_kp2_1536; - /** RSA 512 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_512_input_t mmp_rsa_kp1_512; + /** RSA 1536 Encryption */ + icp_qat_fw_mmp_rsa_ep_1536_input_t mmp_rsa_ep_1536; - /** RSA 512 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_512_input_t mmp_rsa_kp2_512; + /** RSA 1536 Decryption */ + icp_qat_fw_mmp_rsa_dp1_1536_input_t mmp_rsa_dp1_1536; - /** RSA 512 Encryption */ - icp_qat_fw_mmp_rsa_ep_512_input_t mmp_rsa_ep_512; + /** RSA 1536 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_1536_input_t mmp_rsa_dp2_1536; - /** RSA 512 Decryption */ - icp_qat_fw_mmp_rsa_dp1_512_input_t mmp_rsa_dp1_512; + /** RSA 2048 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_2048_input_t mmp_rsa_kp1_2048; - /** RSA 1024 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_512_input_t mmp_rsa_dp2_512; + /** RSA 2048 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_2048_input_t mmp_rsa_kp2_2048; - /** RSA 1024 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_1024_input_t mmp_rsa_kp1_1024; + /** RSA 2048 Encryption */ + icp_qat_fw_mmp_rsa_ep_2048_input_t mmp_rsa_ep_2048; - /** RSA 1024 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_1024_input_t mmp_rsa_kp2_1024; + /** RSA 2048 Decryption */ + icp_qat_fw_mmp_rsa_dp1_2048_input_t mmp_rsa_dp1_2048; - /** RSA 1024 Encryption */ - icp_qat_fw_mmp_rsa_ep_1024_input_t mmp_rsa_ep_1024; + /** RSA 2048 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_2048_input_t mmp_rsa_dp2_2048; - /** RSA 1024 Decryption */ - icp_qat_fw_mmp_rsa_dp1_1024_input_t mmp_rsa_dp1_1024; + /** RSA 3072 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_3072_input_t mmp_rsa_kp1_3072; - /** RSA 1024 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_1024_input_t mmp_rsa_dp2_1024; + /** RSA 3072 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_3072_input_t mmp_rsa_kp2_3072; - /** RSA 1536 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_1536_input_t mmp_rsa_kp1_1536; + /** RSA 3072 Encryption */ + icp_qat_fw_mmp_rsa_ep_3072_input_t mmp_rsa_ep_3072; - /** RSA 1536 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_1536_input_t mmp_rsa_kp2_1536; + /** RSA 3072 Decryption */ + icp_qat_fw_mmp_rsa_dp1_3072_input_t mmp_rsa_dp1_3072; - /** RSA 1536 Encryption */ - icp_qat_fw_mmp_rsa_ep_1536_input_t mmp_rsa_ep_1536; + /** RSA 3072 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_3072_input_t mmp_rsa_dp2_3072; - /** RSA 1536 Decryption */ - icp_qat_fw_mmp_rsa_dp1_1536_input_t mmp_rsa_dp1_1536; + /** RSA 4096 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_4096_input_t mmp_rsa_kp1_4096; - /** RSA 1536 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_1536_input_t mmp_rsa_dp2_1536; + /** RSA 4096 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_4096_input_t mmp_rsa_kp2_4096; - /** RSA 2048 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_2048_input_t mmp_rsa_kp1_2048; + /** RSA 4096 Encryption */ + icp_qat_fw_mmp_rsa_ep_4096_input_t mmp_rsa_ep_4096; - /** RSA 2048 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_2048_input_t mmp_rsa_kp2_2048; + /** RSA 4096 Decryption */ + icp_qat_fw_mmp_rsa_dp1_4096_input_t mmp_rsa_dp1_4096; - /** RSA 2048 Encryption */ - icp_qat_fw_mmp_rsa_ep_2048_input_t mmp_rsa_ep_2048; + /** RSA 4096 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_4096_input_t mmp_rsa_dp2_4096; - /** RSA 2048 Decryption */ - icp_qat_fw_mmp_rsa_dp1_2048_input_t mmp_rsa_dp1_2048; + /** RSA 8192 Encryption */ + icp_qat_fw_mmp_rsa_ep_8192_input_t mmp_rsa_ep_8192; - /** RSA 2048 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_2048_input_t mmp_rsa_dp2_2048; + /** RSA 8192 Decryption */ + icp_qat_fw_mmp_rsa_dp1_8192_input_t mmp_rsa_dp1_8192; - /** RSA 3072 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_3072_input_t mmp_rsa_kp1_3072; + /** RSA 8192 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_8192_input_t mmp_rsa_dp2_8192; - /** RSA 3072 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_3072_input_t mmp_rsa_kp2_3072; + /** GCD primality test for 192-bit numbers */ + icp_qat_fw_mmp_gcd_pt_192_input_t mmp_gcd_pt_192; - /** RSA 3072 Encryption */ - icp_qat_fw_mmp_rsa_ep_3072_input_t mmp_rsa_ep_3072; + /** GCD primality test for 256-bit numbers */ + icp_qat_fw_mmp_gcd_pt_256_input_t mmp_gcd_pt_256; - /** RSA 3072 Decryption */ - icp_qat_fw_mmp_rsa_dp1_3072_input_t mmp_rsa_dp1_3072; + /** GCD primality test for 384-bit numbers */ + icp_qat_fw_mmp_gcd_pt_384_input_t mmp_gcd_pt_384; - /** RSA 3072 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_3072_input_t mmp_rsa_dp2_3072; + /** GCD primality test for 512-bit numbers */ + icp_qat_fw_mmp_gcd_pt_512_input_t mmp_gcd_pt_512; - /** RSA 4096 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_4096_input_t mmp_rsa_kp1_4096; + /** GCD primality test for 768-bit numbers */ + icp_qat_fw_mmp_gcd_pt_768_input_t mmp_gcd_pt_768; - /** RSA 4096 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_4096_input_t mmp_rsa_kp2_4096; + /** GCD primality test for 1024-bit numbers */ + icp_qat_fw_mmp_gcd_pt_1024_input_t mmp_gcd_pt_1024; - /** RSA 4096 Encryption */ - icp_qat_fw_mmp_rsa_ep_4096_input_t mmp_rsa_ep_4096; + /** GCD primality test for 1536-bit numbers */ + icp_qat_fw_mmp_gcd_pt_1536_input_t mmp_gcd_pt_1536; - /** RSA 4096 Decryption */ - icp_qat_fw_mmp_rsa_dp1_4096_input_t mmp_rsa_dp1_4096; + /** GCD primality test for 2048-bit numbers */ + icp_qat_fw_mmp_gcd_pt_2048_input_t mmp_gcd_pt_2048; - /** RSA 4096 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_4096_input_t mmp_rsa_dp2_4096; + /** GCD primality test for 3072-bit numbers */ + icp_qat_fw_mmp_gcd_pt_3072_input_t mmp_gcd_pt_3072; - /** GCD primality test for 192-bit numbers */ - icp_qat_fw_mmp_gcd_pt_192_input_t mmp_gcd_pt_192; + /** GCD primality test for 4096-bit numbers */ + icp_qat_fw_mmp_gcd_pt_4096_input_t mmp_gcd_pt_4096; - /** GCD primality test for 256-bit numbers */ - icp_qat_fw_mmp_gcd_pt_256_input_t mmp_gcd_pt_256; + /** Fermat primality test for 160-bit numbers */ + icp_qat_fw_mmp_fermat_pt_160_input_t mmp_fermat_pt_160; - /** GCD primality test for 384-bit numbers */ - icp_qat_fw_mmp_gcd_pt_384_input_t mmp_gcd_pt_384; + /** Fermat primality test for 512-bit numbers */ + icp_qat_fw_mmp_fermat_pt_512_input_t mmp_fermat_pt_512; - /** GCD primality test for 512-bit numbers */ - icp_qat_fw_mmp_gcd_pt_512_input_t mmp_gcd_pt_512; + /** Fermat primality test for <e; 512-bit numbers */ + icp_qat_fw_mmp_fermat_pt_l512_input_t mmp_fermat_pt_l512; - /** GCD primality test for 768-bit numbers */ - icp_qat_fw_mmp_gcd_pt_768_input_t mmp_gcd_pt_768; + /** Fermat primality test for 768-bit numbers */ + icp_qat_fw_mmp_fermat_pt_768_input_t mmp_fermat_pt_768; - /** GCD primality test for 1024-bit numbers */ - icp_qat_fw_mmp_gcd_pt_1024_input_t mmp_gcd_pt_1024; + /** Fermat primality test for 1024-bit numbers */ + icp_qat_fw_mmp_fermat_pt_1024_input_t mmp_fermat_pt_1024; - /** GCD primality test for 1536-bit numbers */ - icp_qat_fw_mmp_gcd_pt_1536_input_t mmp_gcd_pt_1536; + /** Fermat primality test for 1536-bit numbers */ + icp_qat_fw_mmp_fermat_pt_1536_input_t mmp_fermat_pt_1536; - /** GCD primality test for 2048-bit numbers */ - icp_qat_fw_mmp_gcd_pt_2048_input_t mmp_gcd_pt_2048; + /** Fermat primality test for 2048-bit numbers */ + icp_qat_fw_mmp_fermat_pt_2048_input_t mmp_fermat_pt_2048; - /** GCD primality test for 3072-bit numbers */ - icp_qat_fw_mmp_gcd_pt_3072_input_t mmp_gcd_pt_3072; + /** Fermat primality test for 3072-bit numbers */ + icp_qat_fw_mmp_fermat_pt_3072_input_t mmp_fermat_pt_3072; - /** GCD primality test for 4096-bit numbers */ - icp_qat_fw_mmp_gcd_pt_4096_input_t mmp_gcd_pt_4096; + /** Fermat primality test for 4096-bit numbers */ + icp_qat_fw_mmp_fermat_pt_4096_input_t mmp_fermat_pt_4096; - /** Fermat primality test for 160-bit numbers */ - icp_qat_fw_mmp_fermat_pt_160_input_t mmp_fermat_pt_160; + /** Miller-Rabin primality test for 160-bit numbers */ + icp_qat_fw_mmp_mr_pt_160_input_t mmp_mr_pt_160; - /** Fermat primality test for 512-bit numbers */ - icp_qat_fw_mmp_fermat_pt_512_input_t mmp_fermat_pt_512; + /** Miller-Rabin primality test for 512-bit numbers */ + icp_qat_fw_mmp_mr_pt_512_input_t mmp_mr_pt_512; - /** Fermat primality test for <e; 512-bit numbers */ - icp_qat_fw_mmp_fermat_pt_l512_input_t mmp_fermat_pt_l512; + /** Miller-Rabin primality test for 768-bit numbers */ + icp_qat_fw_mmp_mr_pt_768_input_t mmp_mr_pt_768; - /** Fermat primality test for 768-bit numbers */ - icp_qat_fw_mmp_fermat_pt_768_input_t mmp_fermat_pt_768; + /** Miller-Rabin primality test for 1024-bit numbers */ + icp_qat_fw_mmp_mr_pt_1024_input_t mmp_mr_pt_1024; - /** Fermat primality test for 1024-bit numbers */ - icp_qat_fw_mmp_fermat_pt_1024_input_t mmp_fermat_pt_1024; + /** Miller-Rabin primality test for 1536-bit numbers */ + icp_qat_fw_mmp_mr_pt_1536_input_t mmp_mr_pt_1536; - /** Fermat primality test for 1536-bit numbers */ - icp_qat_fw_mmp_fermat_pt_1536_input_t mmp_fermat_pt_1536; + /** Miller-Rabin primality test for 2048-bit numbers */ + icp_qat_fw_mmp_mr_pt_2048_input_t mmp_mr_pt_2048; - /** Fermat primality test for 2048-bit numbers */ - icp_qat_fw_mmp_fermat_pt_2048_input_t mmp_fermat_pt_2048; + /** Miller-Rabin primality test for 3072-bit numbers */ + icp_qat_fw_mmp_mr_pt_3072_input_t mmp_mr_pt_3072; - /** Fermat primality test for 3072-bit numbers */ - icp_qat_fw_mmp_fermat_pt_3072_input_t mmp_fermat_pt_3072; + /** Miller-Rabin primality test for 4096-bit numbers */ + icp_qat_fw_mmp_mr_pt_4096_input_t mmp_mr_pt_4096; - /** Fermat primality test for 4096-bit numbers */ - icp_qat_fw_mmp_fermat_pt_4096_input_t mmp_fermat_pt_4096; + /** Miller-Rabin primality test for 512-bit numbers */ + icp_qat_fw_mmp_mr_pt_l512_input_t mmp_mr_pt_l512; - /** Miller-Rabin primality test for 160-bit numbers */ - icp_qat_fw_mmp_mr_pt_160_input_t mmp_mr_pt_160; + /** Lucas primality test for 160-bit numbers */ + icp_qat_fw_mmp_lucas_pt_160_input_t mmp_lucas_pt_160; - /** Miller-Rabin primality test for 512-bit numbers */ - icp_qat_fw_mmp_mr_pt_512_input_t mmp_mr_pt_512; + /** Lucas primality test for 512-bit numbers */ + icp_qat_fw_mmp_lucas_pt_512_input_t mmp_lucas_pt_512; - /** Miller-Rabin primality test for 768-bit numbers */ - icp_qat_fw_mmp_mr_pt_768_input_t mmp_mr_pt_768; + /** Lucas primality test for 768-bit numbers */ + icp_qat_fw_mmp_lucas_pt_768_input_t mmp_lucas_pt_768; - /** Miller-Rabin primality test for 1024-bit numbers */ - icp_qat_fw_mmp_mr_pt_1024_input_t mmp_mr_pt_1024; + /** Lucas primality test for 1024-bit numbers */ + icp_qat_fw_mmp_lucas_pt_1024_input_t mmp_lucas_pt_1024; - /** Miller-Rabin primality test for 1536-bit numbers */ - icp_qat_fw_mmp_mr_pt_1536_input_t mmp_mr_pt_1536; + /** Lucas primality test for 1536-bit numbers */ + icp_qat_fw_mmp_lucas_pt_1536_input_t mmp_lucas_pt_1536; - /** Miller-Rabin primality test for 2048-bit numbers */ - icp_qat_fw_mmp_mr_pt_2048_input_t mmp_mr_pt_2048; + /** Lucas primality test for 2048-bit numbers */ + icp_qat_fw_mmp_lucas_pt_2048_input_t mmp_lucas_pt_2048; - /** Miller-Rabin primality test for 3072-bit numbers */ - icp_qat_fw_mmp_mr_pt_3072_input_t mmp_mr_pt_3072; + /** Lucas primality test for 3072-bit numbers */ + icp_qat_fw_mmp_lucas_pt_3072_input_t mmp_lucas_pt_3072; - /** Miller-Rabin primality test for 4096-bit numbers */ - icp_qat_fw_mmp_mr_pt_4096_input_t mmp_mr_pt_4096; + /** Lucas primality test for 4096-bit numbers */ + icp_qat_fw_mmp_lucas_pt_4096_input_t mmp_lucas_pt_4096; - /** Miller-Rabin primality test for 512-bit numbers */ - icp_qat_fw_mmp_mr_pt_l512_input_t mmp_mr_pt_l512; + /** Lucas primality test for L512-bit numbers */ + icp_qat_fw_mmp_lucas_pt_l512_input_t mmp_lucas_pt_l512; - /** Lucas primality test for 160-bit numbers */ - icp_qat_fw_mmp_lucas_pt_160_input_t mmp_lucas_pt_160; + /** Modular exponentiation for numbers less than 512-bits */ + icp_qat_fw_maths_modexp_l512_input_t maths_modexp_l512; - /** Lucas primality test for 512-bit numbers */ - icp_qat_fw_mmp_lucas_pt_512_input_t mmp_lucas_pt_512; + /** Modular exponentiation for numbers less than 1024-bit */ + icp_qat_fw_maths_modexp_l1024_input_t maths_modexp_l1024; - /** Lucas primality test for 768-bit numbers */ - icp_qat_fw_mmp_lucas_pt_768_input_t mmp_lucas_pt_768; + /** Modular exponentiation for numbers less than 1536-bits */ + icp_qat_fw_maths_modexp_l1536_input_t maths_modexp_l1536; - /** Lucas primality test for 1024-bit numbers */ - icp_qat_fw_mmp_lucas_pt_1024_input_t mmp_lucas_pt_1024; + /** Modular exponentiation for numbers less than 2048-bit */ + icp_qat_fw_maths_modexp_l2048_input_t maths_modexp_l2048; - /** Lucas primality test for 1536-bit numbers */ - icp_qat_fw_mmp_lucas_pt_1536_input_t mmp_lucas_pt_1536; + /** Modular exponentiation for numbers less than 2560-bits */ + icp_qat_fw_maths_modexp_l2560_input_t maths_modexp_l2560; - /** Lucas primality test for 2048-bit numbers */ - icp_qat_fw_mmp_lucas_pt_2048_input_t mmp_lucas_pt_2048; + /** Modular exponentiation for numbers less than 3072-bits */ + icp_qat_fw_maths_modexp_l3072_input_t maths_modexp_l3072; - /** Lucas primality test for 3072-bit numbers */ - icp_qat_fw_mmp_lucas_pt_3072_input_t mmp_lucas_pt_3072; + /** Modular exponentiation for numbers less than 3584-bits */ + icp_qat_fw_maths_modexp_l3584_input_t maths_modexp_l3584; - /** Lucas primality test for 4096-bit numbers */ - icp_qat_fw_mmp_lucas_pt_4096_input_t mmp_lucas_pt_4096; + /** Modular exponentiation for numbers less than 4096-bit */ + icp_qat_fw_maths_modexp_l4096_input_t maths_modexp_l4096; - /** Lucas primality test for L512-bit numbers */ - icp_qat_fw_mmp_lucas_pt_l512_input_t mmp_lucas_pt_l512; + /** Modular exponentiation for numbers up to 8192 bits */ + icp_qat_fw_maths_modexp_l8192_input_t maths_modexp_l8192; - /** Modular exponentiation for numbers less than 512-bits */ - icp_qat_fw_maths_modexp_l512_input_t maths_modexp_l512; + /** Modular multiplicative inverse for numbers less than 128 bits */ + icp_qat_fw_maths_modinv_odd_l128_input_t maths_modinv_odd_l128; - /** Modular exponentiation for numbers less than 1024-bit */ - icp_qat_fw_maths_modexp_l1024_input_t maths_modexp_l1024; + /** Modular multiplicative inverse for numbers less than 192 bits */ + icp_qat_fw_maths_modinv_odd_l192_input_t maths_modinv_odd_l192; - /** Modular exponentiation for numbers less than 1536-bits */ - icp_qat_fw_maths_modexp_l1536_input_t maths_modexp_l1536; + /** Modular multiplicative inverse for numbers less than 256 bits */ + icp_qat_fw_maths_modinv_odd_l256_input_t maths_modinv_odd_l256; - /** Modular exponentiation for numbers less than 2048-bit */ - icp_qat_fw_maths_modexp_l2048_input_t maths_modexp_l2048; + /** Modular multiplicative inverse for numbers less than 384 bits */ + icp_qat_fw_maths_modinv_odd_l384_input_t maths_modinv_odd_l384; - /** Modular exponentiation for numbers less than 2560-bits */ - icp_qat_fw_maths_modexp_l2560_input_t maths_modexp_l2560; + /** Modular multiplicative inverse for numbers less than 512 bits */ + icp_qat_fw_maths_modinv_odd_l512_input_t maths_modinv_odd_l512; - /** Modular exponentiation for numbers less than 3072-bits */ - icp_qat_fw_maths_modexp_l3072_input_t maths_modexp_l3072; + /** Modular multiplicative inverse for numbers less than 768 bits */ + icp_qat_fw_maths_modinv_odd_l768_input_t maths_modinv_odd_l768; - /** Modular exponentiation for numbers less than 3584-bits */ - icp_qat_fw_maths_modexp_l3584_input_t maths_modexp_l3584; + /** Modular multiplicative inverse for numbers less than 1024 bits */ + icp_qat_fw_maths_modinv_odd_l1024_input_t maths_modinv_odd_l1024; - /** Modular exponentiation for numbers less than 4096-bit */ - icp_qat_fw_maths_modexp_l4096_input_t maths_modexp_l4096; + /** Modular multiplicative inverse for numbers less than 1536 bits */ + icp_qat_fw_maths_modinv_odd_l1536_input_t maths_modinv_odd_l1536; - /** Modular multiplicative inverse for numbers less than 128 bits */ - icp_qat_fw_maths_modinv_odd_l128_input_t maths_modinv_odd_l128; + /** Modular multiplicative inverse for numbers less than 2048 bits */ + icp_qat_fw_maths_modinv_odd_l2048_input_t maths_modinv_odd_l2048; - /** Modular multiplicative inverse for numbers less than 192 bits */ - icp_qat_fw_maths_modinv_odd_l192_input_t maths_modinv_odd_l192; + /** Modular multiplicative inverse for numbers less than 3072 bits */ + icp_qat_fw_maths_modinv_odd_l3072_input_t maths_modinv_odd_l3072; - /** Modular multiplicative inverse for numbers less than 256 bits */ - icp_qat_fw_maths_modinv_odd_l256_input_t maths_modinv_odd_l256; + /** Modular multiplicative inverse for numbers less than 4096 bits */ + icp_qat_fw_maths_modinv_odd_l4096_input_t maths_modinv_odd_l4096; - /** Modular multiplicative inverse for numbers less than 384 bits */ - icp_qat_fw_maths_modinv_odd_l384_input_t maths_modinv_odd_l384; + /** Modular multiplicative inverse for numbers up to 8192 bits */ + icp_qat_fw_maths_modinv_odd_l8192_input_t maths_modinv_odd_l8192; - /** Modular multiplicative inverse for numbers less than 512 bits */ - icp_qat_fw_maths_modinv_odd_l512_input_t maths_modinv_odd_l512; + /** Modular multiplicative inverse for numbers less than 128 bits */ + icp_qat_fw_maths_modinv_even_l128_input_t maths_modinv_even_l128; - /** Modular multiplicative inverse for numbers less than 768 bits */ - icp_qat_fw_maths_modinv_odd_l768_input_t maths_modinv_odd_l768; + /** Modular multiplicative inverse for numbers less than 192 bits */ + icp_qat_fw_maths_modinv_even_l192_input_t maths_modinv_even_l192; - /** Modular multiplicative inverse for numbers less than 1024 bits */ - icp_qat_fw_maths_modinv_odd_l1024_input_t maths_modinv_odd_l1024; + /** Modular multiplicative inverse for numbers less than 256 bits */ + icp_qat_fw_maths_modinv_even_l256_input_t maths_modinv_even_l256; - /** Modular multiplicative inverse for numbers less than 1536 bits */ - icp_qat_fw_maths_modinv_odd_l1536_input_t maths_modinv_odd_l1536; + /** Modular multiplicative inverse for numbers less than 384 bits */ + icp_qat_fw_maths_modinv_even_l384_input_t maths_modinv_even_l384; - /** Modular multiplicative inverse for numbers less than 2048 bits */ - icp_qat_fw_maths_modinv_odd_l2048_input_t maths_modinv_odd_l2048; + /** Modular multiplicative inverse for numbers less than 512 bits */ + icp_qat_fw_maths_modinv_even_l512_input_t maths_modinv_even_l512; - /** Modular multiplicative inverse for numbers less than 3072 bits */ - icp_qat_fw_maths_modinv_odd_l3072_input_t maths_modinv_odd_l3072; + /** Modular multiplicative inverse for numbers less than 768 bits */ + icp_qat_fw_maths_modinv_even_l768_input_t maths_modinv_even_l768; - /** Modular multiplicative inverse for numbers less than 4096 bits */ - icp_qat_fw_maths_modinv_odd_l4096_input_t maths_modinv_odd_l4096; + /** Modular multiplicative inverse for numbers less than 1024 bits */ + icp_qat_fw_maths_modinv_even_l1024_input_t maths_modinv_even_l1024; - /** Modular multiplicative inverse for numbers less than 128 bits */ - icp_qat_fw_maths_modinv_even_l128_input_t maths_modinv_even_l128; + /** Modular multiplicative inverse for numbers less than 1536 bits */ + icp_qat_fw_maths_modinv_even_l1536_input_t maths_modinv_even_l1536; - /** Modular multiplicative inverse for numbers less than 192 bits */ - icp_qat_fw_maths_modinv_even_l192_input_t maths_modinv_even_l192; + /** Modular multiplicative inverse for numbers less than 2048 bits */ + icp_qat_fw_maths_modinv_even_l2048_input_t maths_modinv_even_l2048; - /** Modular multiplicative inverse for numbers less than 256 bits */ - icp_qat_fw_maths_modinv_even_l256_input_t maths_modinv_even_l256; + /** Modular multiplicative inverse for numbers less than 3072 bits */ + icp_qat_fw_maths_modinv_even_l3072_input_t maths_modinv_even_l3072; - /** Modular multiplicative inverse for numbers less than 384 bits */ - icp_qat_fw_maths_modinv_even_l384_input_t maths_modinv_even_l384; + /** Modular multiplicative inverse for numbers less than 4096 bits */ + icp_qat_fw_maths_modinv_even_l4096_input_t maths_modinv_even_l4096; - /** Modular multiplicative inverse for numbers less than 512 bits */ - icp_qat_fw_maths_modinv_even_l512_input_t maths_modinv_even_l512; + /** Modular multiplicative inverse for numbers up to 8192 bits */ + icp_qat_fw_maths_modinv_even_l8192_input_t maths_modinv_even_l8192; - /** Modular multiplicative inverse for numbers less than 768 bits */ - icp_qat_fw_maths_modinv_even_l768_input_t maths_modinv_even_l768; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_1024_160_input_t mmp_dsa_gen_p_1024_160; - /** Modular multiplicative inverse for numbers less than 1024 bits */ - icp_qat_fw_maths_modinv_even_l1024_input_t maths_modinv_even_l1024; + /** DSA key generation G */ + icp_qat_fw_mmp_dsa_gen_g_1024_input_t mmp_dsa_gen_g_1024; - /** Modular multiplicative inverse for numbers less than 1536 bits */ - icp_qat_fw_maths_modinv_even_l1536_input_t maths_modinv_even_l1536; + /** DSA key generation Y */ + icp_qat_fw_mmp_dsa_gen_y_1024_input_t mmp_dsa_gen_y_1024; - /** Modular multiplicative inverse for numbers less than 2048 bits */ - icp_qat_fw_maths_modinv_even_l2048_input_t maths_modinv_even_l2048; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_1024_160_input_t mmp_dsa_sign_r_1024_160; - /** Modular multiplicative inverse for numbers less than 3072 bits */ - icp_qat_fw_maths_modinv_even_l3072_input_t maths_modinv_even_l3072; + /** DSA Sign S */ + icp_qat_fw_mmp_dsa_sign_s_160_input_t mmp_dsa_sign_s_160; - /** Modular multiplicative inverse for numbers less than 4096 bits */ - icp_qat_fw_maths_modinv_even_l4096_input_t maths_modinv_even_l4096; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_t mmp_dsa_sign_r_s_1024_160; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_1024_160_input_t mmp_dsa_gen_p_1024_160; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_1024_160_input_t mmp_dsa_verify_1024_160; - /** DSA key generation G */ - icp_qat_fw_mmp_dsa_gen_g_1024_input_t mmp_dsa_gen_g_1024; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_2048_224_input_t mmp_dsa_gen_p_2048_224; - /** DSA key generation Y */ - icp_qat_fw_mmp_dsa_gen_y_1024_input_t mmp_dsa_gen_y_1024; + /** DSA key generation Y */ + icp_qat_fw_mmp_dsa_gen_y_2048_input_t mmp_dsa_gen_y_2048; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_1024_160_input_t mmp_dsa_sign_r_1024_160; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_2048_224_input_t mmp_dsa_sign_r_2048_224; - /** DSA Sign S */ - icp_qat_fw_mmp_dsa_sign_s_160_input_t mmp_dsa_sign_s_160; + /** DSA Sign S */ + icp_qat_fw_mmp_dsa_sign_s_224_input_t mmp_dsa_sign_s_224; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_t mmp_dsa_sign_r_s_1024_160; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_t mmp_dsa_sign_r_s_2048_224; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_1024_160_input_t mmp_dsa_verify_1024_160; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_2048_224_input_t mmp_dsa_verify_2048_224; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_2048_224_input_t mmp_dsa_gen_p_2048_224; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_2048_256_input_t mmp_dsa_gen_p_2048_256; - /** DSA key generation Y */ - icp_qat_fw_mmp_dsa_gen_y_2048_input_t mmp_dsa_gen_y_2048; + /** DSA key generation G */ + icp_qat_fw_mmp_dsa_gen_g_2048_input_t mmp_dsa_gen_g_2048; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_2048_224_input_t mmp_dsa_sign_r_2048_224; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_2048_256_input_t mmp_dsa_sign_r_2048_256; - /** DSA Sign S */ - icp_qat_fw_mmp_dsa_sign_s_224_input_t mmp_dsa_sign_s_224; + /** DSA Sign S */ + icp_qat_fw_mmp_dsa_sign_s_256_input_t mmp_dsa_sign_s_256; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_t mmp_dsa_sign_r_s_2048_224; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_t mmp_dsa_sign_r_s_2048_256; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_2048_224_input_t mmp_dsa_verify_2048_224; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_2048_256_input_t mmp_dsa_verify_2048_256; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_2048_256_input_t mmp_dsa_gen_p_2048_256; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_3072_256_input_t mmp_dsa_gen_p_3072_256; - /** DSA key generation G */ - icp_qat_fw_mmp_dsa_gen_g_2048_input_t mmp_dsa_gen_g_2048; + /** DSA key generation G */ + icp_qat_fw_mmp_dsa_gen_g_3072_input_t mmp_dsa_gen_g_3072; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_2048_256_input_t mmp_dsa_sign_r_2048_256; + /** DSA key generation Y */ + icp_qat_fw_mmp_dsa_gen_y_3072_input_t mmp_dsa_gen_y_3072; - /** DSA Sign S */ - icp_qat_fw_mmp_dsa_sign_s_256_input_t mmp_dsa_sign_s_256; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_3072_256_input_t mmp_dsa_sign_r_3072_256; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_t mmp_dsa_sign_r_s_2048_256; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_t mmp_dsa_sign_r_s_3072_256; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_2048_256_input_t mmp_dsa_verify_2048_256; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_3072_256_input_t mmp_dsa_verify_3072_256; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_3072_256_input_t mmp_dsa_gen_p_3072_256; + /** ECDSA Sign RS for curves B/K-163 and B/K-233 */ + icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input_t mmp_ecdsa_sign_rs_gf2_l256; - /** DSA key generation G */ - icp_qat_fw_mmp_dsa_gen_g_3072_input_t mmp_dsa_gen_g_3072; + /** ECDSA Sign R for curves B/K-163 and B/K-233 */ + icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_t mmp_ecdsa_sign_r_gf2_l256; - /** DSA key generation Y */ - icp_qat_fw_mmp_dsa_gen_y_3072_input_t mmp_dsa_gen_y_3072; + /** ECDSA Sign S for curves with n < 2^256 */ + icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_t mmp_ecdsa_sign_s_gf2_l256; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_3072_256_input_t mmp_dsa_sign_r_3072_256; + /** ECDSA Verify for curves B/K-163 and B/K-233 */ + icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_t mmp_ecdsa_verify_gf2_l256; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_t mmp_dsa_sign_r_s_3072_256; + /** ECDSA Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_t mmp_ecdsa_sign_rs_gf2_l512; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_3072_256_input_t mmp_dsa_verify_3072_256; + /** ECDSA GF2 Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_t mmp_ecdsa_sign_r_gf2_l512; - /** ECDSA Sign RS for curves B/K-163 and B/K-233 */ - icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input_t - mmp_ecdsa_sign_rs_gf2_l256; + /** ECDSA GF2 Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_t mmp_ecdsa_sign_s_gf2_l512; - /** ECDSA Sign R for curves B/K-163 and B/K-233 */ - icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_t mmp_ecdsa_sign_r_gf2_l256; + /** ECDSA GF2 Verify */ + icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_t mmp_ecdsa_verify_gf2_l512; - /** ECDSA Sign S for curves with n < 2^256 */ - icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_t mmp_ecdsa_sign_s_gf2_l256; + /** ECDSA GF2 Sign RS for curves B-571/K-571 */ + icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_t mmp_ecdsa_sign_rs_gf2_571; - /** ECDSA Verify for curves B/K-163 and B/K-233 */ - icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_t mmp_ecdsa_verify_gf2_l256; + /** ECDSA GF2 Sign S for curves with deg(q) < 576 */ + icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_t mmp_ecdsa_sign_s_gf2_571; - /** ECDSA Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_t - mmp_ecdsa_sign_rs_gf2_l512; + /** ECDSA GF2 Sign R for degree 571 */ + icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_t mmp_ecdsa_sign_r_gf2_571; - /** ECDSA GF2 Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_t mmp_ecdsa_sign_r_gf2_l512; + /** ECDSA GF2 Verify for degree 571 */ + icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_t mmp_ecdsa_verify_gf2_571; - /** ECDSA GF2 Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_t mmp_ecdsa_sign_s_gf2_l512; + /** MATHS GF2 Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gf2_l256_input_t maths_point_multiplication_gf2_l256; - /** ECDSA GF2 Verify */ - icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_t mmp_ecdsa_verify_gf2_l512; + /** MATHS GF2 Point Verification */ + icp_qat_fw_maths_point_verify_gf2_l256_input_t maths_point_verify_gf2_l256; - /** ECDSA GF2 Sign RS for curves B-571/K-571 */ - icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_t mmp_ecdsa_sign_rs_gf2_571; + /** MATHS GF2 Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gf2_l512_input_t maths_point_multiplication_gf2_l512; - /** ECDSA GF2 Sign S for curves with deg(q) < 576 */ - icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_t mmp_ecdsa_sign_s_gf2_571; + /** MATHS GF2 Point Verification */ + icp_qat_fw_maths_point_verify_gf2_l512_input_t maths_point_verify_gf2_l512; - /** ECDSA GF2 Sign R for degree 571 */ - icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_t mmp_ecdsa_sign_r_gf2_571; + /** ECC GF2 Point Multiplication for curves B-571/K-571 */ + icp_qat_fw_maths_point_multiplication_gf2_571_input_t maths_point_multiplication_gf2_571; - /** ECDSA GF2 Verify for degree 571 */ - icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_t mmp_ecdsa_verify_gf2_571; + /** ECC GF2 Point Verification for degree 571 */ + icp_qat_fw_maths_point_verify_gf2_571_input_t maths_point_verify_gf2_571; - /** MATHS GF2 Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gf2_l256_input_t - maths_point_multiplication_gf2_l256; + /** ECDSA GFP Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_t mmp_ecdsa_sign_r_gfp_l256; - /** MATHS GF2 Point Verification */ - icp_qat_fw_maths_point_verify_gf2_l256_input_t - maths_point_verify_gf2_l256; + /** ECDSA GFP Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_t mmp_ecdsa_sign_s_gfp_l256; - /** MATHS GF2 Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gf2_l512_input_t - maths_point_multiplication_gf2_l512; + /** ECDSA GFP Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_t mmp_ecdsa_sign_rs_gfp_l256; - /** MATHS GF2 Point Verification */ - icp_qat_fw_maths_point_verify_gf2_l512_input_t - maths_point_verify_gf2_l512; + /** ECDSA GFP Verify */ + icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_t mmp_ecdsa_verify_gfp_l256; - /** ECC GF2 Point Multiplication for curves B-571/K-571 */ - icp_qat_fw_maths_point_multiplication_gf2_571_input_t - maths_point_multiplication_gf2_571; + /** ECDSA GFP Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_t mmp_ecdsa_sign_r_gfp_l512; - /** ECC GF2 Point Verification for degree 571 */ - icp_qat_fw_maths_point_verify_gf2_571_input_t - maths_point_verify_gf2_571; + /** ECDSA GFP Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_t mmp_ecdsa_sign_s_gfp_l512; - /** ECDSA GFP Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_t mmp_ecdsa_sign_r_gfp_l256; + /** ECDSA GFP Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_t mmp_ecdsa_sign_rs_gfp_l512; - /** ECDSA GFP Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_t mmp_ecdsa_sign_s_gfp_l256; + /** ECDSA GFP Verify */ + icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_t mmp_ecdsa_verify_gfp_l512; - /** ECDSA GFP Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_t - mmp_ecdsa_sign_rs_gfp_l256; + /** ECDSA GFP Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_t mmp_ecdsa_sign_r_gfp_521; - /** ECDSA GFP Verify */ - icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_t mmp_ecdsa_verify_gfp_l256; + /** ECDSA GFP Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_t mmp_ecdsa_sign_s_gfp_521; - /** ECDSA GFP Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_t mmp_ecdsa_sign_r_gfp_l512; + /** ECDSA GFP Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_t mmp_ecdsa_sign_rs_gfp_521; - /** ECDSA GFP Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_t mmp_ecdsa_sign_s_gfp_l512; + /** ECDSA GFP Verify */ + icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_t mmp_ecdsa_verify_gfp_521; - /** ECDSA GFP Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_t - mmp_ecdsa_sign_rs_gfp_l512; + /** ECC GFP Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gfp_l256_input_t maths_point_multiplication_gfp_l256; - /** ECDSA GFP Verify */ - icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_t mmp_ecdsa_verify_gfp_l512; + /** ECC GFP Partial Point Verification */ + icp_qat_fw_maths_point_verify_gfp_l256_input_t maths_point_verify_gfp_l256; - /** ECDSA GFP Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_t mmp_ecdsa_sign_r_gfp_521; + /** ECC GFP Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gfp_l512_input_t maths_point_multiplication_gfp_l512; - /** ECDSA GFP Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_t mmp_ecdsa_sign_s_gfp_521; + /** ECC GFP Partial Point */ + icp_qat_fw_maths_point_verify_gfp_l512_input_t maths_point_verify_gfp_l512; - /** ECDSA GFP Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_t mmp_ecdsa_sign_rs_gfp_521; + /** ECC GFP Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gfp_521_input_t maths_point_multiplication_gfp_521; - /** ECDSA GFP Verify */ - icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_t mmp_ecdsa_verify_gfp_521; + /** ECC GFP Partial Point Verification */ + icp_qat_fw_maths_point_verify_gfp_521_input_t maths_point_verify_gfp_521; - /** ECC GFP Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gfp_l256_input_t - maths_point_multiplication_gfp_l256; + /** ECC curve25519 Variable Point Multiplication [k]P(x), as specified in RFC7748 */ + icp_qat_fw_point_multiplication_c25519_input_t point_multiplication_c25519; - /** ECC GFP Partial Point Verification */ - icp_qat_fw_maths_point_verify_gfp_l256_input_t - maths_point_verify_gfp_l256; + /** ECC curve25519 Generator Point Multiplication [k]G(x), as specified in RFC7748 */ + icp_qat_fw_generator_multiplication_c25519_input_t generator_multiplication_c25519; - /** ECC GFP Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gfp_l512_input_t - maths_point_multiplication_gfp_l512; + /** ECC edwards25519 Variable Point Multiplication [k]P, as specified in RFC8032 */ + icp_qat_fw_point_multiplication_ed25519_input_t point_multiplication_ed25519; - /** ECC GFP Partial Point */ - icp_qat_fw_maths_point_verify_gfp_l512_input_t - maths_point_verify_gfp_l512; + /** ECC edwards25519 Generator Point Multiplication [k]G, as specified in RFC8032 */ + icp_qat_fw_generator_multiplication_ed25519_input_t generator_multiplication_ed25519; - /** ECC GFP Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gfp_521_input_t - maths_point_multiplication_gfp_521; + /** ECC curve448 Variable Point Multiplication [k]P(x), as specified in RFC7748 */ + icp_qat_fw_point_multiplication_c448_input_t point_multiplication_c448; - /** ECC GFP Partial Point Verification */ - icp_qat_fw_maths_point_verify_gfp_521_input_t - maths_point_verify_gfp_521; + /** ECC curve448 Generator Point Multiplication [k]G(x), as specified in RFC7748 */ + icp_qat_fw_generator_multiplication_c448_input_t generator_multiplication_c448; - /** ECC curve25519 Variable Point Multiplication [k]P(x), as specified - * in RFC7748 */ - icp_qat_fw_point_multiplication_c25519_input_t - point_multiplication_c25519; + /** ECC edwards448 Variable Point Multiplication [k]P, as specified in RFC8032 */ + icp_qat_fw_point_multiplication_ed448_input_t point_multiplication_ed448; - /** ECC curve25519 Generator Point Multiplication [k]G(x), as specified - * in RFC7748 */ - icp_qat_fw_generator_multiplication_c25519_input_t - generator_multiplication_c25519; + /** ECC edwards448 Generator Point Multiplication [k]P, as specified in RFC8032 */ + icp_qat_fw_generator_multiplication_ed448_input_t generator_multiplication_ed448; - /** ECC edwards25519 Variable Point Multiplication [k]P, as specified in - * RFC8032 */ - icp_qat_fw_point_multiplication_ed25519_input_t - point_multiplication_ed25519; + /** ECC P521 ECDSA Sign RS */ + icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_input_t mmp_kpt_ecdsa_sign_rs_p521; - /** ECC edwards25519 Generator Point Multiplication [k]G, as specified - * in RFC8032 */ - icp_qat_fw_generator_multiplication_ed25519_input_t - generator_multiplication_ed25519; + /** ECC P384 ECDSA Sign RS */ + icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_input_t mmp_kpt_ecdsa_sign_rs_p384; + + /** ECC KPT P256 ECDSA Sign RS */ + icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_input_t mmp_kpt_ecdsa_sign_rs_p256; + + /** KPT RSA 512 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_512_input_t mmp_kpt_rsa_dp1_512; + + /** KPT RSA 1024 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_1024_input_t mmp_kpt_rsa_dp1_1024; + + /** KPT RSA 1536 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_1536_input_t mmp_kpt_rsa_dp1_1536; + + /** KPT RSA 2048 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_2048_input_t mmp_kpt_rsa_dp1_2048; + + /** KPT RSA 3072 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_3072_input_t mmp_kpt_rsa_dp1_3072; + + /** KPT RSA 4096 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_4096_input_t mmp_kpt_rsa_dp1_4096; + + /** KPT RSA 8192 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_8192_input_t mmp_kpt_rsa_dp1_8192; + + /** RSA 512 decryption second form */ + icp_qat_fw_mmp_kpt_rsa_dp2_512_input_t mmp_kpt_rsa_dp2_512; + + /** RSA 1024 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_1024_input_t mmp_kpt_rsa_dp2_1024; + + /** KPT RSA 1536 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_1536_input_t mmp_kpt_rsa_dp2_1536; + + /** RSA 2048 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_2048_input_t mmp_kpt_rsa_dp2_2048; + + /** */ + icp_qat_fw_mmp_kpt_rsa_dp2_3072_input_t mmp_kpt_rsa_dp2_3072; + + /** RSA 4096 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_4096_input_t mmp_kpt_rsa_dp2_4096; + + /** RSA 8192 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_8192_input_t mmp_kpt_rsa_dp2_8192; + +} icp_qat_fw_mmp_input_param_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P384 Variable Point Multiplication [k]P , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_EC_POINT_MULTIPLICATION_P384. + */ +typedef struct icp_qat_fw_mmp_ec_point_multiplication_p384_output_s +{ + uint64_t xr; /**< xR = affine coordinate X of point [k]P (6 qwords)*/ + uint64_t yr; /**< yR = affine coordinate Y of point [k]P (6 qwords)*/ +} icp_qat_fw_mmp_ec_point_multiplication_p384_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P384 Generator Point Multiplication [k]G , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_EC_GENERATOR_MULTIPLICATION_P384. + */ +typedef struct icp_qat_fw_mmp_ec_generator_multiplication_p384_output_s +{ + uint64_t xr; /**< xR = affine coordinate X of point [k]G (6 qwords)*/ + uint64_t yr; /**< yR = affine coordinate Y of point [k]G (6 qwords)*/ +} icp_qat_fw_mmp_ec_generator_multiplication_p384_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P384 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_ECDSA_SIGN_RS_P384. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_s +{ + uint64_t r; /**< ECDSA signature r (6 qwords)*/ + uint64_t s; /**< ECDSA signature s (6 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_t; - /** ECC curve448 Variable Point Multiplication [k]P(x), as specified in - * RFC7748 */ - icp_qat_fw_point_multiplication_c448_input_t point_multiplication_c448; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P256 Variable Point Multiplication [k]P , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_EC_POINT_MULTIPLICATION_P256. + */ +typedef struct icp_qat_fw_mmp_ec_point_multiplication_p256_output_s +{ + uint64_t xr; /**< xR = affine coordinate X of point [k]P (4 qwords)*/ + uint64_t yr; /**< yR = affine coordinate Y of point [k]P (4 qwords)*/ +} icp_qat_fw_mmp_ec_point_multiplication_p256_output_t; - /** ECC curve448 Generator Point Multiplication [k]G(x), as specified in - * RFC7748 */ - icp_qat_fw_generator_multiplication_c448_input_t - generator_multiplication_c448; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P256 Generator Point Multiplication [k]G , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_EC_GENERATOR_MULTIPLICATION_P256. + */ +typedef struct icp_qat_fw_mmp_ec_generator_multiplication_p256_output_s +{ + uint64_t xr; /**< xR = affine coordinate X of point [k]G (4 qwords)*/ + uint64_t yr; /**< yR = affine coordinate Y of point [k]G (4 qwords)*/ +} icp_qat_fw_mmp_ec_generator_multiplication_p256_output_t; - /** ECC edwards448 Variable Point Multiplication [k]P, as specified in - * RFC8032 */ - icp_qat_fw_point_multiplication_ed448_input_t - point_multiplication_ed448; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P256 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_ECDSA_SIGN_RS_P256. + */ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_s +{ + uint64_t r; /**< ECDSA signature r (4 qwords)*/ + uint64_t s; /**< ECDSA signature s (4 qwords)*/ +} icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_t; - /** ECC edwards448 Generator Point Multiplication [k]P, as specified in - * RFC8032 */ - icp_qat_fw_generator_multiplication_ed448_input_t - generator_multiplication_ed448; -} icp_qat_fw_mmp_input_param_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC SM2 point multiply [k]G , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_ECSM2_GENERATOR_MULTIPLICATION. + */ +typedef struct icp_qat_fw_mmp_ecsm2_generator_multiplication_output_s +{ + uint64_t xd; /**< xD = affine coordinate X of point [k]G (4 qwords)*/ + uint64_t yd; /**< yD = affine coordinate Y of point [k]G (4 qwords)*/ +} icp_qat_fw_mmp_ecsm2_generator_multiplication_output_t; /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Initialisation sequence , * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_INIT. */ -typedef struct icp_qat_fw_mmp_init_output_s { - uint64_t zz; /**< 1'd quadword (1 qwords)*/ +typedef struct icp_qat_fw_mmp_init_output_s +{ + uint64_t zz; /**< 1'd quadword (1 qwords)*/ } icp_qat_fw_mmp_init_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 768-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_G2_768. + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for 768-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_G2_768. */ -typedef struct icp_qat_fw_mmp_dh_g2_768_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (12 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_768_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (12 qwords)*/ } icp_qat_fw_mmp_dh_g2_768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation for - * 768-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_768. + * Output parameter list for Diffie-Hellman Modular exponentiation for 768-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_768. */ -typedef struct icp_qat_fw_mmp_dh_768_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (12 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_768_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (12 qwords)*/ } icp_qat_fw_mmp_dh_768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 1024-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_G2_1024. + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for 1024-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_G2_1024. */ -typedef struct icp_qat_fw_mmp_dh_g2_1024_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (16 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_1024_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (16 qwords)*/ } icp_qat_fw_mmp_dh_g2_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation for - * 1024-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_1024. + * Output parameter list for Diffie-Hellman Modular exponentiation for 1024-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_1024. */ -typedef struct icp_qat_fw_mmp_dh_1024_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (16 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_1024_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (16 qwords)*/ } icp_qat_fw_mmp_dh_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 1536-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_G2_1536. + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for 1536-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_G2_1536. */ -typedef struct icp_qat_fw_mmp_dh_g2_1536_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (24 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_1536_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (24 qwords)*/ } icp_qat_fw_mmp_dh_g2_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation for - * 1536-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_1536. + * Output parameter list for Diffie-Hellman Modular exponentiation for 1536-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_1536. */ -typedef struct icp_qat_fw_mmp_dh_1536_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (24 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_1536_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (24 qwords)*/ } icp_qat_fw_mmp_dh_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 2048-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_G2_2048. + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for 2048-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_G2_2048. */ -typedef struct icp_qat_fw_mmp_dh_g2_2048_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (32 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_2048_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (32 qwords)*/ } icp_qat_fw_mmp_dh_g2_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation for - * 2048-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_2048. + * Output parameter list for Diffie-Hellman Modular exponentiation for 2048-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_2048. */ -typedef struct icp_qat_fw_mmp_dh_2048_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (32 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_2048_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (32 qwords)*/ } icp_qat_fw_mmp_dh_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 3072-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_G2_3072. + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for 3072-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_G2_3072. */ -typedef struct icp_qat_fw_mmp_dh_g2_3072_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (48 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_3072_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (48 qwords)*/ } icp_qat_fw_mmp_dh_g2_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation for - * 3072-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_3072. + * Output parameter list for Diffie-Hellman Modular exponentiation for 3072-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_3072. */ -typedef struct icp_qat_fw_mmp_dh_3072_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (48 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_3072_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (48 qwords)*/ } icp_qat_fw_mmp_dh_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for - * 4096-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_G2_4096. + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for 4096-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_G2_4096. */ -typedef struct icp_qat_fw_mmp_dh_g2_4096_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (64 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_g2_4096_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (64 qwords)*/ } icp_qat_fw_mmp_dh_g2_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Diffie-Hellman Modular exponentiation for - * 4096-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DH_4096. + * Output parameter list for Diffie-Hellman Modular exponentiation for 4096-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DH_4096. */ -typedef struct icp_qat_fw_mmp_dh_4096_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (64 - qwords)*/ +typedef struct icp_qat_fw_mmp_dh_4096_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (64 qwords)*/ } icp_qat_fw_mmp_dh_4096_output_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for Diffie-Hellman Modular exponentiation base 2 for + * 8192-bit numbers , to be used when icp_qat_fw_pke_response_s::functionalityId + * is #PKE_DH_G2_8192. + */ +typedef struct icp_qat_fw_mmp_dh_g2_8192_output_s +{ + uint64_t + r; /**< modular exponentiation result ≥ 0 and < m (128 qwords)*/ +} icp_qat_fw_mmp_dh_g2_8192_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for Diffie-Hellman Modular exponentiation for + * 8192-bit numbers , to be used when icp_qat_fw_pke_response_s::functionalityId + * is #PKE_DH_8192. + */ +typedef struct icp_qat_fw_mmp_dh_8192_output_s +{ + uint64_t + r; /**< modular exponentiation result ≥ 0 and < m (128 qwords)*/ +} icp_qat_fw_mmp_dh_8192_output_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 512 key generation first form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP1_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP1_512. */ -typedef struct icp_qat_fw_mmp_rsa_kp1_512_output_s { - uint64_t n; /**< RSA key (8 qwords)*/ - uint64_t d; /**< RSA private key (first form) (8 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_kp1_512_output_s +{ + uint64_t n; /**< RSA key (8 qwords)*/ + uint64_t d; /**< RSA private key (first form) (8 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 512 key generation second form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP2_512. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_512_output_s { - uint64_t n; /**< RSA key (8 qwords)*/ - uint64_t d; /**< RSA private key (second form) (8 qwords)*/ - uint64_t dp; /**< RSA private key (second form) (4 qwords)*/ - uint64_t dq; /**< RSA private key (second form) (4 qwords)*/ - uint64_t qinv; /**< RSA private key (second form) (4 qwords)*/ + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP2_512. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_512_output_s +{ + uint64_t n; /**< RSA key (8 qwords)*/ + uint64_t d; /**< RSA private key (second form) (8 qwords)*/ + uint64_t dp; /**< RSA private key (second form) (4 qwords)*/ + uint64_t dq; /**< RSA private key (second form) (4 qwords)*/ + uint64_t qinv; /**< RSA private key (second form) (4 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 512 Encryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_EP_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_EP_512. */ -typedef struct icp_qat_fw_mmp_rsa_ep_512_output_s { - uint64_t c; /**< cipher text representative, < n (8 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_512_output_s +{ + uint64_t c; /**< cipher text representative, < n (8 qwords)*/ } icp_qat_fw_mmp_rsa_ep_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 512 Decryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP1_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP1_512. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_512_output_s { - uint64_t m; /**< message representative, < n (8 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_512_output_s +{ + uint64_t m; /**< message representative, < n (8 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1024 Decryption with CRT , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP2_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP2_512. */ -typedef struct icp_qat_fw_mmp_rsa_dp2_512_output_s { - uint64_t m; /**< message representative, < (p*q) (8 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp2_512_output_s +{ + uint64_t m; /**< message representative, < (p*q) (8 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1024 key generation first form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP1_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP1_1024. */ -typedef struct icp_qat_fw_mmp_rsa_kp1_1024_output_s { - uint64_t n; /**< RSA key (16 qwords)*/ - uint64_t d; /**< RSA private key (first form) (16 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_kp1_1024_output_s +{ + uint64_t n; /**< RSA key (16 qwords)*/ + uint64_t d; /**< RSA private key (first form) (16 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1024 key generation second form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP2_1024. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_1024_output_s { - uint64_t n; /**< RSA key (16 qwords)*/ - uint64_t d; /**< RSA private key (second form) (16 qwords)*/ - uint64_t dp; /**< RSA private key (second form) (8 qwords)*/ - uint64_t dq; /**< RSA private key (second form) (8 qwords)*/ - uint64_t qinv; /**< RSA private key (second form) (8 qwords)*/ + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP2_1024. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_1024_output_s +{ + uint64_t n; /**< RSA key (16 qwords)*/ + uint64_t d; /**< RSA private key (second form) (16 qwords)*/ + uint64_t dp; /**< RSA private key (second form) (8 qwords)*/ + uint64_t dq; /**< RSA private key (second form) (8 qwords)*/ + uint64_t qinv; /**< RSA private key (second form) (8 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1024 Encryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_EP_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_EP_1024. */ -typedef struct icp_qat_fw_mmp_rsa_ep_1024_output_s { - uint64_t c; /**< cipher text representative, < n (16 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_1024_output_s +{ + uint64_t c; /**< cipher text representative, < n (16 qwords)*/ } icp_qat_fw_mmp_rsa_ep_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1024 Decryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP1_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP1_1024. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_1024_output_s { - uint64_t m; /**< message representative, < n (16 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_1024_output_s +{ + uint64_t m; /**< message representative, < n (16 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1024 Decryption with CRT , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP2_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP2_1024. */ -typedef struct icp_qat_fw_mmp_rsa_dp2_1024_output_s { - uint64_t m; /**< message representative, < (p*q) (16 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp2_1024_output_s +{ + uint64_t m; /**< message representative, < (p*q) (16 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1536 key generation first form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP1_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP1_1536. */ -typedef struct icp_qat_fw_mmp_rsa_kp1_1536_output_s { - uint64_t n; /**< RSA key (24 qwords)*/ - uint64_t d; /**< RSA private key (24 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_kp1_1536_output_s +{ + uint64_t n; /**< RSA key (24 qwords)*/ + uint64_t d; /**< RSA private key (24 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1536 key generation second form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP2_1536. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_1536_output_s { - uint64_t n; /**< RSA key (24 qwords)*/ - uint64_t d; /**< RSA private key (24 qwords)*/ - uint64_t dp; /**< RSA private key (12 qwords)*/ - uint64_t dq; /**< RSA private key (12 qwords)*/ - uint64_t qinv; /**< RSA private key (12 qwords)*/ + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP2_1536. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_1536_output_s +{ + uint64_t n; /**< RSA key (24 qwords)*/ + uint64_t d; /**< RSA private key (24 qwords)*/ + uint64_t dp; /**< RSA private key (12 qwords)*/ + uint64_t dq; /**< RSA private key (12 qwords)*/ + uint64_t qinv; /**< RSA private key (12 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1536 Encryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_EP_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_EP_1536. */ -typedef struct icp_qat_fw_mmp_rsa_ep_1536_output_s { - uint64_t c; /**< cipher text representative, < n (24 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_1536_output_s +{ + uint64_t c; /**< cipher text representative, < n (24 qwords)*/ } icp_qat_fw_mmp_rsa_ep_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1536 Decryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP1_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP1_1536. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_1536_output_s { - uint64_t m; /**< message representative, < n (24 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_1536_output_s +{ + uint64_t m; /**< message representative, < n (24 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 1536 Decryption with CRT , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP2_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP2_1536. */ -typedef struct icp_qat_fw_mmp_rsa_dp2_1536_output_s { - uint64_t m; /**< message representative, < (p*q) (24 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp2_1536_output_s +{ + uint64_t m; /**< message representative, < (p*q) (24 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 2048 key generation first form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP1_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP1_2048. */ -typedef struct icp_qat_fw_mmp_rsa_kp1_2048_output_s { - uint64_t n; /**< RSA key (32 qwords)*/ - uint64_t d; /**< RSA private key (32 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_kp1_2048_output_s +{ + uint64_t n; /**< RSA key (32 qwords)*/ + uint64_t d; /**< RSA private key (32 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 2048 key generation second form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP2_2048. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_2048_output_s { - uint64_t n; /**< RSA key (32 qwords)*/ - uint64_t d; /**< RSA private key (32 qwords)*/ - uint64_t dp; /**< RSA private key (16 qwords)*/ - uint64_t dq; /**< RSA private key (16 qwords)*/ - uint64_t qinv; /**< RSA private key (16 qwords)*/ + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP2_2048. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_2048_output_s +{ + uint64_t n; /**< RSA key (32 qwords)*/ + uint64_t d; /**< RSA private key (32 qwords)*/ + uint64_t dp; /**< RSA private key (16 qwords)*/ + uint64_t dq; /**< RSA private key (16 qwords)*/ + uint64_t qinv; /**< RSA private key (16 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 2048 Encryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_EP_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_EP_2048. */ -typedef struct icp_qat_fw_mmp_rsa_ep_2048_output_s { - uint64_t c; /**< cipher text representative, < n (32 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_2048_output_s +{ + uint64_t c; /**< cipher text representative, < n (32 qwords)*/ } icp_qat_fw_mmp_rsa_ep_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 2048 Decryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP1_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP1_2048. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_2048_output_s { - uint64_t m; /**< message representative, < n (32 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_2048_output_s +{ + uint64_t m; /**< message representative, < n (32 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 2048 Decryption with CRT , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP2_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP2_2048. */ -typedef struct icp_qat_fw_mmp_rsa_dp2_2048_output_s { - uint64_t m; /**< message representative, < (p*q) (32 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp2_2048_output_s +{ + uint64_t m; /**< message representative, < (p*q) (32 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 3072 key generation first form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP1_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP1_3072. */ -typedef struct icp_qat_fw_mmp_rsa_kp1_3072_output_s { - uint64_t n; /**< RSA key (48 qwords)*/ - uint64_t d; /**< RSA private key (48 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_kp1_3072_output_s +{ + uint64_t n; /**< RSA key (48 qwords)*/ + uint64_t d; /**< RSA private key (48 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 3072 key generation second form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP2_3072. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_3072_output_s { - uint64_t n; /**< RSA key (48 qwords)*/ - uint64_t d; /**< RSA private key (48 qwords)*/ - uint64_t dp; /**< RSA private key (24 qwords)*/ - uint64_t dq; /**< RSA private key (24 qwords)*/ - uint64_t qinv; /**< RSA private key (24 qwords)*/ + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP2_3072. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_3072_output_s +{ + uint64_t n; /**< RSA key (48 qwords)*/ + uint64_t d; /**< RSA private key (48 qwords)*/ + uint64_t dp; /**< RSA private key (24 qwords)*/ + uint64_t dq; /**< RSA private key (24 qwords)*/ + uint64_t qinv; /**< RSA private key (24 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 3072 Encryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_EP_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_EP_3072. */ -typedef struct icp_qat_fw_mmp_rsa_ep_3072_output_s { - uint64_t c; /**< cipher text representative, < n (48 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_3072_output_s +{ + uint64_t c; /**< cipher text representative, < n (48 qwords)*/ } icp_qat_fw_mmp_rsa_ep_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 3072 Decryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP1_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP1_3072. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_3072_output_s { - uint64_t m; /**< message representative, < n (48 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_3072_output_s +{ + uint64_t m; /**< message representative, < n (48 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 3072 Decryption with CRT , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP2_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP2_3072. */ -typedef struct icp_qat_fw_mmp_rsa_dp2_3072_output_s { - uint64_t m; /**< message representative, < (p*q) (48 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp2_3072_output_s +{ + uint64_t m; /**< message representative, < (p*q) (48 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 4096 key generation first form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP1_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP1_4096. */ -typedef struct icp_qat_fw_mmp_rsa_kp1_4096_output_s { - uint64_t n; /**< RSA key (64 qwords)*/ - uint64_t d; /**< RSA private key (64 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_kp1_4096_output_s +{ + uint64_t n; /**< RSA key (64 qwords)*/ + uint64_t d; /**< RSA private key (64 qwords)*/ } icp_qat_fw_mmp_rsa_kp1_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 4096 key generation second form , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_KP2_4096. - */ -typedef struct icp_qat_fw_mmp_rsa_kp2_4096_output_s { - uint64_t n; /**< RSA key (64 qwords)*/ - uint64_t d; /**< RSA private key (64 qwords)*/ - uint64_t dp; /**< RSA private key (32 qwords)*/ - uint64_t dq; /**< RSA private key (32 qwords)*/ - uint64_t qinv; /**< RSA private key (32 qwords)*/ + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_KP2_4096. + */ +typedef struct icp_qat_fw_mmp_rsa_kp2_4096_output_s +{ + uint64_t n; /**< RSA key (64 qwords)*/ + uint64_t d; /**< RSA private key (64 qwords)*/ + uint64_t dp; /**< RSA private key (32 qwords)*/ + uint64_t dq; /**< RSA private key (32 qwords)*/ + uint64_t qinv; /**< RSA private key (32 qwords)*/ } icp_qat_fw_mmp_rsa_kp2_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 4096 Encryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_EP_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_EP_4096. */ -typedef struct icp_qat_fw_mmp_rsa_ep_4096_output_s { - uint64_t c; /**< cipher text representative, < n (64 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_ep_4096_output_s +{ + uint64_t c; /**< cipher text representative, < n (64 qwords)*/ } icp_qat_fw_mmp_rsa_ep_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 4096 Decryption , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP1_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP1_4096. */ -typedef struct icp_qat_fw_mmp_rsa_dp1_4096_output_s { - uint64_t m; /**< message representative, < n (64 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp1_4096_output_s +{ + uint64_t m; /**< message representative, < n (64 qwords)*/ } icp_qat_fw_mmp_rsa_dp1_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for RSA 4096 Decryption with CRT , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_RSA_DP2_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_RSA_DP2_4096. */ -typedef struct icp_qat_fw_mmp_rsa_dp2_4096_output_s { - uint64_t m; /**< message representative, < (p*q) (64 qwords)*/ +typedef struct icp_qat_fw_mmp_rsa_dp2_4096_output_s +{ + uint64_t m; /**< message representative, < (p*q) (64 qwords)*/ } icp_qat_fw_mmp_rsa_dp2_4096_output_t; /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for GCD primality test for 192-bit numbers , + * Output parameter list for RSA 8192 Encryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_RSA_EP_8192. + */ +typedef struct icp_qat_fw_mmp_rsa_ep_8192_output_s +{ + uint64_t c; /**< cipher text representative, < n (128 qwords)*/ +} icp_qat_fw_mmp_rsa_ep_8192_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 8192 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_RSA_DP1_8192. + */ +typedef struct icp_qat_fw_mmp_rsa_dp1_8192_output_s +{ + uint64_t m; /**< message representative, < n (128 qwords)*/ +} icp_qat_fw_mmp_rsa_dp1_8192_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 8192 Decryption with CRT , * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_192. + * #PKE_RSA_DP2_8192. + */ +typedef struct icp_qat_fw_mmp_rsa_dp2_8192_output_s +{ + uint64_t m; /**< message representative, < (p*q) (128 qwords)*/ +} icp_qat_fw_mmp_rsa_dp2_8192_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for GCD primality test for 192-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_192. */ -typedef struct icp_qat_fw_mmp_gcd_pt_192_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_192_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_192_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 256-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_256. */ -typedef struct icp_qat_fw_mmp_gcd_pt_256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_256_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 384-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_384. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_384. */ -typedef struct icp_qat_fw_mmp_gcd_pt_384_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_384_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_384_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_512. */ -typedef struct icp_qat_fw_mmp_gcd_pt_512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_768. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_768. */ -typedef struct icp_qat_fw_mmp_gcd_pt_768_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_768_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 1024-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_1024. */ -typedef struct icp_qat_fw_mmp_gcd_pt_1024_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_1024_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 1536-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_1536. */ -typedef struct icp_qat_fw_mmp_gcd_pt_1536_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_1536_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 2048-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_2048. */ -typedef struct icp_qat_fw_mmp_gcd_pt_2048_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_2048_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 3072-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_3072. */ -typedef struct icp_qat_fw_mmp_gcd_pt_3072_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_3072_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for GCD primality test for 4096-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_GCD_PT_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_GCD_PT_4096. */ -typedef struct icp_qat_fw_mmp_gcd_pt_4096_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_gcd_pt_4096_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_gcd_pt_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 160-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_160. */ -typedef struct icp_qat_fw_mmp_fermat_pt_160_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_160_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_512. */ -typedef struct icp_qat_fw_mmp_fermat_pt_512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Fermat primality test for <e; 512-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_L512. + * Output parameter list for Fermat primality test for <e; 512-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_L512. */ -typedef struct icp_qat_fw_mmp_fermat_pt_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_768. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_768. */ -typedef struct icp_qat_fw_mmp_fermat_pt_768_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_768_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 1024-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_1024. */ -typedef struct icp_qat_fw_mmp_fermat_pt_1024_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_1024_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 1536-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_1536. */ -typedef struct icp_qat_fw_mmp_fermat_pt_1536_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_1536_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 2048-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_2048. */ -typedef struct icp_qat_fw_mmp_fermat_pt_2048_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_2048_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 3072-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_3072. */ -typedef struct icp_qat_fw_mmp_fermat_pt_3072_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_3072_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Fermat primality test for 4096-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_FERMAT_PT_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_FERMAT_PT_4096. */ -typedef struct icp_qat_fw_mmp_fermat_pt_4096_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_fermat_pt_4096_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_fermat_pt_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 160-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_160. + * Output parameter list for Miller-Rabin primality test for 160-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_160. */ -typedef struct icp_qat_fw_mmp_mr_pt_160_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_160_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 512-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_512. + * Output parameter list for Miller-Rabin primality test for 512-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_512. */ -typedef struct icp_qat_fw_mmp_mr_pt_512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 768-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_768. + * Output parameter list for Miller-Rabin primality test for 768-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_768. */ -typedef struct icp_qat_fw_mmp_mr_pt_768_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_768_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 1024-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_1024. + * Output parameter list for Miller-Rabin primality test for 1024-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_1024. */ -typedef struct icp_qat_fw_mmp_mr_pt_1024_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_1024_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 1536-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_1536. + * Output parameter list for Miller-Rabin primality test for 1536-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_1536. */ -typedef struct icp_qat_fw_mmp_mr_pt_1536_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_1536_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 2048-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_2048. + * Output parameter list for Miller-Rabin primality test for 2048-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_2048. */ -typedef struct icp_qat_fw_mmp_mr_pt_2048_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_2048_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 3072-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_3072. + * Output parameter list for Miller-Rabin primality test for 3072-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_3072. */ -typedef struct icp_qat_fw_mmp_mr_pt_3072_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_3072_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 4096-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_4096. + * Output parameter list for Miller-Rabin primality test for 4096-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_4096. */ -typedef struct icp_qat_fw_mmp_mr_pt_4096_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_4096_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Miller-Rabin primality test for 512-bit numbers - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_MR_PT_L512. + * Output parameter list for Miller-Rabin primality test for 512-bit numbers , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_MR_PT_L512. */ -typedef struct icp_qat_fw_mmp_mr_pt_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_mr_pt_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_mr_pt_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 160-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_160. */ -typedef struct icp_qat_fw_mmp_lucas_pt_160_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_160_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 512-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_512. */ -typedef struct icp_qat_fw_mmp_lucas_pt_512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 768-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_768. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_768. */ -typedef struct icp_qat_fw_mmp_lucas_pt_768_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_768_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 1024-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_1024. */ -typedef struct icp_qat_fw_mmp_lucas_pt_1024_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_1024_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 1536-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_1536. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_1536. */ -typedef struct icp_qat_fw_mmp_lucas_pt_1536_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_1536_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 2048-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_2048. */ -typedef struct icp_qat_fw_mmp_lucas_pt_2048_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_2048_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 3072-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_3072. */ -typedef struct icp_qat_fw_mmp_lucas_pt_3072_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_3072_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for 4096-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_4096. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_4096. */ -typedef struct icp_qat_fw_mmp_lucas_pt_4096_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_4096_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_4096_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Lucas primality test for L512-bit numbers , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_LUCAS_PT_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_LUCAS_PT_L512. */ -typedef struct icp_qat_fw_mmp_lucas_pt_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_lucas_pt_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_lucas_pt_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 512-bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L512. + * Output parameter list for Modular exponentiation for numbers less than 512-bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L512. */ -typedef struct icp_qat_fw_maths_modexp_l512_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (8 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l512_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (8 qwords)*/ } icp_qat_fw_maths_modexp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 1024-bit , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L1024. + * Output parameter list for Modular exponentiation for numbers less than 1024-bit , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L1024. */ -typedef struct icp_qat_fw_maths_modexp_l1024_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (16 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l1024_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (16 qwords)*/ } icp_qat_fw_maths_modexp_l1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 1536-bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L1536. + * Output parameter list for Modular exponentiation for numbers less than 1536-bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L1536. */ -typedef struct icp_qat_fw_maths_modexp_l1536_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (24 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l1536_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (24 qwords)*/ } icp_qat_fw_maths_modexp_l1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 2048-bit , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L2048. + * Output parameter list for Modular exponentiation for numbers less than 2048-bit , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L2048. */ -typedef struct icp_qat_fw_maths_modexp_l2048_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (32 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l2048_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (32 qwords)*/ } icp_qat_fw_maths_modexp_l2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 2560-bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L2560. + * Output parameter list for Modular exponentiation for numbers less than 2560-bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L2560. */ -typedef struct icp_qat_fw_maths_modexp_l2560_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (40 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l2560_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (40 qwords)*/ } icp_qat_fw_maths_modexp_l2560_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 3072-bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L3072. + * Output parameter list for Modular exponentiation for numbers less than 3072-bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L3072. */ -typedef struct icp_qat_fw_maths_modexp_l3072_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (48 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l3072_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (48 qwords)*/ } icp_qat_fw_maths_modexp_l3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 3584-bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L3584. + * Output parameter list for Modular exponentiation for numbers less than 3584-bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L3584. */ -typedef struct icp_qat_fw_maths_modexp_l3584_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (56 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l3584_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (56 qwords)*/ } icp_qat_fw_maths_modexp_l3584_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular exponentiation for numbers less than - * 4096-bit , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODEXP_L4096. + * Output parameter list for Modular exponentiation for numbers less than 4096-bit , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODEXP_L4096. */ -typedef struct icp_qat_fw_maths_modexp_l4096_output_s { - uint64_t r; /**< modular exponentiation result ≥ 0 and < m (64 - qwords)*/ +typedef struct icp_qat_fw_maths_modexp_l4096_output_s +{ + uint64_t r; /**< modular exponentiation result ≥ 0 and < m (64 qwords)*/ } icp_qat_fw_maths_modexp_l4096_output_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for Modular exponentiation for numbers up to 8192 + * bits , to be used when icp_qat_fw_pke_response_s::functionalityId is + * #MATHS_MODEXP_L8192. + */ +typedef struct icp_qat_fw_maths_modexp_l8192_output_s +{ + uint64_t + r; /**< modular exponentiation result ≥ 0 and < m (128 qwords)*/ +} icp_qat_fw_maths_modexp_l8192_output_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Modular multiplicative inverse for numbers less - * than 128 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is + * than 128 bits , to be used when icp_qat_fw_pke_response_s::functionalityId is * #MATHS_MODINV_ODD_L128. */ -typedef struct icp_qat_fw_maths_modinv_odd_l128_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (2 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l128_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (2 qwords)*/ } icp_qat_fw_maths_modinv_odd_l128_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 192 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L192. + * Output parameter list for Modular multiplicative inverse for numbers less than 192 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L192. */ -typedef struct icp_qat_fw_maths_modinv_odd_l192_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (3 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l192_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (3 qwords)*/ } icp_qat_fw_maths_modinv_odd_l192_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 256 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L256. + * Output parameter list for Modular multiplicative inverse for numbers less than 256 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L256. */ -typedef struct icp_qat_fw_maths_modinv_odd_l256_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (4 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l256_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (4 qwords)*/ } icp_qat_fw_maths_modinv_odd_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 384 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L384. + * Output parameter list for Modular multiplicative inverse for numbers less than 384 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L384. */ -typedef struct icp_qat_fw_maths_modinv_odd_l384_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (6 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l384_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (6 qwords)*/ } icp_qat_fw_maths_modinv_odd_l384_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 512 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L512. + * Output parameter list for Modular multiplicative inverse for numbers less than 512 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L512. */ -typedef struct icp_qat_fw_maths_modinv_odd_l512_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (8 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l512_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (8 qwords)*/ } icp_qat_fw_maths_modinv_odd_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 768 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L768. + * Output parameter list for Modular multiplicative inverse for numbers less than 768 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L768. */ -typedef struct icp_qat_fw_maths_modinv_odd_l768_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (12 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l768_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (12 qwords)*/ } icp_qat_fw_maths_modinv_odd_l768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 1024 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L1024. + * Output parameter list for Modular multiplicative inverse for numbers less than 1024 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L1024. */ -typedef struct icp_qat_fw_maths_modinv_odd_l1024_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (16 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l1024_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (16 qwords)*/ } icp_qat_fw_maths_modinv_odd_l1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 1536 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L1536. + * Output parameter list for Modular multiplicative inverse for numbers less than 1536 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L1536. */ -typedef struct icp_qat_fw_maths_modinv_odd_l1536_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (24 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l1536_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (24 qwords)*/ } icp_qat_fw_maths_modinv_odd_l1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 2048 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L2048. + * Output parameter list for Modular multiplicative inverse for numbers less than 2048 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L2048. */ -typedef struct icp_qat_fw_maths_modinv_odd_l2048_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (32 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l2048_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (32 qwords)*/ } icp_qat_fw_maths_modinv_odd_l2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 3072 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L3072. + * Output parameter list for Modular multiplicative inverse for numbers less than 3072 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L3072. */ -typedef struct icp_qat_fw_maths_modinv_odd_l3072_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (48 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l3072_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (48 qwords)*/ } icp_qat_fw_maths_modinv_odd_l3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 4096 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_ODD_L4096. + * Output parameter list for Modular multiplicative inverse for numbers less than 4096 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_ODD_L4096. */ -typedef struct icp_qat_fw_maths_modinv_odd_l4096_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (64 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_odd_l4096_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (64 qwords)*/ } icp_qat_fw_maths_modinv_odd_l4096_output_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for Modular multiplicative inverse for numbers up to + * 8192 bits , to be used when icp_qat_fw_pke_response_s::functionalityId is + * #MATHS_MODINV_ODD_L8192. + */ +typedef struct icp_qat_fw_maths_modinv_odd_l8192_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (128 + qwords)*/ +} icp_qat_fw_maths_modinv_odd_l8192_output_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for Modular multiplicative inverse for numbers less - * than 128 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is + * than 128 bits , to be used when icp_qat_fw_pke_response_s::functionalityId is * #MATHS_MODINV_EVEN_L128. */ -typedef struct icp_qat_fw_maths_modinv_even_l128_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (2 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l128_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (2 qwords)*/ } icp_qat_fw_maths_modinv_even_l128_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 192 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L192. + * Output parameter list for Modular multiplicative inverse for numbers less than 192 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L192. */ -typedef struct icp_qat_fw_maths_modinv_even_l192_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (3 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l192_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (3 qwords)*/ } icp_qat_fw_maths_modinv_even_l192_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 256 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L256. + * Output parameter list for Modular multiplicative inverse for numbers less than 256 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L256. */ -typedef struct icp_qat_fw_maths_modinv_even_l256_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (4 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l256_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (4 qwords)*/ } icp_qat_fw_maths_modinv_even_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 384 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L384. + * Output parameter list for Modular multiplicative inverse for numbers less than 384 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L384. */ -typedef struct icp_qat_fw_maths_modinv_even_l384_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (6 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l384_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (6 qwords)*/ } icp_qat_fw_maths_modinv_even_l384_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 512 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L512. + * Output parameter list for Modular multiplicative inverse for numbers less than 512 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L512. */ -typedef struct icp_qat_fw_maths_modinv_even_l512_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (8 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l512_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (8 qwords)*/ } icp_qat_fw_maths_modinv_even_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 768 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L768. + * Output parameter list for Modular multiplicative inverse for numbers less than 768 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L768. */ -typedef struct icp_qat_fw_maths_modinv_even_l768_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (12 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l768_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (12 qwords)*/ } icp_qat_fw_maths_modinv_even_l768_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 1024 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L1024. + * Output parameter list for Modular multiplicative inverse for numbers less than 1024 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L1024. */ -typedef struct icp_qat_fw_maths_modinv_even_l1024_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (16 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l1024_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (16 qwords)*/ } icp_qat_fw_maths_modinv_even_l1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 1536 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L1536. + * Output parameter list for Modular multiplicative inverse for numbers less than 1536 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L1536. */ -typedef struct icp_qat_fw_maths_modinv_even_l1536_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (24 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l1536_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (24 qwords)*/ } icp_qat_fw_maths_modinv_even_l1536_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 2048 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L2048. + * Output parameter list for Modular multiplicative inverse for numbers less than 2048 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L2048. */ -typedef struct icp_qat_fw_maths_modinv_even_l2048_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (32 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l2048_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (32 qwords)*/ } icp_qat_fw_maths_modinv_even_l2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 3072 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L3072. + * Output parameter list for Modular multiplicative inverse for numbers less than 3072 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L3072. */ -typedef struct icp_qat_fw_maths_modinv_even_l3072_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (48 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l3072_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (48 qwords)*/ } icp_qat_fw_maths_modinv_even_l3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for Modular multiplicative inverse for numbers less - * than 4096 bits , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_MODINV_EVEN_L4096. + * Output parameter list for Modular multiplicative inverse for numbers less than 4096 bits , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_MODINV_EVEN_L4096. */ -typedef struct icp_qat_fw_maths_modinv_even_l4096_output_s { - uint64_t - c; /**< modular multiplicative inverse of a, > 0 and < b (64 - qwords)*/ +typedef struct icp_qat_fw_maths_modinv_even_l4096_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (64 qwords)*/ } icp_qat_fw_maths_modinv_even_l4096_output_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for Modular multiplicative inverse for numbers up to + * 8192 bits , to be used when icp_qat_fw_pke_response_s::functionalityId is + * #MATHS_MODINV_EVEN_L8192. + */ +typedef struct icp_qat_fw_maths_modinv_even_l8192_output_s +{ + uint64_t c; /**< modular multiplicative inverse of a, > 0 and < b (128 + qwords)*/ +} icp_qat_fw_maths_modinv_even_l8192_output_t; + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_P_1024_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_P_1024_160. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_1024_160_output_s { - uint64_t p; /**< candidate for DSA parameter p (16 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_1024_160_output_s +{ + uint64_t p; /**< candidate for DSA parameter p (16 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_1024_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA key generation G , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_G_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_G_1024. */ -typedef struct icp_qat_fw_mmp_dsa_gen_g_1024_output_s { - uint64_t g; /**< DSA parameter (16 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_g_1024_output_s +{ + uint64_t g; /**< DSA parameter (16 qwords)*/ } icp_qat_fw_mmp_dsa_gen_g_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA key generation Y , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_Y_1024. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_Y_1024. */ -typedef struct icp_qat_fw_mmp_dsa_gen_y_1024_output_s { - uint64_t y; /**< DSA parameter (16 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_y_1024_output_s +{ + uint64_t y; /**< DSA parameter (16 qwords)*/ } icp_qat_fw_mmp_dsa_gen_y_1024_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_1024_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_1024_160. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_1024_160_output_s { - uint64_t r; /**< DSA 160-bits signature (3 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_1024_160_output_s +{ + uint64_t r; /**< DSA 160-bits signature (3 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_1024_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_S_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_S_160. */ -typedef struct icp_qat_fw_mmp_dsa_sign_s_160_output_s { - uint64_t s; /**< s DSA 160-bits signature (3 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_s_160_output_s +{ + uint64_t s; /**< s DSA 160-bits signature (3 qwords)*/ } icp_qat_fw_mmp_dsa_sign_s_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_S_1024_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_S_1024_160. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_s { - uint64_t r; /**< DSA 160-bits signature (3 qwords)*/ - uint64_t s; /**< DSA 160-bits signature (3 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_s +{ + uint64_t r; /**< DSA 160-bits signature (3 qwords)*/ + uint64_t s; /**< DSA 160-bits signature (3 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_VERIFY_1024_160. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_VERIFY_1024_160. */ -typedef struct icp_qat_fw_mmp_dsa_verify_1024_160_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_dsa_verify_1024_160_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_dsa_verify_1024_160_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_P_2048_224. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_P_2048_224. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_224_output_s { - uint64_t p; /**< candidate for DSA parameter p (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_224_output_s +{ + uint64_t p; /**< candidate for DSA parameter p (32 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_2048_224_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA key generation Y , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_Y_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_Y_2048. */ -typedef struct icp_qat_fw_mmp_dsa_gen_y_2048_output_s { - uint64_t y; /**< DSA parameter (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_y_2048_output_s +{ + uint64_t y; /**< DSA parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_gen_y_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_2048_224. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_2048_224. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_224_output_s { - uint64_t r; /**< DSA 224-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_224_output_s +{ + uint64_t r; /**< DSA 224-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_2048_224_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_S_224. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_S_224. */ -typedef struct icp_qat_fw_mmp_dsa_sign_s_224_output_s { - uint64_t s; /**< s DSA 224-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_s_224_output_s +{ + uint64_t s; /**< s DSA 224-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_s_224_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_S_2048_224. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_S_2048_224. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_s { - uint64_t r; /**< DSA 224-bits signature (4 qwords)*/ - uint64_t s; /**< DSA 224-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_s +{ + uint64_t r; /**< DSA 224-bits signature (4 qwords)*/ + uint64_t s; /**< DSA 224-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_VERIFY_2048_224. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_VERIFY_2048_224. */ -typedef struct icp_qat_fw_mmp_dsa_verify_2048_224_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_dsa_verify_2048_224_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_dsa_verify_2048_224_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_P_2048_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_P_2048_256. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_256_output_s { - uint64_t p; /**< candidate for DSA parameter p (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_2048_256_output_s +{ + uint64_t p; /**< candidate for DSA parameter p (32 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_2048_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA key generation G , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_G_2048. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_G_2048. */ -typedef struct icp_qat_fw_mmp_dsa_gen_g_2048_output_s { - uint64_t g; /**< DSA parameter (32 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_g_2048_output_s +{ + uint64_t g; /**< DSA parameter (32 qwords)*/ } icp_qat_fw_mmp_dsa_gen_g_2048_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_2048_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_2048_256. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_256_output_s { - uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_2048_256_output_s +{ + uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_2048_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_S_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_S_256. */ -typedef struct icp_qat_fw_mmp_dsa_sign_s_256_output_s { - uint64_t s; /**< s DSA 256-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_s_256_output_s +{ + uint64_t s; /**< s DSA 256-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_s_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_S_2048_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_S_2048_256. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_s { - uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ - uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_s +{ + uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ + uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_VERIFY_2048_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_VERIFY_2048_256. */ -typedef struct icp_qat_fw_mmp_dsa_verify_2048_256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_dsa_verify_2048_256_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_dsa_verify_2048_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA parameter generation P , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_P_3072_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_P_3072_256. */ -typedef struct icp_qat_fw_mmp_dsa_gen_p_3072_256_output_s { - uint64_t p; /**< candidate for DSA parameter p (48 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_p_3072_256_output_s +{ + uint64_t p; /**< candidate for DSA parameter p (48 qwords)*/ } icp_qat_fw_mmp_dsa_gen_p_3072_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA key generation G , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_G_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_G_3072. */ -typedef struct icp_qat_fw_mmp_dsa_gen_g_3072_output_s { - uint64_t g; /**< DSA parameter (48 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_g_3072_output_s +{ + uint64_t g; /**< DSA parameter (48 qwords)*/ } icp_qat_fw_mmp_dsa_gen_g_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA key generation Y , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_GEN_Y_3072. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_GEN_Y_3072. */ -typedef struct icp_qat_fw_mmp_dsa_gen_y_3072_output_s { - uint64_t y; /**< DSA parameter (48 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_gen_y_3072_output_s +{ + uint64_t y; /**< DSA parameter (48 qwords)*/ } icp_qat_fw_mmp_dsa_gen_y_3072_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_3072_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_3072_256. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_3072_256_output_s { - uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_3072_256_output_s +{ + uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_3072_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Sign R S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_SIGN_R_S_3072_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_SIGN_R_S_3072_256. */ -typedef struct icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_s { - uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ - uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_s +{ + uint64_t r; /**< DSA 256-bits signature (4 qwords)*/ + uint64_t s; /**< DSA 256-bits signature (4 qwords)*/ } icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for DSA Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_DSA_VERIFY_3072_256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_DSA_VERIFY_3072_256. */ -typedef struct icp_qat_fw_mmp_dsa_verify_3072_256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_dsa_verify_3072_256_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_dsa_verify_3072_256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA Sign RS for curves B/K-163 and B/K-233 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GF2_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_RS_GF2_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_s { - uint64_t r; /**< ECDSA signature r > 0 and < n (4 qwords)*/ - uint64_t s; /**< ECDSA signature s > 0 and < n (4 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_s +{ + uint64_t r; /**< ECDSA signature r > 0 and < n (4 qwords)*/ + uint64_t s; /**< ECDSA signature s > 0 and < n (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA Sign R for curves B/K-163 and B/K-233 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GF2_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_R_GF2_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output_s { - uint64_t r; /**< ECDSA signature r > 0 and < n (4 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output_s +{ + uint64_t r; /**< ECDSA signature r > 0 and < n (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA Sign S for curves with n < 2^256 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GF2_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_S_GF2_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output_s { - uint64_t s; /**< ECDSA signature s > 0 and < n (4 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output_s +{ + uint64_t s; /**< ECDSA signature s > 0 and < n (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA Verify for curves B/K-163 and B/K-233 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_VERIFY_GF2_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_VERIFY_GF2_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l256_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_ecdsa_verify_gf2_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA Sign RS , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GF2_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_RS_GF2_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_s { - uint64_t r; /**< (8 qwords)*/ - uint64_t s; /**< ECDSA signature r > 0 and < n ECDSA signature s - > 0 and < n (8 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_s +{ + uint64_t r; /**< (8 qwords)*/ + uint64_t s; /**< ECDSA signature r > 0 and < n ECDSA signature s > 0 and < n (8 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GF2 Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GF2_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_R_GF2_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output_s { - uint64_t r; /**< ECDSA signature r > 0 and < n (8 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output_s +{ + uint64_t r; /**< ECDSA signature r > 0 and < n (8 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GF2 Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GF2_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_S_GF2_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output_s { - uint64_t s; /**< ECDSA signature s > 0 and < n (8 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output_s +{ + uint64_t s; /**< ECDSA signature s > 0 and < n (8 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GF2 Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_VERIFY_GF2_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_VERIFY_GF2_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_ecdsa_verify_gf2_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GF2 Sign RS for curves B-571/K-571 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GF2_571. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_RS_GF2_571. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_s { - uint64_t r; /**< (9 qwords)*/ - uint64_t s; /**< ECDSA signature r > 0 and < n ECDSA signature s - > 0 and < n (9 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_s +{ + uint64_t r; /**< (9 qwords)*/ + uint64_t s; /**< ECDSA signature r > 0 and < n ECDSA signature s > 0 and < n (9 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECDSA GF2 Sign S for curves with deg(q) < 576 - * , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GF2_571. + * Output parameter list for ECDSA GF2 Sign S for curves with deg(q) < 576 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_S_GF2_571. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output_s { - uint64_t s; /**< ECDSA signature s > 0 and < n (9 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output_s +{ + uint64_t s; /**< ECDSA signature s > 0 and < n (9 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GF2 Sign R for degree 571 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GF2_571. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_R_GF2_571. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output_s { - uint64_t r; /**< ECDSA signature r > 0 and < n (9 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output_s +{ + uint64_t r; /**< ECDSA signature r > 0 and < n (9 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GF2 Verify for degree 571 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_VERIFY_GF2_571. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_VERIFY_GF2_571. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_571_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gf2_571_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_ecdsa_verify_gf2_571_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for MATHS GF2 Point Multiplication , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GF2_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GF2_L256. */ -typedef struct icp_qat_fw_maths_point_multiplication_gf2_l256_output_s { - uint64_t xk; /**< x coordinate of resultant point (< degree(q)) (4 - qwords)*/ - uint64_t yk; /**< y coordinate of resultant point (< degree(q)) (4 - qwords)*/ +typedef struct icp_qat_fw_maths_point_multiplication_gf2_l256_output_s +{ + uint64_t xk; /**< x coordinate of resultant point (< degree(q)) (4 qwords)*/ + uint64_t yk; /**< y coordinate of resultant point (< degree(q)) (4 qwords)*/ } icp_qat_fw_maths_point_multiplication_gf2_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for MATHS GF2 Point Verification , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_VERIFY_GF2_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_VERIFY_GF2_L256. */ -typedef struct icp_qat_fw_maths_point_verify_gf2_l256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_maths_point_verify_gf2_l256_output_s +{ + /* no output parameters */ } icp_qat_fw_maths_point_verify_gf2_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for MATHS GF2 Point Multiplication , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GF2_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GF2_L512. */ -typedef struct icp_qat_fw_maths_point_multiplication_gf2_l512_output_s { - uint64_t xk; /**< x coordinate of resultant point (< q) (8 qwords)*/ - uint64_t yk; /**< y coordinate of resultant point (< q) (8 qwords)*/ +typedef struct icp_qat_fw_maths_point_multiplication_gf2_l512_output_s +{ + uint64_t xk; /**< x coordinate of resultant point (< q) (8 qwords)*/ + uint64_t yk; /**< y coordinate of resultant point (< q) (8 qwords)*/ } icp_qat_fw_maths_point_multiplication_gf2_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for MATHS GF2 Point Verification , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_VERIFY_GF2_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_VERIFY_GF2_L512. */ -typedef struct icp_qat_fw_maths_point_verify_gf2_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_maths_point_verify_gf2_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_maths_point_verify_gf2_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC GF2 Point Multiplication for curves - * B-571/K-571 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GF2_571. + * Output parameter list for ECC GF2 Point Multiplication for curves B-571/K-571 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GF2_571. */ -typedef struct icp_qat_fw_maths_point_multiplication_gf2_571_output_s { - uint64_t xk; /**< x coordinate of resultant point (degree < - degree(q)) (9 qwords)*/ - uint64_t yk; /**< y coordinate of resultant point (degree < - degree(q)) (9 qwords)*/ +typedef struct icp_qat_fw_maths_point_multiplication_gf2_571_output_s +{ + uint64_t xk; /**< x coordinate of resultant point (degree < degree(q)) (9 qwords)*/ + uint64_t yk; /**< y coordinate of resultant point (degree < degree(q)) (9 qwords)*/ } icp_qat_fw_maths_point_multiplication_gf2_571_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GF2 Point Verification for degree 571 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_VERIFY_GF2_571. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_VERIFY_GF2_571. */ -typedef struct icp_qat_fw_maths_point_verify_gf2_571_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_maths_point_verify_gf2_571_output_s +{ + /* no output parameters */ } icp_qat_fw_maths_point_verify_gf2_571_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GFP_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_R_GFP_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output_s { - uint64_t r; /**< ECDSA signature (4 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output_s +{ + uint64_t r; /**< ECDSA signature (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GFP_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_S_GFP_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output_s { - uint64_t s; /**< ECDSA signature s (4 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output_s +{ + uint64_t s; /**< ECDSA signature s (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign RS , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GFP_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_RS_GFP_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_s { - uint64_t r; /**< ECDSA signature r (4 qwords)*/ - uint64_t s; /**< ECDSA signature s (4 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_s +{ + uint64_t r; /**< ECDSA signature r (4 qwords)*/ + uint64_t s; /**< ECDSA signature s (4 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_VERIFY_GFP_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_VERIFY_GFP_L256. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l256_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_ecdsa_verify_gfp_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GFP_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_R_GFP_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output_s { - uint64_t r; /**< ECDSA signature (8 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output_s +{ + uint64_t r; /**< ECDSA signature (8 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GFP_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_S_GFP_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output_s { - uint64_t s; /**< ECDSA signature s (8 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output_s +{ + uint64_t s; /**< ECDSA signature s (8 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign RS , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GFP_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_RS_GFP_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_s { - uint64_t r; /**< ECDSA signature r (8 qwords)*/ - uint64_t s; /**< ECDSA signature s (8 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_s +{ + uint64_t r; /**< ECDSA signature r (8 qwords)*/ + uint64_t s; /**< ECDSA signature s (8 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_VERIFY_GFP_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_VERIFY_GFP_L512. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_ecdsa_verify_gfp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign R , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_R_GFP_521. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_R_GFP_521. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output_s { - uint64_t r; /**< ECDSA signature (9 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output_s +{ + uint64_t r; /**< ECDSA signature (9 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign S , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_S_GFP_521. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_S_GFP_521. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output_s { - uint64_t s; /**< ECDSA signature s (9 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output_s +{ + uint64_t s; /**< ECDSA signature s (9 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Sign RS , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_SIGN_RS_GFP_521. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_SIGN_RS_GFP_521. */ -typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_s { - uint64_t r; /**< ECDSA signature r (9 qwords)*/ - uint64_t s; /**< ECDSA signature s (9 qwords)*/ +typedef struct icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_s +{ + uint64_t r; /**< ECDSA signature r (9 qwords)*/ + uint64_t s; /**< ECDSA signature s (9 qwords)*/ } icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECDSA GFP Verify , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #PKE_ECDSA_VERIFY_GFP_521. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #PKE_ECDSA_VERIFY_GFP_521. */ -typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_521_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_mmp_ecdsa_verify_gfp_521_output_s +{ + /* no output parameters */ } icp_qat_fw_mmp_ecdsa_verify_gfp_521_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GFP Point Multiplication , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GFP_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GFP_L256. */ -typedef struct icp_qat_fw_maths_point_multiplication_gfp_l256_output_s { - uint64_t xk; /**< x coordinate of resultant EC point (4 qwords)*/ - uint64_t yk; /**< y coordinate of resultant EC point (4 qwords)*/ +typedef struct icp_qat_fw_maths_point_multiplication_gfp_l256_output_s +{ + uint64_t xk; /**< x coordinate of resultant EC point (4 qwords)*/ + uint64_t yk; /**< y coordinate of resultant EC point (4 qwords)*/ } icp_qat_fw_maths_point_multiplication_gfp_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GFP Partial Point Verification , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_VERIFY_GFP_L256. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_VERIFY_GFP_L256. */ -typedef struct icp_qat_fw_maths_point_verify_gfp_l256_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_maths_point_verify_gfp_l256_output_s +{ + /* no output parameters */ } icp_qat_fw_maths_point_verify_gfp_l256_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GFP Point Multiplication , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GFP_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GFP_L512. */ -typedef struct icp_qat_fw_maths_point_multiplication_gfp_l512_output_s { - uint64_t xk; /**< x coordinate of resultant EC point (8 qwords)*/ - uint64_t yk; /**< y coordinate of resultant EC point (8 qwords)*/ +typedef struct icp_qat_fw_maths_point_multiplication_gfp_l512_output_s +{ + uint64_t xk; /**< x coordinate of resultant EC point (8 qwords)*/ + uint64_t yk; /**< y coordinate of resultant EC point (8 qwords)*/ } icp_qat_fw_maths_point_multiplication_gfp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GFP Partial Point , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_VERIFY_GFP_L512. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_VERIFY_GFP_L512. */ -typedef struct icp_qat_fw_maths_point_verify_gfp_l512_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_maths_point_verify_gfp_l512_output_s +{ + /* no output parameters */ } icp_qat_fw_maths_point_verify_gfp_l512_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GFP Point Multiplication , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_MULTIPLICATION_GFP_521. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_MULTIPLICATION_GFP_521. */ -typedef struct icp_qat_fw_maths_point_multiplication_gfp_521_output_s { - uint64_t xk; /**< x coordinate of resultant EC point (9 qwords)*/ - uint64_t yk; /**< y coordinate of resultant EC point (9 qwords)*/ +typedef struct icp_qat_fw_maths_point_multiplication_gfp_521_output_s +{ + uint64_t xk; /**< x coordinate of resultant EC point (9 qwords)*/ + uint64_t yk; /**< y coordinate of resultant EC point (9 qwords)*/ } icp_qat_fw_maths_point_multiplication_gfp_521_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief * Output parameter list for ECC GFP Partial Point Verification , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #MATHS_POINT_VERIFY_GFP_521. + * to be used when icp_qat_fw_pke_response_s::functionalityId is #MATHS_POINT_VERIFY_GFP_521. */ -typedef struct icp_qat_fw_maths_point_verify_gfp_521_output_s { - /* no output parameters */ +typedef struct icp_qat_fw_maths_point_verify_gfp_521_output_s +{ + /* no output parameters */ } icp_qat_fw_maths_point_verify_gfp_521_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC curve25519 Variable Point Multiplication - * [k]P(x), as specified in RFC7748 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #POINT_MULTIPLICATION_C25519. + * Output parameter list for ECC curve25519 Variable Point Multiplication [k]P(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #POINT_MULTIPLICATION_C25519. */ -typedef struct icp_qat_fw_point_multiplication_c25519_output_s { - uint64_t - xr; /**< xR = Montgomery affine coordinate X of point [k]P (4 - qwords)*/ +typedef struct icp_qat_fw_point_multiplication_c25519_output_s +{ + uint64_t xr; /**< xR = Montgomery affine coordinate X of point [k]P (4 qwords)*/ } icp_qat_fw_point_multiplication_c25519_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC curve25519 Generator Point Multiplication - * [k]G(x), as specified in RFC7748 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #GENERATOR_MULTIPLICATION_C25519. + * Output parameter list for ECC curve25519 Generator Point Multiplication [k]G(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #GENERATOR_MULTIPLICATION_C25519. */ -typedef struct icp_qat_fw_generator_multiplication_c25519_output_s { - uint64_t - xr; /**< xR = Montgomery affine coordinate X of point [k]G (4 - qwords)*/ +typedef struct icp_qat_fw_generator_multiplication_c25519_output_s +{ + uint64_t xr; /**< xR = Montgomery affine coordinate X of point [k]G (4 qwords)*/ } icp_qat_fw_generator_multiplication_c25519_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC edwards25519 Variable Point Multiplication - * [k]P, as specified in RFC8032 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #POINT_MULTIPLICATION_ED25519. - */ -typedef struct icp_qat_fw_point_multiplication_ed25519_output_s { - uint64_t - xr; /**< xR = Twisted Edwards affine coordinate X of point [k]P (4 - qwords)*/ - uint64_t - yr; /**< yR = Twisted Edwards affine coordinate Y of point [k]P (4 - qwords)*/ + * Output parameter list for ECC edwards25519 Variable Point Multiplication [k]P, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #POINT_MULTIPLICATION_ED25519. + */ +typedef struct icp_qat_fw_point_multiplication_ed25519_output_s +{ + uint64_t xr; /**< xR = Twisted Edwards affine coordinate X of point [k]P (4 qwords)*/ + uint64_t yr; /**< yR = Twisted Edwards affine coordinate Y of point [k]P (4 qwords)*/ } icp_qat_fw_point_multiplication_ed25519_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC edwards25519 Generator Point Multiplication - * [k]G, as specified in RFC8032 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #GENERATOR_MULTIPLICATION_ED25519. - */ -typedef struct icp_qat_fw_generator_multiplication_ed25519_output_s { - uint64_t - xr; /**< xR = Twisted Edwards affine coordinate X of point [k]G (4 - qwords)*/ - uint64_t - yr; /**< yR = Twisted Edwards affine coordinate Y of point [k]G (4 - qwords)*/ + * Output parameter list for ECC edwards25519 Generator Point Multiplication [k]G, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #GENERATOR_MULTIPLICATION_ED25519. + */ +typedef struct icp_qat_fw_generator_multiplication_ed25519_output_s +{ + uint64_t xr; /**< xR = Twisted Edwards affine coordinate X of point [k]G (4 qwords)*/ + uint64_t yr; /**< yR = Twisted Edwards affine coordinate Y of point [k]G (4 qwords)*/ } icp_qat_fw_generator_multiplication_ed25519_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC curve448 Variable Point Multiplication - * [k]P(x), as specified in RFC7748 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #POINT_MULTIPLICATION_C448. + * Output parameter list for ECC curve448 Variable Point Multiplication [k]P(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #POINT_MULTIPLICATION_C448. */ -typedef struct icp_qat_fw_point_multiplication_c448_output_s { - uint64_t - xr; /**< xR = Montgomery affine coordinate X of point [k]P (8 - qwords)*/ +typedef struct icp_qat_fw_point_multiplication_c448_output_s +{ + uint64_t xr; /**< xR = Montgomery affine coordinate X of point [k]P (8 qwords)*/ } icp_qat_fw_point_multiplication_c448_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC curve448 Generator Point Multiplication - * [k]G(x), as specified in RFC7748 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #GENERATOR_MULTIPLICATION_C448. + * Output parameter list for ECC curve448 Generator Point Multiplication [k]G(x), as specified in RFC7748 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #GENERATOR_MULTIPLICATION_C448. */ -typedef struct icp_qat_fw_generator_multiplication_c448_output_s { - uint64_t - xr; /**< xR = Montgomery affine coordinate X of point [k]G (8 - qwords)*/ +typedef struct icp_qat_fw_generator_multiplication_c448_output_s +{ + uint64_t xr; /**< xR = Montgomery affine coordinate X of point [k]G (8 qwords)*/ } icp_qat_fw_generator_multiplication_c448_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC edwards448 Variable Point Multiplication - * [k]P, as specified in RFC8032 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #POINT_MULTIPLICATION_ED448. + * Output parameter list for ECC edwards448 Variable Point Multiplication [k]P, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #POINT_MULTIPLICATION_ED448. */ -typedef struct icp_qat_fw_point_multiplication_ed448_output_s { - uint64_t xr; /**< xR = Edwards affine coordinate X of point [k]P (8 - qwords)*/ - uint64_t yr; /**< yR = Edwards affine coordinate Y of point [k]P (8 - qwords)*/ +typedef struct icp_qat_fw_point_multiplication_ed448_output_s +{ + uint64_t xr; /**< xR = Edwards affine coordinate X of point [k]P (8 qwords)*/ + uint64_t yr; /**< yR = Edwards affine coordinate Y of point [k]P (8 qwords)*/ } icp_qat_fw_point_multiplication_ed448_output_t; + + /** * @ingroup icp_qat_fw_mmp * @brief - * Output parameter list for ECC edwards448 Generator Point Multiplication - * [k]P, as specified in RFC8032 , - * to be used when icp_qat_fw_pke_response_s::functionalityId is - * #GENERATOR_MULTIPLICATION_ED448. + * Output parameter list for ECC edwards448 Generator Point Multiplication [k]P, as specified in RFC8032 , + * to be used when icp_qat_fw_pke_response_s::functionalityId is #GENERATOR_MULTIPLICATION_ED448. */ -typedef struct icp_qat_fw_generator_multiplication_ed448_output_s { - uint64_t xr; /**< xR = Edwards affine coordinate X of point [k]G (8 - qwords)*/ - uint64_t yr; /**< yR = Edwards affine coordinate Y of point [k]G (8 - qwords)*/ +typedef struct icp_qat_fw_generator_multiplication_ed448_output_s +{ + uint64_t xr; /**< xR = Edwards affine coordinate X of point [k]G (8 qwords)*/ + uint64_t yr; /**< yR = Edwards affine coordinate Y of point [k]G (8 qwords)*/ } icp_qat_fw_generator_multiplication_ed448_output_t; +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P521 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_ECDSA_SIGN_RS_P521. + */ +typedef struct icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_output_s +{ + uint64_t r; /**< ECDSA signature r (6 qwords)*/ + uint64_t s; /**< ECDSA signature s (6 qwords)*/ +} icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC P384 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_ECDSA_SIGN_RS_P384. + */ +typedef struct icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_output_s +{ + uint64_t r; /**< ECDSA signature r (6 qwords)*/ + uint64_t s; /**< ECDSA signature s (6 qwords)*/ +} icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for ECC KPT P256 ECDSA Sign RS , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_ECDSA_SIGN_RS_P256. + */ +typedef struct icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_output_s +{ + uint64_t r; /**< ECDSA signature r (4 qwords)*/ + uint64_t s; /**< ECDSA signature s (4 qwords)*/ +} icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 512 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_512. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_512_output_s +{ + uint64_t m; /**< message representative, < n (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_512_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 1024 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_1024. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_1024_output_s +{ + uint64_t m; /**< message representative, < n (16 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_1024_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 1536 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_1536. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_1536_output_s +{ + uint64_t m; /**< message representative, < n (24 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_1536_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 2048 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_2048. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_2048_output_s +{ + uint64_t m; /**< message representative, < n (32 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_2048_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 3072 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_3072. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_3072_output_s +{ + uint64_t m; /**< message representative, < n (48 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_3072_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 4096 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_4096. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_4096_output_s +{ + uint64_t m; /**< message representative, < n (64 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_4096_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 8192 Decryption , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP1_8192. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp1_8192_output_s +{ + uint64_t m; /**< message representative, < n (128 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp1_8192_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 512 decryption second form , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_512. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_512_output_s +{ + uint64_t m; /**< message representative, < (p*q) (8 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_512_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 1024 Decryption with CRT , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_1024. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_1024_output_s +{ + uint64_t m; /**< message representative, < (p*q) (16 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_1024_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for KPT RSA 1536 Decryption with CRT , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_1536. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_1536_output_s +{ + uint64_t m; /**< message representative, < (p*q) (24 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_1536_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 2048 Decryption with CRT , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_2048. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_2048_output_s +{ + uint64_t m; /**< message representative, < (p*q) (32 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_2048_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_3072. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_3072_output_s +{ + uint64_t m; /**< message representative, < (p*q) (48 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_3072_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 4096 Decryption with CRT , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_4096. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_4096_output_s +{ + uint64_t m; /**< message representative, < (p*q) (64 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_4096_output_t; + +/** + * @ingroup icp_qat_fw_mmp + * @brief + * Output parameter list for RSA 8192 Decryption with CRT , + * to be used when icp_qat_fw_pke_response_s::functionalityId is + * #PKE_KPT_RSA_DP2_8192. + */ +typedef struct icp_qat_fw_mmp_kpt_rsa_dp2_8192_output_s +{ + uint64_t m; /**< message representative, < (p*q) (128 qwords)*/ +} icp_qat_fw_mmp_kpt_rsa_dp2_8192_output_t; + /** * @ingroup icp_qat_fw_mmp * @brief * MMP output parameters */ -typedef union icp_qat_fw_mmp_output_param_u { - /** Generic parameter structure : All members of this wrapper structure - * are pointers to large integers. - */ - uint64_t flat_array[ICP_QAT_FW_PKE_OUTPUT_COUNT_MAX]; +typedef union icp_qat_fw_mmp_output_param_u +{ + /** Generic parameter structure : All members of this wrapper structure + * are pointers to large integers. + */ + uint64_t flat_array[ICP_QAT_FW_PKE_OUTPUT_COUNT_MAX]; + + /** ECC P384 Variable Point Multiplication [k]P */ + icp_qat_fw_mmp_ec_point_multiplication_p384_output_t + mmp_ec_point_multiplication_p384; + + /** ECC P384 Generator Point Multiplication [k]G */ + icp_qat_fw_mmp_ec_generator_multiplication_p384_output_t + mmp_ec_generator_multiplication_p384; + + /** ECC P384 ECDSA Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_t mmp_ecdsa_sign_rs_p384; + + /** ECC P256 Variable Point Multiplication [k]P */ + icp_qat_fw_mmp_ec_point_multiplication_p256_output_t + mmp_ec_point_multiplication_p256; - /** Initialisation sequence */ - icp_qat_fw_mmp_init_output_t mmp_init; + /** ECC P256 Generator Point Multiplication [k]G */ + icp_qat_fw_mmp_ec_generator_multiplication_p256_output_t + mmp_ec_generator_multiplication_p256; - /** Diffie-Hellman Modular exponentiation base 2 for 768-bit numbers */ - icp_qat_fw_mmp_dh_g2_768_output_t mmp_dh_g2_768; + /** ECC P256 ECDSA Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_t mmp_ecdsa_sign_rs_p256; - /** Diffie-Hellman Modular exponentiation for 768-bit numbers */ - icp_qat_fw_mmp_dh_768_output_t mmp_dh_768; + /** ECC SM2 point multiply [k]G */ + icp_qat_fw_mmp_ecsm2_generator_multiplication_output_t + mmp_ecsm2_generator_multiplication; - /** Diffie-Hellman Modular exponentiation base 2 for 1024-bit numbers */ - icp_qat_fw_mmp_dh_g2_1024_output_t mmp_dh_g2_1024; + /** ECC curve25519 Variable Point Multiplication [k]P(x), as specified in + * RFC7748 */ + icp_qat_fw_point_multiplication_c25519_output_t point_multiplication_c25519; - /** Diffie-Hellman Modular exponentiation for 1024-bit numbers */ - icp_qat_fw_mmp_dh_1024_output_t mmp_dh_1024; + /** ECC curve25519 Generator Point Multiplication [k]G(x), as specified in + * RFC7748 */ + icp_qat_fw_generator_multiplication_c25519_output_t + generator_multiplication_c25519; - /** Diffie-Hellman Modular exponentiation base 2 for 1536-bit numbers */ - icp_qat_fw_mmp_dh_g2_1536_output_t mmp_dh_g2_1536; + /** ECC edwards25519 Variable Point Multiplication [k]P, as specified in + * RFC8032 */ + icp_qat_fw_point_multiplication_ed25519_output_t + point_multiplication_ed25519; - /** Diffie-Hellman Modular exponentiation for 1536-bit numbers */ - icp_qat_fw_mmp_dh_1536_output_t mmp_dh_1536; + /** ECC edwards25519 Generator Point Multiplication [k]G, as specified in + * RFC8032 */ + icp_qat_fw_generator_multiplication_ed25519_output_t + generator_multiplication_ed25519; - /** Diffie-Hellman Modular exponentiation base 2 for 2048-bit numbers */ - icp_qat_fw_mmp_dh_g2_2048_output_t mmp_dh_g2_2048; + /** ECC curve448 Variable Point Multiplication [k]P(x), as specified in + * RFC7748 */ + icp_qat_fw_point_multiplication_c448_output_t point_multiplication_c448; - /** Diffie-Hellman Modular exponentiation for 2048-bit numbers */ - icp_qat_fw_mmp_dh_2048_output_t mmp_dh_2048; + /** ECC curve448 Generator Point Multiplication [k]G(x), as specified in + * RFC7748 */ + icp_qat_fw_generator_multiplication_c448_output_t + generator_multiplication_c448; - /** Diffie-Hellman Modular exponentiation base 2 for 3072-bit numbers */ - icp_qat_fw_mmp_dh_g2_3072_output_t mmp_dh_g2_3072; + /** ECC edwards448 Variable Point Multiplication [k]P, as specified in + * RFC8032 */ + icp_qat_fw_point_multiplication_ed448_output_t point_multiplication_ed448; - /** Diffie-Hellman Modular exponentiation for 3072-bit numbers */ - icp_qat_fw_mmp_dh_3072_output_t mmp_dh_3072; + /** ECC edwards448 Generator Point Multiplication [k]G, as specified in + * RFC8032 */ + icp_qat_fw_generator_multiplication_ed448_output_t + generator_multiplication_ed448; - /** Diffie-Hellman Modular exponentiation base 2 for 4096-bit numbers */ - icp_qat_fw_mmp_dh_g2_4096_output_t mmp_dh_g2_4096; + /** Initialisation sequence */ + icp_qat_fw_mmp_init_output_t mmp_init; - /** Diffie-Hellman Modular exponentiation for 4096-bit numbers */ - icp_qat_fw_mmp_dh_4096_output_t mmp_dh_4096; + /** Diffie-Hellman Modular exponentiation base 2 for 768-bit numbers */ + icp_qat_fw_mmp_dh_g2_768_output_t mmp_dh_g2_768; - /** RSA 512 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_512_output_t mmp_rsa_kp1_512; + /** Diffie-Hellman Modular exponentiation for 768-bit numbers */ + icp_qat_fw_mmp_dh_768_output_t mmp_dh_768; - /** RSA 512 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_512_output_t mmp_rsa_kp2_512; + /** Diffie-Hellman Modular exponentiation base 2 for 1024-bit numbers */ + icp_qat_fw_mmp_dh_g2_1024_output_t mmp_dh_g2_1024; - /** RSA 512 Encryption */ - icp_qat_fw_mmp_rsa_ep_512_output_t mmp_rsa_ep_512; + /** Diffie-Hellman Modular exponentiation for 1024-bit numbers */ + icp_qat_fw_mmp_dh_1024_output_t mmp_dh_1024; - /** RSA 512 Decryption */ - icp_qat_fw_mmp_rsa_dp1_512_output_t mmp_rsa_dp1_512; + /** Diffie-Hellman Modular exponentiation base 2 for 1536-bit numbers */ + icp_qat_fw_mmp_dh_g2_1536_output_t mmp_dh_g2_1536; - /** RSA 1024 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_512_output_t mmp_rsa_dp2_512; + /** Diffie-Hellman Modular exponentiation for 1536-bit numbers */ + icp_qat_fw_mmp_dh_1536_output_t mmp_dh_1536; - /** RSA 1024 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_1024_output_t mmp_rsa_kp1_1024; + /** Diffie-Hellman Modular exponentiation base 2 for 2048-bit numbers */ + icp_qat_fw_mmp_dh_g2_2048_output_t mmp_dh_g2_2048; - /** RSA 1024 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_1024_output_t mmp_rsa_kp2_1024; + /** Diffie-Hellman Modular exponentiation for 2048-bit numbers */ + icp_qat_fw_mmp_dh_2048_output_t mmp_dh_2048; - /** RSA 1024 Encryption */ - icp_qat_fw_mmp_rsa_ep_1024_output_t mmp_rsa_ep_1024; + /** Diffie-Hellman Modular exponentiation base 2 for 3072-bit numbers */ + icp_qat_fw_mmp_dh_g2_3072_output_t mmp_dh_g2_3072; - /** RSA 1024 Decryption */ - icp_qat_fw_mmp_rsa_dp1_1024_output_t mmp_rsa_dp1_1024; + /** Diffie-Hellman Modular exponentiation for 3072-bit numbers */ + icp_qat_fw_mmp_dh_3072_output_t mmp_dh_3072; - /** RSA 1024 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_1024_output_t mmp_rsa_dp2_1024; + /** Diffie-Hellman Modular exponentiation base 2 for 4096-bit numbers */ + icp_qat_fw_mmp_dh_g2_4096_output_t mmp_dh_g2_4096; - /** RSA 1536 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_1536_output_t mmp_rsa_kp1_1536; + /** Diffie-Hellman Modular exponentiation for 4096-bit numbers */ + icp_qat_fw_mmp_dh_4096_output_t mmp_dh_4096; - /** RSA 1536 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_1536_output_t mmp_rsa_kp2_1536; + /** Diffie-Hellman Modular exponentiation base 2 for 8192-bit numbers */ + icp_qat_fw_mmp_dh_g2_8192_output_t mmp_dh_g2_8192; - /** RSA 1536 Encryption */ - icp_qat_fw_mmp_rsa_ep_1536_output_t mmp_rsa_ep_1536; + /** Diffie-Hellman Modular exponentiation for 8192-bit numbers */ + icp_qat_fw_mmp_dh_8192_output_t mmp_dh_8192; - /** RSA 1536 Decryption */ - icp_qat_fw_mmp_rsa_dp1_1536_output_t mmp_rsa_dp1_1536; + /** RSA 512 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_512_output_t mmp_rsa_kp1_512; - /** RSA 1536 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_1536_output_t mmp_rsa_dp2_1536; + /** RSA 512 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_512_output_t mmp_rsa_kp2_512; - /** RSA 2048 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_2048_output_t mmp_rsa_kp1_2048; + /** RSA 512 Encryption */ + icp_qat_fw_mmp_rsa_ep_512_output_t mmp_rsa_ep_512; - /** RSA 2048 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_2048_output_t mmp_rsa_kp2_2048; + /** RSA 512 Decryption */ + icp_qat_fw_mmp_rsa_dp1_512_output_t mmp_rsa_dp1_512; - /** RSA 2048 Encryption */ - icp_qat_fw_mmp_rsa_ep_2048_output_t mmp_rsa_ep_2048; + /** RSA 1024 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_512_output_t mmp_rsa_dp2_512; - /** RSA 2048 Decryption */ - icp_qat_fw_mmp_rsa_dp1_2048_output_t mmp_rsa_dp1_2048; + /** RSA 1024 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_1024_output_t mmp_rsa_kp1_1024; - /** RSA 2048 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_2048_output_t mmp_rsa_dp2_2048; + /** RSA 1024 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_1024_output_t mmp_rsa_kp2_1024; - /** RSA 3072 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_3072_output_t mmp_rsa_kp1_3072; + /** RSA 1024 Encryption */ + icp_qat_fw_mmp_rsa_ep_1024_output_t mmp_rsa_ep_1024; - /** RSA 3072 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_3072_output_t mmp_rsa_kp2_3072; + /** RSA 1024 Decryption */ + icp_qat_fw_mmp_rsa_dp1_1024_output_t mmp_rsa_dp1_1024; - /** RSA 3072 Encryption */ - icp_qat_fw_mmp_rsa_ep_3072_output_t mmp_rsa_ep_3072; + /** RSA 1024 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_1024_output_t mmp_rsa_dp2_1024; - /** RSA 3072 Decryption */ - icp_qat_fw_mmp_rsa_dp1_3072_output_t mmp_rsa_dp1_3072; + /** RSA 1536 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_1536_output_t mmp_rsa_kp1_1536; - /** RSA 3072 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_3072_output_t mmp_rsa_dp2_3072; + /** RSA 1536 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_1536_output_t mmp_rsa_kp2_1536; - /** RSA 4096 key generation first form */ - icp_qat_fw_mmp_rsa_kp1_4096_output_t mmp_rsa_kp1_4096; + /** RSA 1536 Encryption */ + icp_qat_fw_mmp_rsa_ep_1536_output_t mmp_rsa_ep_1536; - /** RSA 4096 key generation second form */ - icp_qat_fw_mmp_rsa_kp2_4096_output_t mmp_rsa_kp2_4096; + /** RSA 1536 Decryption */ + icp_qat_fw_mmp_rsa_dp1_1536_output_t mmp_rsa_dp1_1536; - /** RSA 4096 Encryption */ - icp_qat_fw_mmp_rsa_ep_4096_output_t mmp_rsa_ep_4096; + /** RSA 1536 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_1536_output_t mmp_rsa_dp2_1536; - /** RSA 4096 Decryption */ - icp_qat_fw_mmp_rsa_dp1_4096_output_t mmp_rsa_dp1_4096; + /** RSA 2048 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_2048_output_t mmp_rsa_kp1_2048; - /** RSA 4096 Decryption with CRT */ - icp_qat_fw_mmp_rsa_dp2_4096_output_t mmp_rsa_dp2_4096; + /** RSA 2048 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_2048_output_t mmp_rsa_kp2_2048; - /** GCD primality test for 192-bit numbers */ - icp_qat_fw_mmp_gcd_pt_192_output_t mmp_gcd_pt_192; + /** RSA 2048 Encryption */ + icp_qat_fw_mmp_rsa_ep_2048_output_t mmp_rsa_ep_2048; - /** GCD primality test for 256-bit numbers */ - icp_qat_fw_mmp_gcd_pt_256_output_t mmp_gcd_pt_256; + /** RSA 2048 Decryption */ + icp_qat_fw_mmp_rsa_dp1_2048_output_t mmp_rsa_dp1_2048; - /** GCD primality test for 384-bit numbers */ - icp_qat_fw_mmp_gcd_pt_384_output_t mmp_gcd_pt_384; + /** RSA 2048 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_2048_output_t mmp_rsa_dp2_2048; - /** GCD primality test for 512-bit numbers */ - icp_qat_fw_mmp_gcd_pt_512_output_t mmp_gcd_pt_512; + /** RSA 3072 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_3072_output_t mmp_rsa_kp1_3072; - /** GCD primality test for 768-bit numbers */ - icp_qat_fw_mmp_gcd_pt_768_output_t mmp_gcd_pt_768; + /** RSA 3072 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_3072_output_t mmp_rsa_kp2_3072; - /** GCD primality test for 1024-bit numbers */ - icp_qat_fw_mmp_gcd_pt_1024_output_t mmp_gcd_pt_1024; + /** RSA 3072 Encryption */ + icp_qat_fw_mmp_rsa_ep_3072_output_t mmp_rsa_ep_3072; - /** GCD primality test for 1536-bit numbers */ - icp_qat_fw_mmp_gcd_pt_1536_output_t mmp_gcd_pt_1536; + /** RSA 3072 Decryption */ + icp_qat_fw_mmp_rsa_dp1_3072_output_t mmp_rsa_dp1_3072; - /** GCD primality test for 2048-bit numbers */ - icp_qat_fw_mmp_gcd_pt_2048_output_t mmp_gcd_pt_2048; + /** RSA 3072 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_3072_output_t mmp_rsa_dp2_3072; - /** GCD primality test for 3072-bit numbers */ - icp_qat_fw_mmp_gcd_pt_3072_output_t mmp_gcd_pt_3072; + /** RSA 4096 key generation first form */ + icp_qat_fw_mmp_rsa_kp1_4096_output_t mmp_rsa_kp1_4096; - /** GCD primality test for 4096-bit numbers */ - icp_qat_fw_mmp_gcd_pt_4096_output_t mmp_gcd_pt_4096; + /** RSA 4096 key generation second form */ + icp_qat_fw_mmp_rsa_kp2_4096_output_t mmp_rsa_kp2_4096; - /** Fermat primality test for 160-bit numbers */ - icp_qat_fw_mmp_fermat_pt_160_output_t mmp_fermat_pt_160; + /** RSA 4096 Encryption */ + icp_qat_fw_mmp_rsa_ep_4096_output_t mmp_rsa_ep_4096; - /** Fermat primality test for 512-bit numbers */ - icp_qat_fw_mmp_fermat_pt_512_output_t mmp_fermat_pt_512; + /** RSA 4096 Decryption */ + icp_qat_fw_mmp_rsa_dp1_4096_output_t mmp_rsa_dp1_4096; - /** Fermat primality test for <e; 512-bit numbers */ - icp_qat_fw_mmp_fermat_pt_l512_output_t mmp_fermat_pt_l512; + /** RSA 4096 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_4096_output_t mmp_rsa_dp2_4096; - /** Fermat primality test for 768-bit numbers */ - icp_qat_fw_mmp_fermat_pt_768_output_t mmp_fermat_pt_768; + /** RSA 8192 Encryption */ + icp_qat_fw_mmp_rsa_ep_8192_output_t mmp_rsa_ep_8192; - /** Fermat primality test for 1024-bit numbers */ - icp_qat_fw_mmp_fermat_pt_1024_output_t mmp_fermat_pt_1024; + /** RSA 8192 Decryption */ + icp_qat_fw_mmp_rsa_dp1_8192_output_t mmp_rsa_dp1_8192; - /** Fermat primality test for 1536-bit numbers */ - icp_qat_fw_mmp_fermat_pt_1536_output_t mmp_fermat_pt_1536; + /** RSA 8192 Decryption with CRT */ + icp_qat_fw_mmp_rsa_dp2_8192_output_t mmp_rsa_dp2_8192; - /** Fermat primality test for 2048-bit numbers */ - icp_qat_fw_mmp_fermat_pt_2048_output_t mmp_fermat_pt_2048; + /** GCD primality test for 192-bit numbers */ + icp_qat_fw_mmp_gcd_pt_192_output_t mmp_gcd_pt_192; - /** Fermat primality test for 3072-bit numbers */ - icp_qat_fw_mmp_fermat_pt_3072_output_t mmp_fermat_pt_3072; + /** GCD primality test for 256-bit numbers */ + icp_qat_fw_mmp_gcd_pt_256_output_t mmp_gcd_pt_256; - /** Fermat primality test for 4096-bit numbers */ - icp_qat_fw_mmp_fermat_pt_4096_output_t mmp_fermat_pt_4096; + /** GCD primality test for 384-bit numbers */ + icp_qat_fw_mmp_gcd_pt_384_output_t mmp_gcd_pt_384; - /** Miller-Rabin primality test for 160-bit numbers */ - icp_qat_fw_mmp_mr_pt_160_output_t mmp_mr_pt_160; + /** GCD primality test for 512-bit numbers */ + icp_qat_fw_mmp_gcd_pt_512_output_t mmp_gcd_pt_512; - /** Miller-Rabin primality test for 512-bit numbers */ - icp_qat_fw_mmp_mr_pt_512_output_t mmp_mr_pt_512; + /** GCD primality test for 768-bit numbers */ + icp_qat_fw_mmp_gcd_pt_768_output_t mmp_gcd_pt_768; - /** Miller-Rabin primality test for 768-bit numbers */ - icp_qat_fw_mmp_mr_pt_768_output_t mmp_mr_pt_768; + /** GCD primality test for 1024-bit numbers */ + icp_qat_fw_mmp_gcd_pt_1024_output_t mmp_gcd_pt_1024; - /** Miller-Rabin primality test for 1024-bit numbers */ - icp_qat_fw_mmp_mr_pt_1024_output_t mmp_mr_pt_1024; + /** GCD primality test for 1536-bit numbers */ + icp_qat_fw_mmp_gcd_pt_1536_output_t mmp_gcd_pt_1536; - /** Miller-Rabin primality test for 1536-bit numbers */ - icp_qat_fw_mmp_mr_pt_1536_output_t mmp_mr_pt_1536; + /** GCD primality test for 2048-bit numbers */ + icp_qat_fw_mmp_gcd_pt_2048_output_t mmp_gcd_pt_2048; - /** Miller-Rabin primality test for 2048-bit numbers */ - icp_qat_fw_mmp_mr_pt_2048_output_t mmp_mr_pt_2048; + /** GCD primality test for 3072-bit numbers */ + icp_qat_fw_mmp_gcd_pt_3072_output_t mmp_gcd_pt_3072; - /** Miller-Rabin primality test for 3072-bit numbers */ - icp_qat_fw_mmp_mr_pt_3072_output_t mmp_mr_pt_3072; + /** GCD primality test for 4096-bit numbers */ + icp_qat_fw_mmp_gcd_pt_4096_output_t mmp_gcd_pt_4096; - /** Miller-Rabin primality test for 4096-bit numbers */ - icp_qat_fw_mmp_mr_pt_4096_output_t mmp_mr_pt_4096; + /** Fermat primality test for 160-bit numbers */ + icp_qat_fw_mmp_fermat_pt_160_output_t mmp_fermat_pt_160; - /** Miller-Rabin primality test for 512-bit numbers */ - icp_qat_fw_mmp_mr_pt_l512_output_t mmp_mr_pt_l512; + /** Fermat primality test for 512-bit numbers */ + icp_qat_fw_mmp_fermat_pt_512_output_t mmp_fermat_pt_512; - /** Lucas primality test for 160-bit numbers */ - icp_qat_fw_mmp_lucas_pt_160_output_t mmp_lucas_pt_160; + /** Fermat primality test for <e; 512-bit numbers */ + icp_qat_fw_mmp_fermat_pt_l512_output_t mmp_fermat_pt_l512; - /** Lucas primality test for 512-bit numbers */ - icp_qat_fw_mmp_lucas_pt_512_output_t mmp_lucas_pt_512; + /** Fermat primality test for 768-bit numbers */ + icp_qat_fw_mmp_fermat_pt_768_output_t mmp_fermat_pt_768; - /** Lucas primality test for 768-bit numbers */ - icp_qat_fw_mmp_lucas_pt_768_output_t mmp_lucas_pt_768; + /** Fermat primality test for 1024-bit numbers */ + icp_qat_fw_mmp_fermat_pt_1024_output_t mmp_fermat_pt_1024; - /** Lucas primality test for 1024-bit numbers */ - icp_qat_fw_mmp_lucas_pt_1024_output_t mmp_lucas_pt_1024; + /** Fermat primality test for 1536-bit numbers */ + icp_qat_fw_mmp_fermat_pt_1536_output_t mmp_fermat_pt_1536; - /** Lucas primality test for 1536-bit numbers */ - icp_qat_fw_mmp_lucas_pt_1536_output_t mmp_lucas_pt_1536; + /** Fermat primality test for 2048-bit numbers */ + icp_qat_fw_mmp_fermat_pt_2048_output_t mmp_fermat_pt_2048; - /** Lucas primality test for 2048-bit numbers */ - icp_qat_fw_mmp_lucas_pt_2048_output_t mmp_lucas_pt_2048; + /** Fermat primality test for 3072-bit numbers */ + icp_qat_fw_mmp_fermat_pt_3072_output_t mmp_fermat_pt_3072; - /** Lucas primality test for 3072-bit numbers */ - icp_qat_fw_mmp_lucas_pt_3072_output_t mmp_lucas_pt_3072; + /** Fermat primality test for 4096-bit numbers */ + icp_qat_fw_mmp_fermat_pt_4096_output_t mmp_fermat_pt_4096; - /** Lucas primality test for 4096-bit numbers */ - icp_qat_fw_mmp_lucas_pt_4096_output_t mmp_lucas_pt_4096; + /** Miller-Rabin primality test for 160-bit numbers */ + icp_qat_fw_mmp_mr_pt_160_output_t mmp_mr_pt_160; - /** Lucas primality test for L512-bit numbers */ - icp_qat_fw_mmp_lucas_pt_l512_output_t mmp_lucas_pt_l512; + /** Miller-Rabin primality test for 512-bit numbers */ + icp_qat_fw_mmp_mr_pt_512_output_t mmp_mr_pt_512; - /** Modular exponentiation for numbers less than 512-bits */ - icp_qat_fw_maths_modexp_l512_output_t maths_modexp_l512; + /** Miller-Rabin primality test for 768-bit numbers */ + icp_qat_fw_mmp_mr_pt_768_output_t mmp_mr_pt_768; - /** Modular exponentiation for numbers less than 1024-bit */ - icp_qat_fw_maths_modexp_l1024_output_t maths_modexp_l1024; + /** Miller-Rabin primality test for 1024-bit numbers */ + icp_qat_fw_mmp_mr_pt_1024_output_t mmp_mr_pt_1024; - /** Modular exponentiation for numbers less than 1536-bits */ - icp_qat_fw_maths_modexp_l1536_output_t maths_modexp_l1536; + /** Miller-Rabin primality test for 1536-bit numbers */ + icp_qat_fw_mmp_mr_pt_1536_output_t mmp_mr_pt_1536; - /** Modular exponentiation for numbers less than 2048-bit */ - icp_qat_fw_maths_modexp_l2048_output_t maths_modexp_l2048; + /** Miller-Rabin primality test for 2048-bit numbers */ + icp_qat_fw_mmp_mr_pt_2048_output_t mmp_mr_pt_2048; - /** Modular exponentiation for numbers less than 2560-bits */ - icp_qat_fw_maths_modexp_l2560_output_t maths_modexp_l2560; + /** Miller-Rabin primality test for 3072-bit numbers */ + icp_qat_fw_mmp_mr_pt_3072_output_t mmp_mr_pt_3072; - /** Modular exponentiation for numbers less than 3072-bits */ - icp_qat_fw_maths_modexp_l3072_output_t maths_modexp_l3072; + /** Miller-Rabin primality test for 4096-bit numbers */ + icp_qat_fw_mmp_mr_pt_4096_output_t mmp_mr_pt_4096; - /** Modular exponentiation for numbers less than 3584-bits */ - icp_qat_fw_maths_modexp_l3584_output_t maths_modexp_l3584; + /** Miller-Rabin primality test for 512-bit numbers */ + icp_qat_fw_mmp_mr_pt_l512_output_t mmp_mr_pt_l512; - /** Modular exponentiation for numbers less than 4096-bit */ - icp_qat_fw_maths_modexp_l4096_output_t maths_modexp_l4096; + /** Lucas primality test for 160-bit numbers */ + icp_qat_fw_mmp_lucas_pt_160_output_t mmp_lucas_pt_160; - /** Modular multiplicative inverse for numbers less than 128 bits */ - icp_qat_fw_maths_modinv_odd_l128_output_t maths_modinv_odd_l128; + /** Lucas primality test for 512-bit numbers */ + icp_qat_fw_mmp_lucas_pt_512_output_t mmp_lucas_pt_512; - /** Modular multiplicative inverse for numbers less than 192 bits */ - icp_qat_fw_maths_modinv_odd_l192_output_t maths_modinv_odd_l192; + /** Lucas primality test for 768-bit numbers */ + icp_qat_fw_mmp_lucas_pt_768_output_t mmp_lucas_pt_768; - /** Modular multiplicative inverse for numbers less than 256 bits */ - icp_qat_fw_maths_modinv_odd_l256_output_t maths_modinv_odd_l256; + /** Lucas primality test for 1024-bit numbers */ + icp_qat_fw_mmp_lucas_pt_1024_output_t mmp_lucas_pt_1024; - /** Modular multiplicative inverse for numbers less than 384 bits */ - icp_qat_fw_maths_modinv_odd_l384_output_t maths_modinv_odd_l384; + /** Lucas primality test for 1536-bit numbers */ + icp_qat_fw_mmp_lucas_pt_1536_output_t mmp_lucas_pt_1536; - /** Modular multiplicative inverse for numbers less than 512 bits */ - icp_qat_fw_maths_modinv_odd_l512_output_t maths_modinv_odd_l512; + /** Lucas primality test for 2048-bit numbers */ + icp_qat_fw_mmp_lucas_pt_2048_output_t mmp_lucas_pt_2048; - /** Modular multiplicative inverse for numbers less than 768 bits */ - icp_qat_fw_maths_modinv_odd_l768_output_t maths_modinv_odd_l768; + /** Lucas primality test for 3072-bit numbers */ + icp_qat_fw_mmp_lucas_pt_3072_output_t mmp_lucas_pt_3072; - /** Modular multiplicative inverse for numbers less than 1024 bits */ - icp_qat_fw_maths_modinv_odd_l1024_output_t maths_modinv_odd_l1024; + /** Lucas primality test for 4096-bit numbers */ + icp_qat_fw_mmp_lucas_pt_4096_output_t mmp_lucas_pt_4096; - /** Modular multiplicative inverse for numbers less than 1536 bits */ - icp_qat_fw_maths_modinv_odd_l1536_output_t maths_modinv_odd_l1536; + /** Lucas primality test for L512-bit numbers */ + icp_qat_fw_mmp_lucas_pt_l512_output_t mmp_lucas_pt_l512; - /** Modular multiplicative inverse for numbers less than 2048 bits */ - icp_qat_fw_maths_modinv_odd_l2048_output_t maths_modinv_odd_l2048; + /** Modular exponentiation for numbers less than 512-bits */ + icp_qat_fw_maths_modexp_l512_output_t maths_modexp_l512; - /** Modular multiplicative inverse for numbers less than 3072 bits */ - icp_qat_fw_maths_modinv_odd_l3072_output_t maths_modinv_odd_l3072; + /** Modular exponentiation for numbers less than 1024-bit */ + icp_qat_fw_maths_modexp_l1024_output_t maths_modexp_l1024; - /** Modular multiplicative inverse for numbers less than 4096 bits */ - icp_qat_fw_maths_modinv_odd_l4096_output_t maths_modinv_odd_l4096; + /** Modular exponentiation for numbers less than 1536-bits */ + icp_qat_fw_maths_modexp_l1536_output_t maths_modexp_l1536; - /** Modular multiplicative inverse for numbers less than 128 bits */ - icp_qat_fw_maths_modinv_even_l128_output_t maths_modinv_even_l128; + /** Modular exponentiation for numbers less than 2048-bit */ + icp_qat_fw_maths_modexp_l2048_output_t maths_modexp_l2048; - /** Modular multiplicative inverse for numbers less than 192 bits */ - icp_qat_fw_maths_modinv_even_l192_output_t maths_modinv_even_l192; + /** Modular exponentiation for numbers less than 2560-bits */ + icp_qat_fw_maths_modexp_l2560_output_t maths_modexp_l2560; - /** Modular multiplicative inverse for numbers less than 256 bits */ - icp_qat_fw_maths_modinv_even_l256_output_t maths_modinv_even_l256; + /** Modular exponentiation for numbers less than 3072-bits */ + icp_qat_fw_maths_modexp_l3072_output_t maths_modexp_l3072; - /** Modular multiplicative inverse for numbers less than 384 bits */ - icp_qat_fw_maths_modinv_even_l384_output_t maths_modinv_even_l384; + /** Modular exponentiation for numbers less than 3584-bits */ + icp_qat_fw_maths_modexp_l3584_output_t maths_modexp_l3584; - /** Modular multiplicative inverse for numbers less than 512 bits */ - icp_qat_fw_maths_modinv_even_l512_output_t maths_modinv_even_l512; + /** Modular exponentiation for numbers less than 4096-bit */ + icp_qat_fw_maths_modexp_l4096_output_t maths_modexp_l4096; - /** Modular multiplicative inverse for numbers less than 768 bits */ - icp_qat_fw_maths_modinv_even_l768_output_t maths_modinv_even_l768; + /** Modular exponentiation for numbers up to 8192 bits */ + icp_qat_fw_maths_modexp_l8192_output_t maths_modexp_l8192; - /** Modular multiplicative inverse for numbers less than 1024 bits */ - icp_qat_fw_maths_modinv_even_l1024_output_t maths_modinv_even_l1024; + /** Modular multiplicative inverse for numbers less than 128 bits */ + icp_qat_fw_maths_modinv_odd_l128_output_t maths_modinv_odd_l128; - /** Modular multiplicative inverse for numbers less than 1536 bits */ - icp_qat_fw_maths_modinv_even_l1536_output_t maths_modinv_even_l1536; + /** Modular multiplicative inverse for numbers less than 192 bits */ + icp_qat_fw_maths_modinv_odd_l192_output_t maths_modinv_odd_l192; - /** Modular multiplicative inverse for numbers less than 2048 bits */ - icp_qat_fw_maths_modinv_even_l2048_output_t maths_modinv_even_l2048; + /** Modular multiplicative inverse for numbers less than 256 bits */ + icp_qat_fw_maths_modinv_odd_l256_output_t maths_modinv_odd_l256; - /** Modular multiplicative inverse for numbers less than 3072 bits */ - icp_qat_fw_maths_modinv_even_l3072_output_t maths_modinv_even_l3072; + /** Modular multiplicative inverse for numbers less than 384 bits */ + icp_qat_fw_maths_modinv_odd_l384_output_t maths_modinv_odd_l384; - /** Modular multiplicative inverse for numbers less than 4096 bits */ - icp_qat_fw_maths_modinv_even_l4096_output_t maths_modinv_even_l4096; + /** Modular multiplicative inverse for numbers less than 512 bits */ + icp_qat_fw_maths_modinv_odd_l512_output_t maths_modinv_odd_l512; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_1024_160_output_t mmp_dsa_gen_p_1024_160; + /** Modular multiplicative inverse for numbers less than 768 bits */ + icp_qat_fw_maths_modinv_odd_l768_output_t maths_modinv_odd_l768; - /** DSA key generation G */ - icp_qat_fw_mmp_dsa_gen_g_1024_output_t mmp_dsa_gen_g_1024; + /** Modular multiplicative inverse for numbers less than 1024 bits */ + icp_qat_fw_maths_modinv_odd_l1024_output_t maths_modinv_odd_l1024; - /** DSA key generation Y */ - icp_qat_fw_mmp_dsa_gen_y_1024_output_t mmp_dsa_gen_y_1024; + /** Modular multiplicative inverse for numbers less than 1536 bits */ + icp_qat_fw_maths_modinv_odd_l1536_output_t maths_modinv_odd_l1536; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_1024_160_output_t mmp_dsa_sign_r_1024_160; + /** Modular multiplicative inverse for numbers less than 2048 bits */ + icp_qat_fw_maths_modinv_odd_l2048_output_t maths_modinv_odd_l2048; - /** DSA Sign S */ - icp_qat_fw_mmp_dsa_sign_s_160_output_t mmp_dsa_sign_s_160; + /** Modular multiplicative inverse for numbers less than 3072 bits */ + icp_qat_fw_maths_modinv_odd_l3072_output_t maths_modinv_odd_l3072; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_t mmp_dsa_sign_r_s_1024_160; + /** Modular multiplicative inverse for numbers less than 4096 bits */ + icp_qat_fw_maths_modinv_odd_l4096_output_t maths_modinv_odd_l4096; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_1024_160_output_t mmp_dsa_verify_1024_160; + /** Modular multiplicative inverse for numbers up to 8192 bits */ + icp_qat_fw_maths_modinv_odd_l8192_output_t maths_modinv_odd_l8192; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_2048_224_output_t mmp_dsa_gen_p_2048_224; + /** Modular multiplicative inverse for numbers less than 128 bits */ + icp_qat_fw_maths_modinv_even_l128_output_t maths_modinv_even_l128; - /** DSA key generation Y */ - icp_qat_fw_mmp_dsa_gen_y_2048_output_t mmp_dsa_gen_y_2048; + /** Modular multiplicative inverse for numbers less than 192 bits */ + icp_qat_fw_maths_modinv_even_l192_output_t maths_modinv_even_l192; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_2048_224_output_t mmp_dsa_sign_r_2048_224; + /** Modular multiplicative inverse for numbers less than 256 bits */ + icp_qat_fw_maths_modinv_even_l256_output_t maths_modinv_even_l256; - /** DSA Sign S */ - icp_qat_fw_mmp_dsa_sign_s_224_output_t mmp_dsa_sign_s_224; + /** Modular multiplicative inverse for numbers less than 384 bits */ + icp_qat_fw_maths_modinv_even_l384_output_t maths_modinv_even_l384; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_t mmp_dsa_sign_r_s_2048_224; + /** Modular multiplicative inverse for numbers less than 512 bits */ + icp_qat_fw_maths_modinv_even_l512_output_t maths_modinv_even_l512; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_2048_224_output_t mmp_dsa_verify_2048_224; + /** Modular multiplicative inverse for numbers less than 768 bits */ + icp_qat_fw_maths_modinv_even_l768_output_t maths_modinv_even_l768; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_2048_256_output_t mmp_dsa_gen_p_2048_256; + /** Modular multiplicative inverse for numbers less than 1024 bits */ + icp_qat_fw_maths_modinv_even_l1024_output_t maths_modinv_even_l1024; - /** DSA key generation G */ - icp_qat_fw_mmp_dsa_gen_g_2048_output_t mmp_dsa_gen_g_2048; + /** Modular multiplicative inverse for numbers less than 1536 bits */ + icp_qat_fw_maths_modinv_even_l1536_output_t maths_modinv_even_l1536; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_2048_256_output_t mmp_dsa_sign_r_2048_256; + /** Modular multiplicative inverse for numbers less than 2048 bits */ + icp_qat_fw_maths_modinv_even_l2048_output_t maths_modinv_even_l2048; - /** DSA Sign S */ - icp_qat_fw_mmp_dsa_sign_s_256_output_t mmp_dsa_sign_s_256; + /** Modular multiplicative inverse for numbers less than 3072 bits */ + icp_qat_fw_maths_modinv_even_l3072_output_t maths_modinv_even_l3072; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_t mmp_dsa_sign_r_s_2048_256; + /** Modular multiplicative inverse for numbers less than 4096 bits */ + icp_qat_fw_maths_modinv_even_l4096_output_t maths_modinv_even_l4096; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_2048_256_output_t mmp_dsa_verify_2048_256; + /** Modular multiplicative inverse for numbers up to 8192 bits */ + icp_qat_fw_maths_modinv_even_l8192_output_t maths_modinv_even_l8192; - /** DSA parameter generation P */ - icp_qat_fw_mmp_dsa_gen_p_3072_256_output_t mmp_dsa_gen_p_3072_256; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_1024_160_output_t mmp_dsa_gen_p_1024_160; - /** DSA key generation G */ - icp_qat_fw_mmp_dsa_gen_g_3072_output_t mmp_dsa_gen_g_3072; + /** DSA key generation G */ + icp_qat_fw_mmp_dsa_gen_g_1024_output_t mmp_dsa_gen_g_1024; - /** DSA key generation Y */ - icp_qat_fw_mmp_dsa_gen_y_3072_output_t mmp_dsa_gen_y_3072; + /** DSA key generation Y */ + icp_qat_fw_mmp_dsa_gen_y_1024_output_t mmp_dsa_gen_y_1024; - /** DSA Sign R */ - icp_qat_fw_mmp_dsa_sign_r_3072_256_output_t mmp_dsa_sign_r_3072_256; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_1024_160_output_t mmp_dsa_sign_r_1024_160; - /** DSA Sign R S */ - icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_t mmp_dsa_sign_r_s_3072_256; + /** DSA Sign S */ + icp_qat_fw_mmp_dsa_sign_s_160_output_t mmp_dsa_sign_s_160; - /** DSA Verify */ - icp_qat_fw_mmp_dsa_verify_3072_256_output_t mmp_dsa_verify_3072_256; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_t mmp_dsa_sign_r_s_1024_160; - /** ECDSA Sign RS for curves B/K-163 and B/K-233 */ - icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_t - mmp_ecdsa_sign_rs_gf2_l256; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_1024_160_output_t mmp_dsa_verify_1024_160; - /** ECDSA Sign R for curves B/K-163 and B/K-233 */ - icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output_t mmp_ecdsa_sign_r_gf2_l256; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_2048_224_output_t mmp_dsa_gen_p_2048_224; - /** ECDSA Sign S for curves with n < 2^256 */ - icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output_t mmp_ecdsa_sign_s_gf2_l256; + /** DSA key generation Y */ + icp_qat_fw_mmp_dsa_gen_y_2048_output_t mmp_dsa_gen_y_2048; - /** ECDSA Verify for curves B/K-163 and B/K-233 */ - icp_qat_fw_mmp_ecdsa_verify_gf2_l256_output_t mmp_ecdsa_verify_gf2_l256; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_2048_224_output_t mmp_dsa_sign_r_2048_224; - /** ECDSA Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_t - mmp_ecdsa_sign_rs_gf2_l512; + /** DSA Sign S */ + icp_qat_fw_mmp_dsa_sign_s_224_output_t mmp_dsa_sign_s_224; - /** ECDSA GF2 Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output_t mmp_ecdsa_sign_r_gf2_l512; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_t mmp_dsa_sign_r_s_2048_224; - /** ECDSA GF2 Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output_t mmp_ecdsa_sign_s_gf2_l512; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_2048_224_output_t mmp_dsa_verify_2048_224; - /** ECDSA GF2 Verify */ - icp_qat_fw_mmp_ecdsa_verify_gf2_l512_output_t mmp_ecdsa_verify_gf2_l512; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_2048_256_output_t mmp_dsa_gen_p_2048_256; - /** ECDSA GF2 Sign RS for curves B-571/K-571 */ - icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_t mmp_ecdsa_sign_rs_gf2_571; + /** DSA key generation G */ + icp_qat_fw_mmp_dsa_gen_g_2048_output_t mmp_dsa_gen_g_2048; - /** ECDSA GF2 Sign S for curves with deg(q) < 576 */ - icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output_t mmp_ecdsa_sign_s_gf2_571; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_2048_256_output_t mmp_dsa_sign_r_2048_256; - /** ECDSA GF2 Sign R for degree 571 */ - icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output_t mmp_ecdsa_sign_r_gf2_571; + /** DSA Sign S */ + icp_qat_fw_mmp_dsa_sign_s_256_output_t mmp_dsa_sign_s_256; - /** ECDSA GF2 Verify for degree 571 */ - icp_qat_fw_mmp_ecdsa_verify_gf2_571_output_t mmp_ecdsa_verify_gf2_571; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_t mmp_dsa_sign_r_s_2048_256; - /** MATHS GF2 Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gf2_l256_output_t - maths_point_multiplication_gf2_l256; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_2048_256_output_t mmp_dsa_verify_2048_256; - /** MATHS GF2 Point Verification */ - icp_qat_fw_maths_point_verify_gf2_l256_output_t - maths_point_verify_gf2_l256; + /** DSA parameter generation P */ + icp_qat_fw_mmp_dsa_gen_p_3072_256_output_t mmp_dsa_gen_p_3072_256; - /** MATHS GF2 Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gf2_l512_output_t - maths_point_multiplication_gf2_l512; + /** DSA key generation G */ + icp_qat_fw_mmp_dsa_gen_g_3072_output_t mmp_dsa_gen_g_3072; - /** MATHS GF2 Point Verification */ - icp_qat_fw_maths_point_verify_gf2_l512_output_t - maths_point_verify_gf2_l512; + /** DSA key generation Y */ + icp_qat_fw_mmp_dsa_gen_y_3072_output_t mmp_dsa_gen_y_3072; - /** ECC GF2 Point Multiplication for curves B-571/K-571 */ - icp_qat_fw_maths_point_multiplication_gf2_571_output_t - maths_point_multiplication_gf2_571; + /** DSA Sign R */ + icp_qat_fw_mmp_dsa_sign_r_3072_256_output_t mmp_dsa_sign_r_3072_256; - /** ECC GF2 Point Verification for degree 571 */ - icp_qat_fw_maths_point_verify_gf2_571_output_t - maths_point_verify_gf2_571; + /** DSA Sign R S */ + icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_t mmp_dsa_sign_r_s_3072_256; - /** ECDSA GFP Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output_t mmp_ecdsa_sign_r_gfp_l256; + /** DSA Verify */ + icp_qat_fw_mmp_dsa_verify_3072_256_output_t mmp_dsa_verify_3072_256; - /** ECDSA GFP Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output_t mmp_ecdsa_sign_s_gfp_l256; + /** ECDSA Sign RS for curves B/K-163 and B/K-233 */ + icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_t mmp_ecdsa_sign_rs_gf2_l256; - /** ECDSA GFP Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_t - mmp_ecdsa_sign_rs_gfp_l256; + /** ECDSA Sign R for curves B/K-163 and B/K-233 */ + icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output_t mmp_ecdsa_sign_r_gf2_l256; - /** ECDSA GFP Verify */ - icp_qat_fw_mmp_ecdsa_verify_gfp_l256_output_t mmp_ecdsa_verify_gfp_l256; + /** ECDSA Sign S for curves with n < 2^256 */ + icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output_t mmp_ecdsa_sign_s_gf2_l256; - /** ECDSA GFP Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output_t mmp_ecdsa_sign_r_gfp_l512; + /** ECDSA Verify for curves B/K-163 and B/K-233 */ + icp_qat_fw_mmp_ecdsa_verify_gf2_l256_output_t mmp_ecdsa_verify_gf2_l256; - /** ECDSA GFP Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output_t mmp_ecdsa_sign_s_gfp_l512; + /** ECDSA Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_t mmp_ecdsa_sign_rs_gf2_l512; - /** ECDSA GFP Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_t - mmp_ecdsa_sign_rs_gfp_l512; + /** ECDSA GF2 Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output_t mmp_ecdsa_sign_r_gf2_l512; - /** ECDSA GFP Verify */ - icp_qat_fw_mmp_ecdsa_verify_gfp_l512_output_t mmp_ecdsa_verify_gfp_l512; + /** ECDSA GF2 Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output_t mmp_ecdsa_sign_s_gf2_l512; - /** ECDSA GFP Sign R */ - icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output_t mmp_ecdsa_sign_r_gfp_521; + /** ECDSA GF2 Verify */ + icp_qat_fw_mmp_ecdsa_verify_gf2_l512_output_t mmp_ecdsa_verify_gf2_l512; - /** ECDSA GFP Sign S */ - icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output_t mmp_ecdsa_sign_s_gfp_521; + /** ECDSA GF2 Sign RS for curves B-571/K-571 */ + icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_t mmp_ecdsa_sign_rs_gf2_571; - /** ECDSA GFP Sign RS */ - icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_t mmp_ecdsa_sign_rs_gfp_521; + /** ECDSA GF2 Sign S for curves with deg(q) < 576 */ + icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output_t mmp_ecdsa_sign_s_gf2_571; - /** ECDSA GFP Verify */ - icp_qat_fw_mmp_ecdsa_verify_gfp_521_output_t mmp_ecdsa_verify_gfp_521; + /** ECDSA GF2 Sign R for degree 571 */ + icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output_t mmp_ecdsa_sign_r_gf2_571; - /** ECC GFP Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gfp_l256_output_t - maths_point_multiplication_gfp_l256; + /** ECDSA GF2 Verify for degree 571 */ + icp_qat_fw_mmp_ecdsa_verify_gf2_571_output_t mmp_ecdsa_verify_gf2_571; - /** ECC GFP Partial Point Verification */ - icp_qat_fw_maths_point_verify_gfp_l256_output_t - maths_point_verify_gfp_l256; + /** MATHS GF2 Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gf2_l256_output_t maths_point_multiplication_gf2_l256; - /** ECC GFP Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gfp_l512_output_t - maths_point_multiplication_gfp_l512; + /** MATHS GF2 Point Verification */ + icp_qat_fw_maths_point_verify_gf2_l256_output_t maths_point_verify_gf2_l256; - /** ECC GFP Partial Point */ - icp_qat_fw_maths_point_verify_gfp_l512_output_t - maths_point_verify_gfp_l512; + /** MATHS GF2 Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gf2_l512_output_t maths_point_multiplication_gf2_l512; - /** ECC GFP Point Multiplication */ - icp_qat_fw_maths_point_multiplication_gfp_521_output_t - maths_point_multiplication_gfp_521; + /** MATHS GF2 Point Verification */ + icp_qat_fw_maths_point_verify_gf2_l512_output_t maths_point_verify_gf2_l512; - /** ECC GFP Partial Point Verification */ - icp_qat_fw_maths_point_verify_gfp_521_output_t - maths_point_verify_gfp_521; + /** ECC GF2 Point Multiplication for curves B-571/K-571 */ + icp_qat_fw_maths_point_multiplication_gf2_571_output_t maths_point_multiplication_gf2_571; - /** ECC curve25519 Variable Point Multiplication [k]P(x), as specified - * in RFC7748 */ - icp_qat_fw_point_multiplication_c25519_output_t - point_multiplication_c25519; + /** ECC GF2 Point Verification for degree 571 */ + icp_qat_fw_maths_point_verify_gf2_571_output_t maths_point_verify_gf2_571; - /** ECC curve25519 Generator Point Multiplication [k]G(x), as specified - * in RFC7748 */ - icp_qat_fw_generator_multiplication_c25519_output_t - generator_multiplication_c25519; + /** ECDSA GFP Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output_t mmp_ecdsa_sign_r_gfp_l256; - /** ECC edwards25519 Variable Point Multiplication [k]P, as specified in - * RFC8032 */ - icp_qat_fw_point_multiplication_ed25519_output_t - point_multiplication_ed25519; + /** ECDSA GFP Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output_t mmp_ecdsa_sign_s_gfp_l256; - /** ECC edwards25519 Generator Point Multiplication [k]G, as specified - * in RFC8032 */ - icp_qat_fw_generator_multiplication_ed25519_output_t - generator_multiplication_ed25519; + /** ECDSA GFP Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_t mmp_ecdsa_sign_rs_gfp_l256; - /** ECC curve448 Variable Point Multiplication [k]P(x), as specified in - * RFC7748 */ - icp_qat_fw_point_multiplication_c448_output_t point_multiplication_c448; + /** ECDSA GFP Verify */ + icp_qat_fw_mmp_ecdsa_verify_gfp_l256_output_t mmp_ecdsa_verify_gfp_l256; - /** ECC curve448 Generator Point Multiplication [k]G(x), as specified in - * RFC7748 */ - icp_qat_fw_generator_multiplication_c448_output_t - generator_multiplication_c448; + /** ECDSA GFP Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output_t mmp_ecdsa_sign_r_gfp_l512; - /** ECC edwards448 Variable Point Multiplication [k]P, as specified in - * RFC8032 */ - icp_qat_fw_point_multiplication_ed448_output_t - point_multiplication_ed448; + /** ECDSA GFP Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output_t mmp_ecdsa_sign_s_gfp_l512; + + /** ECDSA GFP Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_t mmp_ecdsa_sign_rs_gfp_l512; + + /** ECDSA GFP Verify */ + icp_qat_fw_mmp_ecdsa_verify_gfp_l512_output_t mmp_ecdsa_verify_gfp_l512; + + /** ECDSA GFP Sign R */ + icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output_t mmp_ecdsa_sign_r_gfp_521; + + /** ECDSA GFP Sign S */ + icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output_t mmp_ecdsa_sign_s_gfp_521; + + /** ECDSA GFP Sign RS */ + icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_t mmp_ecdsa_sign_rs_gfp_521; + + /** ECDSA GFP Verify */ + icp_qat_fw_mmp_ecdsa_verify_gfp_521_output_t mmp_ecdsa_verify_gfp_521; + + /** ECC GFP Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gfp_l256_output_t maths_point_multiplication_gfp_l256; + + /** ECC GFP Partial Point Verification */ + icp_qat_fw_maths_point_verify_gfp_l256_output_t maths_point_verify_gfp_l256; + + /** ECC GFP Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gfp_l512_output_t maths_point_multiplication_gfp_l512; + + /** ECC GFP Partial Point */ + icp_qat_fw_maths_point_verify_gfp_l512_output_t maths_point_verify_gfp_l512; + + /** ECC GFP Point Multiplication */ + icp_qat_fw_maths_point_multiplication_gfp_521_output_t maths_point_multiplication_gfp_521; + + /** ECC GFP Partial Point Verification */ + icp_qat_fw_maths_point_verify_gfp_521_output_t maths_point_verify_gfp_521; + + /** ECC P521 ECDSA Sign RS */ + icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_output_t mmp_kpt_ecdsa_sign_rs_p521; + + /** ECC P384 ECDSA Sign RS */ + icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_output_t mmp_kpt_ecdsa_sign_rs_p384; + + /** ECC KPT P256 ECDSA Sign RS */ + icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_output_t mmp_kpt_ecdsa_sign_rs_p256; + + /** KPT RSA 512 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_512_output_t mmp_kpt_rsa_dp1_512; + + /** KPT RSA 1024 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_1024_output_t mmp_kpt_rsa_dp1_1024; + + /** KPT RSA 1536 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_1536_output_t mmp_kpt_rsa_dp1_1536; + + /** KPT RSA 2048 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_2048_output_t mmp_kpt_rsa_dp1_2048; + + /** KPT RSA 3072 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_3072_output_t mmp_kpt_rsa_dp1_3072; + + /** KPT RSA 4096 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_4096_output_t mmp_kpt_rsa_dp1_4096; + + /** KPT RSA 8192 Decryption */ + icp_qat_fw_mmp_kpt_rsa_dp1_8192_output_t mmp_kpt_rsa_dp1_8192; + + /** RSA 512 decryption second form */ + icp_qat_fw_mmp_kpt_rsa_dp2_512_output_t mmp_kpt_rsa_dp2_512; + + /** RSA 1024 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_1024_output_t mmp_kpt_rsa_dp2_1024; + + /** KPT RSA 1536 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_1536_output_t mmp_kpt_rsa_dp2_1536; + + /** RSA 2048 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_2048_output_t mmp_kpt_rsa_dp2_2048; + + /** */ + icp_qat_fw_mmp_kpt_rsa_dp2_3072_output_t mmp_kpt_rsa_dp2_3072; + + /** RSA 4096 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_4096_output_t mmp_kpt_rsa_dp2_4096; + + /** RSA 8192 Decryption with CRT */ + icp_qat_fw_mmp_kpt_rsa_dp2_8192_output_t mmp_kpt_rsa_dp2_8192; - /** ECC edwards448 Generator Point Multiplication [k]P, as specified in - * RFC8032 */ - icp_qat_fw_generator_multiplication_ed448_output_t - generator_multiplication_ed448; } icp_qat_fw_mmp_output_param_t; + + #endif /* __ICP_QAT_FW_MMP__ */ + /* --- (Automatically generated (build v. 2.7), do not modify manually) --- */ /* --- end of file --- */ diff --git a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp_ids.h b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp_ids.h index 9ccccc221453..dfda374e326c 100644 --- a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp_ids.h +++ b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp_ids.h @@ -1,1555 +1,1931 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ + + +/* --- (Automatically generated (relocation v. 1.3), do not modify manually) --- */ + /** * @file icp_qat_fw_mmp_ids.h * @ingroup icp_qat_fw_mmp * $Revision: 0.1 $ * @brief * This file documents the external interfaces that the QAT FW running * on the QAT Acceleration Engine provides to clients wanting to * accelerate crypto assymetric applications */ #ifndef __ICP_QAT_FW_MMP_IDS__ #define __ICP_QAT_FW_MMP_IDS__ -#define PKE_INIT 0x09061798 +#define PKE_ECSM2_GENERATOR_MULTIPLICATION 0x220f16ae +/**< Functionality ID for ECC SM2 point multiply [k]G + * @li 1 input parameters : @link + * icp_qat_fw_mmp_ecsm2_generator_multiplication_input_s::k k @endlink + * @li 2 output parameters : @link + * icp_qat_fw_mmp_ecsm2_generator_multiplication_output_s::xd xd @endlink @link + * icp_qat_fw_mmp_ecsm2_generator_multiplication_output_s::yd yd @endlink + */ +#define PKE_ECSM2_POINT_MULTIPLICATION 0x211716ce +/**< Functionality ID for ECC SM2 point multiply [k]P + * @li 3 input parameters : @link + * icp_qat_fw_mmp_ecsm2_point_multiplication_input_s::k k @endlink @link + * icp_qat_fw_mmp_ecsm2_point_multiplication_input_s::x x @endlink @link + * icp_qat_fw_mmp_ecsm2_point_multiplication_input_s::y y @endlink + * @li 2 output parameters : @link + * icp_qat_fw_mmp_ecsm2_point_multiplication_output_s::xd xd @endlink @link + * icp_qat_fw_mmp_ecsm2_point_multiplication_output_s::yd yd @endlink + */ +#define PKE_ECSM2_POINT_VERIFY 0x1b0716a6 +/**< Functionality ID for ECC SM2 point verify + * @li 2 input parameters : @link icp_qat_fw_mmp_ecsm2_point_verify_input_s::x x + * @endlink @link icp_qat_fw_mmp_ecsm2_point_verify_input_s::y y @endlink + * @li no output parameters + */ +#define PKE_ECSM2_SIGN_RS 0x222116fe +/**< Functionality ID for ECC SM2 Sign RS + * @li 3 input parameters : @link icp_qat_fw_mmp_ecsm2_sign_rs_input_s::k k + * @endlink @link icp_qat_fw_mmp_ecsm2_sign_rs_input_s::e e @endlink @link + * icp_qat_fw_mmp_ecsm2_sign_rs_input_s::d d @endlink + * @li 2 output parameters : @link icp_qat_fw_mmp_ecsm2_sign_rs_output_s::r r + * @endlink @link icp_qat_fw_mmp_ecsm2_sign_rs_output_s::s s @endlink + */ +#define PKE_ECSM2_VERIFY 0x29241743 +/**< Functionality ID for ECC SM2 Signature Verify + * @li 5 input parameters : @link icp_qat_fw_mmp_ecsm2_verify_input_s::e e + * @endlink @link icp_qat_fw_mmp_ecsm2_verify_input_s::r r @endlink @link + * icp_qat_fw_mmp_ecsm2_verify_input_s::s s @endlink @link + * icp_qat_fw_mmp_ecsm2_verify_input_s::xp xp @endlink @link + * icp_qat_fw_mmp_ecsm2_verify_input_s::yp yp @endlink + * @li no output parameters + */ +#define PKE_ECSM2_ENCRYPTION 0x25221720 +/**< Functionality ID for ECC SM2 encryption + * @li 3 input parameters : @link icp_qat_fw_mmp_ecsm2_encryption_input_s::k k + * @endlink @link icp_qat_fw_mmp_ecsm2_encryption_input_s::xp xp @endlink @link + * icp_qat_fw_mmp_ecsm2_encryption_input_s::yp yp @endlink + * @li 4 output parameters : @link icp_qat_fw_mmp_ecsm2_encryption_output_s::xc + * xc @endlink @link icp_qat_fw_mmp_ecsm2_encryption_output_s::yc yc @endlink + * @link icp_qat_fw_mmp_ecsm2_encryption_output_s::xpb xpb @endlink @link + * icp_qat_fw_mmp_ecsm2_encryption_output_s::ypb ypb @endlink + */ +#define PKE_ECSM2_DECRYPTION 0x201716e6 +/**< Functionality ID for ECC SM2 decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_ecsm2_decryption_input_s::d d + * @endlink @link icp_qat_fw_mmp_ecsm2_decryption_input_s::xpb xpb @endlink + * @link icp_qat_fw_mmp_ecsm2_decryption_input_s::ypb ypb @endlink + * @li 2 output parameters : @link icp_qat_fw_mmp_ecsm2_decryption_output_s::xd + * xd @endlink @link icp_qat_fw_mmp_ecsm2_decryption_output_s::yd yd @endlink + */ +#define PKE_ECSM2_KEYEX_P1 0x220f16be +/**< Functionality ID for ECC SM2 key exchange phase1 + * @li 1 input parameters : @link icp_qat_fw_mmp_ecsm2_keyex_p1_input_s::k k + * @endlink + * @li 2 output parameters : @link icp_qat_fw_mmp_ecsm2_keyex_p1_output_s::xd xd + * @endlink @link icp_qat_fw_mmp_ecsm2_keyex_p1_output_s::yd yd @endlink + */ +#define PKE_ECSM2_KEYEX_P2 0x22361768 +/**< Functionality ID for ECC SM2 key exchange phase2 + * @li 7 input parameters : @link icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::r r + * @endlink @link icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::d d @endlink @link + * icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::x1 x1 @endlink @link + * icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::x2 x2 @endlink @link + * icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::y2 y2 @endlink @link + * icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::xp xp @endlink @link + * icp_qat_fw_mmp_ecsm2_keyex_p2_input_s::yp yp @endlink + * @li 2 output parameters : @link icp_qat_fw_mmp_ecsm2_keyex_p2_output_s::xus + * xus @endlink @link icp_qat_fw_mmp_ecsm2_keyex_p2_output_s::yus yus @endlink + */ +#define POINT_MULTIPLICATION_C25519 0x0a0634c6 +/**< Functionality ID for ECC curve25519 Variable Point Multiplication [k]P(x), + * as specified in RFC7748 + * @li 2 input parameters : @link + * icp_qat_fw_point_multiplication_c25519_input_s::xp xp @endlink @link + * icp_qat_fw_point_multiplication_c25519_input_s::k k @endlink + * @li 1 output parameters : @link + * icp_qat_fw_point_multiplication_c25519_output_s::xr xr @endlink + */ +#define GENERATOR_MULTIPLICATION_C25519 0x0a0634d6 +/**< Functionality ID for ECC curve25519 Generator Point Multiplication [k]G(x), + * as specified in RFC7748 + * @li 1 input parameters : @link + * icp_qat_fw_generator_multiplication_c25519_input_s::k k @endlink + * @li 1 output parameters : @link + * icp_qat_fw_generator_multiplication_c25519_output_s::xr xr @endlink + */ +#define POINT_MULTIPLICATION_ED25519 0x100b34e6 +/**< Functionality ID for ECC edwards25519 Variable Point Multiplication [k]P, + * as specified in RFC8032 + * @li 3 input parameters : @link + * icp_qat_fw_point_multiplication_ed25519_input_s::xp xp @endlink @link + * icp_qat_fw_point_multiplication_ed25519_input_s::yp yp @endlink @link + * icp_qat_fw_point_multiplication_ed25519_input_s::k k @endlink + * @li 2 output parameters : @link + * icp_qat_fw_point_multiplication_ed25519_output_s::xr xr @endlink @link + * icp_qat_fw_point_multiplication_ed25519_output_s::yr yr @endlink + */ +#define GENERATOR_MULTIPLICATION_ED25519 0x100a34f6 +/**< Functionality ID for ECC edwards25519 Generator Point Multiplication [k]G, + * as specified in RFC8032 + * @li 1 input parameters : @link + * icp_qat_fw_generator_multiplication_ed25519_input_s::k k @endlink + * @li 2 output parameters : @link + * icp_qat_fw_generator_multiplication_ed25519_output_s::xr xr @endlink @link + * icp_qat_fw_generator_multiplication_ed25519_output_s::yr yr @endlink + */ +#define POINT_MULTIPLICATION_C448 0x0c063506 +/**< Functionality ID for ECC curve448 Variable Point Multiplication [k]P(x), as + * specified in RFC7748 + * @li 2 input parameters : @link + * icp_qat_fw_point_multiplication_c448_input_s::xp xp @endlink @link + * icp_qat_fw_point_multiplication_c448_input_s::k k @endlink + * @li 1 output parameters : @link + * icp_qat_fw_point_multiplication_c448_output_s::xr xr @endlink + */ +#define GENERATOR_MULTIPLICATION_C448 0x0c063516 +/**< Functionality ID for ECC curve448 Generator Point Multiplication [k]G(x), + * as specified in RFC7748 + * @li 1 input parameters : @link + * icp_qat_fw_generator_multiplication_c448_input_s::k k @endlink + * @li 1 output parameters : @link + * icp_qat_fw_generator_multiplication_c448_output_s::xr xr @endlink + */ +#define POINT_MULTIPLICATION_ED448 0x1a0b3526 +/**< Functionality ID for ECC edwards448 Variable Point Multiplication [k]P, as + * specified in RFC8032 + * @li 3 input parameters : @link + * icp_qat_fw_point_multiplication_ed448_input_s::xp xp @endlink @link + * icp_qat_fw_point_multiplication_ed448_input_s::yp yp @endlink @link + * icp_qat_fw_point_multiplication_ed448_input_s::k k @endlink + * @li 2 output parameters : @link + * icp_qat_fw_point_multiplication_ed448_output_s::xr xr @endlink @link + * icp_qat_fw_point_multiplication_ed448_output_s::yr yr @endlink + */ +#define GENERATOR_MULTIPLICATION_ED448 0x1a0a3536 +/**< Functionality ID for ECC edwards448 Generator Point Multiplication [k]P, as + * specified in RFC8032 + * @li 1 input parameters : @link + * icp_qat_fw_generator_multiplication_ed448_input_s::k k @endlink + * @li 2 output parameters : @link + * icp_qat_fw_generator_multiplication_ed448_output_s::xr xr @endlink @link + * icp_qat_fw_generator_multiplication_ed448_output_s::yr yr @endlink + */ +#define PKE_INIT 0x0806169f /**< Functionality ID for Initialisation sequence * @li 1 input parameters : @link icp_qat_fw_mmp_init_input_s::z z @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_init_output_s::zz zz @endlink */ #define PKE_DH_G2_768 0x1c0b1a10 /**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for * 768-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_768_input_s::e e @endlink * @link icp_qat_fw_mmp_dh_g2_768_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_768_output_s::r r * @endlink */ #define PKE_DH_768 0x210c1a1b /**< Functionality ID for Diffie-Hellman Modular exponentiation for 768-bit * numbers * @li 3 input parameters : @link icp_qat_fw_mmp_dh_768_input_s::g g @endlink * @link icp_qat_fw_mmp_dh_768_input_s::e e @endlink @link * icp_qat_fw_mmp_dh_768_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_768_output_s::r r @endlink */ #define PKE_DH_G2_1024 0x220b1a27 /**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for * 1024-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_1024_input_s::e e * @endlink @link icp_qat_fw_mmp_dh_g2_1024_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_1024_output_s::r r * @endlink */ #define PKE_DH_1024 0x290c1a32 /**< Functionality ID for Diffie-Hellman Modular exponentiation for 1024-bit * numbers * @li 3 input parameters : @link icp_qat_fw_mmp_dh_1024_input_s::g g @endlink * @link icp_qat_fw_mmp_dh_1024_input_s::e e @endlink @link * icp_qat_fw_mmp_dh_1024_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_1024_output_s::r r @endlink */ #define PKE_DH_G2_1536 0x2e0b1a3e /**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for * 1536-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_1536_input_s::e e * @endlink @link icp_qat_fw_mmp_dh_g2_1536_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_1536_output_s::r r * @endlink */ #define PKE_DH_1536 0x390c1a49 /**< Functionality ID for Diffie-Hellman Modular exponentiation for 1536-bit * numbers * @li 3 input parameters : @link icp_qat_fw_mmp_dh_1536_input_s::g g @endlink * @link icp_qat_fw_mmp_dh_1536_input_s::e e @endlink @link * icp_qat_fw_mmp_dh_1536_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_1536_output_s::r r @endlink */ #define PKE_DH_G2_2048 0x3e0b1a55 /**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for * 2048-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_2048_input_s::e e * @endlink @link icp_qat_fw_mmp_dh_g2_2048_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_2048_output_s::r r * @endlink */ #define PKE_DH_2048 0x4d0c1a60 /**< Functionality ID for Diffie-Hellman Modular exponentiation for 2048-bit * numbers * @li 3 input parameters : @link icp_qat_fw_mmp_dh_2048_input_s::g g @endlink * @link icp_qat_fw_mmp_dh_2048_input_s::e e @endlink @link * icp_qat_fw_mmp_dh_2048_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_2048_output_s::r r @endlink */ #define PKE_DH_G2_3072 0x3a0b1a6c /**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for * 3072-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_3072_input_s::e e * @endlink @link icp_qat_fw_mmp_dh_g2_3072_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_3072_output_s::r r * @endlink */ #define PKE_DH_3072 0x510c1a77 /**< Functionality ID for Diffie-Hellman Modular exponentiation for 3072-bit * numbers * @li 3 input parameters : @link icp_qat_fw_mmp_dh_3072_input_s::g g @endlink * @link icp_qat_fw_mmp_dh_3072_input_s::e e @endlink @link * icp_qat_fw_mmp_dh_3072_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_3072_output_s::r r @endlink */ #define PKE_DH_G2_4096 0x4a0b1a83 /**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for * 4096-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_4096_input_s::e e * @endlink @link icp_qat_fw_mmp_dh_g2_4096_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_4096_output_s::r r * @endlink */ #define PKE_DH_4096 0x690c1a8e /**< Functionality ID for Diffie-Hellman Modular exponentiation for 4096-bit * numbers * @li 3 input parameters : @link icp_qat_fw_mmp_dh_4096_input_s::g g @endlink * @link icp_qat_fw_mmp_dh_4096_input_s::e e @endlink @link * icp_qat_fw_mmp_dh_4096_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dh_4096_output_s::r r @endlink */ +#define PKE_DH_G2_8192 0x8d0b3626 +/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for + * 8192-bit numbers + * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_8192_input_s::e e + * @endlink @link icp_qat_fw_mmp_dh_g2_8192_input_s::m m @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_8192_output_s::r r + * @endlink + */ +#define PKE_DH_8192 0xcd0d3636 +/**< Functionality ID for Diffie-Hellman Modular exponentiation for 8192-bit + * numbers + * @li 3 input parameters : @link icp_qat_fw_mmp_dh_8192_input_s::g g @endlink + * @link icp_qat_fw_mmp_dh_8192_input_s::e e @endlink @link + * icp_qat_fw_mmp_dh_8192_input_s::m m @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_dh_8192_output_s::r r @endlink + */ #define PKE_RSA_KP1_512 0x191d1a9a /**< Functionality ID for RSA 512 key generation first form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_512_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp1_512_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp1_512_input_s::e e @endlink * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_512_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp1_512_output_s::d d @endlink */ #define PKE_RSA_KP2_512 0x19401acc /**< Functionality ID for RSA 512 key generation second form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_512_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp2_512_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp2_512_input_s::e e @endlink * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_512_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp2_512_output_s::d d @endlink @link * icp_qat_fw_mmp_rsa_kp2_512_output_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_kp2_512_output_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_kp2_512_output_s::qinv qinv @endlink */ #define PKE_RSA_EP_512 0x1c161b21 /**< Functionality ID for RSA 512 Encryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_512_input_s::m m * @endlink @link icp_qat_fw_mmp_rsa_ep_512_input_s::e e @endlink @link * icp_qat_fw_mmp_rsa_ep_512_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_512_output_s::c c * @endlink */ #define PKE_RSA_DP1_512 0x1c161b3c /**< Functionality ID for RSA 512 Decryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_512_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp1_512_input_s::d d @endlink @link * icp_qat_fw_mmp_rsa_dp1_512_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_512_output_s::m m * @endlink */ #define PKE_RSA_DP2_512 0x1c131b57 /**< Functionality ID for RSA 1024 Decryption with CRT * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_512_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp2_512_input_s::p p @endlink @link * icp_qat_fw_mmp_rsa_dp2_512_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_dp2_512_input_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_dp2_512_input_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_dp2_512_input_s::qinv qinv @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_512_output_s::m m * @endlink */ #define PKE_RSA_KP1_1024 0x36181b71 /**< Functionality ID for RSA 1024 key generation first form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_1024_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp1_1024_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp1_1024_input_s::e e @endlink * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_1024_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp1_1024_output_s::d d @endlink */ #define PKE_RSA_KP2_1024 0x40451b9e /**< Functionality ID for RSA 1024 key generation second form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_1024_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp2_1024_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp2_1024_input_s::e e @endlink * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_1024_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp2_1024_output_s::d d @endlink @link * icp_qat_fw_mmp_rsa_kp2_1024_output_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_kp2_1024_output_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_kp2_1024_output_s::qinv qinv @endlink */ #define PKE_RSA_EP_1024 0x35111bf7 /**< Functionality ID for RSA 1024 Encryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_1024_input_s::m m * @endlink @link icp_qat_fw_mmp_rsa_ep_1024_input_s::e e @endlink @link * icp_qat_fw_mmp_rsa_ep_1024_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_1024_output_s::c c * @endlink */ #define PKE_RSA_DP1_1024 0x35111c12 /**< Functionality ID for RSA 1024 Decryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_1024_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp1_1024_input_s::d d @endlink @link * icp_qat_fw_mmp_rsa_dp1_1024_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_1024_output_s::m m * @endlink */ #define PKE_RSA_DP2_1024 0x26131c2d /**< Functionality ID for RSA 1024 Decryption with CRT * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_1024_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp2_1024_input_s::p p @endlink @link * icp_qat_fw_mmp_rsa_dp2_1024_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_dp2_1024_input_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_dp2_1024_input_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_dp2_1024_input_s::qinv qinv @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_1024_output_s::m m * @endlink */ #define PKE_RSA_KP1_1536 0x531d1c46 /**< Functionality ID for RSA 1536 key generation first form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_1536_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp1_1536_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp1_1536_input_s::e e @endlink * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_1536_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp1_1536_output_s::d d @endlink */ #define PKE_RSA_KP2_1536 0x32391c78 /**< Functionality ID for RSA 1536 key generation second form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_1536_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp2_1536_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp2_1536_input_s::e e @endlink * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_1536_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp2_1536_output_s::d d @endlink @link * icp_qat_fw_mmp_rsa_kp2_1536_output_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_kp2_1536_output_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_kp2_1536_output_s::qinv qinv @endlink */ #define PKE_RSA_EP_1536 0x4d111cdc /**< Functionality ID for RSA 1536 Encryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_1536_input_s::m m * @endlink @link icp_qat_fw_mmp_rsa_ep_1536_input_s::e e @endlink @link * icp_qat_fw_mmp_rsa_ep_1536_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_1536_output_s::c c * @endlink */ #define PKE_RSA_DP1_1536 0x4d111cf7 /**< Functionality ID for RSA 1536 Decryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_1536_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp1_1536_input_s::d d @endlink @link * icp_qat_fw_mmp_rsa_dp1_1536_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_1536_output_s::m m * @endlink */ #define PKE_RSA_DP2_1536 0x45111d12 /**< Functionality ID for RSA 1536 Decryption with CRT * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_1536_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp2_1536_input_s::p p @endlink @link * icp_qat_fw_mmp_rsa_dp2_1536_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_dp2_1536_input_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_dp2_1536_input_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_dp2_1536_input_s::qinv qinv @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_1536_output_s::m m * @endlink */ #define PKE_RSA_KP1_2048 0x72181d2e /**< Functionality ID for RSA 2048 key generation first form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_2048_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp1_2048_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp1_2048_input_s::e e @endlink * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_2048_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp1_2048_output_s::d d @endlink */ #define PKE_RSA_KP2_2048 0x42341d5b /**< Functionality ID for RSA 2048 key generation second form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_2048_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp2_2048_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp2_2048_input_s::e e @endlink * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_2048_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp2_2048_output_s::d d @endlink @link * icp_qat_fw_mmp_rsa_kp2_2048_output_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_kp2_2048_output_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_kp2_2048_output_s::qinv qinv @endlink */ #define PKE_RSA_EP_2048 0x6e111dba /**< Functionality ID for RSA 2048 Encryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_2048_input_s::m m * @endlink @link icp_qat_fw_mmp_rsa_ep_2048_input_s::e e @endlink @link * icp_qat_fw_mmp_rsa_ep_2048_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_2048_output_s::c c * @endlink */ #define PKE_RSA_DP1_2048 0x6e111dda /**< Functionality ID for RSA 2048 Decryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_2048_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp1_2048_input_s::d d @endlink @link * icp_qat_fw_mmp_rsa_dp1_2048_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_2048_output_s::m m * @endlink */ #define PKE_RSA_DP2_2048 0x59121dfa /**< Functionality ID for RSA 2048 Decryption with CRT * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_2048_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp2_2048_input_s::p p @endlink @link * icp_qat_fw_mmp_rsa_dp2_2048_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_dp2_2048_input_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_dp2_2048_input_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_dp2_2048_input_s::qinv qinv @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_2048_output_s::m m * @endlink */ #define PKE_RSA_KP1_3072 0x60191e16 /**< Functionality ID for RSA 3072 key generation first form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_3072_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp1_3072_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp1_3072_input_s::e e @endlink * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_3072_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp1_3072_output_s::d d @endlink */ #define PKE_RSA_KP2_3072 0x68331e45 /**< Functionality ID for RSA 3072 key generation second form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_3072_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp2_3072_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp2_3072_input_s::e e @endlink * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_3072_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp2_3072_output_s::d d @endlink @link * icp_qat_fw_mmp_rsa_kp2_3072_output_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_kp2_3072_output_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_kp2_3072_output_s::qinv qinv @endlink */ #define PKE_RSA_EP_3072 0x7d111ea3 /**< Functionality ID for RSA 3072 Encryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_3072_input_s::m m * @endlink @link icp_qat_fw_mmp_rsa_ep_3072_input_s::e e @endlink @link * icp_qat_fw_mmp_rsa_ep_3072_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_3072_output_s::c c * @endlink */ #define PKE_RSA_DP1_3072 0x7d111ebe /**< Functionality ID for RSA 3072 Decryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_3072_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp1_3072_input_s::d d @endlink @link * icp_qat_fw_mmp_rsa_dp1_3072_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_3072_output_s::m m * @endlink */ #define PKE_RSA_DP2_3072 0x81121ed9 /**< Functionality ID for RSA 3072 Decryption with CRT * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_3072_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp2_3072_input_s::p p @endlink @link * icp_qat_fw_mmp_rsa_dp2_3072_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_dp2_3072_input_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_dp2_3072_input_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_dp2_3072_input_s::qinv qinv @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_3072_output_s::m m * @endlink */ #define PKE_RSA_KP1_4096 0x7d1f1ef6 /**< Functionality ID for RSA 4096 key generation first form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_4096_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp1_4096_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp1_4096_input_s::e e @endlink * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_4096_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp1_4096_output_s::d d @endlink */ #define PKE_RSA_KP2_4096 0x91251f27 /**< Functionality ID for RSA 4096 key generation second form * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_4096_input_s::p p * @endlink @link icp_qat_fw_mmp_rsa_kp2_4096_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_kp2_4096_input_s::e e @endlink * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_4096_output_s::n n * @endlink @link icp_qat_fw_mmp_rsa_kp2_4096_output_s::d d @endlink @link * icp_qat_fw_mmp_rsa_kp2_4096_output_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_kp2_4096_output_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_kp2_4096_output_s::qinv qinv @endlink */ #define PKE_RSA_EP_4096 0xa5101f7e /**< Functionality ID for RSA 4096 Encryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_4096_input_s::m m * @endlink @link icp_qat_fw_mmp_rsa_ep_4096_input_s::e e @endlink @link * icp_qat_fw_mmp_rsa_ep_4096_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_4096_output_s::c c * @endlink */ #define PKE_RSA_DP1_4096 0xa5101f98 /**< Functionality ID for RSA 4096 Decryption * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_4096_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp1_4096_input_s::d d @endlink @link * icp_qat_fw_mmp_rsa_dp1_4096_input_s::n n @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_4096_output_s::m m * @endlink */ #define PKE_RSA_DP2_4096 0xb1111fb2 /**< Functionality ID for RSA 4096 Decryption with CRT * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_4096_input_s::c c * @endlink @link icp_qat_fw_mmp_rsa_dp2_4096_input_s::p p @endlink @link * icp_qat_fw_mmp_rsa_dp2_4096_input_s::q q @endlink @link * icp_qat_fw_mmp_rsa_dp2_4096_input_s::dp dp @endlink @link * icp_qat_fw_mmp_rsa_dp2_4096_input_s::dq dq @endlink @link * icp_qat_fw_mmp_rsa_dp2_4096_input_s::qinv qinv @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_4096_output_s::m m * @endlink */ +#define PKE_RSA_EP_8192 0xc31335c6 +/**< Functionality ID for RSA 8192 Encryption + * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_8192_input_s::m m + * @endlink @link icp_qat_fw_mmp_rsa_ep_8192_input_s::e e @endlink @link + * icp_qat_fw_mmp_rsa_ep_8192_input_s::n n @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_8192_output_s::c c + * @endlink + */ +#define PKE_RSA_DP1_8192 0xc31335e6 +/**< Functionality ID for RSA 8192 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_8192_input_s::c c + * @endlink @link icp_qat_fw_mmp_rsa_dp1_8192_input_s::d d @endlink @link + * icp_qat_fw_mmp_rsa_dp1_8192_input_s::n n @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_8192_output_s::m m + * @endlink + */ +#define PKE_RSA_DP2_8192 0xc9133606 +/**< Functionality ID for RSA 8192 Decryption with CRT + * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_8192_input_s::c c + * @endlink @link icp_qat_fw_mmp_rsa_dp2_8192_input_s::p p @endlink @link + * icp_qat_fw_mmp_rsa_dp2_8192_input_s::q q @endlink @link + * icp_qat_fw_mmp_rsa_dp2_8192_input_s::dp dp @endlink @link + * icp_qat_fw_mmp_rsa_dp2_8192_input_s::dq dq @endlink @link + * icp_qat_fw_mmp_rsa_dp2_8192_input_s::qinv qinv @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_8192_output_s::m m + * @endlink + */ #define PKE_GCD_PT_192 0x19201fcd /**< Functionality ID for GCD primality test for 192-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_192_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_256 0x19201ff7 /**< Functionality ID for GCD primality test for 256-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_256_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_384 0x19202021 /**< Functionality ID for GCD primality test for 384-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_384_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_512 0x1b1b204b /**< Functionality ID for GCD primality test for 512-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_512_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_768 0x170c2070 /**< Functionality ID for GCD primality test for 768-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_768_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_1024 0x130f2085 /**< Functionality ID for GCD primality test for 1024-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_1024_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_1536 0x1d0c2094 /**< Functionality ID for GCD primality test for 1536-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_1536_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_2048 0x210c20a5 /**< Functionality ID for GCD primality test for 2048-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_2048_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_3072 0x290c20b6 /**< Functionality ID for GCD primality test for 3072-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_3072_input_s::m m * @endlink * @li no output parameters */ #define PKE_GCD_PT_4096 0x310c20c7 /**< Functionality ID for GCD primality test for 4096-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_4096_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_160 0x0e1120d8 /**< Functionality ID for Fermat primality test for 160-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_160_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_512 0x121120ee /**< Functionality ID for Fermat primality test for 512-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_512_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_L512 0x19162104 /**< Functionality ID for Fermat primality test for <e; 512-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_l512_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_768 0x19112124 /**< Functionality ID for Fermat primality test for 768-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_768_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_1024 0x1f11213a /**< Functionality ID for Fermat primality test for 1024-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_1024_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_1536 0x2b112150 /**< Functionality ID for Fermat primality test for 1536-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_1536_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_2048 0x3b112166 /**< Functionality ID for Fermat primality test for 2048-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_2048_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_3072 0x3a11217c /**< Functionality ID for Fermat primality test for 3072-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_3072_input_s::m m * @endlink * @li no output parameters */ #define PKE_FERMAT_PT_4096 0x4a112192 /**< Functionality ID for Fermat primality test for 4096-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_4096_input_s::m m * @endlink * @li no output parameters */ #define PKE_MR_PT_160 0x0e1221a8 /**< Functionality ID for Miller-Rabin primality test for 160-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_160_input_s::x x @endlink * @link icp_qat_fw_mmp_mr_pt_160_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_512 0x111221bf /**< Functionality ID for Miller-Rabin primality test for 512-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_512_input_s::x x @endlink * @link icp_qat_fw_mmp_mr_pt_512_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_768 0x1d0d21d6 /**< Functionality ID for Miller-Rabin primality test for 768-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_768_input_s::x x @endlink * @link icp_qat_fw_mmp_mr_pt_768_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_1024 0x250d21ed /**< Functionality ID for Miller-Rabin primality test for 1024-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_1024_input_s::x x * @endlink @link icp_qat_fw_mmp_mr_pt_1024_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_1536 0x350d2204 /**< Functionality ID for Miller-Rabin primality test for 1536-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_1536_input_s::x x * @endlink @link icp_qat_fw_mmp_mr_pt_1536_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_2048 0x490d221b /**< Functionality ID for Miller-Rabin primality test for 2048-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_2048_input_s::x x * @endlink @link icp_qat_fw_mmp_mr_pt_2048_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_3072 0x4d0d2232 /**< Functionality ID for Miller-Rabin primality test for 3072-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_3072_input_s::x x * @endlink @link icp_qat_fw_mmp_mr_pt_3072_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_4096 0x650d2249 /**< Functionality ID for Miller-Rabin primality test for 4096-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_4096_input_s::x x * @endlink @link icp_qat_fw_mmp_mr_pt_4096_input_s::m m @endlink * @li no output parameters */ #define PKE_MR_PT_L512 0x18182260 /**< Functionality ID for Miller-Rabin primality test for 512-bit numbers * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_l512_input_s::x x * @endlink @link icp_qat_fw_mmp_mr_pt_l512_input_s::m m @endlink * @li no output parameters */ #define PKE_LUCAS_PT_160 0x0e0c227e /**< Functionality ID for Lucas primality test for 160-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_160_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_512 0x110c228f /**< Functionality ID for Lucas primality test for 512-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_512_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_768 0x130c22a0 /**< Functionality ID for Lucas primality test for 768-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_768_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_1024 0x150c22b1 /**< Functionality ID for Lucas primality test for 1024-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_1024_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_1536 0x190c22c2 /**< Functionality ID for Lucas primality test for 1536-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_1536_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_2048 0x1d0c22d3 /**< Functionality ID for Lucas primality test for 2048-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_2048_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_3072 0x250c22e4 /**< Functionality ID for Lucas primality test for 3072-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_3072_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_4096 0x661522f5 /**< Functionality ID for Lucas primality test for 4096-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_4096_input_s::m m * @endlink * @li no output parameters */ #define PKE_LUCAS_PT_L512 0x1617230a /**< Functionality ID for Lucas primality test for L512-bit numbers * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_l512_input_s::m m * @endlink * @li no output parameters */ #define MATHS_MODEXP_L512 0x150c2327 /**< Functionality ID for Modular exponentiation for numbers less than 512-bits * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l512_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l512_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l512_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l512_output_s::r r * @endlink */ #define MATHS_MODEXP_L1024 0x2d0c233e /**< Functionality ID for Modular exponentiation for numbers less than 1024-bit * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l1024_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l1024_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l1024_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l1024_output_s::r r * @endlink */ #define MATHS_MODEXP_L1536 0x410c2355 /**< Functionality ID for Modular exponentiation for numbers less than 1536-bits * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l1536_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l1536_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l1536_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l1536_output_s::r r * @endlink */ #define MATHS_MODEXP_L2048 0x5e12236c /**< Functionality ID for Modular exponentiation for numbers less than 2048-bit * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l2048_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l2048_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l2048_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l2048_output_s::r r * @endlink */ #define MATHS_MODEXP_L2560 0x60162388 /**< Functionality ID for Modular exponentiation for numbers less than 2560-bits * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l2560_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l2560_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l2560_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l2560_output_s::r r * @endlink */ #define MATHS_MODEXP_L3072 0x650c23a9 /**< Functionality ID for Modular exponentiation for numbers less than 3072-bits * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l3072_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l3072_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l3072_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l3072_output_s::r r * @endlink */ #define MATHS_MODEXP_L3584 0x801623c0 /**< Functionality ID for Modular exponentiation for numbers less than 3584-bits * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l3584_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l3584_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l3584_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l3584_output_s::r r * @endlink */ #define MATHS_MODEXP_L4096 0x850c23e1 /**< Functionality ID for Modular exponentiation for numbers less than 4096-bit * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l4096_input_s::g g * @endlink @link icp_qat_fw_maths_modexp_l4096_input_s::e e @endlink @link * icp_qat_fw_maths_modexp_l4096_input_s::m m @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l4096_output_s::r r * @endlink */ +#define MATHS_MODEXP_L8192 0xc50c3646 +/**< Functionality ID for Modular exponentiation for numbers up to 8192 bits + * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l8192_input_s::g g + * @endlink @link icp_qat_fw_maths_modexp_l8192_input_s::e e @endlink @link + * icp_qat_fw_maths_modexp_l8192_input_s::m m @endlink + * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l8192_output_s::r r + * @endlink + */ #define MATHS_MODINV_ODD_L128 0x090623f8 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 128 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l128_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l128_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l128_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L192 0x0a0623fe /**< Functionality ID for Modular multiplicative inverse for numbers less than * 192 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l192_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l192_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l192_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L256 0x0a062404 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 256 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l256_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l256_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l256_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L384 0x0b06240a /**< Functionality ID for Modular multiplicative inverse for numbers less than * 384 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l384_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l384_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l384_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L512 0x0c062410 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 512 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l512_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l512_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l512_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L768 0x0e062416 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 768 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l768_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l768_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l768_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L1024 0x1006241c /**< Functionality ID for Modular multiplicative inverse for numbers less than * 1024 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l1024_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l1024_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l1024_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L1536 0x18062422 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 1536 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l1536_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l1536_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l1536_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L2048 0x20062428 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 2048 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l2048_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l2048_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l2048_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L3072 0x3006242e /**< Functionality ID for Modular multiplicative inverse for numbers less than * 3072 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l3072_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l3072_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l3072_output_s::c * c @endlink */ #define MATHS_MODINV_ODD_L4096 0x40062434 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 4096 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l4096_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_odd_l4096_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l4096_output_s::c * c @endlink */ +#define MATHS_MODINV_ODD_L8192 0x88073656 +/**< Functionality ID for Modular multiplicative inverse for numbers up to 8192 + * bits + * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l8192_input_s::a a + * @endlink @link icp_qat_fw_maths_modinv_odd_l8192_input_s::b b @endlink + * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l8192_output_s::c + * c @endlink + */ #define MATHS_MODINV_EVEN_L128 0x0906243a /**< Functionality ID for Modular multiplicative inverse for numbers less than * 128 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l128_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_even_l128_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_even_l128_output_s::c * c @endlink */ #define MATHS_MODINV_EVEN_L192 0x0a062440 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 192 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l192_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_even_l192_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_even_l192_output_s::c * c @endlink */ #define MATHS_MODINV_EVEN_L256 0x0a062446 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 256 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l256_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_even_l256_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_even_l256_output_s::c * c @endlink */ #define MATHS_MODINV_EVEN_L384 0x0e0b244c /**< Functionality ID for Modular multiplicative inverse for numbers less than * 384 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l384_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_even_l384_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_even_l384_output_s::c * c @endlink */ #define MATHS_MODINV_EVEN_L512 0x110b2457 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 512 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l512_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_even_l512_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_even_l512_output_s::c * c @endlink */ #define MATHS_MODINV_EVEN_L768 0x170b2462 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 768 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l768_input_s::a a * @endlink @link icp_qat_fw_maths_modinv_even_l768_input_s::b b @endlink * @li 1 output parameters : @link icp_qat_fw_maths_modinv_even_l768_output_s::c * c @endlink */ #define MATHS_MODINV_EVEN_L1024 0x1d0b246d /**< Functionality ID for Modular multiplicative inverse for numbers less than * 1024 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l1024_input_s::a * a @endlink @link icp_qat_fw_maths_modinv_even_l1024_input_s::b b @endlink * @li 1 output parameters : @link * icp_qat_fw_maths_modinv_even_l1024_output_s::c c @endlink */ #define MATHS_MODINV_EVEN_L1536 0x290b2478 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 1536 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l1536_input_s::a * a @endlink @link icp_qat_fw_maths_modinv_even_l1536_input_s::b b @endlink * @li 1 output parameters : @link * icp_qat_fw_maths_modinv_even_l1536_output_s::c c @endlink */ #define MATHS_MODINV_EVEN_L2048 0x350b2483 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 2048 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l2048_input_s::a * a @endlink @link icp_qat_fw_maths_modinv_even_l2048_input_s::b b @endlink * @li 1 output parameters : @link * icp_qat_fw_maths_modinv_even_l2048_output_s::c c @endlink */ #define MATHS_MODINV_EVEN_L3072 0x4d0b248e /**< Functionality ID for Modular multiplicative inverse for numbers less than * 3072 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l3072_input_s::a * a @endlink @link icp_qat_fw_maths_modinv_even_l3072_input_s::b b @endlink * @li 1 output parameters : @link * icp_qat_fw_maths_modinv_even_l3072_output_s::c c @endlink */ #define MATHS_MODINV_EVEN_L4096 0x650b2499 /**< Functionality ID for Modular multiplicative inverse for numbers less than * 4096 bits * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l4096_input_s::a * a @endlink @link icp_qat_fw_maths_modinv_even_l4096_input_s::b b @endlink * @li 1 output parameters : @link * icp_qat_fw_maths_modinv_even_l4096_output_s::c c @endlink */ +#define MATHS_MODINV_EVEN_L8192 0xc80d3666 +/**< Functionality ID for Modular multiplicative inverse for numbers up to 8192 + * bits + * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l8192_input_s::a + * a @endlink @link icp_qat_fw_maths_modinv_even_l8192_input_s::b b @endlink + * @li 1 output parameters : @link + * icp_qat_fw_maths_modinv_even_l8192_output_s::c c @endlink + */ #define PKE_DSA_GEN_P_1024_160 0x381824a4 /**< Functionality ID for DSA parameter generation P * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_1024_160_input_s::x x * @endlink @link icp_qat_fw_mmp_dsa_gen_p_1024_160_input_s::q q @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_p_1024_160_output_s::p * p @endlink */ #define PKE_DSA_GEN_G_1024 0x261424d4 /**< Functionality ID for DSA key generation G * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_g_1024_input_s::p p * @endlink @link icp_qat_fw_mmp_dsa_gen_g_1024_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_gen_g_1024_input_s::h h @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_g_1024_output_s::g g * @endlink */ #define PKE_DSA_GEN_Y_1024 0x291224ed /**< Functionality ID for DSA key generation Y * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_y_1024_input_s::p p * @endlink @link icp_qat_fw_mmp_dsa_gen_y_1024_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_gen_y_1024_input_s::x x @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_y_1024_output_s::y y * @endlink */ #define PKE_DSA_SIGN_R_1024_160 0x2c1c2504 /**< Functionality ID for DSA Sign R * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_1024_160_input_s::k * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_1024_160_input_s::p p @endlink * @link icp_qat_fw_mmp_dsa_sign_r_1024_160_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_1024_160_input_s::g g @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_1024_160_output_s::r r @endlink */ #define PKE_DSA_SIGN_S_160 0x12142526 /**< Functionality ID for DSA Sign S * @li 5 input parameters : @link icp_qat_fw_mmp_dsa_sign_s_160_input_s::m m * @endlink @link icp_qat_fw_mmp_dsa_sign_s_160_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_s_160_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_s_160_input_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_s_160_input_s::x x @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_sign_s_160_output_s::s s * @endlink */ #define PKE_DSA_SIGN_R_S_1024_160 0x301e2540 /**< Functionality ID for DSA Sign R S * @li 6 input parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input_s::x x @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output_s::s s @endlink */ #define PKE_DSA_VERIFY_1024_160 0x323a2570 /**< Functionality ID for DSA Verify * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_1024_160_input_s::r * r @endlink @link icp_qat_fw_mmp_dsa_verify_1024_160_input_s::s s @endlink * @link icp_qat_fw_mmp_dsa_verify_1024_160_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_verify_1024_160_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_verify_1024_160_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_verify_1024_160_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_verify_1024_160_input_s::y y @endlink * @li no output parameters */ #define PKE_DSA_GEN_P_2048_224 0x341d25be /**< Functionality ID for DSA parameter generation P * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_2048_224_input_s::x x * @endlink @link icp_qat_fw_mmp_dsa_gen_p_2048_224_input_s::q q @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_p_2048_224_output_s::p * p @endlink */ #define PKE_DSA_GEN_Y_2048 0x4d1225ea /**< Functionality ID for DSA key generation Y * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_y_2048_input_s::p p * @endlink @link icp_qat_fw_mmp_dsa_gen_y_2048_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_gen_y_2048_input_s::x x @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_y_2048_output_s::y y * @endlink */ #define PKE_DSA_SIGN_R_2048_224 0x511c2601 /**< Functionality ID for DSA Sign R * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_2048_224_input_s::k * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_2048_224_input_s::p p @endlink * @link icp_qat_fw_mmp_dsa_sign_r_2048_224_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_2048_224_input_s::g g @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_2048_224_output_s::r r @endlink */ #define PKE_DSA_SIGN_S_224 0x15142623 /**< Functionality ID for DSA Sign S * @li 5 input parameters : @link icp_qat_fw_mmp_dsa_sign_s_224_input_s::m m * @endlink @link icp_qat_fw_mmp_dsa_sign_s_224_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_s_224_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_s_224_input_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_s_224_input_s::x x @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_sign_s_224_output_s::s s * @endlink */ #define PKE_DSA_SIGN_R_S_2048_224 0x571e263d /**< Functionality ID for DSA Sign R S * @li 6 input parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input_s::x x @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output_s::s s @endlink */ #define PKE_DSA_VERIFY_2048_224 0x6930266d /**< Functionality ID for DSA Verify * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_2048_224_input_s::r * r @endlink @link icp_qat_fw_mmp_dsa_verify_2048_224_input_s::s s @endlink * @link icp_qat_fw_mmp_dsa_verify_2048_224_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_224_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_224_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_224_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_224_input_s::y y @endlink * @li no output parameters */ #define PKE_DSA_GEN_P_2048_256 0x431126b7 /**< Functionality ID for DSA parameter generation P * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_2048_256_input_s::x x * @endlink @link icp_qat_fw_mmp_dsa_gen_p_2048_256_input_s::q q @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_p_2048_256_output_s::p * p @endlink */ #define PKE_DSA_GEN_G_2048 0x4b1426ed /**< Functionality ID for DSA key generation G * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_g_2048_input_s::p p * @endlink @link icp_qat_fw_mmp_dsa_gen_g_2048_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_gen_g_2048_input_s::h h @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_g_2048_output_s::g g * @endlink */ #define PKE_DSA_SIGN_R_2048_256 0x5b182706 /**< Functionality ID for DSA Sign R * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_2048_256_input_s::k * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_2048_256_input_s::p p @endlink * @link icp_qat_fw_mmp_dsa_sign_r_2048_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_2048_256_input_s::g g @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_2048_256_output_s::r r @endlink */ #define PKE_DSA_SIGN_S_256 0x15142733 /**< Functionality ID for DSA Sign S * @li 5 input parameters : @link icp_qat_fw_mmp_dsa_sign_s_256_input_s::m m * @endlink @link icp_qat_fw_mmp_dsa_sign_s_256_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_s_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_s_256_input_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_s_256_input_s::x x @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_sign_s_256_output_s::s s * @endlink */ #define PKE_DSA_SIGN_R_S_2048_256 0x5a2a274d /**< Functionality ID for DSA Sign R S * @li 6 input parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input_s::x x @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output_s::s s @endlink */ #define PKE_DSA_VERIFY_2048_256 0x723a2789 /**< Functionality ID for DSA Verify * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_2048_256_input_s::r * r @endlink @link icp_qat_fw_mmp_dsa_verify_2048_256_input_s::s s @endlink * @link icp_qat_fw_mmp_dsa_verify_2048_256_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_256_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_256_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_verify_2048_256_input_s::y y @endlink * @li no output parameters */ #define PKE_DSA_GEN_P_3072_256 0x4b1127e0 /**< Functionality ID for DSA parameter generation P * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_3072_256_input_s::x x * @endlink @link icp_qat_fw_mmp_dsa_gen_p_3072_256_input_s::q q @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_p_3072_256_output_s::p * p @endlink */ #define PKE_DSA_GEN_G_3072 0x4f142816 /**< Functionality ID for DSA key generation G * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_g_3072_input_s::p p * @endlink @link icp_qat_fw_mmp_dsa_gen_g_3072_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_gen_g_3072_input_s::h h @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_g_3072_output_s::g g * @endlink */ #define PKE_DSA_GEN_Y_3072 0x5112282f /**< Functionality ID for DSA key generation Y * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_y_3072_input_s::p p * @endlink @link icp_qat_fw_mmp_dsa_gen_y_3072_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_gen_y_3072_input_s::x x @endlink * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_y_3072_output_s::y y * @endlink */ #define PKE_DSA_SIGN_R_3072_256 0x59282846 /**< Functionality ID for DSA Sign R * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_3072_256_input_s::k * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_3072_256_input_s::p p @endlink * @link icp_qat_fw_mmp_dsa_sign_r_3072_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_3072_256_input_s::g g @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_3072_256_output_s::r r @endlink */ #define PKE_DSA_SIGN_R_S_3072_256 0x61292874 /**< Functionality ID for DSA Sign R S * @li 6 input parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s::k k @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input_s::x x @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_s::r r @endlink @link * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output_s::s s @endlink */ #define PKE_DSA_VERIFY_3072_256 0x7f4328ae /**< Functionality ID for DSA Verify * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_3072_256_input_s::r * r @endlink @link icp_qat_fw_mmp_dsa_verify_3072_256_input_s::s s @endlink * @link icp_qat_fw_mmp_dsa_verify_3072_256_input_s::m m @endlink @link * icp_qat_fw_mmp_dsa_verify_3072_256_input_s::p p @endlink @link * icp_qat_fw_mmp_dsa_verify_3072_256_input_s::q q @endlink @link * icp_qat_fw_mmp_dsa_verify_3072_256_input_s::g g @endlink @link * icp_qat_fw_mmp_dsa_verify_3072_256_input_s::y y @endlink * @li no output parameters */ #define PKE_ECDSA_SIGN_RS_GF2_L256 0x46512907 /**< Functionality ID for ECDSA Sign RS for curves B/K-163 and B/K-233 * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input_s::in in @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_R_GF2_L256 0x323a298f /**< Functionality ID for ECDSA Sign R for curves B/K-163 and B/K-233 * @li 7 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::xg xg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::yg yg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::n n @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::q q @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::a a @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::b b @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input_s::k k @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output_s::r r @endlink */ #define PKE_ECDSA_SIGN_S_GF2_L256 0x2b2229e6 /**< Functionality ID for ECDSA Sign S for curves with n < 2^256 * @li 5 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s::e e @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s::d d @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s::k k @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input_s::n n @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output_s::s s @endlink */ #define PKE_ECDSA_VERIFY_GF2_L256 0x337e2a27 /**< Functionality ID for ECDSA Verify for curves B/K-163 and B/K-233 * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input_s::in in @endlink * @li no output parameters */ #define PKE_ECDSA_SIGN_RS_GF2_L512 0x5e5f2ad7 /**< Functionality ID for ECDSA Sign RS * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input_s::in in @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_R_GF2_L512 0x84312b6a /**< Functionality ID for ECDSA GF2 Sign R * @li 7 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::xg xg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::yg yg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::n n @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::q q @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::a a @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::b b @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input_s::k k @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output_s::r r @endlink */ #define PKE_ECDSA_SIGN_S_GF2_L512 0x26182bbe /**< Functionality ID for ECDSA GF2 Sign S * @li 5 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s::e e @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s::d d @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s::k k @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input_s::n n @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output_s::s s @endlink */ #define PKE_ECDSA_VERIFY_GF2_L512 0x58892bea /**< Functionality ID for ECDSA GF2 Verify * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input_s::in in @endlink * @li no output parameters */ #define PKE_ECDSA_SIGN_RS_GF2_571 0x554a2c93 /**< Functionality ID for ECDSA GF2 Sign RS for curves B-571/K-571 * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input_s::in in @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_S_GF2_571 0x52332d09 /**< Functionality ID for ECDSA GF2 Sign S for curves with deg(q) < 576 * @li 5 input parameters : @link icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s::e * e @endlink @link icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s::d d @endlink * @link icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s::k k @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input_s::n n @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_R_GF2_571 0x731a2d51 /**< Functionality ID for ECDSA GF2 Sign R for degree 571 * @li 7 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::xg xg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::yg yg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::n n @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::q q @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::a a @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::b b @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input_s::k k @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output_s::r r @endlink */ #define PKE_ECDSA_VERIFY_GF2_571 0x4f6c2d91 /**< Functionality ID for ECDSA GF2 Verify for degree 571 * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_verify_gf2_571_input_s::in in @endlink * @li no output parameters */ #define MATHS_POINT_MULTIPLICATION_GF2_L256 0x3b242e38 /**< Functionality ID for MATHS GF2 Point Multiplication * @li 7 input parameters : @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::k k @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::xg xg @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::yg yg @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::a a @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::b b @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::q q @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_input_s::h h @endlink * @li 2 output parameters : @link * icp_qat_fw_maths_point_multiplication_gf2_l256_output_s::xk xk @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l256_output_s::yk yk @endlink */ #define MATHS_POINT_VERIFY_GF2_L256 0x231a2e7c /**< Functionality ID for MATHS GF2 Point Verification * @li 5 input parameters : @link * icp_qat_fw_maths_point_verify_gf2_l256_input_s::xq xq @endlink @link * icp_qat_fw_maths_point_verify_gf2_l256_input_s::yq yq @endlink @link * icp_qat_fw_maths_point_verify_gf2_l256_input_s::q q @endlink @link * icp_qat_fw_maths_point_verify_gf2_l256_input_s::a a @endlink @link * icp_qat_fw_maths_point_verify_gf2_l256_input_s::b b @endlink * @li no output parameters */ #define MATHS_POINT_MULTIPLICATION_GF2_L512 0x722c2e96 /**< Functionality ID for MATHS GF2 Point Multiplication * @li 7 input parameters : @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::k k @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::xg xg @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::yg yg @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::a a @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::b b @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::q q @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_input_s::h h @endlink * @li 2 output parameters : @link * icp_qat_fw_maths_point_multiplication_gf2_l512_output_s::xk xk @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_l512_output_s::yk yk @endlink */ #define MATHS_POINT_VERIFY_GF2_L512 0x25132ee2 /**< Functionality ID for MATHS GF2 Point Verification * @li 5 input parameters : @link * icp_qat_fw_maths_point_verify_gf2_l512_input_s::xq xq @endlink @link * icp_qat_fw_maths_point_verify_gf2_l512_input_s::yq yq @endlink @link * icp_qat_fw_maths_point_verify_gf2_l512_input_s::q q @endlink @link * icp_qat_fw_maths_point_verify_gf2_l512_input_s::a a @endlink @link * icp_qat_fw_maths_point_verify_gf2_l512_input_s::b b @endlink * @li no output parameters */ #define MATHS_POINT_MULTIPLICATION_GF2_571 0x44152ef5 /**< Functionality ID for ECC GF2 Point Multiplication for curves B-571/K-571 * @li 7 input parameters : @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::k k @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::xg xg @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::yg yg @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::a a @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::b b @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::q q @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_input_s::h h @endlink * @li 2 output parameters : @link * icp_qat_fw_maths_point_multiplication_gf2_571_output_s::xk xk @endlink @link * icp_qat_fw_maths_point_multiplication_gf2_571_output_s::yk yk @endlink */ #define MATHS_POINT_VERIFY_GF2_571 0x12072f1b /**< Functionality ID for ECC GF2 Point Verification for degree 571 * @li 5 input parameters : @link * icp_qat_fw_maths_point_verify_gf2_571_input_s::xq xq @endlink @link * icp_qat_fw_maths_point_verify_gf2_571_input_s::yq yq @endlink @link * icp_qat_fw_maths_point_verify_gf2_571_input_s::q q @endlink @link * icp_qat_fw_maths_point_verify_gf2_571_input_s::a a @endlink @link * icp_qat_fw_maths_point_verify_gf2_571_input_s::b b @endlink * @li no output parameters */ #define PKE_ECDSA_SIGN_R_GFP_L256 0x431b2f22 /**< Functionality ID for ECDSA GFP Sign R * @li 7 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::xg xg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::yg yg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::n n @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::q q @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::a a @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::b b @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input_s::k k @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output_s::r r @endlink */ #define PKE_ECDSA_SIGN_S_GFP_L256 0x2b252f6d /**< Functionality ID for ECDSA GFP Sign S * @li 5 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s::e e @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s::d d @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s::k k @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input_s::n n @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_RS_GFP_L256 0x6a3c2fa6 /**< Functionality ID for ECDSA GFP Sign RS * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input_s::in in @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output_s::s s @endlink */ #define PKE_ECDSA_VERIFY_GFP_L256 0x325b3023 /**< Functionality ID for ECDSA GFP Verify * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input_s::in in @endlink * @li no output parameters */ #define PKE_ECDSA_SIGN_R_GFP_L512 0x4e2530b3 /**< Functionality ID for ECDSA GFP Sign R * @li 7 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::xg xg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::yg yg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::n n @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::q q @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::a a @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::b b @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input_s::k k @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output_s::r r @endlink */ #define PKE_ECDSA_SIGN_S_GFP_L512 0x251830fa /**< Functionality ID for ECDSA GFP Sign S * @li 5 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s::e e @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s::d d @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s::k k @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input_s::n n @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_RS_GFP_L512 0x5a2b3127 /**< Functionality ID for ECDSA GFP Sign RS * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input_s::in in @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output_s::s s @endlink */ #define PKE_ECDSA_VERIFY_GFP_L512 0x3553318a /**< Functionality ID for ECDSA GFP Verify * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input_s::in in @endlink * @li no output parameters */ #define PKE_ECDSA_SIGN_R_GFP_521 0x772c31fe /**< Functionality ID for ECDSA GFP Sign R * @li 7 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::xg xg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::yg yg @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::n n @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::q q @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::a a @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::b b @endlink @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input_s::k k @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output_s::r r @endlink */ #define PKE_ECDSA_SIGN_S_GFP_521 0x52343251 /**< Functionality ID for ECDSA GFP Sign S * @li 5 input parameters : @link icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s::e * e @endlink @link icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s::d d @endlink * @link icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s::k k @endlink @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input_s::n n @endlink * @li 1 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output_s::s s @endlink */ #define PKE_ECDSA_SIGN_RS_GFP_521 0x494a329b /**< Functionality ID for ECDSA GFP Sign RS * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input_s::in in @endlink * @li 2 output parameters : @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_s::r r @endlink @link * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output_s::s s @endlink */ #define PKE_ECDSA_VERIFY_GFP_521 0x554c331f /**< Functionality ID for ECDSA GFP Verify * @li 1 input parameters : @link * icp_qat_fw_mmp_ecdsa_verify_gfp_521_input_s::in in @endlink * @li no output parameters */ #define MATHS_POINT_MULTIPLICATION_GFP_L256 0x432033a6 /**< Functionality ID for ECC GFP Point Multiplication * @li 7 input parameters : @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::k k @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::xg xg @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::yg yg @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::a a @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::b b @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::q q @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_input_s::h h @endlink * @li 2 output parameters : @link * icp_qat_fw_maths_point_multiplication_gfp_l256_output_s::xk xk @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l256_output_s::yk yk @endlink */ #define MATHS_POINT_VERIFY_GFP_L256 0x1f0c33fc /**< Functionality ID for ECC GFP Partial Point Verification * @li 5 input parameters : @link * icp_qat_fw_maths_point_verify_gfp_l256_input_s::xq xq @endlink @link * icp_qat_fw_maths_point_verify_gfp_l256_input_s::yq yq @endlink @link * icp_qat_fw_maths_point_verify_gfp_l256_input_s::q q @endlink @link * icp_qat_fw_maths_point_verify_gfp_l256_input_s::a a @endlink @link * icp_qat_fw_maths_point_verify_gfp_l256_input_s::b b @endlink * @li no output parameters */ #define MATHS_POINT_MULTIPLICATION_GFP_L512 0x41253419 /**< Functionality ID for ECC GFP Point Multiplication * @li 7 input parameters : @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::k k @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::xg xg @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::yg yg @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::a a @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::b b @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::q q @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_input_s::h h @endlink * @li 2 output parameters : @link * icp_qat_fw_maths_point_multiplication_gfp_l512_output_s::xk xk @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_l512_output_s::yk yk @endlink */ #define MATHS_POINT_VERIFY_GFP_L512 0x2612345c /**< Functionality ID for ECC GFP Partial Point * @li 5 input parameters : @link * icp_qat_fw_maths_point_verify_gfp_l512_input_s::xq xq @endlink @link * icp_qat_fw_maths_point_verify_gfp_l512_input_s::yq yq @endlink @link * icp_qat_fw_maths_point_verify_gfp_l512_input_s::q q @endlink @link * icp_qat_fw_maths_point_verify_gfp_l512_input_s::a a @endlink @link * icp_qat_fw_maths_point_verify_gfp_l512_input_s::b b @endlink * @li no output parameters */ #define MATHS_POINT_MULTIPLICATION_GFP_521 0x5511346e /**< Functionality ID for ECC GFP Point Multiplication * @li 7 input parameters : @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::k k @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::xg xg @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::yg yg @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::a a @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::b b @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::q q @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_input_s::h h @endlink * @li 2 output parameters : @link * icp_qat_fw_maths_point_multiplication_gfp_521_output_s::xk xk @endlink @link * icp_qat_fw_maths_point_multiplication_gfp_521_output_s::yk yk @endlink */ #define MATHS_POINT_VERIFY_GFP_521 0x0e0734be /**< Functionality ID for ECC GFP Partial Point Verification * @li 5 input parameters : @link * icp_qat_fw_maths_point_verify_gfp_521_input_s::xq xq @endlink @link * icp_qat_fw_maths_point_verify_gfp_521_input_s::yq yq @endlink @link * icp_qat_fw_maths_point_verify_gfp_521_input_s::q q @endlink @link * icp_qat_fw_maths_point_verify_gfp_521_input_s::a a @endlink @link * icp_qat_fw_maths_point_verify_gfp_521_input_s::b b @endlink * @li no output parameters */ -#define POINT_MULTIPLICATION_C25519 0x0a0634c6 -/**< Functionality ID for ECC curve25519 Variable Point Multiplication [k]P(x), - * as specified in RFC7748 - * @li 2 input parameters : @link - * icp_qat_fw_point_multiplication_c25519_input_s::xp xp @endlink @link - * icp_qat_fw_point_multiplication_c25519_input_s::k k @endlink - * @li 1 output parameters : @link - * icp_qat_fw_point_multiplication_c25519_output_s::xr xr @endlink - */ -#define GENERATOR_MULTIPLICATION_C25519 0x0a0634d6 -/**< Functionality ID for ECC curve25519 Generator Point Multiplication [k]G(x), - * as specified in RFC7748 - * @li 1 input parameters : @link - * icp_qat_fw_generator_multiplication_c25519_input_s::k k @endlink - * @li 1 output parameters : @link - * icp_qat_fw_generator_multiplication_c25519_output_s::xr xr @endlink - */ -#define POINT_MULTIPLICATION_ED25519 0x100b34e6 -/**< Functionality ID for ECC edwards25519 Variable Point Multiplication [k]P, - * as specified in RFC8032 +#define PKE_EC_POINT_MULTIPLICATION_P256 0x0a083546 +/**< Functionality ID for ECC P256 Variable Point Multiplication [k]P(x) * @li 3 input parameters : @link - * icp_qat_fw_point_multiplication_ed25519_input_s::xp xp @endlink @link - * icp_qat_fw_point_multiplication_ed25519_input_s::yp yp @endlink @link - * icp_qat_fw_point_multiplication_ed25519_input_s::k k @endlink + * icp_qat_fw_mmp_ec_p256_point_multiplication_input_s::xp xp @endlink @link + * icp_qat_fw_mmp_ec_p256_point_multiplication_input_s::yp yp @endlink @link + * icp_qat_fw_mmp_ec_p256_point_multiplication_input_s::k k @endlink * @li 2 output parameters : @link - * icp_qat_fw_point_multiplication_ed25519_output_s::xr xr @endlink @link - * icp_qat_fw_point_multiplication_ed25519_output_s::yr yr @endlink + * icp_qat_fw_mmp_ec_p256_point_multiplication_output_s::xr xr @endlink @link + * icp_qat_fw_mmp_ec_p256_point_multiplication_output_s::yr yr @endlink */ -#define GENERATOR_MULTIPLICATION_ED25519 0x100a34f6 -/**< Functionality ID for ECC edwards25519 Generator Point Multiplication [k]G, - * as specified in RFC8032 +#define PKE_EC_GENERATOR_MULTIPLICATION_P256 0x12073556 +/**< Functionality ID for ECC P256 Generator Point Multiplication [k]G(x) * @li 1 input parameters : @link - * icp_qat_fw_generator_multiplication_ed25519_input_s::k k @endlink + * icp_qat_fw_mmp_ec_p256_generator_multiplication_input_s::k k @endlink * @li 2 output parameters : @link - * icp_qat_fw_generator_multiplication_ed25519_output_s::xr xr @endlink @link - * icp_qat_fw_generator_multiplication_ed25519_output_s::yr yr @endlink + * icp_qat_fw_mmp_ec_p256_generator_multiplication_output_s::xr xr @endlink + * @link icp_qat_fw_mmp_ec_p256_generator_multiplication_output_s::yr yr + * @endlink */ -#define POINT_MULTIPLICATION_C448 0x0c063506 -/**< Functionality ID for ECC curve448 Variable Point Multiplication [k]P(x), as - * specified in RFC7748 - * @li 2 input parameters : @link - * icp_qat_fw_point_multiplication_c448_input_s::xp xp @endlink @link - * icp_qat_fw_point_multiplication_c448_input_s::k k @endlink - * @li 1 output parameters : @link - * icp_qat_fw_point_multiplication_c448_output_s::xr xr @endlink +#define PKE_ECDSA_SIGN_RS_P256 0x18133566 +/**< Functionality ID for ECC P256 ECDSA Sign RS + * @li 3 input parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s::k k + * @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s::e e @endlink @link + * icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s::d d @endlink + * @li 2 output parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_s::r + * r @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_s::s s @endlink */ -#define GENERATOR_MULTIPLICATION_C448 0x0c063516 -/**< Functionality ID for ECC curve448 Generator Point Multiplication [k]G(x), - * as specified in RFC7748 - * @li 1 input parameters : @link - * icp_qat_fw_generator_multiplication_c448_input_s::k k @endlink - * @li 1 output parameters : @link - * icp_qat_fw_generator_multiplication_c448_output_s::xr xr @endlink - */ -#define POINT_MULTIPLICATION_ED448 0x1a0b3526 -/**< Functionality ID for ECC edwards448 Variable Point Multiplication [k]P, as - * specified in RFC8032 +#define PKE_EC_POINT_MULTIPLICATION_P384 0x0b083586 +/**< Functionality ID for ECC P384 Variable Point Multiplication [k]P(x) * @li 3 input parameters : @link - * icp_qat_fw_point_multiplication_ed448_input_s::xp xp @endlink @link - * icp_qat_fw_point_multiplication_ed448_input_s::yp yp @endlink @link - * icp_qat_fw_point_multiplication_ed448_input_s::k k @endlink + * icp_qat_fw_mmp_ec_p384_point_multiplication_input_s::xp xp @endlink @link + * icp_qat_fw_mmp_ec_p384_point_multiplication_input_s::yp yp @endlink @link + * icp_qat_fw_mmp_ec_p384_point_multiplication_input_s::k k @endlink * @li 2 output parameters : @link - * icp_qat_fw_point_multiplication_ed448_output_s::xr xr @endlink @link - * icp_qat_fw_point_multiplication_ed448_output_s::yr yr @endlink + * icp_qat_fw_mmp_ec_p384_point_multiplication_output_s::xr xr @endlink @link + * icp_qat_fw_mmp_ec_p384_point_multiplication_output_s::yr yr @endlink */ -#define GENERATOR_MULTIPLICATION_ED448 0x1a0a3536 -/**< Functionality ID for ECC edwards448 Generator Point Multiplication [k]P, as - * specified in RFC8032 +#define PKE_EC_GENERATOR_MULTIPLICATION_P384 0x0b073596 +/**< Functionality ID for ECC P384 Generator Point Multiplication [k]G(x) * @li 1 input parameters : @link - * icp_qat_fw_generator_multiplication_ed448_input_s::k k @endlink + * icp_qat_fw_mmp_ec_p384_generator_multiplication_input_s::k k @endlink * @li 2 output parameters : @link - * icp_qat_fw_generator_multiplication_ed448_output_s::xr xr @endlink @link - * icp_qat_fw_generator_multiplication_ed448_output_s::yr yr @endlink + * icp_qat_fw_mmp_ec_p384_generator_multiplication_output_s::xr xr @endlink + * @link icp_qat_fw_mmp_ec_p384_generator_multiplication_output_s::yr yr + * @endlink + */ +#define PKE_ECDSA_SIGN_RS_P384 0x1a1335a6 +/**< Functionality ID for ECC P384 ECDSA Sign RS + * @li 3 input parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s::k k + * @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s::e e @endlink @link + * icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s::d d @endlink + * @li 2 output parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_s::r + * r @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_s::s s @endlink */ - #define PKE_LIVENESS 0x00000001 /**< Functionality ID for PKE_LIVENESS * @li 0 input parameter(s) * @li 1 output parameter(s) (8 qwords) */ #define PKE_INTERFACE_SIGNATURE 0x972ded54 /**< Encoded signature of the interface specifications */ - #define PKE_INVALID_FUNC_ID 0xffffffff +#define PKE_KPT_ECDSA_SIGN_RS_P521 0xb6563896 +/**< Functionality ID for ECC P521 ECDSA Sign RS + * @li 3 input parameters : @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_input_s::kpt_wrapped kpt_wrapped + * @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_input_s::kpt_wrapping_context + * kpt_wrapping_context @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_input_s::e e @endlink + * @li 2 output parameters : @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_output_s::r r @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p521_output_s::s s @endlink + */ +#define PKE_KPT_ECDSA_SIGN_RS_P384 0x22143876 +/**< Functionality ID for ECC P384 ECDSA Sign RS + * @li 3 input parameters : @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_input_s::kpt_wrapped kpt_wrapped + * @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_input_s::kpt_wrapping_context + * kpt_wrapping_context @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_input_s::e e @endlink + * @li 2 output parameters : @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_output_s::r r @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p384_output_s::s s @endlink + */ +#define PKE_KPT_ECDSA_SIGN_RS_P256 0x8d153856 +/**< Functionality ID for ECC KPT P256 ECDSA Sign RS + * @li 3 input parameters : @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_input_s::kpt_wrapped kpt_wrapped + * @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_input_s::key_unwrap_context + * key_unwrap_context @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_input_s::e e @endlink + * @li 2 output parameters : @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_output_s::r r @endlink @link + * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_p256_output_s::s s @endlink + */ +#define PKE_KPT_RSA_DP1_512 0x1b1c3696 +/**< Functionality ID for KPT RSA 512 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_512_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_512_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_512_input_s::kpt_unwrap_context kpt_unwrap_context + * @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_512_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP1_1024 0x2d1d36b6 +/**< Functionality ID for KPT RSA 1024 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_1024_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_1024_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_1024_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_1024_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP1_1536 0x451d36d6 +/**< Functionality ID for KPT RSA 1536 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_1536_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_1536_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_1536_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_1536_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP1_2048 0x661936f6 +/**< Functionality ID for KPT RSA 2048 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_2048_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_2048_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_2048_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_2048_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP1_3072 0x751d3716 +/**< Functionality ID for KPT RSA 3072 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_3072_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_3072_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_3072_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_3072_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP1_4096 0x9d1d3736 +/**< Functionality ID for KPT RSA 4096 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_4096_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_4096_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_4096_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_4096_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP1_8192 0xbe203756 +/**< Functionality ID for KPT RSA 8192 Decryption + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_8192_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp1_8192_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp1_8192_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp1_8192_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_512 0x241d3776 +/**< Functionality ID for RSA 512 decryption second form + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_512_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_512_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_512_input_s::kpt_unwrap_context kpt_unwrap_context + * @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_512_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_1024 0x4e1d3796 +/**< Functionality ID for RSA 1024 Decryption with CRT + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_1024_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_1024_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_1024_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_1024_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_1536 0x762b37b6 +/**< Functionality ID for KPT RSA 1536 Decryption with CRT + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_1536_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_1536_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_1536_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_1536_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_2048 0xa41a37d6 +/**< Functionality ID for RSA 2048 Decryption with CRT + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_2048_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_2048_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_2048_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_2048_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_3072 0xd41a37f6 +/**< Functionality ID for + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_3072_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_3072_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_3072_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_3072_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_4096 0xd22a3816 +/**< Functionality ID for RSA 4096 Decryption with CRT + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_4096_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_4096_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_4096_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_4096_output_s::m m + * @endlink + */ +#define PKE_KPT_RSA_DP2_8192 0xae383836 +/**< Functionality ID for RSA 8192 Decryption with CRT + * @li 3 input parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_8192_input_s::c c + * @endlink @link icp_qat_fw_mmp_kpt_rsa_dp2_8192_input_s::kpt_wrapped + * kpt_wrapped @endlink @link + * icp_qat_fw_mmp_kpt_rsa_dp2_8192_input_s::kpt_unwrap_context + * kpt_unwrap_context @endlink + * @li 1 output parameters : @link icp_qat_fw_mmp_kpt_rsa_dp2_8192_output_s::m m + * @endlink + */ #endif /* __ICP_QAT_FW_MMP_IDS__ */ -/* --- (Automatically generated (relocation v. 1.3), do not modify manually) --- - */ +/* --- (Automatically generated (relocation v. 1.3), do not modify manually) --- */ /* --- end of file --- */ diff --git a/sys/dev/qat/qat_api/include/cpa.h b/sys/dev/qat/qat_api/include/cpa.h index 359f50e3d896..f4baa90c45cf 100644 --- a/sys/dev/qat/qat_api/include/cpa.h +++ b/sys/dev/qat/qat_api/include/cpa.h @@ -1,677 +1,799 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa.h * * @defgroup cpa CPA API * * @description * This is the top level API definition for Intel(R) QuickAssist Technology. * It contains structures, data types and definitions that are common * across the interface. * *****************************************************************************/ /** ***************************************************************************** * @defgroup cpa_BaseDataTypes Base Data Types * @file cpa.h * * @ingroup cpa * * @description * The base data types for the Intel CPA API. * *****************************************************************************/ #ifndef CPA_H #define CPA_H #ifdef __cplusplus extern "C" { #endif #include "cpa_types.h" /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance handle type. * * @description * Handle used to uniquely identify an instance. * * @note * Where only a single instantiation exists this field may be set to * @ref CPA_INSTANCE_HANDLE_SINGLE. * *****************************************************************************/ typedef void * CpaInstanceHandle; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Default instantiation handle value where there is only a single instance * * @description * Used as an instance handle value where only one instance exists. * *****************************************************************************/ #define CPA_INSTANCE_HANDLE_SINGLE ((CpaInstanceHandle)0) /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Physical memory address. * @description * Type for physical memory addresses. *****************************************************************************/ typedef Cpa64U CpaPhysicalAddr; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Virtual to physical address conversion routine. * * @description * This function is used to convert virtual addresses to physical * addresses. * * @context * The function shall not be called in an interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] pVirtualAddr Virtual address to be converted. * * @return * Returns the corresponding physical address. * On error, the value NULL is returned. * * @post * None * @see * None * *****************************************************************************/ typedef CpaPhysicalAddr (*CpaVirtualToPhysical)(void * pVirtualAddr); /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Flat buffer structure containing a pointer and length member. * * @description * A flat buffer structure. The data pointer, pData, is a virtual address. * An API instance may require the actual data to be in contiguous * physical memory as determined by @ref CpaInstanceInfo2. * *****************************************************************************/ typedef struct _CpaFlatBuffer { Cpa32U dataLenInBytes; /**< Data length specified in bytes. * When used as an input parameter to a function, the length specifies * the current length of the buffer. * When used as an output parameter to a function, the length passed in * specifies the maximum length of the buffer on return (i.e. the allocated * length). The implementation will not write past this length. On return, * the length is always unchanged. */ Cpa8U *pData; /**< The data pointer is a virtual address, however the actual data pointed * to is required to be in contiguous physical memory unless the field requiresPhysicallyContiguousMemory in CpaInstanceInfo2 is false. */ } CpaFlatBuffer; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Scatter/Gather buffer list containing an array of flat buffers. * * @description * A scatter/gather buffer list structure. This buffer structure is * typically used to represent a region of memory which is not * physically contiguous, by describing it as a collection of * buffers, each of which is physically contiguous. * * @note * The memory for the pPrivateMetaData member must be allocated * by the client as physically contiguous memory. When allocating * memory for pPrivateMetaData, a call to the corresponding * BufferListGetMetaSize function (e.g. cpaCyBufferListGetMetaSize) * MUST be made to determine the size of the Meta Data Buffer. The * returned size (in bytes) may then be passed in a memory allocation * routine to allocate the pPrivateMetaData memory. *****************************************************************************/ typedef struct _CpaBufferList { Cpa32U numBuffers; /**< Number of buffers in the list */ CpaFlatBuffer *pBuffers; /**< Pointer to an unbounded array containing the number of CpaFlatBuffers * defined by numBuffers */ void *pUserData; /**< This is an opaque field that is not read or modified internally. */ void *pPrivateMetaData; /**< Private representation of this buffer list. The memory for this * buffer needs to be allocated by the client as contiguous data. * The amount of memory required is returned with a call to * the corresponding BufferListGetMetaSize function. If that function * returns a size of zero then no memory needs to be allocated, and this * parameter can be NULL. */ } CpaBufferList; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Flat buffer structure with physical address. * * @description * Functions taking this structure do not need to do any virtual to * physical address translation before writing the buffer to hardware. *****************************************************************************/ typedef struct _CpaPhysFlatBuffer { Cpa32U dataLenInBytes; /**< Data length specified in bytes. * When used as an input parameter to a function, the length specifies * the current length of the buffer. * When used as an output parameter to a function, the length passed in * specifies the maximum length of the buffer on return (i.e. the allocated * length). The implementation will not write past this length. On return, * the length is always unchanged. */ Cpa32U reserved; /**< Reserved for alignment */ CpaPhysicalAddr bufferPhysAddr; /**< The physical address at which the data resides. The data pointed * to is required to be in contiguous physical memory. */ } CpaPhysFlatBuffer; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Scatter/gather list containing an array of flat buffers with * physical addresses. * * @description * Similar to @ref CpaBufferList, this buffer structure is typically * used to represent a region of memory which is not physically * contiguous, by describing it as a collection of buffers, each of * which is physically contiguous. The difference is that, in this * case, the individual "flat" buffers are represented using * physical, rather than virtual, addresses. *****************************************************************************/ typedef struct _CpaPhysBufferList { Cpa64U reserved0; /**< Reserved for internal usage */ Cpa32U numBuffers; /**< Number of buffers in the list */ Cpa32U reserved1; /**< Reserved for alignment */ CpaPhysFlatBuffer flatBuffers[]; /**< Array of flat buffer structures, of size numBuffers */ } CpaPhysBufferList; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Special value which can be taken by length fields on some of the * "data plane" APIs to indicate that the buffer in question is of * type CpaPhysBufferList, rather than simply an array of bytes. ****************************************************************************/ #define CPA_DP_BUFLIST ((Cpa32U)0xFFFFFFFF) /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * API status value type definition * * @description * This type definition is used for the return values used in all the * API functions. Common values are defined, for example see * @ref CPA_STATUS_SUCCESS, @ref CPA_STATUS_FAIL, etc. *****************************************************************************/ typedef Cpa32S CpaStatus; #define CPA_STATUS_SUCCESS (0) /**< * @ingroup cpa_BaseDataTypes * Success status value. */ #define CPA_STATUS_FAIL (-1) /**< * @ingroup cpa_BaseDataTypes * Fail status value. */ #define CPA_STATUS_RETRY (-2) /**< * @ingroup cpa_BaseDataTypes * Retry status value. */ #define CPA_STATUS_RESOURCE (-3) /**< * @ingroup cpa_BaseDataTypes * The resource that has been requested is unavailable. Refer * to relevant sections of the API for specifics on what the suggested * course of action is. */ #define CPA_STATUS_INVALID_PARAM (-4) /**< * @ingroup cpa_BaseDataTypes * Invalid parameter has been passed in. */ #define CPA_STATUS_FATAL (-5) /**< * @ingroup cpa_BaseDataTypes * A serious error has occurred. Recommended course of action * is to shutdown and restart the component. */ #define CPA_STATUS_UNSUPPORTED (-6) /**< * @ingroup cpa_BaseDataTypes * The function is not supported, at least not with the specific * parameters supplied. This may be because a particular * capability is not supported by the current implementation. */ #define CPA_STATUS_RESTARTING (-7) /**< * @ingroup cpa_BaseDataTypes * The API implementation is restarting. This may be reported if, for example, * a hardware implementation is undergoing a reset. Recommended course of * action is to retry the request. */ /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * API status string type definition * @description * This type definition is used for the generic status text strings * provided by cpaXxGetStatusText API functions. Common values are * defined, for example see @ref CPA_STATUS_STR_SUCCESS, * @ref CPA_STATUS_FAIL, etc., as well as the maximum size * @ref CPA_STATUS_MAX_STR_LENGTH_IN_BYTES. *****************************************************************************/ #define CPA_STATUS_MAX_STR_LENGTH_IN_BYTES (255) /**< * @ingroup cpa_BaseDataTypes * Maximum length of the Overall Status String (including generic and specific * strings returned by calls to cpaXxGetStatusText) */ #define CPA_STATUS_STR_SUCCESS ("Operation was successful:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_SUCCESS. */ #define CPA_STATUS_STR_FAIL ("General or unspecified error occurred:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_FAIL. */ #define CPA_STATUS_STR_RETRY ("Recoverable error occurred:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_RETRY. */ #define CPA_STATUS_STR_RESOURCE ("Required resource unavailable:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_RESOURCE. */ #define CPA_STATUS_STR_INVALID_PARAM ("Invalid parameter supplied:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_INVALID_PARAM. */ #define CPA_STATUS_STR_FATAL ("Fatal error has occurred:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_FATAL. */ #define CPA_STATUS_STR_UNSUPPORTED ("Operation not supported:") /**< * @ingroup cpa_BaseDataTypes * Status string for @ref CPA_STATUS_UNSUPPORTED. */ /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance Types * * @deprecated * As of v1.3 of the Crypto API, this enum has been deprecated, * replaced by @ref CpaAccelerationServiceType. * * @description * Enumeration of the different instance types. * *****************************************************************************/ typedef enum _CpaInstanceType { CPA_INSTANCE_TYPE_CRYPTO = 0, /**< Cryptographic instance type */ CPA_INSTANCE_TYPE_DATA_COMPRESSION, /**< Data compression instance type */ CPA_INSTANCE_TYPE_RAID, /**< RAID instance type */ CPA_INSTANCE_TYPE_XML, /**< XML instance type */ CPA_INSTANCE_TYPE_REGEX /**< Regular Expression instance type */ } CpaInstanceType CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Service Type * @description * Enumeration of the different service types. * *****************************************************************************/ typedef enum _CpaAccelerationServiceType { CPA_ACC_SVC_TYPE_CRYPTO = CPA_INSTANCE_TYPE_CRYPTO, /**< Cryptography */ CPA_ACC_SVC_TYPE_DATA_COMPRESSION = CPA_INSTANCE_TYPE_DATA_COMPRESSION, /**< Data Compression */ CPA_ACC_SVC_TYPE_PATTERN_MATCH = CPA_INSTANCE_TYPE_REGEX, /**< Pattern Match */ CPA_ACC_SVC_TYPE_RAID = CPA_INSTANCE_TYPE_RAID, /**< RAID */ CPA_ACC_SVC_TYPE_XML = CPA_INSTANCE_TYPE_XML, /**< XML */ - CPA_ACC_SVC_TYPE_VIDEO_ANALYTICS + CPA_ACC_SVC_TYPE_VIDEO_ANALYTICS, /**< Video Analytics */ + CPA_ACC_SVC_TYPE_CRYPTO_ASYM, + /**< Cryptography - Asymmetric service */ + CPA_ACC_SVC_TYPE_CRYPTO_SYM + /**< Cryptography - Symmetric service */ } CpaAccelerationServiceType; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance State * * @deprecated * As of v1.3 of the Crypto API, this enum has been deprecated, * replaced by @ref CpaOperationalState. * * @description * Enumeration of the different instance states that are possible. * *****************************************************************************/ typedef enum _CpaInstanceState { CPA_INSTANCE_STATE_INITIALISED = 0, /**< Instance is in the initialized state and ready for use. */ CPA_INSTANCE_STATE_SHUTDOWN /**< Instance is in the shutdown state and not available for use. */ } CpaInstanceState CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance operational state * @description * Enumeration of the different operational states that are possible. * *****************************************************************************/ typedef enum _CpaOperationalState { CPA_OPER_STATE_DOWN= 0, /**< Instance is not available for use. May not yet be initialized, * or stopped. */ CPA_OPER_STATE_UP /**< Instance is available for use. Has been initialized and started. */ } CpaOperationalState; #define CPA_INSTANCE_MAX_NAME_SIZE_IN_BYTES 64 /**< * @ingroup cpa_BaseDataTypes * Maximum instance info name string length in bytes */ #define CPA_INSTANCE_MAX_ID_SIZE_IN_BYTES 128 /**< * @ingroup cpa_BaseDataTypes * Maximum instance info id string length in bytes */ #define CPA_INSTANCE_MAX_VERSION_SIZE_IN_BYTES 64 /**< * @ingroup cpa_BaseDataTypes * Maximum instance info version string length in bytes */ /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance Info Structure * * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by CpaInstanceInfo2. * * @description * Structure that contains the information to describe the instance. * *****************************************************************************/ typedef struct _CpaInstanceInfo { enum _CpaInstanceType type; /**< Type definition for this instance. */ enum _CpaInstanceState state; /**< Operational state of the instance. */ Cpa8U name[CPA_INSTANCE_MAX_NAME_SIZE_IN_BYTES]; /**< Simple text string identifier for the instance. */ Cpa8U version[CPA_INSTANCE_MAX_VERSION_SIZE_IN_BYTES]; /**< Version string. There may be multiple versions of the same type of * instance accessible through a particular library. */ } CpaInstanceInfo CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Physical Instance ID * @description * Identifies the physical instance of an accelerator execution * engine. * * Accelerators grouped into "packages". Each accelerator can in * turn contain one or more execution engines. Implementations of * this API will define the packageId, acceleratorId, * executionEngineId and busAddress as appropriate for the * implementation. For example, for hardware-based accelerators, * the packageId might identify the chip, which might contain * multiple accelerators, each of which might contain multiple * execution engines. The combination of packageId, acceleratorId * and executionEngineId uniquely identifies the instance. * * Hardware based accelerators implementing this API may also provide * information on the location of the accelerator in the busAddress * field. This field will be defined as appropriate for the * implementation. For example, for PCIe attached accelerators, * the busAddress may contain the PCIe bus, device and function * number of the accelerators. * *****************************************************************************/ typedef struct _CpaPhysicalInstanceId { Cpa16U packageId; /**< Identifies the package within which the accelerator is * contained. */ Cpa16U acceleratorId; /**< Identifies the specific accelerator within the package. */ Cpa16U executionEngineId; /**< Identifies the specific execution engine within the * accelerator. */ Cpa16U busAddress; /**< Identifies the bus address associated with the accelerator * execution engine. */ Cpa32U kptAcHandle; /**< Identifies the achandle of the accelerator. */ } CpaPhysicalInstanceId; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance Info Structure, version 2 * @description * Structure that contains the information to describe the instance. * *****************************************************************************/ typedef struct _CpaInstanceInfo2 { CpaAccelerationServiceType accelerationServiceType; /**< Type of service provided by this instance. */ #define CPA_INST_VENDOR_NAME_SIZE CPA_INSTANCE_MAX_NAME_SIZE_IN_BYTES /**< Maximum length of the vendor name. */ Cpa8U vendorName[CPA_INST_VENDOR_NAME_SIZE]; /**< String identifying the vendor of the accelerator. */ #define CPA_INST_PART_NAME_SIZE CPA_INSTANCE_MAX_NAME_SIZE_IN_BYTES /**< Maximum length of the part name. */ Cpa8U partName[CPA_INST_PART_NAME_SIZE]; /**< String identifying the part (name and/or number). */ #define CPA_INST_SW_VERSION_SIZE CPA_INSTANCE_MAX_VERSION_SIZE_IN_BYTES /**< Maximum length of the software version string. */ Cpa8U swVersion[CPA_INST_SW_VERSION_SIZE]; /**< String identifying the version of the software associated with * the instance. For hardware-based implementations of the API, * this should be the driver version. For software-based * implementations of the API, this should be the version of the * library. * * Note that this should NOT be used to store the version of the * API, nor should it be used to report the hardware revision * (which can be captured as part of the @ref partName, if required). */ #define CPA_INST_NAME_SIZE CPA_INSTANCE_MAX_NAME_SIZE_IN_BYTES /**< Maximum length of the instance name. */ Cpa8U instName[CPA_INST_NAME_SIZE]; /**< String identifying the name of the instance. */ #define CPA_INST_ID_SIZE CPA_INSTANCE_MAX_ID_SIZE_IN_BYTES Cpa8U instID[CPA_INST_ID_SIZE]; /**< String containing a unique identifier for the instance */ CpaPhysicalInstanceId physInstId; /**< Identifies the "physical instance" of the accelerator. */ -#define CPA_MAX_CORES 256 +#define CPA_MAX_CORES 4096 /**< Maximum number of cores to support in the coreAffinity bitmap. */ CPA_BITMAP(coreAffinity, CPA_MAX_CORES); /**< A bitmap identifying the core or cores to which the instance * is affinitized in an SMP operating system. * * The term core here is used to mean a "logical" core - for example, * in a dual-processor, quad-core system with hyperthreading (two * threads per core), there would be 16 such cores (2 processors x * 4 cores/processor x 2 threads/core). The numbering of these cores * and the corresponding bit positions is OS-specific. Note that Linux * refers to this as "processor affinity" or "CPU affinity", and refers * to the bitmap as a "cpumask". * * The term "affinity" is used to mean that this is the core on which * the callback function will be invoked when using the asynchronous * mode of the API. In a hardware-based implementation of the API, * this might be the core to which the interrupt is affinitized. * In a software-based implementation, this might be the core to which * the process running the algorithm is affinitized. Where there is * no affinity, the bitmap can be set to all zeroes. * * This bitmap should be manipulated using the macros @ref * CPA_BITMAP_BIT_SET, @ref CPA_BITMAP_BIT_CLEAR and @ref * CPA_BITMAP_BIT_TEST. */ Cpa32U nodeAffinity; /**< Identifies the processor complex, or node, to which the accelerator * is physically connected, to help identify locality in NUMA systems. * * The values taken by this attribute will typically be in the range * 0..n-1, where n is the number of nodes (processor complexes) in the * system. For example, in a dual-processor configuration, n=2. The * precise values and their interpretation are OS-specific. */ CpaOperationalState operState; /**< Operational state of the instance. */ CpaBoolean requiresPhysicallyContiguousMemory; /**< Specifies whether the data pointed to by flat buffers * (CpaFlatBuffer::pData) supplied to this instance must be in * physically contiguous memory. */ CpaBoolean isPolled; /**< Specifies whether the instance must be polled, or is event driven. * For hardware accelerators, the alternative to polling would be * interrupts. */ CpaBoolean isOffloaded; /**< Identifies whether the instance uses hardware offload, or is a * software-only implementation. */ } CpaInstanceInfo2; /** ***************************************************************************** * @ingroup cpa_BaseDataTypes * Instance Events * @description * Enumeration of the different events that will cause the registered * Instance notification callback function to be invoked. * *****************************************************************************/ typedef enum _CpaInstanceEvent { CPA_INSTANCE_EVENT_RESTARTING = 0, /**< Event type that triggers the registered instance notification callback * function when and instance is restarting. The reason why an instance is * restarting is implementation specific. For example a hardware * implementation may send this event if the hardware device is about to * be reset. */ CPA_INSTANCE_EVENT_RESTARTED, /**< Event type that triggers the registered instance notification callback * function when and instance has restarted. The reason why an instance has * restarted is implementation specific. For example a hardware * implementation may send this event after the hardware device has * been reset. */ CPA_INSTANCE_EVENT_FATAL_ERROR /**< Event type that triggers the registered instance notification callback * function when an error has been detected that requires the device * to be reset. * This event will be sent by all instances using the device, both on the * host and guests. */ } CpaInstanceEvent; +/*****************************************************************************/ +/* CPA Instance Management Functions */ +/*****************************************************************************/ +/** + ***************************************************************************** + * @file cpa.h + * @ingroup cpa + * Get the number of Acceleration Service instances that are supported by + * the API implementation. + * + * @description + * This function will get the number of instances that are supported + * for the required Acceleration Service by an implementation of the CPA + * API. This number is then used to determine the size of the array that + * must be passed to @ref cpaGetInstances(). + * + * @context + * This function MUST NOT be called from an interrupt context as it MAY + * sleep. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] accelerationServiceType Acceleration Service required + * @param[out] pNumInstances Pointer to where the number of + * instances will be written. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * None + * @post + * None + * @note + * This function operates in a synchronous manner and no asynchronous + * callback will be generated + * + * @see + * cpaGetInstances + * + *****************************************************************************/ +CpaStatus +cpaGetNumInstances( + const CpaAccelerationServiceType accelerationServiceType, + Cpa16U *pNumInstances); + +/** + ***************************************************************************** + * @file cpa.h + * @ingroup cpa + * Get the handles to the required Acceleration Service instances that are + * supported by the API implementation. + * + * @description + * This function will return handles to the required Acceleration Service + * instances that are supported by an implementation of the CPA API. These + * instance handles can then be used as input parameters with other + * API functions. + * + * This function will populate an array that has been allocated by the + * caller. The size of this array will have been determined by the + * cpaGetNumInstances() function. + * + * @context + * This function MUST NOT be called from an interrupt context as it MAY + * sleep. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] accelerationServiceType Acceleration Service requested + * @param[in] numInstances Size of the array. If the value is + * greater than the number of instances + * supported, then an error (@ref + * CPA_STATUS_INVALID_PARAM) is returned. + * @param[in,out] cpaInstances Pointer to where the instance + * handles will be written. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * None + * @post + * None + * @note + * This function operates in a synchronous manner and no asynchronous + * callback will be generated + * + * @see + * cpaGetNumInstances + * + *****************************************************************************/ +CpaStatus +cpaGetInstances( + const CpaAccelerationServiceType accelerationServiceType, + Cpa16U numInstances, + CpaInstanceHandle *cpaInstances); + #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_H */ diff --git a/sys/dev/qat/qat_api/include/cpa_dev.h b/sys/dev/qat/qat_api/include/cpa_dev.h index 0beae449fccc..2d548e8a9541 100644 --- a/sys/dev/qat/qat_api/include/cpa_dev.h +++ b/sys/dev/qat/qat_api/include/cpa_dev.h @@ -1,144 +1,144 @@ /**************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_dev.h * * @defgroup cpaDev Device API * * @ingroup cpa * * @description * These functions specify the API for device level operation. * * @remarks * * *****************************************************************************/ #ifndef CPA_DEV_H #define CPA_DEV_H #ifdef __cplusplus extern"C" { #endif #ifndef CPA_H #include "cpa.h" #endif /***************************************************************************** * @ingroup cpaDev * Returns device information * * @description * This data structure contains the device information. The device * information are available to both Physical and Virtual Functions. * Depending on the resource partitioning configuration, the services * available may changes. This configuration will impact the size of the * Security Association Database (SADB). Other properties such device SKU * and device ID are also reported. * *****************************************************************************/ typedef struct _CpaDeviceInfo { Cpa32U sku; /**< Identifies the SKU of the device. */ Cpa16U bdf; /**< Identifies the Bus Device Function of the device. * Format is reported as follow: * - bits<2:0> represent the function number. * - bits<7:3> represent the device * - bits<15:8> represent the bus */ Cpa32U deviceId; /**< Returns the device ID. */ Cpa32U numaNode; /**< Return the local NUMA node mapped to the device. */ CpaBoolean isVf; /**< Return whether the device is currently used in a virtual function * or not. */ CpaBoolean dcEnabled; /**< Compression service enabled */ CpaBoolean cySymEnabled; /**< Symetric crypto service enabled */ CpaBoolean cyAsymEnabled; /**< Asymetric crypto service enabled */ CpaBoolean inlineEnabled; /**< Inline service enabled */ Cpa32U deviceMemorySizeAvailable; /**< Return the size of the device memory available. This device memory * section could be used for the intermediate buffers in the * compression service. */ } CpaDeviceInfo; /***************************************************************************** * @ingroup cpaDev * Returns number devices. * * @description * This API returns the number of devices available to the application. * If used on the host, it will return the number of physical devices. * If used on the guest, it will return the number of function mapped * to the virtual machine. * *****************************************************************************/ CpaStatus cpaGetNumDevices (Cpa16U *numDevices); /***************************************************************************** * @ingroup cpaDev * Returns device information for a given device index. * * @description * Returns device information for a given device index. This API must * be used with cpaGetNumDevices(). *****************************************************************************/ CpaStatus cpaGetDeviceInfo (Cpa16U device, CpaDeviceInfo *deviceInfo); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_DEV_H */ diff --git a/sys/dev/qat/qat_api/include/cpa_types.h b/sys/dev/qat/qat_api/include/cpa_types.h index 91781d390f62..00ed3c60fce6 100644 --- a/sys/dev/qat/qat_api/include/cpa_types.h +++ b/sys/dev/qat/qat_api/include/cpa_types.h @@ -1,244 +1,229 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_types.h * * @defgroup cpa_Types CPA Type Definition * * @ingroup cpa * * @description * This is the CPA Type Definitions. * *****************************************************************************/ #ifndef CPA_TYPES_H #define CPA_TYPES_H #ifdef __cplusplus extern "C" { #endif #if defined (__FreeBSD__) && defined (_KERNEL) /* FreeBSD kernel mode */ #include #include #include #else /* Linux, FreeBSD, or Windows user mode */ #include #include #include #endif #if defined (WIN32) || defined (_WIN64) /* nonstandard extension used : zero-sized array in struct/union */ #pragma warning (disable: 4200) #endif typedef uint8_t Cpa8U; /**< * @file cpa_types.h * @ingroup cpa_Types * Unsigned byte base type. */ typedef int8_t Cpa8S; /**< * @file cpa_types.h * @ingroup cpa_Types * Signed byte base type. */ typedef uint16_t Cpa16U; /**< * @file cpa_types.h * @ingroup cpa_Types * Unsigned double-byte base type. */ typedef int16_t Cpa16S; /**< * @file cpa_types.h * @ingroup cpa_Types * Signed double-byte base type. */ typedef uint32_t Cpa32U; /**< * @file cpa_types.h * @ingroup cpa_Types * Unsigned quad-byte base type. */ typedef int32_t Cpa32S; /**< * @file cpa_types.h * @ingroup cpa_Types * Signed quad-byte base type. */ typedef uint64_t Cpa64U; /**< * @file cpa_types.h * @ingroup cpa_Types * Unsigned double-quad-byte base type. */ typedef int64_t Cpa64S; /**< * @file cpa_types.h * @ingroup cpa_Types * Signed double-quad-byte base type. */ /***************************************************************************** * Generic Base Data Type definitions *****************************************************************************/ #ifndef NULL #define NULL (0) /**< * @file cpa_types.h * @ingroup cpa_Types * NULL definition. */ #endif -#ifndef TRUE -#define TRUE (1==1) -/**< - * @file cpa_types.h - * @ingroup cpa_Types - * True value definition. */ -#endif -#ifndef FALSE -#define FALSE (0==1) -/**< - * @file cpa_types.h - * @ingroup cpa_Types - * False value definition. */ -#endif - /** ***************************************************************************** * @ingroup cpa_Types * Boolean type. * * @description * Functions in this API use this type for Boolean variables that take * true or false values. * *****************************************************************************/ typedef enum _CpaBoolean { - CPA_FALSE = FALSE, /**< False value */ - CPA_TRUE = TRUE /**< True value */ + CPA_FALSE = (0==1), /**< False value */ + CPA_TRUE = (1==1) /**< True value */ } CpaBoolean; /** ***************************************************************************** * @ingroup cpa_Types * Declare a bitmap of specified size (in bits). * * @description * This macro is used to declare a bitmap of arbitrary size. * * To test whether a bit in the bitmap is set, use @ref * CPA_BITMAP_BIT_TEST. * * While most uses of bitmaps on the API are read-only, macros are also * provided to set (see @ref CPA_BITMAP_BIT_SET) and clear (see @ref * CPA_BITMAP_BIT_CLEAR) bits in the bitmap. *****************************************************************************/ #define CPA_BITMAP(name, sizeInBits) \ Cpa32U name[((sizeInBits)+31)/32] #define CPA_BITMAP_BIT_TEST(bitmask, bit) \ ((bitmask[(bit)/32]) & (0x1 << ((bit)%32))) /**< * @ingroup cpa_Types * Test a specified bit in the specified bitmap. The bitmap may have been * declared using @ref CPA_BITMAP. Returns a Boolean (true if the bit is * set, false otherwise). */ #define CPA_BITMAP_BIT_SET(bitmask, bit) \ (bitmask[(bit)/32] |= (0x1 << ((bit)%32))) /**< * @file cpa_types.h * @ingroup cpa_Types * Set a specified bit in the specified bitmap. The bitmap may have been * declared using @ref CPA_BITMAP. */ #define CPA_BITMAP_BIT_CLEAR(bitmask, bit) \ (bitmask[(bit)/32] &= ~(0x1 << ((bit)%32))) /**< * @ingroup cpa_Types * Clear a specified bit in the specified bitmap. The bitmap may have been * declared using @ref CPA_BITMAP. */ /** ********************************************************************** * * @ingroup cpa_Types * * @description * Declare a function or type and mark it as deprecated so that * usages get flagged with a warning. * ********************************************************************** */ #if defined(__GNUC__) || defined(__INTEL_COMPILER) || defined(_WIN64) /* * gcc and icc support the __attribute__ ((deprecated)) syntax for marking * functions and other constructs as deprecated. */ /* * Uncomment the deprecated macro if you need to see which structs are deprecated */ #define CPA_DEPRECATED /*#define CPA_DEPRECATED __attribute__ ((deprecated)) */ #else /* * for all other compilers, define deprecated to do nothing * */ /* #define CPA_DEPRECATED_FUNC(func) func; #pragma deprecated(func) */ #pragma message("WARNING: You need to implement the CPA_DEPRECATED macro for this compiler") #define CPA_DEPRECATED #endif #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_TYPES_H */ diff --git a/sys/dev/qat/qat_api/include/dc/cpa_dc.h b/sys/dev/qat/qat_api/include/dc/cpa_dc.h index 52d98a672646..f0ed869d1020 100644 --- a/sys/dev/qat/qat_api/include/dc/cpa_dc.h +++ b/sys/dev/qat/qat_api/include/dc/cpa_dc.h @@ -1,2461 +1,3243 @@ /**************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_dc.h * * @defgroup cpaDc Data Compression API * * @ingroup cpa * * @description * These functions specify the API for Data Compression operations. * + * The Data Compression API has the following: + * 1) Session based API functions + * These functions require a session to be created before performing any + * DC operations. Subsequent DC API functions make use of the returned + * Session Handle within their structures or function prototypes. + * 2) Session-less or No-Session (Ns) based API functions. + * These functions do not require a session to be initialized before + * performing DC operations. They are "one-shot" API function calls + * that submit DC requests directly using the supplied parameters. + * * @remarks * * *****************************************************************************/ #ifndef CPA_DC_H #define CPA_DC_H #ifdef __cplusplus extern"C" { #endif #ifndef CPA_H #include "cpa.h" #endif /** ***************************************************************************** * @ingroup cpaDc * CPA Dc Major Version Number * @description * The CPA_DC API major version number. This number will be incremented * when significant churn to the API has occurred. The combination of the * major and minor number definitions represent the complete version number * for this interface. * *****************************************************************************/ -#define CPA_DC_API_VERSION_NUM_MAJOR (2) +#define CPA_DC_API_VERSION_NUM_MAJOR (3) /** ***************************************************************************** * @ingroup cpaDc * CPA DC Minor Version Number * @description * The CPA_DC API minor version number. This number will be incremented * when minor changes to the API has occurred. The combination of the major * and minor number definitions represent the complete version number for * this interface. * *****************************************************************************/ #define CPA_DC_API_VERSION_NUM_MINOR (2) /** ***************************************************************************** + * @file cpa_dc.h * @ingroup cpaDc - * Compression API session handle type + * CPA DC API version at least + * @description + * The minimal supported CPA_DC API version. Allow to check if the API + * version is equal or above some version to avoid compilation issues + * with an older API version. * + *****************************************************************************/ +#define CPA_DC_API_VERSION_AT_LEAST(major, minor) \ + (CPA_DC_API_VERSION_NUM_MAJOR > major || \ + (CPA_DC_API_VERSION_NUM_MAJOR == major && \ + CPA_DC_API_VERSION_NUM_MINOR >= minor)) + +/** + ***************************************************************************** + * @file cpa_dc.h + * @ingroup cpaDc + * CPA DC API version less than * @description - * Handle used to uniquely identify a Compression API session handle. This - * handle is established upon registration with the API using - * cpaDcInitSession(). + * The maximum supported CPA_DC API version. Allow to check if the API + * version is below some version to avoid compilation issues with a newer + * API version. + * + *****************************************************************************/ +#define CPA_DC_API_VERSION_LESS_THAN(major, minor) \ + (CPA_DC_API_VERSION_NUM_MAJOR < major || \ + (CPA_DC_API_VERSION_NUM_MAJOR == major && \ + CPA_DC_API_VERSION_NUM_MINOR < minor)) + +/** + ***************************************************************************** + * @ingroup cpaDc + * Size of bitmap needed for compression chaining capabilities. * + * @description + * Defines the number of bits in the bitmap to represent supported + * chaining capabilities @ref dcChainCapInfo. Should be set to + * at least one greater than the largest value in the enumerated type + * @ref CpaDcChainOperations, so that the value of the enum constant + * can also be used as the bit position in the bitmap. * + * A larger value was chosen to allow for extensibility without the need + * to change the size of the bitmap (to ease backwards compatibility in + * future versions of the API). * *****************************************************************************/ -typedef void * CpaDcSessionHandle; - +#define CPA_DC_CHAIN_CAP_BITMAP_SIZE (32) /** ***************************************************************************** * @ingroup cpaDc - * Supported file types + * Compression API session handle type * * @description - * This enumerated lists identified file types. Used to select Huffman - * trees. - * File types are associated with Precompiled Huffman Trees. + * Handle used to uniquely identify a Compression API session handle. This + * handle is established upon registration with the API using + * cpaDcInitSession(). + * * - * @deprecated - * As of v1.6 of the Compression API, this enum has been deprecated. * *****************************************************************************/ -typedef enum _CpaDcFileType -{ - CPA_DC_FT_ASCII, - /**< ASCII File Type */ - CPA_DC_FT_CSS, - /**< Cascading Style Sheet File Type */ - CPA_DC_FT_HTML, - /**< HTML or XML (or similar) file type */ - CPA_DC_FT_JAVA, - /**< File Java code or similar */ - CPA_DC_FT_OTHER - /**< Other file types */ -} CpaDcFileType; +typedef void * CpaDcSessionHandle; + + /** ***************************************************************************** * @ingroup cpaDc * Supported flush flags * * @description * This enumerated list identifies the types of flush that can be * specified for stateful and stateless cpaDcCompressData and * cpaDcDecompressData functions. * *****************************************************************************/ typedef enum _CpaDcFlush { CPA_DC_FLUSH_NONE = 0, /**< No flush request. */ CPA_DC_FLUSH_FINAL, /**< Indicates that the input buffer contains all of the data for the compression session allowing any buffered data to be released. For Deflate, BFINAL is set in the compression header.*/ CPA_DC_FLUSH_SYNC, /**< Used for stateful deflate compression to indicate that all pending output is flushed, byte aligned, to the output buffer. The session state is not reset.*/ CPA_DC_FLUSH_FULL /**< Used for deflate compression to indicate that all pending output is flushed to the output buffer and the session state is reset.*/ } CpaDcFlush; /** ***************************************************************************** * @ingroup cpaDc * Supported Huffman Tree types * * @description * This enumeration lists support for Huffman Tree types. * Selecting Static Huffman trees generates compressed blocks with an RFC * 1951 header specifying "compressed with fixed Huffman trees". * * Selecting Full Dynamic Huffman trees generates compressed blocks with * an RFC 1951 header specifying "compressed with dynamic Huffman codes". * The headers are calculated on the data being compressed, requiring two * passes. * * Selecting Precompiled Huffman Trees generates blocks with RFC 1951 * dynamic headers. The headers are pre-calculated and are specified by * the file type. * *****************************************************************************/ typedef enum _CpaDcHuffType { - CPA_DC_HT_STATIC, + CPA_DC_HT_STATIC = 0, /**< Static Huffman Trees */ CPA_DC_HT_PRECOMP, /**< Precompiled Huffman Trees */ CPA_DC_HT_FULL_DYNAMIC /**< Full Dynamic Huffman Trees */ } CpaDcHuffType; /** ***************************************************************************** * @ingroup cpaDc * Supported compression types * * @description * This enumeration lists the supported data compression algorithms. * In combination with CpaDcChecksum it is used to decide on the file * header and footer format. * - * @deprecated - * As of v1.6 of the Compression API, CPA_DC_LZS, CPA_DC_ELZS and - * CPA_DC_LZSS have been deprecated and should not be used. - * *****************************************************************************/ typedef enum _CpaDcCompType { - CPA_DC_LZS, - /**< LZS Compression */ - CPA_DC_ELZS, - /**< Extended LZS Compression */ - CPA_DC_LZSS, - /**< LZSS Compression */ - CPA_DC_DEFLATE + CPA_DC_DEFLATE = 3, /**< Deflate Compression */ + CPA_DC_LZ4, + /**< LZ4 Compression */ + CPA_DC_LZ4S + /**< LZ4S Compression */ } CpaDcCompType; +/** + ***************************************************************************** + * @ingroup cpaDc + * Support for defined algorithm window sizes + * + * @description + * This enumerated list defines the valid window sizes that can be + * used with the supported algorithms + *****************************************************************************/ +typedef enum _CpaDcCompWindowSize +{ + CPA_DC_WINSIZE_4K = 0, + /**< Window size of 4KB */ + CPA_DC_WINSIZE_8K, + /**< Window size of 8KB */ + CPA_DC_WINSIZE_16K, + /**< Window size of 16KB */ + CPA_DC_WINSIZE_32K + /**< Window size of 32KB */ +} CpaDcCompWindowSize; + +/** + ***************************************************************************** + * @ingroup cpaDc + * Min match size in bytes + * @description + * This is the min match size that will be used for the search algorithm. + * It is only configurable for LZ4S. + *****************************************************************************/ +typedef enum _CpaDcCompMinMatch +{ + CPA_DC_MIN_3_BYTE_MATCH = 0, + /**< Min Match of 3 bytes */ + CPA_DC_MIN_4_BYTE_MATCH + /**< Min Match of 4 bytes */ +} CpaDcCompMinMatch; + +/** + ***************************************************************************** + * @ingroup cpaDc + * Maximum LZ4 output block size + * @description + * Maximum LZ4 output block size + *****************************************************************************/ +typedef enum _CpaDcCompLZ4BlockMaxSize +{ + CPA_DC_LZ4_MAX_BLOCK_SIZE_64K = 0, + /**< Maximum block size 64K */ + CPA_DC_LZ4_MAX_BLOCK_SIZE_256K, + /**< Maximum block size 256K */ + CPA_DC_LZ4_MAX_BLOCK_SIZE_1M, + /**< Maximum block size 1M */ + CPA_DC_LZ4_MAX_BLOCK_SIZE_4M, + /**< Maximum block size 4M */ +} CpaDcCompLZ4BlockMaxSize; + /** ***************************************************************************** * @ingroup cpaDc * Supported checksum algorithms * * @description * This enumeration lists the supported checksum algorithms * Used to decide on file header and footer specifics. * *****************************************************************************/ typedef enum _CpaDcChecksum { - CPA_DC_NONE, - /**< No checksums required */ + CPA_DC_NONE = 0, + /**< No checksum required */ CPA_DC_CRC32, - /**< application requires a CRC32 checksum */ - CPA_DC_ADLER32 + /**< Application requires a CRC32 checksum */ + CPA_DC_ADLER32, /**< Application requires Adler-32 checksum */ + CPA_DC_CRC32_ADLER32, + /**< Application requires both CRC32 and Adler-32 checksums */ + CPA_DC_XXHASH32, + /**< Application requires xxHash-32 checksum */ } CpaDcChecksum; /** ***************************************************************************** * @ingroup cpaDc * Supported session directions * * @description * This enumerated list identifies the direction of a session. * A session can be compress, decompress or both. * *****************************************************************************/ typedef enum _CpaDcSessionDir { - CPA_DC_DIR_COMPRESS, + CPA_DC_DIR_COMPRESS = 0, /**< Session will be used for compression */ CPA_DC_DIR_DECOMPRESS, /**< Session will be used for decompression */ CPA_DC_DIR_COMBINED /**< Session will be used for both compression and decompression */ } CpaDcSessionDir; +typedef CpaDcSessionDir CpaDcDir; + /** ***************************************************************************** * @ingroup cpaDc * Supported session state settings * * @description * This enumerated list identifies the stateful setting of a session. * A session can be either stateful or stateless. * * Stateful sessions are limited to have only one in-flight message per * session. This means a compress or decompress request must be complete * before a new request can be started. This applies equally to sessions * that are uni-directional in nature and sessions that are combined * compress and decompress. Completion occurs when the synchronous function * returns, or when the asynchronous callback function has completed. * *****************************************************************************/ typedef enum _CpaDcSessionState { - CPA_DC_STATEFUL, + CPA_DC_STATEFUL = 0, /**< Session will be stateful, implying that state may need to be saved in some situations */ CPA_DC_STATELESS /**< Session will be stateless, implying no state will be stored*/ } CpaDcSessionState; +typedef CpaDcSessionState CpaDcState; + /** ***************************************************************************** * @ingroup cpaDc * Supported compression levels * * @description * This enumerated lists the supported compressed levels. * Lower values will result in less compressibility in less time. * * *****************************************************************************/ typedef enum _CpaDcCompLvl { CPA_DC_L1 = 1, /**< Compression level 1 */ CPA_DC_L2, /**< Compression level 2 */ CPA_DC_L3, /**< Compression level 3 */ CPA_DC_L4, /**< Compression level 4 */ CPA_DC_L5, /**< Compression level 5 */ CPA_DC_L6, /**< Compression level 6 */ CPA_DC_L7, /**< Compression level 7 */ CPA_DC_L8, /**< Compression level 8 */ - CPA_DC_L9 + CPA_DC_L9, /**< Compression level 9 */ + CPA_DC_L10, + /**< Compression level 10 */ + CPA_DC_L11, + /**< Compression level 11 */ + CPA_DC_L12 + /**< Compression level 12 */ } CpaDcCompLvl; /** ***************************************************************************** * @ingroup cpaDc * Supported additional details from accelerator * * @description * This enumeration lists the supported additional details from the * accelerator. These may be useful in determining the best way to * recover from a failure. * * *****************************************************************************/ typedef enum _CpaDcReqStatus { CPA_DC_OK = 0, /**< No error detected by compression slice */ CPA_DC_INVALID_BLOCK_TYPE = -1, /**< Invalid block type (type == 3) */ CPA_DC_BAD_STORED_BLOCK_LEN = -2, /**< Stored block length did not match one's complement */ CPA_DC_TOO_MANY_CODES = -3, /**< Too many length or distance codes */ CPA_DC_INCOMPLETE_CODE_LENS = -4, /**< Code length codes incomplete */ CPA_DC_REPEATED_LENS = -5, /**< Repeated lengths with no first length */ CPA_DC_MORE_REPEAT = -6, /**< Repeat more than specified lengths */ CPA_DC_BAD_LITLEN_CODES = -7, /**< Invalid literal/length code lengths */ CPA_DC_BAD_DIST_CODES = -8, /**< Invalid distance code lengths */ CPA_DC_INVALID_CODE = -9, /**< Invalid literal/length or distance code in fixed or dynamic block */ CPA_DC_INVALID_DIST = -10, /**< Distance is too far back in fixed or dynamic block */ CPA_DC_OVERFLOW = -11, /**< Overflow detected. This is an indication that output buffer has overflowed. * For stateful sessions, this is a warning (the input can be adjusted and * resubmitted). * For stateless sessions this is an error condition */ CPA_DC_SOFTERR = -12, /**< Other non-fatal detected */ CPA_DC_FATALERR = -13, /**< Fatal error detected */ CPA_DC_MAX_RESUBITERR = -14, /**< On an error being detected, the firmware attempted to correct and resubmitted the * request, however, the maximum resubmit value was exceeded */ CPA_DC_INCOMPLETE_FILE_ERR = -15, /**< The input file is incomplete. Note this is an indication that the request was * submitted with a CPA_DC_FLUSH_FINAL, however, a BFINAL bit was not found in the * request */ CPA_DC_WDOG_TIMER_ERR = -16, /**< The request was not completed as a watchdog timer hardware event occurred */ CPA_DC_EP_HARDWARE_ERR = -17, /**< Request was not completed as an end point hardware error occurred (for * example, a parity error) */ CPA_DC_VERIFY_ERROR = -18, /**< Error detected during "compress and verify" operation */ CPA_DC_EMPTY_DYM_BLK = -19, /**< Decompression request contained an empty dynamic stored block * (not supported) */ CPA_DC_CRC_INTEG_ERR = -20, /**< A data integrity CRC error was detected */ + CPA_DC_LZ4_MAX_BLOCK_SIZE_EXCEEDED = -93, + /**< LZ4 max block size exceeded */ + CPA_DC_LZ4_BLOCK_OVERFLOW_ERR = -95, + /**< LZ4 Block Overflow Error */ + CPA_DC_LZ4_TOKEN_IS_ZERO_ERR = -98, + /**< LZ4 Decoded token offset or token length is zero */ + CPA_DC_LZ4_DISTANCE_OUT_OF_RANGE_ERR = -100, + /**< LZ4 Distance out of range for len/distance pair */ } CpaDcReqStatus; /** ***************************************************************************** * @ingroup cpaDc * Supported modes for automatically selecting the best compression type. * * @description * This enumeration lists the supported modes for automatically selecting - * the best Huffman encoding which would lead to the best compression - * results. + * the best encoding which would lead to the best compression results. + * + * When CPA_DC_ASB_ENABLED is used the output will be a format compliant + * block, whether the data is compressed or not. * - * The CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_NO_HDRS value is deprecated - * and should not be used. + * The following values are deprecated and should not be used. They + * will be removed in a future version of this file. + * - CPA_DC_ASB_STATIC_DYNAMIC + * - CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_STORED_HDRS + * - CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_NO_HDRS * *****************************************************************************/ typedef enum _CpaDcAutoSelectBest { CPA_DC_ASB_DISABLED = 0, /**< Auto select best mode is disabled */ CPA_DC_ASB_STATIC_DYNAMIC = 1, /**< Auto select between static and dynamic compression */ CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_STORED_HDRS = 2, /**< Auto select between uncompressed, static and dynamic compression, * using stored block deflate headers if uncompressed is selected */ - CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_NO_HDRS = 3 + CPA_DC_ASB_UNCOMP_STATIC_DYNAMIC_WITH_NO_HDRS = 3, /**< Auto select between uncompressed, static and dynamic compression, * using no deflate headers if uncompressed is selected */ + CPA_DC_ASB_ENABLED = 4, + /**< Auto select best mode is enabled */ } CpaDcAutoSelectBest; /** ***************************************************************************** * @ingroup cpaDc * Supported modes for skipping regions of input or output buffers. * * @description - * This enumeration lists the supported modes for skipping regions of - * input or output buffers. + * This enumeration lists the supported modes for skipping regions of + * input or output buffers. * *****************************************************************************/ typedef enum _CpaDcSkipMode { CPA_DC_SKIP_DISABLED = 0, /**< Skip mode is disabled */ CPA_DC_SKIP_AT_START = 1, /**< Skip region is at the start of the buffer. */ CPA_DC_SKIP_AT_END = 2, /**< Skip region is at the end of the buffer. */ CPA_DC_SKIP_STRIDE = 3 - /**< Skip region occurs at regular intervals within the buffer. + /**< Skip region occurs at regular intervals within the buffer. CpaDcSkipData.strideLength specifies the number of bytes between each skip region. */ } CpaDcSkipMode; /** ***************************************************************************** * @ingroup cpaDc * Service specific return codes * * @description * Compression specific return codes * * *****************************************************************************/ #define CPA_DC_BAD_DATA (-100) /**consumed arg. * -# The implementation communicates the amount of data in the * destination buffer list via pResults->produced arg. * * Source Buffer Setup Rules * -# The buffer list must have the correct number of flat buffers. This * is specified by the numBuffers element of the CpaBufferList. * -# Each flat buffer must have a pointer to contiguous memory that has * been allocated by the calling application. The * number of octets to be compressed or decompressed must be stored * in the dataLenInBytes element of the flat buffer. * -# It is permissible to have one or more flat buffers with a zero length * data store. This function will process all flat buffers until the * destination buffer is full or all source data has been processed. * If a buffer has zero length, then no data will be processed from * that buffer. * * Source Buffer Processing Rules. * -# The buffer list is processed in index order - SrcBuff->pBuffers[0] * will be completely processed before SrcBuff->pBuffers[1] begins to * be processed. * -# The application must drain the destination buffers. * If the source data was not completely consumed, the application * must resubmit the request. * -# On return, the pResults->consumed will indicate the number of bytes * consumed from the input buffers. * * Destination Buffer Setup Rules * -# The destination buffer list must have storage for processed data. * This implies at least one flat buffer must exist in the buffer list. * -# For each flat buffer in the buffer list, the dataLenInBytes element * must be set to the size of the buffer space. * -# It is permissible to have one or more flat buffers with a zero length * data store. * If a buffer has zero length, then no data will be added to * that buffer. * * Destination Buffer Processing Rules. * -# The buffer list is processed in index order - DestBuff->pBuffers[0] * will be completely processed before DestBuff->pBuffers[1] begins to * be processed. * -# On return, the pResults->produced will indicate the number of bytes * written to the output buffers. * -# If processing has not been completed, the application must drain the * destination buffers and resubmit the request. The application must * reset the dataLenInBytes for each flat buffer in the destination * buffer list. * * Checksum rules. * If a checksum is specified in the session setup data, then: * -# For the first request for a particular data segment the checksum * is initialised internally by the implementation. * -# The checksum is maintained by the implementation between calls * until the flushFlag is set to CPA_DC_FLUSH_FINAL indicating the * end of a particular data segment. * -# Intermediate checksum values are returned to the application, * via the CpaDcRqResults structure, in response to each request. * However these checksum values are not guaranteed to the valid * until the call with flushFlag set to CPA_DC_FLUSH_FINAL * completes successfully. * * The application should set flushFlag to * CPA_DC_FLUSH_FINAL to indicate processing a particular data segment * is complete. It should be noted that this function may have to be * called more than once to process data after the flushFlag parameter has * been set to CPA_DC_FLUSH_FINAL if the destination buffer fills. Refer * to buffer processing rules. * * For stateful operations, when the function is invoked with flushFlag * set to CPA_DC_FLUSH_NONE or CPA_DC_FLUSH_SYNC, indicating more data * is yet to come, the function may or may not retain data. When the * function is invoked with flushFlag set to CPA_DC_FLUSH_FULL or * CPA_DC_FLUSH_FINAL, the function will process all buffered data. * * For stateless operations, CPA_DC_FLUSH_FINAL will cause the BFINAL * bit to be set for deflate compression. The initial checksum for the * stateless operation should be set to 0. CPA_DC_FLUSH_NONE and * CPA_DC_FLUSH_SYNC should not be used for stateless operations. * * It is possible to maintain checksum and length information across * cpaDcCompressData() calls with a stateless session without maintaining * the full history state that is maintained by a stateful session. In this * mode of operation, an initial checksum value of 0 is passed into the * first cpaDcCompressData() call with the flush flag set to * CPA_DC_FLUSH_FULL. On subsequent calls to cpaDcCompressData() for this * session, the checksum passed to cpaDcCompressData should be set to the * checksum value produced by the previous call to cpaDcCompressData(). * When the last block of input data is passed to cpaDcCompressData(), the * flush flag should be set to CP_DC_FLUSH_FINAL. This will cause the BFINAL * bit to be set in a deflate stream. It is the responsibility of the calling * application to maintain overall lengths across the stateless requests * and to pass the checksum produced by one request into the next request. * * When an instance supports compressAndVerifyAndRecover, it is enabled by * default when using cpaDcCompressData(). If this feature needs to be * disabled, cpaDcCompressData2() must be used. * * Synchronous or Asynchronous operation of the API is determined by * the value of the callbackFn parameter passed to cpaDcInitSession() * when the sessionHandle was setup. If a non-NULL value was specified * then the supplied callback function will be invoked asynchronously * with the response of this request. * * Response ordering: * For each session, the implementation must maintain the order of * responses. That is, if in asynchronous mode, the order of the callback * functions must match the order of jobs submitted by this function. * In a simple synchronous mode implementation, the practice of submitting * a request and blocking on its completion ensure ordering is preserved. * * This limitation does not apply if the application employs multiple * threads to service a single session. * * If this API is invoked asynchronous, the return code represents * the success or not of asynchronously scheduling the request. * The results of the operation, along with the amount of data consumed * and produced become available when the callback function is invoked. * As such, pResults->consumed and pResults->produced are available * only when the operation is complete. * * The application must not use either the source or destination buffers * until the callback has completed. * * @see * None * *****************************************************************************/ CpaStatus cpaDcCompressData( CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, void *callbackTag ); /** ***************************************************************************** * @ingroup cpaDc * Submit a request to compress a buffer of data. * * @description * This API consumes data from the input buffer and generates compressed * data in the output buffer. This API is very similar to * cpaDcCompressData() except it provides a CpaDcOpData structure for * passing additional input parameters not covered in cpaDcCompressData(). * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Target service instance. * @param[in,out] pSessionHandle Session handle. * @param[in] pSrcBuff Pointer to data buffer for compression. * @param[in] pDestBuff Pointer to buffer space for data after * compression. - * @param[in] pOpData Additional input parameters. + * @param[in,out] pOpData Additional parameters. * @param[in,out] pResults Pointer to results structure * @param[in] callbackTag User supplied value to help correlate * the callback with its associated * request. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_DC_BAD_DATA The input data was not properly formed. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * * @pre * pSessionHandle has been setup using cpaDcInitSession() * @post * pSessionHandle has session related state information * @note * This function passes control to the compression service for processing * * @see * cpaDcCompressData() * *****************************************************************************/ CpaStatus cpaDcCompressData2( CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcOpData *pOpData, CpaDcRqResults *pResults, void *callbackTag ); +/** + ***************************************************************************** + * @ingroup cpaDc + * Submit a request to compress a buffer of data without requiring a + * session to be created. This is a No-Session (Ns) variant of the + * cpaDcCompressData function. + * + * @description + * This API consumes data from the input buffer and generates compressed + * data in the output buffer. Unlike the other compression APIs this + * does not use a previously created session. This is a "one-shot" API + * that requests can be directly submitted to. + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Target service instance. + * @param[in] pSetupData Configuration structure for compression. + * @param[in] pSrcBuff Pointer to data buffer for compression. + * @param[in] pDestBuff Pointer to buffer space for data after + * compression. + * @param[in] pOpData Additional input parameters. + * @param[in,out] pResults Pointer to results structure + * @param[in] callbackFn For synchronous operation this callback + * shall be a null pointer. + * @param[in] callbackTag User supplied value to help correlate + * the callback with its associated + * request. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * None + * @post + * None + * @note + * This function passes control to the compression service for processing + * + * Checksum rules. + * The checksum rules are the same as those for the session based APIs + * (cpaDcCompressData or cpaDcCompressData2) with the following exception. + * -# If the algorithm specified is CPA_DC_LZ4 or CPA_DC_LZ4S the xxHash32 + * checksum will not be maintained across calls to the API. The + * implication is that the xxHash32 value will only be valid for the + * output of a single request, no state will be saved. If an LZ4 frame is + * required, even in recoverable error scenarios such as CPA_DC_OVERFLOW, + * the checksum will not be continued. If that is required the session + * based API must be used. + * + * @see + * None + * + *****************************************************************************/ +CpaStatus +cpaDcNsCompressData( CpaInstanceHandle dcInstance, + CpaDcNsSetupData *pSetupData, + CpaBufferList *pSrcBuff, + CpaBufferList *pDestBuff, + CpaDcOpData *pOpData, + CpaDcRqResults *pResults, + CpaDcCallbackFn callbackFn, + void *callbackTag ); /** ***************************************************************************** * @ingroup cpaDc * Submit a request to decompress a buffer of data. * * @description * This API consumes compressed data from the input buffer and generates * uncompressed data in the output buffer. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Target service instance. * @param[in,out] pSessionHandle Session handle. * @param[in] pSrcBuff Pointer to data buffer for compression. * @param[in] pDestBuff Pointer to buffer space for data * after decompression. * @param[in,out] pResults Pointer to results structure * @param[in] flushFlag When set to CPA_DC_FLUSH_FINAL, indicates * that the input buffer contains all of * the data for the compression session, * allowing the function to release * history data. * @param[in] callbackTag User supplied value to help correlate * the callback with its associated * request. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_DC_BAD_DATA The input data was not properly formed. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * pSessionHandle has been setup using cpaDcInitSession() * @post * pSessionHandle has session related state information * @note * This function passes control to the compression service for * decompression. The function returns the status from the service. * * This function may be called repetitively with input until all of the * input has been provided and all the output has been consumed. * * This function has identical buffer processing rules as * cpaDcCompressData(). * * This function has identical checksum processing rules as * cpaDcCompressData(). * * The application should set flushFlag to * CPA_DC_FLUSH_FINAL to indicate processing a particular compressed * data segment is complete. It should be noted that this function may * have to be called more than once to process data after flushFlag * has been set if the destination buffer fills. Refer to * buffer processing rules in cpaDcCompressData(). * * Synchronous or Asynchronous operation of the API is determined by * the value of the callbackFn parameter passed to cpaDcInitSession() * when the sessionHandle was setup. If a non-NULL value was specified * then the supplied callback function will be invoked asynchronously * with the response of this request, along with the callbackTag * specified in the function. * * The same response ordering constraints identified in the * cpaDcCompressData API apply to this function. * * @see * cpaDcCompressData() * *****************************************************************************/ CpaStatus cpaDcDecompressData( CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, CpaDcFlush flushFlag, void *callbackTag ); /** ***************************************************************************** * @ingroup cpaDc * Submit a request to decompress a buffer of data. * * @description * This API consumes compressed data from the input buffer and generates * uncompressed data in the output buffer. This API is very similar to * cpaDcDecompressData() except it provides a CpaDcOpData structure for * passing additional input parameters not covered in cpaDcDecompressData(). * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Target service instance. * @param[in,out] pSessionHandle Session handle. * @param[in] pSrcBuff Pointer to data buffer for compression. * @param[in] pDestBuff Pointer to buffer space for data * after decompression. * @param[in] pOpData Additional input parameters. * @param[in,out] pResults Pointer to results structure * @param[in] callbackTag User supplied value to help correlate * the callback with its associated * request. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_DC_BAD_DATA The input data was not properly formed. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * * @pre * pSessionHandle has been setup using cpaDcInitSession() * @post * pSessionHandle has session related state information * @note * This function passes control to the compression service for * decompression. The function returns the status from the service. * * @see * cpaDcDecompressData() * cpaDcCompressData2() * cpaDcCompressData() * *****************************************************************************/ CpaStatus cpaDcDecompressData2( CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, CpaBufferList *pSrcBuff, CpaBufferList *pDestBuff, CpaDcOpData *pOpData, CpaDcRqResults *pResults, void *callbackTag ); +/** + ***************************************************************************** + * @ingroup cpaDc + * Submit a request to decompress a buffer of data without requiring a + * session to be created. This is a No-Session (Ns) variant of the + * cpaDcDecompressData function. + * + * @description + * This API consumes data from the input buffer and generates decompressed + * data in the output buffer. Unlike the other decompression APIs this + * does not use a previously created session. This is a "one-shot" API + * that requests can be directly submitted to. + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Target service instance. + * @param[in] pSetupData Configuration structure for decompression.. + * @param[in] pSrcBuff Pointer to data buffer for decompression. + * @param[in] pDestBuff Pointer to buffer space for data + * after decompression. + * @param[in] pOpData Additional input parameters. + * @param[in,out] pResults Pointer to results structure + * @param[in] callbackFn For synchronous operation this callback + * shall be a null pointer. + * @param[in] callbackTag User supplied value to help correlate + * the callback with its associated + * request. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * None + * @post + * None + * @note + * This function passes control to the decompression service. The function + * returns the status from the service. + * + * @see + * cpaDcDecompressData() + * cpaDcCompressData2() + * cpaDcCompressData() + * + *****************************************************************************/ +CpaStatus +cpaDcNsDecompressData( CpaInstanceHandle dcInstance, + CpaDcNsSetupData *pSetupData, + CpaBufferList *pSrcBuff, + CpaBufferList *pDestBuff, + CpaDcOpData *pOpData, + CpaDcRqResults *pResults, + CpaDcCallbackFn callbackFn, + void *callbackTag ); + /** ***************************************************************************** * @ingroup cpaDc * Generate compression header. * * @description - * This API generates the gzip or the zlib header and stores it in the - * output buffer. + * This function generates the gzip header, zlib header or LZ4 frame + * header and stores it in the destination buffer. The type of header + * created is determined using the compression algorithm selected using + * CpaDcSessionSetupData.compType, for the session associated with the + * session handle. * * @context * This function may be call from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * - * @param[in,out] pSessionHandle Session handle. + * @param[in] pSessionHandle Session handle. * @param[in] pDestBuff Pointer to data buffer where the * compression header will go. * @param[out] count Pointer to counter filled in with * header size. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * pSessionHandle has been setup using cpaDcInitSession() * * @note - * This function can output a 10 byte gzip header or 2 byte zlib header to - * the destination buffer. The session properties are used to determine - * the header type. To output a header the session must have been - * initialized with CpaDcCompType CPA_DC_DEFLATE for any other value no - * header is produced. To output a gzip header the session must have been - * initialized with CpaDcChecksum CPA_DC_CRC32. To output a zlib header - * the session must have been initialized with CpaDcChecksum CPA_DC_ADLER32. + * When the deflate compression algorithm is used, this function can output + * a 10 byte gzip header or 2 byte zlib header to the destination buffer. + * The session properties are used to determine the header type. To + * output a Gzip or a Zlib header the session must have been initialized + * with CpaDcCompType CPA_DC_DEFLATE. + * To output a gzip header the session must have been initialized with + * CpaDcChecksum CPA_DC_CRC32. To output a zlib header the session must + * have been initialized with CpaDcChecksum CPA_DC_ADLER32. * For CpaDcChecksum CPA_DC_NONE no header is output. * * If the compression requires a gzip header, then this header requires * at a minimum the following fields, defined in RFC1952: * ID1: 0x1f * ID2: 0x8b * CM: Compression method = 8 for deflate * * The zlib header is defined in RFC1950 and this function must implement * as a minimum: * CM: four bit compression method - 8 is deflate with window size to * 32k * CINFO: four bit window size (see RFC1950 for details), 7 is 32k * window * FLG: defined as: * - Bits 0 - 4: check bits for CM, CINFO and FLG (see RFC1950) * - Bit 5: FDICT 0 = default, 1 is preset dictionary * - Bits 6 - 7: FLEVEL, compression level (see RFC 1950) * - * The counter parameter will be set - * to the number of bytes added to the buffer. The pData will be - * not be changed. - * + * When LZ4 algorithm is used, this function can output a 7 byte frame + * header. This function will set the LZ4 frame header with: + * - Magic number 0x184D2204 + * - The LZ4 max block size defined in the CpaDcSessionSetupData + * - Flag byte as: + * * Version = 1 + * * Block independence = 0 + * * Block checksum = 0 + * * Content size present = 0 + * * Content checksum present = 1 + * * Dictionary ID present = 0 + * - Content size = 0 + * - Dictionary ID = 0 + * - Header checksum = 1 byte representing the second byte of the + * XXH32 of the frame decriptor field. + * + * The counter parameter will be set to the number of bytes added to the + * buffer. The pData will be not be changed. + * + * For any of the compression algorithms used, the application is + * responsible to offset the pData pointer in CpaBufferList by the length + * of the header before calling the CpaDcCompressData() or + * CpaDcCompressData2() functions. * @see * None * *****************************************************************************/ CpaStatus cpaDcGenerateHeader( CpaDcSessionHandle pSessionHandle, CpaFlatBuffer *pDestBuff, Cpa32U *count ); /** ***************************************************************************** * @ingroup cpaDc * Generate compression footer. * * @description - * This API generates the footer for gzip or zlib and stores it in the - * output buffer. + * This function generates the footer for gzip, zlib or LZ4. + * The generated footer is stored it in the destination buffer. + * The type of footer created is determined using the compression + * algorithm selected for the session associated with the session handle. + * * @context * This function may be call from any context. * @assumptions * None * @sideEffects * All session variables are reset * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in,out] pSessionHandle Session handle. * @param[in] pDestBuff Pointer to data buffer where the * compression footer will go. * @param[in,out] pResults Pointer to results structure filled by * CpaDcCompressData. Updated with the * results of this API call * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * pSessionHandle has been setup using cpaDcInitSession() * pResults structure has been filled by CpaDcCompressData(). * * @note * Depending on the session variables, this function can add the - * alder32 footer to the zlib compressed data as defined in RFC1950. If - * required, it can also add the gzip footer, which is the crc32 of the - * uncompressed data and the length of the uncompressed data. This - * section is defined in RFC1952. The session variables used to determine - * the header type are CpaDcCompType and CpaDcChecksum, see cpaDcGenerateHeader - * for more details. + * alder32 footer to the zlib compressed data as defined in RFC1950. + * If required, it can also add the gzip footer, which is the crc32 of the + * uncompressed data and the length of the uncompressed data. + * This section is defined in RFC1952. The session variables used to + * determine the header type are CpaDcCompType and CpaDcChecksum, see + * cpaDcGenerateHeader for more details. + * + * For LZ4 compression, this function adds the LZ4 frame footer + * using XXH32 algorithm of the uncompressed data. The XXH32 checksum is + * added after the end mark. This section is defined in the documentation + * of the LZ4 frame format at: + * https://github.com/lz4/lz4/blob/dev/doc/lz4_Frame_format.md * * An artifact of invoking this function for writing the footer data is * that all opaque session specific data is re-initialized. If the * compression level and file types are consistent, the upper level * application can continue processing compression requests using the * same session handle. * - * The produced element of the pResults structure will be incremented by the - * numbers bytes added to the buffer. The pointer to the buffer - * will not be modified. - * - * This function is not supported for stateless sessions. + * The produced element of the pResults structure will be incremented by + * the numbers bytes added to the buffer. The pointer to the buffer will + * not be modified. It is necessary for the application to ensure that + * there is always sufficient memory in the destination buffer to append + * the footer. In the event that the destination buffer would be too small + * to accept the footer, overflow will not be reported. * * @see * None * *****************************************************************************/ CpaStatus cpaDcGenerateFooter( CpaDcSessionHandle pSessionHandle, - CpaFlatBuffer *pDestBuff, CpaDcRqResults *pResults ); + CpaFlatBuffer *pDestBuff, + CpaDcRqResults *pResults ); + + +/** + ***************************************************************************** + * @ingroup cpaDc + * Generate compression header without requiring a session to be created. + * This is a No-Session (Ns) variant of the cpaDcGenerateHeader function. + * + * @description + * This API generates the required compression format header and stores it + * in the output buffer. + * + * @context + * This function may be called from any context. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * No + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] pSetupData Pointer to Ns Configuration structure. + * @param[in] pDestBuff Pointer to data buffer where the + * compression header will go. + * @param[out] count Pointer to counter filled in with + * header size. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * None + * + * @note + * This function outputs the required compression format header to + * the destination buffer. The CpaDcNsSetupData structure fields are used to + * determine the header type. + * + * To output an LZ4 header the structure must have been initialized with + * with CpaDcCompType CPA_DC_LZ4. + * To output a gzip or zlib header the structure must have been initialized + * with CpaDcCompType CPA_DC_DEFLATE. + * To output a gzip header the structure must have been initialized with + * CpaDcChecksum CPA_DC_CRC32. + * To output a zlib header the structure must have been initialized with + * CpaDcChecksum CPA_DC_ADLER32. + * For CpaDcChecksum CPA_DC_NONE no header is output. + * + * The counter parameter will be set to the number of bytes added to the + * buffer. + * + * @see + * cpaDcGenerateHeader + * + *****************************************************************************/ +CpaStatus +cpaDcNsGenerateHeader( CpaDcNsSetupData *pSetupData, + CpaFlatBuffer *pDestBuff, + Cpa32U *count ); + +/** + ***************************************************************************** + * @ingroup cpaDc + * Generate compression footer without requiring a session to be created. + * This is a No-Session (Ns) variant of the cpaDcGenerateFooter function. + * + * @description + * This API generates the footer for the required format and stores it in + * the destination buffer. + * @context + * This function may be call from any context. + * @assumptions + * None + * @sideEffects + * All session variables are reset + * @blocking + * No + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] pSetupData Pointer to Ns Configuration structure. + * @param[in] totalLength Total accumulated length of input data + * processed. See description for formats + * that make use of this parameter. + * @param[in] pDestBuff Pointer to data buffer where the + * compression footer will go. + * @param[in,out] pResults Pointer to results structure filled by + * CpaDcNsCompressData. Updated with the + * results of this API call + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * pResults structure has been filled by CpaDcNsCompressData(). + * + * @note + * This function outputs the required compression format footer to + * the destination buffer. The CpaDcNsSetupData structure fields are used to + * determine the footer type created. + * + * To output an LZ4 footer the structure must have been initialized with + * with CpaDcCompType CPA_DC_LZ4. + * To output a gzip or zlib footer the structure must have been initialized + * with CpaDcCompType CPA_DC_DEFLATE. + * To output a gzip footer the structure must have been initialized with + * CpaDcChecksum CPA_DC_CRC32 and the totalLength parameter initialized to + * the total accumulated length of data processed. + * To output a zlib footer the structure must have been initialized with + * CpaDcChecksum CPA_DC_ADLER32. + * For CpaDcChecksum CPA_DC_NONE no footer is output. + * + * The produced element of the pResults structure will be incremented by the + * number of bytes added to the buffer. The pointer to the buffer + * will not be modified. + * + * @see + * CpaDcNsSetupData + * cpaDcNsGenerateHeader + * cpaDcGenerateFooter + * + *****************************************************************************/ +CpaStatus +cpaDcNsGenerateFooter( CpaDcNsSetupData *pSetupData, + Cpa64U totalLength, + CpaFlatBuffer *pDestBuff, + CpaDcRqResults *pResults ); /** ***************************************************************************** * @ingroup cpaDc * Retrieve statistics * * @description * This API retrieves the current statistics for a compression instance. * * @context * This function may be call from any context. * @assumptions * None * @sideEffects * None * @blocking * Yes * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Instance handle. * @param[out] pStatistics Pointer to statistics structure. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * * @see * None * *****************************************************************************/ CpaStatus cpaDcGetStats( CpaInstanceHandle dcInstance, CpaDcStats *pStatistics ); /*****************************************************************************/ /* Instance Discovery Functions */ /** ***************************************************************************** * @ingroup cpaDc * Get the number of device instances that are supported by the API * implementation. * * @description * * This function will get the number of device instances that are supported * by an implementation of the compression API. This number is then used to * determine the size of the array that must be passed to * cpaDcGetInstances(). * * @context * This function MUST NOT be called from an interrupt context as it MAY * sleep. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[out] pNumInstances Pointer to where the number of * instances will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated * * @see * cpaDcGetInstances * *****************************************************************************/ CpaStatus cpaDcGetNumInstances(Cpa16U* pNumInstances); /** ***************************************************************************** * @ingroup cpaDc * Get the handles to the device instances that are supported by the * API implementation. * * @description * * This function will return handles to the device instances that are * supported by an implementation of the compression API. These instance * handles can then be used as input parameters with other compression API * functions. * * This function will populate an array that has been allocated by the * caller. The size of this API is determined by the * cpaDcGetNumInstances() function. * * @context * This function MUST NOT be called from an interrupt context as it MAY * sleep. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] numInstances Size of the array. * @param[out] dcInstances Pointer to where the instance * handles will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated * * @see * cpaDcGetInstances * *****************************************************************************/ CpaStatus cpaDcGetInstances(Cpa16U numInstances, CpaInstanceHandle* dcInstances); /** ***************************************************************************** * @ingroup cpaDc * Compression Component utility function to determine the number of * intermediate buffers required by an implementation. * * @description * This function will determine the number of intermediate buffer lists * required by an implementation for a compression instance. These buffers * should then be allocated and provided when calling @ref cpaDcStartInstance() * to start a compression instance that will use dynamic compression. * * @context * This function may sleep, and MUST NOT be called in interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * @param[in,out] instanceHandle Handle to an instance of this API to be * initialized. * @param[out] pNumBuffers When the function returns, this will * specify the number of buffer lists that * should be used as intermediate buffers * when calling cpaDcStartInstance(). * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Suggested course of action * is to shutdown and restart. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * cpaDcStartInstance() * *****************************************************************************/ CpaStatus cpaDcGetNumIntermediateBuffers(CpaInstanceHandle instanceHandle, Cpa16U *pNumBuffers); /** ***************************************************************************** * @ingroup cpaDc * Compression Component Initialization and Start function. * * @description * This function will initialize and start the compression component. * It MUST be called before any other compress function is called. This * function SHOULD be called only once (either for the very first time, * or after an cpaDcStopInstance call which succeeded) per instance. * Subsequent calls will have no effect. * * If required by an implementation, this function can be provided with * instance specific intermediate buffers. The intent is to provide an * instance specific location to store intermediate results during dynamic * instance Huffman tree compression requests. The memory should be * accessible by the compression engine. The buffers are to support * deflate compression with dynamic Huffman Trees. Each buffer list * should be similar in size to twice the destination buffer size passed * to the compress API. The number of intermediate buffer lists may vary * between implementations and so @ref cpaDcGetNumIntermediateBuffers() * should be called first to determine the number of intermediate * buffers required by the implementation. * * If not required, this parameter can be passed in as NULL. * * @context * This function may sleep, and MUST NOT be called in interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * @param[in,out] instanceHandle Handle to an instance of this API to be * initialized. * @param[in] numBuffers Number of buffer lists represented by * the pIntermediateBuffers parameter. * Note: @ref cpaDcGetNumIntermediateBuffers() * can be used to determine the number of * intermediate buffers that an implementation * requires. * @param[in] pIntermediateBuffers Optional pointer to Instance specific * DRAM buffer. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Suggested course of action * is to shutdown and restart. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * cpaDcStopInstance() * cpaDcGetNumIntermediateBuffers() * *****************************************************************************/ CpaStatus cpaDcStartInstance(CpaInstanceHandle instanceHandle, Cpa16U numBuffers, CpaBufferList **pIntermediateBuffers); /** ***************************************************************************** * @ingroup cpaDc * Compress Component Stop function. * * @description * This function will stop the Compression component and free * all system resources associated with it. The client MUST ensure that * all outstanding operations have completed before calling this function. * The recommended approach to ensure this is to deregister all session or * callback handles before calling this function. If outstanding * operations still exist when this function is invoked, the callback * function for each of those operations will NOT be invoked and the * shutdown will continue. If the component is to be restarted, then a * call to cpaDcStartInstance is required. * * @context * This function may sleep, and so MUST NOT be called in interrupt * context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * @param[in] instanceHandle Handle to an instance of this API to be * shutdown. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Suggested course of action * is to ensure requests are not still being * submitted and that all sessions are * deregistered. If this does not help, then * forcefully remove the component from the * system. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaDcStartInstance * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * cpaDcStartInstance() * *****************************************************************************/ CpaStatus cpaDcStopInstance(CpaInstanceHandle instanceHandle); /** ***************************************************************************** * @ingroup cpaDc * Function to get information on a particular instance. * * @description * This function will provide instance specific information through a * @ref CpaInstanceInfo2 structure. * * @context * This function will be executed in a context that requires that sleeping * MUST NOT be permitted. * @assumptions * None * @sideEffects * None * @blocking * Yes * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API to be * initialized. * @param[out] pInstanceInfo2 Pointer to the memory location allocated by * the client into which the CpaInstanceInfo2 * structure will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The client has retrieved an instanceHandle from successive calls to * @ref cpaDcGetNumInstances and @ref cpaDcGetInstances. * @post * None * @note * None * @see * cpaDcGetNumInstances, * cpaDcGetInstances, * CpaInstanceInfo2 * *****************************************************************************/ CpaStatus cpaDcInstanceGetInfo2(const CpaInstanceHandle instanceHandle, CpaInstanceInfo2 * pInstanceInfo2); /*****************************************************************************/ /* Instance Notification Functions */ /*****************************************************************************/ /** ***************************************************************************** * @ingroup cpaDc * Callback function for instance notification support. * * @description * This is the prototype for the instance notification callback function. * The callback function is passed in as a parameter to the * @ref cpaDcInstanceSetNotificationCb function. * * @context * This function will be executed in a context that requires that sleeping * MUST NOT be permitted. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCallbackTag Opaque value provided by user while making * individual function calls. * @param[in] instanceEvent The event that will trigger this function to * get invoked. * * @retval * None * @pre * Component has been initialized and the notification function has been * set via the cpaDcInstanceSetNotificationCb function. * @post * None * @note * None * @see * cpaDcInstanceSetNotificationCb(), * *****************************************************************************/ typedef void (*CpaDcInstanceNotificationCbFunc)( const CpaInstanceHandle instanceHandle, void * pCallbackTag, const CpaInstanceEvent instanceEvent); /** ***************************************************************************** * @ingroup cpaDc * Subscribe for instance notifications. * * @description * Clients of the CpaDc interface can subscribe for instance notifications * by registering a @ref CpaDcInstanceNotificationCbFunc function. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pInstanceNotificationCb Instance notification callback * function pointer. * @param[in] pCallbackTag Opaque value provided by user while * making individual function calls. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Instance has been initialized. * @post * None * @note * None * @see * CpaDcInstanceNotificationCbFunc * *****************************************************************************/ CpaStatus cpaDcInstanceSetNotificationCb( const CpaInstanceHandle instanceHandle, const CpaDcInstanceNotificationCbFunc pInstanceNotificationCb, void *pCallbackTag); /** ***************************************************************************** * @ingroup cpaDc * Get the size of the memory required to hold the session information. * * @description * * The client of the Data Compression API is responsible for * allocating sufficient memory to hold session information and the context * data. This function provides a means for determining the size of the * session information and the size of the context data. * * @context * No restrictions * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Instance handle. * @param[in] pSessionData Pointer to a user instantiated structure * containing session data. * @param[out] pSessionSize On return, this parameter will be the size * of the memory that will be * required by cpaDcInitSession() for session * data. * @param[out] pContextSize On return, this parameter will be the size * of the memory that will be required * for context data. Context data is * save/restore data including history and * any implementation specific data that is * required for a save/restore operation. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * Only a synchronous version of this function is provided. * * It is expected that context data is comprised of the history and * any data stores that are specific to the history such as linked * lists or hash tables. * For stateless sessions the context size returned from this function * will be zero. For stateful sessions the context size returned will - * depend on the session setup data. + * depend on the session setup data and may be zero. * * Session data is expected to include interim checksum values, various * counters and other session related data that needs to persist * between invocations. * For a given implementation of this API, it is safe to assume that * cpaDcGetSessionSize() will always return the same session size and * that the size will not be different for different setup data * parameters. However, it should be noted that the size may change: * (1) between different implementations of the API (e.g. between software * and hardware implementations or between different hardware * implementations) * (2) between different releases of the same API implementation. * * @see * cpaDcInitSession() * *****************************************************************************/ CpaStatus cpaDcGetSessionSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData* pSessionData, Cpa32U* pSessionSize, Cpa32U* pContextSize ); /** ***************************************************************************** * @ingroup cpaDc * Function to return the size of the memory which must be allocated for * the pPrivateMetaData member of CpaBufferList. * * @description * This function is used to obtain the size (in bytes) required to allocate * a buffer descriptor for the pPrivateMetaData member in the * CpaBufferList structure. * Should the function return zero then no meta data is required for the * buffer list. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[in] numBuffers The number of pointers in the CpaBufferList. * This is the maximum number of CpaFlatBuffers * which may be contained in this CpaBufferList. * @param[out] pSizeInBytes Pointer to the size in bytes of memory to be * allocated when the client wishes to allocate * a cpaFlatBuffer. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * None * @see * cpaDcGetInstances() * *****************************************************************************/ CpaStatus cpaDcBufferListGetMetaSize(const CpaInstanceHandle instanceHandle, Cpa32U numBuffers, Cpa32U *pSizeInBytes); /** ***************************************************************************** * @ingroup cpaDc * Function to return a string indicating the specific error that occurred * within the system. * * @description * When a function returns any error including CPA_STATUS_SUCCESS, the * client can invoke this function to get a string which describes the * general error condition, and if available additional information on * the specific error. * The Client MUST allocate CPA_STATUS_MAX_STR_LENGTH_IN_BYTES bytes for the buffer * string. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Handle to an instance of this API. * @param[in] errStatus The error condition that occurred. * @param[in,out] pStatusText Pointer to the string buffer that will * be updated with the status text. The invoking * application MUST allocate this buffer to be * exactly CPA_STATUS_MAX_STR_LENGTH_IN_BYTES. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Note, in this scenario * it is INVALID to call this function a * second time. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * None * @see * CpaStatus * *****************************************************************************/ CpaStatus cpaDcGetStatusText(const CpaInstanceHandle dcInstance, const CpaStatus errStatus, Cpa8S * pStatusText); /** ***************************************************************************** * @ingroup cpaDc * Set Address Translation function * * @description * This function is used to set the virtual to physical address * translation routine for the instance. The specified routine * is used by the instance to perform any required translation of * a virtual address to a physical address. If the application * does not invoke this function, then the instance will use its * default method, such as virt2phys, for address translation. * * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Data Compression API instance handle. * @param[in] virtual2Physical Routine that performs virtual to * physical address translation. * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @see * None * *****************************************************************************/ CpaStatus cpaDcSetAddressTranslation(const CpaInstanceHandle instanceHandle, CpaVirtualToPhysical virtual2Physical); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_DC_H */ diff --git a/sys/dev/qat/qat_api/include/dc/cpa_dc_bp.h b/sys/dev/qat/qat_api/include/dc/cpa_dc_bp.h index c3ab9e2d5e30..c9eef94e0a60 100644 --- a/sys/dev/qat/qat_api/include/dc/cpa_dc_bp.h +++ b/sys/dev/qat/qat_api/include/dc/cpa_dc_bp.h @@ -1,320 +1,320 @@ /**************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_dc_bp.h * * @defgroup cpaDcBp Data Compression Batch and Pack API * * @ingroup cpaDc * * @description * These functions specify the API for Data Compression operations related * to the 'Batch and Pack' mode of operation. * * @remarks * * *****************************************************************************/ #ifndef CPA_DC_BP_H #define CPA_DC_BP_H #ifdef __cplusplus extern"C" { #endif #include "cpa_dc.h" /** ***************************************************************************** * @ingroup cpaDcBp * Batch request input parameters. * @description * This structure contains the request information for use with batched * compression operations. * * ****************************************************************************/ typedef struct _CpaDcBatchOpData { CpaDcOpData opData; /**< Compression input parameters */ CpaBufferList *pSrcBuff; /**< Input buffer list containing the data to be compressed. */ CpaBoolean resetSessionState; /**< Reset the session state at the beginning of this request within * the batch. Only applies to stateful sessions. When this flag is * set, the history from previous requests in this session will not be * used when compressing the input data for this request in the batch. * */ } CpaDcBatchOpData ; /** ***************************************************************************** * @ingroup cpaDcBp * Submit a batch of requests to compress a batch of input buffers into * a common output buffer. The same output buffer is used for each request * in the batch. This is termed 'batch and pack'. * * @description * This API consumes data from the input buffer and generates compressed * data in the output buffer. * This API compresses a batch of input buffers and concatenates the * compressed data into the output buffer. A results structure is also * generated for each request in the batch. * * @context * When called as an asynchronous funnction it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] dcInstance Target service instance. * @param[in,out] pSessionHandle Session handle. * @param[in] numRequests Number of requests in the batch. * @param[in] pBatchOpData Pointer to an array of CpaDcBatchOpData * structures which contain the input buffers * and parameters for each request in the * batch. There should be numRequests entries * in the array. * @param[in] pDestBuff Pointer to buffer space for data after * compression. * @param[in,out] pResults Pointer to an array of results structures. * There should be numRequests entries in the * array. * @param[in] callbackTag User supplied value to help correlate * the callback with its associated * request. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_DC_BAD_DATA The input data was not properly formed. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * * @pre * pSessionHandle has been setup using cpaDcInitSession() * Session must be setup as a stateless sesssion. * @note * This function passes control to the compression service for processing * * In synchronous mode the function returns the error status returned from the * service. In asynchronous mode the status is returned by the callback * function. * * This function may be called repetitively with input until all of the input * has been consumed by the compression service and all the output has been * produced. * * When this function returns, it may be that all of the available buffers in * the input list has not been compressed. This situation will occur when * there is insufficient space in the output buffer. The calling application * should note the amount of buffers processed, and then submit the request * again, with a new output buffer and with the input buffer list containing * the buffers that were not previously compressed. * * Relationship between input buffers and results buffers. * -# Implementations of this API must not modify the individual * flat buffers of the input buffer list. * -# The implementation communicates the number of buffers * consumed from the source buffer list via pResults->consumed arg. * -# The implementation communicates the amount of data in the * destination buffer list via pResults->produced arg. * * Source Buffer Setup Rules * -# The buffer list must have the correct number of flat buffers. This * is specified by the numBuffers element of the CpaBufferList. * -# Each flat buffer must have a pointer to contiguous memory that has * been allocated by the calling application. The number of octets to be * compressed or decompressed must be stored in the dataLenInBytes element * of the flat buffer. * -# It is permissible to have one or more flat buffers with a zero length * data store. This function will process all flat buffers until the * destination buffer is full or all source data has been processed. * If a buffer has zero length, then no data will be processed from * that buffer. * * Source Buffer Processing Rules. * -# The buffer list is processed in index order - SrcBuff->pBuffers[0] * will be completely processed before SrcBuff->pBuffers[1] begins to * be processed. * -# The application must drain the destination buffers. * If the source data was not completely consumed, the application * must resubmit the request. * -# On return, the pResults->consumed will indicate the number of buffers * consumed from the input buffer list. * * Destination Buffer Setup Rules * -# The destination buffer list must have storage for processed data and * for the packed header information. * This means that least two flat buffer must exist in the buffer list. * The first buffer entry will be used for the header information. * Subsequent entries will be used for the compressed data. * -# For each flat buffer in the buffer list, the dataLenInBytes element * must be set to the size of the buffer space. * -# It is permissible to have one or more flat buffers with a zero length * data store. * If a buffer has zero length, then no data will be added to * that buffer. * * Destination Buffer Processing Rules. * -# The buffer list is processed in index order. * -# On return, the pResults->produced will indicate the number of bytes * of compressed data written to the output buffers. Note that this * will not include the header information buffer. * -# If processing has not been completed, the application must drain the * destination buffers and resubmit the request. The application must reset * the dataLenInBytes for each flat buffer in the destination buffer list. * * Synchronous or Asynchronous operation of the API is determined by * the value of the callbackFn parameter passed to cpaDcInitSession() * when the sessionHandle was setup. If a non-NULL value was specified * then the supplied callback function will be invoked asynchronously * with the response of this request. * * Response ordering: * For each session, the implementation must maintain the order of * responses. That is, if in asynchronous mode, the order of the callback * functions must match the order of jobs submitted by this function. * In a simple synchronous mode implementation, the practice of submitting * a request and blocking on its completion ensure ordering is preserved. * * This limitation does not apply if the application employs multiple * threads to service a single session. * * If this API is invoked asynchronous, the return code represents * the success or not of asynchronously scheduling the request. * The results of the operation, along with the amount of data consumed * and produced become available when the callback function is invoked. * As such, pResults->consumed and pResults->produced are available * only when the operation is complete. * * The application must not use either the source or destination buffers * until the callback has completed. * * @see * None * *****************************************************************************/ CpaStatus cpaDcBPCompressData( CpaInstanceHandle dcInstance, CpaDcSessionHandle pSessionHandle, const Cpa32U numRequests, CpaDcBatchOpData *pBatchOpData, CpaBufferList *pDestBuff, CpaDcRqResults *pResults, void *callbackTag ); /** ***************************************************************************** * @ingroup cpaDcBp * Function to return the size of the memory which must be allocated for * the pPrivateMetaData member of CpaBufferList contained within * CpaDcBatchOpData. * * @description * This function is used to obtain the size (in bytes) required to allocate * a buffer descriptor for the pPrivateMetaData member in the * CpaBufferList structure when Batch and Pack API are used. * Should the function return zero then no meta data is required for the * buffer list. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[in] numJobs The number of jobs defined in the CpaDcBatchOpData * table. * @param[out] pSizeInBytes Pointer to the size in bytes of memory to be * allocated when the client wishes to allocate * a cpaFlatBuffer and the Batch and Pack OP data. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * * @pre * None * @post * None * @note * None * @see * cpaDcBPCompressData() * *****************************************************************************/ CpaStatus cpaDcBnpBufferListGetMetaSize(const CpaInstanceHandle instanceHandle, Cpa32U numJobs, Cpa32U *pSizeInBytes); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_DC_BP_H */ diff --git a/sys/dev/qat/qat_api/include/dc/cpa_dc_chain.h b/sys/dev/qat/qat_api/include/dc/cpa_dc_chain.h new file mode 100644 index 000000000000..0baab2547f18 --- /dev/null +++ b/sys/dev/qat/qat_api/include/dc/cpa_dc_chain.h @@ -0,0 +1,659 @@ +/**************************************************************************** + * + * BSD LICENSE + * + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + ***************************************************************************/ + +/* + ***************************************************************************** + * Doxygen group definitions + ****************************************************************************/ + +/** + ***************************************************************************** + * @file cpa_dc_chain.h + * + * @defgroup cpaDcChain Data Compression Chaining API + * + * @ingroup cpaDc + * + * @description + * These functions specify the API for Data Compression Chaining operations. + * + * @remarks + * + * + *****************************************************************************/ + +#ifndef CPA_DC_CHAIN_H +#define CPA_DC_CHAIN_H + +#ifdef __cplusplus +extern"C" { +#endif + +#include "cpa_dc.h" +#include "cpa_cy_sym.h" + + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Supported operations for compression chaining + * + * @description + * This enumeration lists the supported operations for compression chaining + * + *****************************************************************************/ +typedef enum _CpaDcChainOperations +{ + CPA_DC_CHAIN_COMPRESS_THEN_HASH, + /**< 2 operations for chaining: + * 1st operation is to perform compression on plain text + * 2nd operation is to perform hash on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for compression setup data + * 2nd entry is for hash setup data*/ + CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT, + /**< 2 operations for chaining: + * 1st operation is to perform compression on plain text + * 2nd operation is to perform encryption on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for compression setup data + * 2nd entry is for encryption setup data*/ + CPA_DC_CHAIN_COMPRESS_THEN_HASH_ENCRYPT, + /**< 2 operations for chaining: + * 1st operation is to perform compression on plain text + * 2nd operation is to perform hash on compressed text and + * encryption on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for compression setup data + * 2nd entry is for hash and encryption setup data*/ + CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT_HASH, + /**< 2 operations for chaining: + * 1st operation is to perform compression on plain text + * 2nd operation is to perform encryption on compressed text and + * hash on compressed & encrypted text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for compression setup data + * 2nd entry is for encryption and hash setup data*/ + CPA_DC_CHAIN_COMPRESS_THEN_AEAD, + /**< 2 operations for chaining: + * 1st operation is to perform compression on plain text + * 2nd operation is to perform AEAD encryption on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for compression setup data + * 2nd entry is for AEAD encryption setup data*/ + CPA_DC_CHAIN_HASH_THEN_COMPRESS, + /**< 2 operations for chaining: + * 1st operation is to perform hash on plain text + * 2nd operation is to perform compression on plain text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for hash setup data + * 2nd entry is for compression setup data*/ + CPA_DC_CHAIN_HASH_VERIFY_THEN_DECOMPRESS, + /**< 2 operations for chaining: + * 1st operation is to perform hash verify on compressed text + * 2nd operation is to perform decompression on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for hash setup data + * 2nd entry is for decompression setup data*/ + CPA_DC_CHAIN_DECRYPT_THEN_DECOMPRESS, + /**< 2 operations for chaining: + * 1st operation is to perform decryption on compressed & encrypted text + * 2nd operation is to perform decompression on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for decryption setup data + * 2nd entry is for decompression setup data*/ + CPA_DC_CHAIN_HASH_VERIFY_DECRYPT_THEN_DECOMPRESS, + /**< 2 operations for chaining: + * 1st operation is to perform hash verify on compressed & encrypted text + * and decryption on compressed & encrypted text + * 2nd operation is to perform decompression on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for hash and decryption setup data + * 2nd entry is for decompression setup data*/ + CPA_DC_CHAIN_DECRYPT_HASH_VERIFY_THEN_DECOMPRESS, + /**< 2 operations for chaining: + * 1st operation is to perform decryption on compressed & encrypted text + * and hash verify on compressed text + * 2nd operation is to perform decompression on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for decryption and hash setup data + * 2nd entry is for decompression setup data*/ + CPA_DC_CHAIN_AEAD_THEN_DECOMPRESS, + /**< 2 operations for chaining: + * 1st operation is to perform AEAD decryption on compressed & encrypted text + * 2nd operation is to perform decompression on compressed text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for AEAD decryption setup data + * 2nd entry is for decompression setup data*/ + CPA_DC_CHAIN_DECOMPRESS_THEN_HASH_VERIFY, + /**< 2 operations for chaining: + * 1st operation is to perform decompression on compressed text + * 2nd operation is to perform hash verify on plain text + **< 2 entries in CpaDcChainSessionSetupData array: + * 1st entry is for decompression setup data + * 2nd entry is for hash setup data*/ + CPA_DC_CHAIN_COMPRESS_THEN_AEAD_THEN_HASH, + /**< 3 operations for chaining: + * 1st operation is to perform compression on plain text + * 2nd operation is to perform AEAD encryption compressed text + * 3rd operation is to perfom hash on compressed & encrypted text + **< 3 entries in CpaDcChainSessionSetupData array: + * 1st entry is for compression setup data + * 2nd entry is for AEAD encryption setup data + * 3rd entry is for hash setup data*/ +} CpaDcChainOperations; + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Supported session types for data compression chaining. + * + * @description + * This enumeration lists the supported session types + * for data compression chaining. + *****************************************************************************/ +typedef enum _CpaDcChainSessionType +{ + CPA_DC_CHAIN_COMPRESS_DECOMPRESS, + /**< Indicate the session is for compression or decompression */ + CPA_DC_CHAIN_SYMMETRIC_CRYPTO, + /**< Indicate the session is for symmetric crypto */ +} CpaDcChainSessionType; + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Chaining Session Setup Data. + * @description + * This structure contains data relating to set up chaining sessions. The + * client needs to complete the information in this structure in order to + * setup chaining sessions. + * + ****************************************************************************/ +typedef struct _CpaDcChainSessionSetupData { + CpaDcChainSessionType sessType; + /**Indicate the type for this session */ + union { + CpaDcSessionSetupData *pDcSetupData; + /**< Pointer to compression session setup data */ + CpaCySymSessionSetupData *pCySetupData; + /**< Pointer to symmectric crypto session setup data */ + }; +} CpaDcChainSessionSetupData; + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Compression chaining request input parameters. + * @description + * This structure contains the request information to use with + * compression chaining operations. + * + ****************************************************************************/ +typedef struct _CpaDcChainOpData { + CpaDcChainSessionType opType; + /**< Indicate the type for this operation */ + union { + CpaDcOpData *pDcOp; + /**< Pointer to compression operation data */ + CpaCySymOpData *pCySymOp; + /**< Pointer to symmectric crypto operation data */ + }; +} CpaDcChainOpData; + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Chaining request results data + * @description + * This structure contains the request results. + * + ****************************************************************************/ +typedef struct _CpaDcChainRqResults { + CpaDcReqStatus dcStatus; + /**< Additional status details from compression accelerator */ + CpaStatus cyStatus; + /**< Additional status details from symmetric crypto accelerator */ + CpaBoolean verifyResult; + /**< This parameter is valid when the verifyDigest option is set in the + * CpaCySymSessionSetupData structure. A value of CPA_TRUE indicates + * that the compare succeeded. A value of CPA_FALSE indicates that the + * compare failed */ + Cpa32U produced; + /**< Octets produced to the output buffer */ + Cpa32U consumed; + /**< Octets consumed from the input buffer */ + Cpa32U crc32; + /**< crc32 checksum produced by chaining operations */ + Cpa32U adler32; + /**< adler32 checksum produced by chaining operations */ +}CpaDcChainRqResults; + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Get the size of the memory required to hold the chaining sessions + * information. + * + * @description + * The client of the Data Compression API is responsible for + * allocating sufficient memory to hold chaining sessions information. + * This function provides a way for determining the size of chaining + * sessions. + * + * @context + * No restrictions + * @assumptions + * None + * @sideEffects + * None + * @blocking + * No + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Instance handle. + * @param[in] operation The operation for chaining + * @param[in] numSessions Number of sessions for the chaining + * @param[in] pSessionData Pointer to an array of + * CpaDcChainSessionSetupData structures. + * There should be numSessions entries in + * the array. + * @param[out] pSessionSize On return, this parameter will be the size + * of the memory that will be required by + * cpaDcChainInitSession() for session data. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * None + * @post + * None + * @note + * Only a synchronous version of this function is provided. + * + * @see + * cpaDcChainInitSession() + * + *****************************************************************************/ +CpaStatus +cpaDcChainGetSessionSize(CpaInstanceHandle dcInstance, + CpaDcChainOperations operation, + Cpa8U numSessions, + CpaDcChainSessionSetupData *pSessionData, + Cpa32U* pSessionSize); + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Initialize data compression chaining session + * + * @description + * This function is used to initialize compression/decompression chaining + * sessions. + * This function returns a unique session handle each time this function + * is invoked. + * If the session has been configured with a callback function, then + * the order of the callbacks are guaranteed to be in the same order the + * compression or decompression requests were submitted for each session, + * so long as a single thread of execution is used for job submission. + * + * @context + * This is a synchronous function and it cannot sleep. It can be executed + * in a context that does not permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * No + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Instance handle derived from discovery + * functions. + * @param[in,out] pSessionHandle Pointer to a session handle. + * @param[in] operation The operations for chaining + * @param[in] numSessions Number of sessions for chaining + * @param[in,out] pSessionData Pointer to an array of + * CpaDcChainSessionSetupData structures. + * There should be numSessions entries in + * the array. + * @param[in] callbackFn For synchronous operation this callback + * shall be a null pointer. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * dcInstance has been started using cpaDcStartInstance. + * @post + * None + * @note + * Only a synchronous version of this function is provided. + * + * pSessionData Setup Rules + * -# Each element in CpaDcChainSessionSetupData structure array provides + * (de)compression or a symmetric crypto session setup data. + * + * -# The supported chaining operations are listed in CpaDcChainOperations. + * This enum indicates the number of operations in a chain and the order + * in which they are performed. + * + * -# The order of entries in pSessionData[] should be consistent with the + * CpaDcChainOperations perform order. + * As an example, for CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT, pSessionData[0] + * holds the compression setup data and pSessionData[1] holds the + * encryption setup data.. + * + * -# The numSessions for each chaining operation are provided in + * the comments of enum CpaDcChainOperations. + * + * -# For a (de)compression session, the corresponding + * pSessionData[]->sessType should be set to + * CPA_DC_CHAIN_COMPRESS_DECOMPRESS and pSessionData[]->pDcSetupData + * should point to a CpaDcSessionSetupData structure. + * + * -# For a symmetric crypto session, the corresponding + * pSessionData[]->sessType should be set to CPA_DC_CHAIN_SYMMETRIC_CRYPTO + * and pSessionData[]->pCySetupData should point to a + * CpaCySymSessionSetupData structure. + * + * -# Combined compression sessions are not supported for chaining. + * + * -# Stateful compression is not supported for chaining. + * + * -# Both CRC32 and Adler32 over the input data are supported for chaining. + * + * @see + * None + * + *****************************************************************************/ +CpaStatus +cpaDcChainInitSession(CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle, + CpaDcChainOperations operation, + Cpa8U numSessions, + CpaDcChainSessionSetupData *pSessionData, + CpaDcCallbackFn callbackFn); + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Reset a compression chaining session. + * + * @description + * This function will reset a previously initialized session handle. + * Reset will fail if outstanding calls still exist for the initialized + * session handle. + * The client needs to retry the reset function at a later time. + * + * @context + * This is a synchronous function that cannot sleep. It can be + * executed in a context that does not permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * No. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Instance handle. + * @param[in,out] pSessionHandle Session handle. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * The component has been initialized via cpaDcStartInstance function. + * The session has been initialized via cpaDcChainInitSession function. + * @post + * None + * @note + * This is a synchronous function and has no completion callback + * associated with it. + * + * @see + * cpaDcChainInitSession() + * + *****************************************************************************/ +CpaStatus +cpaDcChainResetSession(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle); + + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Remove a compression chaining session. + * + * @description + * This function will remove a previously initialized session handle + * and the installed callback handler function. Removal will fail if + * outstanding calls still exist for the initialized session handle. + * The client needs to retry the remove function at a later time. + * The memory for the session handle MUST not be freed until this call + * has completed successfully. + * + * @context + * This is a synchronous function that cannot sleep. It can be executed + * in a context that does not permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * No. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Instance handle. + * @param[in,out] pSessionHandle Session handle. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * The component has been initialized via cpaDcStartInstance function. + * @post + * None + * @note + * This is a synchronous function and has no completion callback + * associated with it. + * + * @see + * cpaDcChainInitSession() + * + *****************************************************************************/ +CpaStatus +cpaDcChainRemoveSession(const CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle); + +/** + ***************************************************************************** + * @ingroup cpaDcChain + * Submit a request to perform chaining operations. + * + * @description + * This function is used to perform chaining operations over data from + * the source buffer. + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] dcInstance Target service instance. + * @param[in,out] pSessionHandle Session handle. + * @param[in] pSrcBuff Pointer to input data buffer. + * @param[out] pDestBuff Pointer to output data buffer. + * @param[in] operation Operation for the chaining request + * @param[in] numOpDatas The entries size CpaDcChainOpData array + * @param[in] pChainOpData Pointer to an array of CpaDcChainOpData + * structures. There should be numOpDatas + * entries in the array. + * @param[in,out] pResults Pointer to CpaDcChainRqResults structure. + * @param[in] callbackTag User supplied value to help correlate + * the callback with its associated request. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_DC_BAD_DATA The input data was not properly formed. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * pSessionHandle has been setup using cpaDcChainInitSession() + * @post + * pSessionHandle has session related state information + * @note + * This function passes control to the compression service for chaining + * processing, the supported chaining operations are described in + * CpaDcChainOperations. + * + * pChainOpData Setup Rules + * -# Each element in CpaDcChainOpData structure array holds either a + * (de)compression or a symmetric crypto operation data. + * + * -# The order of entries in pChainOpData[] must be consistent with the + * order of operations described for the chaining operation in + * CpaDcChainOperations. + * As an example, for CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT, pChainOpData[0] + * must contain the compression operation data and pChainOpData[1] must + * contain the encryption operation data. + * + * -# The numOpDatas for each chaining operation are specified in the + * comments for the operation in CpaDcChainOperations. + * + * -# For a (de)compression operation, the corresponding + * pChainOpData[]->opType should be set to + * CPA_DC_CHAIN_COMPRESS_DECOMPRESS and pChainOpData[]->pDcOp should + * point to a CpaDcOpData structure. + * + * -# For a symmetric crypto operation, the corresponding + * pChainOpData[]->opType should be set to + * CPA_DC_CHAIN_SYMMETRIC_CRYPTO and pChainOpData[]->pCySymOp should + * point to a CpaCySymOpData structure. + * + * -# Stateful compression is not supported for chaining. + * + * -# Partial packet processing is not supported. + * + * This function has identical buffer processing rules as + * cpaDcCompressData(). + * + * This function has identical checksum processing rules as + * cpaDcCompressData(), except: + * -# pResults->crc32 is available to application if + * CpaDcSessionSetupData->checksum is set to CPA_DC_CRC32 + * + * -# pResults->adler32 is available to application if + * CpaDcSessionSetupData->checksum is set to CPA_DC_ADLER32 + * + * -# Both pResults->crc32 and pResults->adler32 are available if + * CpaDcSessionSetupData->checksum is set to CPA_DC_CRC32_ADLER32 + * + * Synchronous or asynchronous operation of the API is determined by + * the value of the callbackFn parameter passed to cpaDcChainInitSession() + * when the sessionHandle was setup. If a non-NULL value was specified + * then the supplied callback function will be invoked asynchronously + * with the response of this request. + * + * This function has identical response ordering rules as + * cpaDcCompressData(). + * + * @see + * cpaDcCompressData + * + *****************************************************************************/ +CpaStatus +cpaDcChainPerformOp(CpaInstanceHandle dcInstance, + CpaDcSessionHandle pSessionHandle, + CpaBufferList *pSrcBuff, + CpaBufferList *pDestBuff, + CpaDcChainOperations operation, + Cpa8U numOpDatas, + CpaDcChainOpData *pChainOpData, + CpaDcChainRqResults *pResults, + void *callbackTag ); + +#ifdef __cplusplus +} /* close the extern "C" { */ +#endif + +#endif /* CPA_DC_CHAIN_H */ diff --git a/sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h b/sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h index 29511db2d102..1a08979bb941 100644 --- a/sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h +++ b/sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h @@ -1,746 +1,819 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_dc_dp.h * * @defgroup cpaDcDp Data Compression Data Plane API * * @ingroup cpaDc * * @description * These data structures and functions specify the Data Plane API * for compression and decompression operations. * * This API is recommended for data plane applications, in which the * cost of offload - that is, the cycles consumed by the driver in * sending requests to the hardware, and processing responses - needs * to be minimized. In particular, use of this API is recommended * if the following constraints are acceptable to your application: * * - Thread safety is not guaranteed. Each software thread should * have access to its own unique instance (CpaInstanceHandle) to * avoid contention. * - Polling is used, rather than interrupts (which are expensive). * Implementations of this API will provide a function (not * defined as part of this API) to read responses from the hardware * response queue and dispatch callback functions, as specified on * this API. * - Buffers and buffer lists are passed using physical addresses, * to avoid virtual to physical address translation costs. * - The ability to enqueue one or more requests without submitting * them to the hardware allows for certain costs to be amortized * across multiple requests. * - Only asynchronous invocation is supported. * - There is no support for partial packets. * - Implementations may provide certain features as optional at * build time, such as atomic counters. * - There is no support for stateful operations. * - The "default" instance (CPA_INSTANCE_HANDLE_SINGLE) is not * supported on this API. The specific handle should be obtained * using the instance discovery functions (@ref cpaDcGetNumInstances, * @ref cpaDcGetInstances). * *****************************************************************************/ #ifndef CPA_DC_DP_H #define CPA_DC_DP_H #ifdef __cplusplus extern "C" { #endif #include "cpa_dc.h" /** ***************************************************************************** * @ingroup cpaDcDp * Operation Data for compression data plane API. * * @description * This structure contains data relating to a request to perform * compression processing on one or more data buffers. * * The physical memory to which this structure points should be * at least 8-byte aligned. * * All reserved fields SHOULD NOT be written or read by the * calling code. * * @see * cpaDcDpEnqueueOp, cpaDcDpEnqueueOpBatch ****************************************************************************/ typedef struct _CpaDcDpOpData { Cpa64U reserved0; /**< Reserved for internal use. Source code should not read or write * this field. */ Cpa32U bufferLenToCompress; /**< The number of bytes from the source buffer to compress. This must be * less than, or more typically equal to, the total size of the source * buffer (or buffer list). */ Cpa32U bufferLenForData; /**< The maximum number of bytes that should be written to the destination * buffer. This must be less than, or more typically equal to, the total * size of the destination buffer (or buffer list). */ Cpa64U reserved1; /**< Reserved for internal use. Source code should not read or write */ Cpa64U reserved2; /**< Reserved for internal use. Source code should not read or write */ Cpa64U reserved3; /**< Reserved for internal use. Source code should not read or write */ CpaDcRqResults results; /**< Results of the operation. Contents are valid upon completion. */ CpaInstanceHandle dcInstance; /**< Instance to which the request is to be enqueued */ CpaDcSessionHandle pSessionHandle; - /**< DC Session associated with the stream of requests */ + /**< DC Session associated with the stream of requests. + * This field is only valid when using the session based API functions. + * This field must be set to NULL if the application wishes to use + * the No-Session (Ns) API. + */ CpaPhysicalAddr srcBuffer; /**< Physical address of the source buffer on which to operate. * This is either the location of the data, of length srcBufferLen; or, * if srcBufferLen has the special value @ref CPA_DP_BUFLIST, then * srcBuffer contains the location where a @ref CpaPhysBufferList is * stored. */ Cpa32U srcBufferLen; /**< If the source buffer is a "flat buffer", then this field * specifies the size of the buffer, in bytes. If the source buffer * is a "buffer list" (of type @ref CpaPhysBufferList), then this field * should be set to the value @ref CPA_DP_BUFLIST. */ CpaPhysicalAddr destBuffer; /**< Physical address of the destination buffer on which to operate. * This is either the location of the data, of length destBufferLen; or, * if destBufferLen has the special value @ref CPA_DP_BUFLIST, then * destBuffer contains the location where a @ref CpaPhysBufferList is * stored. */ Cpa32U destBufferLen; /**< If the destination buffer is a "flat buffer", then this field * specifies the size of the buffer, in bytes. If the destination buffer * is a "buffer list" (of type @ref CpaPhysBufferList), then this field * should be set to the value @ref CPA_DP_BUFLIST. */ CpaDcSessionDir sessDirection; /**pSessionHandle was setup using - * @ref cpaDcDpInitSession. + * @ref cpaDcDpInitSession OR pOpData->pSetupData data structure was + * initialized for No-Session (Ns) usage. * The instance identified by pOpData->dcInstance has had a * callback function registered via @ref cpaDcDpRegCbFunc. * * @post * None * * @note * A callback of type @ref CpaDcDpCallbackFn is generated in * response to this function call. Any errors generated during * processing are reported as part of the callback status code. * * @see * @ref cpaDcDpPerformOpNow *****************************************************************************/ - - CpaStatus cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow); /** ***************************************************************************** * @ingroup cpaDcDp * Enqueue multiple requests to the compression data plane API. * * @description * This function enqueues multiple requests to perform compression or * decompression operations. * * The function is asynchronous; control is returned to the user once * the request has been submitted. On completion of the request, the * application may poll for responses, which will cause a callback * function (registered via @ref cpaDcDpRegCbFunc) to be invoked. * Separate callbacks will be invoked for each request. * Callbacks within a session and at the same priority are guaranteed * to be in the same order in which they were submitted. * * The following restrictions apply to each element of the pOpData * array: * * - The memory MUST be aligned on an 8-byte boundary. * - The reserved fields of the structure MUST be set to zero. * - The structure MUST reside in physically contiguous memory. * * @context * This function will not sleep, and hence can be executed in a context * that does not permit sleeping. * * @assumptions * Client MUST allocate the request parameters to 8 byte alignment. * Reserved elements of the CpaDcDpOpData structure MUST not used * The CpaDcDpOpData structure MUST reside in physically * contiguous memory. * * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] numberRequests The number of requests in the array of * CpaDcDpOpData structures. * @param[in] pOpData An array of pointers to CpaDcDpOpData * structures. Each CpaDcDpOpData * structure contains the request parameters for * that request. The client code allocates the * memory for this structure. This component takes * ownership of the memory until it is returned in * the callback, which was registered on the * instance via @ref cpaDcDpRegCbFunc. * See the above Description for some restrictions * that apply to this parameter. * @param[in] performOpNow Flag to indicate whether the operation should be * performed immediately (CPA_TRUE), or simply * enqueued to be performed later (CPA_FALSE). * In the latter case, the request is submitted * to be performed either by calling this function * again with this flag set to CPA_TRUE, or by * invoking the function @ref * cpaDcDpPerformOpNow. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The session identified by pOpData[i]->pSessionHandle was setup using - * @ref cpaDcDpInitSession. + * @ref cpaDcDpInitSession OR pOpData[i]->pSetupData data structure was + * initialized for No-Session (Ns) usage. * The instance identified by pOpData[i]->dcInstance has had a * callback function registered via @ref cpaDcDpRegCbFunc. * * @post * None * * @note * Multiple callbacks of type @ref CpaDcDpCallbackFn are generated in * response to this function call (one per request). Any errors * generated during processing are reported as part of the callback * status code. * * @see * cpaDcDpEnqueueOp *****************************************************************************/ CpaStatus cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, CpaDcDpOpData *pOpData[], const CpaBoolean performOpNow); /** ***************************************************************************** * @ingroup cpaDcDp * Submit any previously enqueued requests to be performed now on the * compression data plane API. * * @description - * This function triggers processing of previously enqueed requests on the + * This function triggers processing of previously enqueued requests on the * referenced instance. * * * @context * Will not sleep. It can be executed in a context that does not * permit sleeping. * * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] dcInstance Instance to which the requests will be * submitted. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via @ref cpaDcStartInstance function. * A compression session has been previously setup using the * @ref cpaDcDpInitSession function call. * * @post * None * * @see * cpaDcDpEnqueueOp, cpaDcDpEnqueueOpBatch *****************************************************************************/ CpaStatus cpaDcDpPerformOpNow(CpaInstanceHandle dcInstance); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_DC_DP_H */ diff --git a/sys/dev/qat/qat_api/include/icp_sal_versions.h b/sys/dev/qat/qat_api/include/icp_sal_versions.h index 91719587445d..da44c030f4d4 100644 --- a/sys/dev/qat/qat_api/include/icp_sal_versions.h +++ b/sys/dev/qat/qat_api/include/icp_sal_versions.h @@ -1,97 +1,97 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /** *************************************************************************** * @file icp_sal_versions.h * * @defgroup SalVersions * * @ingroup SalVersions * * API and structures definition for obtaining software and hardware versions * ***************************************************************************/ #ifndef _ICP_SAL_VERSIONS_H_ #define _ICP_SAL_VERSIONS_H_ #define ICP_SAL_VERSIONS_FW_VERSION_SIZE 16 /**< Max length of firmware version string */ #define ICP_SAL_VERSIONS_SW_VERSION_SIZE 16 /**< Max length of software version string */ #define ICP_SAL_VERSIONS_MMP_VERSION_SIZE 16 /**< Max length of MMP binary version string */ #define ICP_SAL_VERSIONS_HW_VERSION_SIZE 4 /**< Max length of hardware version string */ /* Part name and number of the accelerator device */ #define SAL_INFO2_DRIVER_SW_VERSION_MAJ_NUMBER 3 -#define SAL_INFO2_DRIVER_SW_VERSION_MIN_NUMBER 12 +#define SAL_INFO2_DRIVER_SW_VERSION_MIN_NUMBER 13 #define SAL_INFO2_DRIVER_SW_VERSION_PATCH_NUMBER 0 /** ******************************************************************************* * @ingroup SalVersions * Structure holding versions information * * @description * This structure stores information about versions of software * and hardware being run on a particular device. *****************************************************************************/ typedef struct icp_sal_dev_version_info_s { Cpa32U devId; /**< Number of acceleration device for which this structure holds * version * information */ Cpa8U firmwareVersion[ICP_SAL_VERSIONS_FW_VERSION_SIZE]; /**< String identifying the version of the firmware associated with * the device. */ Cpa8U mmpVersion[ICP_SAL_VERSIONS_MMP_VERSION_SIZE]; /**< String identifying the version of the MMP binary associated with * the device. */ Cpa8U softwareVersion[ICP_SAL_VERSIONS_SW_VERSION_SIZE]; /**< String identifying the version of the software associated with * the device. */ Cpa8U hardwareVersion[ICP_SAL_VERSIONS_HW_VERSION_SIZE]; /**< String identifying the version of the hardware (stepping and * revision ID) associated with the device. */ } icp_sal_dev_version_info_t; /** ******************************************************************************* * @ingroup SalVersions * Obtains the version information for a given device * @description * This function obtains hardware and software version information * associated with a given device. * * @param[in] accelId ID of the acceleration device for which version * information is to be obtained. * @param[out] pVerInfo Pointer to a structure that will hold version * information * * @context * This function might sleep. It cannot be executed in a context that * does not permit sleeping. * @assumptions * The system has been started * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @return CPA_STATUS_SUCCESS Operation finished successfully * @return CPA_STATUS_INVALID_PARAM Invalid parameter passed to the function * @return CPA_STATUS_RESOURCE System resources problem * @return CPA_STATUS_FAIL Operation failed * *****************************************************************************/ CpaStatus icp_sal_getDevVersionInfo(Cpa32U accelId, icp_sal_dev_version_info_t *pVerInfo); #endif diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_common.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_common.h index aff4c717ac9f..92c262356e95 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_common.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_common.h @@ -1,649 +1,682 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_common.h * * @defgroup cpaCy Cryptographic API * * @ingroup cpa * * @description * These functions specify the Cryptographic API. * *****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_common.h * @defgroup cpaCyCommon Cryptographic Common API * * @ingroup cpaCy * * @description * This file specifies items which are common for both the asymmetric * (public key cryptography) and the symmetric operations for the * Cryptographic API. * *****************************************************************************/ #ifndef CPA_CY_COMMON_H #define CPA_CY_COMMON_H #ifdef __cplusplus extern "C" { #endif #include "cpa.h" /** ***************************************************************************** * @ingroup cpa_cyCommon * CPA CY Major Version Number * @description * The CPA_CY API major version number. This number will be incremented * when significant churn to the API has occurred. The combination of the * major and minor number definitions represent the complete version number * for this interface. * *****************************************************************************/ -#define CPA_CY_API_VERSION_NUM_MAJOR (2) +#define CPA_CY_API_VERSION_NUM_MAJOR (3) /** ***************************************************************************** * @ingroup cpa_cyCommon * CPA CY Minor Version Number * @description * The CPA_CY API minor version number. This number will be incremented * when minor changes to the API has occurred. The combination of the major * and minor number definitions represent the complete version number for * this interface. * *****************************************************************************/ -#define CPA_CY_API_VERSION_NUM_MINOR (3) +#define CPA_CY_API_VERSION_NUM_MINOR (0) /** ***************************************************************************** + * @file cpa_cy_common.h + * @ingroup cpa_cyCommon + * CPA CY API version at least + * @description + * The minimal supported CPA_CY API version. Allow to check if the API + * version is equal or above some version to avoid compilation issues + * with an older API version. + * + *****************************************************************************/ +#define CPA_CY_API_VERSION_AT_LEAST(major, minor) \ + (CPA_CY_API_VERSION_NUM_MAJOR > major || \ + (CPA_CY_API_VERSION_NUM_MAJOR == major && \ + CPA_CY_API_VERSION_NUM_MINOR >= minor)) + +/** + ***************************************************************************** + * @file cpa_cy_common.h + * @ingroup cpa_cyCommon + * CPA CY API version less than + * @description + * The maximum supported CPA_CY API version. Allow to check if the API + * version is below some version to avoid compilation issues with a newer + * API version. + * + *****************************************************************************/ +#define CPA_CY_API_VERSION_LESS_THAN(major, minor) \ + (CPA_CY_API_VERSION_NUM_MAJOR < major || \ + (CPA_CY_API_VERSION_NUM_MAJOR == major && \ + CPA_CY_API_VERSION_NUM_MINOR < minor)) + +/** + ***************************************************************************** + * @file cpa_cy_common.h * @ingroup cpaCyCommon * Request priority * @description * Enumeration of priority of the request to be given to the API. * Currently two levels - HIGH and NORMAL are supported. HIGH priority * requests will be prioritized on a "best-effort" basis over requests * that are marked with a NORMAL priority. * *****************************************************************************/ typedef enum _CpaCyPriority { CPA_CY_PRIORITY_NORMAL = 1, /**< Normal priority */ CPA_CY_PRIORITY_HIGH /**< High priority */ } CpaCyPriority; /*****************************************************************************/ /* Callback Definitions */ /*****************************************************************************/ /** ***************************************************************************** * @ingroup cpaCyCommon * Definition of the crypto generic callback function * * @description * This data structure specifies the prototype for a generic callback * function * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag Opaque value provided by user while making individual * function call. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Opaque Pointer to the operation data that was * submitted in the request * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyKeyGenSsl() * *****************************************************************************/ typedef void (*CpaCyGenericCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData); /** ***************************************************************************** * @ingroup cpaCyCommon * Definition of generic callback function with an additional output * CpaFlatBuffer parameter. * * @description * This data structure specifies the prototype for a generic callback * function which provides an output buffer (of type CpaFlatBuffer). * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag Opaque value provided by user while making individual * function call. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Opaque Pointer to the operation data that was * submitted in the request * @param[in] pOut Pointer to the output buffer provided in the request * invoking this callback. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * None * *****************************************************************************/ typedef void (*CpaCyGenFlatBufCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpdata, CpaFlatBuffer *pOut); /** ***************************************************************************** * @ingroup cpaCyCommon * Function to return the size of the memory which must be allocated for * the pPrivateMetaData member of CpaBufferList. * * @description * This function is used obtain the size (in bytes) required to allocate * a buffer descriptor for the pPrivateMetaData member in the * CpaBufferList the structure. * Should the function return zero then no meta data is required for the * buffer list. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[in] numBuffers The number of pointers in the CpaBufferList. * this is the maximum number of CpaFlatBuffers * which may be contained in this CpaBufferList. * @param[out] pSizeInBytes Pointer to the size in bytes of memory to be * allocated when the client wishes to allocate * a cpaFlatBuffer * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None. * @post * None * @note * None * @see * cpaCyGetInstances() * *****************************************************************************/ CpaStatus cpaCyBufferListGetMetaSize(const CpaInstanceHandle instanceHandle, Cpa32U numBuffers, Cpa32U *pSizeInBytes); /** ***************************************************************************** * @ingroup cpaCyCommon * Function to return a string indicating the specific error that occurred * for a particular instance. * * @description * When a function invocation on a particular instance returns an error, * the client can invoke this function to query the instance for a null * terminated string which describes the general error condition, and if * available additional text on the specific error. * The Client MUST allocate CPA_STATUS_MAX_STR_LENGTH_IN_BYTES bytes for * the buffer string. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[in] errStatus The error condition that occurred * @param[out] pStatusText Pointer to the string buffer that will be * updated with a null terminated status text * string. * The invoking application MUST allocate this * buffer to be CPA_STATUS_MAX_STR_LENGTH_IN_BYTES. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Note, In this scenario it * is INVALID to call this function a further * time. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None. * @post * None * @note * None * @see * CpaStatus * *****************************************************************************/ CpaStatus cpaCyGetStatusText(const CpaInstanceHandle instanceHandle, CpaStatus errStatus, Cpa8S *pStatusText); /*****************************************************************************/ /* Instance Discovery Functions */ /*****************************************************************************/ /** ***************************************************************************** * @ingroup cpaCyCommon * Get the number of instances that are supported by the API * implementation. * * @description * This function will get the number of instances that are supported * by an implementation of the Cryptographic API. This number is then * used to determine the size of the array that must be passed to * @ref cpaCyGetInstances(). * * @context * This function MUST NOT be called from an interrupt context as it MAY * sleep. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[out] pNumInstances Pointer to where the number of * instances will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated * * @see * cpaCyGetInstances * *****************************************************************************/ CpaStatus cpaCyGetNumInstances(Cpa16U *pNumInstances); /** ***************************************************************************** * @ingroup cpaCyCommon * Get the handles to the instances that are supported by the * API implementation. * * @description * This function will return handles to the instances that are * supported by an implementation of the Cryptographic API. These * instance handles can then be used as input parameters with other * Cryptographic API functions. * * This function will populate an array that has been allocated by the * caller. The size of this API will have been determined by the * cpaCyGetNumInstances() function. * * @context * This function MUST NOT be called from an interrupt context as it MAY * sleep. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] numInstances Size of the array. If the value is not * the same as the number of instances * supported, then an error (@ref * CPA_STATUS_INVALID_PARAM) is returned. * @param[in,out] cyInstances Pointer to where the instance * handles will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated * * @see * cpaCyGetNumInstances * *****************************************************************************/ CpaStatus cpaCyGetInstances(Cpa16U numInstances, CpaInstanceHandle *cyInstances); /** ***************************************************************************** * @ingroup cpaCyCommon * Function to get information on a particular instance. * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyInstanceGetInfo2. * * @description * This function will provide instance specific information through a * @ref CpaInstanceInfo structure. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API to be * initialized. * @param[out] pInstanceInfo Pointer to the memory location allocated by * the client into which the CpaInstanceInfo * structure will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The client has retrieved an instanceHandle from successive calls to * @ref cpaCyGetNumInstances and @ref cpaCyGetInstances. * @post * None * @note * None * @see * cpaCyGetNumInstances, * cpaCyGetInstances, * CpaInstanceInfo * *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyInstanceGetInfo(const CpaInstanceHandle instanceHandle, struct _CpaInstanceInfo * pInstanceInfo); /** ***************************************************************************** * @ingroup cpaCyCommon * Function to get information on a particular instance. * * @description * This function will provide instance specific information through a * @ref CpaInstanceInfo2 structure. * Supersedes @ref cpaCyInstanceGetInfo. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API to be * initialized. * @param[out] pInstanceInfo2 Pointer to the memory location allocated by * the client into which the CpaInstanceInfo2 * structure will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The client has retrieved an instanceHandle from successive calls to * @ref cpaCyGetNumInstances and @ref cpaCyGetInstances. * @post * None * @note * None * @see * cpaCyGetNumInstances, * cpaCyGetInstances, * CpaInstanceInfo * *****************************************************************************/ CpaStatus cpaCyInstanceGetInfo2(const CpaInstanceHandle instanceHandle, CpaInstanceInfo2 * pInstanceInfo2); /*****************************************************************************/ /* Instance Notification Functions */ /*****************************************************************************/ /** ***************************************************************************** * @ingroup cpaCyCommon * Callback function for instance notification support. * * @description * This is the prototype for the instance notification callback function. * The callback function is passed in as a parameter to the * @ref cpaCyInstanceSetNotificationCb function. * * @context * This function will be executed in a context that requires that sleeping * MUST NOT be permitted. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCallbackTag Opaque value provided by user while making * individual function calls. * @param[in] instanceEvent The event that will trigger this function to * get invoked. * * @retval * None * @pre * Component has been initialized and the notification function has been * set via the cpaCyInstanceSetNotificationCb function. * @post * None * @note * None * @see * cpaCyInstanceSetNotificationCb(), * *****************************************************************************/ typedef void (*CpaCyInstanceNotificationCbFunc)( const CpaInstanceHandle instanceHandle, void * pCallbackTag, const CpaInstanceEvent instanceEvent); /** ***************************************************************************** * @ingroup cpaCyCommon * Subscribe for instance notifications. * * @description * Clients of the CpaCy interface can subscribe for instance notifications * by registering a @ref CpaCyInstanceNotificationCbFunc function. * * @context * This function may be called from any context. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pInstanceNotificationCb Instance notification callback * function pointer. * @param[in] pCallbackTag Opaque value provided by user while * making individual function calls. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Instance has been initialized. * @post * None * @note * None * @see * CpaCyInstanceNotificationCbFunc * *****************************************************************************/ CpaStatus cpaCyInstanceSetNotificationCb( const CpaInstanceHandle instanceHandle, const CpaCyInstanceNotificationCbFunc pInstanceNotificationCb, void *pCallbackTag); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_COMMON_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_dh.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_dh.h index 0ee61e1f6c8d..57a77b8559f2 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_dh.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_dh.h @@ -1,514 +1,514 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_dh.h * * @defgroup cpaCyDh Diffie-Hellman (DH) API * * @ingroup cpaCy * * @description * These functions specify the API for Public Key Encryption * (Cryptography) operations for use with Diffie-Hellman algorithm. * * @note * Large numbers are represented on the QuickAssist API as described * in the Large Number API (@ref cpaCyLn). *****************************************************************************/ #ifndef CPA_CY_DH_H #define CPA_CY_DH_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyDh * Diffie-Hellman Phase 1 Key Generation Data. * @description * This structure lists the different items that are required in the * cpaCyDhKeyGenPhase1 function. The client MUST allocate the memory for * this structure. When the structure is passed into the function, * ownership of the memory passes to the function. Ownership of the memory * returns to the client when this structure is returned with the * CpaCyDhPhase1KeyGenOpData structure. * * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyDhKeyGenPhase1 function, and * before it has been returned in the callback, undefined behavior will * result. * All values in this structure are required to be in Most Significant Byte * first order, e.g. primeP.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyDhPhase1KeyGenOpData { CpaFlatBuffer primeP; /**< Flat buffer containing a pointer to the random odd prime number (p). * The bit-length of this number may be one of 768, 1024, 1536, 2048, - * 3072 or 4096. + * 3072, 4096 or 8192. */ CpaFlatBuffer baseG; /**< Flat buffer containing a pointer to base (g). This MUST comply with * the following: * 0 < g < p. */ CpaFlatBuffer privateValueX; /**< Flat buffer containing a pointer to the private value (x). This is a * random value which MUST satisfy the following condition: * 0 < PrivateValueX < (PrimeP - 1) * * Refer to PKCS #3: Diffie-Hellman Key-Agreement Standard for details. * The client creating this data MUST ensure the compliance of this value * with the standard. Note: This value is also needed to complete local * phase 2 Diffie-Hellman operation.*/ } CpaCyDhPhase1KeyGenOpData; /** ***************************************************************************** * @ingroup cpaCyDh * Diffie-Hellman Phase 2 Secret Key Generation Data. * @description * This structure lists the different items that required in the * cpaCyDhKeyGenPhase2Secret function. The client MUST allocate the * memory for this structure. When the structure is passed into the * function, ownership of the memory passes to the function. Ownership of * the memory returns to the client when this structure is returned with * the callback. * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyDhKeyGenPhase2Secret * function, and before it has been returned in the callback, undefined * behavior will result. * All values in this structure are required to be in Most Significant Byte * first order, e.g. primeP.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyDhPhase2SecretKeyGenOpData { CpaFlatBuffer primeP; /**< Flat buffer containing a pointer to the random odd prime number (p). * The bit-length of this number may be one of 768, 1024, 1536, 2048, - * 3072 or 4096. + * 3072, 4096 or 8192. * This SHOULD be same prime number as was used in the phase 1 key * generation operation. */ CpaFlatBuffer remoteOctetStringPV; /**< Flat buffer containing a pointer to the remote entity * octet string Public Value (PV). */ CpaFlatBuffer privateValueX; /**< Flat buffer containing a pointer to the private value (x). This * value may have been used in a call to the cpaCyDhKeyGenPhase1 function. * This is a random value which MUST satisfy the following condition: * 0 < privateValueX < (primeP - 1). */ } CpaCyDhPhase2SecretKeyGenOpData; /** ***************************************************************************** * @ingroup cpaCyDh * Diffie-Hellman Statistics. * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by @ref CpaCyDhStats64. * @description * This structure contains statistics on the Diffie-Hellman operations. * Statistics are set to zero when the component is initialized, and are * collected per instance. ****************************************************************************/ typedef struct _CpaCyDhStats { Cpa32U numDhPhase1KeyGenRequests; /**< Total number of successful Diffie-Hellman phase 1 key * generation requests. */ Cpa32U numDhPhase1KeyGenRequestErrors; /**< Total number of Diffie-Hellman phase 1 key generation requests * that had an error and could not be processed. */ Cpa32U numDhPhase1KeyGenCompleted; /**< Total number of Diffie-Hellman phase 1 key generation operations * that completed successfully. */ Cpa32U numDhPhase1KeyGenCompletedErrors; /**< Total number of Diffie-Hellman phase 1 key generation operations * that could not be completed successfully due to errors. */ Cpa32U numDhPhase2KeyGenRequests; /**< Total number of successful Diffie-Hellman phase 2 key * generation requests. */ Cpa32U numDhPhase2KeyGenRequestErrors; /**< Total number of Diffie-Hellman phase 2 key generation requests * that had an error and could not be processed. */ Cpa32U numDhPhase2KeyGenCompleted; /**< Total number of Diffie-Hellman phase 2 key generation operations * that completed successfully. */ Cpa32U numDhPhase2KeyGenCompletedErrors; /**< Total number of Diffie-Hellman phase 2 key generation operations * that could not be completed successfully due to errors. */ } CpaCyDhStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyDh * Diffie-Hellman Statistics (64-bit version). * @description * This structure contains the 64-bit version of the statistics on the * Diffie-Hellman operations. * Statistics are set to zero when the component is initialized, and are * collected per instance. ****************************************************************************/ typedef struct _CpaCyDhStats64 { Cpa64U numDhPhase1KeyGenRequests; /**< Total number of successful Diffie-Hellman phase 1 key * generation requests. */ Cpa64U numDhPhase1KeyGenRequestErrors; /**< Total number of Diffie-Hellman phase 1 key generation requests * that had an error and could not be processed. */ Cpa64U numDhPhase1KeyGenCompleted; /**< Total number of Diffie-Hellman phase 1 key generation operations * that completed successfully. */ Cpa64U numDhPhase1KeyGenCompletedErrors; /**< Total number of Diffie-Hellman phase 1 key generation operations * that could not be completed successfully due to errors. */ Cpa64U numDhPhase2KeyGenRequests; /**< Total number of successful Diffie-Hellman phase 2 key * generation requests. */ Cpa64U numDhPhase2KeyGenRequestErrors; /**< Total number of Diffie-Hellman phase 2 key generation requests * that had an error and could not be processed. */ Cpa64U numDhPhase2KeyGenCompleted; /**< Total number of Diffie-Hellman phase 2 key generation operations * that completed successfully. */ Cpa64U numDhPhase2KeyGenCompletedErrors; /**< Total number of Diffie-Hellman phase 2 key generation operations * that could not be completed successfully due to errors. */ } CpaCyDhStats64; /** ***************************************************************************** * @ingroup cpaCyDh * Function to implement Diffie-Hellman phase 1 operations. * * @description * This function may be used to implement the Diffie-Hellman phase 1 * operations as defined in the PKCS #3 standard. It may be used to * generate the (local) octet string public value (PV) key. * The prime number sizes specified in RFC 2409, 4306, and part of - * RFC 3526 are supported (bit sizes 6144 and 8192 from RFC 3536 are not + * RFC 3526 are supported (bit size 6144 from RFC 3536 is not * supported). * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pDhPhase1Cb Pointer to a callback function to be invoked * when the operation is complete. If the * pointer is set to a NULL value the function * will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific call. * Will be returned unchanged in the callback * @param[in] pPhase1KeyGenData Structure containing all the data needed * to perform the DH Phase 1 key generation * operation. The client code allocates the * memory for this structure. This component * takes ownership of the memory until it is * returned in the callback. * @param[out] pLocalOctetStringPV Pointer to memory allocated by the client * into which the (local) octet string Public * Value (PV) will be written. This value * needs to be sent to the remote entity with * which Diffie-Hellman is negotiating. * The size of this buffer in bytes (as * represented by the dataLenInBytes field) * MUST be at least big enough to store * the public value, which may have a bit * length up to that of pPrimeP. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pDhPhase1Cb is non-NULL an asynchronous callback of type * CpaCyGenFlatBufCbFunc is generated in response to this function * call. Any errors generated during processing are reported in the * structure returned in the callback. * * @see * CpaCyGenFlatBufCbFunc, * CpaCyDhPhase1KeyGenOpData * *****************************************************************************/ CpaStatus cpaCyDhKeyGenPhase1(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pDhPhase1Cb, void *pCallbackTag, const CpaCyDhPhase1KeyGenOpData *pPhase1KeyGenData, CpaFlatBuffer *pLocalOctetStringPV); /** ***************************************************************************** * @ingroup cpaCyDh * Function to implement Diffie-Hellman phase 2 operations. * * @description * This function may be used to implement the Diffie-Hellman phase 2 * operation as defined in the PKCS #3 standard. It may be used to * generate the Diffie-Hellman shared secret key. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pDhPhase2Cb Pointer to a callback function to be * invoked when the operation is complete. * If the pointer is set to a NULL value * the function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in * the callback. * @param[in] pPhase2SecretKeyGenData Structure containing all the data * needed to perform the DH Phase 2 * secret key generation operation. The * client code allocates the memory for * this structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[out] pOctetStringSecretKey Pointer to memory allocated by the * client into which the octet string * secret key will be written. * The size of this buffer in bytes (as * represented by the dataLenInBytes field) * MUST be at least big enough to store * the public value, which may have a bit * length up to that of pPrimeP. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pDhPhase2Cb is non-NULL an asynchronous callback of type * CpaCyGenFlatBufCbFunc is generated in response to this function * call. Any errors generated during processing are reported in the * structure returned in the callback. * * @see * CpaCyGenFlatBufCbFunc, * CpaCyDhPhase2SecretKeyGenOpData * *****************************************************************************/ CpaStatus cpaCyDhKeyGenPhase2Secret(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pDhPhase2Cb, void *pCallbackTag, const CpaCyDhPhase2SecretKeyGenOpData *pPhase2SecretKeyGenData, CpaFlatBuffer *pOctetStringSecretKey); /** ***************************************************************************** * @ingroup cpaCyDh * Query statistics for Diffie-Hellman operations * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyDhQueryStats64(). * * @description * This function will query a specific Instance handle for Diffie- * Hellman statistics. The user MUST allocate the CpaCyDhStats * structure and pass the reference to that structure into this function * call. This function writes the statistic results into the passed in * CpaCyDhStats structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pDhStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyDhStats *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyDhQueryStats(const CpaInstanceHandle instanceHandle, struct _CpaCyDhStats *pDhStats); /** ***************************************************************************** * @ingroup cpaCyDh * Query statistics (64-bit version) for Diffie-Hellman operations * * @description * This function will query a specific Instance handle for the 64-bit * version of the Diffie-Hellman statistics. The user MUST allocate the * CpaCyDhStats64 structure and pass the reference to that structure into * this function call. This function writes the statistic results into * the passed in CpaCyDhStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pDhStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyDhStats64 *****************************************************************************/ CpaStatus cpaCyDhQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyDhStats64 *pDhStats); /*****************************************************************************/ #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_DH_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_dsa.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_dsa.h index 01fc6f2f04b4..f7f51bf2aa7b 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_dsa.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_dsa.h @@ -1,1443 +1,1443 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_dsa.h * * @defgroup cpaCyDsa Digital Signature Algorithm (DSA) API * * @ingroup cpaCy * * @description * These functions specify the API for Public Key Encryption * (Cryptography) Digital Signature Algorithm (DSA) operations. * * Support is provided for FIPS PUB 186-2 with Change Notice 1 * specification, and optionally for FIPS PUB 186-3. If an * implementation does not support FIPS PUB 186-3, then the * corresponding functions may return a status of @ref * CPA_STATUS_FAIL. * * Support for FIPS PUB 186-2 with Change Notice 1 implies supporting * the following choice for the pair L and N: * - L = 1024, N = 160 * * Support for FIPS PUB 186-3 implies supporting the following choices * for the pair L and N: * * - L = 1024, N = 160 * - L = 2048, N = 224 * - L = 2048, N = 256 * - L = 3072, N = 256 * * Only the modular math aspects of DSA parameter generation and message * signature generation and verification are implemented here. For full * DSA support, this DSA API SHOULD be used in conjunction with other * parts of this overall Cryptographic API. In particular the Symmetric * functions (for hashing), the Random Number Generation functions, and * the Prime Number Test functions will be required. * * @note * Large numbers are represented on the QuickAssist API as described * in the Large Number API (@ref cpaCyLn). *****************************************************************************/ #ifndef CPA_CY_DSA_H #define CPA_CY_DSA_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyDsa * DSA P Parameter Generation Operation Data. * @description * This structure contains the operation data for the cpaCyDsaGenPParam * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. X.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaGenPParam * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaGenPParam() * *****************************************************************************/ typedef struct _CpaCyDsaPParamGenOpData { CpaFlatBuffer X; /**< 2^(L-1) <= X < 2^L (from FIPS 186-3) */ CpaFlatBuffer Q; /**< DSA group parameter q */ } CpaCyDsaPParamGenOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * DSA G Parameter Generation Operation Data. * @description * This structure contains the operation data for the cpaCyDsaGenGParam * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. P.pData[0] = MSB. * * All numbers MUST be stored in big-endian order. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaGenGParam * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaGenGParam() * *****************************************************************************/ typedef struct _CpaCyDsaGParamGenOpData { CpaFlatBuffer P; /**< DSA group parameter p */ CpaFlatBuffer Q; /**< DSA group parameter q */ CpaFlatBuffer H; /**< any integer with 1 < h < p - 1 */ } CpaCyDsaGParamGenOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * DSA Y Parameter Generation Operation Data. * @description * This structure contains the operation data for the cpaCyDsaGenYParam * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. P.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaGenYParam * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaGenYParam() * *****************************************************************************/ typedef struct _CpaCyDsaYParamGenOpData { CpaFlatBuffer P; /**< DSA group parameter p */ CpaFlatBuffer G; /**< DSA group parameter g */ CpaFlatBuffer X; /**< DSA private key x */ } CpaCyDsaYParamGenOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * DSA R Sign Operation Data. * @description * This structure contains the operation data for the cpaCyDsaSignR * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. P.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaSignR * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaSignR() * *****************************************************************************/ typedef struct _CpaCyDsaRSignOpData { CpaFlatBuffer P; /**< DSA group parameter p */ CpaFlatBuffer Q; /**< DSA group parameter q */ CpaFlatBuffer G; /**< DSA group parameter g */ CpaFlatBuffer K; /**< DSA secret parameter k for signing */ } CpaCyDsaRSignOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * DSA S Sign Operation Data. * @description * This structure contains the operation data for the cpaCyDsaSignS * function. The client MUST allocate the memory for this structure and * the items pointed to by this structure. When the structure is passed * into the function, ownership of the memory passes to the function. * Ownership of the memory returns to the client when this structure is * returned in the callback function. * * For optimal performance all data SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. Q.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaSignS * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaSignS() * *****************************************************************************/ typedef struct _CpaCyDsaSSignOpData { CpaFlatBuffer Q; /**< DSA group parameter q */ CpaFlatBuffer X; /**< DSA private key x */ CpaFlatBuffer K; /**< DSA secret parameter k for signing */ CpaFlatBuffer R; /**< DSA message signature r */ CpaFlatBuffer Z; /**< The leftmost min(N, outlen) bits of Hash(M), where: * - N is the bit length of q * - outlen is the bit length of the hash function output block * - M is the message to be signed */ } CpaCyDsaSSignOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * DSA R & S Sign Operation Data. * @description * This structure contains the operation data for the cpaCyDsaSignRS * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. P.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaSignRS * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaSignRS() * *****************************************************************************/ typedef struct _CpaCyDsaRSSignOpData { CpaFlatBuffer P; /**< DSA group parameter p */ CpaFlatBuffer Q; /**< DSA group parameter q */ CpaFlatBuffer G; /**< DSA group parameter g */ CpaFlatBuffer X; /**< DSA private key x */ CpaFlatBuffer K; /**< DSA secret parameter k for signing */ CpaFlatBuffer Z; /**< The leftmost min(N, outlen) bits of Hash(M), where: * - N is the bit length of q * - outlen is the bit length of the hash function output block * - M is the message to be signed */ } CpaCyDsaRSSignOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * DSA Verify Operation Data. * @description * This structure contains the operation data for the cpaCyDsaVerify * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. P.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyDsaVerify * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyDsaVerify() * *****************************************************************************/ typedef struct _CpaCyDsaVerifyOpData { CpaFlatBuffer P; /**< DSA group parameter p */ CpaFlatBuffer Q; /**< DSA group parameter q */ CpaFlatBuffer G; /**< DSA group parameter g */ CpaFlatBuffer Y; /**< DSA public key y */ CpaFlatBuffer Z; /**< The leftmost min(N, outlen) bits of Hash(M'), where: * - N is the bit length of q * - outlen is the bit length of the hash function output block * - M is the message to be signed */ CpaFlatBuffer R; /**< DSA message signature r */ CpaFlatBuffer S; /**< DSA message signature s */ } CpaCyDsaVerifyOpData; /** ***************************************************************************** * @ingroup cpaCyDsa * Cryptographic DSA Statistics. * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by @ref CpaCyDsaStats64. * @description * This structure contains statistics on the Cryptographic DSA * operations. Statistics are set to zero when the component is * initialized, and are collected per instance. ****************************************************************************/ typedef struct _CpaCyDsaStats { Cpa32U numDsaPParamGenRequests; /**< Total number of successful DSA P parameter generation requests. */ Cpa32U numDsaPParamGenRequestErrors; /**< Total number of DSA P parameter generation requests that had an * error and could not be processed. */ Cpa32U numDsaPParamGenCompleted; /**< Total number of DSA P parameter generation operations that * completed successfully. */ Cpa32U numDsaPParamGenCompletedErrors; /**< Total number of DSA P parameter generation operations that could * not be completed successfully due to errors. */ Cpa32U numDsaGParamGenRequests; /**< Total number of successful DSA G parameter generation requests. */ Cpa32U numDsaGParamGenRequestErrors; /**< Total number of DSA G parameter generation requests that had an * error and could not be processed. */ Cpa32U numDsaGParamGenCompleted; /**< Total number of DSA G parameter generation operations that * completed successfully. */ Cpa32U numDsaGParamGenCompletedErrors; /**< Total number of DSA G parameter generation operations that could * not be completed successfully due to errors. */ Cpa32U numDsaYParamGenRequests; /**< Total number of successful DSA Y parameter generation requests. */ Cpa32U numDsaYParamGenRequestErrors; /**< Total number of DSA Y parameter generation requests that had an * error and could not be processed. */ Cpa32U numDsaYParamGenCompleted; /**< Total number of DSA Y parameter generation operations that * completed successfully. */ Cpa32U numDsaYParamGenCompletedErrors; /**< Total number of DSA Y parameter generation operations that could * not be completed successfully due to errors. */ Cpa32U numDsaRSignRequests; /**< Total number of successful DSA R sign generation requests. */ Cpa32U numDsaRSignRequestErrors; /**< Total number of DSA R sign requests that had an error and could * not be processed. */ Cpa32U numDsaRSignCompleted; /**< Total number of DSA R sign operations that completed * successfully. */ Cpa32U numDsaRSignCompletedErrors; /**< Total number of DSA R sign operations that could not be completed * successfully due to errors. */ Cpa32U numDsaSSignRequests; /**< Total number of successful DSA S sign generation requests. */ Cpa32U numDsaSSignRequestErrors; /**< Total number of DSA S sign requests that had an error and could * not be processed. */ Cpa32U numDsaSSignCompleted; /**< Total number of DSA S sign operations that completed * successfully. */ Cpa32U numDsaSSignCompletedErrors; /**< Total number of DSA S sign operations that could not be completed * successfully due to errors. */ Cpa32U numDsaRSSignRequests; /**< Total number of successful DSA RS sign generation requests. */ Cpa32U numDsaRSSignRequestErrors; /**< Total number of DSA RS sign requests that had an error and could * not be processed. */ Cpa32U numDsaRSSignCompleted; /**< Total number of DSA RS sign operations that completed * successfully. */ Cpa32U numDsaRSSignCompletedErrors; /**< Total number of DSA RS sign operations that could not be completed * successfully due to errors. */ Cpa32U numDsaVerifyRequests; /**< Total number of successful DSA verify generation requests. */ Cpa32U numDsaVerifyRequestErrors; /**< Total number of DSA verify requests that had an error and could * not be processed. */ Cpa32U numDsaVerifyCompleted; /**< Total number of DSA verify operations that completed * successfully. */ Cpa32U numDsaVerifyCompletedErrors; /**< Total number of DSA verify operations that could not be completed * successfully due to errors. */ Cpa32U numDsaVerifyFailures; /**< Total number of DSA verify operations that executed successfully * but the outcome of the test was that the verification failed. * Note that this does not indicate an error. */ } CpaCyDsaStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyDsa * Cryptographic DSA Statistics (64-bit version). * @description * This structure contains 64-bit version of the statistics on the * Cryptographic DSA operations. * Statistics are set to zero when the component is * initialized, and are collected per instance. ****************************************************************************/ typedef struct _CpaCyDsaStats64 { Cpa64U numDsaPParamGenRequests; /**< Total number of successful DSA P parameter generation requests. */ Cpa64U numDsaPParamGenRequestErrors; /**< Total number of DSA P parameter generation requests that had an * error and could not be processed. */ Cpa64U numDsaPParamGenCompleted; /**< Total number of DSA P parameter generation operations that * completed successfully. */ Cpa64U numDsaPParamGenCompletedErrors; /**< Total number of DSA P parameter generation operations that could * not be completed successfully due to errors. */ Cpa64U numDsaGParamGenRequests; /**< Total number of successful DSA G parameter generation requests. */ Cpa64U numDsaGParamGenRequestErrors; /**< Total number of DSA G parameter generation requests that had an * error and could not be processed. */ Cpa64U numDsaGParamGenCompleted; /**< Total number of DSA G parameter generation operations that * completed successfully. */ Cpa64U numDsaGParamGenCompletedErrors; /**< Total number of DSA G parameter generation operations that could * not be completed successfully due to errors. */ Cpa64U numDsaYParamGenRequests; /**< Total number of successful DSA Y parameter generation requests. */ Cpa64U numDsaYParamGenRequestErrors; /**< Total number of DSA Y parameter generation requests that had an * error and could not be processed. */ Cpa64U numDsaYParamGenCompleted; /**< Total number of DSA Y parameter generation operations that * completed successfully. */ Cpa64U numDsaYParamGenCompletedErrors; /**< Total number of DSA Y parameter generation operations that could * not be completed successfully due to errors. */ Cpa64U numDsaRSignRequests; /**< Total number of successful DSA R sign generation requests. */ Cpa64U numDsaRSignRequestErrors; /**< Total number of DSA R sign requests that had an error and could * not be processed. */ Cpa64U numDsaRSignCompleted; /**< Total number of DSA R sign operations that completed * successfully. */ Cpa64U numDsaRSignCompletedErrors; /**< Total number of DSA R sign operations that could not be completed * successfully due to errors. */ Cpa64U numDsaSSignRequests; /**< Total number of successful DSA S sign generation requests. */ Cpa64U numDsaSSignRequestErrors; /**< Total number of DSA S sign requests that had an error and could * not be processed. */ Cpa64U numDsaSSignCompleted; /**< Total number of DSA S sign operations that completed * successfully. */ Cpa64U numDsaSSignCompletedErrors; /**< Total number of DSA S sign operations that could not be completed * successfully due to errors. */ Cpa64U numDsaRSSignRequests; /**< Total number of successful DSA RS sign generation requests. */ Cpa64U numDsaRSSignRequestErrors; /**< Total number of DSA RS sign requests that had an error and could * not be processed. */ Cpa64U numDsaRSSignCompleted; /**< Total number of DSA RS sign operations that completed * successfully. */ Cpa64U numDsaRSSignCompletedErrors; /**< Total number of DSA RS sign operations that could not be completed * successfully due to errors. */ Cpa64U numDsaVerifyRequests; /**< Total number of successful DSA verify generation requests. */ Cpa64U numDsaVerifyRequestErrors; /**< Total number of DSA verify requests that had an error and could * not be processed. */ Cpa64U numDsaVerifyCompleted; /**< Total number of DSA verify operations that completed * successfully. */ Cpa64U numDsaVerifyCompletedErrors; /**< Total number of DSA verify operations that could not be completed * successfully due to errors. */ Cpa64U numDsaVerifyFailures; /**< Total number of DSA verify operations that executed successfully * but the outcome of the test was that the verification failed. * Note that this does not indicate an error. */ } CpaCyDsaStats64; /** ***************************************************************************** * @ingroup cpaCyDsa * Definition of a generic callback function invoked for a number of the * DSA API functions.. * * @description * This is the prototype for the cpaCyDsaGenCbFunc callback function. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Opaque pointer to Operation data supplied in * request. * @param[in] protocolStatus The result passes/fails the DSA protocol * related checks. * @param[in] pOut Output data from the request. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyDsaGenPParam() * cpaCyDsaGenGParam() * cpaCyDsaSignR() * cpaCyDsaSignS() * *****************************************************************************/ typedef void (*CpaCyDsaGenCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean protocolStatus, CpaFlatBuffer *pOut); /** ***************************************************************************** * @ingroup cpaCyDsa * Definition of callback function invoked for cpaCyDsaSignRS * requests. * * @description * This is the prototype for the cpaCyDsaSignRS callback function, which * will provide the DSA message signature r and s parameters. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Operation data pointer supplied in request. * @param[in] protocolStatus The result passes/fails the DSA protocol * related checks. * @param[in] pR DSA message signature r. * @param[in] pS DSA message signature s. * * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyDsaSignRS() * *****************************************************************************/ typedef void (*CpaCyDsaRSSignCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean protocolStatus, CpaFlatBuffer *pR, CpaFlatBuffer *pS); /** ***************************************************************************** * @ingroup cpaCyDsa * Definition of callback function invoked for cpaCyDsaVerify * requests. * * @description * This is the prototype for the cpaCyDsaVerify callback function. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Operation data pointer supplied in request. * @param[in] verifyStatus The verification passed or failed. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyDsaVerify() * *****************************************************************************/ typedef void (*CpaCyDsaVerifyCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean verifyStatus); /** ***************************************************************************** * @ingroup cpaCyDsa * Generate DSA P Parameter. * * @description * * This function performs FIPS 186-3 Appendix A.1.1.2 steps 11.4 and 11.5, * and part of step 11.7: * * 11.4. c = X mod 2q. * 11.5. p = X - (c - 1). * 11.7. Test whether or not p is prime as specified in Appendix C.3. * [Note that a GCD test against ~1400 small primes is performed * on p to eliminate ~94% of composites - this is NOT a "robust" * primality test, as specified in Appendix C.3.] * * The protocol status, returned in the callback function as parameter * protocolStatus (or, in the case of synchronous invocation, in the * parameter *pProtocolStatus) is used to indicate whether the value p is * in the right range and has passed the limited primality test. * * Specifically, (protocolStatus == CPA_TRUE) means p is in the right range * and SHOULD be subjected to a robust primality test as specified in * FIPS 186-3 Appendix C.3 (for example, 40 rounds of Miller-Rabin). * Meanwhile, (protocolStatus == CPA_FALSE) means p is either composite, * or p < 2^(L-1), in which case the value of p gets set to zero. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is * set to a NULL value the function will * operate synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pProtocolStatus The result passes/fails the DSA protocol * related checks. * @param[out] pP Candidate for DSA parameter p, p odd and * 2^(L-1) < p < X * On invocation the callback function will * contain this parameter in the pOut parameter. * * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaPParamGenCbFunc is generated in response to this * function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaPParamGenOpData, * CpaCyDsaGenCbFunc * *****************************************************************************/ CpaStatus cpaCyDsaGenPParam(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void * pCallbackTag, const CpaCyDsaPParamGenOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pP); /** ***************************************************************************** * @ingroup cpaCyDsa * Generate DSA G Parameter. * * @description * This function performs FIPS 186-3 Appendix A.2.1, steps 1 and 3, * and part of step 4: * * 1. e = (p - 1)/q. * 3. Set g = h^e mod p. * 4. If (g = 1), then go to step 2. * Here, the implementation will check for g == 1, and return * status accordingly. * * * The protocol status, returned in the callback function as parameter * protocolStatus (or, in the case of synchronous invocation, in the * parameter *pProtocolStatus) is used to indicate whether the value g is * acceptable. * * Specifically, (protocolStatus == CPA_TRUE) means g is acceptable. * Meanwhile, (protocolStatus == CPA_FALSE) means g == 1, so a * different value of h SHOULD be used to generate another value of g. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pProtocolStatus The result passes/fails the DSA protocol * related checks. * @param[out] pG g = h^((p-1)/q) mod p. * On invocation the callback function will * contain this parameter in the pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaGParamGenCbFunc is generated in response to this * function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaGParamGenOpData, * CpaCyDsaGenCbFunc * *****************************************************************************/ CpaStatus cpaCyDsaGenGParam(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaGParamGenOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pG); /** ***************************************************************************** * @ingroup cpaCyDsa * Generate DSA Y Parameter. * * @description * * This function performs modular exponentiation to generate y as * described in FIPS 186-3 section 4.1: * y = g^x mod p * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pProtocolStatus The result passes/fails the DSA protocol * related checks. * @param[out] pY y = g^x mod p* * On invocation the callback function will * contain this parameter in the pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaYParamGenCbFunc is generated in response to this * function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaYParamGenOpData, * CpaCyDsaGenCbFunc * *****************************************************************************/ CpaStatus cpaCyDsaGenYParam(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaYParamGenOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pY); /** ***************************************************************************** * @ingroup cpaCyDsa * Generate DSA R Signature. * * @description * This function generates the DSA R signature as described in FIPS 186-3 * Section 4.6: * r = (g^k mod p) mod q * * The protocol status, returned in the callback function as parameter * protocolStatus (or, in the case of synchronous invocation, in the * parameter *pProtocolStatus) is used to indicate whether the value r == 0. * * Specifically, (protocolStatus == CPA_TRUE) means r != 0, while * (protocolStatus == CPA_FALSE) means r == 0. * * Generation of signature r does not depend on the content of the message * being signed, so this operation can be done in advance for different * values of k. Then once each message becomes available only the * signature s needs to be generated. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pProtocolStatus The result passes/fails the DSA protocol * related checks. * @param[out] pR DSA message signature r. * On invocation the callback function will * contain this parameter in the pOut parameter. * * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaRSignCbFunc is generated in response to this function * call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaRSignOpData, * CpaCyDsaGenCbFunc, * cpaCyDsaSignS(), * cpaCyDsaSignRS() * *****************************************************************************/ CpaStatus cpaCyDsaSignR(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaRSignOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pR); /** ***************************************************************************** * @ingroup cpaCyDsa * Generate DSA S Signature. * * @description * This function generates the DSA S signature as described in FIPS 186-3 * Section 4.6: * s = (k^-1(z + xr)) mod q * * Here, z = the leftmost min(N, outlen) bits of Hash(M). This function * does not perform the SHA digest; z is computed by the caller and * passed as a parameter in the pOpData field. * * The protocol status, returned in the callback function as parameter * protocolStatus (or, in the case of synchronous invocation, in the * parameter *pProtocolStatus) is used to indicate whether the value s == 0. * * Specifically, (protocolStatus == CPA_TRUE) means s != 0, while * (protocolStatus == CPA_FALSE) means s == 0. * * If signature r has been generated in advance, then this function can be * used to generate the signature s once the message becomes available. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pProtocolStatus The result passes/fails the DSA protocol * related checks. * @param[out] pS DSA message signature s. * On invocation the callback function will * contain this parameter in the pOut parameter. * * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaSSignCbFunc is generated in response to this function * call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaSSignOpData, * CpaCyDsaGenCbFunc, * cpaCyDsaSignR(), * cpaCyDsaSignRS() * *****************************************************************************/ CpaStatus cpaCyDsaSignS(const CpaInstanceHandle instanceHandle, const CpaCyDsaGenCbFunc pCb, void *pCallbackTag, const CpaCyDsaSSignOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pS); /** ***************************************************************************** * @ingroup cpaCyDsa * Generate DSA R and S Signatures. * * @description * This function generates the DSA R and S signatures as described in * FIPS 186-3 Section 4.6: * * r = (g^k mod p) mod q * s = (k^-1(z + xr)) mod q * * Here, z = the leftmost min(N, outlen) bits of Hash(M). This function * does not perform the SHA digest; z is computed by the caller and * passed as a parameter in the pOpData field. * * The protocol status, returned in the callback function as parameter * protocolStatus (or, in the case of synchronous invocation, in the * parameter *pProtocolStatus) is used to indicate whether either of * the values r or s are zero. * * Specifically, (protocolStatus == CPA_TRUE) means neither is zero (i.e. * (r != 0) && (s != 0)), while (protocolStatus == CPA_FALSE) means that at * least one of r or s is zero (i.e. (r == 0) || (s == 0)). * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to * a NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pProtocolStatus The result passes/fails the DSA protocol * related checks. * @param[out] pR DSA message signature r. * @param[out] pS DSA message signature s. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaRSSignCbFunc is generated in response to this function * call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaRSSignOpData, * CpaCyDsaRSSignCbFunc, * cpaCyDsaSignR(), * cpaCyDsaSignS() * *****************************************************************************/ CpaStatus cpaCyDsaSignRS(const CpaInstanceHandle instanceHandle, const CpaCyDsaRSSignCbFunc pCb, void *pCallbackTag, const CpaCyDsaRSSignOpData *pOpData, CpaBoolean *pProtocolStatus, CpaFlatBuffer *pR, CpaFlatBuffer *pS); /** ***************************************************************************** * @ingroup cpaCyDsa * Verify DSA R and S signatures. * * @description * This function performs FIPS 186-3 Section 4.7: * w = (s')^-1 mod q * u1 = (zw) mod q * u2 = ((r')w) mod q * v = (((g)^u1 (y)^u2) mod p) mod q * * Here, z = the leftmost min(N, outlen) bits of Hash(M'). This function * does not perform the SHA digest; z is computed by the caller and * passed as a parameter in the pOpData field. * * A response status of ok (verifyStatus == CPA_TRUE) means v = r'. * A response status of not ok (verifyStatus == CPA_FALSE) means v != r'. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to * a NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pVerifyStatus The verification passed or failed. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyDsaVerifyCbFunc is generated in response to this function * call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyDsaVerifyOpData, * CpaCyDsaVerifyCbFunc * *****************************************************************************/ CpaStatus cpaCyDsaVerify(const CpaInstanceHandle instanceHandle, const CpaCyDsaVerifyCbFunc pCb, void *pCallbackTag, const CpaCyDsaVerifyOpData *pOpData, CpaBoolean *pVerifyStatus); /** ***************************************************************************** * @ingroup cpaCyDsa * Query statistics for a specific DSA instance. * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyDsaQueryStats64(). * * @description * This function will query a specific instance of the DSA implementation * for statistics. The user MUST allocate the CpaCyDsaStats structure * and pass the reference to that structure into this function call. This * function writes the statistic results into the passed in * CpaCyDsaStats structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pDsaStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyDsaStats *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyDsaQueryStats(const CpaInstanceHandle instanceHandle, struct _CpaCyDsaStats *pDsaStats); /** ***************************************************************************** * @ingroup cpaCyDsa * Query 64-bit statistics for a specific DSA instance. * * @description * This function will query a specific instance of the DSA implementation * for 64-bit statistics. The user MUST allocate the CpaCyDsaStats64 * structure and pass the reference to that structure into this function. * This function writes the statistic results into the passed in * CpaCyDsaStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pDsaStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyDsaStats *****************************************************************************/ CpaStatus cpaCyDsaQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyDsaStats64 *pDsaStats); /*****************************************************************************/ #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_DSA_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_ec.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_ec.h index f93a7ab10936..8f72bd669229 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_ec.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_ec.h @@ -1,766 +1,1124 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_ec.h * * @defgroup cpaCyEc Elliptic Curve (EC) API * * @ingroup cpaCy * * @description * These functions specify the API for Public Key Encryption * (Cryptography) Elliptic Curve (EC) operations. * * All implementations will support at least the following: * * - "NIST RECOMMENDED ELLIPTIC CURVES FOR FEDERAL GOVERNMENT USE" * as defined by * http://csrc.nist.gov/groups/ST/toolkit/documents/dss/NISTReCur.pdf * * - Random curves where the max(log2(q), log2(n) + log2(h)) <= 512 * where q is the modulus, n is the order of the curve and h is the * cofactor * * For Montgomery and Edwards 25519 and 448 elliptic curves, * the following operations are supported: * 1. Montgomery 25519 Curve | scalar point Multiplication * Input: Montgomery affine coordinate X of point P * Scalar k - * Output: Montgomery affine coordinate X of point [k/P + * Output: Montgomery affine coordinate X of point [k]P * Decode: Scalar k always decoded by implementation * * 2. Montgomery 25519 Curve | generator point Multiplication * Input: Scalar k * Output: Montgomery affine coordinate X of point [k]G * Decode: Scalar k always decoded by implementation * * 3. Twisted Edwards 25519 Curve | scalar point Multiplication * Input: Twisted Edwards affine coordinate X of point P * Twisted Edwards affine coordinate Y of point P * Scalar k * Output: Twisted Edwards affine coordinate X of point [k]P * Twisted Edwards affine coordinate Y of point [k]P - * Decode: Caller must specify if decoding is required + * Decode: Caller must supply parameters in MSB order, the + * implementation will not explicitly decode according + * to RFC#7748 Section 5 * * 4. Twisted Edwards 25519 Curve | generator point Multiplication * Input: Scalar k * Output: Twisted Edwards affine coordinate X of point [k]G * Twisted Edwards affine coordinate Y of point [k]G - * Decode: Caller must specify if decoding is required + * Decode: Caller must supply parameters in MSB order, the + * implementation will not explicitly decode according + * to RFC#7748 Section 5 * * 5. Montgomery 448 Curve | scalar point Multiplication * Input: Montgomery affine coordinate X of point P * Scalar k * Output: Montgomery affine coordinate X of point [k]P * Decode: Scalar k always decoded by implementation * * 6. Montgomery 448 Curve | generator point Multiplication * Input: Scalar k * Output: Montgomery affine coordinate X of point [k]G * Decode: Scalar k always decoded by implementation * * 7. Edwards 448 Curve | scalar point Multiplication * Input: Edwards affine coordinate X of point P * Edwards affine coordinate Y of point P * Scalar k * Output: Edwards affine coordinate X of point [k]P * Edwards affine coordinate Y of point [k]P - * Decode: Caller must specify if decoding is required + * Decode: Caller must supply parameters in MSB order, the + * implementation will not explicitly decode according + * to RFC#7748 Section 5 * * 8. Edwards 448 Curve | generator point Multiplication * Input: Scalar k * Output: Edwards affine coordinate X of point [k]G * Edwards affine coordinate Y of point [k]G - * Decode: Caller must specify if decoding is required + * Decode: Caller must supply parameters in MSB order, the + * implementation will not explicitly decode according + * to RFC#7748 Section 5 * * @note * Large numbers are represented on the QuickAssist API as described * in the Large Number API (@ref cpaCyLn). * * In addition, the bit length of large numbers passed to the API * MUST NOT exceed 576 bits for Elliptic Curve operations. *****************************************************************************/ #ifndef CPA_CY_EC_H_ #define CPA_CY_EC_H_ #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyEc * Field types for Elliptic Curve * @description * As defined by FIPS-186-3, for each cryptovariable length, there are * two kinds of fields. *
    *
  • A prime field is the field GF(p) which contains a prime number * p of elements. The elements of this field are the integers modulo * p, and the field arithmetic is implemented in terms of the * arithmetic of integers modulo p.
    • * *
  • A binary field is the field GF(2^m) which contains 2^m elements * for some m (called the degree of the field). The elements of * this field are the bit strings of length m, and the field * arithmetic is implemented in terms of operations on the bits.
    • *
*****************************************************************************/ typedef enum _CpaCyEcFieldType { CPA_CY_EC_FIELD_TYPE_PRIME = 1, /**< A prime field, GF(p) */ CPA_CY_EC_FIELD_TYPE_BINARY, /**< A binary field, GF(2^m) */ } CpaCyEcFieldType; +/** + ***************************************************************************** + * @ingroup cpaCyEc + * Enumeration listing curve types to use with generic multiplication + * and verification routines. + * + * @description + * This structure contains a list of different elliptic curve types. + * EC Point multiplication and other operations depend on the type of + * the curve. + * + * @see + * cpaCyEcGenericPointMultiply() + * cpaCyEcGenericPointVerify() + * + *****************************************************************************/ +typedef enum _CpaCyEcCurveType +{ + CPA_CY_EC_CURVE_TYPE_WEIERSTRASS_PRIME = 1, + /**< A Weierstrass curve with arithmetic in terms of the + * arithmetic of integers modulo p over a prime field. */ + CPA_CY_EC_CURVE_TYPE_WEIERSTRASS_BINARY, + /**< A Weierstrass curve with arithmetic in terms of operations on bits + * over a binary field. */ + CPA_CY_EC_CURVE_TYPE_WEIERSTRASS_KOBLITZ_BINARY, + /**< A Weierstrass-koblitz curve with arithmetic in terms of operations on + * the bits over a binary field. */ +} CpaCyEcCurveType; + /** ***************************************************************************** * @ingroup cpaCyEc * Curve types for Elliptic Curves defined in RFC#7748 * @description * As defined by RFC 7748, there are four elliptic curves in this * group. The Montgomery curves are denoted curve25519 and curve448, * and the birationally equivalent Twisted Edwards curves are denoted * edwards25519 and edwards448 * *****************************************************************************/ typedef enum _CpaCyEcMontEdwdsCurveType { CPA_CY_EC_MONTEDWDS_CURVE25519_TYPE = 1, /**< Montgomery 25519 curve */ CPA_CY_EC_MONTEDWDS_ED25519_TYPE, - /**< Twisted Edwards 25519 curve */ + /**< Edwards 25519 curve */ CPA_CY_EC_MONTEDWDS_CURVE448_TYPE, /**< Montgomery 448 curve */ CPA_CY_EC_MONTEDWDS_ED448_TYPE, - /**< Twisted Edwards 448 curve */ + /**< Edwards 448 curve */ } CpaCyEcMontEdwdsCurveType; /** ***************************************************************************** - * @file cpa_cy_ec.h + * @ingroup cpaCyEc + * Curve parameters for a Weierstrass type curve. + * + * @description + * This structure contains curve parameters for Weierstrass type + * curve: y^2 = x^3 + ax + b + * The client MUST allocate the memory for this structure + * When the structure is passed into the function, ownership of the memory + * passes to the function. Ownership of the memory returns to the client + * when this structure is returned in the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * The legend used in this structure is borrowed from RFC7748 + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the function, and before it + * has been returned in the callback, undefined behavior will result. + * + * @see + * CpaCyEcCurveParameters + * CpaCyEcFieldType + * + *****************************************************************************/ +typedef struct _CpaCyEcCurveParametersWeierstrass +{ + CpaCyEcFieldType fieldType; + /**< Prime or Binary */ + CpaFlatBuffer p; + /**< Prime modulus or irreducible polynomial over GF(2^m) */ + CpaFlatBuffer a; + /**< a coefficient */ + CpaFlatBuffer b; + /**< b coefficient */ + CpaFlatBuffer h; + /**< Cofactor */ +} CpaCyEcCurveParametersWeierstrass; + +/** + ***************************************************************************** + * @ingroup cpaCyEc + * Union characterised by a specific curve. + * + * @description + * This union allows for the characterisation of different curve types + * encapsulted in one data type. The intention is that new curve types + * will be added in the future. + * + * @note + * + * @see + * CpaCyEcCurveParametersWeierstrass + * + *****************************************************************************/ +typedef union _CpaCyEcCurveParameters +{ + CpaCyEcCurveParametersWeierstrass weierstrassParameters; +} CpaCyEcCurveParameters; + +/** + ***************************************************************************** + * @ingroup cpaCyEc + * Unified curve parameters. + * + * @description + * This structure provides a single data type that can describe a number + * of different curve types. The intention is to add further + * curve types in the future, thus the union field will allow for that + * expansion. + * + * The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the function, and before it + * has been returned in the callback, undefined behavior will result. + * + * @see + * CpaCyEcCurveParameters + * cpaCyEcGenericPointMultiply + * cpaCyEcGenericPointVerify + * + *****************************************************************************/ +typedef struct _CpaCyEcCurve +{ + CpaCyEcCurveType curveType; + CpaCyEcCurveParameters parameters; +} CpaCyEcCurve; + +/** + ***************************************************************************** * @ingroup cpaCyEc * EC Point Multiplication Operation Data. * * @description * This structure contains the operation data for the cpaCyEcPointMultiply * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. a.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyEcPointMultiply * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyEcPointMultiply() * *****************************************************************************/ typedef struct _CpaCyEcPointMultiplyOpData { CpaFlatBuffer k; /**< scalar multiplier (k > 0 and k < n) */ CpaFlatBuffer xg; /**< x coordinate of curve point */ CpaFlatBuffer yg; /**< y coordinate of curve point */ CpaFlatBuffer a; /**< a elliptic curve coefficient */ CpaFlatBuffer b; /**< b elliptic curve coefficient */ CpaFlatBuffer q; /**< prime modulus or irreducible polynomial over GF(2^m)*/ CpaFlatBuffer h; /**< cofactor of the operation. * If the cofactor is NOT required then set the cofactor to 1 or the * data pointer of the Flat Buffer to NULL. */ CpaCyEcFieldType fieldType; /**< field type for the operation */ -} CpaCyEcPointMultiplyOpData; - +} CpaCyEcPointMultiplyOpData CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyEc - * EC Point Verification Operation Data. + * Generic EC Point Multiplication Operation Data. * * @description - * This structure contains the operation data for the cpaCyEcPointVerify - * function. The client MUST allocate the memory for this structure and the - * items pointed to by this structure. When the structure is passed into - * the function, ownership of the memory passes to the function. Ownership - * of the memory returns to the client when this structure is returned in - * the callback function. + * This structure contains a generic EC point and a multiplier for use with + * cpaCyEcGenericPointMultiply. This is common for representing all EC + * points, irrespective of curve type: Weierstrass, Montgomery and Twisted + * Edwards (at this time only Weierstrass are supported). The same + * point + multiplier format can be used when performing generator + * multiplication, in which case the xP, yP supplied in this structure will + * be ignored by QAT API library & a generator point will be inserted in + * their place. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. a.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this - * structure after it has been submitted to the CpaCyEcPointVerify + * structure after it has been submitted to the cpaCyEcGenericPointMultiply * function, and before it has been returned in the callback, undefined * behavior will result. * * @see - * cpaCyEcPointVerify() + * cpaCyEcGenericPointMultiply() * *****************************************************************************/ -typedef struct _CpaCyEcPointVerifyOpData { - CpaFlatBuffer xq; - /**< x coordinate candidate point */ - CpaFlatBuffer yq; - /**< y coordinate candidate point */ - CpaFlatBuffer q; - /**< prime modulus or irreducible polynomial over GF(2^m) */ - CpaFlatBuffer a; - /**< a elliptic curve coefficient */ - CpaFlatBuffer b; - /**< b elliptic curve coefficient */ +typedef struct _CpaCyEcGenericPointMultiplyOpData { + CpaFlatBuffer k; + /** 0 and k < n) */ + CpaFlatBuffer xP; + /** pair specified in the structure + * lies on the curve indicated in the cpaCyEcGenericPointVerify API. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcGenericPointVerify + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcGenericPointVerify() + * + *****************************************************************************/ +typedef struct _CpaCyEcGenericPointVerifyOpData { + CpaFlatBuffer xP; + /** 0 and k < n) */ CpaFlatBuffer xg; /**< x coordinate of curve point */ CpaFlatBuffer yg; /**< y coordinate of curve point */ CpaFlatBuffer a; /**< a equation coefficient */ CpaFlatBuffer b; /**< b equation coefficient */ CpaFlatBuffer q; /**< prime modulus or irreducible polynomial over GF(2^r) */ CpaFlatBuffer h; /**< cofactor of the operation. * If the cofactor is NOT required then set the cofactor to 1 or the * data pointer of the Flat Buffer to NULL. * There are some restrictions on the value of the cofactor. * Implementations of this API will support at least the following: *
    *
  • NIST standard curves and their cofactors (1, 2 and 4)
    • * *
  • Random curves where max(log2(p), log2(n)+log2(h)) <= 512, where * p is the modulus, n is the order of the curve and h is the cofactor *
    • *
*/ CpaCyEcFieldType fieldType; /**< field type for the operation */ CpaBoolean pointVerify; /**< set to CPA_TRUE to do a verification before the multiplication */ } CpaCyEcdhPointMultiplyOpData; /** ***************************************************************************** * @ingroup cpaCyEcdh * Cryptographic ECDH Statistics. * @description * This structure contains statistics on the Cryptographic ECDH * operations. Statistics are set to zero when the component is * initialized, and are collected per instance. * ****************************************************************************/ typedef struct _CpaCyEcdhStats64 { Cpa64U numEcdhPointMultiplyRequests; /**< Total number of ECDH Point Multiplication operation requests. */ Cpa64U numEcdhPointMultiplyRequestErrors; /**< Total number of ECDH Point Multiplication operation requests that had * an error and could not be processed. */ Cpa64U numEcdhPointMultiplyCompleted; /**< Total number of ECDH Point Multiplication operation requests that * completed successfully. */ Cpa64U numEcdhPointMultiplyCompletedError; /**< Total number of ECDH Point Multiplication operation requests that could * not be completed successfully due to errors. */ Cpa64U numEcdhRequestCompletedOutputInvalid; /**< Total number of ECDH Point Multiplication or Point Verify operation * requests that could not be completed successfully due to an invalid * output. * Note that this does not indicate an error. */ } CpaCyEcdhStats64; /** ***************************************************************************** * @ingroup cpaCyEcdh * Definition of callback function invoked for cpaCyEcdhPointMultiply * requests. * * @description * This is the prototype for the CpaCyEcdhPointMultiplyCbFunc callback * function * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Opaque pointer to Operation data supplied in * request. * @param[in] pXk Output x coordinate from the request. * @param[in] pYk Output y coordinate from the request. * @param[in] multiplyStatus Status of the point multiplication and the * verification when the pointVerify bit is set * in the CpaCyEcdhPointMultiplyOpData structure. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyEcdhPointMultiply() * *****************************************************************************/ typedef void (*CpaCyEcdhPointMultiplyCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean multiplyStatus, CpaFlatBuffer *pXk, CpaFlatBuffer *pYk); /** ***************************************************************************** * @ingroup cpaCyEcdh * ECDH Point Multiplication. * * @description * This function performs ECDH Point Multiplication as defined in * ANSI X9.63 2001 section 5.4 * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to * a NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pMultiplyStatus In synchronous mode, the status of the point * multiplication and the verification when the * pointVerify bit is set in the * CpaCyEcdhPointMultiplyOpData structure. Set to * CPA_FALSE if the point is NOT on the curve or * at infinity. Set to CPA_TRUE if the point is * on the curve. * @param[out] pXk Pointer to x coordinate flat buffer. * @param[out] pYk Pointer to y coordinate flat buffer. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyEcdhPointMultiplyCbFunc is generated in response to this function * call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyEcdhPointMultiplyOpData, * CpaCyEcdhPointMultiplyCbFunc * *****************************************************************************/ CpaStatus cpaCyEcdhPointMultiply(const CpaInstanceHandle instanceHandle, const CpaCyEcdhPointMultiplyCbFunc pCb, void *pCallbackTag, const CpaCyEcdhPointMultiplyOpData *pOpData, CpaBoolean *pMultiplyStatus, CpaFlatBuffer *pXk, CpaFlatBuffer *pYk); - /** ***************************************************************************** * @ingroup cpaCyEcdh * Query statistics for a specific ECDH instance. * * @description * This function will query a specific instance of the ECDH implementation * for statistics. The user MUST allocate the CpaCyEcdhStats64 structure * and pass the reference to that structure into this function call. This * function writes the statistic results into the passed in * CpaCyEcdhStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pEcdhStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyEcdhStats64 *****************************************************************************/ CpaStatus cpaCyEcdhQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyEcdhStats64 *pEcdhStats); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /*CPA_CY_ECDH_H_*/ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_ecdsa.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_ecdsa.h index ee9353f6d274..a3ecbbe88026 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_ecdsa.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_ecdsa.h @@ -1,839 +1,852 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_ecdsa.h * * @defgroup cpaCyEcdsa Elliptic Curve Digital Signature Algorithm (ECDSA) API * * @ingroup cpaCy * * @description * These functions specify the API for Public Key Encryption * (Cryptography) Elliptic Curve Digital Signature Algorithm (ECDSA) * operations. * * @note * Large numbers are represented on the QuickAssist API as described * in the Large Number API (@ref cpaCyLn). * * In addition, the bit length of large numbers passed to the API * MUST NOT exceed 576 bits for Elliptic Curve operations. *****************************************************************************/ #ifndef CPA_CY_ECDSA_H_ #define CPA_CY_ECDSA_H_ #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" #include "cpa_cy_ec.h" /** ***************************************************************************** * @ingroup cpaCyEcdsa * ECDSA Sign R Operation Data. * @description * This structure contains the operation data for the cpaCyEcdsaSignR * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. a.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyEcdsaSignR * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyEcdsaSignR() * *****************************************************************************/ typedef struct _CpaCyEcdsaSignROpData { CpaFlatBuffer xg; /**< x coordinate of base point G */ CpaFlatBuffer yg; /**< y coordinate of base point G */ CpaFlatBuffer n; /**< order of the base point G, which shall be prime */ CpaFlatBuffer q; /**< prime modulus or irreducible polynomial over GF(2^r) */ CpaFlatBuffer a; /**< a elliptic curve coefficient */ CpaFlatBuffer b; /**< b elliptic curve coefficient */ CpaFlatBuffer k; /**< random value (k > 0 and k < n) */ CpaCyEcFieldType fieldType; /**< field type for the operation */ } CpaCyEcdsaSignROpData; /** ***************************************************************************** * @ingroup cpaCyEcdsa * ECDSA Sign S Operation Data. * @description * This structure contains the operation data for the cpaCyEcdsaSignS * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. a.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyEcdsaSignS * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyEcdsaSignS() * *****************************************************************************/ typedef struct _CpaCyEcdsaSignSOpData { CpaFlatBuffer m; /**< digest of the message to be signed */ CpaFlatBuffer d; /**< private key */ CpaFlatBuffer r; /**< Ecdsa r signature value */ CpaFlatBuffer k; /**< random value (k > 0 and k < n) */ CpaFlatBuffer n; /**< order of the base point G, which shall be prime */ CpaCyEcFieldType fieldType; /**< field type for the operation */ } CpaCyEcdsaSignSOpData; /** ***************************************************************************** * @ingroup cpaCyEcdsa * ECDSA Sign R & S Operation Data. * @description * This structure contains the operation data for the cpaCyEcdsaSignRS * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. a.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyEcdsaSignRS * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyEcdsaSignRS() * *****************************************************************************/ typedef struct _CpaCyEcdsaSignRSOpData { CpaFlatBuffer xg; /**< x coordinate of base point G */ CpaFlatBuffer yg; /**< y coordinate of base point G */ CpaFlatBuffer n; /**< order of the base point G, which shall be prime */ CpaFlatBuffer q; /**< prime modulus or irreducible polynomial over GF(2^r) */ CpaFlatBuffer a; /**< a elliptic curve coefficient */ CpaFlatBuffer b; /**< b elliptic curve coefficient */ CpaFlatBuffer k; /**< random value (k > 0 and k < n) */ CpaFlatBuffer m; /**< digest of the message to be signed */ CpaFlatBuffer d; /**< private key */ CpaCyEcFieldType fieldType; /**< field type for the operation */ } CpaCyEcdsaSignRSOpData; /** ***************************************************************************** * @ingroup cpaCyEcdsa * ECDSA Verify Operation Data, for Public Key. * @description * This structure contains the operation data for the CpaCyEcdsaVerify * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * For optimal performance all data buffers SHOULD be 8-byte aligned. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. a.pData[0] = MSB. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyEcdsaVerify * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * CpaCyEcdsaVerify() * *****************************************************************************/ typedef struct _CpaCyEcdsaVerifyOpData { CpaFlatBuffer xg; /**< x coordinate of base point G */ CpaFlatBuffer yg; /**< y coordinate of base point G */ CpaFlatBuffer n; /**< order of the base point G, which shall be prime */ CpaFlatBuffer q; /**< prime modulus or irreducible polynomial over GF(2^r) */ CpaFlatBuffer a; /**< a elliptic curve coefficient */ CpaFlatBuffer b; /**< b elliptic curve coefficient */ CpaFlatBuffer m; /**< digest of the message to be signed */ CpaFlatBuffer r; /**< ECDSA r signature value (r > 0 and r < n) */ CpaFlatBuffer s; /**< ECDSA s signature value (s > 0 and s < n) */ CpaFlatBuffer xp; /**< x coordinate of point P (public key) */ CpaFlatBuffer yp; /**< y coordinate of point P (public key) */ CpaCyEcFieldType fieldType; /**< field type for the operation */ } CpaCyEcdsaVerifyOpData; - /** ***************************************************************************** * @ingroup cpaCyEcdsa * Cryptographic ECDSA Statistics. * @description * This structure contains statistics on the Cryptographic ECDSA * operations. Statistics are set to zero when the component is * initialized, and are collected per instance. * ****************************************************************************/ typedef struct _CpaCyEcdsaStats64 { Cpa64U numEcdsaSignRRequests; /**< Total number of ECDSA Sign R operation requests. */ Cpa64U numEcdsaSignRRequestErrors; /**< Total number of ECDSA Sign R operation requests that had an error and * could not be processed. */ Cpa64U numEcdsaSignRCompleted; /**< Total number of ECDSA Sign R operation requests that completed * successfully. */ Cpa64U numEcdsaSignRCompletedErrors; /**< Total number of ECDSA Sign R operation requests that could * not be completed successfully due to errors. */ Cpa64U numEcdsaSignRCompletedOutputInvalid; /**< Total number of ECDSA Sign R operation requests could not be completed * successfully due to an invalid output. * Note that this does not indicate an error. */ Cpa64U numEcdsaSignSRequests; /**< Total number of ECDSA Sign S operation requests. */ Cpa64U numEcdsaSignSRequestErrors; /**< Total number of ECDSA Sign S operation requests that had an error and * could not be processed. */ Cpa64U numEcdsaSignSCompleted; /**< Total number of ECDSA Sign S operation requests that completed * successfully. */ Cpa64U numEcdsaSignSCompletedErrors; /**< Total number of ECDSA Sign S operation requests that could * not be completed successfully due to errors. */ Cpa64U numEcdsaSignSCompletedOutputInvalid; /**< Total number of ECDSA Sign S operation requests could not be completed * successfully due to an invalid output. * Note that this does not indicate an error. */ Cpa64U numEcdsaSignRSRequests; /**< Total number of ECDSA Sign R & S operation requests. */ Cpa64U numEcdsaSignRSRequestErrors; /**< Total number of ECDSA Sign R & S operation requests that had an * error and could not be processed. */ Cpa64U numEcdsaSignRSCompleted; /**< Total number of ECDSA Sign R & S operation requests that completed * successfully. */ Cpa64U numEcdsaSignRSCompletedErrors; /**< Total number of ECDSA Sign R & S operation requests that could * not be completed successfully due to errors. */ Cpa64U numEcdsaSignRSCompletedOutputInvalid; /**< Total number of ECDSA Sign R & S operation requests could not be * completed successfully due to an invalid output. * Note that this does not indicate an error. */ Cpa64U numEcdsaVerifyRequests; /**< Total number of ECDSA Verification operation requests. */ Cpa64U numEcdsaVerifyRequestErrors; /**< Total number of ECDSA Verification operation requests that had an * error and could not be processed. */ Cpa64U numEcdsaVerifyCompleted; /**< Total number of ECDSA Verification operation requests that completed * successfully. */ Cpa64U numEcdsaVerifyCompletedErrors; /**< Total number of ECDSA Verification operation requests that could * not be completed successfully due to errors. */ Cpa64U numEcdsaVerifyCompletedOutputInvalid; /**< Total number of ECDSA Verification operation requests that resulted * in an invalid output. * Note that this does not indicate an error. */ + Cpa64U numKptEcdsaSignRSCompletedOutputInvalid; + /**< Total number of KPT ECDSA Sign R & S operation requests could not be + * completed successfully due to an invalid output. + * Note that this does not indicate an error. */ + Cpa64U numKptEcdsaSignRSCompleted; + /**< Total number of KPT ECDSA Sign R & S operation requests that completed + * successfully. */ + Cpa64U numKptEcdsaSignRSRequests; + /**< Total number of KPT ECDSA Sign R & S operation requests. */ + Cpa64U numKptEcdsaSignRSRequestErrors; + /**< Total number of KPT ECDSA Sign R & S operation requests that had an + * error and could not be processed. */ + Cpa64U numKptEcdsaSignRSCompletedErrors; + /**< Total number of KPT ECDSA Sign R & S operation requests that could + * not be completed successfully due to errors. */ } CpaCyEcdsaStats64; /** ***************************************************************************** * @ingroup cpaCyEcdsa * Definition of a generic callback function invoked for a number of the * ECDSA Sign API functions. * * @description * This is the prototype for the CpaCyEcdsaGenSignCbFunc callback function. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Opaque pointer to Operation data supplied in * request. * @param[in] multiplyStatus Status of the point multiplication. * @param[in] pOut Output data from the request. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyEcdsaSignR() * cpaCyEcdsaSignS() * *****************************************************************************/ typedef void (*CpaCyEcdsaGenSignCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean multiplyStatus, CpaFlatBuffer *pOut); /** ***************************************************************************** * @ingroup cpaCyEcdsa * Definition of callback function invoked for cpaCyEcdsaSignRS * requests. * * @description * This is the prototype for the CpaCyEcdsaSignRSCbFunc callback function, * which will provide the ECDSA message signature r and s parameters. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Operation data pointer supplied in request. * @param[in] multiplyStatus Status of the point multiplication. * @param[in] pR Ecdsa message signature r. * @param[in] pS Ecdsa message signature s. * * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyEcdsaSignRS() * *****************************************************************************/ typedef void (*CpaCyEcdsaSignRSCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean multiplyStatus, CpaFlatBuffer *pR, CpaFlatBuffer *pS); /** ***************************************************************************** * @ingroup cpaCyEcdsa * Definition of callback function invoked for cpaCyEcdsaVerify requests. * * @description * This is the prototype for the CpaCyEcdsaVerifyCbFunc callback function. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Operation data pointer supplied in request. * @param[in] verifyStatus The verification status. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyEcdsaVerify() * *****************************************************************************/ typedef void (*CpaCyEcdsaVerifyCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean verifyStatus); /** ***************************************************************************** * @ingroup cpaCyEcdsa * Generate ECDSA Signature R. * * @description * This function generates ECDSA Signature R as per ANSI X9.62 2005 * section 7.3. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pSignStatus In synchronous mode, the multiply output is * valid (CPA_TRUE) or the output is invalid * (CPA_FALSE). * @param[out] pR ECDSA message signature r. * * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback is generated in response * to this function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * None *****************************************************************************/ CpaStatus cpaCyEcdsaSignR(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaGenSignCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaSignROpData *pOpData, CpaBoolean *pSignStatus, CpaFlatBuffer *pR); /** ***************************************************************************** * @ingroup cpaCyEcdsa * Generate ECDSA Signature S. * * @description * This function generates ECDSA Signature S as per ANSI X9.62 2005 * section 7.3. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pSignStatus In synchronous mode, the multiply output is * valid (CPA_TRUE) or the output is invalid * (CPA_FALSE). * @param[out] pS ECDSA message signature s. * * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback is generated in response * to this function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * None *****************************************************************************/ CpaStatus cpaCyEcdsaSignS(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaGenSignCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaSignSOpData *pOpData, CpaBoolean *pSignStatus, CpaFlatBuffer *pS); /** ***************************************************************************** * @ingroup cpaCyEcdsa * Generate ECDSA Signature R & S. * * @description * This function generates ECDSA Signature R & S as per ANSI X9.62 2005 * section 7.3. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to a * NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pSignStatus In synchronous mode, the multiply output is * valid (CPA_TRUE) or the output is invalid * (CPA_FALSE). * @param[out] pR ECDSA message signature r. * @param[out] pS ECDSA message signature s. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback is generated in response * to this function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * None *****************************************************************************/ CpaStatus cpaCyEcdsaSignRS(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaSignRSCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaSignRSOpData *pOpData, CpaBoolean *pSignStatus, CpaFlatBuffer *pR, CpaFlatBuffer *pS); /** ***************************************************************************** * @ingroup cpaCyEcdsa * Verify ECDSA Public Key. * * @description * This function performs ECDSA Verify as per ANSI X9.62 2005 section 7.4. * * A response status of ok (verifyStatus == CPA_TRUE) means that the * signature was verified * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to * a NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pVerifyStatus In synchronous mode, set to CPA_FALSE if the * point is NOT on the curve or at infinity. Set * to CPA_TRUE if the point is on the curve. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyEcdsaVerifyCbFunc is generated in response to this function * call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyEcdsaVerifyOpData, * CpaCyEcdsaVerifyCbFunc * *****************************************************************************/ CpaStatus cpaCyEcdsaVerify(const CpaInstanceHandle instanceHandle, const CpaCyEcdsaVerifyCbFunc pCb, void *pCallbackTag, const CpaCyEcdsaVerifyOpData *pOpData, CpaBoolean *pVerifyStatus); - /** ***************************************************************************** * @ingroup cpaCyEcdsa * Query statistics for a specific ECDSA instance. * * @description * This function will query a specific instance of the ECDSA implementation * for statistics. The user MUST allocate the CpaCyEcdsaStats64 structure * and pass the reference to that structure into this function call. This * function writes the statistic results into the passed in * CpaCyEcdsaStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pEcdsaStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyEcdsaStats64 *****************************************************************************/ CpaStatus cpaCyEcdsaQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyEcdsaStats64 *pEcdsaStats); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /*CPA_CY_ECDSA_H_*/ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_ecsm2.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_ecsm2.h new file mode 100644 index 000000000000..c7c89e3c6e8a --- /dev/null +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_ecsm2.h @@ -0,0 +1,1464 @@ +/*************************************************************************** + * + * BSD LICENSE + * + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + ***************************************************************************/ + +/* + ***************************************************************************** + * Doxygen group definitions + ****************************************************************************/ + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * + * @defgroup cpaCyEcsm2 Elliptic Curve SM2 (ECSM2) API + * + * @ingroup cpaCy + * + * @description + * These functions specify the API for Public Key Encryption + * (Cryptography) SM2 operations. + * + * Chinese Public Key Algorithm based on Elliptic Curve Theory + * + * @note + * The naming, terms, and reference on SM2 elliptic curve, and their + * flow of algorithms inside this API header file are from the link + * below, please kindly refer to it for details. + * https://tools.ietf.org/html/draft-shen-sm2-ecdsa-02 + * + *****************************************************************************/ + +#ifndef CPA_CY_ECSM2_H_ +#define CPA_CY_ECSM2_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "cpa_cy_common.h" +#include "cpa_cy_ec.h" + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Encryption Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2Encrypt + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2Encrypt + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2Encrypt() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2EncryptOpData { + CpaFlatBuffer k; + /**< scalar multiplier (k > 0 and k < n) */ + CpaFlatBuffer xP; + /**< x coordinate of public key */ + CpaFlatBuffer yP; + /**< y coordinate of public key */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2EncryptOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Decryption Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2Decrypt + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2Decrypt + * function, and before it has been returned in the callback, undefined + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2Decrypt + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2Decrypt() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2DecryptOpData { + CpaFlatBuffer d; + /**< private key (d > 0 and d < n) */ + CpaFlatBuffer x1; + /**< x coordinate of [k]G */ + CpaFlatBuffer y1; + /**< y coordinate of [k]G */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2DecryptOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Point Multiplication Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2PointMultiply + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2PointMultiply + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2PointMultiply() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2PointMultiplyOpData { + CpaFlatBuffer k; + /**< scalar multiplier (k > 0 and k < n) */ + CpaFlatBuffer x; + /**< x coordinate of a point on the curve */ + CpaFlatBuffer y; + /**< y coordinate of a point on the curve */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2PointMultiplyOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Generator Multiplication Operation Data. + * + * @description + * This structure contains the operation data for the + * cpaCyEcsm2GeneratorMultiply function. The client MUST allocate the + * memory for this structure and the items pointed to by this structure. + * When the structure is passed into the function, ownership of the + * memory passes to the function. Ownership of the memory returns to the + * client when this structure is returned in the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2GeneratorMultiply + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2GeneratorMultiply() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2GeneratorMultiplyOpData { + CpaFlatBuffer k; + /**< scalar multiplier (k > 0 and k < n) */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2GeneratorMultiplyOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Point Verify Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2PointVerify + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2PointVerify + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2PointVerify() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2PointVerifyOpData { + CpaFlatBuffer x; + /**< x coordinate of a point on the curve */ + CpaFlatBuffer y; + /**< y coordinate of a point on the curve */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2PointVerifyOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Signature Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2Sign + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2Sign + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2Sign() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2SignOpData { + CpaFlatBuffer k; + /**< scalar multiplier (k > 0 and k < n) */ + CpaFlatBuffer e; + /**< digest of the message */ + CpaFlatBuffer d; + /**< private key (d > 0 and d < n) */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2SignOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Signature Verify Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2Verify + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2Verify + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2Verify() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2VerifyOpData { + CpaFlatBuffer e; + /**< digest of the message */ + CpaFlatBuffer r; + /**< signature r */ + CpaFlatBuffer s; + /**< signature s */ + CpaFlatBuffer xP; + /**< x coordinate of public key */ + CpaFlatBuffer yP; + /**< y coordinate of public key */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2VerifyOpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Key Exchange Phase 1 Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2KeyExPhase1 + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2KeyExPhase1 + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2KeyExPhase1() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2KeyExPhase1OpData { + CpaFlatBuffer r; + /**< scalar multiplier (r > 0 and r < n) */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2KeyExPhase1OpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Key Exchange Phase 2 Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyEcsm2KeyExPhase2 + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. a.pData[0] = MSB. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyEcsm2KeyExPhase2 + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcsm2KeyExPhase2() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2KeyExPhase2OpData { + CpaFlatBuffer r; + /**< scalar multiplier (r > 0 and r < n) */ + CpaFlatBuffer d; + /**< private key (d > 0 and d < n) */ + CpaFlatBuffer x1; + /**< x coordinate of a point on the curve from other side */ + CpaFlatBuffer x2; + /**< x coordinate of a point on the curve from phase 1 */ + CpaFlatBuffer y2; + /**< y coordinate of a point on the curve from phase 1 */ + CpaFlatBuffer xP; + /**< x coordinate of public key from other side */ + CpaFlatBuffer yP; + /**< y coordinate of public key from other side */ + CpaCyEcFieldType fieldType; + /**< field type for the operation */ +} CpaCyEcsm2KeyExPhase2OpData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Encryption Output Data. + * + * @description + * This structure contains the output data of the cpaCyEcsm2Encrypt + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * @see + * cpaCyEcsm2Encrypt() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2EncryptOutputData { + CpaFlatBuffer x1; + /**< x coordinate of [k]G */ + CpaFlatBuffer y1; + /**< y coordinate of [k]G */ + CpaFlatBuffer x2; + /**< x coordinate of [k]Pb */ + CpaFlatBuffer y2; + /**< y coordinate of [k]Pb */ +} CpaCyEcsm2EncryptOutputData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Decryption Output Data. + * + * @description + * This structure contains the output data of the cpaCyEcsm2Decrypt + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * @see + * cpaCyEcsm2Decrypt() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2DecryptOutputData { + CpaFlatBuffer x2; + /**< x coordinate of [k]Pb */ + CpaFlatBuffer y2; + /**< y coordinate of [k]Pb */ +} CpaCyEcsm2DecryptOutputData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * SM2 Key Exchange (Phase 1 & Phase 2) Output Data. + * + * @description + * This structure contains the output data of the key exchange(phase 1 & 2) + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * @see + * cpaCyEcsm2KeyExPhase1(),cpaCyEcsm2KeyExPhase2() + * + *****************************************************************************/ +typedef struct _CpaCyEcsm2KeyExOutputData { + CpaFlatBuffer x; + /**< x coordinate of a point on the curve */ + CpaFlatBuffer y; + /**< y coordinate of a point on the curve */ +} CpaCyEcsm2KeyExOutputData; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * Cryptographic ECSM2 Statistics. + * @description + * This structure contains statistics on the Cryptographic ECSM2 + * operations. Statistics are set to zero when the component is + * initialized, and are collected per instance. + * + ****************************************************************************/ +typedef struct _CpaCyEcsm2Stats64 { + Cpa64U numEcsm2PointMultiplyRequests; + /**< Total number of ECSM2 Point Multiplication operation requests. */ + Cpa64U numEcsm2PointMultiplyRequestErrors; + /**< Total number of ECSM2 Point Multiplication operation requests that + * had an error and could not be processed. */ + Cpa64U numEcsm2PointMultiplyCompleted; + /**< Total number of ECSM2 Point Multiplication operation requests that + * completed successfully. */ + Cpa64U numEcsm2PointMultiplyCompletedError; + /**< Total number of ECSM2 Point Multiplication operation requests that + * could not be completed successfully due to errors. */ + Cpa64U numEcsm2PointMultiplyCompletedOutputInvalid; + /**< Total number of ECSM2 Point Multiplication or Point Verify operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2GeneratorMultiplyRequests; + /**< Total number of ECSM2 Generator Multiplication operation requests. */ + Cpa64U numEcsm2GeneratorMultiplyRequestErrors; + /**< Total number of ECSM2 Generator Multiplication operation requests that + * had an error and could not be processed. */ + Cpa64U numEcsm2GeneratorMultiplyCompleted; + /**< Total number of ECSM2 Generator Multiplication operation requests that + * completed successfully. */ + Cpa64U numEcsm2GeneratorMultiplyCompletedError; + /**< Total number of ECSM2 Generator Multiplication operation requests that + * could not be completed successfully due to errors. */ + Cpa64U numEcsm2GeneratorMultiplyCompletedOutputInvalid; + /**< Total number of ECSM2 Generator Multiplication or Point Verify + * operation requests that could not be completed successfully due to an + * invalid output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2PointVerifyRequests; + /**< Total number of ECSM2 Point Verify operation requests. */ + Cpa64U numEcsm2PointVerifyRequestErrors; + /**< Total number of ECSM2 Point Verify operation requests that had + * an error and could not be processed. */ + Cpa64U numEcsm2PointVerifyCompleted; + /**< Total number of ECSM2 Point Verify operation requests that + * completed successfully. */ + Cpa64U numEcsm2PointVerifyCompletedError; + /**< Total number of ECSM2 Point Verify operation requests that could + * not be completed successfully due to errors. */ + Cpa64U numEcsm2PointVerifyCompletedOutputInvalid; + /**< Total number of ECSM2 Point Verify operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2SignRequests; + /**< Total number of ECSM2 Sign operation requests. */ + Cpa64U numEcsm2SignRequestErrors; + /**< Total number of ECSM2 Sign operation requests that had an error + * and could not be processed. */ + Cpa64U numEcsm2SignCompleted; + /**< Total number of ECSM2 Sign operation requests that completed + * successfully. */ + Cpa64U numEcsm2SignCompletedError; + /**< Total number of ECSM2 Sign operation requests that could + * not be completed successfully due to errors. */ + Cpa64U numEcsm2SignCompletedOutputInvalid; + /**< Total number of ECSM2 Sign operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2VerifyRequests; + /**< Total number of ECSM2 Verify operation requests. */ + Cpa64U numEcsm2VerifyRequestErrors; + /**< Total number of ECSM2 Verify operation requests that had an error + * and could not be processed. */ + Cpa64U numEcsm2VerifyCompleted; + /**< Total number of ECSM2 Verify operation requests that completed + * successfully. */ + Cpa64U numEcsm2VerifyCompletedError; + /**< Total number of ECSM2 Verify operation requests that could + * not be completed successfully due to errors. */ + Cpa64U numEcsm2VerifyCompletedOutputInvalid; + /**< Total number of ECSM2 Verify operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2EncryptRequests; + /**< Total number of ECSM2 Encryption requests. */ + Cpa64U numEcsm2EncryptRequestErrors; + /**< Total number of ECSM2 Point Encryption requests that had + * an error and could not be processed. */ + Cpa64U numEcsm2EncryptCompleted; + /**< Total number of ECSM2 Encryption operation requests that + * completed successfully. */ + Cpa64U numEcsm2EncryptCompletedError; + /**< Total number of ECSM2 Encryption operation requests that could + * not be completed successfully due to errors. */ + Cpa64U numEcsm2EncryptCompletedOutputInvalid; + /**< Total number of ECSM2 Encryption operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2DecryptRequests; + /**< Total number of ECSM2 Decryption operation requests. */ + Cpa64U numEcsm2DecryptRequestErrors; + /**< Total number of ECSM2 Point Decryption requests that had + * an error and could not be processed. */ + Cpa64U numEcsm2DecryptCompleted; + /**< Total number of ECSM2 Decryption operation requests that + * completed successfully. */ + Cpa64U numEcsm2DecryptCompletedError; + /**< Total number of ECSM2 Decryption operation requests that could + * not be completed successfully due to errors. */ + Cpa64U numEcsm2DecryptCompletedOutputInvalid; + /**< Total number of ECSM2 Decryption operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2KeyExPhase1Requests; + /**< Total number of ECSM2 Key Exchange Phase1 operation requests. */ + Cpa64U numEcsm2KeyExPhase1RequestErrors; + /**< Total number of ECSM2 Key Exchange Phase1 operation requests that + * had an error and could not be processed. */ + Cpa64U numEcsm2KeyExPhase1Completed; + /**< Total number of ECSM2 Key Exchange Phase1 operation requests that + * completed successfully. */ + Cpa64U numEcsm2KeyExPhase1CompletedError; + /**< Total number of ECSM2 Key Exchange Phase1 operation requests that + * could not be completed successfully due to errors. */ + Cpa64U numEcsm2KeyExPhase1CompletedOutputInvalid; + /**< Total number of ECSM2 Key Exchange Phase1 operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ + + Cpa64U numEcsm2KeyExPhase2Requests; + /**< Total number of ECSM2 Key Exchange Phase2 operation requests. */ + Cpa64U numEcsm2KeyExPhase2RequestErrors; + /**< Total number of ECSM2 Key Exchange Phase2 operation requests that + * had an error and could not be processed. */ + Cpa64U numEcsm2KeyExPhase2Completed; + /**< Total number of ECSM2 Key Exchange Phase2 operation requests that + * completed successfully. */ + Cpa64U numEcsm2KeyExPhase2CompletedError; + /**< Total number of ECSM2 Key Exchange Phase2 operation requests that + * could not be completed successfully due to errors. */ + Cpa64U numEcsm2KeyExPhase2CompletedOutputInvalid; + /**< Total number of ECSM2 Key Exchange Phase2 operation + * requests that could not be completed successfully due to an invalid + * output. Note that this does not indicate an error. */ +} CpaCyEcsm2Stats64; + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * Definition of callback function invoked for cpaCyEcsm2Sign + * requests. + * + * @description + * This is the callback function for: + * cpaCyEcsm2Sign + * + * @context + * This callback function can be executed in a context that DOES NOT + * permit sleeping to occur. + * @assumptions + * None + * @sideEffects + * None + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] status Status of the operation. Valid values are + * CPA_STATUS_SUCCESS and CPA_STATUS_FAIL. + * @param[in] pOpData A pointer to Operation data supplied in + * request. + * @param[in] pass Indicate whether pOut is valid or not. + * CPA_TRUE == pass, pOut is valid + * CPA_FALSE == pass, pOut is invalid + * @param[in] pR Ecsm2 message signature r. + * @param[in] pS Ecsm2 message signature s. + * + * @retval + * None + * @pre + * Component has been initialized. + * @post + * None + * @note + * None + * @see + * cpaCyEcsm2GeneratorMultiply() + * + *****************************************************************************/ +typedef void (*CpaCyEcsm2SignCbFunc)(void *pCallbackTag, + CpaStatus status, + void *pOpData, + CpaBoolean pass, + CpaFlatBuffer *pR, + CpaFlatBuffer *pS); + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * Definition of callback function invoked for cpaCyEcsm2Verify requests. + * + * @description + * This is the prototype for the CpaCyEcsm2VerifyCbFunc callback function. + * + * @context + * This callback function can be executed in a context that DOES NOT + * permit sleeping to occur. + * @assumptions + * None + * @sideEffects + * None + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] status Status of the operation. Valid values are + * CPA_STATUS_SUCCESS and CPA_STATUS_FAIL. + * @param[in] pOpData Operation data pointer supplied in request. + * @param[in] verifyStatus The verification status. + * + * @retval + * None + * @pre + * Component has been initialized. + * @post + * None + * @note + * None + * @see + * cpaCyEcsm2Verify() + * + *****************************************************************************/ +typedef void (*CpaCyEcsm2VerifyCbFunc)(void *pCallbackTag, + CpaStatus status, + void *pOpData, + CpaBoolean verifyStatus); + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Point Multiplication. + * + * @description + * This function performs SM2 Point Multiplication, multiply + * a point (P) by k (scalar) ([k]P). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pMultiplyStatus Multiply status + * CPA_TRUE == pOutputData is valid + * CPA_FALSE == pOutputData is invalid + * @param[out] pXk x coordinate of the resulting point + * multiplication + * @param[out] pYk y coordinate of the resulting point + * multiplication + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyEcsm2PointMultiplyCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2PointMultiplyOpData, + * CpaCyEcPointMultiplyCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2PointMultiply(const CpaInstanceHandle instanceHandle, + const CpaCyEcPointMultiplyCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2PointMultiplyOpData *pOpData, + CpaBoolean *pMultiplyStatus, + CpaFlatBuffer *pXk, + CpaFlatBuffer *pYk); + +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Generator Multiplication. + * + * @description + * This function performs SM2 Generator Multiplication, multiply the + * generator point (G) by k (scalar) ([k]G). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pMultiplyStatus Multiply status + * CPA_TRUE == pOutputData is valid + * CPA_FALSE == pOutputData is invalid + * @param[out] pXk x coordinate of the resulting point + * multiplication + * @param[out] pYk y coordinate of the resulting point + * multiplication + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyEcPointMultiplyCbFunc is generated in response to this function + * call. For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2GeneratorMultiplyOpData, + * CpaCyEcPointMultiplyCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2GeneratorMultiply(const CpaInstanceHandle instanceHandle, + const CpaCyEcPointMultiplyCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2GeneratorMultiplyOpData *pOpData, + CpaBoolean *pMultiplyStatus, + CpaFlatBuffer *pXk, + CpaFlatBuffer *pYk); + +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Point Verify. + * + * @description + * This function performs SM2 Point Verify, to check if the input point + * on the curve or not. + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pVerifyStatus Verification status + * CPA_TRUE == verify pass + * CPA_FALSE == verify fail + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyEcsm2VerifyCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2PointVerifyOpData, + * CpaCyEcPointVerifyCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2PointVerify(const CpaInstanceHandle instanceHandle, + const CpaCyEcPointVerifyCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2PointVerifyOpData *pOpData, + CpaBoolean *pVerifyStatus); + +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Signature (Step A4 to A7). + * + * @description + * This function implements step A4 to A7 (in Section 5.2 in "Generation + * of Signature" Part 1). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pSignStatus Signature status + * CPA_TRUE = pOutputData is valid + * CPA_FALSE = pOutputData is invalid + * @param[out] pR R output of the resulting signature operation + * @param[out] pS S output of the resulting signature operation + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyEcsm2SignCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2SignOpData, + * CpaCyEcsm2SignCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2Sign(const CpaInstanceHandle instanceHandle, + const CpaCyEcsm2SignCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2SignOpData *pOpData, + CpaBoolean *pSignStatus, + CpaFlatBuffer *pR, + CpaFlatBuffer *pS); + +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Signature Verify (Step B5 to B7). + * + * @description + * This function implements step B5 to B7 (in Section 5.3 in "Verification + * of Signature" Part 1). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pVerifyStatus Status of the signature verification + * CPA_TRUE == verify pass + * CPA_FALSE == verify fail + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyEcsm2VerifyCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2VerifyOpData, + * CpaCyEcsm2VerifyCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2Verify(const CpaInstanceHandle instanceHandle, + const CpaCyEcsm2VerifyCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2VerifyOpData *pOpData, + CpaBoolean *pVerifyStatus); + +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Encryption (Step A2 to A4). + * + * @description + * This function implements step A2 to A4 (in Section 7.2 in + * "Algorithm for Encryption and the Flow Chart" Part 1). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pOutputData Ecrypted message + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyGenFlatBufCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2EncryptOpData, + * CpaCyEcsm2EncryptOutputData, + * CpaCyGenFlatBufCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2Encrypt(const CpaInstanceHandle instanceHandle, + const CpaCyGenFlatBufCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2EncryptOpData *pOpData, + CpaCyEcsm2EncryptOutputData *pOutputData); + +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Decryption (Step B1 to B3). + * + * @description + * This function implements step B1 to B3 (in Section 7.3 in "Algorithm + * for Decryption and the Flow Chart" Part 1). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pOutputData Decrypted message + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyGenFlatBufCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2DecryptOpData, + * CpaCyEcsm2DecryptOutputData, + * CpaCyGenFlatBufCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2Decrypt(const CpaInstanceHandle instanceHandle, + const CpaCyGenFlatBufCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2DecryptOpData *pOpData, + CpaCyEcsm2DecryptOutputData *pOutputData); + +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Key Exchange Phase 1 (Step A2/B2). + * + * @description + * This function implements step A2 (User A) or B2 (User B) + * (in Section 6.2 in "Key Exchange Protocol and the Flow Chart" Part 1). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pOutputData Output of key exchange phase 1 ([r]G) + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyGenFlatBufCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2KeyExPhase1OpData, + * CpaCyEcsm2KeyExOutputData, + * CpaCyGenFlatBufCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2KeyExPhase1(const CpaInstanceHandle instanceHandle, + const CpaCyGenFlatBufCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2KeyExPhase1OpData *pOpData, + CpaCyEcsm2KeyExOutputData *pOutputData); +/** + ***************************************************************************** + * @file cpa_cy_ec.h + * @ingroup cpaCyEcsm2 + * Perform SM2 Key Exchange Phase 2 (Step A4 to A7, B3 to B6). + * + * @description + * This function implements steps A4 to A7(User A) or B3 to B6(User B) + * (in Section 6.2 in "Key Exchange Protocol and the Flow Chart" Part 1). + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pOutputData Output of key exchange phase2. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * When pCb is non-NULL an asynchronous callback of type + * CpaCyGenFlatBufCbFunc is generated in response to this function call. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * + * @see + * CpaCyEcsm2KeyExPhase2OpData, + * CpaCyEcsm2KeyExOutputData, + * CpaCyGenFlatBufCbFunc + * + *****************************************************************************/ +CpaStatus +cpaCyEcsm2KeyExPhase2(const CpaInstanceHandle instanceHandle, + const CpaCyGenFlatBufCbFunc pCb, + void *pCallbackTag, + const CpaCyEcsm2KeyExPhase2OpData *pOpData, + CpaCyEcsm2KeyExOutputData *pOutputData); +/** + ***************************************************************************** + * @file cpa_cy_ecsm2.h + * @ingroup cpaCyEcsm2 + * Query statistics for a specific ECSM2 instance. + * + * @description + * This function will query a specific instance of the ECSM2 implementation + * for statistics. The user MUST allocate the CpaCyEcsm2Stats64 structure + * and pass the reference to that structure into this function call. This + * function writes the statistic results into the passed in + * CpaCyEcsm2Stats64 structure. + * + * Note: statistics returned by this function do not interrupt current data + * processing and as such can be slightly out of sync with operations that + * are in progress during the statistics retrieval process. + * + * @context + * This is a synchronous function and it can sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[out] pEcsm2Stats Pointer to memory into which the statistics + * will be written. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * Component has been initialized. + * @post + * None + * @note + * This function operates in a synchronous manner and no asynchronous + * callback will be generated. + * @see + * CpaCyEcsm2Stats64 + *****************************************************************************/ + +CpaStatus +cpaCyEcsm2QueryStats64(const CpaInstanceHandle instanceHandle_in, + CpaCyEcsm2Stats64 *pEcsm2Stats); + +#ifdef __cplusplus +} /* close the extern "C" { */ +#endif + +#endif /*CPA_CY_ECSM2_H_*/ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_im.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_im.h index 25463a78cacc..2225e364f64a 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_im.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_im.h @@ -1,339 +1,342 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_im.h * * @defgroup cpaCyInstMaint Cryptographic Instance Management API * * @ingroup cpaCy * * @description * These functions specify the Instance Management API for available * Cryptographic Instances. It is expected that these functions will only be * called via a single system maintenance entity, rather than individual * clients. * *****************************************************************************/ #ifndef CPA_CY_IM_H_ #define CPA_CY_IM_H_ #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyInstMaint * Cryptographic Component Initialization and Start function. * * @description * This function will initialize and start the Cryptographic component. * It MUST be called before any other crypto function is called. This * function SHOULD be called only once (either for the very first time, * or after an cpaCyStopInstance call which succeeded) per instance. * Subsequent calls will have no effect. * * @context * This function may sleep, and MUST NOT be called in interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * @param[out] instanceHandle Handle to an instance of this API to be * initialized. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Suggested course of action * is to shutdown and restart. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None. * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * cpaCyStopInstance() * *****************************************************************************/ CpaStatus cpaCyStartInstance(CpaInstanceHandle instanceHandle); /** ***************************************************************************** * @ingroup cpaCyInstMaint * Cryptographic Component Stop function. * * @description * This function will stop the Cryptographic component and free * all system resources associated with it. The client MUST ensure that * all outstanding operations have completed before calling this function. * The recommended approach to ensure this is to deregister all session or * callback handles before calling this function. If outstanding * operations still exist when this function is invoked, the callback * function for each of those operations will NOT be invoked and the * shutdown will continue. If the component is to be restarted, then a * call to cpaCyStartInstance is required. * * @context * This function may sleep, and so MUST NOT be called in interrupt * context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * @param[in] instanceHandle Handle to an instance of this API to be * shutdown. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. Suggested course of action * is to ensure requests are not still being * submitted and that all sessions are * deregistered. If this does not help, then * forcefully remove the component from the * system. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance. * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * cpaCyStartInstance() * *****************************************************************************/ CpaStatus cpaCyStopInstance(CpaInstanceHandle instanceHandle); /** ***************************************************************************** * @ingroup cpaCyInstMaint * Cryptographic Capabilities Info * * @description * This structure contains the capabilities that vary across API * implementations. This structure is used in conjunction with * @ref cpaCyQueryCapabilities() to determine the capabilities supported * by a particular API implementation. * * The client MUST allocate memory for this structure and any members * that require memory. When the structure is passed into the function * ownership of the memory passes to the function. Ownership of the * memory returns to the client when the function returns. *****************************************************************************/ typedef struct _CpaCyCapabilitiesInfo { CpaBoolean symSupported; /**< CPA_TRUE if instance supports the symmetric cryptography API. * See @ref cpaCySym. */ CpaBoolean symDpSupported; /**< CPA_TRUE if instance supports the symmetric cryptography * data plane API. * See @ref cpaCySymDp. */ CpaBoolean dhSupported; /**< CPA_TRUE if instance supports the Diffie Hellman API. * See @ref cpaCyDh. */ CpaBoolean dsaSupported; /**< CPA_TRUE if instance supports the DSA API. * See @ref cpaCyDsa. */ CpaBoolean rsaSupported; /**< CPA_TRUE if instance supports the RSA API. * See @ref cpaCyRsa. */ CpaBoolean ecSupported; /**< CPA_TRUE if instance supports the Elliptic Curve API. * See @ref cpaCyEc. */ CpaBoolean ecdhSupported; /**< CPA_TRUE if instance supports the Elliptic Curve Diffie Hellman API. * See @ref cpaCyEcdh. */ CpaBoolean ecdsaSupported; /**< CPA_TRUE if instance supports the Elliptic Curve DSA API. * See @ref cpaCyEcdsa. */ CpaBoolean keySupported; /**< CPA_TRUE if instance supports the Key Generation API. * See @ref cpaCyKeyGen. */ CpaBoolean lnSupported; /**< CPA_TRUE if instance supports the Large Number API. * See @ref cpaCyLn. */ CpaBoolean primeSupported; /**< CPA_TRUE if instance supports the prime number testing API. * See @ref cpaCyPrime. */ CpaBoolean drbgSupported; /**< CPA_TRUE if instance supports the DRBG API. * See @ref cpaCyDrbg. */ CpaBoolean nrbgSupported; /**< CPA_TRUE if instance supports the NRBG API. * See @ref cpaCyNrbg. */ CpaBoolean randSupported; /**< CPA_TRUE if instance supports the random bit/number generation API. * See @ref cpaCyRand. */ CpaBoolean kptSupported; /**< CPA_TRUE if instance supports the Intel(R) KPT Cryptographic API. * See @ref cpaCyKpt. */ CpaBoolean hkdfSupported; /**< CPA_TRUE if instance supports the HKDF components of the KeyGen API. * See @ref cpaCyKeyGen. */ CpaBoolean extAlgchainSupported; /**< CPA_TRUE if instance supports algorithm chaining for certain * wireless algorithms. Please refer to implementation for details. * See @ref cpaCySym. */ CpaBoolean ecEdMontSupported; /**< CPA_TRUE if instance supports the Edwards and Montgomery elliptic * curves of the EC API. * See @ref cpaCyEc */ + CpaBoolean ecSm2Supported; + /**< CPA_TRUE if instance supports the EcSM2 API. + * See @ref cpaCyEcsm2. */ } CpaCyCapabilitiesInfo; /** ***************************************************************************** * @ingroup cpaCyInstMaint * Returns capabilities of a Cryptographic API instance * * @description * This function is used to query the instance capabilities. * * @context * The function shall not be called in an interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[out] pCapInfo Pointer to capabilities info structure. * All fields in the structure * are populated by the API instance. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The instance has been initialized via the @ref cpaCyStartInstance * function. * @post * None *****************************************************************************/ CpaStatus cpaCyQueryCapabilities(const CpaInstanceHandle instanceHandle, CpaCyCapabilitiesInfo * pCapInfo); /** ***************************************************************************** * @ingroup cpaCyInstMaint * Sets the address translation function * * @description * This function is used to set the virtual to physical address * translation routine for the instance. The specified routine * is used by the instance to perform any required translation of * a virtual address to a physical address. If the application * does not invoke this function, then the instance will use its * default method, such as virt2phys, for address translation. * @context * The function shall not be called in an interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[in] virtual2Physical Routine that performs virtual to * physical address translation. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * None * @post * None * @see * None * *****************************************************************************/ CpaStatus cpaCySetAddressTranslation(const CpaInstanceHandle instanceHandle, CpaVirtualToPhysical virtual2Physical); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /*CPA_CY_IM_H_*/ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_key.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_key.h index 6162647b120b..3d013271e80b 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_key.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_key.h @@ -1,1207 +1,1204 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_key.h * * @defgroup cpaCyKeyGen Cryptographic Key and Mask Generation API * * @ingroup cpaCy * * @description * These functions specify the API for key and mask generation * operations. * *****************************************************************************/ #ifndef CPA_CY_KEY_H #define CPA_CY_KEY_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" #include "cpa_cy_sym.h" /* needed for hash algorithm, for MGF */ /** ***************************************************************************** * @ingroup cpaCyKeyGen * SSL or TLS key generation random number length. * * @description * Defines the permitted SSL or TLS random number length in bytes that * may be used with the functions @ref cpaCyKeyGenSsl and @ref * cpaCyKeyGenTls. This is the length of the client or server random * number values. *****************************************************************************/ #define CPA_CY_KEY_GEN_SSL_TLS_RANDOM_LEN_IN_BYTES (32) /** ***************************************************************************** * @ingroup cpaCyKeyGen * SSL Operation Types * @description * Enumeration of the different SSL operations that can be specified in * the struct @ref CpaCyKeyGenSslOpData. It identifies the label. *****************************************************************************/ typedef enum _CpaCyKeySslOp { CPA_CY_KEY_SSL_OP_MASTER_SECRET_DERIVE = 1, /**< Derive the master secret */ CPA_CY_KEY_SSL_OP_KEY_MATERIAL_DERIVE, /**< Derive the key material */ CPA_CY_KEY_SSL_OP_USER_DEFINED /**< User Defined Operation for custom labels*/ } CpaCyKeySslOp; /** ***************************************************************************** * @ingroup cpaCyKeyGen * SSL data for key generation functions * @description * This structure contains data for use in key generation operations for * SSL. For specific SSL key generation operations, the structure fields * MUST be set as follows: * * @par SSL Master-Secret Derivation: *
sslOp = CPA_CY_KEY_SSL_OP_MASTER_SECRET_DERIVE *
secret = pre-master secret key *
seed = client_random + server_random *
userLabel = NULL * * @par SSL Key-Material Derivation: *
sslOp = CPA_CY_KEY_SSL_OP_KEY_MATERIAL_DERIVE *
secret = master secret key *
seed = server_random + client_random *
userLabel = NULL * *
Note that the client/server random order is reversed from that * used for master-secret derivation. * * @note Each of the client and server random numbers need to be of * length CPA_CY_KEY_GEN_SSL_TLS_RANDOM_LEN_IN_BYTES. * * @note In each of the above descriptions, + indicates concatenation. * * @note The label used is predetermined by the SSL operation in line * with the SSL 3.0 specification, and can be overridden by using * a user defined operation CPA_CY_KEY_SSL_OP_USER_DEFINED and * associated userLabel. * ****************************************************************************/ typedef struct _CpaCyKeyGenSslOpData { CpaCyKeySslOp sslOp; /**< Indicate the SSL operation to be performed */ CpaFlatBuffer secret; /**< Flat buffer containing a pointer to either the master or pre-master * secret key. The length field indicates the length of the secret key in * bytes. Implementation-specific limits may apply to this length. */ CpaFlatBuffer seed; /**< Flat buffer containing a pointer to the seed data. * Implementation-specific limits may apply to this length. */ CpaFlatBuffer info; /**< Flat buffer containing a pointer to the info data. * Implementation-specific limits may apply to this length. */ Cpa32U generatedKeyLenInBytes; /**< The requested length of the generated key in bytes. * Implementation-specific limits may apply to this length. */ CpaFlatBuffer userLabel; /**< Optional flat buffer containing a pointer to a user defined label. * The length field indicates the length of the label in bytes. To use this * field, the sslOp must be CPA_CY_KEY_SSL_OP_USER_DEFINED, * or otherwise it is ignored and can be set to NULL. - * Implementation-specific limits - * may apply to this length. */ + * Implementation-specific limits may apply to this length. */ } CpaCyKeyGenSslOpData; /** ***************************************************************************** * @ingroup cpaCyKeyGen * TLS Operation Types * @description * Enumeration of the different TLS operations that can be specified in * the CpaCyKeyGenTlsOpData. It identifies the label. * * The functions @ref cpaCyKeyGenTls and @ref cpaCyKeyGenTls2 * accelerate the TLS PRF, which is defined as part of RFC2246 (TLS * v1.0), RFC4346 (TLS v1.1), and RFC5246 (TLS v1.2). * One of the inputs to each of these functions is a label. * This enumerated type defines values that correspond to some of * the required labels. * However, for some of the operations/labels required by these RFCs, * no values are specified. * * In such cases, a user-defined value must be provided. The client * should use the enum value @ref CPA_CY_KEY_TLS_OP_USER_DEFINED, and * pass the label using the userLabel field of the @ref * CpaCyKeyGenTlsOpData data structure. * *****************************************************************************/ typedef enum _CpaCyKeyTlsOp { CPA_CY_KEY_TLS_OP_MASTER_SECRET_DERIVE = 1, /**< Derive the master secret using the TLS PRF. * Corresponds to RFC2246/5246 section 8.1, operation "Computing the * master secret", label "master secret". */ CPA_CY_KEY_TLS_OP_KEY_MATERIAL_DERIVE, /**< Derive the key material using the TLS PRF. * Corresponds to RFC2246/5246 section 6.3, operation "Derive the key * material", label "key expansion". */ CPA_CY_KEY_TLS_OP_CLIENT_FINISHED_DERIVE, /**< Derive the client finished tag using the TLS PRF. * Corresponds to RFC2246/5246 section 7.4.9, operation "Client finished", * label "client finished". */ CPA_CY_KEY_TLS_OP_SERVER_FINISHED_DERIVE, /**< Derive the server finished tag using the TLS PRF. * Corresponds to RFC2246/5246 section 7.4.9, operation "Server finished", * label "server finished". */ CPA_CY_KEY_TLS_OP_USER_DEFINED /**< User Defined Operation for custom labels. */ } CpaCyKeyTlsOp; /** ***************************************************************************** * @file cpa_cy_key.h * @ingroup cpaCyKeyGen * TLS Operation Types * @description * Enumeration of the different TLS operations that can be specified in * the CpaCyKeyGenHKDFOpData. * * The function @ref cpaCyKeyGenTls3 * accelerates the TLS HKDF, which is defined as part of RFC5869 (HKDF) * and RFC8446 (TLS v1.3). * * This enumerated type defines the support HKDF operations for * extraction and expansion of keying material. * *****************************************************************************/ typedef enum _CpaCyKeyHKDFOp { CPA_CY_HKDF_KEY_EXTRACT = 12, /**< HKDF Extract operation * Corresponds to RFC5869 section 2.2, step 1 "Extract" */ CPA_CY_HKDF_KEY_EXPAND, /**< HKDF Expand operation * Corresponds to RFC5869 section 2.3, step 2 "Expand" */ CPA_CY_HKDF_KEY_EXTRACT_EXPAND, /**< HKDF operation * This performs HKDF_EXTRACT and HKDF_EXPAND in a single * API invocation. */ CPA_CY_HKDF_KEY_EXPAND_LABEL , /**< HKDF Expand label operation for TLS 1.3 * Corresponds to RFC8446 section 7.1 Key Schedule definition for * HKDF-Expand-Label, which refers to HKDF-Expand defined in RFC5869. */ CPA_CY_HKDF_KEY_EXTRACT_EXPAND_LABEL /**< HKDF Extract plus Expand label operation for TLS 1.3 * Corresponds to RFC5869 section 2.2, step 1 "Extract" followed by * RFC8446 section 7.1 Key Schedule definition for * HKDF-Expand-Label, which refers to HKDF-Expand defined in RFC5869. */ } CpaCyKeyHKDFOp; /** ***************************************************************************** * @file cpa_cy_key.h * @ingroup cpaCyKeyGen * TLS Operation Types * @description * Enumeration of the different cipher suites that may be used in a TLS * v1.3 operation. This value is used to infer the sizes of the key * and iv sublabel. * * The function @ref cpaCyKeyGenTls3 * accelerates the TLS HKDF, which is defined as part of RFC5869 (HKDF) * and RFC8446 (TLS v1.3). * * This enumerated type defines the supported cipher suites in the * TLS operation that require HKDF key operations. * *****************************************************************************/ typedef enum _CpaCyKeyHKDFCipherSuite { CPA_CY_HKDF_TLS_AES_128_GCM_SHA256 = 1, CPA_CY_HKDF_TLS_AES_256_GCM_SHA384, CPA_CY_HKDF_TLS_CHACHA20_POLY1305_SHA256 , CPA_CY_HKDF_TLS_AES_128_CCM_SHA256, CPA_CY_HKDF_TLS_AES_128_CCM_8_SHA256 } CpaCyKeyHKDFCipherSuite; /** ***************************************************************************** * @file cpa_cy_key.h * @ingroup cpaCyKeyGen * TLS Operation Types * @description * Bitwise constants for HKDF sublabels * * These definitions provide bit settings for sublabels for * HKDF-ExpandLabel operations. * *
key sublabel to generate "key" keying material *
iv sublabel to generate "iv" keying material *
resumption sublabel to generate "resumption" keying material *
finished sublabel to generate "finished" keying material * *****************************************************************************/ #define CPA_CY_HKDF_SUBLABEL_KEY ((Cpa16U)0x0001) /**< Bit for creation of key material for 'key' sublabel */ #define CPA_CY_HKDF_SUBLABEL_IV ((Cpa16U)0x0002) /**< Bit for creation of key material for 'iv' sublabel */ #define CPA_CY_HKDF_SUBLABEL_RESUMPTION ((Cpa16U)0x0004) /**< Bit for creation of key material for 'resumption' sublabel */ #define CPA_CY_HKDF_SUBLABEL_FINISHED ((Cpa16U)0x0008) /**< Bit for creation of key material for 'finished' sublabel */ -#define CPA_CY_HKDF_KEY_MAX_SECRET_SZ ((Cpa8U)64) +#define CPA_CY_HKDF_KEY_MAX_SECRET_SZ ((Cpa8U)80) /** space in bytes PSK or (EC)DH */ #define CPA_CY_HKDF_KEY_MAX_HMAC_SZ ((Cpa8U)48) /** space in bytes of CPA_CY_SYM_HASH_SHA384 result */ #define CPA_CY_HKDF_KEY_MAX_INFO_SZ ((Cpa8U)80) /** space in bytes of largest info needed for TLS 1.3, * rounded up to multiple of 8 */ #define CPA_CY_HKDF_KEY_MAX_LABEL_SZ ((Cpa8U)78) /** space in bytes of largest label for TLS 1.3 */ #define CPA_CY_HKDF_KEY_MAX_LABEL_COUNT ((Cpa8U)4) /** Maximum number of labels in op structure */ /** ***************************************************************************** * @file cpa_cy_key.h * @ingroup cpaCyKeyGen * TLS data for key generation functions * @description * This structure contains data for describing label for the * HKDF Extract Label function * * @par Extract Label Function *
labelLen = length of the label field *
contextLen = length of the context field *
sublabelFlag = Mask of sub labels required for this label. *
label = label as defined in RFC8446 *
context = context as defined in RFC8446 * ****************************************************************************/ typedef struct _CpaCyKeyGenHKDFExpandLabel { Cpa8U label[CPA_CY_HKDF_KEY_MAX_LABEL_SZ]; /**< HKDFLabel field as defined in RFC8446 sec 7.1. */ Cpa8U labelLen; /**< The length, in bytes of the label */ Cpa8U sublabelFlag; /**< mask of sublabels to be generated. * This flag is composed of zero or more of: * CPA_CY_HKDF_SUBLABEL_KEY * CPA_CY_HKDF_SUBLABEL_IV * CPA_CY_HKDF_SUBLABEL_RESUMPTION * CPA_CY_HKDF_SUBLABEL_FINISHED */ } CpaCyKeyGenHKDFExpandLabel; /** ***************************************************************************** - * @file cpa_cy_key.h * @ingroup cpaCyKeyGen * TLS data for key generation functions * @description * This structure contains data for all HKDF operations: *
HKDF Extract *
HKDF Expand *
HKDF Expand Label *
HKDF Extract and Expand *
HKDF Extract and Expand Label * * @par HKDF Map Structure Elements *
secret - IKM value for extract operations or PRK for expand * or expand operations. *
seed - contains the salt for extract * operations *
info - contains the info data for extract operations *
labels - See notes above * ****************************************************************************/ typedef struct _CpaCyKeyGenHKDFOpData { CpaCyKeyHKDFOp hkdfKeyOp; /**< Keying operation to be performed. */ Cpa8U secretLen; /**< Length of secret field */ Cpa16U seedLen; /**< Length of seed field */ Cpa16U infoLen; /**< Length of info field */ Cpa16U numLabels; /**< Number of filled CpaCyKeyGenHKDFExpandLabel elements */ Cpa8U secret[CPA_CY_HKDF_KEY_MAX_SECRET_SZ]; /**< Input Key Material or PRK */ Cpa8U seed[CPA_CY_HKDF_KEY_MAX_HMAC_SZ]; /**< Input salt */ Cpa8U info[CPA_CY_HKDF_KEY_MAX_INFO_SZ]; /**< info field */ CpaCyKeyGenHKDFExpandLabel label[CPA_CY_HKDF_KEY_MAX_LABEL_COUNT]; /**< array of Expand Label structures */ } CpaCyKeyGenHKDFOpData; /** ***************************************************************************** * @ingroup cpaCyKeyGen * TLS data for key generation functions * @description * This structure contains data for use in key generation operations for * TLS. For specific TLS key generation operations, the structure fields * MUST be set as follows: * * @par TLS Master-Secret Derivation: *
tlsOp = CPA_CY_KEY_TLS_OP_MASTER_SECRET_DERIVE *
secret = pre-master secret key *
seed = client_random + server_random *
userLabel = NULL * * @par TLS Key-Material Derivation: *
tlsOp = CPA_CY_KEY_TLS_OP_KEY_MATERIAL_DERIVE *
secret = master secret key *
seed = server_random + client_random *
userLabel = NULL * *
Note that the client/server random order is reversed from * that used for Master-Secret Derivation. * * @par TLS Client finished/Server finished tag Derivation: *
tlsOp = CPA_CY_KEY_TLS_OP_CLIENT_FINISHED_DERIVE (client) *
or CPA_CY_KEY_TLS_OP_SERVER_FINISHED_DERIVE (server) *
secret = master secret key *
seed = MD5(handshake_messages) + SHA-1(handshake_messages) *
userLabel = NULL * * @note Each of the client and server random seeds need to be of * length CPA_CY_KEY_GEN_SSL_TLS_RANDOM_LEN_IN_BYTES. * @note In each of the above descriptions, + indicates concatenation. * @note The label used is predetermined by the TLS operation in line * with the TLS specifications, and can be overridden by using * a user defined operation CPA_CY_KEY_TLS_OP_USER_DEFINED * and associated userLabel. * ****************************************************************************/ typedef struct _CpaCyKeyGenTlsOpData { CpaCyKeyTlsOp tlsOp; /**< TLS operation to be performed */ CpaFlatBuffer secret; /**< Flat buffer containing a pointer to either the master or pre-master * secret key. The length field indicates the length of the secret in * bytes. */ CpaFlatBuffer seed; /**< Flat buffer containing a pointer to the seed data. * Implementation-specific limits may apply to this length. */ Cpa32U generatedKeyLenInBytes; /**< The requested length of the generated key in bytes. * Implementation-specific limits may apply to this length. */ CpaFlatBuffer userLabel; /**< Optional flat buffer containing a pointer to a user defined label. * The length field indicates the length of the label in bytes. To use this * field, the tlsOp must be CPA_CY_KEY_TLS_OP_USER_DEFINED. * Implementation-specific limits may apply to this length. */ } CpaCyKeyGenTlsOpData; /** ***************************************************************************** * @ingroup cpaCyKeyGen * Key Generation Mask Generation Function (MGF) Data * @description * This structure contains data relating to Mask Generation Function * key generation operations. * * @note The default hash algorithm used by the MGF is SHA-1. If a * different hash algorithm is preferred, then see the extended * version of this structure, @ref CpaCyKeyGenMgfOpDataExt. * @see * cpaCyKeyGenMgf ****************************************************************************/ typedef struct _CpaCyKeyGenMgfOpData { CpaFlatBuffer seedBuffer; /**< Caller MUST allocate a buffer and populate with the input seed * data. For optimal performance the start of the seed SHOULD be allocated * on an 8-byte boundary. The length field represents the seed length in * bytes. Implementation-specific limits may apply to this length. */ Cpa32U maskLenInBytes; /**< The requested length of the generated mask in bytes. * Implementation-specific limits may apply to this length. */ } CpaCyKeyGenMgfOpData; /** ***************************************************************************** * @ingroup cpaCyKeyGen * Extension to the original Key Generation Mask Generation Function * (MGF) Data * @description * This structure is an extension to the original MGF data structure. * The extension allows the hash function to be specified. * @note * This structure is separate from the base @ref CpaCyKeyGenMgfOpData * structure in order to retain backwards compatibility with the * original version of the API. * @see * cpaCyKeyGenMgfExt ****************************************************************************/ typedef struct _CpaCyKeyGenMgfOpDataExt { CpaCyKeyGenMgfOpData baseOpData; /**< "Base" operational data for MGF generation */ CpaCySymHashAlgorithm hashAlgorithm; /**< Specifies the hash algorithm to be used by the Mask Generation * Function */ } CpaCyKeyGenMgfOpDataExt; /** ***************************************************************************** * @ingroup cpaCyKeyGen * Key Generation Statistics. * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by @ref CpaCyKeyGenStats64. * @description * This structure contains statistics on the key and mask generation * operations. Statistics are set to zero when the component is * initialized, and are collected per instance. * ****************************************************************************/ typedef struct _CpaCyKeyGenStats { Cpa32U numSslKeyGenRequests; /**< Total number of successful SSL key generation requests. */ Cpa32U numSslKeyGenRequestErrors; /**< Total number of SSL key generation requests that had an error and * could not be processed. */ Cpa32U numSslKeyGenCompleted; /**< Total number of SSL key generation operations that completed * successfully. */ Cpa32U numSslKeyGenCompletedErrors; /**< Total number of SSL key generation operations that could not be * completed successfully due to errors. */ Cpa32U numTlsKeyGenRequests; /**< Total number of successful TLS key generation requests. */ Cpa32U numTlsKeyGenRequestErrors; /**< Total number of TLS key generation requests that had an error and * could not be processed. */ Cpa32U numTlsKeyGenCompleted; /**< Total number of TLS key generation operations that completed * successfully. */ Cpa32U numTlsKeyGenCompletedErrors; /**< Total number of TLS key generation operations that could not be * completed successfully due to errors. */ Cpa32U numMgfKeyGenRequests; /**< Total number of successful MGF key generation requests (including * "extended" MGF requests). */ Cpa32U numMgfKeyGenRequestErrors; /**< Total number of MGF key generation requests that had an error and * could not be processed. */ Cpa32U numMgfKeyGenCompleted; /**< Total number of MGF key generation operations that completed * successfully. */ Cpa32U numMgfKeyGenCompletedErrors; /**< Total number of MGF key generation operations that could not be * completed successfully due to errors. */ } CpaCyKeyGenStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyKeyGen * Key Generation Statistics (64-bit version). * @description * This structure contains the 64-bit version of the statistics * on the key and mask generation operations. * Statistics are set to zero when the component is * initialized, and are collected per instance. * ****************************************************************************/ typedef struct _CpaCyKeyGenStats64 { Cpa64U numSslKeyGenRequests; /**< Total number of successful SSL key generation requests. */ Cpa64U numSslKeyGenRequestErrors; /**< Total number of SSL key generation requests that had an error and * could not be processed. */ Cpa64U numSslKeyGenCompleted; /**< Total number of SSL key generation operations that completed * successfully. */ Cpa64U numSslKeyGenCompletedErrors; /**< Total number of SSL key generation operations that could not be * completed successfully due to errors. */ Cpa64U numTlsKeyGenRequests; /**< Total number of successful TLS key generation requests. */ Cpa64U numTlsKeyGenRequestErrors; /**< Total number of TLS key generation requests that had an error and * could not be processed. */ Cpa64U numTlsKeyGenCompleted; /**< Total number of TLS key generation operations that completed * successfully. */ Cpa64U numTlsKeyGenCompletedErrors; /**< Total number of TLS key generation operations that could not be * completed successfully due to errors. */ Cpa64U numMgfKeyGenRequests; /**< Total number of successful MGF key generation requests (including * "extended" MGF requests). */ Cpa64U numMgfKeyGenRequestErrors; /**< Total number of MGF key generation requests that had an error and * could not be processed. */ Cpa64U numMgfKeyGenCompleted; /**< Total number of MGF key generation operations that completed * successfully. */ Cpa64U numMgfKeyGenCompletedErrors; /**< Total number of MGF key generation operations that could not be * completed successfully due to errors. */ } CpaCyKeyGenStats64; /** ***************************************************************************** * @ingroup cpaCyKeyGen * SSL Key Generation Function. * @description * This function is used for SSL key generation. It implements the key * generation function defined in section 6.2.2 of the SSL 3.0 * specification as described in * http://www.mozilla.org/projects/security/pki/nss/ssl/draft302.txt. * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenSslOpData Structure containing all the data * needed to perform the SSL key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @see * CpaCyKeyGenSslOpData, * CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyKeyGenSsl(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenSslOpData *pKeyGenSslOpData, CpaFlatBuffer *pGeneratedKeyBuffer); /** ***************************************************************************** * @ingroup cpaCyKeyGen * TLS Key Generation Function. * @description * This function is used for TLS key generation. It implements the * TLS PRF (Pseudo Random Function) as defined by RFC2246 (TLS v1.0) * and RFC4346 (TLS v1.1). * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenTlsOpData Structure containing all the data * needed to perform the TLS key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @see * CpaCyKeyGenTlsOpData, * CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyKeyGenTls(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenTlsOpData *pKeyGenTlsOpData, CpaFlatBuffer *pGeneratedKeyBuffer); /** ***************************************************************************** * @ingroup cpaCyKeyGen * TLS Key Generation Function version 2. * @description * This function is used for TLS key generation. It implements the * TLS PRF (Pseudo Random Function) as defined by RFC5246 (TLS v1.2). * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenTlsOpData Structure containing all the data * needed to perform the TLS key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @see * CpaCyKeyGenTlsOpData, * CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyKeyGenTls2(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenTlsOpData *pKeyGenTlsOpData, CpaCySymHashAlgorithm hashAlgorithm, CpaFlatBuffer *pGeneratedKeyBuffer); /** ***************************************************************************** - * @file cpa_cy_key.h * @ingroup cpaCyKeyGen * TLS Key Generation Function version 3. * @description * This function is used for TLS key generation. It implements the * TLS HKDF (HMAC Key Derivation Function) as defined by * RFC5689 (HKDF) and RFC8446 (TLS 1.3). * * The input seed is taken as a flat buffer and the generated key is * returned to caller in a flat destination data buffer. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific * call. Will be returned unchanged in the * callback. * @param[in] pKeyGenTlsOpData Structure containing all the data * needed to perform the TLS key * generation operation. The client code * allocates the memory for this * structure. This component takes * ownership of the memory until it is * returned in the callback. The memory * must be pinned and contiguous, suitable * for DMA operations. * @param[in] hashAlgorithm Specifies the hash algorithm to use. * According to RFC5246, this should be * "SHA-256 or a stronger standard hash * function." * @param[out] pGeneratedKeyBuffer Caller MUST allocate a sufficient * buffer to hold the key generation * output. The data pointer SHOULD be * aligned on an 8-byte boundary. The * length field passed in represents the * size of the buffer in bytes. The value * that is returned is the size of the * result key in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @see * CpaCyGenFlatBufCbFunc * CpaCyKeyGenHKDFOpData * *****************************************************************************/ CpaStatus cpaCyKeyGenTls3(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenHKDFOpData *pKeyGenTlsOpData, CpaCyKeyHKDFCipherSuite cipherSuite, CpaFlatBuffer *pGeneratedKeyBuffer); /** ***************************************************************************** * @ingroup cpaCyKeyGen * Mask Generation Function. * @description * This function implements the mask generation function MGF1 as * defined by PKCS#1 v2.1, and RFC3447. The input seed is taken * as a flat buffer and the generated mask is returned to caller in a * flat destination data buffer. * * @note The default hash algorithm used by the MGF is SHA-1. If a * different hash algorithm is preferred, then see the "extended" * version of this function, @ref cpaCyKeyGenMgfExt. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific call. * Will be returned unchanged in the * callback. * @param[in] pKeyGenMgfOpData Structure containing all the data needed * to perform the MGF key generation * operation. The client code allocates the * memory for this structure. This * component takes ownership of the memory * until it is returned in the callback. * @param[out] pGeneratedMaskBuffer Caller MUST allocate a sufficient buffer * to hold the generated mask. The data * pointer SHOULD be aligned on an 8-byte * boundary. The length field passed in * represents the size of the buffer in * bytes. The value that is returned is the * size of the generated mask in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @see * CpaCyKeyGenMgfOpData, * CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyKeyGenMgf(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenMgfOpData *pKeyGenMgfOpData, CpaFlatBuffer *pGeneratedMaskBuffer); /** ***************************************************************************** * @ingroup cpaCyKeyGen * Extended Mask Generation Function. * @description * This function is used for mask generation. It differs from the "base" * version of the function (@ref cpaCyKeyGenMgf) in that it allows * the hash function used by the Mask Generation Function to be * specified. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pKeyGenCb Pointer to callback function to be * invoked when the operation is complete. * If this is set to a NULL value the * function will operate synchronously. * @param[in] pCallbackTag Opaque User Data for this specific call. * Will be returned unchanged in the * callback. * @param[in] pKeyGenMgfOpDataExt Structure containing all the data needed * to perform the extended MGF key generation * operation. The client code allocates the * memory for this structure. This * component takes ownership of the memory * until it is returned in the callback. * @param[out] pGeneratedMaskBuffer Caller MUST allocate a sufficient buffer * to hold the generated mask. The data * pointer SHOULD be aligned on an 8-byte * boundary. The length field passed in * represents the size of the buffer in * bytes. The value that is returned is the * size of the generated mask in bytes. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * This function is only used to generate a mask keys from seed * material. * @see * CpaCyKeyGenMgfOpData, * CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyKeyGenMgfExt(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pKeyGenCb, void *pCallbackTag, const CpaCyKeyGenMgfOpDataExt *pKeyGenMgfOpDataExt, CpaFlatBuffer *pGeneratedMaskBuffer); /** ***************************************************************************** * @ingroup cpaCyKeyGen * Queries the Key and Mask generation statistics specific to * an instance. * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyKeyGenQueryStats64(). * * @description * This function will query a specific instance for key and mask * generation statistics. The user MUST allocate the CpaCyKeyGenStats * structure and pass the reference to that into this function call. This * function will write the statistic results into the passed in * CpaCyKeyGenStats structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pKeyGenStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * * @see * CpaCyKeyGenStats * *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyKeyGenQueryStats(const CpaInstanceHandle instanceHandle, struct _CpaCyKeyGenStats *pKeyGenStats); /** ***************************************************************************** * @ingroup cpaCyKeyGen * Queries the Key and Mask generation statistics (64-bit version) * specific to an instance. * * @description * This function will query a specific instance for key and mask * generation statistics. The user MUST allocate the CpaCyKeyGenStats64 * structure and pass the reference to that into this function call. This * function will write the statistic results into the passed in * CpaCyKeyGenStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pKeyGenStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. * Resubmit the request. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * * @see * CpaCyKeyGenStats64 *****************************************************************************/ CpaStatus cpaCyKeyGenQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyKeyGenStats64 *pKeyGenStats); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_KEY_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_kpt.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_kpt.h new file mode 100644 index 000000000000..612b86dbe488 --- /dev/null +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_kpt.h @@ -0,0 +1,853 @@ +/*************************************************************************** + * + * BSD LICENSE + * + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + ***************************************************************************/ + +/* + ***************************************************************************** + * Doxygen group definitions + ****************************************************************************/ + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * + * @defgroup cpaCyKpt Intel(R) Key Protection Technology (KPT) Cryptographic API + * + * @ingroup cpaCy + * + * @description + * These functions specify the APIs for Key Protection Technology (KPT) + * Cryptographic services. + * + * @note + * These functions implement the KPT Cryptographic API. + * This API is experimental and subject to change. + * + *****************************************************************************/ + +#ifndef __CPA_CY_KPT_H__ +#define __CPA_CY_KPT_H__ + +#ifdef __cplusplus +extern "C" { +#endif +#include "cpa_cy_common.h" +#include "cpa_cy_rsa.h" +#include "cpa_cy_ecdsa.h" +#include "cpa_cy_ec.h" + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * KPT wrapping key handle + * + * @description + * Handle to a unique wrapping key in wrapping key table. Application + * creates it in KPT key transfer phase and maintains it for KPT Crypto + * service. For each KPT Crypto service API invocation, this handle will + * be used to get a SWK(Symmetric Wrapping Key) to unwrap + * WPK(Wrapped Private Key) before performing the requested crypto + * service. + * + *****************************************************************************/ +typedef Cpa64U CpaCyKptHandle; + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * Return Status + * @description + * This enumeration lists all the possible return status after completing + * KPT APIs. + * + *****************************************************************************/ +typedef enum CpaCyKptKeyManagementStatus_t +{ + CPA_CY_KPT_SUCCESS = 0, + /**< Generic success status for all KPT wrapping key handling functions*/ + CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_VFID, + /**< SWK count exceeds the configured maxmium value per VFID*/ + CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_PASID, + /**< SWK count exceeds the configured maxmium value per PASID*/ + CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED, + /**< SWK count exceeds the configured maxmium value when not scoped to + * VFID or PASID*/ + CPA_CY_KPT_SWK_FAIL_NOT_FOUND, + /**< Unable to find SWK entry by handle */ + CPA_CY_KPT_FAILED, +} CpaCyKptKeyManagementStatus; + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * PKCS#1 v2.2 RSA-3K signature output length in bytes. + * @see CpaCyKptValidationKey + * + *****************************************************************************/ +#define CPA_CY_RSA3K_SIG_SIZE_INBYTES 384 + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * KPT device credentials key certificate + * @description + * This structure defines the key format for use with KPT. + * @see + * cpaCyKptQueryDeviceCredentials + * + *****************************************************************************/ +typedef struct CpaCyKptValidationKey_t +{ + CpaCyRsaPublicKey publicKey; + /**< Key */ + Cpa8U signature[CPA_CY_RSA3K_SIG_SIZE_INBYTES]; + /**< Signature of key */ +} CpaCyKptValidationKey; + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * Cipher algorithms used to generate a wrapped private key (WPK) from + * the clear private key. + * + * @description + * This enumeration lists supported cipher algorithms and modes. + * + *****************************************************************************/ +typedef enum CpaCyKptWrappingKeyType_t +{ + CPA_CY_KPT_WRAPPING_KEY_TYPE_AES256_GCM = 0 +} CpaCyKptWrappingKeyType; + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * KPT Loading key format specification. + * @description + * This structure defines the format of the symmetric wrapping key to be + * loaded into KPT. Application sets these parameters through the + * cpaCyKptLoadKey calls. + * + *****************************************************************************/ +typedef struct CpaCyKptLoadKey_t +{ + CpaFlatBuffer eSWK; + /**< Encrypted SWK */ + CpaCyKptWrappingKeyType wrappingAlgorithm; + /**< Symmetric wrapping algorithm */ +} CpaCyKptLoadKey; + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * Max length of initialization vector + * @description + * Defines the permitted max iv length in bytes that may be used in + * private key wrapping/unwrapping.For AEC-GCM, iv length is 12 bytes. + * + *@see cpaCyKptUnwrapContext + * + *****************************************************************************/ +#define CPA_CY_KPT_MAX_IV_LENGTH (12) + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * Max length of Additional Authenticated Data + * @description + * Defines the permitted max aad length in bytes that may be used in + * private key wrapping/unwrapping. + * + *@see cpaCyKptUnwrapContext + * + *****************************************************************************/ +#define CPA_CY_KPT_MAX_AAD_LENGTH (16) + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * Structure of KPT unwrapping context. + * @description + * This structure is a parameter of KPT crypto APIs, it contains data + * relating to KPT WPK unwrapping, the application needs to fill in this + * information. + * + *****************************************************************************/ +typedef struct CpaCyKptUnwrapContext_t +{ + CpaCyKptHandle kptHandle; + /**< This is application's unique handle that identifies its + * (symmetric) wrapping key*/ + Cpa8U iv[CPA_CY_KPT_MAX_IV_LENGTH]; + /**< Initialization Vector */ + Cpa8U additionalAuthData[CPA_CY_KPT_MAX_AAD_LENGTH]; + /**< A buffer holding the Additional Authenticated Data.*/ + Cpa32U aadLenInBytes; + /**< Number of bytes representing the size of AAD within additionalAuthData + * buffer. */ +} CpaCyKptUnwrapContext; + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * RSA Private Key Structure For Representation 1. + * @description + * This structure contains the first representation that can be used for + * describing the RSA private key, represented by the tuple of the + * modulus (N) and the private exponent (D). + * The representation is encrypted as follows: + * Encrypt - AES-256-GCM (Key, AAD, Input) + * "||" - denotes concatenation + * Key = SWK + * AAD = DER(OID) + * Input = (D || N) + * Encrypt (SWK, AAD, (D || N)) + * Output (AuthTag, (D || N)') + * EncryptedRSAKey = (D || N)' + * + * privateKey = (EncryptedRSAKey || AuthTag) + * + * OID's that shall be supported by KPT implementation: + * OID DER(OID) + * 1.2.840.113549.1.1 06 08 2A 86 48 86 F7 0D 01 01 + * + * Permitted lengths for N and D are: + * - 512 bits (64 bytes), + * - 1024 bits (128 bytes), + * - 1536 bits (192 bytes), + * - 2048 bits (256 bytes), + * - 3072 bits (384 bytes), + * - 4096 bits (512 bytes), or + * - 8192 bits (1024 bytes). + * + * AuthTag is 128 bits (16 bytes) + * + * @note It is important that the value D is big enough. It is STRONGLY + * recommended that this value is at least half the length of the modulus + * N to protect against the Wiener attack. + * + *****************************************************************************/ +typedef struct CpaCyKptRsaPrivateKeyRep1_t +{ + CpaFlatBuffer privateKey; + /**< The EncryptedRSAKey concatenated with AuthTag */ +} CpaCyKptRsaPrivateKeyRep1; + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * KPT RSA Private Key Structure For Representation 2. + * @description + * This structure contains the second representation that can be used for + * describing the RSA private key. The quintuple of p, q, dP, dQ, and qInv + * (explained below and in the spec) are required for the second + * representation. For KPT the parameters are Encrypted + * with the assoicated SWK as follows: + * Encrypt - AES-256-GCM (Key, AAD, Input) + * "||" - denotes concatenation + * Key = SWK + * AAD = DER(OID) + * Input = (P || Q || dP || dQ || Qinv || publicExponentE) + * Expanded Description: + * Encrypt (SWK, AAD, + * (P || Q || dP || dQ || Qinv || publicExponentE)) + * EncryptedRSAKey = (P || Q || dP || dQ || Qinv || publicExponentE)' + * Output (AuthTag, EncryptedRSAKey) + * + * privateKey = EncryptedRSAKey || AuthTag + * + * OID's that shall be supported by KPT implementation: + * OID DER(OID) + * 1.2.840.113549.1.1 06 08 2A 86 48 86 F7 0D 01 01 + * + * All of the encrypted parameters will be of equal size. The length of + * each will be equal to keySize in bytes/2. + * For example for a key size of 256 Bytes (2048 bits), the length of + * P, Q, dP, dQ, and Qinv are all 128 Bytes, plus the + * publicExponentE of 256 Bytes, giving a total size for + * EncryptedRSAKey of 896 Bytes. + * + * AuthTag is 128 bits (16 bytes) + * + * Permitted Key Sizes are: + * - 512 bits (64 bytes), + * - 1024 bits (128 bytes), + * - 1536 bits (192 bytes), + * - 2048 bits (256 bytes), + * - 3072 bits (384 bytes), + * - 4096 bits (512 bytes), or + * - 8192 bits (1024 bytes). + * + *****************************************************************************/ +typedef struct CpaCyKptRsaPrivateKeyRep2_t +{ + CpaFlatBuffer privateKey; + /**< RSA private key representation 2 is built up from the + * tuple of p, q, dP, dQ, qInv, publicExponentE and AuthTag. + */ +} CpaCyKptRsaPrivateKeyRep2; + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * RSA Private Key Structure. + * @description + * This structure contains the two representations that can be used for + * describing the RSA private key. The privateKeyRepType will be used to + * identify which representation is to be used. Typically, using the + * second representation results in faster decryption operations. + * + *****************************************************************************/ +typedef struct CpaCyKptRsaPrivateKey_t +{ + CpaCyRsaVersion version; + /**< Indicates the version of the PKCS #1 specification that is + * supported. + * Note that this applies to both representations. */ + CpaCyRsaPrivateKeyRepType privateKeyRepType; + /**< This value is used to identify which of the private key + * representation types in this structure is relevant. + * When performing key generation operations for Type 2 representations, + * memory must also be allocated for the type 1 representations, and values + * for both will be returned. */ + CpaCyKptRsaPrivateKeyRep1 privateKeyRep1; + /**< This is the first representation of the RSA private key as + * defined in the PKCS #1 V2.2 specification. */ + CpaCyKptRsaPrivateKeyRep2 privateKeyRep2; + /**< This is the second representation of the RSA private key as + * defined in the PKCS #1 V2.2 specification. */ +} CpaCyKptRsaPrivateKey; + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * KPT RSA Decryption Primitive Operation Data + * @description + * This structure lists the different items that are required in the + * cpaCyKptRsaDecrypt function. As the RSA decryption primitive and + * signature primitive operations are mathematically identical this + * structure may also be used to perform an RSA signature primitive + * operation. + * When performing an RSA decryption primitive operation, the input data + * is the cipher text and the output data is the message text. + * When performing an RSA signature primitive operation, the input data + * is the message and the output data is the signature. + * The client MUST allocate the memory for this structure. When the + * structure is passed into the function, ownership of the memory passes + * to he function. Ownership of the memory returns to the client when + * this structure is returned in the CpaCyGenFlatBufCbFunc + * callback function. + * + * @note + * If the client modifies or frees the memory referenced in this structure + * after it has been submitted to the cpaCyKptRsaDecrypt function, and + * before it has been returned in the callback, undefined behavior will + * result. + * All values in this structure are required to be in Most Significant Byte + * first order, e.g. inputData.pData[0] = MSB. + * + *****************************************************************************/ +typedef struct CpaCyKptRsaDecryptOpData_t +{ + CpaCyKptRsaPrivateKey *pRecipientPrivateKey; + /**< Pointer to the recipient's RSA private key. */ + CpaFlatBuffer inputData; + /**< The input data that the RSA decryption primitive operation is + * performed on. The data pointed to is an integer that MUST be in big- + * endian order. The value MUST be between 0 and the modulus n - 1. */ +} CpaCyKptRsaDecryptOpData; + + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * KPT ECDSA Sign R & S Operation Data. + * + * @description + * This structure contains the operation data for the cpaCyKptEcdsaSignRS + * function. The client MUST allocate the memory for this structure and the + * items pointed to by this structure. When the structure is passed into + * the function, ownership of the memory passes to the function. Ownership + * of the memory returns to the client when this structure is returned in + * the callback function. + * This key structure is encrypted when passed into cpaCyKptEcdsaSignRS + * Encrypt - AES-256-GCM (Key, AAD, Input) + * "||" - denotes concatenation + * + * Key = SWK + * AAD = DER(OID) + * Input = (d) + * Encrypt (SWK, AAD, (d)) + * Output (AuthTag, EncryptedECKey) + * + * privatekey == EncryptedECKey || AuthTag + * + * OID's that shall be supported by KPT implementation: + * Curve OID DER(OID) + * secp256r1 1.2.840.10045.3.1.7 06 08 2A 86 48 CE 3D 03 01 07 + * secp384r1 1.3.132.0.34 06 05 2B 81 04 00 22 + * secp521r1 1.3.132.0.35 06 05 2B 81 04 00 23 + * + * Expected private key (d) sizes: + * secp256r1 256 bits + * secp384r1 384 bits + * secp521r1 576 bits (rounded up to a multiple of 64-bit quadword) + * + * AuthTag is 128 bits (16 bytes) + * + * For optimal performance all data buffers SHOULD be 8-byte aligned. + * + * @note + * If the client modifies or frees the memory referenced in this + * structure after it has been submitted to the cpaCyKptEcdsaSignRS + * function, and before it has been returned in the callback, undefined + * behavior will result. + * + * @see + * cpaCyEcdsaSignRS() + * + *****************************************************************************/ +typedef struct CpaCyKptEcdsaSignRSOpData_t +{ + CpaFlatBuffer privateKey; + /**< Encrypted private key data of the form + * EncryptECKey || AuthTag */ + CpaFlatBuffer m; + /**< digest of the message to be signed */ +} CpaCyKptEcdsaSignRSOpData; + +/** + ***************************************************************************** + * Discovery and Provisioning APIs for KPT + * + *****************************************************************************/ + + /** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * Query KPT's issuing public key(R_Pu) and signature from QAT driver. + * @description + * This function is to query the RSA3K issuing key and its + * PKCS#1 v2.2 SHA-384 signature from the QAT driver. + * @context + * This function may sleep, and MUST NOT be called in interrupt context. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @param[in] instanceHandle Instance handle. + * @param[out] pIssueCert KPT-2.0 Issuing certificate in PEM format + as defined in RFC#7468 + * @param[out] pKptStatus One of the status codes denoted in the + * enumerate type CpaCyKptKeyManagementStatus + * CPA_CY_KPT_SUCCESS Issuing key retrieved successfully + * CPA_CY_KPT_FAILED Operation failed + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_FAIL Function failed. Suggested course of action + * is to shutdown and restart. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. + * Resubmit the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * Note that this is a synchronous function and has no completion callback + * associated with it. + * @see + * + *****************************************************************************/ + CpaStatus + cpaCyKptQueryIssuingKeys(const CpaInstanceHandle instanceHandle, + CpaFlatBuffer *pPublicX509IssueCert, + CpaCyKptKeyManagementStatus *pKptStatus); + + /** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * Query KPT's Per-Part public key(I_pu) and signature from QAT + * device + * @description + * This function is to query RSA3K Per-Part public key and its + * PKCS#1 v2.2 SHA-384 signature from the QAT device. + * @context + * This function may sleep, and MUST NOT be called in interrupt context. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @param[in] instanceHandle Instance handle. + * @param[out] pDevCredential Device Per-Part public key + * @param[out] pKptStatus One of the status codes denoted in the + * enumerate type CpaCyKptKeyManagementStatus + * CPA_CY_KPT_SUCCESS Device credentials retrieved successfully + * CPA_CY_KPT_FAILED Operation failed + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_FAIL Function failed. Suggested course of action + * is to shutdown and restart. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. + * Resubmit the request. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * Note that this is a synchronous function and has no completion callback + * associated with it. + * @see + * + *****************************************************************************/ + CpaStatus + cpaCyKptQueryDeviceCredentials(const CpaInstanceHandle instanceHandle, + CpaCyKptValidationKey *pDevCredential, + CpaCyKptKeyManagementStatus *pKptStatus); + + /** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * Perform KPT key loading function. + * + * @description + * This function is invoked by a QAT application to load an encrypted + * symmetric wrapping key. + * @context + * This is a synchronous function and it can sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle QAT service instance handle. + * @param[in] pSWK Encrypted SWK + * @param[out] keyHandle A 64-bit handle value created by KPT + * @param[out] pKptStatus One of the status codes denoted in the + * enumerate type CpaCyKptKeyManagementStatus + * CPA_CY_KPT_SUCCESS Key Loaded successfully + * CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_VFID + * SWK count exceeds the configured maxmium value per VFID + * CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_PASID + * SWK count exceeds the configured maxmium value per PASID + * CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED + * SWK count exceeds the configured maxmium value when not scoped to + * VFID or PASID + * CPA_CY_KPT_FAILED Operation failed due to unspecified reason + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. + * Resubmit the request. + * @retval CPA_STATUS_UNSUPPORTED KPT-2.0 is not supported. + * + * @pre + * Component has been initialized. + * @post + * None + * @note + * None + * @see + * None + *****************************************************************************/ + CpaStatus + cpaCyKptLoadKey(CpaInstanceHandle instanceHandle, + CpaCyKptLoadKey *pSWK, + CpaCyKptHandle *keyHandle, + CpaCyKptKeyManagementStatus *pKptStatus); + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * Perform KPT delete keys function according to key handle + * + * @description + * Before closing a QAT session(instance), an application that has + * previously stored its wrapping key in a QAT device using the KPT + * framework executes this call to delete its wrapping key in the QAT + * device. + * @context + * This is a synchronous function and it can sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * This function is synchronous and blocking. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle QAT service instance handle. + * @param[in] keyHandle A 64-bit handle value + * @param[out] pkptstatus One of the status codes denoted in the + * enumerate type CpaCyKptKeyManagementStatus + * CPA_CY_KPT_SUCCESS Key Deleted successfully + * CPA_CY_KPT_SWK_FAIL_NOT_FOUND For any reason the input handle cannot be + * found. + * CPA_CY_KPT_FAILED Operation failed due to unspecified reason + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. + * Resubmit the request. + * @pre + * Component has been initialized. + * @post + * None + * @note + * None + * @see + * None + *****************************************************************************/ +CpaStatus +cpaCyKptDeleteKey(CpaInstanceHandle instanceHandle, + CpaCyKptHandle keyHandle, + CpaCyKptKeyManagementStatus *pKptStatus); + +/** +***************************************************************************** +* Usage APIs for KPT +* +*****************************************************************************/ + +/** + ***************************************************************************** + * @file cpa_cy_kpt.h + * @ingroup cpaCyKpt + * Perform KPT-2.0 mode RSA decrypt primitive operation on the input data. + * + * @description + * This function is a variant of cpaCyRsaDecrypt, which will perform + * an RSA decryption primitive operation on the input data using the + * specified RSA private key which are encrypted. As the RSA decryption + * primitive and signing primitive operations are mathematically + * identical this function may also be used to perform an RSA signing + * primitive operation. + * + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pRsaDecryptCb Pointer to callback function to be invoked + * when the operation is complete. If this is + * set to a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag Opaque User Data for this specific call. + * Will be returned unchanged in the callback. + * @param[in] pDecryptOpData Structure containing all the data needed to + * perform the RSA decrypt operation. The + * client code allocates the memory for this + * structure. This component takes ownership + * of the memory until it is returned in the + * callback. + * @param[out] pOutputData Pointer to structure into which the result of + * the RSA decryption primitive is written. The + * client MUST allocate this memory. The data + * pointed to is an integer in big-endian order. + * The value will be between 0 and the modulus + * n - 1. + * On invocation the callback function will + * contain this parameter in the pOut parameter. + * @param[in] pKptUnwrapContext Pointer of structure into which the content + * of KptUnwrapContext is kept. The client MUST + * allocate this memory and copy structure + * KptUnwrapContext into this flat buffer. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting.Resubmit + * the request. + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * By virtue of invoking cpaSyKptRsaDecrypt, the implementation understands + * that pDecryptOpData contains an encrypted private key that requires + * unwrapping. KptUnwrapContext contains a 'KptHandle' field that points + * to the unwrapping key in the WKT. + * When pRsaDecryptCb is non-NULL an asynchronous callback is generated in + * response to this function call. + * Any errors generated during processing are reported as part of the + * callback status code. For optimal performance, data pointers SHOULD be + * 8-byte aligned. + * In KPT release, private key field in CpaCyKptRsaDecryptOpData is a + * concatenation of cipher text and hash tag. + * For optimal performance, data pointers SHOULD be 8-byte aligned. + * @see + * CpaCyKptRsaDecryptOpData, + * CpaCyGenFlatBufCbFunc, + * + *****************************************************************************/ +CpaStatus +cpaCyKptRsaDecrypt(const CpaInstanceHandle instanceHandle, + const CpaCyGenFlatBufCbFunc pRsaDecryptCb, + void *pCallbackTag, + const CpaCyKptRsaDecryptOpData *pDecryptOpData, + CpaFlatBuffer *pOutputData, + CpaCyKptUnwrapContext *pKptUnwrapContext); + +/** + ***************************************************************************** + * @ingroup cpaCyKpt + * Generate ECDSA Signature R & S. + * @description + * This function is a variant of cpaCyEcdsaSignRS, it generates ECDSA + * signature R & S as per ANSI X9.62 2005 section 7.3. + * @context + * When called as an asynchronous function it cannot sleep. It can be + * executed in a context that does not permit sleeping. + * When called as a synchronous function it may sleep. It MUST NOT be + * executed in a context that DOES NOT permit sleeping. + * @assumptions + * None + * @sideEffects + * None + * @blocking + * Yes when configured to operate in synchronous mode. + * @reentrant + * No + * @threadSafe + * Yes + * + * @param[in] instanceHandle Instance handle. + * @param[in] pCb Callback function pointer. If this is set to + * a NULL value the function will operate + * synchronously. + * @param[in] pCallbackTag User-supplied value to help identify request. + * @param[in] pOpData Structure containing all the data needed to + * perform the operation. The client code + * allocates the memory for this structure. This + * component takes ownership of the memory until + * it is returned in the callback. + * @param[out] pSignStatus In synchronous mode, the multiply output is + * valid (CPA_TRUE) or the output is invalid + * (CPA_FALSE). + * @param[out] pR ECDSA message signature r. + * @param[out] pS ECDSA message signature s. + * @param[in] pKptUnwrapContext Pointer of structure into which the content + * of KptUnwrapContext is kept,The client MUST + * allocate this memory and copy structure + * KptUnwrapContext into this flat buffer. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully. + * @retval CPA_STATUS_FAIL Function failed. + * @retval CPA_STATUS_RETRY Resubmit the request. + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. + * @retval CPA_STATUS_RESOURCE Error related to system resources. + * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit + * the request. + * @retval CPA_STATUS_UNSUPPORTED Function is not supported. + * + * @pre + * The component has been initialized via cpaCyStartInstance function. + * @post + * None + * @note + * By virtue of invoking the cpaCyKptEcdsaSignRS, the implementation + * understands CpaCyEcdsaSignRSOpData contains an encrypted private key that + * requires unwrapping. KptUnwrapContext contains a 'KptHandle' field + * that points to the unwrapping key in the WKT. + * When pCb is non-NULL an asynchronous callback of type + * CpaCyEcdsaSignRSCbFunc generated in response to this function + * call. + * In KPT release, private key field in CpaCyEcdsaSignRSOpData is a + * concatenation of cipher text and hash tag. + * @see + * None + *****************************************************************************/ +CpaStatus +cpaCyKptEcdsaSignRS(const CpaInstanceHandle instanceHandle, + const CpaCyEcdsaSignRSCbFunc pCb, + void *pCallbackTag, + const CpaCyKptEcdsaSignRSOpData *pOpData, + CpaBoolean *pSignStatus, + CpaFlatBuffer *pR, + CpaFlatBuffer *pS, + CpaCyKptUnwrapContext *pKptUnwrapContext); + +#ifdef __cplusplus +} /* close the extern "C" { */ +#endif +#endif diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_ln.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_ln.h index d5790bff6c66..43550cdb0fed 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_ln.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_ln.h @@ -1,519 +1,519 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_ln.h * * @defgroup cpaCyLn Cryptographic Large Number API * * @ingroup cpaCy * * @description * These functions specify the Cryptographic API for Large Number * Operations. * * @note * Large numbers are represented on the QuickAssist API using octet * strings, stored in structures of type @ref CpaFlatBuffer. These * octet strings are encoded as described by PKCS#1 v2.1, section 4, * which is consistent with ASN.1 syntax. The following text * summarizes this. Any exceptions to this encoding are specified * on the specific data structure or function to which the exception * applies. * * An n-bit number, N, has a value in the range 2^(n-1) through 2^(n)-1. * In other words, its most significant bit, bit n-1 (where bit-counting * starts from zero) MUST be set to 1. We can also state that the * bit-length n of a number N is defined by n = floor(log2(N))+1. * * The buffer, b, in which an n-bit number N is stored, must be "large * enough". In other words, b.dataLenInBytes must be at least * minLenInBytes = ceiling(n/8). * * The number is stored in a "big endian" format. This means that the * least significant byte (LSB) is b[b.dataLenInBytes-1], while the * most significant byte (MSB) is b[b.dataLenInBytes-minLenInBytes]. * In the case where the buffer is "exactly" the right size, then the * MSB is b[0]. Otherwise, all bytes from b[0] up to the MSB MUST be * set to 0x00. * - * The largest bit-length we support today is 4096 bits. In other - * words, we can deal with numbers up to a value of (2^4096)-1. + * The largest bit-length we support today is 8192 bits. In other + * words, we can deal with numbers up to a value of (2^8192)-1. * *****************************************************************************/ #ifndef CPA_CY_LN_H #define CPA_CY_LN_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyLn * Modular Exponentiation Function Operation Data. * @description * This structure lists the different items that are required in the * cpaCyLnModExp function. The client MUST allocate the memory for * this structure. When the structure is passed into the function, * ownership of the memory passes to the function. Ownership of the memory * returns to the client when this structure is returned in the callback. * The operation size in bits is equal to the size of whichever of the * following is largest: the modulus, the base or the exponent. * * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyLnModExp function, and * before it has been returned in the callback, undefined behavior will * result. * The values of the base, the exponent and the modulus MUST all be less - * than 2^4096, and the modulus must not be equal to zero. + * than 2^8192, and the modulus must not be equal to zero. *****************************************************************************/ typedef struct _CpaCyLnModExpOpData { CpaFlatBuffer modulus; /**< Flat buffer containing a pointer to the modulus. - * This number may be up to 4096 bits in length, and MUST be greater + * This number may be up to 8192 bits in length, and MUST be greater * than zero. */ CpaFlatBuffer base; /**< Flat buffer containing a pointer to the base. - * This number may be up to 4096 bits in length. + * This number may be up to 8192 bits in length. */ CpaFlatBuffer exponent; /**< Flat buffer containing a pointer to the exponent. - * This number may be up to 4096 bits in length. + * This number may be up to 8192 bits in length. */ } CpaCyLnModExpOpData; /** ***************************************************************************** * @ingroup cpaCyLn * Modular Inversion Function Operation Data. * @description * This structure lists the different items that are required in the * function @ref cpaCyLnModInv. The client MUST allocate the memory for * this structure. When the structure is passed into the function, * ownership of the memory passes to the function. Ownership of the * memory returns to the client when this structure is returned in the * callback. * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyLnModInv function, and * before it has been returned in the callback, undefined behavior will * result. * * Note that the values of A and B MUST NOT both be even numbers, and - * both MUST be less than 2^4096. + * both MUST be less than 2^8192. *****************************************************************************/ typedef struct _CpaCyLnModInvOpData { CpaFlatBuffer A; /**< Flat buffer containing a pointer to the value that will be * inverted. - * This number may be up to 4096 bits in length, it MUST NOT be zero, + * This number may be up to 8192 bits in length, it MUST NOT be zero, * and it MUST be co-prime with B. */ CpaFlatBuffer B; /**< Flat buffer containing a pointer to the value that will be used as * the modulus. - * This number may be up to 4096 bits in length, it MUST NOT be zero, + * This number may be up to 8192 bits in length, it MUST NOT be zero, * and it MUST be co-prime with A. */ } CpaCyLnModInvOpData; /** ***************************************************************************** * @ingroup cpaCyLn * Look Aside Cryptographic large number Statistics. * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by @ref CpaCyLnStats64. * @description * This structure contains statistics on the Look Aside Cryptographic * large number operations. Statistics are set to zero when the component * is initialized, and are collected per instance. * ****************************************************************************/ typedef struct _CpaCyLnStats { Cpa32U numLnModExpRequests; /**< Total number of successful large number modular exponentiation * requests.*/ Cpa32U numLnModExpRequestErrors; /**< Total number of large number modular exponentiation requests that * had an error and could not be processed. */ Cpa32U numLnModExpCompleted; /**< Total number of large number modular exponentiation operations * that completed successfully. */ Cpa32U numLnModExpCompletedErrors; /**< Total number of large number modular exponentiation operations * that could not be completed successfully due to errors. */ Cpa32U numLnModInvRequests; /**< Total number of successful large number modular inversion * requests.*/ Cpa32U numLnModInvRequestErrors; /**< Total number of large number modular inversion requests that * had an error and could not be processed. */ Cpa32U numLnModInvCompleted; /**< Total number of large number modular inversion operations * that completed successfully. */ Cpa32U numLnModInvCompletedErrors; /**< Total number of large number modular inversion operations * that could not be completed successfully due to errors. */ } CpaCyLnStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyLn * Look Aside Cryptographic large number Statistics. * @description * This structure contains statistics on the Look Aside Cryptographic * large number operations. Statistics are set to zero when the component * is initialized, and are collected per instance. * ****************************************************************************/ typedef struct _CpaCyLnStats64 { Cpa64U numLnModExpRequests; /**< Total number of successful large number modular exponentiation * requests.*/ Cpa64U numLnModExpRequestErrors; /**< Total number of large number modular exponentiation requests that * had an error and could not be processed. */ Cpa64U numLnModExpCompleted; /**< Total number of large number modular exponentiation operations * that completed successfully. */ Cpa64U numLnModExpCompletedErrors; /**< Total number of large number modular exponentiation operations * that could not be completed successfully due to errors. */ Cpa64U numLnModInvRequests; /**< Total number of successful large number modular inversion * requests.*/ Cpa64U numLnModInvRequestErrors; /**< Total number of large number modular inversion requests that * had an error and could not be processed. */ Cpa64U numLnModInvCompleted; /**< Total number of large number modular inversion operations * that completed successfully. */ Cpa64U numLnModInvCompletedErrors; /**< Total number of large number modular inversion operations * that could not be completed successfully due to errors. */ } CpaCyLnStats64; /** ***************************************************************************** * @ingroup cpaCyLn * Perform modular exponentiation operation. * * @description * This function performs modular exponentiation. It computes the * following result based on the inputs: * * result = (base ^ exponent) mod modulus * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pLnModExpCb Pointer to callback function to be * invoked when the operation is complete. * @param[in] pCallbackTag Opaque User Data for this specific call. * Will be returned unchanged in the callback. * @param[in] pLnModExpOpData Structure containing all the data needed * to perform the LN modular exponentiation * operation. The client code allocates * the memory for this structure. This * component takes ownership of the memory * until it is returned in the callback. * @param[out] pResult Pointer to a flat buffer containing a * pointer to memory allocated by the client * into which the result will be written. * The size of the memory required MUST be * larger than or equal to the size * required to store the modulus. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * When pLnModExpCb is non null, an asynchronous callback of type * CpaCyLnModExpCbFunc is generated in response to this function call. * Any errors generated during processing are reported in the structure * returned in the callback. * * @see * CpaCyLnModExpOpData, CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyLnModExp(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pLnModExpCb, void *pCallbackTag, const CpaCyLnModExpOpData *pLnModExpOpData, CpaFlatBuffer *pResult); /** ***************************************************************************** * @ingroup cpaCyLn * Perform modular inversion operation. * * @description * This function performs modular inversion. It computes the following * result based on the inputs: * * result = (1/A) mod B. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pLnModInvCb Pointer to callback function to be * invoked when the operation is complete. * @param[in] pCallbackTag Opaque User Data for this specific call. * Will be returned unchanged in the * callback. * @param[in] pLnModInvOpData Structure containing all the data * needed to perform the LN modular * inversion operation. The client code * allocates the memory for this structure. * This component takes ownership of the * memory until it is returned in the * callback. * @param[out] pResult Pointer to a flat buffer containing a * pointer to memory allocated by the client * into which the result will be written. * The size of the memory required MUST be * larger than or equal to the size * required to store the modulus. * On invocation the callback function * will contain this parameter in the * pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * When pLnModInvCb is non null, an asynchronous callback of type * CpaCyLnModInvCbFunc is generated in response to this function call. * Any errors generated during processing are reported in the structure * returned in the callback. * * @see * CpaCyLnModInvOpData, * CpaCyGenFlatBufCbFunc * *****************************************************************************/ CpaStatus cpaCyLnModInv(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pLnModInvCb, void *pCallbackTag, const CpaCyLnModInvOpData *pLnModInvOpData, CpaFlatBuffer *pResult); /** ***************************************************************************** * @ingroup cpaCyLn * Query statistics for large number operations * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyLnStatsQuery64(). * * @description * This function will query a specific instance handle for large number * statistics. The user MUST allocate the CpaCyLnStats structure and pass * the reference to that structure into this function call. This function * writes the statistic results into the passed in CpaCyLnStats structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pLnStats Pointer to memory into which the * statistics will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Acceleration Services unit has been initialized. * * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * * @see * CpaCyLnStats * *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyLnStatsQuery(const CpaInstanceHandle instanceHandle, struct _CpaCyLnStats *pLnStats); /** ***************************************************************************** * @ingroup cpaCyLn * Query statistics (64-bit version) for large number operations * * @description * This function will query a specific instance handle for the 64-bit * version of the large number statistics. * The user MUST allocate the CpaCyLnStats64 structure and pass * the reference to that structure into this function call. This function * writes the statistic results into the passed in CpaCyLnStats64 * structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pLnStats Pointer to memory into which the * statistics will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Acceleration Services unit has been initialized. * * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * * @see * CpaCyLnStats *****************************************************************************/ CpaStatus cpaCyLnStatsQuery64(const CpaInstanceHandle instanceHandle, CpaCyLnStats64 *pLnStats); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_LN_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_prime.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_prime.h index 21e2b1e9081f..7065304f69e8 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_prime.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_prime.h @@ -1,450 +1,450 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_prime.h * * @defgroup cpaCyPrime Prime Number Test API * * @ingroup cpaCy * * @description * These functions specify the API for the prime number test operations. * * For prime number generation, this API SHOULD be used in conjunction * with the Deterministic Random Bit Generation API (@ref cpaCyDrbg). * * @note * Large numbers are represented on the QuickAssist API as described * in the Large Number API (@ref cpaCyLn). * * In addition, the bit length of large numbers passed to the API * MUST NOT exceed 576 bits for Elliptic Curve operations. *****************************************************************************/ #ifndef CPA_CY_PRIME_H #define CPA_CY_PRIME_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyPrime * Prime Test Operation Data. * @description * This structure contains the operation data for the cpaCyPrimeTest * function. The client MUST allocate the memory for this structure and the * items pointed to by this structure. When the structure is passed into * the function, ownership of the memory passes to the function. Ownership * of the memory returns to the client when this structure is returned in * the callback function. * * All values in this structure are required to be in Most Significant Byte * first order, e.g. primeCandidate.pData[0] = MSB. * * All numbers MUST be stored in big-endian order. * * @note * If the client modifies or frees the memory referenced in this * structure after it has been submitted to the cpaCyPrimeTest * function, and before it has been returned in the callback, undefined * behavior will result. * * @see * cpaCyPrimeTest() * *****************************************************************************/ typedef struct _CpaCyPrimeTestOpData { CpaFlatBuffer primeCandidate; /**< The prime number candidate to test */ CpaBoolean performGcdTest; /**< A value of CPA_TRUE means perform a GCD Primality Test */ CpaBoolean performFermatTest; /**< A value of CPA_TRUE means perform a Fermat Primality Test */ Cpa32U numMillerRabinRounds; /**< Number of Miller Rabin Primality Test rounds. Set to 0 to perform * zero Miller Rabin tests. The maximum number of rounds supported is 50. */ CpaFlatBuffer millerRabinRandomInput; /**< Flat buffer containing a pointer to an array of n random numbers * for Miller Rabin Primality Tests. The size of the buffer MUST be * * n * (MAX(64,x)) * * where: * * - n is the requested number of rounds. * - x is the minimum number of bytes required to represent the prime * candidate, i.e. x = ceiling((ceiling(log2(p)))/8). * * Each random number MUST be greater than 1 and less than the prime * candidate - 1, with leading zeroes as necessary. */ CpaBoolean performLucasTest; /**< An CPA_TRUE value means perform a Lucas Primality Test */ } CpaCyPrimeTestOpData; /** ***************************************************************************** * @ingroup cpaCyPrime * Prime Number Test Statistics. * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by @ref CpaCyPrimeStats64. * @description * This structure contains statistics on the prime number test operations. * Statistics are set to zero when the component is initialized, and are * collected per instance. * ****************************************************************************/ typedef struct _CpaCyPrimeStats { Cpa32U numPrimeTestRequests; /**< Total number of successful prime number test requests.*/ Cpa32U numPrimeTestRequestErrors; /**< Total number of prime number test requests that had an * error and could not be processed. */ Cpa32U numPrimeTestCompleted; /**< Total number of prime number test operations that completed * successfully. */ Cpa32U numPrimeTestCompletedErrors; /**< Total number of prime number test operations that could not be * completed successfully due to errors. */ Cpa32U numPrimeTestFailures; /**< Total number of prime number test operations that executed * successfully but the outcome of the test was that the number was not * prime. */ } CpaCyPrimeStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyPrime * Prime Number Test Statistics (64-bit version). * @description * This structure contains a 64-bit version of the statistics on the * prime number test operations. * Statistics are set to zero when the component is initialized, and are * collected per instance. ****************************************************************************/ typedef struct _CpaCyPrimeStats64 { Cpa64U numPrimeTestRequests; /**< Total number of successful prime number test requests.*/ Cpa64U numPrimeTestRequestErrors; /**< Total number of prime number test requests that had an * error and could not be processed. */ Cpa64U numPrimeTestCompleted; /**< Total number of prime number test operations that completed * successfully. */ Cpa64U numPrimeTestCompletedErrors; /**< Total number of prime number test operations that could not be * completed successfully due to errors. */ Cpa64U numPrimeTestFailures; /**< Total number of prime number test operations that executed * successfully but the outcome of the test was that the number was not * prime. */ } CpaCyPrimeStats64; /** ***************************************************************************** * @ingroup cpaCyPrime * Definition of callback function invoked for cpaCyPrimeTest * requests. * * @description * This is the prototype for the cpaCyPrimeTest callback function. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pOpData Opaque pointer to the Operation data pointer * supplied in request. * @param[in] testPassed A value of CPA_TRUE means the prime candidate * is probably prime. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCyPrimeTest() * *****************************************************************************/ typedef void (*CpaCyPrimeTestCbFunc)(void *pCallbackTag, CpaStatus status, void *pOpData, CpaBoolean testPassed); /** ***************************************************************************** * @ingroup cpaCyPrime * Prime Number Test Function. * * @description * This function will test probabilistically if a number is prime. Refer * to ANSI X9.80 2005 for details. The primality result will be returned * in the asynchronous callback. * * The following combination of GCD, Fermat, Miller-Rabin, and Lucas * testing is supported: * (up to 1x GCD) + (up to 1x Fermat) + (up to 50x Miller-Rabin rounds) + * (up to 1x Lucas) * For example: * (1x GCD) + (25x Miller-Rabin) + (1x Lucas); * (1x GCD) + (1x Fermat); * (50x Miller-rabin); * * Tests are always performed in order of increasing complexity, for * example GCD first, then Fermat, then Miller-Rabin, and finally Lucas. * * For all of the primality tests, the following prime number "sizes" * (length in bits) are supported: all sizes up to and including 512 * bits, as well as sizes 768, 1024, 1536, 2048, 3072 and 4096. * * Candidate prime numbers MUST match these sizes accordingly, with * leading zeroes present where necessary. * * When this prime number test is used in conjunction with combined * Miller-Rabin and Lucas tests, it may be used as a means of performing * a self test operation on the random data generator. * * A response status of ok (pass == CPA_TRUE) means all requested * primality tests passed, and the prime candidate is probably prime * (the exact probability depends on the primality tests requested). * A response status of not ok (pass == CPA_FALSE) means one of the * requested primality tests failed (the prime candidate has been found * to be composite). * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCb Callback function pointer. If this is set to * a NULL value the function will operate * synchronously. * @param[in] pCallbackTag User-supplied value to help identify request. * @param[in] pOpData Structure containing all the data needed to * perform the operation. The client code * allocates the memory for this structure. This * component takes ownership of the memory until * it is returned in the callback. * @param[out] pTestPassed A value of CPA_TRUE means the prime candidate * is probably prime. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pCb is non-NULL an asynchronous callback of type * CpaCyPrimeTestCbFunc is generated in response to this function call. * For optimal performance, data pointers SHOULD be 8-byte aligned. * * @see * CpaCyPrimeTestOpData, CpaCyPrimeTestCbFunc * *****************************************************************************/ CpaStatus cpaCyPrimeTest(const CpaInstanceHandle instanceHandle, const CpaCyPrimeTestCbFunc pCb, void *pCallbackTag, const CpaCyPrimeTestOpData *pOpData, CpaBoolean *pTestPassed); /****************************************************************************** * @ingroup cpaCyPrime * Query prime number statistics specific to an instance. * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyPrimeQueryStats64(). * * @description * This function will query a specific instance for prime number * statistics. The user MUST allocate the CpaCyPrimeStats structure * and pass the reference to that into this function call. This function * will write the statistic results into the passed in * CpaCyPrimeStats structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pPrimeStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyPrimeQueryStats(const CpaInstanceHandle instanceHandle, struct _CpaCyPrimeStats *pPrimeStats); /****************************************************************************** * @ingroup cpaCyPrime * Query prime number statistics specific to an instance. * * @description * This function will query a specific instance for the 64-bit * version of the prime number statistics. * The user MUST allocate the CpaCyPrimeStats64 structure * and pass the reference to that into this function call. This function * will write the statistic results into the passed in * CpaCyPrimeStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pPrimeStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. *****************************************************************************/ CpaStatus cpaCyPrimeQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyPrimeStats64 *pPrimeStats); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_PRIME_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_rsa.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_rsa.h index a9ca9595bad8..a72950ecd970 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_rsa.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_rsa.h @@ -1,907 +1,919 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_rsa.h * * @defgroup cpaCyRsa RSA API * * @ingroup cpaCy * * @description * These functions specify the API for Public Key Encryption * (Cryptography) RSA operations. The PKCS #1 V2.1 specification is * supported, however the support is limited to "two-prime" mode. RSA * multi-prime is not supported. * * @note * These functions implement RSA cryptographic primitives. RSA padding * schemes are not implemented. For padding schemes that require the mgf * function see @ref cpaCyKeyGen. * * @note * Large numbers are represented on the QuickAssist API as described * in the Large Number API (@ref cpaCyLn). *****************************************************************************/ #ifndef CPA_CY_RSA_H #define CPA_CY_RSA_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Version. * @description * This enumeration lists the version identifier for the PKCS #1 V2.1 * standard. * @note * Multi-prime (more than two primes) is not supported. * *****************************************************************************/ typedef enum _CpaCyRsaVersion { CPA_CY_RSA_VERSION_TWO_PRIME = 1 /**< The version supported is "two-prime". */ } CpaCyRsaVersion; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Public Key Structure. * @description * This structure contains the two components which comprise the RSA * public key as defined in the PKCS #1 V2.1 standard. * All values in this structure are required to be in Most Significant Byte * first order, e.g. modulusN.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyRsaPublicKey { CpaFlatBuffer modulusN; /**< The modulus (n). * For key generation operations, the client MUST allocate the memory * for this parameter; its value is generated. * For encrypt operations this parameter is an input. */ CpaFlatBuffer publicExponentE; /**< The public exponent (e). * For key generation operations, this field is unused. It is NOT * generated by the interface; it is the responsibility of the client * to set this to the same value as the corresponding parameter on * the CpaCyRsaKeyGenOpData structure before using the key for * encryption. * For encrypt operations this parameter is an input. */ } CpaCyRsaPublicKey; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Private Key Structure For Representation 1. * @description * This structure contains the first representation that can be used for * describing the RSA private key, represented by the tuple of the * modulus (n) and the private exponent (d). * All values in this structure are required to be in Most Significant Byte * first order, e.g. modulusN.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyRsaPrivateKeyRep1 { CpaFlatBuffer modulusN; /**< The modulus (n). For key generation operations the memory MUST * be allocated by the client and the value is generated. For other * operations this is an input. Permitted lengths are: * * - 512 bits (64 bytes), * - 1024 bits (128 bytes), * - 1536 bits (192 bytes), * - 2048 bits (256 bytes), - * - 3072 bits (384 bytes), or - * - 4096 bits (512 bytes). + * - 3072 bits (384 bytes), + * - 4096 bits (512 bytes), or + * - 8192 bits (1024 bytes). */ CpaFlatBuffer privateExponentD; /**< The private exponent (d). For key generation operations the * memory MUST be allocated by the client and the value is generated. For * other operations this is an input. * NOTE: It is important that the value D is big enough. It is STRONGLY * recommended that this value is at least half the length of the modulus * N to protect against the Wiener attack. */ } CpaCyRsaPrivateKeyRep1; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Private Key Structure For Representation 2. * @description * This structure contains the second representation that can be used for * describing the RSA private key. The quintuple of p, q, dP, dQ, and qInv * (explained below and in the spec) are required for the second * representation. The optional sequence of triplets are not included. * All values in this structure are required to be in Most Significant Byte * first order, e.g. prime1P.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyRsaPrivateKeyRep2 { CpaFlatBuffer prime1P; /**< The first large prime (p). * For key generation operations, this field is unused. */ CpaFlatBuffer prime2Q; /**< The second large prime (q). * For key generation operations, this field is unused. */ CpaFlatBuffer exponent1Dp; /**< The first factor CRT exponent (dP). d mod (p-1). */ CpaFlatBuffer exponent2Dq; /**< The second factor CRT exponent (dQ). d mod (q-1). */ CpaFlatBuffer coefficientQInv; /**< The (first) Chinese Remainder Theorem (CRT) coefficient (qInv). * (inverse of q) mod p. */ } CpaCyRsaPrivateKeyRep2; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA private key representation type. * @description * This enumeration lists which PKCS V2.1 representation of the private * key is being used. * *****************************************************************************/ typedef enum _CpaCyRsaPrivateKeyRepType { CPA_CY_RSA_PRIVATE_KEY_REP_TYPE_1= 1, /**< The first representation of the RSA private key. */ CPA_CY_RSA_PRIVATE_KEY_REP_TYPE_2 /**< The second representation of the RSA private key. */ } CpaCyRsaPrivateKeyRepType; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Private Key Structure. * @description * This structure contains the two representations that can be used for * describing the RSA private key. The privateKeyRepType will be used to * identify which representation is to be used. Typically, using the * second representation results in faster decryption operations. * *****************************************************************************/ typedef struct _CpaCyRsaPrivateKey { CpaCyRsaVersion version; /**< Indicates the version of the PKCS #1 specification that is * supported. * Note that this applies to both representations. */ CpaCyRsaPrivateKeyRepType privateKeyRepType; /**< This value is used to identify which of the private key * representation types in this structure is relevant. * When performing key generation operations for Type 2 representations, * memory must also be allocated for the type 1 representations, and values * for both will be returned. */ CpaCyRsaPrivateKeyRep1 privateKeyRep1; /**< This is the first representation of the RSA private key as * defined in the PKCS #1 V2.1 specification. For key generation operations * the memory for this structure is allocated by the client and the * specific values are generated. For other operations this is an input * parameter. */ CpaCyRsaPrivateKeyRep2 privateKeyRep2; /**< This is the second representation of the RSA private key as * defined in the PKCS #1 V2.1 specification. For key generation operations * the memory for this structure is allocated by the client and the * specific values are generated. For other operations this is an input * parameter. */ } CpaCyRsaPrivateKey; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Key Generation Data. * @description * This structure lists the different items that are required in the * cpaCyRsaGenKey function. The client MUST allocate the memory for this * structure. When the structure is passed into the function, ownership of * the memory passes to the function. Ownership of the memory returns to * the client when this structure is returned in the * CpaCyRsaKeyGenCbFunc callback function. * * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyRsaGenKey function, and * before it has been returned in the callback, undefined behavior will * result. * All values in this structure are required to be in Most Significant Byte * first order, e.g. prime1P.pData[0] = MSB. * * The following limitations on the permutations of the supported bit * lengths of p, q and n (written as {p, q, n}) apply: * * - {256, 256, 512} or * - {512, 512, 1024} or * - {768, 768, 1536} or * - {1024, 1024, 2048} or * - {1536, 1536, 3072} or * - {2048, 2048, 4096}. * *****************************************************************************/ typedef struct _CpaCyRsaKeyGenOpData { CpaFlatBuffer prime1P; /**< A large random prime number (p). This MUST be created by the * client. Permitted bit lengths are: 256, 512, 768, 1024, 1536 or 2048. * Limitations apply - refer to the description above for details. */ CpaFlatBuffer prime2Q; /**< A large random prime number (q). This MUST be created by the * client. Permitted bit lengths are: 256, 512, 768, 1024, 1536 or 2048. * Limitations apply - refer to the description above for details. If the * private key representation type is 2, then this pointer will be assigned * to the relevant structure member of the representation 2 private key. */ Cpa32U modulusLenInBytes; /**< The bit length of the modulus (n). This is the modulus length for * both the private and public keys. The length of the modulus N parameter * for the private key representation 1 structure and the public key * structures will be assigned to this value. References to the strength of * RSA actually refer to this bit length. Recommended minimum is 1024 bits. * Permitted lengths are: * - 512 bits (64 bytes), * - 1024 bits (128 bytes), * - 1536 bits (192 bytes), * - 2048 bits (256 bytes), * - 3072 bits (384 bytes), or * - 4096 bits (512 bytes). * Limitations apply - refer to description above for details. */ CpaCyRsaVersion version; /**< Indicates the version of the PKCS #1 specification that is * supported. * Note that this applies to both representations. */ CpaCyRsaPrivateKeyRepType privateKeyRepType; /**< This value is used to identify which of the private key * representation types is required to be generated. */ CpaFlatBuffer publicExponentE; /**< The public exponent (e). */ } CpaCyRsaKeyGenOpData; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Encryption Primitive Operation Data * @description * This structure lists the different items that are required in the * cpaCyRsaEncrypt function. As the RSA encryption primitive and * verification primitive operations are mathematically identical this * structure may also be used to perform an RSA verification primitive * operation. * When performing an RSA encryption primitive operation, the input data * is the message and the output data is the cipher text. * When performing an RSA verification primitive operation, the input data * is the signature and the output data is the message. * The client MUST allocate the memory for this structure. When the * structure is passed into the function, ownership of the memory passes * to the function. Ownership of the memory returns to the client when * this structure is returned in the CpaCyRsaEncryptCbFunc * callback function. * * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyRsaEncrypt function, and * before it has been returned in the callback, undefined behavior will * result. * All values in this structure are required to be in Most Significant Byte * first order, e.g. inputData.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyRsaEncryptOpData { CpaCyRsaPublicKey *pPublicKey; /**< Pointer to the public key. */ CpaFlatBuffer inputData; /**< The input data that the RSA encryption primitive operation is * performed on. The data pointed to is an integer that MUST be in big- * endian order. The value MUST be between 0 and the modulus n - 1. */ } CpaCyRsaEncryptOpData; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Decryption Primitive Operation Data * @description * This structure lists the different items that are required in the * cpaCyRsaDecrypt function. As the RSA decryption primitive and * signature primitive operations are mathematically identical this * structure may also be used to perform an RSA signature primitive * operation. * When performing an RSA decryption primitive operation, the input data * is the cipher text and the output data is the message text. * When performing an RSA signature primitive operation, the input data * is the message and the output data is the signature. * The client MUST allocate the memory for this structure. When the * structure is passed into the function, ownership of the memory passes * to he function. Ownership of the memory returns to the client when * this structure is returned in the CpaCyRsaDecryptCbFunc * callback function. * * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCyRsaDecrypt function, and * before it has been returned in the callback, undefined behavior will * result. * All values in this structure are required to be in Most Significant Byte * first order, e.g. inputData.pData[0] = MSB. * *****************************************************************************/ typedef struct _CpaCyRsaDecryptOpData { CpaCyRsaPrivateKey *pRecipientPrivateKey; /**< Pointer to the recipient's RSA private key. */ CpaFlatBuffer inputData; /**< The input data that the RSA decryption primitive operation is * performed on. The data pointed to is an integer that MUST be in big- * endian order. The value MUST be between 0 and the modulus n - 1. */ } CpaCyRsaDecryptOpData; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Statistics. * @deprecated * As of v1.3 of the Crypto API, this structure has been deprecated, * replaced by @ref CpaCyRsaStats64. * @description * This structure contains statistics on the RSA operations. * Statistics are set to zero when the component is initialized, and are * collected per instance. ****************************************************************************/ typedef struct _CpaCyRsaStats { Cpa32U numRsaKeyGenRequests; /**< Total number of successful RSA key generation requests. */ Cpa32U numRsaKeyGenRequestErrors; /**< Total number of RSA key generation requests that had an error and * could not be processed. */ Cpa32U numRsaKeyGenCompleted; /**< Total number of RSA key generation operations that completed * successfully. */ Cpa32U numRsaKeyGenCompletedErrors; /**< Total number of RSA key generation operations that could not be * completed successfully due to errors. */ Cpa32U numRsaEncryptRequests; /**< Total number of successful RSA encrypt operation requests. */ Cpa32U numRsaEncryptRequestErrors; /**< Total number of RSA encrypt requests that had an error and could * not be processed. */ Cpa32U numRsaEncryptCompleted; /**< Total number of RSA encrypt operations that completed * successfully. */ Cpa32U numRsaEncryptCompletedErrors; /**< Total number of RSA encrypt operations that could not be * completed successfully due to errors. */ Cpa32U numRsaDecryptRequests; /**< Total number of successful RSA decrypt operation requests. */ Cpa32U numRsaDecryptRequestErrors; /**< Total number of RSA decrypt requests that had an error and could * not be processed. */ Cpa32U numRsaDecryptCompleted; /**< Total number of RSA decrypt operations that completed * successfully. */ Cpa32U numRsaDecryptCompletedErrors; /**< Total number of RSA decrypt operations that could not be * completed successfully due to errors. */ } CpaCyRsaStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCyRsa * RSA Statistics (64-bit version). * @description * This structure contains 64-bit version of the statistics on the RSA * operations. * Statistics are set to zero when the component is initialized, and are * collected per instance. ****************************************************************************/ typedef struct _CpaCyRsaStats64 { Cpa64U numRsaKeyGenRequests; /**< Total number of successful RSA key generation requests. */ Cpa64U numRsaKeyGenRequestErrors; /**< Total number of RSA key generation requests that had an error and * could not be processed. */ Cpa64U numRsaKeyGenCompleted; /**< Total number of RSA key generation operations that completed * successfully. */ Cpa64U numRsaKeyGenCompletedErrors; /**< Total number of RSA key generation operations that could not be * completed successfully due to errors. */ Cpa64U numRsaEncryptRequests; /**< Total number of successful RSA encrypt operation requests. */ Cpa64U numRsaEncryptRequestErrors; /**< Total number of RSA encrypt requests that had an error and could * not be processed. */ Cpa64U numRsaEncryptCompleted; /**< Total number of RSA encrypt operations that completed * successfully. */ Cpa64U numRsaEncryptCompletedErrors; /**< Total number of RSA encrypt operations that could not be * completed successfully due to errors. */ Cpa64U numRsaDecryptRequests; /**< Total number of successful RSA decrypt operation requests. */ Cpa64U numRsaDecryptRequestErrors; /**< Total number of RSA decrypt requests that had an error and could * not be processed. */ Cpa64U numRsaDecryptCompleted; /**< Total number of RSA decrypt operations that completed * successfully. */ Cpa64U numRsaDecryptCompletedErrors; /**< Total number of RSA decrypt operations that could not be * completed successfully due to errors. */ + Cpa64U numKptRsaDecryptRequests; + /**< Total number of successful KPT RSA decrypt operation requests. */ + Cpa64U numKptRsaDecryptRequestErrors; + /**< Total number of KPT RSA decrypt requests that had an error and could + * not be processed. */ + Cpa64U numKptRsaDecryptCompleted; + /**< Total number of KPT RSA decrypt operations that completed + * successfully. */ + Cpa64U numKptRsaDecryptCompletedErrors; + /**< Total number of KPT RSA decrypt operations that could not be + * completed successfully due to errors. */ } CpaCyRsaStats64; /** ***************************************************************************** * @ingroup cpaCyRsa * Definition of the RSA key generation callback function. * * @description * This is the prototype for the RSA key generation callback function. The * callback function pointer is passed in as a parameter to the * cpaCyRsaGenKey function. It will be invoked once the request has * completed. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag Opaque value provided by user while making * individual function calls. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] pKeyGenOpData Structure with output params for callback. * @param[in] pPrivateKey Structure which contains pointers to the memory * into which the generated private key will be * written. * @param[in] pPublicKey Structure which contains pointers to the memory * into which the generated public key will be * written. The pointer to the public exponent (e) * that is returned in this structure is equal to * the input public exponent. * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * CpaCyRsaPrivateKey, * CpaCyRsaPublicKey, * cpaCyRsaGenKey() * *****************************************************************************/ typedef void (*CpaCyRsaKeyGenCbFunc)(void *pCallbackTag, CpaStatus status, void *pKeyGenOpData, CpaCyRsaPrivateKey *pPrivateKey, CpaCyRsaPublicKey *pPublicKey); /** ***************************************************************************** * @ingroup cpaCyRsa * Generate RSA keys. * * @description * This function will generate private and public keys for RSA as specified * in the PKCS #1 V2.1 standard. Both representation types of the private * key may be generated. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pRsaKeyGenCb Pointer to the callback function to be invoked * when the operation is complete. If this is * set to a NULL value the function will operate * synchronously. * @param[in] pCallbackTag Opaque User Data for this specific call. Will * be returned unchanged in the callback. * @param[in] pKeyGenOpData Structure containing all the data needed to * perform the RSA key generation operation. The * client code allocates the memory for this * structure. This component takes ownership of * the memory until it is returned in the * callback. * @param[out] pPrivateKey Structure which contains pointers to the memory * into which the generated private key will be * written. The client MUST allocate memory * for this structure, and for the pointers * within it, recursively; on return, these will * be populated. * @param[out] pPublicKey Structure which contains pointers to the memory * into which the generated public key will be * written. The memory for this structure and * for the modulusN parameter MUST be allocated * by the client, and will be populated on return * from the call. The field publicExponentE * is not modified or touched in any way; it is * the responsibility of the client to set this * to the same value as the corresponding * parameter on the CpaCyRsaKeyGenOpData * structure before using the key for encryption. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pRsaKeyGenCb is non-NULL, an asynchronous callback of type is * generated in response to this function call. * Any errors generated during processing are reported as part of the * callback status code. For optimal performance, data pointers SHOULD be * 8-byte aligned. * @see * CpaCyRsaKeyGenOpData, * CpaCyRsaKeyGenCbFunc, * cpaCyRsaEncrypt(), * cpaCyRsaDecrypt() * *****************************************************************************/ CpaStatus cpaCyRsaGenKey(const CpaInstanceHandle instanceHandle, const CpaCyRsaKeyGenCbFunc pRsaKeyGenCb, void *pCallbackTag, const CpaCyRsaKeyGenOpData *pKeyGenOpData, CpaCyRsaPrivateKey *pPrivateKey, CpaCyRsaPublicKey *pPublicKey); /** ***************************************************************************** * @ingroup cpaCyRsa * Perform the RSA encrypt (or verify) primitive operation on the input * data. * * @description * This function will perform an RSA encryption primitive operation on the * input data using the specified RSA public key. As the RSA encryption * primitive and verification primitive operations are mathematically * identical this function may also be used to perform an RSA verification * primitive operation. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pRsaEncryptCb Pointer to callback function to be invoked * when the operation is complete. If this is * set to a NULL value the function will operate * synchronously. * @param[in] pCallbackTag Opaque User Data for this specific call. Will * be returned unchanged in the callback. * @param[in] pEncryptOpData Structure containing all the data needed to * perform the RSA encryption operation. The * client code allocates the memory for this * structure. This component takes ownership of * the memory until it is returned in the * callback. * @param[out] pOutputData Pointer to structure into which the result of * the RSA encryption primitive is written. The * client MUST allocate this memory. The data * pointed to is an integer in big-endian order. * The value will be between 0 and the modulus * n - 1. * On invocation the callback function will * contain this parameter in the pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pRsaEncryptCb is non-NULL an asynchronous callback of type is * generated in response to this function call. * Any errors generated during processing are reported as part of the * callback status code. For optimal performance, data pointers SHOULD be * 8-byte aligned. * @see * CpaCyGenFlatBufCbFunc * CpaCyRsaEncryptOpData * cpaCyRsaGenKey() * cpaCyRsaDecrypt() * *****************************************************************************/ CpaStatus cpaCyRsaEncrypt(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pRsaEncryptCb, void *pCallbackTag, const CpaCyRsaEncryptOpData *pEncryptOpData, CpaFlatBuffer *pOutputData); /** ***************************************************************************** * @ingroup cpaCyRsa * Perform the RSA decrypt (or sign) primitive operation on the input * data. * * @description * This function will perform an RSA decryption primitive operation on the * input data using the specified RSA private key. As the RSA decryption * primitive and signing primitive operations are mathematically identical * this function may also be used to perform an RSA signing primitive * operation. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pRsaDecryptCb Pointer to callback function to be invoked * when the operation is complete. If this is * set to a NULL value the function will operate * synchronously. * @param[in] pCallbackTag Opaque User Data for this specific call. * Will be returned unchanged in the callback. * @param[in] pDecryptOpData Structure containing all the data needed to * perform the RSA decrypt operation. The * client code allocates the memory for this * structure. This component takes ownership * of the memory until it is returned in the * callback. * @param[out] pOutputData Pointer to structure into which the result of * the RSA decryption primitive is written. The * client MUST allocate this memory. The data * pointed to is an integer in big-endian order. * The value will be between 0 and the modulus * n - 1. * On invocation the callback function will * contain this parameter in the pOut parameter. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * When pRsaDecryptCb is non-NULL an asynchronous callback is generated in * response to this function call. * Any errors generated during processing are reported as part of the * callback status code. For optimal performance, data pointers SHOULD be * 8-byte aligned. * @see * CpaCyRsaDecryptOpData, * CpaCyGenFlatBufCbFunc, * cpaCyRsaGenKey(), * cpaCyRsaEncrypt() * *****************************************************************************/ CpaStatus cpaCyRsaDecrypt(const CpaInstanceHandle instanceHandle, const CpaCyGenFlatBufCbFunc pRsaDecryptCb, void *pCallbackTag, const CpaCyRsaDecryptOpData *pDecryptOpData, CpaFlatBuffer * pOutputData); /** ***************************************************************************** * @ingroup cpaCyRsa * Query statistics for a specific RSA instance. * * @deprecated * As of v1.3 of the Crypto API, this function has been deprecated, * replaced by @ref cpaCyRsaQueryStats64(). * * @description * This function will query a specific instance for RSA statistics. The * user MUST allocate the CpaCyRsaStats structure and pass the * reference to that into this function call. This function will write the * statistic results into the passed in CpaCyRsaStats structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pRsaStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyRsaStats * *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCyRsaQueryStats(const CpaInstanceHandle instanceHandle, struct _CpaCyRsaStats *pRsaStats); /** ***************************************************************************** * @ingroup cpaCyRsa * Query statistics (64-bit version) for a specific RSA instance. * * @description * This function will query a specific instance for RSA statistics. The * user MUST allocate the CpaCyRsaStats64 structure and pass the * reference to that into this function call. This function will write the * statistic results into the passed in CpaCyRsaStats64 structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pRsaStats Pointer to memory into which the statistics * will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner and no asynchronous * callback will be generated. * @see * CpaCyRsaStats64 *****************************************************************************/ CpaStatus cpaCyRsaQueryStats64(const CpaInstanceHandle instanceHandle, CpaCyRsaStats64 *pRsaStats); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_RSA_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_sym.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_sym.h index 416f4aa4bea8..934ad2520774 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_sym.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_sym.h @@ -1,1844 +1,1847 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_sym.h * * @defgroup cpaCySym Symmetric Cipher and Hash Cryptographic API * * @ingroup cpaCy * * @description * These functions specify the Cryptographic API for symmetric cipher, * hash, and combined cipher and hash operations. * *****************************************************************************/ #ifndef CPA_CY_SYM_H #define CPA_CY_SYM_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" /** ***************************************************************************** * @ingroup cpaCySym * Cryptographic component symmetric session context handle. * @description * Handle to a cryptographic session context. The memory for this handle * is allocated by the client. The size of the memory that the client needs * to allocate is determined by a call to the @ref * cpaCySymSessionCtxGetSize or @ref cpaCySymSessionCtxGetDynamicSize * functions. The session context memory is initialized with a call to * the @ref cpaCySymInitSession function. * This memory MUST not be freed until a call to @ref * cpaCySymRemoveSession has completed successfully. * *****************************************************************************/ typedef void * CpaCySymSessionCtx; /** ***************************************************************************** * @ingroup cpaCySym * Packet type for the cpaCySymPerformOp function * * @description * Enumeration which is used to indicate to the symmetric cryptographic * perform function on which type of packet the operation is required to * be invoked. Multi-part cipher and hash operations are useful when * processing needs to be performed on a message which is available to * the client in multiple parts (for example due to network fragmentation * of the packet). * * @note * There are some restrictions regarding the operations on which * partial packet processing is supported. For details, see the * function @ref cpaCySymPerformOp. * * @see * cpaCySymPerformOp() * *****************************************************************************/ typedef enum _CpaCySymPacketType { CPA_CY_SYM_PACKET_TYPE_FULL = 1, /**< Perform an operation on a full packet*/ CPA_CY_SYM_PACKET_TYPE_PARTIAL, /**< Perform a partial operation and maintain the state of the partial * operation within the session. This is used for either the first or * subsequent packets within a partial packet flow. */ CPA_CY_SYM_PACKET_TYPE_LAST_PARTIAL /**< Complete the last part of a multi-part operation */ } CpaCySymPacketType; /** ***************************************************************************** * @ingroup cpaCySym * Types of operations supported by the cpaCySymPerformOp function. * @description * This enumeration lists different types of operations supported by the * cpaCySymPerformOp function. The operation type is defined during * session registration and cannot be changed for a session once it has * been setup. * @see * cpaCySymPerformOp *****************************************************************************/ typedef enum _CpaCySymOp { CPA_CY_SYM_OP_NONE=0, /**< No operation */ CPA_CY_SYM_OP_CIPHER, /**< Cipher only operation on the data */ CPA_CY_SYM_OP_HASH, /**< Hash only operation on the data */ CPA_CY_SYM_OP_ALGORITHM_CHAINING /**< Chain any cipher with any hash operation. The order depends on * the value in the CpaCySymAlgChainOrder enum. * * This value is also used for authenticated ciphers (GCM and CCM), in * which case the cipherAlgorithm should take one of the values @ref * CPA_CY_SYM_CIPHER_AES_CCM or @ref CPA_CY_SYM_CIPHER_AES_GCM, while the * hashAlgorithm should take the corresponding value @ref * CPA_CY_SYM_HASH_AES_CCM or @ref CPA_CY_SYM_HASH_AES_GCM. */ } CpaCySymOp; /** ***************************************************************************** * @ingroup cpaCySym * Cipher algorithms. * @description * This enumeration lists supported cipher algorithms and modes. * *****************************************************************************/ typedef enum _CpaCySymCipherAlgorithm { CPA_CY_SYM_CIPHER_NULL = 1, /**< NULL cipher algorithm. No mode applies to the NULL algorithm. */ CPA_CY_SYM_CIPHER_ARC4, /**< (A)RC4 cipher algorithm */ CPA_CY_SYM_CIPHER_AES_ECB, /**< AES algorithm in ECB mode */ CPA_CY_SYM_CIPHER_AES_CBC, /**< AES algorithm in CBC mode */ CPA_CY_SYM_CIPHER_AES_CTR, /**< AES algorithm in Counter mode */ CPA_CY_SYM_CIPHER_AES_CCM, /**< AES algorithm in CCM mode. This authenticated cipher is only supported * when the hash mode is also set to CPA_CY_SYM_HASH_MODE_AUTH. When this * cipher algorithm is used the CPA_CY_SYM_HASH_AES_CCM element of the * CpaCySymHashAlgorithm enum MUST be used to set up the related * CpaCySymHashSetupData structure in the session context. */ CPA_CY_SYM_CIPHER_AES_GCM, /**< AES algorithm in GCM mode. This authenticated cipher is only supported * when the hash mode is also set to CPA_CY_SYM_HASH_MODE_AUTH. When this * cipher algorithm is used the CPA_CY_SYM_HASH_AES_GCM element of the * CpaCySymHashAlgorithm enum MUST be used to set up the related * CpaCySymHashSetupData structure in the session context. */ CPA_CY_SYM_CIPHER_DES_ECB, /**< DES algorithm in ECB mode */ CPA_CY_SYM_CIPHER_DES_CBC, /**< DES algorithm in CBC mode */ CPA_CY_SYM_CIPHER_3DES_ECB, /**< Triple DES algorithm in ECB mode */ CPA_CY_SYM_CIPHER_3DES_CBC, /**< Triple DES algorithm in CBC mode */ CPA_CY_SYM_CIPHER_3DES_CTR, /**< Triple DES algorithm in CTR mode */ CPA_CY_SYM_CIPHER_KASUMI_F8, /**< Kasumi algorithm in F8 mode */ CPA_CY_SYM_CIPHER_SNOW3G_UEA2, /**< SNOW3G algorithm in UEA2 mode */ CPA_CY_SYM_CIPHER_AES_F8, /**< AES algorithm in F8 mode */ CPA_CY_SYM_CIPHER_AES_XTS, /**< AES algorithm in XTS mode */ CPA_CY_SYM_CIPHER_ZUC_EEA3, /**< ZUC algorithm in EEA3 mode */ CPA_CY_SYM_CIPHER_CHACHA, /**< ChaCha20 Cipher Algorithm. This cipher is only supported for * algorithm chaining. When selected, the hash algorithm must be set to * CPA_CY_SYM_HASH_POLY and the hash mode must be set to * CPA_CY_SYM_HASH_MODE_AUTH. */ CPA_CY_SYM_CIPHER_SM4_ECB, /**< SM4 algorithm in ECB mode This cipher supports 128 bit keys only and * does not support partial processing. */ CPA_CY_SYM_CIPHER_SM4_CBC, /**< SM4 algorithm in CBC mode This cipher supports 128 bit keys only and * does not support partial processing. */ CPA_CY_SYM_CIPHER_SM4_CTR /**< SM4 algorithm in CTR mode This cipher supports 128 bit keys only and * does not support partial processing. */ } CpaCySymCipherAlgorithm; /** * @ingroup cpaCySym * Size of bitmap needed for cipher "capabilities" type. * * @description * Defines the number of bits in the bitmap to represent supported * ciphers in the type @ref CpaCySymCapabilitiesInfo. Should be set to * at least one greater than the largest value in the enumerated type * @ref CpaCySymHashAlgorithm, so that the value of the enum constant * can also be used as the bit position in the bitmap. * * A larger value was chosen to allow for extensibility without the need * to change the size of the bitmap (to ease backwards compatibility in * future versions of the API). */ #define CPA_CY_SYM_CIPHER_CAP_BITMAP_SIZE (32) /** ***************************************************************************** * @ingroup cpaCySym * Symmetric Cipher Direction * @description * This enum indicates the cipher direction (encryption or decryption). * *****************************************************************************/ typedef enum _CpaCySymCipherDirection { CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT = 1, /**< Encrypt Data */ CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT /**< Decrypt Data */ } CpaCySymCipherDirection; /** ***************************************************************************** * @ingroup cpaCySym * Symmetric Cipher Setup Data. * @description * This structure contains data relating to Cipher (Encryption and * Decryption) to set up a session. * *****************************************************************************/ typedef struct _CpaCySymCipherSetupData { CpaCySymCipherAlgorithm cipherAlgorithm; /**< Cipher algorithm and mode */ Cpa32U cipherKeyLenInBytes; /**< Cipher key length in bytes. For AES it can be 128 bits (16 bytes), * 192 bits (24 bytes) or 256 bits (32 bytes). * For the CCM mode of operation, the only supported key length is 128 bits * (16 bytes). * For the CPA_CY_SYM_CIPHER_AES_F8 mode of operation, cipherKeyLenInBytes * should be set to the combined length of the encryption key and the * keymask. Since the keymask and the encryption key are the same size, * cipherKeyLenInBytes should be set to 2 x the AES encryption key length. * For the AES-XTS mode of operation: * - Two keys must be provided and cipherKeyLenInBytes refers to total * length of the two keys. * - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes). * - Both keys must have the same size. */ Cpa8U *pCipherKey; /**< Cipher key * For the CPA_CY_SYM_CIPHER_AES_F8 mode of operation, pCipherKey will * point to a concatenation of the AES encryption key followed by a * keymask. As per RFC3711, the keymask should be padded with trailing * bytes to match the length of the encryption key used. * For AES-XTS mode of operation, two keys must be provided and pCipherKey * must point to the two keys concatenated together (Key1 || Key2). * cipherKeyLenInBytes will contain the total size of both keys. */ CpaCySymCipherDirection cipherDirection; /**< This parameter determines if the cipher operation is an encrypt or * a decrypt operation. * For the RC4 algorithm and the F8/CTR modes, only encrypt operations * are valid. */ } CpaCySymCipherSetupData; /** ***************************************************************************** * @ingroup cpaCySym * Symmetric Hash mode * @description * This enum indicates the Hash Mode. * *****************************************************************************/ typedef enum _CpaCySymHashMode { CPA_CY_SYM_HASH_MODE_PLAIN = 1, /**< Plain hash. Can be specified for MD5 and the SHA family of * hash algorithms. */ CPA_CY_SYM_HASH_MODE_AUTH, /**< Authenticated hash. This mode may be used in conjunction with the * MD5 and SHA family of algorithms to specify HMAC. It MUST also be * specified with all of the remaining algorithms, all of which are in * fact authentication algorithms. */ CPA_CY_SYM_HASH_MODE_NESTED /**< Nested hash. Can be specified for MD5 and the SHA family of * hash algorithms. */ } CpaCySymHashMode; /** ***************************************************************************** * @ingroup cpaCySym * Hash algorithms. * @description * This enumeration lists supported hash algorithms. * *****************************************************************************/ typedef enum _CpaCySymHashAlgorithm { CPA_CY_SYM_HASH_NONE = 0, /**< No hash algorithm. */ CPA_CY_SYM_HASH_MD5, /**< MD5 algorithm. Supported in all 3 hash modes */ CPA_CY_SYM_HASH_SHA1, /**< 128 bit SHA algorithm. Supported in all 3 hash modes */ CPA_CY_SYM_HASH_SHA224, /**< 224 bit SHA algorithm. Supported in all 3 hash modes */ CPA_CY_SYM_HASH_SHA256, /**< 256 bit SHA algorithm. Supported in all 3 hash modes */ CPA_CY_SYM_HASH_SHA384, /**< 384 bit SHA algorithm. Supported in all 3 hash modes */ CPA_CY_SYM_HASH_SHA512, /**< 512 bit SHA algorithm. Supported in all 3 hash modes */ CPA_CY_SYM_HASH_AES_XCBC, /**< AES XCBC algorithm. This is only supported in the hash mode * CPA_CY_SYM_HASH_MODE_AUTH. */ CPA_CY_SYM_HASH_AES_CCM, /**< AES algorithm in CCM mode. This authenticated cipher requires that the * hash mode is set to CPA_CY_SYM_HASH_MODE_AUTH. When this hash algorithm * is used, the CPA_CY_SYM_CIPHER_AES_CCM element of the * CpaCySymCipherAlgorithm enum MUST be used to set up the related * CpaCySymCipherSetupData structure in the session context. */ CPA_CY_SYM_HASH_AES_GCM, /**< AES algorithm in GCM mode. This authenticated cipher requires that the * hash mode is set to CPA_CY_SYM_HASH_MODE_AUTH. When this hash algorithm * is used, the CPA_CY_SYM_CIPHER_AES_GCM element of the * CpaCySymCipherAlgorithm enum MUST be used to set up the related * CpaCySymCipherSetupData structure in the session context. */ CPA_CY_SYM_HASH_KASUMI_F9, /**< Kasumi algorithm in F9 mode. This is only supported in the hash * mode CPA_CY_SYM_HASH_MODE_AUTH. */ CPA_CY_SYM_HASH_SNOW3G_UIA2, /**< SNOW3G algorithm in UIA2 mode. This is only supported in the hash * mode CPA_CY_SYM_HASH_MODE_AUTH. */ CPA_CY_SYM_HASH_AES_CMAC, /**< AES CMAC algorithm. This is only supported in the hash mode * CPA_CY_SYM_HASH_MODE_AUTH. */ CPA_CY_SYM_HASH_AES_GMAC, /**< AES GMAC algorithm. This is only supported in the hash mode * CPA_CY_SYM_HASH_MODE_AUTH. When this hash algorithm * is used, the CPA_CY_SYM_CIPHER_AES_GCM element of the * CpaCySymCipherAlgorithm enum MUST be used to set up the related * CpaCySymCipherSetupData structure in the session context. */ CPA_CY_SYM_HASH_AES_CBC_MAC, /**< AES-CBC-MAC algorithm. This is only supported in the hash mode * CPA_CY_SYM_HASH_MODE_AUTH. Only 128-bit keys are supported. */ CPA_CY_SYM_HASH_ZUC_EIA3, /**< ZUC algorithm in EIA3 mode */ - CPA_CY_SYM_HASH_SHA3_224, - /**< 224 bit SHA-3 algorithm. Only CPA_CY_SYM_HASH_MODE_PLAIN and - * CPA_CY_SYM_HASH_MODE_AUTH are supported, that is, the hash - * mode CPA_CY_SYM_HASH_MODE_NESTED is not supported for this algorithm. - */ CPA_CY_SYM_HASH_SHA3_256, /**< 256 bit SHA-3 algorithm. Only CPA_CY_SYM_HASH_MODE_PLAIN and * CPA_CY_SYM_HASH_MODE_AUTH are supported, that is, the hash * mode CPA_CY_SYM_HASH_MODE_NESTED is not supported for this algorithm. * Partial requests are not supported, that is, only requests * of CPA_CY_SYM_PACKET_TYPE_FULL are supported. */ + CPA_CY_SYM_HASH_SHA3_224, + /**< 224 bit SHA-3 algorithm. Only CPA_CY_SYM_HASH_MODE_PLAIN and + * CPA_CY_SYM_HASH_MODE_AUTH are supported, that is, the hash + * mode CPA_CY_SYM_HASH_MODE_NESTED is not supported for this algorithm. + */ CPA_CY_SYM_HASH_SHA3_384, /**< 384 bit SHA-3 algorithm. Only CPA_CY_SYM_HASH_MODE_PLAIN and * CPA_CY_SYM_HASH_MODE_AUTH are supported, that is, the hash * mode CPA_CY_SYM_HASH_MODE_NESTED is not supported for this algorithm. * Partial requests are not supported, that is, only requests * of CPA_CY_SYM_PACKET_TYPE_FULL are supported. */ CPA_CY_SYM_HASH_SHA3_512, /**< 512 bit SHA-3 algorithm. Only CPA_CY_SYM_HASH_MODE_PLAIN and * CPA_CY_SYM_HASH_MODE_AUTH are supported, that is, the hash * mode CPA_CY_SYM_HASH_MODE_NESTED is not supported for this algorithm. * Partial requests are not supported, that is, only requests * of CPA_CY_SYM_PACKET_TYPE_FULL are supported. */ CPA_CY_SYM_HASH_SHAKE_128, /**< 128 bit SHAKE algorithm. This is only supported in the hash * mode CPA_CY_SYM_HASH_MODE_PLAIN. Partial requests are not * supported, that is, only requests of CPA_CY_SYM_PACKET_TYPE_FULL * are supported. */ CPA_CY_SYM_HASH_SHAKE_256, /**< 256 bit SHAKE algorithm. This is only supported in the hash * mode CPA_CY_SYM_HASH_MODE_PLAIN. Partial requests are not * supported, that is, only requests of CPA_CY_SYM_PACKET_TYPE_FULL * are supported. */ CPA_CY_SYM_HASH_POLY, /**< Poly1305 hash algorithm. This is only supported in the hash mode * CPA_CY_SYM_HASH_MODE_AUTH. This hash algorithm is only supported * as part of an algorithm chain with AES_CY_SYM_CIPHER_CHACHA to * implement the ChaCha20-Poly1305 AEAD algorithm. */ CPA_CY_SYM_HASH_SM3 /**< SM3 hash algorithm. Supported in all 3 hash modes. */ } CpaCySymHashAlgorithm; /** * @ingroup cpaCySym * Size of bitmap needed for hash "capabilities" type. * * @description * Defines the number of bits in the bitmap to represent supported * hashes in the type @ref CpaCySymCapabilitiesInfo. Should be set to * at least one greater than the largest value in the enumerated type * @ref CpaCySymHashAlgorithm, so that the value of the enum constant * can also be used as the bit position in the bitmap. * * A larger value was chosen to allow for extensibility without the need * to change the size of the bitmap (to ease backwards compatibility in * future versions of the API). */ #define CPA_CY_SYM_HASH_CAP_BITMAP_SIZE (32) /** ***************************************************************************** * @ingroup cpaCySym * Hash Mode Nested Setup Data. * @description * This structure contains data relating to a hash session in * CPA_CY_SYM_HASH_MODE_NESTED mode. * *****************************************************************************/ typedef struct _CpaCySymHashNestedModeSetupData { Cpa8U *pInnerPrefixData; /**< A pointer to a buffer holding the Inner Prefix data. For optimal * performance the prefix data SHOULD be 8-byte aligned. This data is * prepended to the data being hashed before the inner hash operation is * performed. */ Cpa32U innerPrefixLenInBytes; /**< The inner prefix length in bytes. The maximum size the prefix data * can be is 255 bytes. */ CpaCySymHashAlgorithm outerHashAlgorithm; /**< The hash algorithm used for the outer hash. Note: The inner hash * algorithm is provided in the hash context. */ Cpa8U *pOuterPrefixData; /**< A pointer to a buffer holding the Outer Prefix data. For optimal * performance the prefix data SHOULD be 8-byte aligned. This data is * prepended to the output from the inner hash operation before the outer * hash operation is performed.*/ Cpa32U outerPrefixLenInBytes; /**< The outer prefix length in bytes. The maximum size the prefix data * can be is 255 bytes. */ } CpaCySymHashNestedModeSetupData; /** ***************************************************************************** * @ingroup cpaCySym * Hash Auth Mode Setup Data. * @description * This structure contains data relating to a hash session in * CPA_CY_SYM_HASH_MODE_AUTH mode. * *****************************************************************************/ typedef struct _CpaCySymHashAuthModeSetupData { Cpa8U *authKey; /**< Authentication key pointer. * For the GCM (@ref CPA_CY_SYM_HASH_AES_GCM) and CCM (@ref * CPA_CY_SYM_HASH_AES_CCM) modes of operation, this field is ignored; * the authentication key is the same as the cipher key (see * the field pCipherKey in struct @ref CpaCySymCipherSetupData). */ Cpa32U authKeyLenInBytes; /**< Length of the authentication key in bytes. The key length MUST be * less than or equal to the block size of the algorithm. It is the client's * responsibility to ensure that the key length is compliant with the * standard being used (for example RFC 2104, FIPS 198a). * * For the GCM (@ref CPA_CY_SYM_HASH_AES_GCM) and CCM (@ref * CPA_CY_SYM_HASH_AES_CCM) modes of operation, this field is ignored; * the authentication key is the same as the cipher key, and so is its * length (see the field cipherKeyLenInBytes in struct @ref * CpaCySymCipherSetupData). */ Cpa32U aadLenInBytes; /**< The length of the additional authenticated data (AAD) in bytes. * The maximum permitted value is 240 bytes, unless otherwise * specified below. * * This field must be specified when the hash algorithm is one of the * following: * - For SNOW3G (@ref CPA_CY_SYM_HASH_SNOW3G_UIA2), this is the * length of the IV (which should be 16). * - For GCM (@ref CPA_CY_SYM_HASH_AES_GCM). In this case, this is the * length of the Additional Authenticated Data (called A, in NIST * SP800-38D). * - For CCM (@ref CPA_CY_SYM_HASH_AES_CCM). In this case, this is the * length of the associated data (called A, in NIST SP800-38C). * Note that this does NOT include the length of any padding, or the * 18 bytes reserved at the start of the above field to store the * block B0 and the encoded length. The maximum permitted value in * this case is 222 bytes. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of operation * this field is not used and should be set to 0. Instead the length * of the AAD data is specified in the messageLenToHashInBytes field of * the CpaCySymOpData structure. */ } CpaCySymHashAuthModeSetupData; /** ***************************************************************************** * @ingroup cpaCySym * Hash Setup Data. * @description * This structure contains data relating to a hash session. The fields * hashAlgorithm, hashMode and digestResultLenInBytes are common to all * three hash modes and MUST be set for each mode. * *****************************************************************************/ typedef struct _CpaCySymHashSetupData { CpaCySymHashAlgorithm hashAlgorithm; /**< Hash algorithm. For mode CPA_CY_SYM_MODE_HASH_NESTED, this is the * inner hash algorithm. */ CpaCySymHashMode hashMode; /**< Mode of the hash operation. Valid options include plain, auth or * nested hash mode. */ Cpa32U digestResultLenInBytes; /**< Length of the digest to be returned. If the verify option is set, * this specifies the length of the digest to be compared for the * session. * * For CCM (@ref CPA_CY_SYM_HASH_AES_CCM), this is the octet length * of the MAC, which can be one of 4, 6, 8, 10, 12, 14 or 16. * * For GCM (@ref CPA_CY_SYM_HASH_AES_GCM), this is the length in bytes * of the authentication tag. * * If the value is less than the maximum length allowed by the hash, * the result shall be truncated. If the value is greater than the * maximum length allowed by the hash, an error (@ref * CPA_STATUS_INVALID_PARAM) is returned from the function @ref * cpaCySymInitSession. * * In the case of nested hash, it is the outer hash which determines * the maximum length allowed. */ CpaCySymHashAuthModeSetupData authModeSetupData; /**< Authentication Mode Setup Data. * Only valid for mode CPA_CY_SYM_MODE_HASH_AUTH */ CpaCySymHashNestedModeSetupData nestedModeSetupData; /**< Nested Hash Mode Setup Data * Only valid for mode CPA_CY_SYM_MODE_HASH_NESTED */ } CpaCySymHashSetupData; /** ***************************************************************************** * @ingroup cpaCySym * Algorithm Chaining Operation Ordering * @description * This enum defines the ordering of operations for algorithm chaining. * ****************************************************************************/ typedef enum _CpaCySymAlgChainOrder { CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER = 1, /**< Perform the hash operation followed by the cipher operation. If it is * required that the result of the hash (i.e. the digest) is going to be * included in the data to be ciphered, then: * *
    *
  • The digest MUST be placed in the destination buffer at the * location corresponding to the end of the data region to be hashed * (hashStartSrcOffsetInBytes + messageLenToHashInBytes), * i.e. there must be no gaps between the start of the digest and the * end of the data region to be hashed.
    • *
  • The messageLenToCipherInBytes member of the CpaCySymOpData * structure must be equal to the overall length of the plain text, * the digest length and any (optional) trailing data that is to be * included.
    • *
  • The messageLenToCipherInBytes must be a multiple to the block * size if a block cipher is being used.
    • *
* * The following is an example of the layout of the buffer before the * operation, after the hash, and after the cipher: @verbatim +-------------------------+---------------+ | Plaintext | Tail | +-------------------------+---------------+ <-messageLenToHashInBytes-> +-------------------------+--------+------+ | Plaintext | Digest | Tail | +-------------------------+--------+------+ <--------messageLenToCipherInBytes--------> +-----------------------------------------+ | Cipher Text | +-----------------------------------------+ @endverbatim */ CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH /**< Perform the cipher operation followed by the hash operation. * The hash operation will be performed on the ciphertext resulting from * the cipher operation. * * The following is an example of the layout of the buffer before the * operation, after the cipher, and after the hash: @verbatim +--------+---------------------------+---------------+ | Head | Plaintext | Tail | +--------+---------------------------+---------------+ <-messageLenToCipherInBytes-> +--------+---------------------------+---------------+ | Head | Ciphertext | Tail | +--------+---------------------------+---------------+ <------messageLenToHashInBytes-------> +--------+---------------------------+--------+------+ | Head | Ciphertext | Digest | Tail | +--------+---------------------------+--------+------+ @endverbatim * */ } CpaCySymAlgChainOrder; /** ***************************************************************************** * @ingroup cpaCySym * Session Setup Data. * @description * This structure contains data relating to setting up a session. The * client needs to complete the information in this structure in order to * setup a session. * ****************************************************************************/ typedef struct _CpaCySymSessionSetupData { CpaCyPriority sessionPriority; /**< Priority of this session */ CpaCySymOp symOperation; /**< Operation to perfom */ CpaCySymCipherSetupData cipherSetupData; /**< Cipher Setup Data for the session. This member is ignored for the * CPA_CY_SYM_OP_HASH operation. */ CpaCySymHashSetupData hashSetupData; /**< Hash Setup Data for a session. This member is ignored for the * CPA_CY_SYM_OP_CIPHER operation. */ CpaCySymAlgChainOrder algChainOrder; /**< If this operation data structure relates to an algorithm chaining * session then this parameter determines the order in which the chained * operations are performed. If this structure does not relate to an * algorithm chaining session then this parameter will be ignored. * * @note In the case of authenticated ciphers (GCM and CCM), which are * also presented as "algorithm chaining", this value is also ignored. * The chaining order is defined by the authenticated cipher, in those * cases. */ CpaBoolean digestIsAppended; /**< Flag indicating whether the digest is appended immediately following * the region over which the digest is computed. This is true for both * IPsec packets and SSL/TLS records. * * If this flag is set, then the value of the pDigestResult field of * the structure @ref CpaCySymOpData is ignored. * * @note The value of this field is ignored for the authenticated cipher * AES_CCM as the digest must be appended in this case. * * @note Setting digestIsAppended for hash only operations when * verifyDigest is also set is not supported. For hash only operations * when verifyDigest is set, digestIsAppended should be set to CPA_FALSE. */ CpaBoolean verifyDigest; /**< This flag is relevant only for operations which generate a message * digest. If set to true, the computed digest will not be written back * to the buffer location specified by other parameters, but instead will * be verified (i.e. compared to the value passed in at that location). * The number of bytes to be written or compared is indicated by the * digest output length for the session. * @note This option is only valid for full packets and for final * partial packets when using partials without algorithm chaining. * @note The value of this field is ignored for the authenticated ciphers * (AES_CCM and AES_GCM). Digest verification is always done for these * (when the direction is decrypt) and unless the DP API is used, * the message buffer will be zeroed if verification fails. When using the * DP API, it is the API clients responsibility to clear the message * buffer when digest verification fails. */ CpaBoolean partialsNotRequired; /**< This flag indicates if partial packet processing is required for this * session. If set to true, partial packet processing will not be enabled * for this session and any calls to cpaCySymPerformOp() with the * packetType parameter set to a value other than * CPA_CY_SYM_PACKET_TYPE_FULL will fail. */ } CpaCySymSessionSetupData ; /** ***************************************************************************** * @ingroup cpaCySym * Session Update Data. * @description * This structure contains data relating to resetting a session. ****************************************************************************/ typedef struct _CpaCySymSessionUpdateData { Cpa32U flags; /**< Flags indicating which fields to update. * All bits should be set to 0 except those fields to be updated. */ #define CPA_CY_SYM_SESUPD_CIPHER_KEY 1 << 0 #define CPA_CY_SYM_SESUPD_CIPHER_DIR 1 << 1 #define CPA_CY_SYM_SESUPD_AUTH_KEY 1 << 2 Cpa8U *pCipherKey; /**< Cipher key. * The same restrictions apply as described in the corresponding field * of the data structure @ref CpaCySymCipherSetupData. */ CpaCySymCipherDirection cipherDirection; /**< This parameter determines if the cipher operation is an encrypt or * a decrypt operation. * The same restrictions apply as described in the corresponding field * of the data structure @ref CpaCySymCipherSetupData. */ Cpa8U *authKey; /**< Authentication key pointer. * The same restrictions apply as described in the corresponding field * of the data structure @ref CpaCySymHashAuthModeSetupData. */ } CpaCySymSessionUpdateData; /** ***************************************************************************** * @ingroup cpaCySym * Cryptographic Component Operation Data. * @description * This structure contains data relating to performing cryptographic * processing on a data buffer. This request is used with * cpaCySymPerformOp() call for performing cipher, hash, auth cipher * or a combined hash and cipher operation. * * @see * CpaCySymPacketType * * @note * If the client modifies or frees the memory referenced in this structure * after it has been submitted to the cpaCySymPerformOp function, and * before it has been returned in the callback, undefined behavior will * result. ****************************************************************************/ typedef struct _CpaCySymOpData { CpaCySymSessionCtx sessionCtx; /**< Handle for the initialized session context */ CpaCySymPacketType packetType; /**< Selects the packet type */ Cpa8U *pIv; /**< Initialization Vector or Counter. * * - For block ciphers in CBC or F8 mode, or for Kasumi in F8 mode, or for * SNOW3G in UEA2 mode, this is the Initialization Vector (IV) * value. * - For block ciphers in CTR mode, this is the counter. * - For GCM mode, this is either the IV (if the length is 96 bits) or J0 * (for other sizes), where J0 is as defined by NIST SP800-38D. * Regardless of the IV length, a full 16 bytes needs to be allocated. * - For CCM mode, the first byte is reserved, and the nonce should be * written starting at &pIv[1] (to allow space for the implementation * to write in the flags in the first byte). Note that a full 16 bytes * should be allocated, even though the ivLenInBytes field will have * a value less than this. * The macro @ref CPA_CY_SYM_CCM_SET_NONCE may be used here. * - For AES-XTS, this is the 128bit tweak, i, from IEEE Std 1619-2007. * * For optimum performance, the data pointed to SHOULD be 8-byte * aligned. * * The IV/Counter will be updated after every partial cryptographic * operation. */ Cpa32U ivLenInBytes; /**< Length of valid IV data pointed to by the pIv parameter. * * - For block ciphers in CBC or F8 mode, or for Kasumi in F8 mode, or for * SNOW3G in UEA2 mode, this is the length of the IV (which * must be the same as the block length of the cipher). * - For block ciphers in CTR mode, this is the length of the counter * (which must be the same as the block length of the cipher). * - For GCM mode, this is either 12 (for 96-bit IVs) or 16, in which * case pIv points to J0. * - For CCM mode, this is the length of the nonce, which can be in the * range 7 to 13 inclusive. */ Cpa32U cryptoStartSrcOffsetInBytes; /**< Starting point for cipher processing, specified as number of bytes * from start of data in the source buffer. The result of the cipher * operation will be written back into the output buffer starting * at this location. */ Cpa32U messageLenToCipherInBytes; /**< The message length, in bytes, of the source buffer on which the * cryptographic operation will be computed. This must be a multiple of * the block size if a block cipher is being used. This is also the same * as the result length. * * @note In the case of CCM (@ref CPA_CY_SYM_HASH_AES_CCM), this value * should not include the length of the padding or the length of the * MAC; the driver will compute the actual number of bytes over which * the encryption will occur, which will include these values. * * @note There are limitations on this length for partial * operations. Refer to the cpaCySymPerformOp function description for * details. * * @note On some implementations, this length may be limited to a 16-bit * value (65535 bytes). * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC), this field * should be set to 0. */ Cpa32U hashStartSrcOffsetInBytes; /**< Starting point for hash processing, specified as number of bytes * from start of packet in source buffer. * * @note For CCM and GCM modes of operation, this field is ignored. * The field @ref pAdditionalAuthData field should be set instead. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of * operation, this field specifies the start of the AAD data in * the source buffer. */ Cpa32U messageLenToHashInBytes; /**< The message length, in bytes, of the source buffer that the hash * will be computed on. * * @note There are limitations on this length for partial operations. * Refer to the @ref cpaCySymPerformOp function description for details. * * @note For CCM and GCM modes of operation, this field is ignored. * The field @ref pAdditionalAuthData field should be set instead. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of * operation, this field specifies the length of the AAD data in the * source buffer. The maximum length supported for AAD data for AES-GMAC * is 16383 bytes. * * @note On some implementations, this length may be limited to a 16-bit * value (65535 bytes). */ Cpa8U *pDigestResult; /**< If the digestIsAppended member of the @ref CpaCySymSessionSetupData * structure is NOT set then this is a pointer to the location where the * digest result should be inserted (in the case of digest generation) * or where the purported digest exists (in the case of digest verification). * * At session registration time, the client specified the digest result * length with the digestResultLenInBytes member of the @ref * CpaCySymHashSetupData structure. The client must allocate at least * digestResultLenInBytes of physically contiguous memory at this location. * * For partial packet processing without algorithm chaining, this pointer * will be ignored for all but the final partial operation. * * For digest generation, the digest result will overwrite any data * at this location. * * @note For GCM (@ref CPA_CY_SYM_HASH_AES_GCM), for "digest result" * read "authentication tag T". * * If the digestIsAppended member of the @ref CpaCySymSessionSetupData * structure is set then this value is ignored and the digest result * is understood to be in the destination buffer for digest generation, * and in the source buffer for digest verification. The location of the * digest result in this case is immediately following the region over * which the digest is computed. * */ Cpa8U *pAdditionalAuthData; /**< Pointer to Additional Authenticated Data (AAD) needed for * authenticated cipher mechanisms (CCM and GCM), and to the IV for * SNOW3G authentication (@ref CPA_CY_SYM_HASH_SNOW3G_UIA2). * For other authentication mechanisms this pointer is ignored. * * The length of the data pointed to by this field is set up for * the session in the @ref CpaCySymHashAuthModeSetupData structure * as part of the @ref cpaCySymInitSession function call. This length * must not exceed 240 bytes. * * Specifically for CCM (@ref CPA_CY_SYM_HASH_AES_CCM), the caller * should setup this field as follows: * * - the nonce should be written starting at an offset of one byte * into the array, leaving room for the implementation to write in * the flags to the first byte. For example, *
* memcpy(&pOpData->pAdditionalAuthData[1], pNonce, nonceLen); *
* The macro @ref CPA_CY_SYM_CCM_SET_NONCE may be used here. * * - the additional authentication data itself should be written * starting at an offset of 18 bytes into the array, leaving room for * the length encoding in the first two bytes of the second block. * For example, *
* memcpy(&pOpData->pAdditionalAuthData[18], pAad, aadLen); *
* The macro @ref CPA_CY_SYM_CCM_SET_AAD may be used here. * * - the array should be big enough to hold the above fields, plus * any padding to round this up to the nearest multiple of the * block size (16 bytes). Padding will be added by the * implementation. * * Finally, for GCM (@ref CPA_CY_SYM_HASH_AES_GCM), the caller * should setup this field as follows: * * - the AAD is written in starting at byte 0 * - the array must be big enough to hold the AAD, plus any padding * to round this up to the nearest multiple of the block size (16 * bytes). Padding will be added by the implementation. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of * operation, this field is not used and should be set to 0. Instead * the AAD data should be placed in the source buffer. */ } CpaCySymOpData; /** ***************************************************************************** * @ingroup cpaCySym * Setup the nonce for CCM. * @description * This macro sets the nonce in the appropriate locations of the * @ref CpaCySymOpData struct for the authenticated encryption * algorithm @ref CPA_CY_SYM_HASH_AES_CCM. ****************************************************************************/ #define CPA_CY_SYM_CCM_SET_NONCE(pOpData, pNonce, nonceLen) do { \ memcpy(&pOpData->pIv[1], pNonce, nonceLen); \ memcpy(&pOpData->pAdditionalAuthData[1], pNonce, nonceLen); \ } while (0) /** ***************************************************************************** * @ingroup cpaCySym * Setup the additional authentication data for CCM. * @description * This macro sets the additional authentication data in the * appropriate location of the@ref CpaCySymOpData struct for the * authenticated encryptionalgorithm @ref CPA_CY_SYM_HASH_AES_CCM. ****************************************************************************/ #define CPA_CY_SYM_CCM_SET_AAD(pOpData, pAad, aadLen) do { \ memcpy(&pOpData->pAdditionalAuthData[18], pAad, aadLen); \ } while (0) /** ***************************************************************************** * @ingroup cpaCySym * Cryptographic Component Statistics. * @deprecated * As of v1.3 of the cryptographic API, this structure has been * deprecated, replaced by @ref CpaCySymStats64. * @description * This structure contains statistics on the Symmetric Cryptographic * operations. Statistics are set to zero when the component is * initialized. ****************************************************************************/ typedef struct _CpaCySymStats { Cpa32U numSessionsInitialized; /**< Number of session initialized */ Cpa32U numSessionsRemoved; /**< Number of sessions removed */ Cpa32U numSessionErrors; /**< Number of session initialized and removed errors. */ Cpa32U numSymOpRequests; /**< Number of successful symmetric operation requests. */ Cpa32U numSymOpRequestErrors; /**< Number of operation requests that had an error and could * not be processed. */ Cpa32U numSymOpCompleted; /**< Number of operations that completed successfully. */ Cpa32U numSymOpCompletedErrors; /**< Number of operations that could not be completed * successfully due to errors. */ Cpa32U numSymOpVerifyFailures; /**< Number of operations that completed successfully, but the * result of the digest verification test was that it failed. * Note that this does not indicate an error condition. */ } CpaCySymStats CPA_DEPRECATED; /** ***************************************************************************** * @ingroup cpaCySym * Cryptographic Component Statistics (64-bit version). * @description * This structure contains a 64-bit version of the statistics on * the Symmetric Cryptographic operations. * Statistics are set to zero when the component is initialized. ****************************************************************************/ typedef struct _CpaCySymStats64 { Cpa64U numSessionsInitialized; /**< Number of session initialized */ Cpa64U numSessionsRemoved; /**< Number of sessions removed */ Cpa64U numSessionErrors; /**< Number of session initialized and removed errors. */ Cpa64U numSymOpRequests; /**< Number of successful symmetric operation requests. */ Cpa64U numSymOpRequestErrors; /**< Number of operation requests that had an error and could * not be processed. */ Cpa64U numSymOpCompleted; /**< Number of operations that completed successfully. */ Cpa64U numSymOpCompletedErrors; /**< Number of operations that could not be completed * successfully due to errors. */ Cpa64U numSymOpVerifyFailures; /**< Number of operations that completed successfully, but the * result of the digest verification test was that it failed. * Note that this does not indicate an error condition. */ } CpaCySymStats64; /** ***************************************************************************** * @ingroup cpaCySym * Definition of callback function * * @description * This is the callback function prototype. The callback function is * registered by the application using the cpaCySymInitSession() * function call. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * Yes * * @param[in] pCallbackTag Opaque value provided by user while making * individual function call. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] operationType Identifies the operation type that was * requested in the cpaCySymPerformOp function. * @param[in] pOpData Pointer to structure with input parameters. * @param[in] pDstBuffer Caller MUST allocate a sufficiently sized * destination buffer to hold the data output. For * out-of-place processing the data outside the * cryptographic regions in the source buffer are * copied into the destination buffer. To perform * "in-place" processing set the pDstBuffer * parameter in cpaCySymPerformOp function to point * at the same location as pSrcBuffer. For optimum * performance, the data pointed to SHOULD be * 8-byte aligned. * @param[in] verifyResult This parameter is valid when the verifyDigest * option is set in the CpaCySymSessionSetupData * structure. A value of CPA_TRUE indicates that * the compare succeeded. A value of CPA_FALSE * indicates that the compare failed for an * unspecified reason. * * @retval * None * @pre * Component has been initialized. * @post * None * @note * None * @see * cpaCySymInitSession(), * cpaCySymRemoveSession() * *****************************************************************************/ typedef void (*CpaCySymCbFunc)(void *pCallbackTag, CpaStatus status, const CpaCySymOp operationType, void *pOpData, CpaBufferList *pDstBuffer, CpaBoolean verifyResult); /** ***************************************************************************** * @ingroup cpaCySym * Gets the size required to store a session context. * * @description * This function is used by the client to determine the size of the memory * it must allocate in order to store the session context. This MUST be * called before the client allocates the memory for the session context * and before the client calls the @ref cpaCySymInitSession function. * * For a given implementation of this API, it is safe to assume that * cpaCySymSessionCtxGetSize() will always return the same size and that * the size will not be different for different setup data parameters. * However, it should be noted that the size may change: * (1) between different implementations of the API (e.g. between software * and hardware implementations or between different hardware * implementations) * (2) between different releases of the same API implementation. * * The size returned by this function is the smallest size needed to * support all possible combinations of setup data parameters. Some * setup data parameter combinations may fit within a smaller session * context size. The alternate cpaCySymSessionCtxGetDynamicSize() * function will return the smallest size needed to fit the * provided setup data parameters. * * @context * This is a synchronous function that cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pSessionSetupData Pointer to session setup data which * contains parameters which are static * for a given cryptographic session such * as operation type, mechanisms, and keys * for cipher and/or hash operations. * @param[out] pSessionCtxSizeInBytes The amount of memory in bytes required * to hold the Session Context. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. * @see * CpaCySymSessionSetupData * cpaCySymInitSession() * cpaCySymSessionCtxGetDynamicSize() * cpaCySymPerformOp() * *****************************************************************************/ CpaStatus cpaCySymSessionCtxGetSize(const CpaInstanceHandle instanceHandle, const CpaCySymSessionSetupData *pSessionSetupData, Cpa32U *pSessionCtxSizeInBytes); /** ***************************************************************************** * @ingroup cpaCySym * Gets the minimum size required to store a session context. * * @description * This function is used by the client to determine the smallest size of * the memory it must allocate in order to store the session context. * This MUST be called before the client allocates the memory for the * session context and before the client calls the @ref cpaCySymInitSession * function. * * This function is an alternate to cpaCySymSessionGetSize(). * cpaCySymSessionCtxGetSize() will return a fixed size which is the * minimum memory size needed to support all possible setup data parameter * combinations. cpaCySymSessionCtxGetDynamicSize() will return the * minimum memory size needed to support the specific session setup * data parmeters provided. This size may be different for different setup * data parameters. * * @context * This is a synchronous function that cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pSessionSetupData Pointer to session setup data which * contains parameters which are static * for a given cryptographic session such * as operation type, mechanisms, and keys * for cipher and/or hash operations. * @param[out] pSessionCtxSizeInBytes The amount of memory in bytes required * to hold the Session Context. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. * @see * CpaCySymSessionSetupData * cpaCySymInitSession() * cpaCySymSessionCtxGetSize() * cpaCySymPerformOp() * *****************************************************************************/ CpaStatus cpaCySymSessionCtxGetDynamicSize(const CpaInstanceHandle instanceHandle, const CpaCySymSessionSetupData *pSessionSetupData, Cpa32U *pSessionCtxSizeInBytes); /** ***************************************************************************** * @ingroup cpaCySym * Initialize a session for symmetric cryptographic API. * * @description * This function is used by the client to initialize an asynchronous * completion callback function for the symmetric cryptographic * operations. Clients MAY register multiple callback functions using * this function. * The callback function is identified by the combination of userContext, * pSymCb and session context (sessionCtx). The session context is the * handle to the session and needs to be passed when processing calls. * Callbacks on completion of operations within a session are guaranteed * to be in the same order they were submitted in. * * @context * This is a synchronous function and it cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pSymCb Pointer to callback function to be * registered. Set to NULL if the * cpaCySymPerformOp function is required to * work in a synchronous manner. * @param[in] pSessionSetupData Pointer to session setup data which contains * parameters which are static for a given * cryptographic session such as operation * type, mechanisms, and keys for cipher and/or * hash operations. * @param[out] sessionCtx Pointer to the memory allocated by the * client to store the session context. This * will be initialized with this function. This * value needs to be passed to subsequent * processing calls. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. * @see * CpaCySymSessionCtx, * CpaCySymCbFunc, * CpaCySymSessionSetupData, * cpaCySymRemoveSession(), * cpaCySymPerformOp() * *****************************************************************************/ CpaStatus cpaCySymInitSession(const CpaInstanceHandle instanceHandle, const CpaCySymCbFunc pSymCb, const CpaCySymSessionSetupData *pSessionSetupData, CpaCySymSessionCtx sessionCtx); /** ***************************************************************************** * @ingroup cpaCySym * Remove (delete) a symmetric cryptographic session. * * @description * This function will remove a previously initialized session context * and the installed callback handler function. Removal will fail if * outstanding calls still exist for the initialized session handle. * The client needs to retry the remove function at a later time. * The memory for the session context MUST not be freed until this call * has completed successfully. * * @context * This is a synchronous function that cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in,out] pSessionCtx Session context to be removed. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * CpaCySymSessionCtx, * cpaCySymInitSession() * *****************************************************************************/ CpaStatus cpaCySymRemoveSession(const CpaInstanceHandle instanceHandle, CpaCySymSessionCtx pSessionCtx); /** ***************************************************************************** * @ingroup cpaCySym * Update a session. * * @description * This function is used to update certain parameters of a session, as * specified by the CpaCySymSessionUpdateData data structure. * * It can be used on sessions created with either the so-called * Traditional API (@ref cpaCySymInitSession) or the Data Plane API * (@ref cpaCySymDpInitSession). * * In order for this function to operate correctly, two criteria must * be met: * * - In the case of sessions created with the Traditional API, the * session must be stateless, i.e. the field partialsNotRequired of * the CpaCySymSessionSetupData data structure must be FALSE. * (Sessions created using the Data Plane API are always stateless.) * * - There must be no outstanding requests in flight for the session. * The application can call the function @ref cpaCySymSessionInUse * to test for this. * * Note that in the case of multi-threaded applications (which are * supported using the Traditional API only), this function may fail * even if a previous invocation of the function @ref * cpaCySymSessionInUse indicated that there were no outstanding * requests. * * @param[in] sessionCtx Identifies the session to be reset. * @param[in] pSessionUpdateData Pointer to session data which contains * the parameters to be updated. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. *****************************************************************************/ CpaStatus cpaCySymUpdateSession(CpaCySymSessionCtx sessionCtx, const CpaCySymSessionUpdateData *pSessionUpdateData); /** ***************************************************************************** * @ingroup cpaCySym * Indicates whether there are outstanding requests on a given * session. * * @description * This function is used to test whether there are outstanding * requests in flight for a specified session. This may be used * before resetting session parameters using the function @ref * cpaCySymResetSession. See some additional notes on * multi-threaded applications described on that function. * * @param[in] sessionCtx Identifies the session to be reset. * @param[out] pSessionInUse Returns CPA_TRUE if there are * outstanding requests on the session, * or CPA_FALSE otherwise. *****************************************************************************/ CpaStatus cpaCySymSessionInUse(CpaCySymSessionCtx sessionCtx, - CpaBoolean* pSessionInUse); + CpaBoolean* pSessionInUse); /** ***************************************************************************** * @ingroup cpaCySym * Perform a symmetric cryptographic operation on an existing session. * * @description * Performs a cipher, hash or combined (cipher and hash) operation on * the source data buffer using supported symmetric key algorithms and * modes. * * This function maintains cryptographic state between calls for * partial cryptographic operations. If a partial cryptographic * operation is being performed, then on a per-session basis, the next * part of the multi-part message can be submitted prior to previous * parts being completed, the only limitation being that all parts * must be performed in sequential order. * * If for any reason a client wishes to terminate the partial packet * processing on the session (for example if a packet fragment was lost) * then the client MUST remove the session. * * When using partial packet processing with algorithm chaining, only * the cipher state is maintained between calls. The hash state is * not be maintained between calls. Instead the hash digest will be * generated/verified for each call. If both the cipher state and * hash state need to be maintained between calls, algorithm chaining * cannot be used. * The following restrictions apply to the length: * * - When performing block based operations on a partial packet * (excluding the final partial packet), the data that is to be * operated on MUST be a multiple of the block size of the algorithm * being used. This restriction only applies to the cipher state * when using partial packets with algorithm chaining. * * - The final block must not be of length zero (0) if the operation * being performed is the authentication algorithm @ref * CPA_CY_SYM_HASH_AES_XCBC. This is because this algorithm requires * that the final block be XORed with another value internally. * If the length is zero, then the return code @ref * CPA_STATUS_INVALID_PARAM will be returned. * * - The length of the final block must be greater than or equal to * 16 bytes when using the @ref CPA_CY_SYM_CIPHER_AES_XTS cipher * algorithm. * * Partial packet processing is supported only when the following * conditions are true: * * - The cipher, hash or authentication operation is "in place" (that is, * pDstBuffer == pSrcBuffer) * * - The cipher or hash algorithm is NOT one of Kasumi or SNOW3G * * - The cipher mode is NOT F8 mode. * * - The hash algorithm is NOT SHAKE * * - The cipher algorithm is not SM4 * * - The cipher algorithm is not CPA_CY_SYM_CIPHER_CHACHA and the hash * algorithm is not CPA_CY_SYM_HASH_POLY. * + * - The cipher algorithm is not CPA_CY_SYM_CIPHER_AES_GCM and the hash + * algorithm is not CPA_CY_SYM_HASH_AES_GCM. + * * - The instance/implementation supports partial packets as one of * its capabilities (see @ref CpaCySymCapabilitiesInfo). * * The term "in-place" means that the result of the cryptographic * operation is written into the source buffer. The term "out-of-place" * means that the result of the cryptographic operation is written into * the destination buffer. To perform "in-place" processing, set the * pDstBuffer parameter to point at the same location as the pSrcBuffer * parameter. * * @context * When called as an asynchronous function it cannot sleep. It can be * executed in a context that does not permit sleeping. * When called as a synchronous function it may sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes when configured to operate in synchronous mode. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pCallbackTag Opaque data that will be returned to the client * in the callback. * @param[in] pOpData Pointer to a structure containing request * parameters. The client code allocates the memory * for this structure. This component takes * ownership of the memory until it is returned in * the callback. * @param[in] pSrcBuffer The source buffer. The caller MUST allocate * the source buffer and populate it * with data. For optimum performance, the data * pointed to SHOULD be 8-byte aligned. For * block ciphers, the data passed in MUST be * a multiple of the relevant block size. * i.e. padding WILL NOT be applied to the data. * For optimum performance, the buffer should * only contain the data region that the * cryptographic operation(s) must be performed on. * Any additional data in the source buffer may be * copied to the destination buffer and this copy * may degrade performance. * @param[out] pDstBuffer The destination buffer. The caller MUST * allocate a sufficiently sized destination * buffer to hold the data output (including * the authentication tag in the case of CCM). * Furthermore, the destination buffer must be the * same size as the source buffer (i.e. the sum of * lengths of the buffers in the buffer list must * be the same). This effectively means that the * source buffer must in fact be big enough to hold * the output data, too. This is because, * for out-of-place processing, the data outside the * regions in the source buffer on which * cryptographic operations are performed are copied * into the destination buffer. To perform * "in-place" processing set the pDstBuffer * parameter in cpaCySymPerformOp function to point * at the same location as pSrcBuffer. For optimum * performance, the data pointed to SHOULD be * 8-byte aligned. * @param[out] pVerifyResult In synchronous mode, this parameter is returned * when the verifyDigest option is set in the * CpaCySymSessionSetupData structure. A value of * CPA_TRUE indicates that the compare succeeded. A * value of CPA_FALSE indicates that the compare * failed for an unspecified reason. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resource. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized via cpaCyStartInstance function. * A Cryptographic session has been previously setup using the * @ref cpaCySymInitSession function call. * @post * None * * @note * When in asynchronous mode, a callback of type CpaCySymCbFunc is * generated in response to this function call. Any errors generated during * processing are reported as part of the callback status code. * * @see * CpaCySymOpData, * cpaCySymInitSession(), * cpaCySymRemoveSession() *****************************************************************************/ CpaStatus cpaCySymPerformOp(const CpaInstanceHandle instanceHandle, void *pCallbackTag, const CpaCySymOpData *pOpData, const CpaBufferList *pSrcBuffer, CpaBufferList *pDstBuffer, CpaBoolean *pVerifyResult); /** ***************************************************************************** * @ingroup cpaCySym * Query symmetric cryptographic statistics for a specific instance. * * @deprecated * As of v1.3 of the cryptographic API, this function has been * deprecated, replaced by @ref cpaCySymQueryStats64(). * * @description * This function will query a specific instance for statistics. The * user MUST allocate the CpaCySymStats structure and pass the * reference to that into this function call. This function will write * the statistic results into the passed in CpaCySymStats * structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pSymStats Pointer to memory into which the * statistics will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner, i.e. no asynchronous * callback will be generated. * @see * CpaCySymStats *****************************************************************************/ CpaStatus CPA_DEPRECATED cpaCySymQueryStats(const CpaInstanceHandle instanceHandle, struct _CpaCySymStats *pSymStats); /** ***************************************************************************** * @ingroup cpaCySym * Query symmetric cryptographic statistics (64-bit version) for a * specific instance. * * @description * This function will query a specific instance for statistics. The * user MUST allocate the CpaCySymStats64 structure and pass the * reference to that into this function call. This function will write * the statistic results into the passed in CpaCySymStats64 * structure. * * Note: statistics returned by this function do not interrupt current data * processing and as such can be slightly out of sync with operations that * are in progress during the statistics retrieval process. * * @context * This is a synchronous function and it can sleep. It MUST NOT be * executed in a context that DOES NOT permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * Yes * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[out] pSymStats Pointer to memory into which the * statistics will be written. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * This function operates in a synchronous manner, i.e. no asynchronous * callback will be generated. * @see * CpaCySymStats64 *****************************************************************************/ CpaStatus cpaCySymQueryStats64(const CpaInstanceHandle instanceHandle, CpaCySymStats64 *pSymStats); /** ***************************************************************************** * @ingroup cpaCySym * Symmetric Capabilities Info * * @description * This structure contains the capabilities that vary across * implementations of the symmetric sub-API of the cryptographic API. * This structure is used in conjunction with @ref * cpaCySymQueryCapabilities() to determine the capabilities supported * by a particular API implementation. * * For example, to see if an implementation supports cipher * @ref CPA_CY_SYM_CIPHER_AES_CBC, use the code * * @code if (CPA_BITMAP_BIT_TEST(capInfo.ciphers, CPA_CY_SYM_CIPHER_AES_CBC)) { // algo is supported } else { // algo is not supported } * @endcode * * The client MUST allocate memory for this structure and any members * that require memory. When the structure is passed into the function * ownership of the memory passes to the function. Ownership of the * memory returns to the client when the function returns. *****************************************************************************/ typedef struct _CpaCySymCapabilitiesInfo { CPA_BITMAP(ciphers, CPA_CY_SYM_CIPHER_CAP_BITMAP_SIZE); /**< Bitmap representing which cipher algorithms (and modes) are * supported by the instance. * Bits can be tested using the macro @ref CPA_BITMAP_BIT_TEST. * The bit positions are those specified in the enumerated type * @ref CpaCySymCipherAlgorithm. */ CPA_BITMAP(hashes, CPA_CY_SYM_HASH_CAP_BITMAP_SIZE); /**< Bitmap representing which hash/authentication algorithms are * supported by the instance. * Bits can be tested using the macro @ref CPA_BITMAP_BIT_TEST. * The bit positions are those specified in the enumerated type * @ref CpaCySymHashAlgorithm. */ CpaBoolean partialPacketSupported; /**< CPA_TRUE if instance supports partial packets. * See @ref CpaCySymPacketType. */ } CpaCySymCapabilitiesInfo; /** ***************************************************************************** * @ingroup cpaCySym * Returns capabilities of the symmetric API group of a Cryptographic * API instance. * * @description * This function is used to determine which specific capabilities are * supported within the symmetric sub-group of the Cryptographic API. * * @context * The function shall not be called in an interrupt context. * @assumptions * None * @sideEffects * None * @blocking * This function is synchronous and blocking. * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Handle to an instance of this API. * @param[out] pCapInfo Pointer to capabilities info structure. * All fields in the structure * are populated by the API instance. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The instance has been initialized via the @ref cpaCyStartInstance * function. * @post * None *****************************************************************************/ CpaStatus cpaCySymQueryCapabilities(const CpaInstanceHandle instanceHandle, CpaCySymCapabilitiesInfo * pCapInfo); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_SYM_H */ diff --git a/sys/dev/qat/qat_api/include/lac/cpa_cy_sym_dp.h b/sys/dev/qat/qat_api/include/lac/cpa_cy_sym_dp.h index df6cc922b45d..479cb72c2cf2 100644 --- a/sys/dev/qat/qat_api/include/lac/cpa_cy_sym_dp.h +++ b/sys/dev/qat/qat_api/include/lac/cpa_cy_sym_dp.h @@ -1,986 +1,986 @@ /*************************************************************************** * * BSD LICENSE * - * Copyright(c) 2007-2022 Intel Corporation. All rights reserved. + * Copyright(c) 2007-2023 Intel Corporation. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ***************************************************************************/ /* ***************************************************************************** * Doxygen group definitions ****************************************************************************/ /** ***************************************************************************** * @file cpa_cy_sym_dp.h * * @defgroup cpaCySymDp Symmetric cryptographic Data Plane API * * @ingroup cpaCySym * * @description * These data structures and functions specify the Data Plane API * for symmetric cipher, hash, and combined cipher and hash * operations. * * This API is recommended for data plane applications, in which the * cost of offload - that is, the cycles consumed by the driver in * sending requests to the hardware, and processing responses - needs * to be minimized. In particular, use of this API is recommended * if the following constraints are acceptable to your application: * * - Thread safety is not guaranteed. Each software thread should * have access to its own unique instance (CpaInstanceHandle) to * avoid contention. * - Polling is used, rather than interrupts (which are expensive). * Implementations of this API will provide a function (not * defined as part of this API) to read responses from the hardware * response queue and dispatch callback functions, as specified on * this API. * - Buffers and buffer lists are passed using physical addresses, * to avoid virtual to physical address translation costs. * - For GCM and CCM modes of AES, when performing decryption and * verification, if verification fails, then the message buffer * will NOT be zeroed. (This is a consequence of using physical * addresses for the buffers.) * - The ability to enqueue one or more requests without submitting * them to the hardware allows for certain costs to be amortized * across multiple requests. * - Only asynchronous invocation is supported. * - There is no support for partial packets. * - Implementations may provide certain features as optional at * build time, such as atomic counters. * - The "default" instance (@ref CPA_INSTANCE_HANDLE_SINGLE) is not * supported on this API. The specific handle should be obtained * using the instance discovery functions (@ref cpaCyGetNumInstances, * @ref cpaCyGetInstances). * * @note Performance Trade-Offs * Different implementations of this API may have different performance * trade-offs; please refer to the documentation for your implementation * for details. However, the following concepts informed the definition * of this API. * * The API distinguishes between enqueuing a request and actually * submitting that request to the cryptographic acceleration * engine to be performed. This allows multiple requests to be enqueued * (either individually or in batch), and then for all enqueued requests * to be submitted in a single operation. The rationale is that in some * (especially hardware-based) implementations, the submit operation * is expensive; for example, it may incur an MMIO instruction. The * API allows this cost to be amortized over a number of requests. The * precise number of such requests can be tuned for optimal * performance. * * Specifically: * * - The function @ref cpaCySymDpEnqueueOp allows one request to be * enqueued, and optionally for that request (and all previously * enqueued requests) to be submitted. * - The function @ref cpaCySymDpEnqueueOpBatch allows multiple * requests to be enqueued, and optionally for those requests (and all * previously enqueued requests) to be submitted. * - The function @ref cpaCySymDpPerformOpNow enqueues no requests, but * submits all previously enqueued requests. *****************************************************************************/ #ifndef CPA_CY_SYM_DP_H #define CPA_CY_SYM_DP_H #ifdef __cplusplus extern "C" { #endif #include "cpa_cy_common.h" #include "cpa_cy_sym.h" /** ***************************************************************************** * @ingroup cpaCySymDp * Cryptographic component symmetric session context handle for the * data plane API. * @description * Handle to a cryptographic data plane session context. The memory for * this handle is allocated by the client. The size of the memory that * the client needs to allocate is determined by a call to the @ref * cpaCySymDpSessionCtxGetSize or @ref cpaCySymDpSessionCtxGetDynamicSize * functions. The session context memory is initialized with a call to * the @ref cpaCySymInitSession function. * This memory MUST not be freed until a call to @ref * cpaCySymDpRemoveSession has completed successfully. * *****************************************************************************/ typedef void * CpaCySymDpSessionCtx; /** ***************************************************************************** * @ingroup cpaCySymDp * Operation Data for cryptographic data plane API. * * @description * This structure contains data relating to a request to perform * symmetric cryptographic processing on one or more data buffers. * * The physical memory to which this structure points needs to be * at least 8-byte aligned. * * All reserved fields SHOULD NOT be written or read by the * calling code. * * @see * cpaCySymDpEnqueueOp, cpaCySymDpEnqueueOpBatch ****************************************************************************/ typedef struct _CpaCySymDpOpData { Cpa64U reserved0; /**< Reserved for internal usage. */ Cpa32U cryptoStartSrcOffsetInBytes; /**< Starting point for cipher processing, specified as number of bytes * from start of data in the source buffer. The result of the cipher * operation will be written back into the buffer starting at this * location in the destination buffer. */ Cpa32U messageLenToCipherInBytes; /**< The message length, in bytes, of the source buffer on which the * cryptographic operation will be computed. This must be a multiple of * the block size if a block cipher is being used. This is also the * same as the result length. * * @note In the case of CCM (@ref CPA_CY_SYM_HASH_AES_CCM), this value * should not include the length of the padding or the length of the * MAC; the driver will compute the actual number of bytes over which * the encryption will occur, which will include these values. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC), this field * should be set to 0. * * @note On some implementations, this length may be limited to a 16-bit * value (65535 bytes). */ CpaPhysicalAddr iv; /**< Initialization Vector or Counter. Specifically, this is the * physical address of one of the following: * * - For block ciphers in CBC mode, or for Kasumi in F8 mode, or for * SNOW3G in UEA2 mode, this is the Initialization Vector (IV) * value. * - For ARC4, this is reserved for internal usage. * - For block ciphers in CTR mode, this is the counter. * - For GCM mode, this is either the IV (if the length is 96 bits) or J0 * (for other sizes), where J0 is as defined by NIST SP800-38D. * Regardless of the IV length, a full 16 bytes needs to be allocated. * - For CCM mode, the first byte is reserved, and the nonce should be * written starting at &pIv[1] (to allow space for the implementation * to write in the flags in the first byte). Note that a full 16 bytes * should be allocated, even though the ivLenInBytes field will have * a value less than this. * The macro @ref CPA_CY_SYM_CCM_SET_NONCE may be used here. */ Cpa64U reserved1; /**< Reserved for internal usage. */ Cpa32U hashStartSrcOffsetInBytes; /**< Starting point for hash processing, specified as number of bytes * from start of packet in source buffer. * * @note For CCM and GCM modes of operation, this value in this field * is ignored, and the field is reserved for internal usage. * The fields @ref additionalAuthData and @ref pAdditionalAuthData * should be set instead. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of * operation, this field specifies the start of the AAD data in * the source buffer. */ Cpa32U messageLenToHashInBytes; /**< The message length, in bytes, of the source buffer that the hash * will be computed on. * * @note For CCM and GCM modes of operation, this value in this field * is ignored, and the field is reserved for internal usage. * The fields @ref additionalAuthData and @ref pAdditionalAuthData * should be set instead. * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of * operation, this field specifies the length of the AAD data in the * source buffer. * * @note On some implementations, this length may be limited to a 16-bit * value (65535 bytes). */ CpaPhysicalAddr additionalAuthData; /**< Physical address of the Additional Authenticated Data (AAD), * which is needed for authenticated cipher mechanisms (CCM and * GCM), and to the IV for SNOW3G authentication (@ref * CPA_CY_SYM_HASH_SNOW3G_UIA2). For other authentication * mechanisms, this value is ignored, and the field is reserved for * internal usage. * * The length of the data pointed to by this field is set up for * the session in the @ref CpaCySymHashAuthModeSetupData structure * as part of the @ref cpaCySymDpInitSession function call. This length * must not exceed 240 bytes. * If AAD is not used, this address must be set to zero. * * Specifically for CCM (@ref CPA_CY_SYM_HASH_AES_CCM) and GCM (@ref * CPA_CY_SYM_HASH_AES_GCM), the caller should be setup as described in * the same way as the corresponding field, pAdditionalAuthData, on the * "traditional" API (see the @ref CpaCySymOpData). * * @note For AES-GMAC (@ref CPA_CY_SYM_HASH_AES_GMAC) mode of * operation, this field is not used and should be set to 0. Instead * the AAD data should be placed in the source buffer. * */ CpaPhysicalAddr digestResult; /**< If the digestIsAppended member of the @ref CpaCySymSessionSetupData * structure is NOT set then this is the physical address of the location * where the digest result should be inserted (in the case of digest * generation) or where the purported digest exists (in the case of digest * verification). * * At session registration time, the client specified the digest result * length with the digestResultLenInBytes member of the @ref * CpaCySymHashSetupData structure. The client must allocate at least * digestResultLenInBytes of physically contiguous memory at this location. * * For digest generation, the digest result will overwrite any data * at this location. * * @note For GCM (@ref CPA_CY_SYM_HASH_AES_GCM), for "digest result" * read "authentication tag T". * * If the digestIsAppended member of the @ref CpaCySymSessionSetupData * structure is set then this value is ignored and the digest result * is understood to be in the destination buffer for digest generation, * and in the source buffer for digest verification. The location of the * digest result in this case is immediately following the region over * which the digest is computed. */ CpaInstanceHandle instanceHandle; /**< Instance to which the request is to be enqueued. * @note A callback function must have been registered on the instance * using @ref cpaCySymDpRegCbFunc. */ CpaCySymDpSessionCtx sessionCtx; /**< Session context specifying the cryptographic parameters for this * request. * @note The session must have been created using @ref * cpaCySymDpInitSession. */ Cpa32U ivLenInBytes; /**< Length of valid IV data pointed to by the pIv parameter. * * - For block ciphers in CBC mode, or for Kasumi in F8 mode, or for * SNOW3G in UEA2 mode, this is the length of the IV (which * must be the same as the block length of the cipher). * - For block ciphers in CTR mode, this is the length of the counter * (which must be the same as the block length of the cipher). * - For GCM mode, this is either 12 (for 96-bit IVs) or 16, in which * case pIv points to J0. * - For CCM mode, this is the length of the nonce, which can be in the * range 7 to 13 inclusive. */ CpaPhysicalAddr srcBuffer; /**< Physical address of the source buffer on which to operate. * This is either: * * - The location of the data, of length srcBufferLen; or, * - If srcBufferLen has the special value @ref CPA_DP_BUFLIST, then * srcBuffer contains the location where a @ref CpaPhysBufferList is * stored. In this case, the CpaPhysBufferList MUST be aligned * on an 8-byte boundary. * - For optimum performance, the buffer should only contain the data * region that the cryptographic operation(s) must be performed on. * Any additional data in the source buffer may be copied to the * destination buffer and this copy may degrade performance. */ Cpa32U srcBufferLen; /**< Length of source buffer, or @ref CPA_DP_BUFLIST. */ CpaPhysicalAddr dstBuffer; /**< Physical address of the destination buffer on which to operate. * This is either: * * - The location of the data, of length srcBufferLen; or, * - If srcBufferLen has the special value @ref CPA_DP_BUFLIST, then * srcBuffer contains the location where a @ref CpaPhysBufferList is * stored. In this case, the CpaPhysBufferList MUST be aligned * on an 8-byte boundary. * * For "in-place" operation, the dstBuffer may be identical to the * srcBuffer. */ Cpa32U dstBufferLen; /**< Length of destination buffer, or @ref CPA_DP_BUFLIST. */ CpaPhysicalAddr thisPhys; /**< Physical address of this data structure */ Cpa8U* pIv; /**< Pointer to (and therefore, the virtual address of) the IV field * above. * Needed here because the driver in some cases writes to this field, * in addition to sending it to the accelerator. */ Cpa8U *pAdditionalAuthData; /**< Pointer to (and therefore, the virtual address of) the * additionalAuthData field above. * Needed here because the driver in some cases writes to this field, * in addition to sending it to the accelerator. */ void* pCallbackTag; /**< Opaque data that will be returned to the client in the function * completion callback. * * This opaque data is not used by the implementation of the API, * but is simply returned as part of the asynchronous response. * It may be used to store information that might be useful when * processing the response later. */ } CpaCySymDpOpData; /** ***************************************************************************** * @ingroup cpaCySymDp * Definition of callback function for cryptographic data plane API. * * @description * This is the callback function prototype. The callback function is * registered by the application using the @ref cpaCySymDpRegCbFunc * function call, and called back on completion of asycnhronous * requests made via calls to @ref cpaCySymDpEnqueueOp or @ref * cpaCySymDpEnqueueOpBatch. * * @context * This callback function can be executed in a context that DOES NOT * permit sleeping to occur. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * No * * @param[in] pOpData Pointer to the CpaCySymDpOpData object which * was supplied as part of the original request. * @param[in] status Status of the operation. Valid values are * CPA_STATUS_SUCCESS, CPA_STATUS_FAIL and * CPA_STATUS_UNSUPPORTED. * @param[in] verifyResult This parameter is valid when the verifyDigest * option is set in the CpaCySymSessionSetupData * structure. A value of CPA_TRUE indicates that * the compare succeeded. A value of CPA_FALSE * indicates that the compare failed. * * @return * None * @pre * Component has been initialized. * Callback has been registered with @ref cpaCySymDpRegCbFunc. * @post * None * @note * None * @see * cpaCySymDpRegCbFunc *****************************************************************************/ typedef void (*CpaCySymDpCbFunc)(CpaCySymDpOpData *pOpData, CpaStatus status, CpaBoolean verifyResult); /** ***************************************************************************** * @ingroup cpaCySymDp * Registration of the operation completion callback function. * * @description * This function allows a completion callback function to be registered. * The registered callback function is invoked on completion of * asycnhronous requests made via calls to @ref cpaCySymDpEnqueueOp * or @ref cpaCySymDpEnqueueOpBatch. * * If a callback function was previously registered, it is overwritten. * * @context * This is a synchronous function and it cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @reentrant * No * @threadSafe * No * * @param[in] instanceHandle Instance on which the callback function is to be * registered. * @param[in] pSymNewCb Callback function for this instance. * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * Component has been initialized. * @post * None * @note * None * @see * CpaCySymDpCbFunc *****************************************************************************/ CpaStatus cpaCySymDpRegCbFunc(const CpaInstanceHandle instanceHandle, const CpaCySymDpCbFunc pSymNewCb); /** ***************************************************************************** * @ingroup cpaCySymDp * Gets the size required to store a session context for the data plane * API. * * @description * This function is used by the client to determine the size of the memory * it must allocate in order to store the session context. This MUST be * called before the client allocates the memory for the session context * and before the client calls the @ref cpaCySymDpInitSession function. * * For a given implementation of this API, it is safe to assume that * cpaCySymDpSessionCtxGetSize() will always return the same size and that * the size will not be different for different setup data parameters. * However, it should be noted that the size may change: * (1) between different implementations of the API (e.g. between software * and hardware implementations or between different hardware * implementations) * (2) between different releases of the same API implementation. * * The size returned by this function is the smallest size needed to * support all possible combinations of setup data parameters. Some * setup data parameter combinations may fit within a smaller session * context size. The alternate cpaCySymDpSessionCtxGetDynamicSize() * function will return the smallest size needed to fit the * provided setup data parameters. * * @context * This is a synchronous function that cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pSessionSetupData Pointer to session setup data which * contains parameters which are static * for a given cryptographic session such * as operation type, mechanisms, and keys * for cipher and/or hash operations. * @param[out] pSessionCtxSizeInBytes The amount of memory in bytes required * to hold the Session Context. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. * @see * CpaCySymSessionSetupData * cpaCySymDpSessionCtxGetDynamicSize() * cpaCySymDpInitSession() *****************************************************************************/ CpaStatus cpaCySymDpSessionCtxGetSize(const CpaInstanceHandle instanceHandle, const CpaCySymSessionSetupData *pSessionSetupData, Cpa32U *pSessionCtxSizeInBytes); /** ***************************************************************************** * @ingroup cpaCySymDp * Gets the minimum size required to store a session context for the data * plane API. * * @description * This function is used by the client to determine the smallest size of * the memory it must allocate in order to store the session context. * This MUST be called before the client allocates the memory for the * session context and before the client calls the * @ref cpaCySymDpInitSession function. * * This function is an alternate to cpaCySymDpSessionGetSize(). * cpaCySymDpSessionCtxGetSize() will return a fixed size which is the * minimum memory size needed to support all possible setup data parameter * combinations. cpaCySymDpSessionCtxGetDynamicSize() will return the * minimum memory size needed to support the specific session setup * data parmeters provided. This size may be different for different setup * data parameters. * * @context * This is a synchronous function that cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * Yes * * @param[in] instanceHandle Instance handle. * @param[in] pSessionSetupData Pointer to session setup data which * contains parameters which are static * for a given cryptographic session such * as operation type, mechanisms, and keys * for cipher and/or hash operations. * @param[out] pSessionCtxSizeInBytes The amount of memory in bytes required * to hold the Session Context. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. * @see * CpaCySymSessionSetupData * cpaCySymDpSessionCtxGetSize() * cpaCySymDpInitSession() *****************************************************************************/ CpaStatus cpaCySymDpSessionCtxGetDynamicSize(const CpaInstanceHandle instanceHandle, const CpaCySymSessionSetupData *pSessionSetupData, Cpa32U *pSessionCtxSizeInBytes); /** ***************************************************************************** * @ingroup cpaCySymDp * Initialize a session for the symmetric cryptographic data plane API. * * @description * This function is used by the client to initialize an asynchronous * session context for symmetric cryptographic data plane operations. * The returned session context is the handle to the session and needs to * be passed when requesting cryptographic operations to be performed. * * Only sessions created using this function may be used when * invoking functions on this API * * The session can be removed using @ref cpaCySymDpRemoveSession. * * @context * This is a synchronous function and it cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] instanceHandle Instance to which the requests will be * submitted. * @param[in] pSessionSetupData Pointer to session setup data which * contains parameters that are static * for a given cryptographic session such * as operation type, algorithm, and keys * for cipher and/or hash operations. * @param[out] sessionCtx Pointer to the memory allocated by the * client to store the session context. This * memory must be physically contiguous, and * its length (in bytes) must be at least as * big as specified by a call to @ref * cpaCySymDpSessionCtxGetSize. This memory * will be initialized with this function. This * value needs to be passed to subsequent * processing calls. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * This is a synchronous function and has no completion callback * associated with it. * @see * cpaCySymDpSessionCtxGetSize, cpaCySymDpRemoveSession *****************************************************************************/ CpaStatus cpaCySymDpInitSession(CpaInstanceHandle instanceHandle, const CpaCySymSessionSetupData *pSessionSetupData, CpaCySymDpSessionCtx sessionCtx); /** ***************************************************************************** * @ingroup cpaCySymDp * Remove (delete) a symmetric cryptographic session for the data plane * API. * * @description * This function will remove a previously initialized session context * and the installed callback handler function. Removal will fail if * outstanding calls still exist for the initialized session handle. * The client needs to retry the remove function at a later time. * The memory for the session context MUST not be freed until this call * has completed successfully. * * @context * This is a synchronous function that cannot sleep. It can be * executed in a context that does not permit sleeping. * @assumptions * None * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] instanceHandle Instance handle. * @param[in,out] sessionCtx Session context to be removed. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESOURCE Error related to system resources. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * @post * None * @note * Note that this is a synchronous function and has no completion callback * associated with it. * * @see * CpaCySymDpSessionCtx, * cpaCySymDpInitSession() * *****************************************************************************/ CpaStatus cpaCySymDpRemoveSession(const CpaInstanceHandle instanceHandle, CpaCySymDpSessionCtx sessionCtx); /** ***************************************************************************** * @ingroup cpaCySymDp * Enqueue a single symmetric cryptographic request. * * @description * This function enqueues a single request to perform a cipher, * hash or combined (cipher and hash) operation. Optionally, the * request is also submitted to the cryptographic engine to be * performed. * * See note about performance trade-offs on the @ref cpaCySymDp API. * * The function is asynchronous; control is returned to the user once * the request has been submitted. On completion of the request, the * application may poll for responses, which will cause a callback * function (registered via @ref cpaCySymDpRegCbFunc) to be invoked. * Callbacks within a session are guaranteed to be in the same order * in which they were submitted. * * The following restrictions apply to the pOpData parameter: * * - The memory MUST be aligned on an 8-byte boundary. * - The structure MUST reside in physically contiguous memory. * - The reserved fields of the structure SHOULD NOT be written * or read by the calling code. * * @context * This function will not sleep, and hence can be executed in a context * that does not permit sleeping. * * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] pOpData Pointer to a structure containing the * request parameters. The client code allocates * the memory for this structure. This component * takes ownership of the memory until it is * returned in the callback, which was registered * on the instance via @ref cpaCySymDpRegCbFunc. * See the above Description for restrictions * that apply to this parameter. * @param[in] performOpNow Flag to specify whether the operation should be * performed immediately (CPA_TRUE), or simply * enqueued to be performed later (CPA_FALSE). * In the latter case, the request is submitted * to be performed either by calling this function * again with this flag set to CPA_TRUE, or by * invoking the function @ref * cpaCySymDpPerformOpNow. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The session identified by pOpData->sessionCtx was setup using * @ref cpaCySymDpInitSession. * The instance identified by pOpData->instanceHandle has had a * callback function registered via @ref cpaCySymDpRegCbFunc. * * @post * None * * @note * A callback of type @ref CpaCySymDpCbFunc is generated in response to * this function call. Any errors generated during processing are * reported as part of the callback status code. * * @see * cpaCySymDpInitSession, * cpaCySymDpPerformOpNow *****************************************************************************/ CpaStatus cpaCySymDpEnqueueOp(CpaCySymDpOpData *pOpData, const CpaBoolean performOpNow); /** ***************************************************************************** * @ingroup cpaCySymDp * Enqueue multiple requests to the symmetric cryptographic data plane * API. * * @description * This function enqueues multiple requests to perform cipher, hash * or combined (cipher and hash) operations. * See note about performance trade-offs on the @ref cpaCySymDp API. * * The function is asynchronous; control is returned to the user once * the request has been submitted. On completion of the request, the * application may poll for responses, which will cause a callback * function (registered via @ref cpaCySymDpRegCbFunc) to be invoked. * Separate callbacks will be invoked for each request. * Callbacks within a session are guaranteed to be in the same order * in which they were submitted. * * The following restrictions apply to each element of the pOpData * array: * * - The memory MUST be aligned on an 8-byte boundary. * - The structure MUST reside in physically contiguous memory. * - The reserved fields of the structure SHOULD NOT be * written or read by the calling code. * * @context * This function will not sleep, and hence can be executed in a context * that does not permit sleeping. * * @assumptions * Client MUST allocate the request parameters to 8 byte alignment. * Reserved elements of the CpaCySymDpOpData structure MUST be 0. * The CpaCySymDpOpData structure MUST reside in physically * contiguous memory. * * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] numberRequests The number of requests in the array of * CpaCySymDpOpData structures. * @param[in] pOpData An array of pointers to CpaCySymDpOpData * structures. Each of the CpaCySymDpOpData * structure contains the request parameters for * that request. The client code allocates the * memory for this structure. This component takes * ownership of the memory until it is returned in * the callback, which was registered on the * instance via @ref cpaCySymDpRegCbFunc. * See the above Description for restrictions * that apply to this parameter. * @param[in] performOpNow Flag to specify whether the operation should be * performed immediately (CPA_TRUE), or simply * enqueued to be performed later (CPA_FALSE). * In the latter case, the request is submitted * to be performed either by calling this function * again with this flag set to CPA_TRUE, or by * invoking the function @ref * cpaCySymDpPerformOpNow. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The session identified by pOpData[i]->sessionCtx was setup using * @ref cpaCySymDpInitSession. * The instance identified by pOpData->instanceHandle[i] has had a * callback function registered via @ref cpaCySymDpRegCbFunc. * * @post * None * * @note * Multiple callbacks of type @ref CpaCySymDpCbFunc are generated in * response to this function call (one per request). Any errors * generated during processing are reported as part of the callback * status code. * * @see * cpaCySymDpInitSession, * cpaCySymDpEnqueueOp *****************************************************************************/ CpaStatus cpaCySymDpEnqueueOpBatch(const Cpa32U numberRequests, CpaCySymDpOpData *pOpData[], const CpaBoolean performOpNow); /** ***************************************************************************** * @ingroup cpaCySymDp * Submit any previously enqueued requests to be performed now on the * symmetric cryptographic data plane API. * * @description * If any requests/operations were enqueued via calls to @ref * cpaCySymDpEnqueueOp and/or @ref cpaCySymDpEnqueueOpBatch, but with * the flag performOpNow set to @ref CPA_FALSE, then these operations * will now be submitted to the accelerator to be performed. * * See note about performance trade-offs on the @ref cpaCySymDp API. * * @context * Will not sleep. It can be executed in a context that does not * permit sleeping. * * @sideEffects * None * @blocking * No * @reentrant * No * @threadSafe * No * * @param[in] instanceHandle Instance to which the requests will be * submitted. * * @retval CPA_STATUS_SUCCESS Function executed successfully. * @retval CPA_STATUS_FAIL Function failed. * @retval CPA_STATUS_RETRY Resubmit the request. * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in. * @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit * the request. * @retval CPA_STATUS_UNSUPPORTED Function is not supported. * * @pre * The component has been initialized. * A cryptographic session has been previously setup using the * @ref cpaCySymDpInitSession function call. * * @post * None * * @see * cpaCySymDpEnqueueOp, cpaCySymDpEnqueueOpBatch *****************************************************************************/ CpaStatus cpaCySymDpPerformOpNow(CpaInstanceHandle instanceHandle); #ifdef __cplusplus } /* close the extern "C" { */ #endif #endif /* CPA_CY_SYM_DP_H */ diff --git a/sys/dev/qat/qat_api/qat_direct/include/icp_accel_devices.h b/sys/dev/qat/qat_api/qat_direct/include/icp_accel_devices.h index 82df3bb00d19..bfc273c7328f 100644 --- a/sys/dev/qat/qat_api/qat_direct/include/icp_accel_devices.h +++ b/sys/dev/qat/qat_api/qat_direct/include/icp_accel_devices.h @@ -1,158 +1,161 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ /***************************************************************************** * @file icp_accel_devices.h * * @defgroup Acceleration Driver Framework * * @ingroup icp_Adf * * @description * This is the top level header file that contains the layout of the ADF * icp_accel_dev_t structure and related macros/definitions. * It can be used to dereference the icp_accel_dev_t *passed into upper * layers. * *****************************************************************************/ #ifndef ICP_ACCEL_DEVICES_H_ #define ICP_ACCEL_DEVICES_H_ #include "cpa.h" #include "qat_utils.h" #include "adf_accel_devices.h" #define ADF_CFG_NO_INSTANCE 0xFFFFFFFF #define ICP_DC_TX_RING_0 6 #define ICP_DC_TX_RING_1 7 #define ICP_RX_RINGS_OFFSET 8 #define ICP_RINGS_PER_BANK 16 /* Number of worker threads per AE */ #define ICP_ARB_WRK_THREAD_TO_SARB 12 #define MAX_ACCEL_NAME_LEN 16 #define ADF_DEVICE_NAME_LENGTH 32 #define ADF_DEVICE_TYPE_LENGTH 8 #define ADF_CTL_DEVICE_NAME "/dev/qat_adf_ctl" /** ***************************************************************************** * @ingroup icp_AdfAccelHandle * * @description * Accelerator capabilities * *****************************************************************************/ typedef enum { ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 0x01, ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 0x02, ICP_ACCEL_CAPABILITIES_CIPHER = 0x04, ICP_ACCEL_CAPABILITIES_AUTHENTICATION = 0x08, ICP_ACCEL_CAPABILITIES_RESERVED_1 = 0x10, ICP_ACCEL_CAPABILITIES_COMPRESSION = 0x20, ICP_ACCEL_CAPABILITIES_DEPRECATED = 0x40, ICP_ACCEL_CAPABILITIES_RANDOM_NUMBER = 0x80, ICP_ACCEL_CAPABILITIES_CRYPTO_ZUC = 0x100, ICP_ACCEL_CAPABILITIES_SHA3 = 0x200, ICP_ACCEL_CAPABILITIES_KPT = 0x400, ICP_ACCEL_CAPABILITIES_RL = 0x800, ICP_ACCEL_CAPABILITIES_HKDF = 0x1000, ICP_ACCEL_CAPABILITIES_ECEDMONT = 0x2000, ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN = 0x4000, ICP_ACCEL_CAPABILITIES_SHA3_EXT = 0x8000, ICP_ACCEL_CAPABILITIES_AESGCM_SPC = 0x10000, ICP_ACCEL_CAPABILITIES_CHACHA_POLY = 0x20000, ICP_ACCEL_CAPABILITIES_SM2 = 0x40000, ICP_ACCEL_CAPABILITIES_SM3 = 0x80000, ICP_ACCEL_CAPABILITIES_SM4 = 0x100000, ICP_ACCEL_CAPABILITIES_INLINE = 0x200000, ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY = 0x400000, ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64 = 0x800000, ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION = 0x1000000, ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION = 0x2000000, ICP_ACCEL_CAPABILITIES_AES_V2 = 0x4000000, ICP_ACCEL_CAPABILITIES_KPT2 = 0x8000000, } icp_accel_capabilities_t; /** ***************************************************************************** * @ingroup icp_AdfAccelHandle * * @description * Device Configuration Data Structure * *****************************************************************************/ typedef enum device_type_e { DEVICE_UNKNOWN = 0, DEVICE_DH895XCC, DEVICE_DH895XCCVF, DEVICE_C62X, DEVICE_C62XVF, DEVICE_C3XXX, DEVICE_C3XXXVF, DEVICE_200XX, DEVICE_200XXVF, DEVICE_C4XXX, DEVICE_C4XXXVF, - DEVICE_GEN4 + DEVICE_D15XX, + DEVICE_D15XXVF, + DEVICE_4XXX, + DEVICE_4XXXVF } device_type_t; /* * Enumeration on Service Type */ typedef enum adf_service_type_s { ADF_SERVICE_CRYPTO, ADF_SERVICE_COMPRESS, ADF_SERVICE_MAX /* this is always the last one */ } adf_service_type_t; typedef struct accel_dev_s { /* Some generic information */ Cpa32U accelId; Cpa8U *pAccelName; /* Name given to accelerator */ Cpa32U aeMask; /* Acceleration Engine mask */ device_type_t deviceType; /* Device Type */ /* Device name for SAL */ char deviceName[ADF_DEVICE_NAME_LENGTH + 1]; Cpa32U accelCapabilitiesMask; /* Accelerator's capabilities mask */ Cpa32U dcExtendedFeatures; /* bit field of features */ QatUtilsAtomic usageCounter; /* Usage counter. Prevents shutting down the dev if not 0*/ Cpa32U deviceMemAvail; /* Device memory for intermediate buffers */ /* Component specific fields - cast to relevent layer */ void *pRingInflight; /* For offload optimization */ void *pSalHandle; /* For SAL*/ void *pQatStats; /* For QATAL/SAL stats */ void *ringInfoCallBack; /* Callback for user space ring enabling */ void *pShramConstants; /* Virtual address of Shram constants page */ Cpa64U pShramConstantsDma; /* Bus address of Shram constants page */ /* Status of ADF and registered subsystems */ Cpa32U adfSubsystemStatus; /* Physical processor to which the dev is connected */ Cpa8U pkg_id; enum dev_sku_info sku; Cpa32U pciDevId; Cpa8U devFileName[ADF_DEVICE_NAME_LENGTH]; Cpa32S csrFileHdl; Cpa32S ringFileHdl; void *accel; Cpa32U maxNumBanks; Cpa32U maxNumRingsPerBank; /* pointer to dynamic instance resource manager */ void *pInstMgr; void *banks; /* banks information */ struct adf_accel_dev *accel_dev; struct accel_dev_s *pPrev; struct accel_dev_s *pNext; } icp_accel_dev_t; #endif /* ICP_ACCEL_HANDLE_H */ diff --git a/sys/dev/qat/qat_common/adf_aer.c b/sys/dev/qat/qat_common/adf_aer.c index 9ac7c8edd72b..a2307e690790 100644 --- a/sys/dev/qat/qat_common/adf_aer.c +++ b/sys/dev/qat/qat_common/adf_aer.c @@ -1,342 +1,340 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_accel_devices.h" #include "icp_qat_uclo.h" #include "icp_qat_fw.h" #include "icp_qat_fw_init_admin.h" #include "adf_cfg_strings.h" #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" #include #include #include #include #define ADF_PPAERUCM_MASK (BIT(14) | BIT(20) | BIT(22)) static struct workqueue_struct *fatal_error_wq; struct adf_fatal_error_data { struct adf_accel_dev *accel_dev; struct work_struct work; }; static struct workqueue_struct *device_reset_wq; void linux_complete_common(struct completion *c, int all) { int wakeup_swapper; sleepq_lock(c); c->done++; if (all) wakeup_swapper = sleepq_broadcast(c, SLEEPQ_SLEEP, 0, 0); else wakeup_swapper = sleepq_signal(c, SLEEPQ_SLEEP, 0, 0); sleepq_release(c); if (wakeup_swapper) kick_proc0(); } /* reset dev data */ struct adf_reset_dev_data { int mode; struct adf_accel_dev *accel_dev; struct completion compl; struct work_struct reset_work; }; int adf_aer_store_ppaerucm_reg(device_t dev, struct adf_hw_device_data *hw_data) { unsigned int aer_offset, reg_val = 0; if (!hw_data) return -EINVAL; if (pci_find_extcap(dev, PCIZ_AER, &aer_offset) == 0) { reg_val = pci_read_config(dev, aer_offset + PCIR_AER_UC_MASK, 4); hw_data->aerucm_mask = reg_val; } else { device_printf(dev, "Unable to find AER capability of the device\n"); return -ENODEV; } return 0; } void adf_reset_sbr(struct adf_accel_dev *accel_dev) { device_t pdev = accel_to_pci_dev(accel_dev); device_t parent = device_get_parent(device_get_parent(pdev)); uint16_t bridge_ctl = 0; if (accel_dev->is_vf) return; if (!parent) parent = pdev; if (!pcie_wait_for_pending_transactions(pdev, 0)) device_printf(GET_DEV(accel_dev), "Transaction still in progress. Proceeding\n"); device_printf(GET_DEV(accel_dev), "Secondary bus reset\n"); pci_save_state(pdev); bridge_ctl = pci_read_config(parent, PCIR_BRIDGECTL_1, 2); bridge_ctl |= PCIB_BCR_SECBUS_RESET; pci_write_config(parent, PCIR_BRIDGECTL_1, bridge_ctl, 2); pause_ms("adfrst", 100); bridge_ctl &= ~PCIB_BCR_SECBUS_RESET; pci_write_config(parent, PCIR_BRIDGECTL_1, bridge_ctl, 2); pause_ms("adfrst", 100); pci_restore_state(pdev); } void adf_reset_flr(struct adf_accel_dev *accel_dev) { device_t pdev = accel_to_pci_dev(accel_dev); pci_save_state(pdev); if (pcie_flr(pdev, max(pcie_get_max_completion_timeout(pdev) / 1000, 10), true)) { pci_restore_state(pdev); return; } pci_restore_state(pdev); device_printf(GET_DEV(accel_dev), "FLR qat_dev%d failed trying secondary bus reset\n", accel_dev->accel_id); adf_reset_sbr(accel_dev); } void adf_dev_pre_reset(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; device_t pdev = accel_to_pci_dev(accel_dev); u32 aer_offset, reg_val = 0; if (pci_find_extcap(pdev, PCIZ_AER, &aer_offset) == 0) { reg_val = pci_read_config(pdev, aer_offset + PCIR_AER_UC_MASK, 4); reg_val |= ADF_PPAERUCM_MASK; pci_write_config(pdev, aer_offset + PCIR_AER_UC_MASK, reg_val, 4); } else { device_printf(pdev, "Unable to find AER capability of the device\n"); } if (hw_device->disable_arb) { device_printf(GET_DEV(accel_dev), "Disable arbiter.\n"); hw_device->disable_arb(accel_dev); } } void adf_dev_post_reset(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; device_t pdev = accel_to_pci_dev(accel_dev); u32 aer_offset; if (pci_find_extcap(pdev, PCIZ_AER, &aer_offset) == 0) { pci_write_config(pdev, aer_offset + PCIR_AER_UC_MASK, hw_device->aerucm_mask, 4); } else { device_printf(pdev, "Unable to find AER capability of the device\n"); } } void adf_dev_restore(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; device_t pdev = accel_to_pci_dev(accel_dev); if (hw_device->pre_reset) { dev_dbg(GET_DEV(accel_dev), "Performing pre reset save\n"); hw_device->pre_reset(accel_dev); } if (hw_device->reset_device) { device_printf(GET_DEV(accel_dev), "Resetting device qat_dev%d\n", accel_dev->accel_id); hw_device->reset_device(accel_dev); pci_restore_state(pdev); pci_save_state(pdev); } if (hw_device->post_reset) { dev_dbg(GET_DEV(accel_dev), "Performing post reset restore\n"); hw_device->post_reset(accel_dev); } } static void adf_device_reset_worker(struct work_struct *work) { struct adf_reset_dev_data *reset_data = container_of(work, struct adf_reset_dev_data, reset_work); struct adf_accel_dev *accel_dev = reset_data->accel_dev; if (adf_dev_restarting_notify(accel_dev)) { device_printf(GET_DEV(accel_dev), "Unable to send RESTARTING notification.\n"); return; } if (adf_dev_stop(accel_dev)) { device_printf(GET_DEV(accel_dev), "Stopping device failed.\n"); return; } adf_dev_shutdown(accel_dev); if (adf_dev_init(accel_dev) || adf_dev_start(accel_dev)) { /* The device hanged and we can't restart it */ /* so stop here */ device_printf(GET_DEV(accel_dev), "Restart device failed\n"); if (reset_data->mode == ADF_DEV_RESET_ASYNC) kfree(reset_data); WARN(1, "QAT: device restart failed. Device is unusable\n"); return; } adf_dev_restarted_notify(accel_dev); clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); /* The dev is back alive. Notify the caller if in sync mode */ if (reset_data->mode == ADF_DEV_RESET_SYNC) complete(&reset_data->compl); else kfree(reset_data); } int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev, enum adf_dev_reset_mode mode) { struct adf_reset_dev_data *reset_data; if (!adf_dev_started(accel_dev) || test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) return 0; set_bit(ADF_STATUS_RESTARTING, &accel_dev->status); reset_data = kzalloc(sizeof(*reset_data), GFP_ATOMIC); if (!reset_data) return -ENOMEM; reset_data->accel_dev = accel_dev; init_completion(&reset_data->compl); reset_data->mode = mode; INIT_WORK(&reset_data->reset_work, adf_device_reset_worker); queue_work(device_reset_wq, &reset_data->reset_work); /* If in sync mode wait for the result */ if (mode == ADF_DEV_RESET_SYNC) { int ret = 0; /* Maximum device reset time is 10 seconds */ unsigned long wait_jiffies = msecs_to_jiffies(10000); unsigned long timeout = wait_for_completion_timeout(&reset_data->compl, wait_jiffies); if (!timeout) { device_printf(GET_DEV(accel_dev), "Reset device timeout expired\n"); ret = -EFAULT; } kfree(reset_data); return ret; } return 0; } int adf_dev_autoreset(struct adf_accel_dev *accel_dev) { if (accel_dev->autoreset_on_error) return adf_dev_reset(accel_dev, ADF_DEV_RESET_ASYNC); return 0; } static void adf_notify_fatal_error_work(struct work_struct *work) { struct adf_fatal_error_data *wq_data = container_of(work, struct adf_fatal_error_data, work); struct adf_accel_dev *accel_dev = wq_data->accel_dev; adf_error_notifier((uintptr_t)accel_dev); if (!accel_dev->is_vf) { - if (accel_dev->u1.pf.vf_info) - adf_pf2vf_notify_fatal_error(accel_dev); adf_dev_autoreset(accel_dev); } kfree(wq_data); } int adf_notify_fatal_error(struct adf_accel_dev *accel_dev) { struct adf_fatal_error_data *wq_data; wq_data = kzalloc(sizeof(*wq_data), GFP_ATOMIC); if (!wq_data) { device_printf(GET_DEV(accel_dev), "Failed to allocate memory\n"); return ENOMEM; } wq_data->accel_dev = accel_dev; INIT_WORK(&wq_data->work, adf_notify_fatal_error_work); queue_work(fatal_error_wq, &wq_data->work); return 0; } int __init adf_init_fatal_error_wq(void) { fatal_error_wq = create_workqueue("qat_fatal_error_wq"); return !fatal_error_wq ? EFAULT : 0; } void adf_exit_fatal_error_wq(void) { if (fatal_error_wq) destroy_workqueue(fatal_error_wq); fatal_error_wq = NULL; } int adf_init_aer(void) { device_reset_wq = create_workqueue("qat_device_reset_wq"); return !device_reset_wq ? -EFAULT : 0; } void adf_exit_aer(void) { if (device_reset_wq) destroy_workqueue(device_reset_wq); device_reset_wq = NULL; } diff --git a/sys/dev/qat/qat_common/adf_cfg.c b/sys/dev/qat/qat_common/adf_cfg.c index 1f6cf6c1732d..397414a02ddd 100644 --- a/sys/dev/qat/qat_common/adf_cfg.c +++ b/sys/dev/qat/qat_common/adf_cfg.c @@ -1,574 +1,623 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "adf_accel_devices.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_cfg_dev_dbg.h" +#include "adf_cfg_device.h" +#include "adf_cfg_sysctl.h" #include "adf_heartbeat_dbg.h" #include "adf_ver_dbg.h" #include "adf_fw_counters.h" #include "adf_cnvnr_freq_counters.h" /** * adf_cfg_dev_add() - Create an acceleration device configuration table. * @accel_dev: Pointer to acceleration device. * * Function creates a configuration table for the given acceleration device. * The table stores device specific config values. * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_cfg_dev_add(struct adf_accel_dev *accel_dev) { struct adf_cfg_device_data *dev_cfg_data; dev_cfg_data = malloc(sizeof(*dev_cfg_data), M_QAT, M_WAITOK | M_ZERO); INIT_LIST_HEAD(&dev_cfg_data->sec_list); sx_init(&dev_cfg_data->lock, "qat cfg data"); accel_dev->cfg = dev_cfg_data; + /* Default device configuration initialization */ + if (!accel_dev->is_vf) { + + if (IS_QAT_GEN4(pci_get_device(GET_DEV(accel_dev)))) { + dev_cfg_data->num_user_processes = + ADF_CFG_STATIC_CONF_USER_PROCESSES_NUM; + + strncpy(dev_cfg_data->cfg_mode, + ADF_CFG_KERNEL_USER, + ADF_CFG_MAX_VAL); + + if (accel_dev->accel_id % 2 == 0) { + strncpy(dev_cfg_data->cfg_services, + ADF_CFG_SYM_ASYM, + ADF_CFG_MAX_VAL); + } else { + strncpy(dev_cfg_data->cfg_services, + ADF_CFG_DC, + ADF_CFG_MAX_VAL); + } + } else { + strncpy(dev_cfg_data->cfg_mode, + ADF_CFG_KERNEL, + ADF_CFG_MAX_VAL); + dev_cfg_data->num_user_processes = 0; + strncpy(dev_cfg_data->cfg_services, + ADF_CFG_SYM_DC, + ADF_CFG_MAX_VAL); + } + } else { + dev_cfg_data->num_user_processes = + ADF_CFG_STATIC_CONF_USER_PROCESSES_NUM; + + strncpy(dev_cfg_data->cfg_mode, + ADF_CFG_KERNEL, + ADF_CFG_MAX_VAL); + + strncpy(dev_cfg_data->cfg_services, + "sym;asym", + ADF_CFG_MAX_VAL); + } + + if (adf_cfg_sysctl_add(accel_dev)) + goto err; + if (adf_cfg_dev_dbg_add(accel_dev)) goto err; + if (!accel_dev->is_vf) { if (adf_heartbeat_dbg_add(accel_dev)) goto err; if (adf_ver_dbg_add(accel_dev)) goto err; if (adf_fw_counters_add(accel_dev)) goto err; if (adf_cnvnr_freq_counters_add(accel_dev)) goto err; } return 0; err: free(dev_cfg_data, M_QAT); accel_dev->cfg = NULL; return EFAULT; } static void adf_cfg_section_del_all(struct list_head *head); void adf_cfg_del_all(struct adf_accel_dev *accel_dev) { struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; sx_xlock(&dev_cfg_data->lock); adf_cfg_section_del_all(&dev_cfg_data->sec_list); sx_xunlock(&dev_cfg_data->lock); clear_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); } void adf_cfg_depot_del_all(struct list_head *head) { adf_cfg_section_del_all(head); } /** * adf_cfg_dev_remove() - Clears acceleration device configuration table. * @accel_dev: Pointer to acceleration device. * * Function removes configuration table from the given acceleration device * and frees all allocated memory. * To be used by QAT device specific drivers. * * Return: void */ void adf_cfg_dev_remove(struct adf_accel_dev *accel_dev) { struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; if (!dev_cfg_data) return; sx_xlock(&dev_cfg_data->lock); adf_cfg_section_del_all(&dev_cfg_data->sec_list); sx_xunlock(&dev_cfg_data->lock); + adf_cfg_sysctl_remove(accel_dev); adf_cfg_dev_dbg_remove(accel_dev); if (!accel_dev->is_vf) { adf_ver_dbg_del(accel_dev); adf_heartbeat_dbg_del(accel_dev); adf_fw_counters_remove(accel_dev); adf_cnvnr_freq_counters_remove(accel_dev); } free(dev_cfg_data, M_QAT); accel_dev->cfg = NULL; } static void adf_cfg_keyval_add(struct adf_cfg_key_val *new, struct adf_cfg_section *sec) { list_add_tail(&new->list, &sec->param_head); } static void adf_cfg_keyval_remove(const char *key, struct adf_cfg_section *sec) { struct list_head *list_ptr, *tmp; struct list_head *head = &sec->param_head; list_for_each_prev_safe(list_ptr, tmp, head) { struct adf_cfg_key_val *ptr = list_entry(list_ptr, struct adf_cfg_key_val, list); if (strncmp(ptr->key, key, sizeof(ptr->key)) != 0) continue; list_del(list_ptr); free(ptr, M_QAT); break; } } static int adf_cfg_section_restore_all(struct adf_accel_dev *accel_dev, struct adf_cfg_depot_list *cfg_depot_list) { struct adf_cfg_section *ptr_sec, *iter_sec; struct adf_cfg_key_val *ptr_key; struct list_head *list, *tmp; struct list_head *restore_list = &accel_dev->cfg->sec_list; struct list_head *head = &cfg_depot_list[accel_dev->accel_id].sec_list; INIT_LIST_HEAD(restore_list); list_for_each_prev_safe(list, tmp, head) { ptr_sec = list_entry(list, struct adf_cfg_section, list); iter_sec = malloc(sizeof(*iter_sec), M_QAT, M_WAITOK | M_ZERO); strlcpy(iter_sec->name, ptr_sec->name, sizeof(iter_sec->name)); INIT_LIST_HEAD(&iter_sec->param_head); /* now we restore all the parameters */ list_for_each_entry(ptr_key, &ptr_sec->param_head, list) { struct adf_cfg_key_val *key_val; key_val = malloc(sizeof(*key_val), M_QAT, M_WAITOK | M_ZERO); memcpy(key_val, ptr_key, sizeof(*key_val)); list_add_tail(&key_val->list, &iter_sec->param_head); } list_add_tail(&iter_sec->list, restore_list); } adf_cfg_section_del_all(head); return 0; } int adf_cfg_depot_restore_all(struct adf_accel_dev *accel_dev, struct adf_cfg_depot_list *cfg_depot_list) { struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; int ret = 0; sx_xlock(&dev_cfg_data->lock); ret = adf_cfg_section_restore_all(accel_dev, cfg_depot_list); sx_xunlock(&dev_cfg_data->lock); return ret; } /** * adf_cfg_section_del() - Delete config section entry to config table. * @accel_dev: Pointer to acceleration device. * @name: Name of the section * * Function deletes configuration section where key - value entries * will be stored. * To be used by QAT device specific drivers. */ static void adf_cfg_section_del(struct adf_accel_dev *accel_dev, const char *name) { struct adf_cfg_section *sec = adf_cfg_sec_find(accel_dev, name); if (!sec) return; adf_cfg_keyval_del_all(&sec->param_head); list_del(&sec->list); free(sec, M_QAT); } void adf_cfg_keyval_del_all(struct list_head *head) { struct list_head *list_ptr, *tmp; list_for_each_prev_safe(list_ptr, tmp, head) { struct adf_cfg_key_val *ptr = list_entry(list_ptr, struct adf_cfg_key_val, list); list_del(list_ptr); free(ptr, M_QAT); } } static void adf_cfg_section_del_all(struct list_head *head) { struct adf_cfg_section *ptr; struct list_head *list, *tmp; list_for_each_prev_safe(list, tmp, head) { ptr = list_entry(list, struct adf_cfg_section, list); adf_cfg_keyval_del_all(&ptr->param_head); list_del(list); free(ptr, M_QAT); } } static struct adf_cfg_key_val * adf_cfg_key_value_find(struct adf_cfg_section *s, const char *key) { struct list_head *list; list_for_each(list, &s->param_head) { struct adf_cfg_key_val *ptr = list_entry(list, struct adf_cfg_key_val, list); if (!strncmp(ptr->key, key, sizeof(ptr->key))) return ptr; } return NULL; } struct adf_cfg_section * adf_cfg_sec_find(struct adf_accel_dev *accel_dev, const char *sec_name) { struct adf_cfg_device_data *cfg = accel_dev->cfg; struct list_head *list; list_for_each(list, &cfg->sec_list) { struct adf_cfg_section *ptr = list_entry(list, struct adf_cfg_section, list); if (!strncmp(ptr->name, sec_name, sizeof(ptr->name))) return ptr; } return NULL; } static int adf_cfg_key_val_get(struct adf_accel_dev *accel_dev, const char *sec_name, const char *key_name, char *val) { struct adf_cfg_section *sec = adf_cfg_sec_find(accel_dev, sec_name); struct adf_cfg_key_val *keyval = NULL; if (sec) keyval = adf_cfg_key_value_find(sec, key_name); if (keyval) { memcpy(val, keyval->val, ADF_CFG_MAX_VAL_LEN_IN_BYTES); return 0; } return -1; } /** * adf_cfg_add_key_value_param() - Add key-value config entry to config table. * @accel_dev: Pointer to acceleration device. * @section_name: Name of the section where the param will be added * @key: The key string * @val: Value pain for the given @key * @type: Type - string, int or address * * Function adds configuration key - value entry in the appropriate section * in the given acceleration device * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_cfg_add_key_value_param(struct adf_accel_dev *accel_dev, const char *section_name, const char *key, const void *val, enum adf_cfg_val_type type) { char temp_val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; struct adf_cfg_device_data *cfg = accel_dev->cfg; struct adf_cfg_key_val *key_val; struct adf_cfg_section *section = adf_cfg_sec_find(accel_dev, section_name); if (!section) return EFAULT; key_val = malloc(sizeof(*key_val), M_QAT, M_WAITOK | M_ZERO); INIT_LIST_HEAD(&key_val->list); strlcpy(key_val->key, key, sizeof(key_val->key)); if (type == ADF_DEC) { snprintf(key_val->val, ADF_CFG_MAX_VAL_LEN_IN_BYTES, "%ld", (*((const long *)val))); } else if (type == ADF_STR) { strlcpy(key_val->val, (const char *)val, sizeof(key_val->val)); } else if (type == ADF_HEX) { snprintf(key_val->val, ADF_CFG_MAX_VAL_LEN_IN_BYTES, "0x%lx", (unsigned long)val); } else { device_printf(GET_DEV(accel_dev), "Unknown type given.\n"); free(key_val, M_QAT); return -1; } key_val->type = type; /* Add the key-value pair as below policy: * 1. If the key doesn't exist, add it, * 2. If the key already exists with a different value * then delete it, * 3. If the key exists with the same value, then return * without doing anything. */ if (adf_cfg_key_val_get(accel_dev, section_name, key, temp_val) == 0) { if (strncmp(temp_val, key_val->val, sizeof(temp_val)) != 0) { adf_cfg_keyval_remove(key, section); } else { free(key_val, M_QAT); return 0; } } sx_xlock(&cfg->lock); adf_cfg_keyval_add(key_val, section); sx_xunlock(&cfg->lock); return 0; } int adf_cfg_save_section(struct adf_accel_dev *accel_dev, const char *name, struct adf_cfg_section *section) { struct adf_cfg_key_val *ptr; struct adf_cfg_section *sec = adf_cfg_sec_find(accel_dev, name); if (!sec) { device_printf(GET_DEV(accel_dev), "Couldn't find section %s\n", name); return EFAULT; } strlcpy(section->name, name, sizeof(section->name)); INIT_LIST_HEAD(§ion->param_head); /* now we save all the parameters */ list_for_each_entry(ptr, &sec->param_head, list) { struct adf_cfg_key_val *key_val; key_val = malloc(sizeof(*key_val), M_QAT, M_WAITOK | M_ZERO); memcpy(key_val, ptr, sizeof(*key_val)); list_add_tail(&key_val->list, §ion->param_head); } return 0; } static int adf_cfg_section_save_all(struct adf_accel_dev *accel_dev, struct adf_cfg_depot_list *cfg_depot_list) { struct adf_cfg_section *ptr_sec, *iter_sec; struct list_head *list, *tmp, *save_list; struct list_head *head = &accel_dev->cfg->sec_list; save_list = &cfg_depot_list[accel_dev->accel_id].sec_list; list_for_each_prev_safe(list, tmp, head) { ptr_sec = list_entry(list, struct adf_cfg_section, list); iter_sec = malloc(sizeof(*iter_sec), M_QAT, M_WAITOK | M_ZERO); adf_cfg_save_section(accel_dev, ptr_sec->name, iter_sec); list_add_tail(&iter_sec->list, save_list); } return 0; } int adf_cfg_depot_save_all(struct adf_accel_dev *accel_dev, struct adf_cfg_depot_list *cfg_depot_list) { struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; int ret = 0; sx_xlock(&dev_cfg_data->lock); ret = adf_cfg_section_save_all(accel_dev, cfg_depot_list); sx_xunlock(&dev_cfg_data->lock); return ret; } /** * adf_cfg_remove_key_param() - remove config entry in config table. * @accel_dev: Pointer to acceleration device. * @section_name: Name of the section where the param will be added * @key: The key string * * Function remove configuration key * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_cfg_remove_key_param(struct adf_accel_dev *accel_dev, const char *section_name, const char *key) { struct adf_cfg_device_data *cfg = accel_dev->cfg; struct adf_cfg_section *section = adf_cfg_sec_find(accel_dev, section_name); if (!section) return EFAULT; sx_xlock(&cfg->lock); adf_cfg_keyval_remove(key, section); sx_xunlock(&cfg->lock); return 0; } /** * adf_cfg_section_add() - Add config section entry to config table. * @accel_dev: Pointer to acceleration device. * @name: Name of the section * * Function adds configuration section where key - value entries * will be stored. * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_cfg_section_add(struct adf_accel_dev *accel_dev, const char *name) { struct adf_cfg_device_data *cfg = accel_dev->cfg; struct adf_cfg_section *sec = adf_cfg_sec_find(accel_dev, name); if (sec) return 0; sec = malloc(sizeof(*sec), M_QAT, M_WAITOK | M_ZERO); strlcpy(sec->name, name, sizeof(sec->name)); INIT_LIST_HEAD(&sec->param_head); sx_xlock(&cfg->lock); list_add_tail(&sec->list, &cfg->sec_list); sx_xunlock(&cfg->lock); return 0; } /* need to differentiate derived section with the original section */ int adf_cfg_derived_section_add(struct adf_accel_dev *accel_dev, const char *name) { struct adf_cfg_device_data *cfg = accel_dev->cfg; struct adf_cfg_section *sec = NULL; if (adf_cfg_section_add(accel_dev, name)) return EFAULT; sec = adf_cfg_sec_find(accel_dev, name); if (!sec) return EFAULT; sx_xlock(&cfg->lock); sec->is_derived = true; sx_xunlock(&cfg->lock); return 0; } static int adf_cfg_restore_key_value_param(struct adf_accel_dev *accel_dev, const char *section_name, const char *key, const char *val, enum adf_cfg_val_type type) { struct adf_cfg_device_data *cfg = accel_dev->cfg; struct adf_cfg_key_val *key_val; struct adf_cfg_section *section = adf_cfg_sec_find(accel_dev, section_name); if (!section) return EFAULT; key_val = malloc(sizeof(*key_val), M_QAT, M_WAITOK | M_ZERO); INIT_LIST_HEAD(&key_val->list); strlcpy(key_val->key, key, sizeof(key_val->key)); strlcpy(key_val->val, val, sizeof(key_val->val)); key_val->type = type; sx_xlock(&cfg->lock); adf_cfg_keyval_add(key_val, section); sx_xunlock(&cfg->lock); return 0; } int adf_cfg_restore_section(struct adf_accel_dev *accel_dev, struct adf_cfg_section *section) { struct adf_cfg_key_val *ptr; int ret = 0; ret = adf_cfg_section_add(accel_dev, section->name); if (ret) goto err; list_for_each_entry(ptr, §ion->param_head, list) { ret = adf_cfg_restore_key_value_param( accel_dev, section->name, ptr->key, ptr->val, ptr->type); if (ret) goto err_remove_sec; } return 0; err_remove_sec: adf_cfg_section_del(accel_dev, section->name); err: device_printf(GET_DEV(accel_dev), "Failed to restore section %s\n", section->name); return ret; } int adf_cfg_get_param_value(struct adf_accel_dev *accel_dev, const char *section, const char *name, char *value) { struct adf_cfg_device_data *cfg = accel_dev->cfg; int ret; sx_slock(&cfg->lock); ret = adf_cfg_key_val_get(accel_dev, section, name, value); sx_sunlock(&cfg->lock); return ret; } diff --git a/sys/dev/qat/qat_common/adf_cfg_device.c b/sys/dev/qat/qat_common/adf_cfg_device.c index 9e59c038f2f3..a5fce6905473 100644 --- a/sys/dev/qat/qat_common/adf_cfg_device.c +++ b/sys/dev/qat/qat_common/adf_cfg_device.c @@ -1,1097 +1,1285 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "adf_cfg_instance.h" #include "adf_cfg_section.h" #include "adf_cfg_device.h" #include "icp_qat_hw.h" #include "adf_common_drv.h" -#define ADF_CFG_SVCS_MAX (25) +#define ADF_CFG_SVCS_MAX (12) #define ADF_CFG_DEPRE_PARAMS_NUM (4) #define ADF_CFG_CAP_DC ADF_ACCEL_CAPABILITIES_COMPRESSION #define ADF_CFG_CAP_ASYM ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC #define ADF_CFG_CAP_SYM \ (ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | \ ADF_ACCEL_CAPABILITIES_CIPHER | \ ADF_ACCEL_CAPABILITIES_AUTHENTICATION) #define ADF_CFG_CAP_CY (ADF_CFG_CAP_ASYM | ADF_CFG_CAP_SYM) #define ADF_CFG_FW_CAP_RL ICP_ACCEL_CAPABILITIES_RL #define ADF_CFG_FW_CAP_HKDF ICP_ACCEL_CAPABILITIES_HKDF #define ADF_CFG_FW_CAP_ECEDMONT ICP_ACCEL_CAPABILITIES_ECEDMONT #define ADF_CFG_FW_CAP_EXT_ALGCHAIN ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN #define ADF_CFG_CY_RINGS \ (CRYPTO | CRYPTO << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ CRYPTO << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ CRYPTO << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_CFG_SYM_RINGS \ (SYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ SYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ SYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_CFG_ASYM_RINGS \ (ASYM | ASYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ ASYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ ASYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_CFG_CY_DC_RINGS \ (CRYPTO | CRYPTO << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ NA << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_CFG_ASYM_DC_RINGS \ (ASYM | ASYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_CFG_SYM_DC_RINGS \ (SYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_CFG_DC_RINGS \ (COMP | COMP << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) static char adf_cfg_deprecated_params[][ADF_CFG_MAX_KEY_LEN_IN_BYTES] = { ADF_DEV_KPT_ENABLE, ADF_STORAGE_FIRMWARE_ENABLED, ADF_RL_FIRMWARE_ENABLED, ADF_PKE_DISABLED }; struct adf_cfg_enabled_services { const char svcs_enabled[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u16 rng_to_svc_msk; u32 enabled_svc_cap; u32 enabled_fw_cap; }; struct adf_cfg_profile { enum adf_cfg_fw_image_type fw_image_type; struct adf_cfg_enabled_services supported_svcs[ADF_CFG_SVCS_MAX]; }; static struct adf_cfg_profile adf_profiles[] = { { ADF_FW_IMAGE_DEFAULT, { { "cy", ADF_CFG_CY_RINGS, ADF_CFG_CAP_CY, ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, + { "asym;sym", + ADF_CFG_CY_RINGS, + ADF_CFG_CAP_CY, + ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, + { "sym;asym", + ADF_CFG_CY_RINGS, + ADF_CFG_CAP_CY, + ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "dc", ADF_CFG_DC_RINGS, ADF_CFG_CAP_DC, 0 }, { "sym", ADF_CFG_SYM_RINGS, ADF_CFG_CAP_SYM, ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "asym", ADF_CFG_ASYM_RINGS, ADF_CFG_CAP_ASYM, ADF_CFG_FW_CAP_ECEDMONT }, { "cy;dc", ADF_CFG_CY_DC_RINGS, ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "dc;cy", ADF_CFG_CY_DC_RINGS, ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "asym;dc", ADF_CFG_ASYM_DC_RINGS, ADF_CFG_CAP_ASYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_ECEDMONT }, { "dc;asym", ADF_CFG_ASYM_DC_RINGS, ADF_CFG_CAP_ASYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_ECEDMONT }, { "sym;dc", ADF_CFG_SYM_DC_RINGS, ADF_CFG_CAP_SYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "dc;sym", ADF_CFG_SYM_DC_RINGS, ADF_CFG_CAP_SYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "inline;sym", - ADF_CFG_SYM_RINGS, - ADF_CFG_CAP_SYM, - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "sym;inline", - ADF_CFG_SYM_RINGS, - ADF_CFG_CAP_SYM, - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "inline;asym", - ADF_CFG_SYM_RINGS, - ADF_CFG_CAP_SYM, - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "asym;inline", - ADF_CFG_ASYM_RINGS, - ADF_CFG_CAP_ASYM, - ADF_CFG_FW_CAP_ECEDMONT }, - { "inline", 0, 0, 0 }, - { "inline;cy", - ADF_CFG_CY_RINGS, - ADF_CFG_CAP_CY, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "cy;inline", - ADF_CFG_CY_RINGS, - ADF_CFG_CAP_CY, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "dc;inline", ADF_CFG_DC_RINGS, ADF_CFG_CAP_DC, 0 }, - { "inline;dc", ADF_CFG_DC_RINGS, ADF_CFG_CAP_DC, 0 }, - { "cy;dc;inline", - ADF_CFG_CY_DC_RINGS, - ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "cy;inline;dc", - ADF_CFG_CY_DC_RINGS, - ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "dc;inline;cy", - ADF_CFG_CY_DC_RINGS, - ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "dc;cy;inline", - ADF_CFG_CY_DC_RINGS, - ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "inline;cy;dc", - ADF_CFG_CY_DC_RINGS, - ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, - { "inline;dc;cy", - ADF_CFG_CY_DC_RINGS, - ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, - ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, } }, { ADF_FW_IMAGE_CRYPTO, { { "cy", ADF_CFG_CY_RINGS, ADF_CFG_CAP_CY, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | - ADF_CFG_FW_CAP_ECEDMONT | - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, + ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "sym", ADF_CFG_SYM_RINGS, ADF_CFG_CAP_SYM, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "asym", ADF_CFG_ASYM_RINGS, ADF_CFG_CAP_ASYM, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_ECEDMONT }, } }, { ADF_FW_IMAGE_COMPRESSION, { { "dc", ADF_CFG_DC_RINGS, ADF_CFG_CAP_DC, 0 }, } }, { ADF_FW_IMAGE_CUSTOM1, { { "cy", ADF_CFG_CY_RINGS, ADF_CFG_CAP_CY, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | - ADF_CFG_FW_CAP_ECEDMONT | - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, + ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "dc", ADF_CFG_DC_RINGS, ADF_CFG_CAP_DC, 0 }, { "sym", ADF_CFG_SYM_RINGS, ADF_CFG_CAP_SYM, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "asym", ADF_CFG_ASYM_RINGS, ADF_CFG_CAP_ASYM, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_ECEDMONT }, { "cy;dc", ADF_CFG_CY_DC_RINGS, ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | - ADF_CFG_FW_CAP_ECEDMONT | - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, + ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "dc;cy", ADF_CFG_CY_DC_RINGS, ADF_CFG_CAP_CY | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | - ADF_CFG_FW_CAP_ECEDMONT | - ADF_CFG_FW_CAP_EXT_ALGCHAIN }, + ADF_CFG_FW_CAP_ECEDMONT | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "asym;dc", ADF_CFG_ASYM_DC_RINGS, ADF_CFG_CAP_ASYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_ECEDMONT }, { "dc;asym", ADF_CFG_ASYM_DC_RINGS, ADF_CFG_CAP_ASYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_ECEDMONT }, { "sym;dc", ADF_CFG_SYM_DC_RINGS, ADF_CFG_CAP_SYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, { "dc;sym", ADF_CFG_SYM_DC_RINGS, ADF_CFG_CAP_SYM | ADF_CFG_CAP_DC, ADF_CFG_FW_CAP_RL | ADF_CFG_FW_CAP_HKDF | ADF_CFG_FW_CAP_EXT_ALGCHAIN }, } } }; int adf_cfg_get_ring_pairs(struct adf_cfg_device *device, struct adf_cfg_instance *inst, const char *process_name, struct adf_accel_dev *accel_dev) { int i = 0; int ret = EFAULT; struct adf_cfg_instance *free_inst = NULL; enum adf_cfg_bundle_type free_bundle_type; int first_user_bundle = 0; /* Section of user process with poll mode */ if (strcmp(ADF_KERNEL_SEC, process_name) && strcmp(ADF_KERNEL_SAL_SEC, process_name) && inst->polling_mode == ADF_CFG_RESP_POLL) { first_user_bundle = device->max_kernel_bundle_nr + 1; for (i = first_user_bundle; i < device->bundle_num; i++) { free_inst = adf_cfg_get_free_instance( device, device->bundles[i], inst, process_name); if (!free_inst) continue; ret = adf_cfg_get_ring_pairs_from_bundle( device->bundles[i], inst, process_name, free_inst); return ret; } } else { /* Section of in-tree, or kernel API or user process * with epoll mode */ if (!strcmp(ADF_KERNEL_SEC, process_name) || !strcmp(ADF_KERNEL_SAL_SEC, process_name)) free_bundle_type = KERNEL; else free_bundle_type = USER; for (i = 0; i < device->bundle_num; i++) { /* Since both in-tree and kernel API's bundle type * are kernel, use cpumask_subset to check if the * ring's affinity mask is a subset of a bundle's * one. */ if (free_bundle_type == device->bundles[i]->type && CPU_SUBSET(&device->bundles[i]->affinity_mask, &inst->affinity_mask)) { free_inst = adf_cfg_get_free_instance( device, device->bundles[i], inst, process_name); if (!free_inst) continue; ret = adf_cfg_get_ring_pairs_from_bundle( device->bundles[i], inst, process_name, free_inst); return ret; } } for (i = 0; i < device->bundle_num; i++) { if (adf_cfg_is_free(device->bundles[i])) { free_inst = adf_cfg_get_free_instance( device, device->bundles[i], inst, process_name); if (!free_inst) continue; ret = adf_cfg_get_ring_pairs_from_bundle( device->bundles[i], inst, process_name, free_inst); return ret; } } } pr_err("Don't have enough rings for instance %s in process %s\n", inst->name, process_name); return ret; } int adf_cfg_get_services_enabled(struct adf_accel_dev *accel_dev, u16 *ring_to_svc_map) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u32 i = 0; struct adf_cfg_enabled_services *svcs = NULL; enum adf_cfg_fw_image_type fw_image_type = ADF_FW_IMAGE_DEFAULT; struct adf_hw_device_data *hw_data = accel_dev->hw_device; *ring_to_svc_map = 0; /* Get the services enabled by user */ snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; if (hw_data->get_fw_image_type) { if (hw_data->get_fw_image_type(accel_dev, &fw_image_type)) return EFAULT; } for (i = 0; i < ADF_CFG_SVCS_MAX; i++) { svcs = &adf_profiles[fw_image_type].supported_svcs[i]; if (!strncmp(svcs->svcs_enabled, "", ADF_CFG_MAX_VAL_LEN_IN_BYTES)) break; if (!strncmp(val, svcs->svcs_enabled, ADF_CFG_MAX_VAL_LEN_IN_BYTES)) { *ring_to_svc_map = svcs->rng_to_svc_msk; return 0; } } device_printf(GET_DEV(accel_dev), "Invalid ServicesEnabled %s for ServicesProfile: %d\n", val, fw_image_type); return EFAULT; } void adf_cfg_set_asym_rings_mask(struct adf_accel_dev *accel_dev) { + int service; + u16 ena_srv_mask; + u16 service_type; + u16 asym_mask = 0; + struct adf_cfg_device *cfg_dev = accel_dev->cfg->dev; struct adf_hw_device_data *hw_data = accel_dev->hw_device; - hw_data->asym_rings_mask = 0; + if (!cfg_dev) { + hw_data->asym_rings_mask = ADF_CFG_DEF_ASYM_MASK; + return; + } + + ena_srv_mask = accel_dev->hw_device->ring_to_svc_map; + + /* parse each service */ + for (service = 0; service < ADF_CFG_MAX_SERVICES; service++) { + service_type = GET_SRV_TYPE(ena_srv_mask, service); + switch (service_type) { + case CRYPTO: + case ASYM: + SET_ASYM_MASK(asym_mask, service); + if (service_type == CRYPTO) + service++; + break; + } + } + + hw_data->asym_rings_mask = asym_mask; } void adf_cfg_gen_dispatch_arbiter(struct adf_accel_dev *accel_dev, const u32 *thrd_to_arb_map, u32 *thrd_to_arb_map_gen, u32 total_engines) { int engine, thread, service, bits; u32 thread_ability, ability_map, service_mask, service_type; u16 ena_srv_mask = GET_HW_DATA(accel_dev)->ring_to_svc_map; for (engine = 0; engine < total_engines; engine++) { if (!(GET_HW_DATA(accel_dev)->ae_mask & (1 << engine))) continue; bits = 0; /* ability_map is used to indicate the threads ability */ ability_map = thrd_to_arb_map[engine]; thrd_to_arb_map_gen[engine] = 0; /* parse each thread on the engine */ for (thread = 0; thread < ADF_NUM_THREADS_PER_AE; thread++) { /* get the ability of this thread */ thread_ability = ability_map & ADF_THRD_ABILITY_MASK; ability_map >>= ADF_THRD_ABILITY_BIT_LEN; /* parse each service */ for (service = 0; service < ADF_CFG_MAX_SERVICES; service++) { service_type = GET_SRV_TYPE(ena_srv_mask, service); switch (service_type) { case CRYPTO: service_mask = ADF_CFG_ASYM_SRV_MASK; if (thread_ability & service_mask) thrd_to_arb_map_gen[engine] |= (1 << bits); bits++; service++; service_mask = ADF_CFG_SYM_SRV_MASK; break; case COMP: service_mask = ADF_CFG_DC_SRV_MASK; break; case SYM: service_mask = ADF_CFG_SYM_SRV_MASK; break; case ASYM: service_mask = ADF_CFG_ASYM_SRV_MASK; break; default: service_mask = ADF_CFG_UNKNOWN_SRV_MASK; } if (thread_ability & service_mask) thrd_to_arb_map_gen[engine] |= (1 << bits); bits++; } } } } int adf_cfg_get_fw_image_type(struct adf_accel_dev *accel_dev, enum adf_cfg_fw_image_type *fw_image_type) { *fw_image_type = ADF_FW_IMAGE_CUSTOM1; return 0; } static int adf_cfg_get_caps_enabled(struct adf_accel_dev *accel_dev, u32 *enabled_svc_caps, u32 *enabled_fw_caps) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u8 i = 0; struct adf_cfg_enabled_services *svcs = NULL; enum adf_cfg_fw_image_type fw_image_type = ADF_FW_IMAGE_DEFAULT; struct adf_hw_device_data *hw_data = accel_dev->hw_device; *enabled_svc_caps = 0; *enabled_fw_caps = 0; /* Get the services enabled by user */ snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; /* * Only the PF driver has the hook for get_fw_image_type as the VF's * enabled service is from PFVF communication. The fw_image_type for * the VF is set to DEFAULT since this type contains all kinds of * enabled service. */ if (hw_data->get_fw_image_type) { if (hw_data->get_fw_image_type(accel_dev, &fw_image_type)) return EFAULT; } for (i = 0; i < ADF_CFG_SVCS_MAX; i++) { svcs = &adf_profiles[fw_image_type].supported_svcs[i]; if (!strncmp(svcs->svcs_enabled, "", ADF_CFG_MAX_VAL_LEN_IN_BYTES)) break; if (!strncmp(val, svcs->svcs_enabled, ADF_CFG_MAX_VAL_LEN_IN_BYTES)) { *enabled_svc_caps = svcs->enabled_svc_cap; *enabled_fw_caps = svcs->enabled_fw_cap; return 0; } } device_printf(GET_DEV(accel_dev), "Invalid ServicesEnabled %s for ServicesProfile: %d\n", val, fw_image_type); return EFAULT; } static void adf_cfg_check_deprecated_params(struct adf_accel_dev *accel_dev) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u8 i = 0; for (i = 0; i < ADF_CFG_DEPRE_PARAMS_NUM; i++) { /* give a warning if the deprecated params are set by user */ snprintf(key, sizeof(key), "%s", adf_cfg_deprecated_params[i]); if (!adf_cfg_get_param_value( accel_dev, ADF_GENERAL_SEC, key, val)) { device_printf(GET_DEV(accel_dev), "Parameter '%s' has been deprecated\n", key); } } } static int adf_cfg_check_enabled_services(struct adf_accel_dev *accel_dev, u32 enabled_svc_caps) { u32 hw_caps = GET_HW_DATA(accel_dev)->accel_capabilities_mask; if ((enabled_svc_caps & hw_caps) == enabled_svc_caps) return 0; device_printf(GET_DEV(accel_dev), "Unsupported device configuration\n"); return EFAULT; } static int adf_cfg_update_pf_accel_cap_mask(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 enabled_svc_caps = 0; u32 enabled_fw_caps = 0; if (hw_data->get_accel_cap) { hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev); } if (adf_cfg_get_caps_enabled(accel_dev, &enabled_svc_caps, &enabled_fw_caps)) return EFAULT; if (adf_cfg_check_enabled_services(accel_dev, enabled_svc_caps)) return EFAULT; if (!(enabled_svc_caps & ADF_CFG_CAP_ASYM)) hw_data->accel_capabilities_mask &= ~ADF_CFG_CAP_ASYM; if (!(enabled_svc_caps & ADF_CFG_CAP_SYM)) hw_data->accel_capabilities_mask &= ~ADF_CFG_CAP_SYM; if (!(enabled_svc_caps & ADF_CFG_CAP_DC)) hw_data->accel_capabilities_mask &= ~ADF_CFG_CAP_DC; /* Enable FW defined capabilities*/ if (enabled_fw_caps) hw_data->accel_capabilities_mask |= enabled_fw_caps; return 0; } static int adf_cfg_update_vf_accel_cap_mask(struct adf_accel_dev *accel_dev) { u32 enabled_svc_caps = 0; u32 enabled_fw_caps = 0; - if (adf_cfg_get_caps_enabled(accel_dev, &enabled_svc_caps, &enabled_fw_caps)) return EFAULT; if (adf_cfg_check_enabled_services(accel_dev, enabled_svc_caps)) return EFAULT; return 0; } int adf_cfg_device_init(struct adf_cfg_device *device, struct adf_accel_dev *accel_dev) { int i = 0; /* max_inst indicates the max instance number one bank can hold */ int max_inst = accel_dev->hw_device->tx_rx_gap; int ret = ENOMEM; struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); adf_cfg_check_deprecated_params(accel_dev); device->bundle_num = 0; device->bundles = (struct adf_cfg_bundle **)malloc( sizeof(struct adf_cfg_bundle *) * accel_dev->hw_device->num_banks, M_QAT, M_WAITOK | M_ZERO); device->bundle_num = accel_dev->hw_device->num_banks; device->instances = (struct adf_cfg_instance **)malloc( sizeof(struct adf_cfg_instance *) * device->bundle_num * max_inst, M_QAT, M_WAITOK | M_ZERO); device->instance_index = 0; device->max_kernel_bundle_nr = -1; ret = EFAULT; /* Update the acceleration capability mask based on User capability */ if (!accel_dev->is_vf) { if (adf_cfg_update_pf_accel_cap_mask(accel_dev)) goto failed; } else { if (adf_cfg_update_vf_accel_cap_mask(accel_dev)) goto failed; } /* Based on the svc configured, get ring_to_svc_map */ if (hw_data->get_ring_to_svc_map) { if (hw_data->get_ring_to_svc_map(accel_dev, &hw_data->ring_to_svc_map)) goto failed; } ret = ENOMEM; /* * 1) get the config information to generate the ring to service * mapping table * 2) init each bundle of this device */ for (i = 0; i < device->bundle_num; i++) { device->bundles[i] = malloc(sizeof(struct adf_cfg_bundle), M_QAT, M_WAITOK | M_ZERO); device->bundles[i]->max_section = max_inst; adf_cfg_bundle_init(device->bundles[i], device, i, accel_dev); } return 0; failed: for (i = 0; i < device->bundle_num; i++) { if (device->bundles[i]) adf_cfg_bundle_clear(device->bundles[i], accel_dev); } for (i = 0; i < (device->bundle_num * max_inst); i++) { if (device->instances && device->instances[i]) free(device->instances[i], M_QAT); } free(device->instances, M_QAT); device->instances = NULL; device_printf(GET_DEV(accel_dev), "Failed to do device init\n"); return ret; } void adf_cfg_device_clear(struct adf_cfg_device *device, struct adf_accel_dev *accel_dev) { int i = 0; for (i = 0; i < device->bundle_num; i++) { if (device->bundles && device->bundles[i]) { adf_cfg_bundle_clear(device->bundles[i], accel_dev); free(device->bundles[i], M_QAT); device->bundles[i] = NULL; } } free(device->bundles, M_QAT); device->bundles = NULL; for (i = 0; i < device->instance_index; i++) { if (device->instances && device->instances[i]) { free(device->instances[i], M_QAT); device->instances[i] = NULL; } } free(device->instances, M_QAT); device->instances = NULL; } +/* + * Static configuration for userspace + */ static int -adf_cfg_static_conf(struct adf_accel_dev *accel_dev) +adf_cfg_static_conf_user(struct adf_accel_dev *accel_dev, + int cy_enabled, + int dc_enabled) { int ret = 0; unsigned long val = 0; char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char value[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; - int cpus; - int instances = 0; - int cy_poll_instances; - int cy_irq_instances; - int dc_instances; + int cy_user_instances = 0; + int dc_user_instances = 0; int i = 0; + int cpus = num_online_cpus(); + + if (!(IS_QAT_GEN4(pci_get_device(GET_DEV(accel_dev))))) { + device_printf( + GET_DEV(accel_dev), + "User space configuration supported only on QAT 4xxx devices\n"); + return ENXIO; + } + + ret |= adf_cfg_section_add(accel_dev, ADF_SAL_SEC); + + if (accel_dev->is_vf) { + if (cy_enabled) + cy_user_instances = + ADF_CFG_STATIC_CONF_USER_INST_NUM_CY_VF; + + if (dc_enabled) + dc_user_instances = + ADF_CFG_STATIC_CONF_USER_INST_NUM_DC_VF; + } else { + if (cy_enabled) + cy_user_instances = + ADF_CFG_STATIC_CONF_USER_INST_NUM_CY; + + if (dc_enabled) + dc_user_instances = + ADF_CFG_STATIC_CONF_USER_INST_NUM_DC; + } + + val = cy_user_instances; + snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_CY); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = dc_user_instances; + snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_DC); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = accel_dev->cfg->num_user_processes; + snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_PROCESSES); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + for (i = 0; i < cy_user_instances; i++) { + val = (accel_dev->accel_id * cy_user_instances + i) % cpus; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = ADF_CFG_STATIC_CONF_POLL; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY "%d" ADF_POLL_MODE, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CY "%d", i); + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY_NAME_FORMAT, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)value, ADF_STR); + } + + for (i = 0; i < dc_user_instances; i++) { + val = (accel_dev->accel_id * dc_user_instances + i) % cpus; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_DC "%d" ADF_ETRMGR_CORE_AFFINITY, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = ADF_CFG_STATIC_CONF_POLL; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_DC "%d" ADF_POLL_MODE, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC); + + snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_DC "%d", i); + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_DC_NAME_FORMAT, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_SAL_SEC, key, (void *)value, ADF_STR); + } - cpus = num_online_cpus(); - instances = - GET_MAX_BANKS(accel_dev) > cpus ? GET_MAX_BANKS(accel_dev) : cpus; + return ret; +} + +static int +adf_cfg_static_conf_kernel(struct adf_accel_dev *accel_dev, + int asym_enabled, + int sym_enabled, + int dc_enabled) +{ + int ret = 0; + char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; + char value[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; + unsigned long val = 0; + int i = 0; + int instances = 0; + int cy_poll_instances = 0; + int cy_irq_instances = 0; + int dc_instances = 0; + int def_cy_poll_inst = ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL; + int def_cy_irq_inst = ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ; + int def_dc_inst = ADF_CFG_STATIC_CONF_INST_NUM_DC; + int cpus = num_online_cpus(); + + instances = GET_MAX_BANKS(accel_dev); if (!instances) return EFAULT; - if (instances >= ADF_CFG_STATIC_CONF_INST_NUM_DC) - dc_instances = ADF_CFG_STATIC_CONF_INST_NUM_DC; - else - return EFAULT; - instances -= dc_instances; + if (accel_dev->is_vf) { + def_cy_poll_inst = ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL_VF; + def_cy_irq_inst = ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ_VF; + def_dc_inst = ADF_CFG_STATIC_CONF_INST_NUM_DC_VF; + } - if (instances >= ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL) - cy_poll_instances = ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL; - else - return EFAULT; - instances -= cy_poll_instances; + /* Get the mode enabled by user */ + ret |= adf_cfg_section_add(accel_dev, ADF_KERNEL_SAL_SEC); - if (instances >= ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ) - cy_irq_instances = ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ; - else - return EFAULT; - instances -= cy_irq_instances; + if (dc_enabled) { + if (instances >= def_dc_inst) { + dc_instances = def_dc_inst; + instances -= dc_instances; + } else { + return EFAULT; + } + } + + if (asym_enabled || sym_enabled) { + if (instances >= def_cy_poll_inst) { + cy_poll_instances = def_cy_poll_inst; + instances -= cy_poll_instances; + } else { + return EFAULT; + } + + if (sym_enabled) { + if (instances >= def_cy_irq_inst) { + cy_irq_instances = def_cy_irq_inst; + instances -= cy_irq_instances; + } else { + return EFAULT; + } + } + } + + val = (cy_poll_instances + cy_irq_instances); + snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_CY); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = dc_instances; + snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_DC); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + for (i = 0; i < (cy_irq_instances); i++) { + val = (accel_dev->accel_id * cy_irq_instances + i) % cpus; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = ADF_CFG_STATIC_CONF_IRQ; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY "%d" ADF_POLL_MODE, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CY "%d", i); + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY_NAME_FORMAT, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)value, ADF_STR); + } + + for (i = cy_irq_instances; i < (cy_poll_instances + cy_irq_instances); + i++) { + val = (accel_dev->accel_id * cy_poll_instances + i) % cpus; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = ADF_CFG_STATIC_CONF_POLL; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY "%d" ADF_POLL_MODE, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CY "%d", i); + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_CY_NAME_FORMAT, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)value, ADF_STR); + } + + for (i = 0; i < dc_instances; i++) { + val = (accel_dev->accel_id * dc_instances + i) % cpus; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_DC "%d" ADF_ETRMGR_CORE_AFFINITY, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + val = ADF_CFG_STATIC_CONF_POLL; + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_DC "%d" ADF_POLL_MODE, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); + + snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_DC "%d", i); + snprintf(key, + ADF_CFG_MAX_KEY_LEN_IN_BYTES, + ADF_DC_NAME_FORMAT, + i); + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)value, ADF_STR); + } + + return ret; +} + +static int +adf_cfg_static_conf(struct adf_accel_dev *accel_dev) +{ + int ret = 0; + unsigned long val = 0; + char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; + char value[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; + char *token, *cur_str; + int ks_enabled = 0; + int us_enabled = 0; + int asym_enabled = 0; + int sym_enabled = 0; + int cy_enabled = 0; + int dc_enabled = 0; + + strncpy(value, accel_dev->cfg->cfg_mode, ADF_CFG_MAX_VAL); + cur_str = value; + + token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); + while (token) { + if (!strncmp(token, ADF_CFG_KERNEL, strlen(ADF_CFG_KERNEL))) + ks_enabled = 1; + if (!strncmp(token, ADF_CFG_USER, strlen(ADF_CFG_USER))) + us_enabled = 1; + token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); + } + + /* Get the services enabled by user */ + strncpy(value, accel_dev->cfg->cfg_services, ADF_CFG_MAX_VAL); + cur_str = value; + + token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); + while (token) { + if (!strncmp(token, ADF_CFG_SYM, strlen(ADF_CFG_SYM))) { + sym_enabled = 1; + } + if (!strncmp(token, ADF_CFG_ASYM, strlen(ADF_CFG_ASYM))) { + asym_enabled = 1; + } + /* cy means both asym & crypto should be enabled + * Hardware resources allocation check will be done later + */ + if (!strncmp(token, ADF_CFG_CY, strlen(ADF_CFG_CY))) { + asym_enabled = 1; + sym_enabled = 1; + } + if (!strncmp(token, ADF_SERVICE_DC, strlen(ADF_SERVICE_DC))) { + dc_enabled = 1; + } + + token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); + } + + if (asym_enabled || sym_enabled) { + cy_enabled = 1; + } ret |= adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC); + snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_SERVICES_ENABLED); - ret |= adf_cfg_section_add(accel_dev, ADF_KERNEL_SAL_SEC); + if (strcmp(ADF_CFG_SYM_ASYM, accel_dev->cfg->cfg_services) == 0) { + strncpy(value, ADF_CFG_CY, ADF_CFG_MAX_VAL_LEN_IN_BYTES); + } else { + strncpy(value, + accel_dev->cfg->cfg_services, + ADF_CFG_MAX_VAL_LEN_IN_BYTES); + } + + ret |= adf_cfg_add_key_value_param( + accel_dev, ADF_GENERAL_SEC, key, (void *)value, ADF_STR); val = ADF_CFG_STATIC_CONF_VER; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_CONFIG_VERSION); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_AUTO_RESET; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_AUTO_RESET_ON_ERROR); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); if (accel_dev->hw_device->get_num_accel_units) { int cy_au = 0; int dc_au = 0; int num_au = accel_dev->hw_device->get_num_accel_units( accel_dev->hw_device); if (num_au > ADF_CFG_STATIC_CONF_NUM_DC_ACCEL_UNITS) { cy_au = num_au - ADF_CFG_STATIC_CONF_NUM_DC_ACCEL_UNITS; dc_au = ADF_CFG_STATIC_CONF_NUM_DC_ACCEL_UNITS; } else if (num_au == ADF_CFG_STATIC_CONF_NUM_DC_ACCEL_UNITS) { cy_au = 1; dc_au = 1; } else { return EFAULT; } + /* User defined adjustement basing on serives enabled */ + if (cy_enabled && !dc_enabled) { + cy_au += dc_au; + dc_au = 0; + } else if (!cy_enabled && dc_enabled) { + dc_au += cy_au; + cy_au = 0; + } + val = cy_au; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_CY_ACCEL_UNITS); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = dc_au; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_DC_ACCEL_UNITS); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_NUM_INLINE_ACCEL_UNITS; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_INLINE_ACCEL_UNITS); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); } val = ADF_CFG_STATIC_CONF_CY_ASYM_RING_SIZE; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_CY ADF_RING_ASYM_SIZE); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_CY_SYM_RING_SIZE; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_CY ADF_RING_SYM_SIZE); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_DC_INTER_BUF_SIZE; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_INTER_BUF_SIZE); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); - snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_SERVICES_ENABLED); - if ((cy_poll_instances + cy_irq_instances) == 0 && dc_instances > 0) { - snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CFG_DC); - } else if (((cy_poll_instances + cy_irq_instances)) > 0 && - dc_instances == 0) { - snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CFG_SYM); - } else { - snprintf(value, - ADF_CFG_MAX_VAL_LEN_IN_BYTES, - "%s;%s", - ADF_CFG_SYM, - ADF_CFG_DC); - } - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_GENERAL_SEC, key, (void *)value, ADF_STR); - val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DC; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_DC); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DH; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_DH); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DRBG; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_DRBG); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DSA; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_DSA); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ECC; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_ECC); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ENABLED; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_ENABLED); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_KEYGEN; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_KEYGEN); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_LN; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_LN); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_PRIME; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_PRIME); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_RSA; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_RSA); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_SYM; snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, SAL_STATS_CFG_SYM); ret |= adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC); - val = (cy_poll_instances + cy_irq_instances); - snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_CY); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - val = dc_instances; - snprintf(key, ADF_CFG_MAX_KEY_LEN_IN_BYTES, ADF_NUM_DC); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - for (i = 0; i < (cy_irq_instances); i++) { - val = i; - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - val = ADF_CFG_STATIC_CONF_IRQ; - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_CY "%d" ADF_POLL_MODE, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CY "%d", i); - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_CY_NAME_FORMAT, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)value, ADF_STR); + if (ks_enabled) { + ret |= adf_cfg_static_conf_kernel(accel_dev, + asym_enabled, + sym_enabled, + dc_enabled); } - for (i = cy_irq_instances; i < (cy_poll_instances + cy_irq_instances); - i++) { - val = i; - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - val = ADF_CFG_STATIC_CONF_POLL; - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_CY "%d" ADF_POLL_MODE, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_CY "%d", i); - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_CY_NAME_FORMAT, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)value, ADF_STR); - } - - for (i = 0; i < dc_instances; i++) { - val = i; - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_DC "%d" ADF_ETRMGR_CORE_AFFINITY, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - val = ADF_CFG_STATIC_CONF_POLL; - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_DC "%d" ADF_POLL_MODE, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC); - - snprintf(value, ADF_CFG_MAX_VAL_LEN_IN_BYTES, ADF_DC "%d", i); - snprintf(key, - ADF_CFG_MAX_KEY_LEN_IN_BYTES, - ADF_DC_NAME_FORMAT, - i); - ret |= adf_cfg_add_key_value_param( - accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)value, ADF_STR); + if (us_enabled) { + ret |= + adf_cfg_static_conf_user(accel_dev, cy_enabled, dc_enabled); } if (ret) - ret = EFAULT; + ret = ENXIO; return ret; } int adf_config_device(struct adf_accel_dev *accel_dev) { struct adf_cfg_device_data *cfg = NULL; struct adf_cfg_device *cfg_device = NULL; struct adf_cfg_section *sec; struct list_head *list; int ret = ENOMEM; if (!accel_dev) return ret; ret = adf_cfg_static_conf(accel_dev); if (ret) goto failed; cfg = accel_dev->cfg; cfg->dev = NULL; cfg_device = (struct adf_cfg_device *)malloc(sizeof(*cfg_device), M_QAT, M_WAITOK | M_ZERO); ret = EFAULT; if (adf_cfg_device_init(cfg_device, accel_dev)) goto failed; cfg->dev = cfg_device; /* GENERAL and KERNEL section must be processed before others */ list_for_each(list, &cfg->sec_list) { sec = list_entry(list, struct adf_cfg_section, list); if (!strcmp(sec->name, ADF_GENERAL_SEC)) { ret = adf_cfg_process_section(accel_dev, sec->name, accel_dev->accel_id); if (ret) goto failed; sec->processed = true; break; } } list_for_each(list, &cfg->sec_list) { sec = list_entry(list, struct adf_cfg_section, list); if (!strcmp(sec->name, ADF_KERNEL_SEC)) { ret = adf_cfg_process_section(accel_dev, sec->name, accel_dev->accel_id); if (ret) goto failed; sec->processed = true; break; } } list_for_each(list, &cfg->sec_list) { sec = list_entry(list, struct adf_cfg_section, list); if (!strcmp(sec->name, ADF_KERNEL_SAL_SEC)) { ret = adf_cfg_process_section(accel_dev, sec->name, accel_dev->accel_id); if (ret) goto failed; sec->processed = true; break; } } list_for_each(list, &cfg->sec_list) { sec = list_entry(list, struct adf_cfg_section, list); /* avoid reprocessing one section */ if (!sec->processed && !sec->is_derived) { ret = adf_cfg_process_section(accel_dev, sec->name, accel_dev->accel_id); if (ret) goto failed; sec->processed = true; } } /* newly added accel section */ ret = adf_cfg_process_section(accel_dev, ADF_ACCEL_SEC, accel_dev->accel_id); if (ret) goto failed; /* * put item-remove task after item-process * because during process we may fetch values from those items */ list_for_each(list, &cfg->sec_list) { sec = list_entry(list, struct adf_cfg_section, list); if (!sec->is_derived) { ret = adf_cfg_cleanup_section(accel_dev, sec->name, accel_dev->accel_id); if (ret) goto failed; } } ret = 0; set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); failed: if (ret) { if (cfg_device) { adf_cfg_device_clear(cfg_device, accel_dev); free(cfg_device, M_QAT); cfg->dev = NULL; } adf_cfg_del_all(accel_dev); device_printf(GET_DEV(accel_dev), "Failed to config device\n"); } return ret; } diff --git a/sys/dev/qat/qat_common/adf_cfg_sysctl.c b/sys/dev/qat/qat_common/adf_cfg_sysctl.c new file mode 100644 index 000000000000..a0d45300d505 --- /dev/null +++ b/sys/dev/qat/qat_common/adf_cfg_sysctl.c @@ -0,0 +1,343 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include +#include +#include +#include "adf_accel_devices.h" +#include "adf_cfg.h" +#include "adf_cfg_sysctl.h" +#include "adf_cfg_device.h" +#include "adf_common_drv.h" +#include +#include + +#define ADF_CFG_SYSCTL_BUF_SZ ADF_CFG_MAX_VAL +#define ADF_CFG_UP_STR "up" +#define ADF_CFG_DOWN_STR "down" + +#define ADF_CFG_MAX_USER_PROCESSES 64 + +static int +adf_cfg_down(struct adf_accel_dev *accel_dev) +{ + int ret = 0; + + if (!adf_dev_started(accel_dev)) { + device_printf(GET_DEV(accel_dev), + "Device qat_dev%d already down\n", + accel_dev->accel_id); + return 0; + } + + if (adf_dev_in_use(accel_dev)) { + pr_err("QAT: Device %d in use\n", accel_dev->accel_id); + goto out; + } + + if (adf_dev_stop(accel_dev)) { + device_printf(GET_DEV(accel_dev), + "Failed to stop qat_dev%d\n", + accel_dev->accel_id); + ret = EFAULT; + goto out; + } + + adf_dev_shutdown(accel_dev); + +out: + return ret; +} + +static int +adf_cfg_up(struct adf_accel_dev *accel_dev) +{ + int ret; + + if (adf_dev_started(accel_dev)) + return 0; + + if (NULL == accel_dev->hw_device->config_device) + return ENXIO; + + ret = accel_dev->hw_device->config_device(accel_dev); + if (ret) { + device_printf(GET_DEV(accel_dev), + "Failed to start qat_dev%d\n", + accel_dev->accel_id); + return ret; + } + + ret = adf_dev_init(accel_dev); + if (!ret) + ret = adf_dev_start(accel_dev); + + if (ret) { + device_printf(GET_DEV(accel_dev), + "Failed to start qat_dev%d\n", + accel_dev->accel_id); + adf_dev_stop(accel_dev); + adf_dev_shutdown(accel_dev); + } + + if (!ret) { + struct adf_cfg_device *cfg_dev = NULL; + + cfg_dev = accel_dev->cfg->dev; + adf_cfg_device_clear(cfg_dev, accel_dev); + free(cfg_dev, M_QAT); + accel_dev->cfg->dev = NULL; + } + + return 0; +} + +static const char *const cfg_serv[] = + { "sym;asym", "sym", "asym", "dc", "sym;dc", "asym;dc", "cy", "cy;dc" }; + +static const char *const cfg_mode[] = { "ks;us", "us", "ks" }; + +static int adf_cfg_sysctl_services_handle(SYSCTL_HANDLER_ARGS) +{ + struct adf_cfg_device_data *dev_cfg_data; + struct adf_accel_dev *accel_dev; + char buf[ADF_CFG_SYSCTL_BUF_SZ]; + unsigned int len; + int ret = 0; + int i = 0; + + accel_dev = arg1; + if (!accel_dev) + return ENXIO; + + dev_cfg_data = accel_dev->cfg; + if (!dev_cfg_data) + return ENXIO; + + strlcpy(buf, dev_cfg_data->cfg_services, sizeof(buf)); + + ret = sysctl_handle_string(oidp, buf, sizeof(buf), req); + if (ret != 0 || req->newptr == NULL) + return ret; + + /* Handle config change */ + if (adf_dev_started(accel_dev)) { + device_printf( + GET_DEV(accel_dev), + "QAT: configuration could be changed in down state only\n"); + return EINVAL; + } + + len = strlen(buf); + + for (i = 0; i < ARRAY_SIZE(cfg_serv); i++) { + if ((len > 0 && strncasecmp(cfg_serv[i], buf, len) == 0)) { + strlcpy(dev_cfg_data->cfg_services, + buf, + ADF_CFG_MAX_VAL); + break; + } + } + + if (i == ARRAY_SIZE(cfg_serv)) { + device_printf(GET_DEV(accel_dev), + "Unknown service configuration\n"); + ret = EINVAL; + } + + return ret; +} + +static int adf_cfg_sysctl_mode_handle(SYSCTL_HANDLER_ARGS) +{ + struct adf_cfg_device_data *dev_cfg_data; + struct adf_accel_dev *accel_dev; + char buf[ADF_CFG_SYSCTL_BUF_SZ]; + unsigned int len; + int ret = 0; + int i = 0; + + accel_dev = arg1; + if (!accel_dev) + return ENXIO; + + dev_cfg_data = accel_dev->cfg; + if (!dev_cfg_data) + return ENXIO; + + strlcpy(buf, dev_cfg_data->cfg_mode, sizeof(buf)); + + ret = sysctl_handle_string(oidp, buf, sizeof(buf), req); + if (ret != 0 || req->newptr == NULL) + return ret; + + /* Handle config change */ + if (adf_dev_started(accel_dev)) { + device_printf( + GET_DEV(accel_dev), + "QAT: configuration could be changed in down state only\n"); + return EBUSY; + } + + len = strlen(buf); + + for (i = 0; i < ARRAY_SIZE(cfg_mode); i++) { + if ((len > 0 && strncasecmp(cfg_mode[i], buf, len) == 0)) { + strlcpy(dev_cfg_data->cfg_mode, buf, ADF_CFG_MAX_VAL); + break; + } + } + + if (i == ARRAY_SIZE(cfg_mode)) { + device_printf(GET_DEV(accel_dev), + "Unknown configuration mode\n"); + ret = EINVAL; + } + + return ret; +} + +static int adf_cfg_sysctl_handle(SYSCTL_HANDLER_ARGS) +{ + struct adf_cfg_device_data *dev_cfg_data; + struct adf_accel_dev *accel_dev; + char buf[ADF_CFG_SYSCTL_BUF_SZ] = { 0 }; + unsigned int len; + int ret = 0; + + accel_dev = arg1; + if (!accel_dev) + return ENXIO; + + dev_cfg_data = accel_dev->cfg; + if (!dev_cfg_data) + return ENXIO; + + if (adf_dev_started(accel_dev)) { + strlcpy(buf, ADF_CFG_UP_STR, sizeof(buf)); + } else { + strlcpy(buf, ADF_CFG_DOWN_STR, sizeof(buf)); + } + + ret = sysctl_handle_string(oidp, buf, sizeof(buf), req); + if (ret != 0 || req->newptr == NULL) + return ret; + + len = strlen(buf); + + if ((len > 0 && strncasecmp(ADF_CFG_UP_STR, buf, len) == 0)) { + ret = adf_cfg_up(accel_dev); + + } else if (len > 0 && strncasecmp(ADF_CFG_DOWN_STR, buf, len) == 0) { + ret = adf_cfg_down(accel_dev); + + } else { + device_printf(GET_DEV(accel_dev), "QAT: Invalid operation\n"); + ret = EINVAL; + } + + return ret; +} + +static int adf_cfg_sysctl_num_processes_handle(SYSCTL_HANDLER_ARGS) +{ + struct adf_cfg_device_data *dev_cfg_data; + struct adf_accel_dev *accel_dev; + uint32_t num_user_processes = 0; + int ret = 0; + + accel_dev = arg1; + if (!accel_dev) + return ENXIO; + + dev_cfg_data = accel_dev->cfg; + if (!dev_cfg_data) + return ENXIO; + + num_user_processes = dev_cfg_data->num_user_processes; + + ret = sysctl_handle_int(oidp, &num_user_processes, 0, req); + if (ret != 0 || req->newptr == NULL) + return ret; + + if (adf_dev_started(accel_dev)) { + device_printf( + GET_DEV(accel_dev), + "QAT: configuration could be changed in down state only\n"); + return EBUSY; + } + + if (num_user_processes > ADF_CFG_MAX_USER_PROCESSES) { + return EINVAL; + } + + dev_cfg_data->num_user_processes = num_user_processes; + + return ret; +} + +int +adf_cfg_sysctl_add(struct adf_accel_dev *accel_dev) +{ + struct sysctl_ctx_list *qat_sysctl_ctx; + struct sysctl_oid *qat_sysctl_tree; + + if (!accel_dev) + return EINVAL; + + qat_sysctl_ctx = + device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev); + qat_sysctl_tree = + device_get_sysctl_tree(accel_dev->accel_pci_dev.pci_dev); + + SYSCTL_ADD_PROC(qat_sysctl_ctx, + SYSCTL_CHILDREN(qat_sysctl_tree), + OID_AUTO, + "state", + CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_NEEDGIANT, + accel_dev, + 0, + adf_cfg_sysctl_handle, + "A", + "QAT State"); + + SYSCTL_ADD_PROC(qat_sysctl_ctx, + SYSCTL_CHILDREN(qat_sysctl_tree), + OID_AUTO, + "cfg_services", + CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, + accel_dev, + 0, + adf_cfg_sysctl_services_handle, + "A", + "QAT services confguration"); + + SYSCTL_ADD_PROC(qat_sysctl_ctx, + SYSCTL_CHILDREN(qat_sysctl_tree), + OID_AUTO, + "cfg_mode", + CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, + accel_dev, + 0, + adf_cfg_sysctl_mode_handle, + "A", + "QAT mode configuration"); + + SYSCTL_ADD_PROC(qat_sysctl_ctx, + SYSCTL_CHILDREN(qat_sysctl_tree), + OID_AUTO, + "num_user_processes", + CTLTYPE_U32 | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, + accel_dev, + 0, + adf_cfg_sysctl_num_processes_handle, + "I", + "QAT user processes number "); + + return 0; +} + +void +adf_cfg_sysctl_remove(struct adf_accel_dev *accel_dev) +{ +} diff --git a/sys/dev/qat/qat_common/adf_ctl_drv.c b/sys/dev/qat/qat_common/adf_ctl_drv.c new file mode 100644 index 000000000000..8fcc3f389eee --- /dev/null +++ b/sys/dev/qat/qat_common/adf_ctl_drv.c @@ -0,0 +1,491 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include "qat_freebsd.h" +#include "adf_cfg.h" +#include "adf_common_drv.h" +#include "adf_accel_devices.h" +#include "icp_qat_uclo.h" +#include "icp_qat_fw.h" +#include "icp_qat_fw_init_admin.h" +#include "adf_cfg_strings.h" +#include "adf_uio_control.h" +#include "adf_uio_cleanup.h" +#include "adf_uio.h" +#include "adf_transport_access_macros.h" +#include "adf_transport_internal.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "adf_accel_devices.h" +#include "adf_common_drv.h" +#include "adf_cfg.h" +#include "adf_cfg_common.h" +#include "adf_cfg_user.h" +#include "adf_heartbeat.h" +#include "adf_cfg_device.h" + +#define DEVICE_NAME "qat_adf_ctl" + +static struct sx adf_ctl_lock; + +static d_ioctl_t adf_ctl_ioctl; + +void *misc_counter; + +static struct cdevsw adf_ctl_cdevsw = { + .d_version = D_VERSION, + .d_ioctl = adf_ctl_ioctl, + .d_name = DEVICE_NAME, +}; + +static struct cdev *adf_ctl_dev; + +static void adf_chr_drv_destroy(void) +{ + destroy_dev(adf_ctl_dev); +} + +struct adf_user_addr_info { + struct list_head list; + void *user_addr; +}; + +static int adf_chr_drv_create(void) +{ + adf_ctl_dev = make_dev(&adf_ctl_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, + DEVICE_NAME); + + if (!adf_ctl_dev) { + printf("QAT: failed to create device\n"); + goto err_cdev_del; + } + return 0; +err_cdev_del: + return EFAULT; +} + +static int adf_ctl_alloc_resources(struct adf_user_cfg_ctl_data **ctl_data, + caddr_t arg) +{ + *ctl_data = (struct adf_user_cfg_ctl_data *)arg; + return 0; +} + +static int adf_copy_keyval_to_user(struct adf_accel_dev *accel_dev, + struct adf_user_cfg_ctl_data *ctl_data) +{ + struct adf_user_cfg_key_val key_val; + struct adf_user_cfg_section section; + char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0}; + char *user_ptr; + + if (copyin(ctl_data->config_section, §ion, + sizeof(struct adf_user_cfg_section))) { + device_printf(GET_DEV(accel_dev), + "failed to copy section info\n"); + return EFAULT; + } + + if (copyin(section.params, &key_val, + sizeof(struct adf_user_cfg_key_val))) { + device_printf(GET_DEV(accel_dev), "failed to copy key val\n"); + return EFAULT; + } + + user_ptr = ((char *)section.params) + ADF_CFG_MAX_KEY_LEN_IN_BYTES; + + if (adf_cfg_get_param_value( + accel_dev, section.name, key_val.key, val)) { + return EFAULT; + } + + if (copyout(val, user_ptr, + ADF_CFG_MAX_VAL_LEN_IN_BYTES)) { + device_printf(GET_DEV(accel_dev), + "failed to copy keyvalue to user!\n"); + return EFAULT; + } + + return 0; +} + +static int adf_ctl_ioctl_get_num_devices(unsigned int cmd, + caddr_t arg) +{ + adf_devmgr_get_num_dev((uint32_t *)arg); + + return 0; +} + +static int adf_ctl_ioctl_get_status(unsigned int cmd, + caddr_t arg) +{ + struct adf_hw_device_data *hw_data; + struct adf_dev_status_info *dev_info; + struct adf_accel_dev *accel_dev; + + dev_info = (struct adf_dev_status_info *)arg; + + accel_dev = adf_devmgr_get_dev_by_id(dev_info->accel_id); + if (!accel_dev) + return ENODEV; + + hw_data = accel_dev->hw_device; + dev_info->state = adf_dev_started(accel_dev) ? DEV_UP : DEV_DOWN; + dev_info->num_ae = hw_data->get_num_aes(hw_data); + dev_info->num_accel = hw_data->get_num_accels(hw_data); + dev_info->num_logical_accel = hw_data->num_logical_accel; + dev_info->banks_per_accel = hw_data->num_banks + / hw_data->num_logical_accel; + strlcpy(dev_info->name, hw_data->dev_class->name, + sizeof(dev_info->name)); + dev_info->instance_id = hw_data->instance_id; + dev_info->type = hw_data->dev_class->type; + dev_info->bus = pci_get_bus(accel_to_pci_dev(accel_dev)); + dev_info->dev = pci_get_slot(accel_to_pci_dev(accel_dev)); + dev_info->fun = pci_get_function(accel_to_pci_dev(accel_dev)); + dev_info->domain = pci_get_domain(accel_to_pci_dev(accel_dev)); + + dev_info->pci_device_id = pci_get_device(accel_to_pci_dev(accel_dev)); + + dev_info->node_id = accel_dev->accel_pci_dev.node; + dev_info->sku = accel_dev->accel_pci_dev.sku; + + dev_info->device_mem_available = accel_dev->aram_info ? + accel_dev->aram_info->inter_buff_aram_region_size : 0; + + return 0; +} + +static int adf_ctl_ioctl_heartbeat(unsigned int cmd, + caddr_t arg) +{ + int ret = 0; + struct adf_accel_dev *accel_dev; + struct adf_dev_heartbeat_status_ctl *hb_status; + + hb_status = (struct adf_dev_heartbeat_status_ctl *)arg; + + accel_dev = adf_devmgr_get_dev_by_id(hb_status->device_id); + if (!accel_dev) + return ENODEV; + + if (adf_heartbeat_status(accel_dev, &hb_status->status)) { + device_printf(GET_DEV(accel_dev), + "failed to get heartbeat status\n"); + return EAGAIN; + } + return ret; +} + +static int adf_ctl_ioctl_dev_get_value(unsigned int cmd, + caddr_t arg) +{ + int ret = 0; + struct adf_user_cfg_ctl_data *ctl_data; + struct adf_accel_dev *accel_dev; + + ret = adf_ctl_alloc_resources(&ctl_data, arg); + if (ret) + return ret; + + accel_dev = adf_devmgr_get_dev_by_id(ctl_data->device_id); + if (!accel_dev) { + printf("QAT: Device %d not found\n", ctl_data->device_id); + ret = ENODEV; + goto out; + } + + ret = adf_copy_keyval_to_user(accel_dev, ctl_data); + if (ret) { + ret = ENODEV; + goto out; + } +out: + return ret; +} + +static struct adf_uio_control_bundle + *adf_ctl_ioctl_bundle(struct adf_user_reserve_ring reserve) +{ + struct adf_accel_dev *accel_dev; + struct adf_uio_control_accel *accel; + struct adf_uio_control_bundle *bundle = NULL; + u8 num_rings_per_bank = 0; + + accel_dev = adf_devmgr_get_dev_by_id(reserve.accel_id); + if (!accel_dev) { + pr_err("QAT: Failed to get accel_dev\n"); + return NULL; + } + num_rings_per_bank = accel_dev->hw_device->num_rings_per_bank; + + accel = accel_dev->accel; + if (!accel) { + pr_err("QAT: Failed to get accel\n"); + return NULL; + } + + if (reserve.bank_nr >= GET_MAX_BANKS(accel_dev)) { + pr_err("QAT: Invalid bank number %d\n", reserve.bank_nr); + return NULL; + } + if (reserve.ring_mask & ~((1 << num_rings_per_bank) - 1)) { + pr_err("QAT: Invalid ring mask %0X\n", reserve.ring_mask); + return NULL; + } + if (accel->num_ker_bundles > reserve.bank_nr) { + pr_err("QAT: Invalid user reserved bank\n"); + return NULL; + } + bundle = &accel->bundle[reserve.bank_nr]; + + return bundle; +} + +static int adf_ctl_ioctl_reserve_ring(caddr_t arg) +{ + struct adf_user_reserve_ring reserve = {0}; + struct adf_uio_control_bundle *bundle; + struct adf_uio_instance_rings *instance_rings; + int pid_entry_found = 0; + + reserve = *((struct adf_user_reserve_ring *)arg); + + bundle = adf_ctl_ioctl_bundle(reserve); + if (!bundle) { + pr_err("QAT: Failed to get bundle\n"); + return -EINVAL; + } + + mutex_lock(&bundle->lock); + if (bundle->rings_used & reserve.ring_mask) { + pr_err("QAT: Bundle %d, rings 0x%04X already reserved\n", + reserve.bank_nr, + reserve.ring_mask); + mutex_unlock(&bundle->lock); + return -EINVAL; + } + mutex_unlock(&bundle->lock); + + /* Find the list entry for this process */ + mutex_lock(&bundle->list_lock); + list_for_each_entry(instance_rings, &bundle->list, list) { + if (instance_rings->user_pid == curproc->p_pid) { + pid_entry_found = 1; + break; + } + } + mutex_unlock(&bundle->list_lock); + + if (!pid_entry_found) { + pr_err("QAT: process %d not found\n", curproc->p_pid); + return -EINVAL; + } + + instance_rings->ring_mask |= reserve.ring_mask; + mutex_lock(&bundle->lock); + bundle->rings_used |= reserve.ring_mask; + mutex_unlock(&bundle->lock); + + return 0; +} + +static int adf_ctl_ioctl_release_ring(caddr_t arg) +{ + struct adf_user_reserve_ring reserve; + struct adf_uio_control_bundle *bundle; + struct adf_uio_instance_rings *instance_rings; + int pid_entry_found; + + reserve = *((struct adf_user_reserve_ring *)arg); + + bundle = adf_ctl_ioctl_bundle(reserve); + if (!bundle) { + pr_err("QAT: Failed to get bundle\n"); + return -EINVAL; + } + + /* Find the list entry for this process */ + pid_entry_found = 0; + mutex_lock(&bundle->list_lock); + list_for_each_entry(instance_rings, &bundle->list, list) { + if (instance_rings->user_pid == curproc->p_pid) { + pid_entry_found = 1; + break; + } + } + mutex_unlock(&bundle->list_lock); + + if (!pid_entry_found) { + pr_err("QAT: No ring reservation found for PID %d\n", + curproc->p_pid); + return -EINVAL; + } + + if ((instance_rings->ring_mask & reserve.ring_mask) != + reserve.ring_mask) { + pr_err("QAT: Attempt to release rings not reserved by this process\n"); + return -EINVAL; + } + + instance_rings->ring_mask &= ~reserve.ring_mask; + mutex_lock(&bundle->lock); + bundle->rings_used &= ~reserve.ring_mask; + mutex_unlock(&bundle->lock); + + return 0; +} + +static int adf_ctl_ioctl_enable_ring(caddr_t arg) +{ + struct adf_user_reserve_ring reserve; + struct adf_uio_control_bundle *bundle; + + reserve = *((struct adf_user_reserve_ring *)arg); + + bundle = adf_ctl_ioctl_bundle(reserve); + if (!bundle) { + pr_err("QAT: Failed to get bundle\n"); + return -EINVAL; + } + + mutex_lock(&bundle->lock); + bundle->rings_enabled |= reserve.ring_mask; + adf_update_uio_ring_arb(bundle); + mutex_unlock(&bundle->lock); + + return 0; +} + +static int adf_ctl_ioctl_disable_ring(caddr_t arg) +{ + struct adf_user_reserve_ring reserve; + struct adf_uio_control_bundle *bundle; + + reserve = *((struct adf_user_reserve_ring *)arg); + + bundle = adf_ctl_ioctl_bundle(reserve); + if (!bundle) { + pr_err("QAT: Failed to get bundle\n"); + return -EINVAL; + } + + mutex_lock(&bundle->lock); + bundle->rings_enabled &= ~reserve.ring_mask; + adf_update_uio_ring_arb(bundle); + mutex_unlock(&bundle->lock); + + return 0; +} + +static int adf_ctl_ioctl(struct cdev *dev, + u_long cmd, + caddr_t arg, + int fflag, + struct thread *td) +{ + int ret = 0; + bool allowed = false; + int i; + static const unsigned int unrestricted_cmds[] = { + IOCTL_GET_NUM_DEVICES, IOCTL_STATUS_ACCEL_DEV, + IOCTL_HEARTBEAT_ACCEL_DEV, IOCTL_GET_CFG_VAL, + IOCTL_RESERVE_RING, IOCTL_RELEASE_RING, + IOCTL_ENABLE_RING, IOCTL_DISABLE_RING, + }; + + if (priv_check(curthread, PRIV_DRIVER)) { + for (i = 0; i < ARRAY_SIZE(unrestricted_cmds); i++) { + if (cmd == unrestricted_cmds[i]) { + allowed = true; + break; + } + } + if (!allowed) + return EACCES; + } + + /* All commands have an argument */ + if (!arg) + return EFAULT; + + if (sx_xlock_sig(&adf_ctl_lock)) + return EINTR; + + switch (cmd) { + case IOCTL_GET_NUM_DEVICES: + ret = adf_ctl_ioctl_get_num_devices(cmd, arg); + break; + case IOCTL_STATUS_ACCEL_DEV: + ret = adf_ctl_ioctl_get_status(cmd, arg); + break; + case IOCTL_GET_CFG_VAL: + ret = adf_ctl_ioctl_dev_get_value(cmd, arg); + break; + case IOCTL_RESERVE_RING: + ret = adf_ctl_ioctl_reserve_ring(arg); + break; + case IOCTL_RELEASE_RING: + ret = adf_ctl_ioctl_release_ring(arg); + break; + case IOCTL_ENABLE_RING: + ret = adf_ctl_ioctl_enable_ring(arg); + break; + case IOCTL_DISABLE_RING: + ret = adf_ctl_ioctl_disable_ring(arg); + break; + case IOCTL_HEARTBEAT_ACCEL_DEV: + ret = adf_ctl_ioctl_heartbeat(cmd, arg); + break; + default: + printf("QAT: Invalid ioctl\n"); + ret = ENOTTY; + break; + } + sx_xunlock(&adf_ctl_lock); + return ret; +} + +int +adf_register_ctl_device_driver(void) +{ + sx_init(&adf_ctl_lock, "adf ctl"); + + if (adf_chr_drv_create()) + goto err_chr_dev; + + adf_state_init(); + if (adf_processes_dev_register() != 0) + goto err_processes_dev_register; + return 0; + +err_processes_dev_register: + adf_chr_drv_destroy(); +err_chr_dev: + sx_destroy(&adf_ctl_lock); + return EFAULT; +} + +void +adf_unregister_ctl_device_driver(void) +{ + adf_processes_dev_unregister(); + adf_state_destroy(); + adf_chr_drv_destroy(); + adf_clean_vf_map(false); + sx_destroy(&adf_ctl_lock); +} diff --git a/sys/dev/qat/qat_common/adf_freebsd_dev_processes.c b/sys/dev/qat/qat_common/adf_freebsd_dev_processes.c new file mode 100644 index 000000000000..e66abaa28ad1 --- /dev/null +++ b/sys/dev/qat/qat_common/adf_freebsd_dev_processes.c @@ -0,0 +1,677 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ + +#include "qat_freebsd.h" +#include "adf_cfg.h" +#include "adf_common_drv.h" +#include "adf_accel_devices.h" +#include "icp_qat_uclo.h" +#include "icp_qat_fw.h" +#include "icp_qat_fw_init_admin.h" +#include "adf_cfg_strings.h" +#include "adf_uio_control.h" +#include "adf_uio_cleanup.h" +#include "adf_uio.h" +#include "adf_transport_access_macros.h" +#include "adf_transport_internal.h" + +#define ADF_DEV_PROCESSES_NAME "qat_dev_processes" +#define ADF_DEV_STATE_NAME "qat_dev_state" + +#define ADF_STATE_CALLOUT_TIME 10 + +static const char *mtx_name = "state_callout_mtx"; + +static d_open_t adf_processes_open; +static void adf_processes_release(void *data); +static d_read_t adf_processes_read; +static d_write_t adf_processes_write; + +static d_open_t adf_state_open; +static void adf_state_release(void *data); +static d_read_t adf_state_read; +static int adf_state_kqfilter(struct cdev *dev, struct knote *kn); +static int adf_state_kqread_event(struct knote *kn, long hint); +static void adf_state_kqread_detach(struct knote *kn); + +static struct callout callout; +static struct mtx mtx; +static struct service_hndl adf_state_hndl; + +struct entry_proc_events { + struct adf_state_priv_data *proc_events; + + SLIST_ENTRY(entry_proc_events) entries_proc_events; +}; + +struct entry_state { + struct adf_state state; + + STAILQ_ENTRY(entry_state) entries_state; +}; + +SLIST_HEAD(proc_events_head, entry_proc_events); +STAILQ_HEAD(state_head, entry_state); + +static struct proc_events_head proc_events_head; + +struct adf_processes_priv_data { + char name[ADF_CFG_MAX_SECTION_LEN_IN_BYTES]; + int read_flag; + struct list_head list; +}; + +struct adf_state_priv_data { + struct cdev *cdev; + struct selinfo rsel; + struct state_head state_head; +}; + +static struct cdevsw adf_processes_cdevsw = { + .d_version = D_VERSION, + .d_open = adf_processes_open, + .d_read = adf_processes_read, + .d_write = adf_processes_write, + .d_name = ADF_DEV_PROCESSES_NAME, +}; + +static struct cdevsw adf_state_cdevsw = { + .d_version = D_VERSION, + .d_open = adf_state_open, + .d_read = adf_state_read, + .d_kqfilter = adf_state_kqfilter, + .d_name = ADF_DEV_STATE_NAME, +}; + +static struct filterops adf_state_read_filterops = { + .f_isfd = 1, + .f_attach = NULL, + .f_detach = adf_state_kqread_detach, + .f_event = adf_state_kqread_event, +}; + +static struct cdev *adf_processes_dev; +static struct cdev *adf_state_dev; + +static LINUX_LIST_HEAD(processes_list); + +struct sx processes_list_sema; +SX_SYSINIT(processes_list_sema, &processes_list_sema, "adf proc list"); + +static void +adf_chr_drv_destroy(void) +{ + destroy_dev(adf_processes_dev); +} + +static int +adf_chr_drv_create(void) +{ + + adf_processes_dev = make_dev(&adf_processes_cdevsw, + 0, + UID_ROOT, + GID_WHEEL, + 0600, + ADF_DEV_PROCESSES_NAME); + if (adf_processes_dev == NULL) { + printf("QAT: failed to create device\n"); + goto err_cdev_del; + } + return 0; +err_cdev_del: + return EFAULT; +} + +static int +adf_processes_open(struct cdev *dev, int oflags, int devtype, struct thread *td) +{ + int i = 0, devices = 0; + struct adf_accel_dev *accel_dev = NULL; + struct adf_processes_priv_data *prv_data = NULL; + int error = 0; + + for (i = 0; i < ADF_MAX_DEVICES; i++) { + accel_dev = adf_devmgr_get_dev_by_id(i); + if (!accel_dev) + continue; + if (!adf_dev_started(accel_dev)) + continue; + devices++; + } + if (!devices) { + printf("QAT: No active devices found.\n"); + return ENXIO; + } + prv_data = malloc(sizeof(*prv_data), M_QAT, M_WAITOK | M_ZERO); + if (!prv_data) + return ENOMEM; + INIT_LIST_HEAD(&prv_data->list); + error = devfs_set_cdevpriv(prv_data, adf_processes_release); + if (error) { + free(prv_data, M_QAT); + return error; + } + + return 0; +} + +static int +adf_get_first_started_dev(void) +{ + int i = 0; + struct adf_accel_dev *accel_dev = NULL; + + for (i = 0; i < ADF_MAX_DEVICES; i++) { + accel_dev = adf_devmgr_get_dev_by_id(i); + if (!accel_dev) + continue; + if (adf_dev_started(accel_dev)) + return i; + } + + return -1; +} + +static int +adf_processes_write(struct cdev *dev, struct uio *uio, int ioflag) +{ + struct adf_processes_priv_data *prv_data = NULL; + struct adf_processes_priv_data *pdata = NULL; + int dev_num = 0, pr_num = 0; + struct list_head *lpos = NULL; + char usr_name[ADF_CFG_MAX_SECTION_LEN_IN_BYTES] = { 0 }; + struct adf_accel_dev *accel_dev = NULL; + struct adf_cfg_section *section_ptr = NULL; + bool pr_name_available = 1; + uint32_t num_accel_devs = 0; + int error = 0; + ssize_t count; + int dev_id; + + error = devfs_get_cdevpriv((void **)&prv_data); + if (error) { + printf("QAT: invalid file descriptor\n"); + return error; + } + + if (prv_data->read_flag == 1) { + printf("QAT: can only write once\n"); + return EBADF; + } + count = uio->uio_resid; + if ((count <= 0) || (count > ADF_CFG_MAX_SECTION_LEN_IN_BYTES)) { + printf("QAT: wrong size %d\n", (int)count); + return EIO; + } + + error = uiomove(usr_name, count, uio); + if (error) { + printf("QAT: can't copy data\n"); + return error; + } + + /* Lock other processes and try to find out the process name */ + if (sx_xlock_sig(&processes_list_sema)) { + printf("QAT: can't aquire process info lock\n"); + return EBADF; + } + + dev_id = adf_get_first_started_dev(); + if (-1 == dev_id) { + pr_err("QAT: could not find started device\n"); + sx_xunlock(&processes_list_sema); + return -EIO; + } + + accel_dev = adf_devmgr_get_dev_by_id(dev_id); + if (!accel_dev) { + pr_err("QAT: could not find started device\n"); + sx_xunlock(&processes_list_sema); + return -EIO; + } + + /* If there is nothing there then take the first name and return */ + if (list_empty(&processes_list)) { + snprintf(prv_data->name, + ADF_CFG_MAX_SECTION_LEN_IN_BYTES, + "%s" ADF_INTERNAL_USERSPACE_SEC_SUFF "%d", + usr_name, + 0); + list_add(&prv_data->list, &processes_list); + sx_xunlock(&processes_list_sema); + prv_data->read_flag = 1; + return 0; + } + + /* If there are processes running then search for a first free name */ + adf_devmgr_get_num_dev(&num_accel_devs); + for (dev_num = 0; dev_num < num_accel_devs; dev_num++) { + accel_dev = adf_devmgr_get_dev_by_id(dev_num); + if (!accel_dev) + continue; + + if (!adf_dev_started(accel_dev)) + continue; /* to next device */ + + for (pr_num = 0; pr_num < GET_MAX_PROCESSES(accel_dev); + pr_num++) { + snprintf(prv_data->name, + ADF_CFG_MAX_SECTION_LEN_IN_BYTES, + "%s" ADF_INTERNAL_USERSPACE_SEC_SUFF "%d", + usr_name, + pr_num); + pr_name_available = 1; + /* Figure out if section exists in the config table */ + section_ptr = + adf_cfg_sec_find(accel_dev, prv_data->name); + if (NULL == section_ptr) { + /* This section name doesn't exist */ + pr_name_available = 0; + /* As process_num enumerates from 0, once we get + * to one which doesn't exist no further ones + * will exist. On to next device + */ + break; + } + /* Figure out if it's been taken already */ + list_for_each(lpos, &processes_list) + { + pdata = + list_entry(lpos, + struct adf_processes_priv_data, + list); + if (!strncmp( + pdata->name, + prv_data->name, + ADF_CFG_MAX_SECTION_LEN_IN_BYTES)) { + pr_name_available = 0; + break; + } + } + if (pr_name_available) + break; + } + if (pr_name_available) + break; + } + /* + * If we have a valid name that is not on + * the list take it and add to the list + */ + if (pr_name_available) { + list_add(&prv_data->list, &processes_list); + sx_xunlock(&processes_list_sema); + prv_data->read_flag = 1; + return 0; + } + /* If not then the process needs to wait */ + sx_xunlock(&processes_list_sema); + explicit_bzero(prv_data->name, ADF_CFG_MAX_SECTION_LEN_IN_BYTES); + prv_data->read_flag = 0; + return 1; +} + +static int +adf_processes_read(struct cdev *dev, struct uio *uio, int ioflag) +{ + struct adf_processes_priv_data *prv_data = NULL; + int error = 0; + + error = devfs_get_cdevpriv((void **)&prv_data); + if (error) { + printf("QAT: invalid file descriptor\n"); + return error; + } + + /* + * If there is a name that the process can use then give it + * to the proocess. + */ + if (prv_data->read_flag) { + error = uiomove(prv_data->name, + strnlen(prv_data->name, + ADF_CFG_MAX_SECTION_LEN_IN_BYTES), + uio); + if (error) { + printf("QAT: failed to copy data to user\n"); + return error; + } + return 0; + } + + return EIO; +} + +static void +adf_processes_release(void *data) +{ + struct adf_processes_priv_data *prv_data = NULL; + + prv_data = (struct adf_processes_priv_data *)data; + sx_xlock(&processes_list_sema); + list_del(&prv_data->list); + sx_xunlock(&processes_list_sema); + free(prv_data, M_QAT); +} + +int +adf_processes_dev_register(void) +{ + return adf_chr_drv_create(); +} + +void +adf_processes_dev_unregister(void) +{ + adf_chr_drv_destroy(); +} + +static void +adf_state_callout_notify_ev(void *arg) +{ + int notified = 0; + struct adf_state_priv_data *priv = NULL; + struct entry_proc_events *proc_events = NULL; + + SLIST_FOREACH (proc_events, &proc_events_head, entries_proc_events) { + if (!STAILQ_EMPTY(&proc_events->proc_events->state_head)) { + notified = 1; + priv = proc_events->proc_events; + wakeup(priv); + selwakeup(&priv->rsel); + KNOTE_UNLOCKED(&priv->rsel.si_note, 0); + } + } + if (notified) + callout_schedule(&callout, ADF_STATE_CALLOUT_TIME); +} + +static void +adf_state_set(int dev, enum adf_event event) +{ + struct adf_accel_dev *accel_dev = NULL; + struct state_head *head = NULL; + struct entry_proc_events *proc_events = NULL; + struct entry_state *state = NULL; + + accel_dev = adf_devmgr_get_dev_by_id(dev); + if (!accel_dev) + return; + mtx_lock(&mtx); + SLIST_FOREACH (proc_events, &proc_events_head, entries_proc_events) { + state = NULL; + head = &proc_events->proc_events->state_head; + state = malloc(sizeof(struct entry_state), + M_QAT, + M_NOWAIT | M_ZERO); + if (!state) + continue; + state->state.dev_state = event; + state->state.dev_id = dev; + STAILQ_INSERT_TAIL(head, state, entries_state); + if (event == ADF_EVENT_STOP) { + state = NULL; + state = malloc(sizeof(struct entry_state), + M_QAT, + M_NOWAIT | M_ZERO); + if (!state) + continue; + state->state.dev_state = ADF_EVENT_SHUTDOWN; + state->state.dev_id = dev; + STAILQ_INSERT_TAIL(head, state, entries_state); + } + } + callout_schedule(&callout, ADF_STATE_CALLOUT_TIME); + mtx_unlock(&mtx); +} + +static int +adf_state_event_handler(struct adf_accel_dev *accel_dev, enum adf_event event) +{ + int ret = 0; + +#if defined(QAT_UIO) && defined(QAT_DBG) + if (event > ADF_EVENT_DBG_SHUTDOWN) + return -EINVAL; +#else + if (event > ADF_EVENT_ERROR) + return -EINVAL; +#endif /* defined(QAT_UIO) && defined(QAT_DBG) */ + + switch (event) { + case ADF_EVENT_INIT: + return ret; + case ADF_EVENT_SHUTDOWN: + return ret; + case ADF_EVENT_RESTARTING: + break; + case ADF_EVENT_RESTARTED: + break; + case ADF_EVENT_START: + return ret; + case ADF_EVENT_STOP: + break; + case ADF_EVENT_ERROR: + break; +#if defined(QAT_UIO) && defined(QAT_DBG) + case ADF_EVENT_PROC_CRASH: + break; + case ADF_EVENT_MANUAL_DUMP: + break; + case ADF_EVENT_SLICE_HANG: + break; + case ADF_EVENT_DBG_SHUTDOWN: + break; +#endif /* defined(QAT_UIO) && defined(QAT_DBG) */ + default: + return -1; + } + + adf_state_set(accel_dev->accel_id, event); + + return 0; +} + +static int +adf_state_kqfilter(struct cdev *dev, struct knote *kn) +{ + struct adf_state_priv_data *priv; + + mtx_lock(&mtx); + priv = dev->si_drv1; + switch (kn->kn_filter) { + case EVFILT_READ: + kn->kn_fop = &adf_state_read_filterops; + kn->kn_hook = priv; + knlist_add(&priv->rsel.si_note, kn, 0); + mtx_unlock(&mtx); + return 0; + default: + mtx_unlock(&mtx); + return -EINVAL; + } +} + +static int +adf_state_kqread_event(struct knote *kn, long hint) +{ + return 1; +} + +static void +adf_state_kqread_detach(struct knote *kn) +{ + struct adf_state_priv_data *priv = NULL; + + mtx_lock(&mtx); + if (!kn) { + mtx_unlock(&mtx); + return; + } + priv = kn->kn_hook; + if (!priv) { + mtx_unlock(&mtx); + return; + } + knlist_remove(&priv->rsel.si_note, kn, 1); + mtx_unlock(&mtx); +} + +void +adf_state_init(void) +{ + adf_state_dev = make_dev(&adf_state_cdevsw, + 0, + UID_ROOT, + GID_WHEEL, + 0600, + "%s", + ADF_DEV_STATE_NAME); + SLIST_INIT(&proc_events_head); + mtx_init(&mtx, mtx_name, NULL, MTX_DEF); + callout_init_mtx(&callout, &mtx, 0); + explicit_bzero(&adf_state_hndl, sizeof(adf_state_hndl)); + adf_state_hndl.event_hld = adf_state_event_handler; + adf_state_hndl.name = "adf_state_event_handler"; + mtx_lock(&mtx); + adf_service_register(&adf_state_hndl); + callout_reset(&callout, + ADF_STATE_CALLOUT_TIME, + adf_state_callout_notify_ev, + NULL); + mtx_unlock(&mtx); +} + +void +adf_state_destroy(void) +{ + struct entry_proc_events *proc_events = NULL; + + mtx_lock(&mtx); + adf_service_unregister(&adf_state_hndl); + callout_stop(&callout); + while (!SLIST_EMPTY(&proc_events_head)) { + proc_events = SLIST_FIRST(&proc_events_head); + SLIST_REMOVE_HEAD(&proc_events_head, entries_proc_events); + free(proc_events, M_QAT); + } + destroy_dev(adf_state_dev); + mtx_unlock(&mtx); + mtx_destroy(&mtx); +} + +static int +adf_state_open(struct cdev *dev, int oflags, int devtype, struct thread *td) +{ + struct adf_state_priv_data *prv_data = NULL; + struct entry_proc_events *entry_proc_events = NULL; + int ret = 0; + + prv_data = malloc(sizeof(*prv_data), M_QAT, M_WAITOK | M_ZERO); + if (!prv_data) + return -ENOMEM; + entry_proc_events = + malloc(sizeof(struct entry_proc_events), M_QAT, M_WAITOK | M_ZERO); + if (!entry_proc_events) { + free(prv_data, M_QAT); + return -ENOMEM; + } + mtx_lock(&mtx); + prv_data->cdev = dev; + prv_data->cdev->si_drv1 = prv_data; + knlist_init_mtx(&prv_data->rsel.si_note, &mtx); + STAILQ_INIT(&prv_data->state_head); + entry_proc_events->proc_events = prv_data; + SLIST_INSERT_HEAD(&proc_events_head, + entry_proc_events, + entries_proc_events); + ret = devfs_set_cdevpriv(prv_data, adf_state_release); + if (ret) { + SLIST_REMOVE(&proc_events_head, + entry_proc_events, + entry_proc_events, + entries_proc_events); + free(entry_proc_events, M_QAT); + free(prv_data, M_QAT); + } + callout_schedule(&callout, ADF_STATE_CALLOUT_TIME); + mtx_unlock(&mtx); + return ret; +} + +static int +adf_state_read(struct cdev *dev, struct uio *uio, int ioflag) +{ + int ret = 0; + struct adf_state_priv_data *prv_data = NULL; + struct state_head *state_head = NULL; + struct entry_state *entry_state = NULL; + struct adf_state *state = NULL; + struct entry_proc_events *proc_events = NULL; + + mtx_lock(&mtx); + ret = devfs_get_cdevpriv((void **)&prv_data); + if (ret) { + mtx_unlock(&mtx); + return 0; + } + state_head = &prv_data->state_head; + if (STAILQ_EMPTY(state_head)) { + mtx_unlock(&mtx); + return 0; + } + entry_state = STAILQ_FIRST(state_head); + state = &entry_state->state; + ret = uiomove(state, sizeof(struct adf_state), uio); + if (!ret && !STAILQ_EMPTY(state_head)) { + STAILQ_REMOVE_HEAD(state_head, entries_state); + free(entry_state, M_QAT); + } + SLIST_FOREACH (proc_events, &proc_events_head, entries_proc_events) { + if (!STAILQ_EMPTY(&proc_events->proc_events->state_head)) { + prv_data = proc_events->proc_events; + wakeup(prv_data); + selwakeup(&prv_data->rsel); + KNOTE_UNLOCKED(&prv_data->rsel.si_note, 0); + } + } + callout_schedule(&callout, ADF_STATE_CALLOUT_TIME); + mtx_unlock(&mtx); + return ret; +} + +static void +adf_state_release(void *data) +{ + struct adf_state_priv_data *prv_data = NULL; + struct entry_state *entry_state = NULL; + struct entry_proc_events *entry_proc_events = NULL; + struct entry_proc_events *tmp = NULL; + + mtx_lock(&mtx); + prv_data = (struct adf_state_priv_data *)data; + knlist_delete(&prv_data->rsel.si_note, curthread, 1); + knlist_destroy(&prv_data->rsel.si_note); + seldrain(&prv_data->rsel); + while (!STAILQ_EMPTY(&prv_data->state_head)) { + entry_state = STAILQ_FIRST(&prv_data->state_head); + STAILQ_REMOVE_HEAD(&prv_data->state_head, entries_state); + free(entry_state, M_QAT); + } + SLIST_FOREACH_SAFE (entry_proc_events, + &proc_events_head, + entries_proc_events, + tmp) { + if (entry_proc_events->proc_events == prv_data) { + SLIST_REMOVE(&proc_events_head, + entry_proc_events, + entry_proc_events, + entries_proc_events); + free(entry_proc_events, M_QAT); + } + } + free(prv_data, M_QAT); + mtx_unlock(&mtx); +} diff --git a/sys/dev/qat/qat_common/adf_freebsd_uio.c b/sys/dev/qat/qat_common/adf_freebsd_uio.c new file mode 100644 index 000000000000..5c74b7e8b9b0 --- /dev/null +++ b/sys/dev/qat/qat_common/adf_freebsd_uio.c @@ -0,0 +1,450 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include "qat_freebsd.h" +#include "adf_cfg.h" +#include "adf_common_drv.h" +#include "adf_accel_devices.h" +#include "icp_qat_uclo.h" +#include "icp_qat_fw.h" +#include "icp_qat_fw_init_admin.h" +#include "adf_cfg_strings.h" +#include "adf_uio_control.h" +#include "adf_uio_cleanup.h" +#include "adf_uio.h" +#include "adf_transport_access_macros.h" +#include "adf_transport_internal.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ADF_UIO_GET_NAME(accel_dev) (GET_HW_DATA(accel_dev)->dev_class->name) +#define ADF_UIO_GET_TYPE(accel_dev) (GET_HW_DATA(accel_dev)->dev_class->type) +#define ADF_UIO_GET_BAR(accel_dev) \ + (GET_HW_DATA(accel_dev)->get_etr_bar_id(GET_HW_DATA(accel_dev))) + +static d_ioctl_t adf_uio_ioctl; +static d_mmap_single_t adf_uio_mmap_single; + +static struct cdevsw adf_uio_cdevsw = { .d_ioctl = adf_uio_ioctl, + .d_mmap_single = adf_uio_mmap_single, + .d_version = D_VERSION, + .d_name = "qat" }; + +struct adf_uio_open_bundle { + struct adf_uio_control_accel *accel; + int bundle; + struct file **mem_files; + int num_mem_files; +}; + +static void +adf_release_bundle(void *arg) +{ + struct adf_uio_control_accel *accel = NULL; + struct adf_uio_open_bundle *handle = NULL; + struct adf_uio_control_bundle *bundle = NULL; + struct adf_uio_instance_rings *instance_rings, *tmp; + int i = 0; + + handle = arg; + accel = handle->accel; + bundle = &accel->bundle[handle->bundle]; + + mutex_lock(&bundle->lock); + adf_uio_do_cleanup_orphan(bundle->hardware_bundle_number, accel); + mutex_unlock(&bundle->lock); + + for (i = 0; i < handle->num_mem_files; i++) { + /* + * Similar to the garbage collection of orphaned file + * descriptor references in UNIX domain socket control + * messages, the current thread isn't relevant to the + * the file descriptor reference being released. In + * particular, the current thread does not hold any + * advisory file locks on these file descriptors. + */ + fdrop(handle->mem_files[i], NULL); + } + free(handle->mem_files, M_QAT); + + mtx_lock(&accel->lock); + + mutex_lock(&bundle->list_lock); + list_for_each_entry_safe(instance_rings, tmp, &bundle->list, list) + { + if (instance_rings->user_pid == curproc->p_pid) { + list_del(&instance_rings->list); + free(instance_rings, M_QAT); + break; + } + } + mutex_unlock(&bundle->list_lock); + + adf_dev_put(accel->accel_dev); + accel->num_handles--; + free(handle, M_QAT); + if (!accel->num_handles) { + cv_broadcast(&accel->cleanup_ok); + /* the broadcasting effect happens after releasing accel->lock + */ + } + mtx_unlock(&accel->lock); +} + +static int +adf_add_mem_fd(struct adf_accel_dev *accel_dev, int mem_fd) +{ + struct adf_uio_control_accel *accel = NULL; + struct adf_uio_open_bundle *handle = NULL; + struct file *fp, **new_files; + cap_rights_t rights; + int error = -1, old_count = 0; + + error = devfs_get_cdevpriv((void **)&handle); + if (error) + return (error); + + error = fget(curthread, mem_fd, cap_rights_init(&rights), &fp); + if (error) { + printf( + "Failed to fetch file pointer from current process %d \n", + __LINE__); + return (error); + } + + accel = accel_dev->accel; + mtx_lock(&accel->lock); + for (;;) { + old_count = handle->num_mem_files; + mtx_unlock(&accel->lock); + new_files = malloc((old_count + 1) * sizeof(*new_files), + M_QAT, + M_WAITOK); + mtx_lock(&accel->lock); + if (old_count == handle->num_mem_files) { + if (old_count != 0) { + memcpy(new_files, + handle->mem_files, + old_count * sizeof(*new_files)); + free(handle->mem_files, M_QAT); + } + handle->mem_files = new_files; + new_files[old_count] = fp; + handle->num_mem_files++; + break; + } else + free(new_files, M_QAT); + } + mtx_unlock(&accel->lock); + return (0); +} + +static vm_object_t +adf_uio_map_bar(struct adf_accel_dev *accel_dev, uint8_t bank_offset) +{ + unsigned int ring_bundle_size, offset; + struct sglist *sg = NULL; + struct adf_uio_control_accel *accel = accel_dev->accel; + struct adf_hw_csr_info *csr_info = &accel_dev->hw_device->csr_info; + vm_object_t obj; + + ring_bundle_size = csr_info->ring_bundle_size; + offset = bank_offset * ring_bundle_size; + + sg = sglist_alloc(1, M_WAITOK); + + /* Starting from new HW there is an additional offset + * for bundle CSRs + */ + sglist_append_phys(sg, + accel->bar->base_addr + offset + + csr_info->csr_addr_offset, + ring_bundle_size); + + obj = vm_pager_allocate( + OBJT_SG, sg, ring_bundle_size, VM_PROT_RW, 0, NULL); + if (obj != NULL) { + VM_OBJECT_WLOCK(obj); + vm_object_set_memattr(obj, VM_MEMATTR_UNCACHEABLE); + VM_OBJECT_WUNLOCK(obj); + } + sglist_free(sg); + + return obj; +} + +static int +adf_alloc_bundle(struct adf_accel_dev *accel_dev, int bundle_nr) +{ + struct adf_uio_control_accel *accel = NULL; + struct adf_uio_open_bundle *handle = NULL; + int error; + + if (bundle_nr < 0 || bundle_nr >= GET_MAX_BANKS(accel_dev)) { + printf("ERROR in %s (%d) %d\n", __func__, bundle_nr, __LINE__); + return EINVAL; + } + + accel = accel_dev->accel; + handle = malloc(sizeof(*handle), M_QAT, M_WAITOK | M_ZERO); + if (!handle) { + printf("ERROR in adf_alloc_bundle %d\n", __LINE__); + return ENOMEM; + } + handle->accel = accel; + handle->bundle = bundle_nr; + + mtx_lock(&accel->lock); + adf_dev_get(accel_dev); + accel->num_handles++; + mtx_unlock(&accel->lock); + + error = devfs_set_cdevpriv(handle, adf_release_bundle); + if (error) { + adf_release_bundle(handle); + device_printf(GET_DEV(accel_dev), + "ERROR in adf_alloc_bundle %d\n", + __LINE__); + return (error); + } + + return (0); +} + +static int +adf_uio_ioctl(struct cdev *dev, + u_long cmd, + caddr_t data, + int fflag, + struct thread *td) +{ + struct adf_accel_dev *accel_dev = dev->si_drv1; + struct adf_hw_csr_info *csr_info = NULL; + + if (!accel_dev) { + printf("%s - accel_dev is NULL\n", __func__); + return EFAULT; + } + + csr_info = &accel_dev->hw_device->csr_info; + + switch (cmd) { + case IOCTL_GET_BUNDLE_SIZE: + *(uint32_t *)data = csr_info->ring_bundle_size; + break; + case IOCTL_ALLOC_BUNDLE: + return (adf_alloc_bundle(accel_dev, *(int *)data)); + case IOCTL_GET_ACCEL_TYPE: + *(uint32_t *)data = ADF_UIO_GET_TYPE(accel_dev); + break; + case IOCTL_ADD_MEM_FD: + return (adf_add_mem_fd(accel_dev, *(int *)data)); + default: + return (ENOTTY); + } + return (0); +} + +static int +adf_uio_mmap_single(struct cdev *dev, + vm_ooffset_t *offset, + vm_size_t size, + struct vm_object **object, + int nprot) +{ + struct adf_uio_open_bundle *handle = NULL; + struct adf_uio_control_accel *accel = NULL; + struct adf_uio_control_bundle *bundle = NULL; + struct adf_uio_instance_rings *instance_rings; + int error; + + error = devfs_get_cdevpriv((void **)&handle); + if (error) + return (error); + + if (!handle->accel) { + printf("QAT: Error - no accel in handle\n"); + return EINVAL; + } + accel = handle->accel; + + if (!accel->accel_dev) { + printf("QAT: Error - no accel_dev in accel\n"); + return EINVAL; + } + + bundle = &accel->bundle[handle->bundle]; + if (!bundle->obj) { + printf("QAT: Error no vm_object in bundle\n"); + return EINVAL; + } + + /* Adding pid to bundle list */ + instance_rings = + malloc(sizeof(*instance_rings), M_QAT, M_WAITOK | M_ZERO); + if (!instance_rings) { + printf("QAT: Memory allocation error - line: %d\n", __LINE__); + return -ENOMEM; + } + instance_rings->user_pid = curproc->p_pid; + instance_rings->ring_mask = 0; + mutex_lock(&bundle->list_lock); + list_add_tail(&instance_rings->list, &bundle->list); + mutex_unlock(&bundle->list_lock); + + vm_object_reference(bundle->obj); + *object = bundle->obj; + return (0); +} + +static inline void +adf_uio_init_accel_ctrl(struct adf_uio_control_accel *accel, + struct adf_accel_dev *accel_dev, + unsigned int nb_bundles) +{ + struct adf_uio_control_bundle *bundle; + struct qat_uio_bundle_dev *priv; + unsigned int i; + + accel->nb_bundles = nb_bundles; + accel->total_used_bundles = 0; + + for (i = 0; i < nb_bundles; i++) { + /*initialize the bundle */ + bundle = &accel->bundle[i]; + priv = &bundle->uio_priv; + bundle->hardware_bundle_number = + GET_MAX_BANKS(accel_dev) - nb_bundles + i; + + INIT_LIST_HEAD(&bundle->list); + priv->bundle = bundle; + priv->accel = accel; + + mutex_init(&bundle->lock); + mutex_init(&bundle->list_lock); + if (!accel->bar) + printf("ERROR: bar not defined in accel\n"); + else + bundle->csr_addr = (void *)accel->bar->virt_addr; + } +} + +/** + * Initialization bars on dev start. + */ +static inline void +adf_uio_init_bundle_dev(struct adf_uio_control_accel *accel, + struct adf_accel_dev *accel_dev, + unsigned int nb_bundles) +{ + struct adf_uio_control_bundle *bundle; + unsigned int i; + + for (i = 0; i < nb_bundles; i++) { + bundle = &accel->bundle[i]; + bundle->obj = + adf_uio_map_bar(accel_dev, bundle->hardware_bundle_number); + if (!bundle->obj) { + device_printf(GET_DEV(accel_dev), + "ERROR in adf_alloc_bundle %d\n", + __LINE__); + } + } +} + +int +adf_uio_register(struct adf_accel_dev *accel_dev) +{ + struct adf_uio_control_accel *accel = NULL; + char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; + int nb_bundles; + + if (!accel_dev) { + printf("%s - accel_dev is NULL\n", __func__); + return EFAULT; + } + + if (adf_cfg_get_param_value( + accel_dev, ADF_GENERAL_SEC, ADF_FIRST_USER_BUNDLE, val)) { + nb_bundles = 0; + } else { + nb_bundles = GET_MAX_BANKS(accel_dev); + } + + if (nb_bundles) { + accel = malloc(sizeof(*accel) + + nb_bundles * + sizeof(struct adf_uio_control_bundle), + M_QAT, + M_WAITOK | M_ZERO); + mtx_init(&accel->lock, "qat uio", NULL, MTX_DEF); + accel->accel_dev = accel_dev; + accel->bar = accel_dev->accel_pci_dev.pci_bars + + ADF_UIO_GET_BAR(accel_dev); + + adf_uio_init_accel_ctrl(accel, accel_dev, nb_bundles); + accel->cdev = make_dev(&adf_uio_cdevsw, + 0, + UID_ROOT, + GID_WHEEL, + 0600, + "%s", + device_get_nameunit(GET_DEV(accel_dev))); + if (accel->cdev == NULL) { + mtx_destroy(&accel->lock); + goto fail_clean; + } + accel->cdev->si_drv1 = accel_dev; + accel_dev->accel = accel; + cv_init(&accel->cleanup_ok, "uio_accel_cv"); + + adf_uio_init_bundle_dev(accel, accel_dev, nb_bundles); + } + return 0; +fail_clean: + free(accel, M_QAT); + device_printf(GET_DEV(accel_dev), "Failed to register UIO devices\n"); + return ENODEV; +} + +void +adf_uio_remove(struct adf_accel_dev *accel_dev) +{ + struct adf_uio_control_accel *accel = accel_dev->accel; + struct adf_uio_control_bundle *bundle; + unsigned int i; + + if (accel) { + /* Un-mapping all bars */ + for (i = 0; i < accel->nb_bundles; i++) { + bundle = &accel->bundle[i]; + vm_object_deallocate(bundle->obj); + } + + destroy_dev(accel->cdev); + mtx_lock(&accel->lock); + while (accel->num_handles) { + cv_timedwait_sig(&accel->cleanup_ok, + &accel->lock, + 3 * hz); + } + mtx_unlock(&accel->lock); + mtx_destroy(&accel->lock); + cv_destroy(&accel->cleanup_ok); + free(accel, M_QAT); + accel_dev->accel = NULL; + } +} diff --git a/sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c b/sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c new file mode 100644 index 000000000000..d299fde6cc0d --- /dev/null +++ b/sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c @@ -0,0 +1,404 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include "qat_freebsd.h" +#include "adf_cfg.h" +#include "adf_common_drv.h" +#include "adf_accel_devices.h" +#include "icp_qat_uclo.h" +#include "icp_qat_fw.h" +#include "icp_qat_fw_init_admin.h" +#include "adf_cfg_strings.h" +#include "adf_uio_control.h" +#include "adf_uio_cleanup.h" +#include "adf_uio.h" +#include "adf_transport_access_macros.h" +#include "adf_transport_internal.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TX_RINGS_DISABLE 0 +#define TX_RINGS_ENABLE 1 +#define PKE_REQ_SIZE 64 +#define BASE_ADDR_SHIFT 6 +#define PKE_RX_RING_0 0 +#define PKE_RX_RING_1 1 + +#define ADF_RING_EMPTY_RETRY_DELAY 2 +#define ADF_RING_EMPTY_MAX_RETRY 15 + +struct bundle_orphan_ring { + unsigned long tx_mask; + unsigned long rx_mask; + unsigned long asym_mask; + int bank; + struct resource *csr_base; + struct adf_uio_control_bundle *bundle; +}; + +/* + * if orphan->tx_mask does not match with orphan->rx_mask + */ +static void +check_orphan_ring(struct adf_accel_dev *accel_dev, + struct bundle_orphan_ring *orphan, + struct adf_hw_device_data *hw_data) +{ + struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); + int i; + int tx_rx_gap = hw_data->tx_rx_gap; + u8 num_rings_per_bank = hw_data->num_rings_per_bank; + struct resource *csr_base = orphan->csr_base; + int bank = orphan->bank; + + for (i = 0; i < num_rings_per_bank; i++) { + if (test_bit(i, &orphan->tx_mask)) { + int rx_ring = i + tx_rx_gap; + + if (!test_bit(rx_ring, &orphan->rx_mask)) { + __clear_bit(i, &orphan->tx_mask); + + /* clean up this tx ring */ + csr_ops->write_csr_ring_config(csr_base, + bank, + i, + 0); + csr_ops->write_csr_ring_base(csr_base, + bank, + i, + 0); + } + + } else if (test_bit(i, &orphan->rx_mask)) { + int tx_ring = i - tx_rx_gap; + + if (!test_bit(tx_ring, &orphan->tx_mask)) { + __clear_bit(i, &orphan->rx_mask); + + /* clean up this rx ring */ + csr_ops->write_csr_ring_config(csr_base, + bank, + i, + 0); + csr_ops->write_csr_ring_base(csr_base, + bank, + i, + 0); + } + } + } +} + +static int +get_orphan_bundle(int bank, + struct adf_uio_control_accel *accel, + struct bundle_orphan_ring **orphan_bundle_out) +{ + int i; + int ret = 0; + struct resource *csr_base; + unsigned long tx_mask; + unsigned long asym_mask; + struct adf_accel_dev *accel_dev = accel->accel_dev; + struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u8 num_rings_per_bank = hw_data->num_rings_per_bank; + struct bundle_orphan_ring *orphan_bundle = NULL; + uint64_t base; + struct list_head *entry; + struct adf_uio_instance_rings *instance_rings; + struct adf_uio_control_bundle *bundle; + u16 ring_mask = 0; + + orphan_bundle = + malloc(sizeof(*orphan_bundle), M_QAT, M_WAITOK | M_ZERO); + if (!orphan_bundle) + return ENOMEM; + + csr_base = accel->bar->virt_addr; + orphan_bundle->csr_base = csr_base; + orphan_bundle->bank = bank; + + orphan_bundle->tx_mask = 0; + orphan_bundle->rx_mask = 0; + tx_mask = accel_dev->hw_device->tx_rings_mask; + asym_mask = accel_dev->hw_device->asym_rings_mask; + + /* Get ring mask for this process. */ + bundle = &accel->bundle[bank]; + orphan_bundle->bundle = bundle; + mutex_lock(&bundle->list_lock); + list_for_each(entry, &bundle->list) + { + instance_rings = + list_entry(entry, struct adf_uio_instance_rings, list); + if (instance_rings->user_pid == curproc->p_pid) { + ring_mask = instance_rings->ring_mask; + break; + } + } + mutex_unlock(&bundle->list_lock); + + for (i = 0; i < num_rings_per_bank; i++) { + base = csr_ops->read_csr_ring_base(csr_base, bank, i); + + if (!base) + continue; + if (!(ring_mask & 1 << i)) + continue; /* Not reserved for this process. */ + + if (test_bit(i, &tx_mask)) + __set_bit(i, &orphan_bundle->tx_mask); + else + __set_bit(i, &orphan_bundle->rx_mask); + + if (test_bit(i, &asym_mask)) + __set_bit(i, &orphan_bundle->asym_mask); + } + + if (orphan_bundle->tx_mask || orphan_bundle->rx_mask) + check_orphan_ring(accel_dev, orphan_bundle, hw_data); + + *orphan_bundle_out = orphan_bundle; + return ret; +} + +static void +put_orphan_bundle(struct bundle_orphan_ring *bundle) +{ + if (!bundle) + return; + + free(bundle, M_QAT); +} + +/* cleanup all ring */ +static void +cleanup_all_ring(struct adf_uio_control_accel *accel, + struct bundle_orphan_ring *orphan) +{ + int i; + struct resource *csr_base = orphan->csr_base; + unsigned long mask = orphan->rx_mask | orphan->tx_mask; + struct adf_accel_dev *accel_dev = accel->accel_dev; + struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u8 num_rings_per_bank = hw_data->num_rings_per_bank; + int bank = orphan->bank; + + mutex_lock(&orphan->bundle->lock); + orphan->bundle->rings_enabled &= ~mask; + adf_update_uio_ring_arb(orphan->bundle); + mutex_unlock(&orphan->bundle->lock); + + for (i = 0; i < num_rings_per_bank; i++) { + if (!test_bit(i, &mask)) + continue; + + csr_ops->write_csr_ring_config(csr_base, bank, i, 0); + csr_ops->write_csr_ring_base(csr_base, bank, i, 0); + } +} + +/* + * Return true, if number of messages in tx ring is equal to number + * of messages in corresponding rx ring, else false. + */ +static bool +is_all_resp_recvd(struct adf_hw_csr_ops *csr_ops, + struct bundle_orphan_ring *bundle, + const u8 num_rings_per_bank) +{ + u32 rx_tail = 0, tx_head = 0, rx_ring_msg_offset = 0, + tx_ring_msg_offset = 0, tx_rx_offset = num_rings_per_bank / 2, + idx = 0, retry = 0, delay = ADF_RING_EMPTY_RETRY_DELAY; + + do { + for_each_set_bit(idx, &bundle->tx_mask, tx_rx_offset) + { + rx_tail = + csr_ops->read_csr_ring_tail(bundle->csr_base, + 0, + (idx + tx_rx_offset)); + tx_head = csr_ops->read_csr_ring_head(bundle->csr_base, + 0, + idx); + + /* + * Normalize messages in tx rings to match rx ring + * message size, i.e., size of response message(32). + * Asym messages are 64 bytes each, so right shift + * by 1 to normalize to 32. Sym and compression + * messages are 128 bytes each, so right shift by 2 + * to normalize to 32. + */ + if (bundle->asym_mask & (1 << idx)) + tx_ring_msg_offset = (tx_head >> 1); + else + tx_ring_msg_offset = (tx_head >> 2); + + rx_ring_msg_offset = rx_tail; + + if (tx_ring_msg_offset != rx_ring_msg_offset) + break; + } + if (idx == tx_rx_offset) + /* All Tx and Rx ring message counts match */ + return true; + + DELAY(delay); + delay *= 2; + } while (++retry < ADF_RING_EMPTY_MAX_RETRY); + + return false; +} + +static int +bundle_need_cleanup(int bank, struct adf_uio_control_accel *accel) +{ + struct resource *csr_base = accel->bar->virt_addr; + struct adf_accel_dev *accel_dev = accel->accel_dev; + struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u8 num_rings_per_bank = hw_data->num_rings_per_bank; + int i; + + if (!csr_base) + return 0; + + for (i = 0; i < num_rings_per_bank; i++) { + if (csr_ops->read_csr_ring_base(csr_base, bank, i)) + return 1; + } + + return 0; +} + +static void +cleanup_orphan_ring(struct bundle_orphan_ring *orphan, + struct adf_uio_control_accel *accel) +{ + struct adf_accel_dev *accel_dev = accel->accel_dev; + struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u8 number_rings_per_bank = hw_data->num_rings_per_bank; + + /* disable the interrupt */ + csr_ops->write_csr_int_col_en(orphan->csr_base, orphan->bank, 0); + + /* + * wait firmware finish the in-process ring + * 1. disable all tx rings + * 2. check if all responses are received + * 3. reset all rings + */ + adf_disable_ring_arb(accel_dev, orphan->csr_base, 0, orphan->tx_mask); + + if (!is_all_resp_recvd(csr_ops, orphan, number_rings_per_bank)) { + device_printf(GET_DEV(accel_dev), + "Failed to clean up orphan rings"); + return; + } + + /* + * When the execution reaches here, it is assumed that + * there is no inflight request in the rings and that + * there is no in-process ring. + */ + + cleanup_all_ring(accel, orphan); +} + +void +adf_uio_do_cleanup_orphan(int bank, struct adf_uio_control_accel *accel) +{ + int ret, pid_found; + struct adf_uio_instance_rings *instance_rings, *tmp; + struct adf_uio_control_bundle *bundle; + /* orphan is local pointer allocated and deallocated in this function */ + struct bundle_orphan_ring *orphan = NULL; + struct adf_accel_dev *accel_dev = accel->accel_dev; + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + + if (!bundle_need_cleanup(bank, accel)) + goto release; + + ret = get_orphan_bundle(bank, accel, &orphan); + if (ret != 0) + return; + + /* + * If driver supports ring pair reset, no matter process + * exits normally or abnormally, just do ring pair reset. + * ring pair reset will reset all ring pair registers to + * default value. Driver only needs to reset ring mask + */ + if (hw_data->ring_pair_reset) { + hw_data->ring_pair_reset( + accel_dev, orphan->bundle->hardware_bundle_number); + mutex_lock(&orphan->bundle->lock); + /* + * If processes exit normally, rx_mask, tx_mask + * and rings_enabled are all 0, below expression + * have no impact on rings_enabled. + * If processes exit abnormally, rings_enabled + * will be set as 0 by below expression. + */ + orphan->bundle->rings_enabled &= + ~(orphan->rx_mask | orphan->tx_mask); + mutex_unlock(&orphan->bundle->lock); + goto out; + } + + if (!orphan->tx_mask && !orphan->rx_mask) + goto out; + + device_printf(GET_DEV(accel_dev), + "Process %d %s exit with orphan rings %lx:%lx\n", + curproc->p_pid, + curproc->p_comm, + orphan->tx_mask, + orphan->rx_mask); + + if (!test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) { + cleanup_orphan_ring(orphan, accel); + } +out: + put_orphan_bundle(orphan); + +release: + + bundle = &accel->bundle[bank]; + /* + * If the user process died without releasing the rings + * then force a release here. + */ + mutex_lock(&bundle->list_lock); + pid_found = 0; + list_for_each_entry_safe(instance_rings, tmp, &bundle->list, list) + { + if (instance_rings->user_pid == curproc->p_pid) { + pid_found = 1; + break; + } + } + mutex_unlock(&bundle->list_lock); + + if (pid_found) { + mutex_lock(&bundle->lock); + bundle->rings_used &= ~instance_rings->ring_mask; + mutex_unlock(&bundle->lock); + } +} diff --git a/sys/dev/qat/qat_common/adf_gen2_hw_data.c b/sys/dev/qat/qat_common/adf_gen2_hw_data.c index d3babf8800ba..c440102e32a2 100644 --- a/sys/dev/qat/qat_common/adf_gen2_hw_data.c +++ b/sys/dev/qat/qat_common/adf_gen2_hw_data.c @@ -1,132 +1,148 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2021 Intel Corporation */ /* $FreeBSD$ */ #include "adf_gen2_hw_data.h" #include "icp_qat_hw.h" static u64 build_csr_ring_base_addr(bus_addr_t addr, u32 size) { return BUILD_RING_BASE_ADDR(addr, size); } static u32 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) { return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); } static void write_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); } static u32 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) { return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); } static void write_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); } static u32 read_csr_e_stat(struct resource *csr_base_addr, u32 bank) { return READ_CSR_E_STAT(csr_base_addr, bank); } static void write_csr_ring_config(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value); } +static dma_addr_t +read_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring) +{ + return READ_CSR_RING_BASE(csr_base_addr, bank, ring); +} + static void write_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring, bus_addr_t addr) { WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr); } static void write_csr_int_flag(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_FLAG(csr_base_addr, bank, value); } static void write_csr_int_srcsel(struct resource *csr_base_addr, u32 bank) { WRITE_CSR_INT_SRCSEL(csr_base_addr, bank); } static void write_csr_int_col_en(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value); } static void write_csr_int_col_ctl(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value); } static void write_csr_int_flag_and_col(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value); } static u32 read_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank) { return READ_CSR_RING_SRV_ARB_EN(csr_base_addr, bank); } static void write_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value); } +static u32 +get_int_col_ctl_enable_mask(void) +{ + return ADF_RING_CSR_INT_COL_CTL_ENABLE; +} + void adf_gen2_init_hw_csr_info(struct adf_hw_csr_info *csr_info) { struct adf_hw_csr_ops *csr_ops = &csr_info->csr_ops; csr_info->arb_enable_mask = 0xFF; + csr_info->csr_addr_offset = ADF_RING_CSR_ADDR_OFFSET; + csr_info->ring_bundle_size = ADF_RING_BUNDLE_SIZE; + csr_ops->build_csr_ring_base_addr = build_csr_ring_base_addr; csr_ops->read_csr_ring_head = read_csr_ring_head; csr_ops->write_csr_ring_head = write_csr_ring_head; csr_ops->read_csr_ring_tail = read_csr_ring_tail; csr_ops->write_csr_ring_tail = write_csr_ring_tail; csr_ops->read_csr_e_stat = read_csr_e_stat; csr_ops->write_csr_ring_config = write_csr_ring_config; + csr_ops->read_csr_ring_base = read_csr_ring_base; csr_ops->write_csr_ring_base = write_csr_ring_base; csr_ops->write_csr_int_flag = write_csr_int_flag; csr_ops->write_csr_int_srcsel = write_csr_int_srcsel; csr_ops->write_csr_int_col_en = write_csr_int_col_en; csr_ops->write_csr_int_col_ctl = write_csr_int_col_ctl; csr_ops->write_csr_int_flag_and_col = write_csr_int_flag_and_col; csr_ops->read_csr_ring_srv_arb_en = read_csr_ring_srv_arb_en; csr_ops->write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en; + csr_ops->get_int_col_ctl_enable_mask = get_int_col_ctl_enable_mask; } -EXPORT_SYMBOL_GPL(adf_gen2_init_hw_csr_info); diff --git a/sys/dev/qat/qat_common/adf_gen4_hw_data.c b/sys/dev/qat/qat_common/adf_gen4_hw_data.c index aae54898afb1..9a2668412819 100644 --- a/sys/dev/qat/qat_common/adf_gen4_hw_data.c +++ b/sys/dev/qat/qat_common/adf_gen4_hw_data.c @@ -1,176 +1,257 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2021 Intel Corporation */ /* $FreeBSD$ */ #include "adf_accel_devices.h" +#include "adf_common_drv.h" #include "adf_gen4_hw_data.h" +#define ADF_RPRESET_TIMEOUT_MS 5000 +#define ADF_RPRESET_POLLING_INTERVAL 20 + static u64 build_csr_ring_base_addr(bus_addr_t addr, u32 size) { return BUILD_RING_BASE_ADDR(addr, size); } static u32 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) { return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); } static void write_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); } static u32 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) { return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); } static void write_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); } static u32 read_csr_e_stat(struct resource *csr_base_addr, u32 bank) { return READ_CSR_E_STAT(csr_base_addr, bank); } static void write_csr_ring_config(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value); } +static bus_addr_t +read_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring) +{ + return READ_CSR_RING_BASE(csr_base_addr, bank, ring); +} + static void write_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring, bus_addr_t addr) { WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr); } static void write_csr_int_flag(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_FLAG(csr_base_addr, bank, value); } static void write_csr_int_srcsel(struct resource *csr_base_addr, u32 bank) { WRITE_CSR_INT_SRCSEL(csr_base_addr, bank); } static void write_csr_int_col_en(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value); } static void write_csr_int_col_ctl(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value); } static void write_csr_int_flag_and_col(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value); } static u32 read_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank) { return READ_CSR_RING_SRV_ARB_EN(csr_base_addr, bank); } static void write_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank, u32 value) { WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value); } +static u32 +get_int_col_ctl_enable_mask(void) +{ + return ADF_RING_CSR_INT_COL_CTL_ENABLE; +} + void adf_gen4_init_hw_csr_info(struct adf_hw_csr_info *csr_info) { struct adf_hw_csr_ops *csr_ops = &csr_info->csr_ops; csr_info->arb_enable_mask = 0x1; + csr_info->csr_addr_offset = ADF_RING_CSR_ADDR_OFFSET; + csr_info->ring_bundle_size = ADF_RING_BUNDLE_SIZE; + csr_ops->build_csr_ring_base_addr = build_csr_ring_base_addr; csr_ops->read_csr_ring_head = read_csr_ring_head; csr_ops->write_csr_ring_head = write_csr_ring_head; csr_ops->read_csr_ring_tail = read_csr_ring_tail; csr_ops->write_csr_ring_tail = write_csr_ring_tail; csr_ops->read_csr_e_stat = read_csr_e_stat; csr_ops->write_csr_ring_config = write_csr_ring_config; + csr_ops->read_csr_ring_base = read_csr_ring_base; csr_ops->write_csr_ring_base = write_csr_ring_base; csr_ops->write_csr_int_flag = write_csr_int_flag; csr_ops->write_csr_int_srcsel = write_csr_int_srcsel; csr_ops->write_csr_int_col_en = write_csr_int_col_en; csr_ops->write_csr_int_col_ctl = write_csr_int_col_ctl; csr_ops->write_csr_int_flag_and_col = write_csr_int_flag_and_col; csr_ops->read_csr_ring_srv_arb_en = read_csr_ring_srv_arb_en; csr_ops->write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en; + csr_ops->get_int_col_ctl_enable_mask = get_int_col_ctl_enable_mask; +} + +static int +reset_ring_pair(struct resource *csr, u32 bank_number) +{ + int reset_timeout = ADF_RPRESET_TIMEOUT_MS; + const int timeout_step = ADF_RPRESET_POLLING_INTERVAL; + u32 val; + + /* Write rpresetctl register bit#0 as 1 + * As rpresetctl registers have no RW bits, no need to preserve + * values for other bits, just write bit#0 + * NOTE: bit#12-bit#31 are WO, the write operation only takes + * effect when bit#1 is written 1 for pasid level reset + */ + ADF_CSR_WR(csr, + ADF_WQM_CSR_RPRESETCTL(bank_number), + BIT(ADF_WQM_CSR_RPRESETCTL_SHIFT)); + + /* Read rpresetsts register to wait for rp reset complete */ + while (reset_timeout > 0) { + val = ADF_CSR_RD(csr, ADF_WQM_CSR_RPRESETSTS(bank_number)); + if (val & ADF_WQM_CSR_RPRESETSTS_MASK) + break; + pause_ms("adfstop", timeout_step); + reset_timeout -= timeout_step; + } + if (reset_timeout <= 0) + return EFAULT; + + /* When rp reset is done, clear rpresetsts bit0 */ + ADF_CSR_WR(csr, + ADF_WQM_CSR_RPRESETSTS(bank_number), + BIT(ADF_WQM_CSR_RPRESETSTS_SHIFT)); + return 0; +} + +int +adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number) +{ + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u32 etr_bar_id = hw_data->get_etr_bar_id(hw_data); + struct resource *csr; + int ret; + + if (bank_number >= hw_data->num_banks) + return -EINVAL; + + csr = (&GET_BARS(accel_dev)[etr_bar_id])->virt_addr; + + ret = reset_ring_pair(csr, bank_number); + if (ret) + device_printf(GET_DEV(accel_dev), + "ring pair reset failure (timeout)\n"); + + return ret; } -EXPORT_SYMBOL_GPL(adf_gen4_init_hw_csr_info); static inline void adf_gen4_unpack_ssm_wdtimer(u64 value, u32 *upper, u32 *lower) { *lower = lower_32_bits(value); *upper = upper_32_bits(value); } int adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; u64 timer_val_pke = ADF_SSM_WDT_PKE_DEFAULT_VALUE; u64 timer_val = ADF_SSM_WDT_DEFAULT_VALUE; u32 ssm_wdt_pke_high = 0; u32 ssm_wdt_pke_low = 0; u32 ssm_wdt_high = 0; u32 ssm_wdt_low = 0; struct resource *pmisc_addr; struct adf_bar *pmisc; int pmisc_id; pmisc_id = hw_data->get_misc_bar_id(hw_data); pmisc = &GET_BARS(accel_dev)[pmisc_id]; pmisc_addr = pmisc->virt_addr; /* Convert 64bit WDT timer value into 32bit values for * mmio write to 32bit CSRs. */ adf_gen4_unpack_ssm_wdtimer(timer_val, &ssm_wdt_high, &ssm_wdt_low); adf_gen4_unpack_ssm_wdtimer(timer_val_pke, &ssm_wdt_pke_high, &ssm_wdt_pke_low); /* Enable WDT for sym and dc */ ADF_CSR_WR(pmisc_addr, ADF_SSMWDTL_OFFSET, ssm_wdt_low); ADF_CSR_WR(pmisc_addr, ADF_SSMWDTH_OFFSET, ssm_wdt_high); /* Enable WDT for pke */ ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEL_OFFSET, ssm_wdt_pke_low); ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEH_OFFSET, ssm_wdt_pke_high); return 0; } -EXPORT_SYMBOL_GPL(adf_gen4_set_ssm_wdtimer); + +int +adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev) +{ + return 0; +} diff --git a/sys/dev/qat/qat_common/adf_gen4_pfvf.c b/sys/dev/qat/qat_common/adf_gen4_pfvf.c new file mode 100644 index 000000000000..0cbf19dc07a8 --- /dev/null +++ b/sys/dev/qat/qat_common/adf_gen4_pfvf.c @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include +#include +#include +#include "adf_accel_devices.h" +#include "adf_common_drv.h" +#include "adf_gen4_pfvf.h" +#include "adf_pfvf_utils.h" +#include "adf_pfvf_vf_proto.h" + +#define ADF_4XXX_PF2VM_OFFSET(i) (0x40B010 + ((i)*0x20)) +#define ADF_4XXX_VM2PF_OFFSET(i) (0x40B014 + ((i)*0x20)) + +/* VF2PF interrupt source registers */ +#define ADF_4XXX_VM2PF_SOU 0x41A180 +#define ADF_4XXX_VM2PF_MSK 0x41A1C0 +#define ADF_GEN4_VF_MSK 0xFFFF + +#define ADF_PFVF_GEN4_MSGTYPE_SHIFT 2 +#define ADF_PFVF_GEN4_MSGTYPE_MASK 0x3F +#define ADF_PFVF_GEN4_MSGDATA_SHIFT 8 +#define ADF_PFVF_GEN4_MSGDATA_MASK 0xFFFFFF + +#define ADF_4XXXIOV_PF2VM_OFFSET 0x100C +#define ADF_4XXXIOV_VM2PF_OFFSET 0x1008 +static const struct pfvf_csr_format csr_gen4_fmt = { + { ADF_PFVF_GEN4_MSGTYPE_SHIFT, ADF_PFVF_GEN4_MSGTYPE_MASK }, + { ADF_PFVF_GEN4_MSGDATA_SHIFT, ADF_PFVF_GEN4_MSGDATA_MASK }, +}; + +static u32 +adf_gen4_vf_get_pfvf_offset(u32 i) +{ + return ADF_4XXXIOV_PF2VM_OFFSET; +} + +static u32 +adf_gen4_vf_get_vfpf_offset(u32 i) +{ + return ADF_4XXXIOV_VM2PF_OFFSET; +} + +static int +adf_gen4_pfvf_send(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + u32 pfvf_offset, + struct mutex *csr_lock) +{ + struct resource *pmisc_addr = adf_get_pmisc_base(accel_dev); + u32 csr_val; + int ret; + csr_val = adf_pfvf_csr_msg_of(accel_dev, msg, &csr_gen4_fmt); + if (unlikely(!csr_val)) + return -EINVAL; + + mutex_lock(csr_lock); + + ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val | ADF_PFVF_INT); + + /* Wait for confirmation from remote that it received the message */ + ret = read_poll_timeout(ADF_CSR_RD, + csr_val, + !(csr_val & ADF_PFVF_INT), + ADF_PFVF_MSG_ACK_DELAY_US, + ADF_PFVF_MSG_ACK_MAX_DELAY_US, + true, + pmisc_addr, + pfvf_offset); + if (ret < 0) + device_printf(GET_DEV(accel_dev), + "ACK not received from remote\n"); + + mutex_unlock(csr_lock); + return ret; +} + +static int +adf_gen4_vf2pf_send(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + u32 pfvf_offset, + struct mutex *csr_lock) +{ + return adf_gen4_pfvf_send(accel_dev, msg, pfvf_offset, csr_lock); +} + +static struct pfvf_message +adf_gen4_pfvf_recv(struct adf_accel_dev *accel_dev, + u32 pfvf_offset, + u8 compat_ver) +{ + struct resource *pmisc_addr = adf_get_pmisc_base(accel_dev); + struct pfvf_message msg = { 0 }; + u32 csr_val; + + /* Read message from the CSR */ + csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset); + if (!(csr_val & ADF_PFVF_INT)) { + device_printf(GET_DEV(accel_dev), + "Spurious PFVF interrupt, msg 0x%.8x. Ignored\n", + csr_val); + return msg; + } + + /* We can now acknowledge the message reception by clearing the + * interrupt bit + */ + ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val & ~ADF_PFVF_INT); + + /* Return the pfvf_message format */ + return adf_pfvf_message_of(accel_dev, csr_val, &csr_gen4_fmt); +} + +static struct pfvf_message +adf_gen4_pf2vf_recv(struct adf_accel_dev *accel_dev, + u32 pfvf_offset, + u8 compat_ver) +{ + return adf_gen4_pfvf_recv(accel_dev, pfvf_offset, compat_ver); +} + +void +adf_gen4_init_vf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) +{ + pfvf_ops->enable_comms = adf_enable_vf2pf_comms; + pfvf_ops->get_pf2vf_offset = adf_gen4_vf_get_pfvf_offset; + pfvf_ops->get_vf2pf_offset = adf_gen4_vf_get_vfpf_offset; + pfvf_ops->send_msg = adf_gen4_vf2pf_send; + pfvf_ops->recv_msg = adf_gen4_pf2vf_recv; +} diff --git a/sys/dev/qat/qat_common/adf_gen4_timer.c b/sys/dev/qat/qat_common/adf_gen4_timer.c new file mode 100644 index 000000000000..cb929586dab8 --- /dev/null +++ b/sys/dev/qat/qat_common/adf_gen4_timer.c @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include "adf_accel_devices.h" +#include "adf_heartbeat.h" +#include "adf_common_drv.h" +#include "icp_qat_fw_init_admin.h" +#include "adf_gen4_timer.h" + +#include "adf_dev_err.h" + +#define ADF_GEN4_INT_TIMER_VALUE_IN_MS 200 +/* Interval within timer interrupt. Value in miliseconds. */ + +#define ADF_GEN4_MAX_INT_TIMER_VALUE_IN_MS 0xFFFFFFFF +/* MAX Interval within timer interrupt. Value in miliseconds. */ + +static u64 +adf_get_next_timeout(u32 timeout_val) +{ + u64 timeout = msecs_to_jiffies(timeout_val); + + return rounddown(jiffies + timeout, timeout); +} + +static void +adf_hb_irq_bh_handler(struct work_struct *work) +{ + struct icp_qat_fw_init_admin_req req = { 0 }; + struct icp_qat_fw_init_admin_resp resp = { 0 }; + struct adf_hb_timer_data *hb_timer_data = + container_of(work, struct adf_hb_timer_data, hb_int_timer_work); + struct adf_accel_dev *accel_dev = hb_timer_data->accel_dev; + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u32 ae_mask = hw_data->ae_mask; + + if (!accel_dev->int_timer || !accel_dev->int_timer->enabled) + goto end; + + /* Update heartbeat count via init/admin cmd */ + if (!accel_dev->admin) { + device_printf(GET_DEV(accel_dev), + "adf_admin is not available\n"); + goto end; + } + + req.cmd_id = ICP_QAT_FW_HEARTBEAT_SYNC; + req.heartbeat_ticks = accel_dev->int_timer->int_cnt; + + if (adf_send_admin(accel_dev, &req, &resp, ae_mask)) + device_printf(GET_DEV(accel_dev), + "Failed to update qat's HB count\n"); + +end: + kfree(hb_timer_data); +} + +static void +timer_handler(struct timer_list *tl) +{ + struct adf_int_timer *int_timer = from_timer(int_timer, tl, timer); + struct adf_accel_dev *accel_dev = int_timer->accel_dev; + struct adf_hb_timer_data *hb_timer_data = NULL; + u64 timeout_val = adf_get_next_timeout(int_timer->timeout_val); + /* Update TL TBD */ + + /* Schedule a heartbeat work queue to update HB */ + hb_timer_data = kzalloc(sizeof(*hb_timer_data), GFP_ATOMIC); + if (hb_timer_data) { + hb_timer_data->accel_dev = accel_dev; + + INIT_WORK(&hb_timer_data->hb_int_timer_work, + adf_hb_irq_bh_handler); + queue_work(int_timer->timer_irq_wq, + &hb_timer_data->hb_int_timer_work); + } else { + device_printf(GET_DEV(accel_dev), + "Failed to alloc heartbeat timer data\n"); + } + int_timer->int_cnt++; + mod_timer(tl, timeout_val); +} + +int +adf_int_timer_init(struct adf_accel_dev *accel_dev) +{ + u64 timeout_val = adf_get_next_timeout(ADF_GEN4_INT_TIMER_VALUE_IN_MS); + struct adf_int_timer *int_timer = NULL; + char wqname[32] = { 0 }; + + if (!accel_dev) + return 0; + + int_timer = kzalloc(sizeof(*int_timer), GFP_KERNEL); + if (!int_timer) + return -ENOMEM; + + sprintf(wqname, "qat_timer_wq_%d", accel_dev->accel_id); + + int_timer->timer_irq_wq = alloc_workqueue(wqname, WQ_MEM_RECLAIM, 1); + + if (!int_timer->timer_irq_wq) { + kfree(int_timer); + return -ENOMEM; + } + + int_timer->accel_dev = accel_dev; + int_timer->timeout_val = ADF_GEN4_INT_TIMER_VALUE_IN_MS; + int_timer->int_cnt = 0; + int_timer->enabled = true; + accel_dev->int_timer = int_timer; + + timer_setup(&int_timer->timer, timer_handler, 0); + mod_timer(&int_timer->timer, timeout_val); + + return 0; +} + +void +adf_int_timer_exit(struct adf_accel_dev *accel_dev) +{ + if (accel_dev && accel_dev->int_timer) { + del_timer_sync(&accel_dev->int_timer->timer); + accel_dev->int_timer->enabled = false; + + if (accel_dev->int_timer->timer_irq_wq) { + flush_workqueue(accel_dev->int_timer->timer_irq_wq); + destroy_workqueue(accel_dev->int_timer->timer_irq_wq); + } + + kfree(accel_dev->int_timer); + accel_dev->int_timer = NULL; + } +} diff --git a/sys/dev/qat/qat_common/adf_gen2_hw_data.c b/sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c similarity index 52% copy from sys/dev/qat/qat_common/adf_gen2_hw_data.c copy to sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c index d3babf8800ba..78a6fea7a827 100644 --- a/sys/dev/qat/qat_common/adf_gen2_hw_data.c +++ b/sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c @@ -1,132 +1,162 @@ -/* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2021 Intel Corporation */ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ -#include "adf_gen2_hw_data.h" -#include "icp_qat_hw.h" +#include "adf_accel_devices.h" +#include "adf_gen4vf_hw_csr_data.h" static u64 -build_csr_ring_base_addr(bus_addr_t addr, u32 size) +build_csr_ring_base_addr(dma_addr_t addr, u32 size) { - return BUILD_RING_BASE_ADDR(addr, size); + return BUILD_RING_BASE_ADDR_GEN4(addr, size); } static u32 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) { - return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); + return READ_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring); } static void write_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { - WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); + WRITE_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring, value); } static u32 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) { - return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); + return READ_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring); } static void write_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { - WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); + WRITE_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring, value); } static u32 read_csr_e_stat(struct resource *csr_base_addr, u32 bank) { - return READ_CSR_E_STAT(csr_base_addr, bank); + return READ_CSR_E_STAT_GEN4VF(csr_base_addr, bank); } static void write_csr_ring_config(struct resource *csr_base_addr, u32 bank, u32 ring, u32 value) { - WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value); + WRITE_CSR_RING_CONFIG_GEN4VF(csr_base_addr, bank, ring, value); +} + +static dma_addr_t +read_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring) +{ + return READ_CSR_RING_BASE_GEN4VF(csr_base_addr, bank, ring); } static void write_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring, - bus_addr_t addr) + dma_addr_t addr) { - WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr); + WRITE_CSR_RING_BASE_GEN4VF(csr_base_addr, bank, ring, addr); } static void write_csr_int_flag(struct resource *csr_base_addr, u32 bank, u32 value) { - WRITE_CSR_INT_FLAG(csr_base_addr, bank, value); + WRITE_CSR_INT_FLAG_GEN4VF(csr_base_addr, bank, value); } static void write_csr_int_srcsel(struct resource *csr_base_addr, u32 bank) { - WRITE_CSR_INT_SRCSEL(csr_base_addr, bank); + WRITE_CSR_INT_SRCSEL_GEN4VF(csr_base_addr, bank); } static void write_csr_int_col_en(struct resource *csr_base_addr, u32 bank, u32 value) { - WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value); + WRITE_CSR_INT_COL_EN_GEN4VF(csr_base_addr, bank, value); } static void write_csr_int_col_ctl(struct resource *csr_base_addr, u32 bank, u32 value) { - WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value); + WRITE_CSR_INT_COL_CTL_GEN4VF(csr_base_addr, bank, value); } static void write_csr_int_flag_and_col(struct resource *csr_base_addr, u32 bank, u32 value) { - WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value); + WRITE_CSR_INT_FLAG_AND_COL_GEN4VF(csr_base_addr, bank, value); } static u32 read_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank) { - return READ_CSR_RING_SRV_ARB_EN(csr_base_addr, bank); + return READ_CSR_RING_SRV_ARB_EN_GEN4VF(csr_base_addr, bank); } static void write_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank, u32 value) { - WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value); + WRITE_CSR_RING_SRV_ARB_EN_GEN4VF(csr_base_addr, bank, value); +} + +static u32 +get_src_sel_mask(void) +{ + return ADF_BANK_INT_SRC_SEL_MASK_GEN4; +} + +static u32 +get_int_col_ctl_enable_mask(void) +{ + return ADF_RING_CSR_INT_COL_CTL_ENABLE; +} + +static u32 +get_bank_irq_mask(u32 irq_mask) +{ + return 0x1; } void -adf_gen2_init_hw_csr_info(struct adf_hw_csr_info *csr_info) +gen4vf_init_hw_csr_info(struct adf_hw_csr_info *csr_info) { struct adf_hw_csr_ops *csr_ops = &csr_info->csr_ops; - csr_info->arb_enable_mask = 0xFF; - + csr_info->csr_addr_offset = ADF_RING_CSR_ADDR_OFFSET_GEN4VF; + csr_info->ring_bundle_size = ADF_RING_BUNDLE_SIZE_GEN4; + csr_info->bank_int_flag_clear_mask = ADF_BANK_INT_FLAG_CLEAR_MASK_GEN4; + csr_info->num_rings_per_int_srcsel = ADF_RINGS_PER_INT_SRCSEL_GEN4; + csr_info->arb_enable_mask = 0x1; csr_ops->build_csr_ring_base_addr = build_csr_ring_base_addr; csr_ops->read_csr_ring_head = read_csr_ring_head; csr_ops->write_csr_ring_head = write_csr_ring_head; csr_ops->read_csr_ring_tail = read_csr_ring_tail; csr_ops->write_csr_ring_tail = write_csr_ring_tail; csr_ops->read_csr_e_stat = read_csr_e_stat; csr_ops->write_csr_ring_config = write_csr_ring_config; + csr_ops->read_csr_ring_base = read_csr_ring_base; csr_ops->write_csr_ring_base = write_csr_ring_base; csr_ops->write_csr_int_flag = write_csr_int_flag; csr_ops->write_csr_int_srcsel = write_csr_int_srcsel; csr_ops->write_csr_int_col_en = write_csr_int_col_en; csr_ops->write_csr_int_col_ctl = write_csr_int_col_ctl; csr_ops->write_csr_int_flag_and_col = write_csr_int_flag_and_col; csr_ops->read_csr_ring_srv_arb_en = read_csr_ring_srv_arb_en; csr_ops->write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en; + csr_ops->get_src_sel_mask = get_src_sel_mask; + csr_ops->get_int_col_ctl_enable_mask = get_int_col_ctl_enable_mask; + csr_ops->get_bank_irq_mask = get_bank_irq_mask; } -EXPORT_SYMBOL_GPL(adf_gen2_init_hw_csr_info); diff --git a/sys/dev/qat/qat_common/adf_hw_arbiter.c b/sys/dev/qat/qat_common/adf_hw_arbiter.c index 827d612e2c22..5dfa8c6a7bf5 100644 --- a/sys/dev/qat/qat_common/adf_hw_arbiter.c +++ b/sys/dev/qat/qat_common/adf_hw_arbiter.c @@ -1,209 +1,227 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_accel_devices.h" #include "icp_qat_uclo.h" #include "icp_qat_fw.h" #include "icp_qat_fw_init_admin.h" #include "adf_cfg_strings.h" #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" #include "adf_accel_devices.h" #include "adf_common_drv.h" #include "adf_transport_internal.h" #define ADF_ARB_NUM 4 #define ADF_ARB_REG_SIZE 0x4 #define ADF_ARB_WTR_SIZE 0x20 #define ADF_ARB_OFFSET 0x30000 #define ADF_ARB_REG_SLOT 0x1000 #define ADF_ARB_WTR_OFFSET 0x010 #define ADF_ARB_RO_EN_OFFSET 0x090 #define ADF_ARB_WQCFG_OFFSET 0x100 #define ADF_ARB_WRK_2_SER_MAP_OFFSET 0x180 #define ADF_ARB_RINGSRVARBEN_OFFSET 0x19C #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, \ ADF_ARB_RINGSRVARBEN_OFFSET + (ADF_ARB_REG_SLOT * (index)), \ value) #define WRITE_CSR_ARB_SARCONFIG(csr_addr, csr_offset, index, value) \ ADF_CSR_WR(csr_addr, (csr_offset) + (ADF_ARB_REG_SIZE * (index)), value) #define READ_CSR_ARB_RINGSRVARBEN(csr_addr, index) \ ADF_CSR_RD(csr_addr, \ ADF_ARB_RINGSRVARBEN_OFFSET + (ADF_ARB_REG_SLOT * (index))) static DEFINE_MUTEX(csr_arb_lock); #define WRITE_CSR_ARB_WRK_2_SER_MAP( \ csr_addr, csr_offset, wrk_to_ser_map_offset, index, value) \ ADF_CSR_WR(csr_addr, \ ((csr_offset) + (wrk_to_ser_map_offset)) + \ (ADF_ARB_REG_SIZE * (index)), \ value) int adf_init_arb(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct arb_info info; struct resource *csr = accel_dev->transport->banks[0].csr_addr; u32 arb_cfg = 0x1 << 31 | 0x4 << 4 | 0x1; u32 arb; hw_data->get_arb_info(&info); /* Service arb configured for 32 bytes responses and * ring flow control check enabled. */ for (arb = 0; arb < ADF_ARB_NUM; arb++) WRITE_CSR_ARB_SARCONFIG(csr, info.arbiter_offset, arb, arb_cfg); return 0; } int adf_init_gen2_arb(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct arb_info info; struct resource *csr = accel_dev->transport->banks[0].csr_addr; u32 i; const u32 *thd_2_arb_cfg; /* invoke common adf_init_arb */ adf_init_arb(accel_dev); hw_data->get_arb_info(&info); /* Map worker threads to service arbiters */ hw_data->get_arb_mapping(accel_dev, &thd_2_arb_cfg); if (!thd_2_arb_cfg) return EFAULT; for (i = 0; i < hw_data->num_engines; i++) WRITE_CSR_ARB_WRK_2_SER_MAP(csr, info.arbiter_offset, info.wrk_thd_2_srv_arb_map, i, *(thd_2_arb_cfg + i)); return 0; } void adf_update_ring_arb(struct adf_etr_ring_data *ring) { int shift; u32 arben, arben_tx, arben_rx, arb_mask; struct adf_accel_dev *accel_dev = ring->bank->accel_dev; struct adf_hw_csr_info *csr_info = &accel_dev->hw_device->csr_info; struct adf_hw_csr_ops *csr_ops = &csr_info->csr_ops; arb_mask = csr_info->arb_enable_mask; shift = hweight32(arb_mask); arben_tx = ring->bank->ring_mask & arb_mask; arben_rx = (ring->bank->ring_mask >> shift) & arb_mask; arben = arben_tx & arben_rx; csr_ops->write_csr_ring_srv_arb_en(ring->bank->csr_addr, ring->bank->bank_number, arben); } +void +adf_update_uio_ring_arb(struct adf_uio_control_bundle *bundle) +{ + int shift; + u32 arben, arben_tx, arben_rx, arb_mask; + struct adf_accel_dev *accel_dev = bundle->uio_priv.accel->accel_dev; + struct adf_hw_csr_info *csr_info = &accel_dev->hw_device->csr_info; + struct adf_hw_csr_ops *csr_ops = &csr_info->csr_ops; + + arb_mask = csr_info->arb_enable_mask; + shift = hweight32(arb_mask); + + arben_tx = bundle->rings_enabled & arb_mask; + arben_rx = (bundle->rings_enabled >> shift) & arb_mask; + arben = arben_tx & arben_rx; + csr_ops->write_csr_ring_srv_arb_en(bundle->csr_addr, + bundle->hardware_bundle_number, + arben); +} void adf_enable_ring_arb(struct adf_accel_dev *accel_dev, void *csr_addr, unsigned int bank_nr, unsigned int mask) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); - struct resource *csr = csr_addr; u32 arbenable; - if (!csr) + if (!csr_addr) return; mutex_lock(&csr_arb_lock); - arbenable = csr_ops->read_csr_ring_srv_arb_en(csr, bank_nr); + arbenable = csr_ops->read_csr_ring_srv_arb_en(csr_addr, bank_nr); arbenable |= mask & 0xFF; - csr_ops->write_csr_ring_srv_arb_en(csr, bank_nr, arbenable); + csr_ops->write_csr_ring_srv_arb_en(csr_addr, bank_nr, arbenable); mutex_unlock(&csr_arb_lock); } void adf_disable_ring_arb(struct adf_accel_dev *accel_dev, void *csr_addr, unsigned int bank_nr, unsigned int mask) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); struct resource *csr = csr_addr; u32 arbenable; if (!csr_addr) return; mutex_lock(&csr_arb_lock); arbenable = csr_ops->read_csr_ring_srv_arb_en(csr, bank_nr); arbenable &= ~mask & 0xFF; csr_ops->write_csr_ring_srv_arb_en(csr, bank_nr, arbenable); mutex_unlock(&csr_arb_lock); } void adf_exit_arb(struct adf_accel_dev *accel_dev) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct arb_info info; struct resource *csr; unsigned int i; if (!accel_dev->transport) return; csr = accel_dev->transport->banks[0].csr_addr; hw_data->get_arb_info(&info); /* Reset arbiter configuration */ for (i = 0; i < ADF_ARB_NUM; i++) WRITE_CSR_ARB_SARCONFIG(csr, info.arbiter_offset, i, 0); /* Unmap worker threads to service arbiters */ if (hw_data->get_arb_mapping) { for (i = 0; i < hw_data->num_engines; i++) WRITE_CSR_ARB_WRK_2_SER_MAP(csr, info.arbiter_offset, info.wrk_thd_2_srv_arb_map, i, 0); } /* Disable arbitration on all rings */ for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) csr_ops->write_csr_ring_srv_arb_en(csr, i, 0); } void adf_disable_arb(struct adf_accel_dev *accel_dev) { struct adf_hw_csr_ops *csr_ops; struct resource *csr; unsigned int i; if (!accel_dev || !accel_dev->transport) return; csr = accel_dev->transport->banks[0].csr_addr; csr_ops = GET_CSR_OPS(accel_dev); /* Disable arbitration on all rings */ for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) csr_ops->write_csr_ring_srv_arb_en(csr, i, 0); } diff --git a/sys/dev/qat/qat_common/adf_init.c b/sys/dev/qat/qat_common/adf_init.c index 0fb8618b1f32..3f9f1382d11f 100644 --- a/sys/dev/qat/qat_common/adf_init.c +++ b/sys/dev/qat/qat_common/adf_init.c @@ -1,737 +1,751 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_accel_devices.h" #include "icp_qat_uclo.h" #include "icp_qat_fw.h" #include "icp_qat_fw_init_admin.h" #include "adf_cfg_strings.h" #include "adf_dev_err.h" +#include "adf_uio.h" #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" #include #include #include "adf_accel_devices.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "icp_qat_fw.h" /* Mask used to check the CompressAndVerify capability bit */ #define DC_CNV_EXTENDED_CAPABILITY (0x01) /* Mask used to check the CompressAndVerifyAndRecover capability bit */ #define DC_CNVNR_EXTENDED_CAPABILITY (0x100) static LIST_HEAD(service_table); static DEFINE_MUTEX(service_lock); static void adf_service_add(struct service_hndl *service) { mutex_lock(&service_lock); list_add(&service->list, &service_table); mutex_unlock(&service_lock); } int adf_service_register(struct service_hndl *service) { memset(service->init_status, 0, sizeof(service->init_status)); memset(service->start_status, 0, sizeof(service->start_status)); adf_service_add(service); return 0; } static void adf_service_remove(struct service_hndl *service) { mutex_lock(&service_lock); list_del(&service->list); mutex_unlock(&service_lock); } int adf_service_unregister(struct service_hndl *service) { int i; for (i = 0; i < ARRAY_SIZE(service->init_status); i++) { if (service->init_status[i] || service->start_status[i]) { pr_err("QAT: Could not remove active service [%d]\n", i); return EFAULT; } } adf_service_remove(service); return 0; } static int adf_cfg_add_device_params(struct adf_accel_dev *accel_dev) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char hw_version[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; char mmp_version[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; struct adf_hw_device_data *hw_data = NULL; unsigned long val; - if (!accel_dev) return -EINVAL; hw_data = accel_dev->hw_device; if (adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC)) goto err; snprintf(key, sizeof(key), ADF_DEV_MAX_BANKS); val = GET_MAX_BANKS(accel_dev); if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; snprintf(key, sizeof(key), ADF_DEV_CAPABILITIES_MASK); val = hw_data->accel_capabilities_mask; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)val, ADF_HEX)) goto err; snprintf(key, sizeof(key), ADF_DEV_PKG_ID); val = accel_dev->accel_id; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; snprintf(key, sizeof(key), ADF_DEV_NODE_ID); val = dev_to_node(GET_DEV(accel_dev)); if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; snprintf(key, sizeof(key), ADF_DEV_MAX_RINGS_PER_BANK); val = hw_data->num_rings_per_bank; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; snprintf(key, sizeof(key), ADF_HW_REV_ID_KEY); snprintf(hw_version, ADF_CFG_MAX_VAL_LEN_IN_BYTES, "%d", accel_dev->accel_pci_dev.revid); if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)hw_version, ADF_STR)) goto err; snprintf(key, sizeof(key), ADF_MMP_VER_KEY); snprintf(mmp_version, ADF_CFG_MAX_VAL_LEN_IN_BYTES, "%d.%d.%d", accel_dev->fw_versions.mmp_version_major, accel_dev->fw_versions.mmp_version_minor, accel_dev->fw_versions.mmp_version_patch); if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)mmp_version, ADF_STR)) goto err; return 0; err: device_printf(GET_DEV(accel_dev), "Failed to add internal values to accel_dev cfg\n"); return -EINVAL; } static int adf_cfg_add_fw_version(struct adf_accel_dev *accel_dev) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char fw_version[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; snprintf(key, sizeof(key), ADF_UOF_VER_KEY); snprintf(fw_version, ADF_CFG_MAX_VAL_LEN_IN_BYTES, "%d.%d.%d", accel_dev->fw_versions.fw_version_major, accel_dev->fw_versions.fw_version_minor, accel_dev->fw_versions.fw_version_patch); if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)fw_version, ADF_STR)) return EFAULT; return 0; } static int adf_cfg_add_ext_params(struct adf_accel_dev *accel_dev) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; struct adf_hw_device_data *hw_data = accel_dev->hw_device; unsigned long val; snprintf(key, sizeof(key), ADF_DC_EXTENDED_FEATURES); val = hw_data->extended_dc_capabilities; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)val, ADF_HEX)) return -EINVAL; return 0; } void adf_error_notifier(uintptr_t arg) { struct adf_accel_dev *accel_dev = (struct adf_accel_dev *)arg; struct service_hndl *service; struct list_head *list_itr; list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_ERROR)) device_printf(GET_DEV(accel_dev), "Failed to send error event to %s.\n", service->name); } } /** * adf_set_ssm_wdtimer() - Initialize the slice hang watchdog timer. * * Return: 0 on success, error code otherwise. */ int adf_set_ssm_wdtimer(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; struct resource *csr = misc_bar->virt_addr; u32 i; unsigned int mask; u32 clk_per_sec = hw_data->get_clock_speed(hw_data); u32 timer_val = ADF_WDT_TIMER_SYM_COMP_MS * (clk_per_sec / 1000); u32 timer_val_pke = ADF_GEN2_SSM_WDT_PKE_DEFAULT_VALUE; char timer_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; /* Get Watch Dog Timer for CySym+Comp from the configuration */ if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, ADF_DEV_SSM_WDT_BULK, (char *)timer_str)) { if (!compat_strtouint((char *)timer_str, ADF_CFG_BASE_DEC, &timer_val)) /* Convert msec to CPP clocks */ timer_val = timer_val * (clk_per_sec / 1000); } /* Get Watch Dog Timer for CyAsym from the configuration */ if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, ADF_DEV_SSM_WDT_PKE, (char *)timer_str)) { if (!compat_strtouint((char *)timer_str, ADF_CFG_BASE_DEC, &timer_val_pke)) /* Convert msec to CPP clocks */ timer_val_pke = timer_val_pke * (clk_per_sec / 1000); } for (i = 0, mask = hw_data->accel_mask; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; /* Enable Watch Dog Timer for CySym + Comp */ ADF_CSR_WR(csr, ADF_SSMWDT(i), timer_val); /* Enable Watch Dog Timer for CyAsym */ ADF_CSR_WR(csr, ADF_SSMWDTPKE(i), timer_val_pke); } return 0; } /** * adf_dev_init() - Init data structures and services for the given accel device * @accel_dev: Pointer to acceleration device. * * Initialize the ring data structures and the admin comms and arbitration * services. * * Return: 0 on success, error code otherwise. */ int adf_dev_init(struct adf_accel_dev *accel_dev) { struct service_hndl *service; struct list_head *list_itr; struct adf_hw_device_data *hw_data = accel_dev->hw_device; char value[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; int ret = 0; sysctl_ctx_init(&accel_dev->sysctl_ctx); set_bit(ADF_STATUS_SYSCTL_CTX_INITIALISED, &accel_dev->status); if (!hw_data) { device_printf(GET_DEV(accel_dev), "Failed to init device - hw_data not set\n"); return EFAULT; } if (hw_data->reset_hw_units) hw_data->reset_hw_units(accel_dev); if (!test_bit(ADF_STATUS_CONFIGURED, &accel_dev->status) && !accel_dev->is_vf) { device_printf(GET_DEV(accel_dev), "Device not configured\n"); return EFAULT; } if (adf_init_etr_data(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed initialize etr\n"); return EFAULT; } if (hw_data->init_device && hw_data->init_device(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to initialize device\n"); return EFAULT; } if (hw_data->init_accel_units && hw_data->init_accel_units(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed initialize accel_units\n"); return EFAULT; } if (hw_data->init_admin_comms && hw_data->init_admin_comms(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed initialize admin comms\n"); return EFAULT; } if (hw_data->init_arb && hw_data->init_arb(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed initialize hw arbiter\n"); return EFAULT; } if (hw_data->set_asym_rings_mask) hw_data->set_asym_rings_mask(accel_dev); hw_data->enable_ints(accel_dev); if (adf_ae_init(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to initialise Acceleration Engine\n"); return EFAULT; } set_bit(ADF_STATUS_AE_INITIALISED, &accel_dev->status); if (adf_ae_fw_load(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to load acceleration FW\n"); return EFAULT; } set_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status); if (hw_data->alloc_irq(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to allocate interrupts\n"); return EFAULT; } set_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status); if (hw_data->init_ras && hw_data->init_ras(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to init RAS\n"); return EFAULT; } hw_data->enable_ints(accel_dev); hw_data->enable_error_correction(accel_dev); - if (hw_data->enable_vf2pf_comms && - hw_data->enable_vf2pf_comms(accel_dev)) { - device_printf(GET_DEV(accel_dev), - "QAT: Failed to enable vf2pf comms\n"); - return EFAULT; - } - - if (adf_pf_vf_capabilities_init(accel_dev)) - return EFAULT; - - if (adf_pf_vf_ring_to_svc_init(accel_dev)) - return EFAULT; + ret = hw_data->csr_info.pfvf_ops.enable_comms(accel_dev); + if (ret) + return ret; if (adf_cfg_add_device_params(accel_dev)) return EFAULT; if (hw_data->add_pke_stats && hw_data->add_pke_stats(accel_dev)) return EFAULT; if (hw_data->add_misc_error && hw_data->add_misc_error(accel_dev)) return EFAULT; /* * Subservice initialisation is divided into two stages: init and start. * This is to facilitate any ordering dependencies between services * prior to starting any of the accelerators. */ list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_INIT)) { device_printf(GET_DEV(accel_dev), "Failed to initialise service %s\n", service->name); return EFAULT; } set_bit(accel_dev->accel_id, service->init_status); } /* Read autoreset on error parameter */ ret = adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, ADF_AUTO_RESET_ON_ERROR, value); if (!ret) { if (compat_strtouint(value, 10, &accel_dev->autoreset_on_error)) { device_printf( GET_DEV(accel_dev), "Failed converting %s to a decimal value\n", ADF_AUTO_RESET_ON_ERROR); return EFAULT; } } return 0; } /** * adf_dev_start() - Start acceleration service for the given accel device * @accel_dev: Pointer to acceleration device. * * Function notifies all the registered services that the acceleration device * is ready to be used. * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_dev_start(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct service_hndl *service; struct list_head *list_itr; set_bit(ADF_STATUS_STARTING, &accel_dev->status); if (adf_devmgr_verify_id(&accel_dev->accel_id)) { device_printf(GET_DEV(accel_dev), "QAT: Device %d not found\n", accel_dev->accel_id); return ENODEV; } if (adf_ae_start(accel_dev)) { device_printf(GET_DEV(accel_dev), "AE Start Failed\n"); return EFAULT; } set_bit(ADF_STATUS_AE_STARTED, &accel_dev->status); if (hw_data->send_admin_init(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to send init message\n"); return EFAULT; } if (adf_cfg_add_fw_version(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to update configuration FW version\n"); return EFAULT; } if (hw_data->measure_clock) hw_data->measure_clock(accel_dev); /* * Set ssm watch dog timer for slice hang detection * Note! Not supported on devices older than C62x */ if (hw_data->set_ssm_wdtimer && hw_data->set_ssm_wdtimer(accel_dev)) { device_printf(GET_DEV(accel_dev), "QAT: Failed to set ssm watch dog timer\n"); return EFAULT; } + if (hw_data->int_timer_init && hw_data->int_timer_init(accel_dev)) { + device_printf(GET_DEV(accel_dev), + "Failed to init heartbeat interrupt timer\n"); + return -EFAULT; + } + list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_START)) { device_printf(GET_DEV(accel_dev), "Failed to start service %s\n", service->name); return EFAULT; } set_bit(accel_dev->accel_id, service->start_status); } + if (accel_dev->is_vf || !accel_dev->u1.pf.vf_info) { + /*Register UIO devices */ + if (adf_uio_register(accel_dev)) { + adf_uio_remove(accel_dev); + device_printf(GET_DEV(accel_dev), + "Failed to register UIO devices\n"); + set_bit(ADF_STATUS_STARTING, &accel_dev->status); + clear_bit(ADF_STATUS_STARTED, &accel_dev->status); + return ENODEV; + } + } + if (!test_bit(ADF_STATUS_RESTARTING, &accel_dev->status) && adf_cfg_add_ext_params(accel_dev)) return EFAULT; clear_bit(ADF_STATUS_STARTING, &accel_dev->status); set_bit(ADF_STATUS_STARTED, &accel_dev->status); return 0; } /** * adf_dev_stop() - Stop acceleration service for the given accel device * @accel_dev: Pointer to acceleration device. * * Function notifies all the registered services that the acceleration device * is shuting down. * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_dev_stop(struct adf_accel_dev *accel_dev) { struct service_hndl *service; struct list_head *list_itr; if (adf_devmgr_verify_id(&accel_dev->accel_id)) { device_printf(GET_DEV(accel_dev), "QAT: Device %d not found\n", accel_dev->accel_id); return ENODEV; } if (!adf_dev_started(accel_dev) && !test_bit(ADF_STATUS_STARTING, &accel_dev->status)) { return 0; } if (adf_dev_stop_notify_sync(accel_dev)) { device_printf( GET_DEV(accel_dev), "Waiting for device un-busy failed. Retries limit reached\n"); return EBUSY; } clear_bit(ADF_STATUS_STARTING, &accel_dev->status); clear_bit(ADF_STATUS_STARTED, &accel_dev->status); + if (accel_dev->hw_device->int_timer_exit) + accel_dev->hw_device->int_timer_exit(accel_dev); + list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (!test_bit(accel_dev->accel_id, service->start_status)) continue; clear_bit(accel_dev->accel_id, service->start_status); } + if (accel_dev->is_vf || !accel_dev->u1.pf.vf_info) { + /* Remove UIO Devices */ + adf_uio_remove(accel_dev); + } + if (test_bit(ADF_STATUS_AE_STARTED, &accel_dev->status)) { if (adf_ae_stop(accel_dev)) device_printf(GET_DEV(accel_dev), "failed to stop AE\n"); else clear_bit(ADF_STATUS_AE_STARTED, &accel_dev->status); } return 0; } /** * adf_dev_shutdown() - shutdown acceleration services and data strucutures * @accel_dev: Pointer to acceleration device * * Cleanup the ring data structures and the admin comms and arbitration * services. */ void adf_dev_shutdown(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct service_hndl *service; struct list_head *list_itr; if (test_bit(ADF_STATUS_SYSCTL_CTX_INITIALISED, &accel_dev->status)) { sysctl_ctx_free(&accel_dev->sysctl_ctx); clear_bit(ADF_STATUS_SYSCTL_CTX_INITIALISED, &accel_dev->status); } if (!hw_data) { device_printf( GET_DEV(accel_dev), "QAT: Failed to shutdown device - hw_data not set\n"); return; } if (test_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status)) { adf_ae_fw_release(accel_dev); clear_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status); } if (test_bit(ADF_STATUS_AE_INITIALISED, &accel_dev->status)) { if (adf_ae_shutdown(accel_dev)) device_printf(GET_DEV(accel_dev), "Failed to shutdown Accel Engine\n"); else clear_bit(ADF_STATUS_AE_INITIALISED, &accel_dev->status); } list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (!test_bit(accel_dev->accel_id, service->init_status)) continue; if (service->event_hld(accel_dev, ADF_EVENT_SHUTDOWN)) device_printf(GET_DEV(accel_dev), "Failed to shutdown service %s\n", service->name); else clear_bit(accel_dev->accel_id, service->init_status); } hw_data->disable_iov(accel_dev); - if (hw_data->disable_vf2pf_comms) - hw_data->disable_vf2pf_comms(accel_dev); - if (test_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status)) { hw_data->free_irq(accel_dev); clear_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status); } /* Delete configuration only if not restarting */ if (!test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) adf_cfg_del_all(accel_dev); if (hw_data->remove_pke_stats) hw_data->remove_pke_stats(accel_dev); if (hw_data->remove_misc_error) hw_data->remove_misc_error(accel_dev); if (hw_data->exit_ras) hw_data->exit_ras(accel_dev); if (hw_data->exit_arb) hw_data->exit_arb(accel_dev); if (hw_data->exit_admin_comms) hw_data->exit_admin_comms(accel_dev); if (hw_data->exit_accel_units) hw_data->exit_accel_units(accel_dev); adf_cleanup_etr_data(accel_dev); if (hw_data->restore_device) hw_data->restore_device(accel_dev); } /** * adf_dev_reset() - Reset acceleration service for the given accel device * @accel_dev: Pointer to acceleration device. * @mode: Specifies reset mode - synchronous or asynchronous. * Function notifies all the registered services that the acceleration device * is resetting. * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_dev_reset(struct adf_accel_dev *accel_dev, enum adf_dev_reset_mode mode) { return adf_dev_aer_schedule_reset(accel_dev, mode); } int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev) { struct service_hndl *service; struct list_head *list_itr; list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_RESTARTING)) device_printf(GET_DEV(accel_dev), "Failed to restart service %s.\n", service->name); } return 0; } int adf_dev_restarting_notify_sync(struct adf_accel_dev *accel_dev) { int times; adf_dev_restarting_notify(accel_dev); for (times = 0; times < ADF_STOP_RETRY; times++) { if (!adf_dev_in_use(accel_dev)) break; dev_dbg(GET_DEV(accel_dev), "retry times=%d\n", times); pause_ms("adfstop", 100); } if (adf_dev_in_use(accel_dev)) { clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); device_printf(GET_DEV(accel_dev), "Device still in use during reset sequence.\n"); return EBUSY; } return 0; } int adf_dev_stop_notify_sync(struct adf_accel_dev *accel_dev) { int times; struct service_hndl *service; struct list_head *list_itr; list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_STOP)) device_printf(GET_DEV(accel_dev), "Failed to restart service %s.\n", service->name); } for (times = 0; times < ADF_STOP_RETRY; times++) { if (!adf_dev_in_use(accel_dev)) break; dev_dbg(GET_DEV(accel_dev), "retry times=%d\n", times); pause_ms("adfstop", 100); } if (adf_dev_in_use(accel_dev)) { clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); device_printf(GET_DEV(accel_dev), "Device still in use during stop sequence.\n"); return EBUSY; } return 0; } int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev) { struct service_hndl *service; struct list_head *list_itr; list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_RESTARTED)) device_printf(GET_DEV(accel_dev), "Failed to restart service %s.\n", service->name); } return 0; } diff --git a/sys/dev/qat/qat_common/adf_pf2vf_capabilities.c b/sys/dev/qat/qat_common/adf_pf2vf_capabilities.c deleted file mode 100644 index f4b4a3faf305..000000000000 --- a/sys/dev/qat/qat_common/adf_pf2vf_capabilities.c +++ /dev/null @@ -1,147 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2007-2022 Intel Corporation */ -/* $FreeBSD$ */ -#include -#include "adf_accel_devices.h" -#include "adf_common_drv.h" -#include "adf_pf2vf_msg.h" -#include "adf_cfg.h" - -#define ADF_VF2PF_CAPABILITIES_V1_VERSION 1 -#define ADF_VF2PF_CAPABILITIES_V1_LENGTH 4 -#define ADF_VF2PF_CAPABILITIES_V2_VERSION 2 -#define ADF_VF2PF_CAPABILITIES_CAP_OFFSET 4 -#define ADF_VF2PF_CAPABILITIES_V2_LENGTH 8 -#define ADF_VF2PF_CAPABILITIES_V3_VERSION 3 -#define ADF_VF2PF_CAPABILITIES_FREQ_OFFSET 8 -#define ADF_VF2PF_CAPABILITIES_V3_LENGTH 12 - -static int -adf_pf_capabilities_msg_provider(struct adf_accel_dev *accel_dev, - u8 **buffer, - u8 *length, - u8 *block_version, - u8 compatibility, - u8 byte_num) -{ - static u8 data[ADF_VF2PF_CAPABILITIES_V3_LENGTH] = { 0 }; - struct adf_hw_device_data *hw_data = accel_dev->hw_device; - u32 ext_dc_caps = hw_data->extended_dc_capabilities; - u32 capabilities = hw_data->accel_capabilities_mask; - u32 frequency = hw_data->clock_frequency; - u16 byte = 0; - u16 index = 0; - - for (byte = 0; byte < sizeof(ext_dc_caps); byte++) { - data[byte] = (ext_dc_caps >> (byte * ADF_PFVF_DATA_SHIFT)) & - ADF_PFVF_DATA_MASK; - } - - for (byte = 0, index = ADF_VF2PF_CAPABILITIES_CAP_OFFSET; - byte < sizeof(capabilities); - byte++, index++) { - data[index] = (capabilities >> (byte * ADF_PFVF_DATA_SHIFT)) & - ADF_PFVF_DATA_MASK; - } - - if (frequency) { - for (byte = 0, index = ADF_VF2PF_CAPABILITIES_FREQ_OFFSET; - byte < sizeof(frequency); - byte++, index++) { - data[index] = - (frequency >> (byte * ADF_PFVF_DATA_SHIFT)) & - ADF_PFVF_DATA_MASK; - } - *length = ADF_VF2PF_CAPABILITIES_V3_LENGTH; - *block_version = ADF_VF2PF_CAPABILITIES_V3_VERSION; - } else { - *length = ADF_VF2PF_CAPABILITIES_V2_LENGTH; - *block_version = ADF_VF2PF_CAPABILITIES_V2_VERSION; - } - - *buffer = data; - return 0; -} - -int -adf_pf_vf_capabilities_init(struct adf_accel_dev *accel_dev) -{ - u8 data[ADF_VF2PF_CAPABILITIES_V3_LENGTH] = { 0 }; - u8 len = ADF_VF2PF_CAPABILITIES_V3_LENGTH; - u8 version = ADF_VF2PF_CAPABILITIES_V2_VERSION; - u32 ex_dc_cap = 0; - u32 capabilities = 0; - u32 frequency = 0; - u16 byte = 0; - u16 index = 0; - - if (!accel_dev->is_vf) { - /* on the pf */ - if (!adf_iov_is_block_provider_registered( - ADF_VF2PF_BLOCK_MSG_CAP_SUMMARY)) - adf_iov_block_provider_register( - ADF_VF2PF_BLOCK_MSG_CAP_SUMMARY, - adf_pf_capabilities_msg_provider); - } else if (accel_dev->u1.vf.pf_version >= - ADF_PFVF_COMPATIBILITY_CAPABILITIES) { - /* on the vf */ - if (adf_iov_block_get(accel_dev, - ADF_VF2PF_BLOCK_MSG_CAP_SUMMARY, - &version, - data, - &len)) { - device_printf(GET_DEV(accel_dev), - "QAT: Failed adf_iov_block_get\n"); - return EFAULT; - } - - if (len < ADF_VF2PF_CAPABILITIES_V1_LENGTH) { - device_printf( - GET_DEV(accel_dev), - "Capabilities message truncated to %d bytes\n", - len); - return EFAULT; - } - - for (byte = 0; byte < sizeof(ex_dc_cap); byte++) { - ex_dc_cap |= data[byte] << (byte * ADF_PFVF_DATA_SHIFT); - } - accel_dev->hw_device->extended_dc_capabilities = ex_dc_cap; - - /* Get capabilities if provided by PF */ - if (len >= ADF_VF2PF_CAPABILITIES_V2_LENGTH) { - for (byte = 0, - index = ADF_VF2PF_CAPABILITIES_CAP_OFFSET; - byte < sizeof(capabilities); - byte++, index++) { - capabilities |= data[index] - << (byte * ADF_PFVF_DATA_SHIFT); - } - accel_dev->hw_device->accel_capabilities_mask = - capabilities; - } else { - device_printf(GET_DEV(accel_dev), - "PF did not communicate capabilities\n"); - } - - /* Get frequency if provided by the PF */ - if (len >= ADF_VF2PF_CAPABILITIES_V3_LENGTH) { - for (byte = 0, - index = ADF_VF2PF_CAPABILITIES_FREQ_OFFSET; - byte < sizeof(frequency); - byte++, index++) { - frequency |= data[index] - << (byte * ADF_PFVF_DATA_SHIFT); - } - accel_dev->hw_device->clock_frequency = frequency; - } else { - device_printf(GET_DEV(accel_dev), - "PF did not communicate frequency\n"); - } - - } else { - /* The PF is too old to support the extended capabilities */ - accel_dev->hw_device->extended_dc_capabilities = 0; - } - return 0; -} diff --git a/sys/dev/qat/qat_common/adf_pf2vf_msg.c b/sys/dev/qat/qat_common/adf_pf2vf_msg.c deleted file mode 100644 index 60b1102f4700..000000000000 --- a/sys/dev/qat/qat_common/adf_pf2vf_msg.c +++ /dev/null @@ -1,896 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2007-2022 Intel Corporation */ -/* $FreeBSD$ */ -#include -#include "adf_accel_devices.h" -#include "adf_common_drv.h" -#include "adf_pf2vf_msg.h" - -adf_iov_block_provider - pf2vf_message_providers[ADF_VF2PF_MAX_LARGE_MESSAGE_TYPE + 1]; -unsigned char pfvf_crc8_table[] = - { 0x00, 0x97, 0xB9, 0x2E, 0xE5, 0x72, 0x5C, 0xCB, 0x5D, 0xCA, 0xE4, 0x73, - 0xB8, 0x2F, 0x01, 0x96, 0xBA, 0x2D, 0x03, 0x94, 0x5F, 0xC8, 0xE6, 0x71, - 0xE7, 0x70, 0x5E, 0xC9, 0x02, 0x95, 0xBB, 0x2C, 0xE3, 0x74, 0x5A, 0xCD, - 0x06, 0x91, 0xBF, 0x28, 0xBE, 0x29, 0x07, 0x90, 0x5B, 0xCC, 0xE2, 0x75, - 0x59, 0xCE, 0xE0, 0x77, 0xBC, 0x2B, 0x05, 0x92, 0x04, 0x93, 0xBD, 0x2A, - 0xE1, 0x76, 0x58, 0xCF, 0x51, 0xC6, 0xE8, 0x7F, 0xB4, 0x23, 0x0D, 0x9A, - 0x0C, 0x9B, 0xB5, 0x22, 0xE9, 0x7E, 0x50, 0xC7, 0xEB, 0x7C, 0x52, 0xC5, - 0x0E, 0x99, 0xB7, 0x20, 0xB6, 0x21, 0x0F, 0x98, 0x53, 0xC4, 0xEA, 0x7D, - 0xB2, 0x25, 0x0B, 0x9C, 0x57, 0xC0, 0xEE, 0x79, 0xEF, 0x78, 0x56, 0xC1, - 0x0A, 0x9D, 0xB3, 0x24, 0x08, 0x9F, 0xB1, 0x26, 0xED, 0x7A, 0x54, 0xC3, - 0x55, 0xC2, 0xEC, 0x7B, 0xB0, 0x27, 0x09, 0x9E, 0xA2, 0x35, 0x1B, 0x8C, - 0x47, 0xD0, 0xFE, 0x69, 0xFF, 0x68, 0x46, 0xD1, 0x1A, 0x8D, 0xA3, 0x34, - 0x18, 0x8F, 0xA1, 0x36, 0xFD, 0x6A, 0x44, 0xD3, 0x45, 0xD2, 0xFC, 0x6B, - 0xA0, 0x37, 0x19, 0x8E, 0x41, 0xD6, 0xF8, 0x6F, 0xA4, 0x33, 0x1D, 0x8A, - 0x1C, 0x8B, 0xA5, 0x32, 0xF9, 0x6E, 0x40, 0xD7, 0xFB, 0x6C, 0x42, 0xD5, - 0x1E, 0x89, 0xA7, 0x30, 0xA6, 0x31, 0x1F, 0x88, 0x43, 0xD4, 0xFA, 0x6D, - 0xF3, 0x64, 0x4A, 0xDD, 0x16, 0x81, 0xAF, 0x38, 0xAE, 0x39, 0x17, 0x80, - 0x4B, 0xDC, 0xF2, 0x65, 0x49, 0xDE, 0xF0, 0x67, 0xAC, 0x3B, 0x15, 0x82, - 0x14, 0x83, 0xAD, 0x3A, 0xF1, 0x66, 0x48, 0xDF, 0x10, 0x87, 0xA9, 0x3E, - 0xF5, 0x62, 0x4C, 0xDB, 0x4D, 0xDA, 0xF4, 0x63, 0xA8, 0x3F, 0x11, 0x86, - 0xAA, 0x3D, 0x13, 0x84, 0x4F, 0xD8, 0xF6, 0x61, 0xF7, 0x60, 0x4E, 0xD9, - 0x12, 0x85, 0xAB, 0x3C }; - -void -adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev) -{ - struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; - struct adf_hw_device_data *hw_data = accel_dev->hw_device; - struct resource *pmisc_bar_addr = - pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr; - - ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x0); -} - -void -adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev) -{ - struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; - struct adf_hw_device_data *hw_data = accel_dev->hw_device; - struct resource *pmisc_bar_addr = - pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr; - - ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x2); -} - -static int -__adf_iov_putmsg(struct adf_accel_dev *accel_dev, - u32 msg, - u8 vf_nr, - bool is_notification) -{ - struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; - struct adf_hw_device_data *hw_data = accel_dev->hw_device; - struct resource *pmisc_bar_addr = - pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr; - u32 val, pf2vf_offset; - u32 total_delay = 0, mdelay = ADF_IOV_MSG_ACK_DELAY_MS, - udelay = ADF_IOV_MSG_ACK_DELAY_US; - u32 local_in_use_mask, local_in_use_pattern; - u32 remote_in_use_mask, remote_in_use_pattern; - struct mutex *lock; /* lock preventing concurrent acces of CSR */ - u32 int_bit; - int ret = 0; - struct pfvf_stats *pfvf_counters = NULL; - - if (accel_dev->is_vf) { - pf2vf_offset = hw_data->get_pf2vf_offset(0); - lock = &accel_dev->u1.vf.vf2pf_lock; - local_in_use_mask = ADF_VF2PF_IN_USE_BY_VF_MASK; - local_in_use_pattern = ADF_VF2PF_IN_USE_BY_VF; - remote_in_use_mask = ADF_PF2VF_IN_USE_BY_PF_MASK; - remote_in_use_pattern = ADF_PF2VF_IN_USE_BY_PF; - int_bit = ADF_VF2PF_INT; - pfvf_counters = &accel_dev->u1.vf.pfvf_counters; - } else { - pf2vf_offset = hw_data->get_pf2vf_offset(vf_nr); - lock = &accel_dev->u1.pf.vf_info[vf_nr].pf2vf_lock; - local_in_use_mask = ADF_PF2VF_IN_USE_BY_PF_MASK; - local_in_use_pattern = ADF_PF2VF_IN_USE_BY_PF; - remote_in_use_mask = ADF_VF2PF_IN_USE_BY_VF_MASK; - remote_in_use_pattern = ADF_VF2PF_IN_USE_BY_VF; - int_bit = ADF_PF2VF_INT; - pfvf_counters = &accel_dev->u1.pf.vf_info[vf_nr].pfvf_counters; - } - - mutex_lock(lock); - - /* Check if PF2VF CSR is in use by remote function */ - val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset); - if ((val & remote_in_use_mask) == remote_in_use_pattern) { - device_printf(GET_DEV(accel_dev), - "PF2VF CSR in use by remote function\n"); - ret = EAGAIN; - pfvf_counters->busy++; - goto out; - } - - /* Attempt to get ownership of PF2VF CSR */ - msg &= ~local_in_use_mask; - msg |= local_in_use_pattern; - ADF_CSR_WR(pmisc_bar_addr, pf2vf_offset, msg | int_bit); - pfvf_counters->tx++; - - /* Wait for confirmation from remote func it received the message */ - do { - if (udelay < ADF_IOV_MSG_ACK_EXP_MAX_DELAY_US) { - usleep_range(udelay, udelay * 2); - udelay = udelay * 2; - total_delay = total_delay + udelay; - } else { - pause_ms("adfstop", mdelay); - total_delay = total_delay + (mdelay * 1000); - } - val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset); - } while ((val & int_bit) && - (total_delay < ADF_IOV_MSG_ACK_LIN_MAX_DELAY_US)); - - if (val & int_bit) { - device_printf(GET_DEV(accel_dev), - "ACK not received from remote\n"); - pfvf_counters->no_ack++; - val &= ~int_bit; - ret = EIO; - } - - /* For fire-and-forget notifications, the receiver does not clear - * the in-use pattern. This is used to detect collisions. - */ - if (is_notification && (val & ~int_bit) != msg) { - /* Collision must have overwritten the message */ - device_printf(GET_DEV(accel_dev), - "Collision on notification\n"); - pfvf_counters->collision++; - ret = EAGAIN; - goto out; - } - - /* - * If the far side did not clear the in-use pattern it is either - * 1) Notification - message left intact to detect collision - * 2) Older protocol (compatibility version < 3) on the far side - * where the sender is responsible for clearing the in-use - * pattern after the received has acknowledged receipt. - * In either case, clear the in-use pattern now. - */ - if ((val & local_in_use_mask) == local_in_use_pattern) - ADF_CSR_WR(pmisc_bar_addr, - pf2vf_offset, - val & ~local_in_use_mask); - -out: - mutex_unlock(lock); - return ret; -} - -static int -adf_iov_put(struct adf_accel_dev *accel_dev, - u32 msg, - u8 vf_nr, - bool is_notification) -{ - u32 count = 0, delay = ADF_IOV_MSG_RETRY_DELAY; - int ret; - struct pfvf_stats *pfvf_counters = NULL; - - if (accel_dev->is_vf) - pfvf_counters = &accel_dev->u1.vf.pfvf_counters; - else - pfvf_counters = &accel_dev->u1.pf.vf_info[vf_nr].pfvf_counters; - - do { - ret = __adf_iov_putmsg(accel_dev, msg, vf_nr, is_notification); - if (ret == EAGAIN) - pause_ms("adfstop", delay); - delay = delay * 2; - } while (ret == EAGAIN && ++count < ADF_IOV_MSG_MAX_RETRIES); - if (ret == EAGAIN) { - if (is_notification) - pfvf_counters->event_timeout++; - else - pfvf_counters->tx_timeout++; - } - - return ret; -} - -/** - * adf_iov_putmsg() - send PF2VF message - * @accel_dev: Pointer to acceleration device. - * @msg: Message to send - * @vf_nr: VF number to which the message will be sent - * - * Function sends a messge from the PF to a VF - * - * Return: 0 on success, error code otherwise. - */ -int -adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr) -{ - return adf_iov_put(accel_dev, msg, vf_nr, false); -} - -/** - * adf_iov_notify() - send PF2VF notification message - * @accel_dev: Pointer to acceleration device. - * @msg: Message to send - * @vf_nr: VF number to which the message will be sent - * - * Function sends a notification messge from the PF to a VF - * - * Return: 0 on success, error code otherwise. - */ -int -adf_iov_notify(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr) -{ - return adf_iov_put(accel_dev, msg, vf_nr, true); -} - -u8 -adf_pfvf_crc(u8 start_crc, u8 *buf, u8 len) -{ - u8 crc = start_crc; - - while (len-- > 0) - crc = pfvf_crc8_table[(crc ^ *buf++) & 0xff]; - - return crc; -} - -int -adf_iov_block_provider_register(u8 msg_type, - const adf_iov_block_provider provider) -{ - if (msg_type >= ARRAY_SIZE(pf2vf_message_providers)) { - pr_err("QAT: invalid message type %d for PF2VF provider\n", - msg_type); - return -EINVAL; - } - if (pf2vf_message_providers[msg_type]) { - pr_err("QAT: Provider %ps already registered for message %d\n", - pf2vf_message_providers[msg_type], - msg_type); - return -EINVAL; - } - - pf2vf_message_providers[msg_type] = provider; - return 0; -} - -u8 -adf_iov_is_block_provider_registered(u8 msg_type) -{ - if (pf2vf_message_providers[msg_type]) - return 1; - else - return 0; -} - -int -adf_iov_block_provider_unregister(u8 msg_type, - const adf_iov_block_provider provider) -{ - if (msg_type >= ARRAY_SIZE(pf2vf_message_providers)) { - pr_err("QAT: invalid message type %d for PF2VF provider\n", - msg_type); - return -EINVAL; - } - if (pf2vf_message_providers[msg_type] != provider) { - pr_err("QAT: Provider %ps not registered for message %d\n", - provider, - msg_type); - return -EINVAL; - } - - pf2vf_message_providers[msg_type] = NULL; - return 0; -} - -static int -adf_iov_block_get_data(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 byte_num, - u8 *data, - u8 compatibility, - bool crc) -{ - u8 *buffer; - u8 size; - u8 msg_ver; - u8 crc8; - - if (msg_type >= ARRAY_SIZE(pf2vf_message_providers)) { - pr_err("QAT: invalid message type %d for PF2VF provider\n", - msg_type); - *data = ADF_PF2VF_INVALID_BLOCK_TYPE; - return -EINVAL; - } - - if (!pf2vf_message_providers[msg_type]) { - pr_err("QAT: No registered provider for message %d\n", - msg_type); - *data = ADF_PF2VF_INVALID_BLOCK_TYPE; - return -EINVAL; - } - - if ((*pf2vf_message_providers[msg_type])( - accel_dev, &buffer, &size, &msg_ver, compatibility, byte_num)) { - pr_err("QAT: unknown error from provider for message %d\n", - msg_type); - *data = ADF_PF2VF_UNSPECIFIED_ERROR; - return -EINVAL; - } - - if ((msg_type <= ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE && - size > ADF_VF2PF_SMALL_PAYLOAD_SIZE) || - (msg_type <= ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE && - size > ADF_VF2PF_MEDIUM_PAYLOAD_SIZE) || - size > ADF_VF2PF_LARGE_PAYLOAD_SIZE) { - pr_err("QAT: Invalid size %d provided for message type %d\n", - size, - msg_type); - *data = ADF_PF2VF_PAYLOAD_TRUNCATED; - return -EINVAL; - } - - if ((!byte_num && crc) || byte_num >= size + ADF_VF2PF_BLOCK_DATA) { - pr_err("QAT: Invalid byte number %d for message %d\n", - byte_num, - msg_type); - *data = ADF_PF2VF_INVALID_BYTE_NUM_REQ; - return -EINVAL; - } - - if (crc) { - crc8 = adf_pfvf_crc(ADF_CRC8_INIT_VALUE, &msg_ver, 1); - crc8 = adf_pfvf_crc(crc8, &size, 1); - *data = adf_pfvf_crc(crc8, buffer, byte_num - 1); - } else { - if (byte_num == 0) - *data = msg_ver; - else if (byte_num == 1) - *data = size; - else - *data = buffer[byte_num - 2]; - } - - return 0; -} - -static int -adf_iov_block_get_byte(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 byte_num, - u8 *data, - u8 compatibility) -{ - return adf_iov_block_get_data( - accel_dev, msg_type, byte_num, data, compatibility, false); -} - -static int -adf_iov_block_get_crc(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 byte_num, - u8 *data, - u8 compatibility) -{ - return adf_iov_block_get_data( - accel_dev, msg_type, byte_num, data, compatibility, true); -} - -int adf_iov_compatibility_check(struct adf_accel_dev *accel_dev, u8 compat_ver); - -void -adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info) -{ - struct adf_accel_dev *accel_dev = vf_info->accel_dev; - struct adf_hw_device_data *hw_data = accel_dev->hw_device; - int bar_id = hw_data->get_misc_bar_id(hw_data); - struct adf_bar *pmisc = &GET_BARS(accel_dev)[bar_id]; - struct resource *pmisc_addr = pmisc->virt_addr; - u32 msg, resp = 0, vf_nr = vf_info->vf_nr; - u8 byte_num = 0; - u8 msg_type = 0; - u8 resp_type; - int res; - u8 data; - u8 compat = 0x0; - int vf_compat_ver = 0; - bool is_notification = false; - - /* Read message from the VF */ - msg = ADF_CSR_RD(pmisc_addr, hw_data->get_pf2vf_offset(vf_nr)); - if (!(msg & ADF_VF2PF_INT)) { - device_printf(GET_DEV(accel_dev), - "Spurious VF2PF interrupt. msg %X. Ignored\n", - msg); - vf_info->pfvf_counters.spurious++; - goto out; - } - vf_info->pfvf_counters.rx++; - - if (!(msg & ADF_VF2PF_MSGORIGIN_SYSTEM)) { - /* Ignore legacy non-system (non-kernel) VF2PF messages */ - device_printf(GET_DEV(accel_dev), - "Ignored non-system message from VF%d (0x%x);\n", - vf_nr + 1, - msg); - /* - * To ack, clear the VF2PFINT bit. - * Because this must be a legacy message, the far side - * must clear the in-use pattern. - */ - msg &= ~(ADF_VF2PF_INT); - ADF_CSR_WR(pmisc_addr, hw_data->get_pf2vf_offset(vf_nr), msg); - - goto out; - } - - switch ((msg & ADF_VF2PF_MSGTYPE_MASK) >> ADF_VF2PF_MSGTYPE_SHIFT) { - case ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ: - - { - is_notification = false; - vf_compat_ver = msg >> ADF_VF2PF_COMPAT_VER_REQ_SHIFT; - vf_info->compat_ver = vf_compat_ver; - - resp = (ADF_PF2VF_MSGORIGIN_SYSTEM | - (ADF_PF2VF_MSGTYPE_VERSION_RESP - << ADF_PF2VF_MSGTYPE_SHIFT) | - (ADF_PFVF_COMPATIBILITY_VERSION - << ADF_PF2VF_VERSION_RESP_VERS_SHIFT)); - - device_printf( - GET_DEV(accel_dev), - "Compatibility Version Request from VF%d vers=%u\n", - vf_nr + 1, - vf_info->compat_ver); - - if (vf_compat_ver < ADF_PFVF_COMPATIBILITY_VERSION) - compat = adf_iov_compatibility_check(accel_dev, - vf_compat_ver); - else if (vf_compat_ver == ADF_PFVF_COMPATIBILITY_VERSION) - compat = ADF_PF2VF_VF_COMPATIBLE; - else - compat = ADF_PF2VF_VF_COMPAT_UNKNOWN; - - resp |= compat << ADF_PF2VF_VERSION_RESP_RESULT_SHIFT; - - if (compat == ADF_PF2VF_VF_INCOMPATIBLE) - device_printf(GET_DEV(accel_dev), - "VF%d and PF are incompatible.\n", - vf_nr + 1); - } break; - case ADF_VF2PF_MSGTYPE_VERSION_REQ: - device_printf(GET_DEV(accel_dev), - "Legacy VersionRequest received from VF%d 0x%x\n", - vf_nr + 1, - msg); - is_notification = false; - - /* legacy driver, VF compat_ver is 0 */ - vf_info->compat_ver = 0; - - resp = (ADF_PF2VF_MSGORIGIN_SYSTEM | - (ADF_PF2VF_MSGTYPE_VERSION_RESP - << ADF_PF2VF_MSGTYPE_SHIFT)); - - /* PF always newer than legacy VF */ - compat = - adf_iov_compatibility_check(accel_dev, vf_info->compat_ver); - resp |= compat << ADF_PF2VF_VERSION_RESP_RESULT_SHIFT; - - /* Set legacy major and minor version num */ - resp |= 1 << ADF_PF2VF_MAJORVERSION_SHIFT | - 1 << ADF_PF2VF_MINORVERSION_SHIFT; - - if (compat == ADF_PF2VF_VF_INCOMPATIBLE) - device_printf(GET_DEV(accel_dev), - "VF%d and PF are incompatible.\n", - vf_nr + 1); - break; - case ADF_VF2PF_MSGTYPE_INIT: { - device_printf(GET_DEV(accel_dev), - "Init message received from VF%d 0x%x\n", - vf_nr + 1, - msg); - is_notification = true; - vf_info->init = true; - } break; - case ADF_VF2PF_MSGTYPE_SHUTDOWN: { - device_printf(GET_DEV(accel_dev), - "Shutdown message received from VF%d 0x%x\n", - vf_nr + 1, - msg); - is_notification = true; - vf_info->init = false; - } break; - case ADF_VF2PF_MSGTYPE_GET_LARGE_BLOCK_REQ: - case ADF_VF2PF_MSGTYPE_GET_MEDIUM_BLOCK_REQ: - case ADF_VF2PF_MSGTYPE_GET_SMALL_BLOCK_REQ: { - is_notification = false; - switch ((msg & ADF_VF2PF_MSGTYPE_MASK) >> - ADF_VF2PF_MSGTYPE_SHIFT) { - case ADF_VF2PF_MSGTYPE_GET_LARGE_BLOCK_REQ: - byte_num = - ((msg & ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_MASK) >> - ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_SHIFT); - msg_type = - ((msg & ADF_VF2PF_LARGE_BLOCK_REQ_TYPE_MASK) >> - ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT); - msg_type += ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE; - break; - case ADF_VF2PF_MSGTYPE_GET_MEDIUM_BLOCK_REQ: - byte_num = - ((msg & ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_MASK) >> - ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_SHIFT); - msg_type = - ((msg & ADF_VF2PF_MEDIUM_BLOCK_REQ_TYPE_MASK) >> - ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT); - msg_type += ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE; - break; - case ADF_VF2PF_MSGTYPE_GET_SMALL_BLOCK_REQ: - byte_num = - ((msg & ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_MASK) >> - ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_SHIFT); - msg_type = - ((msg & ADF_VF2PF_SMALL_BLOCK_REQ_TYPE_MASK) >> - ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT); - msg_type += ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE; - break; - } - - if (msg >> ADF_VF2PF_BLOCK_REQ_CRC_SHIFT) { - res = adf_iov_block_get_crc(accel_dev, - msg_type, - byte_num, - &data, - vf_info->compat_ver); - if (res) - resp_type = ADF_PF2VF_BLOCK_RESP_TYPE_ERROR; - else - resp_type = ADF_PF2VF_BLOCK_RESP_TYPE_CRC; - } else { - if (!byte_num) - vf_info->pfvf_counters.blk_tx++; - - res = adf_iov_block_get_byte(accel_dev, - msg_type, - byte_num, - &data, - vf_info->compat_ver); - if (res) - resp_type = ADF_PF2VF_BLOCK_RESP_TYPE_ERROR; - else - resp_type = ADF_PF2VF_BLOCK_RESP_TYPE_DATA; - } - resp = - (ADF_PF2VF_MSGORIGIN_SYSTEM | - (ADF_PF2VF_MSGTYPE_BLOCK_RESP << ADF_PF2VF_MSGTYPE_SHIFT) | - (resp_type << ADF_PF2VF_BLOCK_RESP_TYPE_SHIFT) | - (data << ADF_PF2VF_BLOCK_RESP_DATA_SHIFT)); - } break; - default: - device_printf(GET_DEV(accel_dev), - "Unknown message from VF%d (0x%x);\n", - vf_nr + 1, - msg); - } - - /* To ack, clear the VF2PFINT bit and the in-use-by */ - msg &= ~ADF_VF2PF_INT; - /* - * Clear the in-use pattern if the sender won't do it. - * Because the compatibility version must be the first message - * exchanged between the VF and PF, the vf_info->compat_ver must be - * set at this time. - * The in-use pattern is not cleared for notifications so that - * it can be used for collision detection. - */ - if (vf_info->compat_ver >= ADF_PFVF_COMPATIBILITY_FAST_ACK && - !is_notification) - msg &= ~ADF_VF2PF_IN_USE_BY_VF_MASK; - ADF_CSR_WR(pmisc_addr, hw_data->get_pf2vf_offset(vf_nr), msg); - - if (resp && adf_iov_putmsg(accel_dev, resp, vf_nr)) - device_printf(GET_DEV(accel_dev), - "Failed to send response to VF\n"); - -out: - return; -} - -void -adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev) -{ - struct adf_accel_vf_info *vf; - u32 msg = (ADF_PF2VF_MSGORIGIN_SYSTEM | - (ADF_PF2VF_MSGTYPE_RESTARTING << ADF_PF2VF_MSGTYPE_SHIFT)); - - int i, num_vfs = accel_dev->u1.pf.num_vfs; - for (i = 0, vf = accel_dev->u1.pf.vf_info; i < num_vfs; i++, vf++) { - if (vf->init && adf_iov_notify(accel_dev, msg, i)) - device_printf(GET_DEV(accel_dev), - "Failed to send restarting msg to VF%d\n", - i); - } -} - -void -adf_pf2vf_notify_fatal_error(struct adf_accel_dev *accel_dev) -{ - struct adf_accel_vf_info *vf; - int i, num_vfs = accel_dev->u1.pf.num_vfs; - u32 msg = (ADF_PF2VF_MSGORIGIN_SYSTEM | - (ADF_PF2VF_MSGTYPE_FATAL_ERROR << ADF_PF2VF_MSGTYPE_SHIFT)); - - for (i = 0, vf = accel_dev->u1.pf.vf_info; i < num_vfs; i++, vf++) { - if (vf->init && adf_iov_notify(accel_dev, msg, i)) - device_printf( - GET_DEV(accel_dev), - "Failed to send fatal error msg 0x%x to VF%d\n", - msg, - i); - } -} - -int -adf_iov_register_compat_checker(struct adf_accel_dev *accel_dev, - const adf_iov_compat_checker_t cc) -{ - struct adf_accel_compat_manager *cm = accel_dev->cm; - int num = 0; - - if (!cm) { - device_printf(GET_DEV(accel_dev), - "QAT: compatibility manager not initialized\n"); - return ENOMEM; - } - - for (num = 0; num < ADF_COMPAT_CHECKER_MAX; num++) { - if (cm->iov_compat_checkers[num]) { - if (cc == cm->iov_compat_checkers[num]) { - device_printf(GET_DEV(accel_dev), - "QAT: already registered\n"); - return EFAULT; - } - } else { - /* registering the new checker */ - cm->iov_compat_checkers[num] = cc; - break; - } - } - - if (num >= ADF_COMPAT_CHECKER_MAX) { - device_printf(GET_DEV(accel_dev), - "QAT: compatibility checkers are overflow.\n"); - return EFAULT; - } - - cm->num_chker = num; - return 0; -} - -int -adf_iov_unregister_compat_checker(struct adf_accel_dev *accel_dev, - const adf_iov_compat_checker_t cc) -{ - struct adf_accel_compat_manager *cm = accel_dev->cm; - int num = 0; - - if (!cm) { - device_printf(GET_DEV(accel_dev), - "QAT: compatibility manager not initialized\n"); - return ENOMEM; - } - num = cm->num_chker - 1; - - if (num < 0) { - device_printf( - GET_DEV(accel_dev), - "QAT: Array 'iov_compat_checkers' may use index value(s) -1\n"); - return EFAULT; - } - if (cc == cm->iov_compat_checkers[num]) { - /* unregistering the given checker */ - cm->iov_compat_checkers[num] = NULL; - } else { - device_printf( - GET_DEV(accel_dev), - "QAT: unregistering not in the registered order\n"); - return EFAULT; - } - - cm->num_chker--; - return 0; -} - -int -adf_iov_init_compat_manager(struct adf_accel_dev *accel_dev, - struct adf_accel_compat_manager **cm) -{ - if (!(*cm)) { - *cm = malloc(sizeof(**cm), M_QAT, M_WAITOK | M_ZERO); - } else { - /* zero the struct */ - explicit_bzero(*cm, sizeof(**cm)); - } - - return 0; -} - -int -adf_iov_shutdown_compat_manager(struct adf_accel_dev *accel_dev, - struct adf_accel_compat_manager **cm) -{ - if (*cm) { - free(*cm, M_QAT); - *cm = NULL; - } - return 0; -} - -int -adf_iov_compatibility_check(struct adf_accel_dev *accel_dev, u8 compat_ver) -{ - int compatible = ADF_PF2VF_VF_COMPATIBLE; - int i = 0; - struct adf_accel_compat_manager *cm = accel_dev->cm; - - if (!cm) { - device_printf(GET_DEV(accel_dev), - "QAT: compatibility manager not initialized\n"); - return ADF_PF2VF_VF_INCOMPATIBLE; - } - for (i = 0; i < cm->num_chker; i++) { - compatible = cm->iov_compat_checkers[i](accel_dev, compat_ver); - if (compatible == ADF_PF2VF_VF_INCOMPATIBLE) { - device_printf( - GET_DEV(accel_dev), - "QAT: PF and VF are incompatible [checker%d]\n", - i); - break; - } - } - return compatible; -} - -static int -adf_vf2pf_request_version(struct adf_accel_dev *accel_dev) -{ - unsigned long timeout = msecs_to_jiffies(ADF_IOV_MSG_RESP_TIMEOUT); - u32 msg = 0; - int ret = 0; - int comp = 0; - int response_received = 0; - int retry_count = 0; - struct pfvf_stats *pfvf_counters = NULL; - - pfvf_counters = &accel_dev->u1.vf.pfvf_counters; - - msg = ADF_VF2PF_MSGORIGIN_SYSTEM; - msg |= ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ << ADF_VF2PF_MSGTYPE_SHIFT; - msg |= ADF_PFVF_COMPATIBILITY_VERSION << ADF_VF2PF_COMPAT_VER_REQ_SHIFT; - BUILD_BUG_ON(ADF_PFVF_COMPATIBILITY_VERSION > 255); - /* Clear communication flag - without that VF will not be waiting for - * the response from host driver, and start sending init. - */ - accel_dev->u1.vf.iov_msg_completion = 0; - do { - /* Send request from VF to PF */ - if (retry_count) - pfvf_counters->retry++; - if (adf_iov_putmsg(accel_dev, msg, 0)) { - device_printf( - GET_DEV(accel_dev), - "Failed to send Compat Version Request.\n"); - return EIO; - } - mutex_lock(&accel_dev->u1.vf.vf2pf_lock); - if (accel_dev->u1.vf.iov_msg_completion == 0 && - sx_sleep(&accel_dev->u1.vf.iov_msg_completion, - &accel_dev->u1.vf.vf2pf_lock.sx, - 0, - "pfver", - timeout) == EWOULDBLOCK) { - /* It's possible that wakeup could be missed */ - if (accel_dev->u1.vf.iov_msg_completion) { - response_received = 1; - } else { - device_printf( - GET_DEV(accel_dev), - "IOV request/response message timeout expired\n"); - } - } else { - response_received = 1; - } - mutex_unlock(&accel_dev->u1.vf.vf2pf_lock); - } while (!response_received && - ++retry_count < ADF_IOV_MSG_RESP_RETRIES); - - if (!response_received) - pfvf_counters->rx_timeout++; - else - pfvf_counters->rx_rsp++; - if (!response_received) - return EIO; - - if (accel_dev->u1.vf.compatible == ADF_PF2VF_VF_COMPAT_UNKNOWN) - /* Response from PF received, check compatibility */ - comp = adf_iov_compatibility_check(accel_dev, - accel_dev->u1.vf.pf_version); - else - comp = accel_dev->u1.vf.compatible; - - ret = (comp == ADF_PF2VF_VF_COMPATIBLE) ? 0 : EFAULT; - if (ret) - device_printf( - GET_DEV(accel_dev), - "VF is not compatible with PF, due to the reason %d\n", - comp); - - return ret; -} - -/** - * adf_enable_vf2pf_comms() - Function enables communication from vf to pf - * - * @accel_dev: Pointer to acceleration device virtual function. - * - * Return: 0 on success, error code otherwise. - */ -int -adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) -{ - int ret = 0; - - /* init workqueue for VF */ - ret = adf_init_vf_wq(); - if (ret) - return ret; - - adf_enable_pf2vf_interrupts(accel_dev); - adf_iov_init_compat_manager(accel_dev, &accel_dev->cm); - return adf_vf2pf_request_version(accel_dev); -} -/** - * adf_disable_vf2pf_comms() - Function disables communication from vf to pf - * - * @accel_dev: Pointer to acceleration device virtual function. - * - * Return: 0 on success, error code otherwise. - */ -int -adf_disable_vf2pf_comms(struct adf_accel_dev *accel_dev) -{ - return adf_iov_shutdown_compat_manager(accel_dev, &accel_dev->cm); -} - -/** - * adf_pf_enable_vf2pf_comms() - Function enables communication from pf - * - * @accel_dev: Pointer to acceleration device physical function. - * - * Return: 0 on success, error code otherwise. - */ -int -adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) -{ - adf_iov_init_compat_manager(accel_dev, &accel_dev->cm); - return 0; -} - -/** - * adf_pf_disable_vf2pf_comms() - Function disables communication from pf - * - * @accel_dev: Pointer to acceleration device physical function. - * - * Return: 0 on success, error code otherwise. - */ -int -adf_pf_disable_vf2pf_comms(struct adf_accel_dev *accel_dev) -{ - return adf_iov_shutdown_compat_manager(accel_dev, &accel_dev->cm); -} diff --git a/sys/dev/qat/qat_common/adf_pf2vf_ring_to_svc_map.c b/sys/dev/qat/qat_common/adf_pf2vf_ring_to_svc_map.c deleted file mode 100644 index 46c130682275..000000000000 --- a/sys/dev/qat/qat_common/adf_pf2vf_ring_to_svc_map.c +++ /dev/null @@ -1,74 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2007-2022 Intel Corporation */ -/* $FreeBSD$ */ -#include -#include "adf_accel_devices.h" -#include "adf_common_drv.h" -#include "adf_pf2vf_msg.h" -#include "adf_cfg.h" - -#define ADF_VF2PF_RING_TO_SVC_VERSION 1 -#define ADF_VF2PF_RING_TO_SVC_LENGTH 2 - -int -adf_pf_ring_to_svc_msg_provider(struct adf_accel_dev *accel_dev, - u8 **buffer, - u8 *length, - u8 *block_version, - u8 compatibility, - u8 byte_num) -{ - static u8 data[ADF_VF2PF_RING_TO_SVC_LENGTH] = { 0 }; - struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); - u16 ring_to_svc_map = hw_data->ring_to_svc_map; - u16 byte = 0; - - for (byte = 0; byte < ADF_VF2PF_RING_TO_SVC_LENGTH; byte++) { - data[byte] = (ring_to_svc_map >> (byte * ADF_PFVF_DATA_SHIFT)) & - ADF_PFVF_DATA_MASK; - } - - *length = ADF_VF2PF_RING_TO_SVC_LENGTH; - *block_version = ADF_VF2PF_RING_TO_SVC_VERSION; - *buffer = data; - - return 0; -} - -int -adf_pf_vf_ring_to_svc_init(struct adf_accel_dev *accel_dev) -{ - u8 data[ADF_VF2PF_RING_TO_SVC_LENGTH] = { 0 }; - u8 len = ADF_VF2PF_RING_TO_SVC_LENGTH; - u8 version = ADF_VF2PF_RING_TO_SVC_VERSION; - u16 ring_to_svc_map = 0; - u16 byte = 0; - - if (!accel_dev->is_vf) { - /* on the pf */ - if (!adf_iov_is_block_provider_registered( - ADF_VF2PF_BLOCK_MSG_GET_RING_TO_SVC_REQ)) - adf_iov_block_provider_register( - ADF_VF2PF_BLOCK_MSG_GET_RING_TO_SVC_REQ, - adf_pf_ring_to_svc_msg_provider); - } else if (accel_dev->u1.vf.pf_version >= - ADF_PFVF_COMPATIBILITY_RING_TO_SVC_MAP) { - /* on the vf */ - if (adf_iov_block_get(accel_dev, - ADF_VF2PF_BLOCK_MSG_GET_RING_TO_SVC_REQ, - &version, - data, - &len)) { - device_printf(GET_DEV(accel_dev), - "QAT: Failed adf_iov_block_get\n"); - return EFAULT; - } - for (byte = 0; byte < ADF_VF2PF_RING_TO_SVC_LENGTH; byte++) { - ring_to_svc_map |= data[byte] - << (byte * ADF_PFVF_DATA_SHIFT); - } - GET_HW_DATA(accel_dev)->ring_to_svc_map = ring_to_svc_map; - } - - return 0; -} diff --git a/sys/dev/qat/qat_common/adf_pfvf_utils.c b/sys/dev/qat/qat_common/adf_pfvf_utils.c new file mode 100644 index 000000000000..3c8c729e4569 --- /dev/null +++ b/sys/dev/qat/qat_common/adf_pfvf_utils.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include +#include "adf_accel_devices.h" +#include "adf_pfvf_msg.h" +#include "adf_pfvf_utils.h" + +/* CRC Calculation */ +#define ADF_CRC8_INIT_VALUE 0xFF + +static const unsigned char pfvf_crc8_table[] = + { 0x00, 0x97, 0xB9, 0x2E, 0xE5, 0x72, 0x5C, 0xCB, 0x5D, 0xCA, 0xE4, 0x73, + 0xB8, 0x2F, 0x01, 0x96, 0xBA, 0x2D, 0x03, 0x94, 0x5F, 0xC8, 0xE6, 0x71, + 0xE7, 0x70, 0x5E, 0xC9, 0x02, 0x95, 0xBB, 0x2C, 0xE3, 0x74, 0x5A, 0xCD, + 0x06, 0x91, 0xBF, 0x28, 0xBE, 0x29, 0x07, 0x90, 0x5B, 0xCC, 0xE2, 0x75, + 0x59, 0xCE, 0xE0, 0x77, 0xBC, 0x2B, 0x05, 0x92, 0x04, 0x93, 0xBD, 0x2A, + 0xE1, 0x76, 0x58, 0xCF, 0x51, 0xC6, 0xE8, 0x7F, 0xB4, 0x23, 0x0D, 0x9A, + 0x0C, 0x9B, 0xB5, 0x22, 0xE9, 0x7E, 0x50, 0xC7, 0xEB, 0x7C, 0x52, 0xC5, + 0x0E, 0x99, 0xB7, 0x20, 0xB6, 0x21, 0x0F, 0x98, 0x53, 0xC4, 0xEA, 0x7D, + 0xB2, 0x25, 0x0B, 0x9C, 0x57, 0xC0, 0xEE, 0x79, 0xEF, 0x78, 0x56, 0xC1, + 0x0A, 0x9D, 0xB3, 0x24, 0x08, 0x9F, 0xB1, 0x26, 0xED, 0x7A, 0x54, 0xC3, + 0x55, 0xC2, 0xEC, 0x7B, 0xB0, 0x27, 0x09, 0x9E, 0xA2, 0x35, 0x1B, 0x8C, + 0x47, 0xD0, 0xFE, 0x69, 0xFF, 0x68, 0x46, 0xD1, 0x1A, 0x8D, 0xA3, 0x34, + 0x18, 0x8F, 0xA1, 0x36, 0xFD, 0x6A, 0x44, 0xD3, 0x45, 0xD2, 0xFC, 0x6B, + 0xA0, 0x37, 0x19, 0x8E, 0x41, 0xD6, 0xF8, 0x6F, 0xA4, 0x33, 0x1D, 0x8A, + 0x1C, 0x8B, 0xA5, 0x32, 0xF9, 0x6E, 0x40, 0xD7, 0xFB, 0x6C, 0x42, 0xD5, + 0x1E, 0x89, 0xA7, 0x30, 0xA6, 0x31, 0x1F, 0x88, 0x43, 0xD4, 0xFA, 0x6D, + 0xF3, 0x64, 0x4A, 0xDD, 0x16, 0x81, 0xAF, 0x38, 0xAE, 0x39, 0x17, 0x80, + 0x4B, 0xDC, 0xF2, 0x65, 0x49, 0xDE, 0xF0, 0x67, 0xAC, 0x3B, 0x15, 0x82, + 0x14, 0x83, 0xAD, 0x3A, 0xF1, 0x66, 0x48, 0xDF, 0x10, 0x87, 0xA9, 0x3E, + 0xF5, 0x62, 0x4C, 0xDB, 0x4D, 0xDA, 0xF4, 0x63, 0xA8, 0x3F, 0x11, 0x86, + 0xAA, 0x3D, 0x13, 0x84, 0x4F, 0xD8, 0xF6, 0x61, 0xF7, 0x60, 0x4E, 0xD9, + 0x12, 0x85, 0xAB, 0x3C }; + +static u8 +adf_pfvf_crc(u8 start_crc, u8 const *buf, u8 len) +{ + u8 crc = start_crc; + + while (len-- > 0) + crc = pfvf_crc8_table[(crc ^ *buf++) & 0xff]; + + return crc; +} + +u8 +adf_pfvf_calc_blkmsg_crc(u8 const *buf, u8 buf_len) +{ + return adf_pfvf_crc(ADF_CRC8_INIT_VALUE, buf, buf_len); +} + +static bool +set_value_on_csr_msg(struct adf_accel_dev *accel_dev, + u32 *csr_msg, + u32 value, + const struct pfvf_field_format *fmt) +{ + if (unlikely((value & fmt->mask) != value)) { + device_printf( + GET_DEV(accel_dev), + "PFVF message value 0x%X out of range, %u max allowed\n", + value, + fmt->mask); + return false; + } + + *csr_msg |= value << fmt->offset; + + return true; +} + +u32 +adf_pfvf_csr_msg_of(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + const struct pfvf_csr_format *fmt) +{ + u32 csr_msg = 0; + + if (!set_value_on_csr_msg(accel_dev, &csr_msg, msg.type, &fmt->type) || + !set_value_on_csr_msg(accel_dev, &csr_msg, msg.data, &fmt->data)) + return 0; + + return csr_msg | ADF_PFVF_MSGORIGIN_SYSTEM; +} + +struct pfvf_message +adf_pfvf_message_of(struct adf_accel_dev *accel_dev, + u32 csr_msg, + const struct pfvf_csr_format *fmt) +{ + struct pfvf_message msg = { 0 }; + + msg.type = (csr_msg >> fmt->type.offset) & fmt->type.mask; + msg.data = (csr_msg >> fmt->data.offset) & fmt->data.mask; + + if (unlikely(!msg.type)) + device_printf(GET_DEV(accel_dev), + "Invalid PFVF msg with no type received\n"); + + return msg; +} diff --git a/sys/dev/qat/qat_common/adf_pfvf_vf_msg.c b/sys/dev/qat/qat_common/adf_pfvf_vf_msg.c new file mode 100644 index 000000000000..5d4d9044362d --- /dev/null +++ b/sys/dev/qat/qat_common/adf_pfvf_vf_msg.c @@ -0,0 +1,185 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include +#include "adf_accel_devices.h" +#include "adf_common_drv.h" +#include "adf_pfvf_msg.h" +#include "adf_pfvf_vf_msg.h" +#include "adf_pfvf_vf_proto.h" + +/** + * adf_vf2pf_notify_init() - send init msg to PF + * @accel_dev: Pointer to acceleration VF device. + * + * Function sends an init message from the VF to a PF + * + * Return: 0 on success, error code otherwise. + */ +int +adf_vf2pf_notify_init(struct adf_accel_dev *accel_dev) +{ + struct pfvf_message msg = { .type = ADF_VF2PF_MSGTYPE_INIT }; + + if (adf_send_vf2pf_msg(accel_dev, msg)) { + device_printf(GET_DEV(accel_dev), + "Failed to send Init event to PF\n"); + return -EFAULT; + } + set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); + return 0; +} + +/** + * adf_vf2pf_notify_shutdown() - send shutdown msg to PF + * @accel_dev: Pointer to acceleration VF device. + * + * Function sends a shutdown message from the VF to a PF + * + * Return: void + */ +void +adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev) +{ + struct pfvf_message msg = { .type = ADF_VF2PF_MSGTYPE_SHUTDOWN }; + + if (test_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status)) + if (adf_send_vf2pf_msg(accel_dev, msg)) + device_printf(GET_DEV(accel_dev), + "Failed to send Shutdown event to PF\n"); +} + +int +adf_vf2pf_request_version(struct adf_accel_dev *accel_dev) +{ + u8 pf_version; + int compat; + int ret; + struct pfvf_message resp; + struct pfvf_message msg = { + .type = ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ, + .data = ADF_PFVF_COMPAT_THIS_VERSION, + }; + + BUILD_BUG_ON(ADF_PFVF_COMPAT_THIS_VERSION > 255); + + ret = adf_send_vf2pf_req(accel_dev, msg, &resp); + if (ret) { + device_printf( + GET_DEV(accel_dev), + "Failed to send Compatibility Version Request.\n"); + return ret; + } + + pf_version = FIELD_GET(ADF_PF2VF_VERSION_RESP_VERS_MASK, resp.data); + compat = FIELD_GET(ADF_PF2VF_VERSION_RESP_RESULT_MASK, resp.data); + + /* Response from PF received, check compatibility */ + switch (compat) { + case ADF_PF2VF_VF_COMPATIBLE: + break; + case ADF_PF2VF_VF_COMPAT_UNKNOWN: + /* VF is newer than PF - compatible for now */ + break; + case ADF_PF2VF_VF_INCOMPATIBLE: + device_printf( + GET_DEV(accel_dev), + "PF (vers %d) and VF (vers %d) are not compatible\n", + pf_version, + ADF_PFVF_COMPAT_THIS_VERSION); + return -EINVAL; + default: + device_printf( + GET_DEV(accel_dev), + "Invalid response from PF; assume not compatible\n"); + return -EINVAL; + } + + accel_dev->u1.vf.pf_compat_ver = pf_version; + return 0; +} + +int +adf_vf2pf_get_capabilities(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + struct capabilities_v3 cap_msg = { 0 }; + unsigned int len = sizeof(cap_msg); + + if (accel_dev->u1.vf.pf_compat_ver < ADF_PFVF_COMPAT_CAPABILITIES) + /* The PF is too old to support the extended capabilities */ + return 0; + + if (adf_send_vf2pf_blkmsg_req(accel_dev, + ADF_VF2PF_BLKMSG_REQ_CAP_SUMMARY, + (u8 *)&cap_msg, + &len)) { + device_printf(GET_DEV(accel_dev), + "QAT: Failed to get block message response\n"); + return -EFAULT; + } + + switch (cap_msg.hdr.version) { + default: + /* Newer version received, handle only the know parts */ + fallthrough; + case ADF_PFVF_CAPABILITIES_V3_VERSION: + if (likely(len >= sizeof(struct capabilities_v3))) + hw_data->clock_frequency = cap_msg.frequency; + else + device_printf(GET_DEV(accel_dev), + "Could not get frequency"); + fallthrough; + case ADF_PFVF_CAPABILITIES_V2_VERSION: + if (likely(len >= sizeof(struct capabilities_v2))) { + hw_data->accel_capabilities_mask = cap_msg.capabilities; + } else { + device_printf(GET_DEV(accel_dev), + "Could not get capabilities"); + } + fallthrough; + case ADF_PFVF_CAPABILITIES_V1_VERSION: + if (likely(len >= sizeof(struct capabilities_v1))) { + hw_data->extended_dc_capabilities = cap_msg.ext_dc_caps; + } else { + device_printf( + GET_DEV(accel_dev), + "Capabilities message truncated to %d bytes\n", + len); + return -EFAULT; + } + } + + return 0; +} + +int +adf_vf2pf_get_ring_to_svc(struct adf_accel_dev *accel_dev) +{ + struct ring_to_svc_map_v1 rts_map_msg = { 0 }; + unsigned int len = sizeof(rts_map_msg); + + if (accel_dev->u1.vf.pf_compat_ver < ADF_PFVF_COMPAT_RING_TO_SVC_MAP) + /* Use already set default mappings */ + return 0; + + if (adf_send_vf2pf_blkmsg_req(accel_dev, + ADF_VF2PF_BLKMSG_REQ_RING_SVC_MAP, + (u8 *)&rts_map_msg, + &len)) { + device_printf(GET_DEV(accel_dev), + "QAT: Failed to get block message response\n"); + return -EFAULT; + } + + if (unlikely(len < sizeof(struct ring_to_svc_map_v1))) { + device_printf(GET_DEV(accel_dev), + "RING_TO_SVC message truncated to %d bytes\n", + len); + return -EFAULT; + } + + /* Only v1 at present */ + accel_dev->hw_device->ring_to_svc_map = rts_map_msg.map; + return 0; +} diff --git a/sys/dev/qat/qat_common/adf_pfvf_vf_proto.c b/sys/dev/qat/qat_common/adf_pfvf_vf_proto.c new file mode 100644 index 000000000000..04a5133dd90d --- /dev/null +++ b/sys/dev/qat/qat_common/adf_pfvf_vf_proto.c @@ -0,0 +1,405 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include +#include "adf_accel_devices.h" +#include "adf_common_drv.h" +#include "adf_pfvf_msg.h" +#include "adf_pfvf_utils.h" +#include "adf_pfvf_vf_msg.h" +#include "adf_pfvf_vf_proto.h" + +#define __bf_shf(x) (__builtin_ffsll(x) - 1) + +#define FIELD_MAX(_mask) ({ (typeof(_mask))((_mask) >> __bf_shf(_mask)); }) + +#define FIELD_PREP(_mask, _val) \ + ({ ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); }) + +#define FIELD_GET(_mask, _reg) \ + ({ (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); }) + +/** + * adf_send_vf2pf_msg() - send VF to PF message + * @accel_dev: Pointer to acceleration device + * @msg: Message to send + * + * This function allows the VF to send a message to the PF. + * + * Return: 0 on success, error code otherwise. + */ +int +adf_send_vf2pf_msg(struct adf_accel_dev *accel_dev, struct pfvf_message msg) +{ + struct adf_pfvf_ops *pfvf_ops = GET_PFVF_OPS(accel_dev); + u32 pfvf_offset = pfvf_ops->get_pf2vf_offset(0); + + int ret = pfvf_ops->send_msg(accel_dev, + msg, + pfvf_offset, + &accel_dev->u1.vf.vf2pf_lock); + return ret; +} + +/** + * adf_recv_pf2vf_msg() - receive a PF to VF message + * @accel_dev: Pointer to acceleration device + * + * This function allows the VF to receive a message from the PF. + * + * Return: a valid message on success, zero otherwise. + */ +static struct pfvf_message +adf_recv_pf2vf_msg(struct adf_accel_dev *accel_dev) +{ + struct adf_pfvf_ops *pfvf_ops = GET_PFVF_OPS(accel_dev); + u32 pfvf_offset = pfvf_ops->get_vf2pf_offset(0); // 1008 + return pfvf_ops->recv_msg(accel_dev, + pfvf_offset, + accel_dev->u1.vf.pf_compat_ver); +} + +/** + * adf_send_vf2pf_req() - send VF2PF request message + * @accel_dev: Pointer to acceleration device. + * @msg: Request message to send + * @resp: Returned PF response + * + * This function sends a message that requires a response from the VF to the PF + * and waits for a reply. + * + * Return: 0 on success, error code otherwise. + */ +int +adf_send_vf2pf_req(struct adf_accel_dev *accel_dev, + struct pfvf_message msg, + struct pfvf_message *resp) +{ + unsigned long timeout = msecs_to_jiffies(ADF_PFVF_MSG_RESP_TIMEOUT); + unsigned int retries = ADF_PFVF_MSG_RESP_RETRIES; + int ret; + + reinit_completion(&accel_dev->u1.vf.msg_received); + /* Send request from VF to PF */ + do { + ret = adf_send_vf2pf_msg(accel_dev, msg); + if (ret) { + device_printf(GET_DEV(accel_dev), + "Failed to send request msg to PF\n"); + return ret; + } + + /* Wait for response, if it times out retry */ + ret = + wait_for_completion_timeout(&accel_dev->u1.vf.msg_received, + timeout); + if (ret) { + if (likely(resp)) + *resp = accel_dev->u1.vf.response; + + /* Once copied, set to an invalid value */ + accel_dev->u1.vf.response.type = 0; + + return 0; + } + + device_printf(GET_DEV(accel_dev), + "PFVF response message timeout\n"); + } while (--retries); + + return -EIO; +} + +static int +adf_vf2pf_blkmsg_data_req(struct adf_accel_dev *accel_dev, + bool crc, + u8 *type, + u8 *data) +{ + struct pfvf_message req = { 0 }; + struct pfvf_message resp = { 0 }; + u8 blk_type; + u8 blk_byte; + u8 msg_type; + u8 max_data; + int err; + + /* Convert the block type to {small, medium, large} size category */ + if (*type <= ADF_VF2PF_SMALL_BLOCK_TYPE_MAX) { + msg_type = ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ; + blk_type = FIELD_PREP(ADF_VF2PF_SMALL_BLOCK_TYPE_MASK, *type); + blk_byte = FIELD_PREP(ADF_VF2PF_SMALL_BLOCK_BYTE_MASK, *data); + max_data = ADF_VF2PF_SMALL_BLOCK_BYTE_MAX; + } else if (*type <= ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX) { + msg_type = ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ; + blk_type = FIELD_PREP(ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK, + *type - ADF_VF2PF_SMALL_BLOCK_TYPE_MAX); + blk_byte = FIELD_PREP(ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK, *data); + max_data = ADF_VF2PF_MEDIUM_BLOCK_BYTE_MAX; + } else if (*type <= ADF_VF2PF_LARGE_BLOCK_TYPE_MAX) { + msg_type = ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ; + blk_type = FIELD_PREP(ADF_VF2PF_LARGE_BLOCK_TYPE_MASK, + *type - ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX); + blk_byte = FIELD_PREP(ADF_VF2PF_LARGE_BLOCK_BYTE_MASK, *data); + max_data = ADF_VF2PF_LARGE_BLOCK_BYTE_MAX; + } else { + device_printf(GET_DEV(accel_dev), + "Invalid message type %u\n", + *type); + return -EINVAL; + } + + /* Sanity check */ + if (*data > max_data) { + device_printf(GET_DEV(accel_dev), + "Invalid byte %s %u for message type %u\n", + crc ? "count" : "index", + *data, + *type); + return -EINVAL; + } + + /* Build the block message */ + req.type = msg_type; + req.data = + blk_type | blk_byte | FIELD_PREP(ADF_VF2PF_BLOCK_CRC_REQ_MASK, crc); + + err = adf_send_vf2pf_req(accel_dev, req, &resp); + if (err) + return err; + + *type = FIELD_GET(ADF_PF2VF_BLKMSG_RESP_TYPE_MASK, resp.data); + *data = FIELD_GET(ADF_PF2VF_BLKMSG_RESP_DATA_MASK, resp.data); + + return 0; +} + +static int +adf_vf2pf_blkmsg_get_byte(struct adf_accel_dev *accel_dev, + u8 type, + u8 index, + u8 *data) +{ + int ret; + + ret = adf_vf2pf_blkmsg_data_req(accel_dev, false, &type, &index); + if (ret < 0) + return ret; + + if (unlikely(type != ADF_PF2VF_BLKMSG_RESP_TYPE_DATA)) { + device_printf(GET_DEV(accel_dev), + "Unexpected BLKMSG response type %u, byte 0x%x\n", + type, + index); + return -EFAULT; + } + + *data = index; + return 0; +} + +static int +adf_vf2pf_blkmsg_get_crc(struct adf_accel_dev *accel_dev, + u8 type, + u8 bytes, + u8 *crc) +{ + int ret; + + /* The count of bytes refers to a length, however shift it to a 0-based + * count to avoid overflows. Thus, a request for 0 bytes is technically + * valid. + */ + --bytes; + + ret = adf_vf2pf_blkmsg_data_req(accel_dev, true, &type, &bytes); + if (ret < 0) + return ret; + + if (unlikely(type != ADF_PF2VF_BLKMSG_RESP_TYPE_CRC)) { + device_printf( + GET_DEV(accel_dev), + "Unexpected CRC BLKMSG response type %u, crc 0x%x\n", + type, + bytes); + return -EFAULT; + } + + *crc = bytes; + return 0; +} + +/** + * adf_send_vf2pf_blkmsg_req() - retrieve block message + * @accel_dev: Pointer to acceleration VF device. + * @type: The block message type, see adf_pfvf_msg.h for allowed values + * @buffer: input buffer where to place the received data + * @buffer_len: buffer length as input, the amount of written bytes on output + * + * Request a message of type 'type' over the block message transport. + * This function will send the required amount block message requests and + * return the overall content back to the caller through the provided buffer. + * The buffer should be large enough to contain the requested message type, + * otherwise the response will be truncated. + * + * Return: 0 on success, error code otherwise. + */ +int +adf_send_vf2pf_blkmsg_req(struct adf_accel_dev *accel_dev, + u8 type, + u8 *buffer, + unsigned int *buffer_len) +{ + unsigned int index; + unsigned int msg_len; + int ret; + u8 remote_crc; + u8 local_crc; + + if (unlikely(type > ADF_VF2PF_LARGE_BLOCK_TYPE_MAX)) { + device_printf(GET_DEV(accel_dev), + "Invalid block message type %d\n", + type); + return -EINVAL; + } + + if (unlikely(*buffer_len < ADF_PFVF_BLKMSG_HEADER_SIZE)) { + device_printf(GET_DEV(accel_dev), + "Buffer size too small for a block message\n"); + return -EINVAL; + } + + ret = adf_vf2pf_blkmsg_get_byte(accel_dev, + type, + ADF_PFVF_BLKMSG_VER_BYTE, + &buffer[ADF_PFVF_BLKMSG_VER_BYTE]); + if (unlikely(ret)) + return ret; + + if (unlikely(!buffer[ADF_PFVF_BLKMSG_VER_BYTE])) { + device_printf(GET_DEV(accel_dev), + "Invalid version 0 received for block request %u", + type); + return -EFAULT; + } + + ret = adf_vf2pf_blkmsg_get_byte(accel_dev, + type, + ADF_PFVF_BLKMSG_LEN_BYTE, + &buffer[ADF_PFVF_BLKMSG_LEN_BYTE]); + if (unlikely(ret)) + return ret; + + if (unlikely(!buffer[ADF_PFVF_BLKMSG_LEN_BYTE])) { + device_printf(GET_DEV(accel_dev), + "Invalid size 0 received for block request %u", + type); + return -EFAULT; + } + + /* We need to pick the minimum since there is no way to request a + * specific version. As a consequence any scenario is possible: + * - PF has a newer (longer) version which doesn't fit in the buffer + * - VF expects a newer (longer) version, so we must not ask for + * bytes in excess + * - PF and VF share the same version, no problem + */ + msg_len = + ADF_PFVF_BLKMSG_HEADER_SIZE + buffer[ADF_PFVF_BLKMSG_LEN_BYTE]; + msg_len = min(*buffer_len, msg_len); + + /* Get the payload */ + for (index = ADF_PFVF_BLKMSG_HEADER_SIZE; index < msg_len; index++) { + ret = adf_vf2pf_blkmsg_get_byte(accel_dev, + type, + index, + &buffer[index]); + if (unlikely(ret)) + return ret; + } + + ret = adf_vf2pf_blkmsg_get_crc(accel_dev, type, msg_len, &remote_crc); + if (unlikely(ret)) + return ret; + + local_crc = adf_pfvf_calc_blkmsg_crc(buffer, msg_len); + if (unlikely(local_crc != remote_crc)) { + device_printf( + GET_DEV(accel_dev), + "CRC error on msg type %d. Local %02X, remote %02X\n", + type, + local_crc, + remote_crc); + return -EIO; + } + + *buffer_len = msg_len; + return 0; +} + +static bool +adf_handle_pf2vf_msg(struct adf_accel_dev *accel_dev, struct pfvf_message msg) +{ + switch (msg.type) { + case ADF_PF2VF_MSGTYPE_RESTARTING: + adf_pf2vf_handle_pf_restarting(accel_dev); + return false; + case ADF_PF2VF_MSGTYPE_RP_RESET_RESP: + adf_pf2vf_handle_pf_rp_reset(accel_dev, msg); + return true; + case ADF_PF2VF_MSGTYPE_VERSION_RESP: + case ADF_PF2VF_MSGTYPE_BLKMSG_RESP: + accel_dev->u1.vf.response = msg; + complete(&accel_dev->u1.vf.msg_received); + return true; + default: + device_printf( + GET_DEV(accel_dev), + "Unknown message from PF (type 0x%.4x, data: 0x%.4x)\n", + msg.type, + msg.data); + } + + return false; +} + +bool +adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev) +{ + struct pfvf_message msg; + + msg = adf_recv_pf2vf_msg(accel_dev); + if (msg.type) /* Invalid or no message */ + return adf_handle_pf2vf_msg(accel_dev, msg); + + /* No replies for PF->VF messages at present */ + + return true; +} + +/** + * adf_enable_vf2pf_comms() - Function enables communication from vf to pf + * + * @accel_dev: Pointer to acceleration device virtual function. + * + * Return: 0 on success, error code otherwise. + */ +int +adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + int ret; + + hw_data->enable_pf2vf_interrupt(accel_dev); + + ret = adf_vf2pf_request_version(accel_dev); + if (ret) + return ret; + + ret = adf_vf2pf_get_capabilities(accel_dev); + if (ret) + return ret; + + ret = adf_vf2pf_get_ring_to_svc(accel_dev); + return ret; +} diff --git a/sys/dev/qat/qat_common/adf_transport.c b/sys/dev/qat/qat_common/adf_transport.c index a608cb1c217c..5806f511db07 100644 --- a/sys/dev/qat/qat_common/adf_transport.c +++ b/sys/dev/qat/qat_common/adf_transport.c @@ -1,770 +1,776 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_accel_devices.h" #include "icp_qat_uclo.h" #include "icp_qat_fw.h" #include "icp_qat_fw_init_admin.h" #include "adf_cfg_strings.h" #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" #include #include "adf_accel_devices.h" #include "adf_transport_internal.h" #include "adf_transport_access_macros.h" #include "adf_cfg.h" #include "adf_common_drv.h" #define QAT_RING_ALIGNMENT 64 static inline u32 adf_modulo(u32 data, u32 shift) { u32 div = data >> shift; u32 mult = div << shift; return data - mult; } static inline int adf_check_ring_alignment(u64 addr, u64 size) { if (((size - 1) & addr) != 0) return EFAULT; return 0; } static int adf_verify_ring_size(u32 msg_size, u32 msg_num) { int i = ADF_MIN_RING_SIZE; for (; i <= ADF_MAX_RING_SIZE; i++) if ((msg_size * msg_num) == ADF_SIZE_TO_RING_SIZE_IN_BYTES(i)) return i; return ADF_DEFAULT_RING_SIZE; } static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) { mtx_lock(&bank->lock); if (bank->ring_mask & (1 << ring)) { mtx_unlock(&bank->lock); return EFAULT; } bank->ring_mask |= (1 << ring); mtx_unlock(&bank->lock); return 0; } static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) { mtx_lock(&bank->lock); bank->ring_mask &= ~(1 << ring); mtx_unlock(&bank->lock); } static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); + u32 enable_int_col_mask = 0; + + if (csr_ops->get_int_col_ctl_enable_mask) + enable_int_col_mask = csr_ops->get_int_col_ctl_enable_mask(); mtx_lock(&bank->lock); bank->irq_mask |= (1 << ring); mtx_unlock(&bank->lock); csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, bank->irq_mask); csr_ops->write_csr_int_col_ctl(bank->csr_addr, bank->bank_number, - bank->irq_coalesc_timer); + bank->irq_coalesc_timer | + enable_int_col_mask); } static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); mtx_lock(&bank->lock); bank->irq_mask &= ~(1 << ring); mtx_unlock(&bank->lock); csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, bank->irq_mask); } int adf_send_message(struct adf_etr_ring_data *ring, u32 *msg) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); u32 msg_size = 0; if (atomic_add_return(1, ring->inflights) > ring->max_inflights) { atomic_dec(ring->inflights); return EAGAIN; } msg_size = ADF_MSG_SIZE_TO_BYTES(ring->msg_size); mtx_lock(&ring->lock); memcpy((void *)((uintptr_t)ring->base_addr + ring->tail), msg, msg_size); ring->tail = adf_modulo(ring->tail + msg_size, ADF_RING_SIZE_MODULO(ring->ring_size)); csr_ops->write_csr_ring_tail(ring->bank->csr_addr, ring->bank->bank_number, ring->ring_number, ring->tail); ring->csr_tail_offset = ring->tail; mtx_unlock(&ring->lock); return 0; } int adf_handle_response(struct adf_etr_ring_data *ring, u32 quota) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); u32 msg_counter = 0; u32 *msg = (u32 *)((uintptr_t)ring->base_addr + ring->head); if (!quota) quota = ADF_NO_RESPONSE_QUOTA; while ((*msg != ADF_RING_EMPTY_SIG) && (msg_counter < quota)) { ring->callback((u32 *)msg); atomic_dec(ring->inflights); *msg = ADF_RING_EMPTY_SIG; - ring->head = adf_modulo(ring->head + ADF_MSG_SIZE_TO_BYTES( - ring->msg_size), - ADF_RING_SIZE_MODULO(ring->ring_size)); + ring->head = + adf_modulo(ring->head + + ADF_MSG_SIZE_TO_BYTES(ring->msg_size), + ADF_RING_SIZE_MODULO(ring->ring_size)); msg_counter++; msg = (u32 *)((uintptr_t)ring->base_addr + ring->head); } if (msg_counter > 0) csr_ops->write_csr_ring_head(ring->bank->csr_addr, ring->bank->bank_number, ring->ring_number, ring->head); return msg_counter; } int adf_poll_bank(u32 accel_id, u32 bank_num, u32 quota) { int num_resp; struct adf_accel_dev *accel_dev; struct adf_etr_data *trans_data; struct adf_etr_bank_data *bank; struct adf_etr_ring_data *ring; struct adf_hw_csr_ops *csr_ops; u32 rings_not_empty; u32 ring_num; u32 resp_total = 0; u32 num_rings_per_bank; /* Find the accel device associated with the accelId * passed in. */ accel_dev = adf_devmgr_get_dev_by_id(accel_id); if (!accel_dev) { pr_err("There is no device with id: %d\n", accel_id); return EINVAL; } csr_ops = GET_CSR_OPS(accel_dev); trans_data = accel_dev->transport; bank = &trans_data->banks[bank_num]; mtx_lock(&bank->lock); /* Read the ring status CSR to determine which rings are empty. */ rings_not_empty = csr_ops->read_csr_e_stat(bank->csr_addr, bank->bank_number); /* Complement to find which rings have data to be processed. */ rings_not_empty = (~rings_not_empty) & bank->ring_mask; /* Return RETRY if the bank polling rings * are all empty. */ if (!(rings_not_empty & bank->ring_mask)) { mtx_unlock(&bank->lock); return EAGAIN; } /* * Loop over all rings within this bank. * The ring structure is global to all * rings hence while we loop over all rings in the * bank we use ring_number to get the global ring. */ num_rings_per_bank = accel_dev->hw_device->num_rings_per_bank; for (ring_num = 0; ring_num < num_rings_per_bank; ring_num++) { ring = &bank->rings[ring_num]; /* And with polling ring mask. * If the there is no data on this ring * move to the next one. */ if (!(rings_not_empty & (1 << ring->ring_number))) continue; /* Poll the ring. */ num_resp = adf_handle_response(ring, quota); resp_total += num_resp; } mtx_unlock(&bank->lock); /* Return SUCCESS if there's any response message * returned. */ if (resp_total) return 0; return EAGAIN; } int adf_poll_all_banks(u32 accel_id, u32 quota) { int status = EAGAIN; struct adf_accel_dev *accel_dev; struct adf_etr_data *trans_data; struct adf_etr_bank_data *bank; u32 bank_num; u32 stat_total = 0; /* Find the accel device associated with the accelId * passed in. */ accel_dev = adf_devmgr_get_dev_by_id(accel_id); if (!accel_dev) { pr_err("There is no device with id: %d\n", accel_id); return EINVAL; } /* Loop over banks and call adf_poll_bank */ trans_data = accel_dev->transport; for (bank_num = 0; bank_num < GET_MAX_BANKS(accel_dev); bank_num++) { bank = &trans_data->banks[bank_num]; /* if there are no polling rings on this bank * continue to the next bank number. */ if (bank->ring_mask == 0) continue; status = adf_poll_bank(accel_id, bank_num, quota); /* The successful status should be AGAIN or 0 */ if (status == 0) stat_total++; else if (status != EAGAIN) return status; } /* Return SUCCESS if adf_poll_bank returned SUCCESS * at any stage. adf_poll_bank cannot * return fail in the above case. */ if (stat_total) return 0; return EAGAIN; } static void adf_configure_tx_ring(struct adf_etr_ring_data *ring) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); u32 ring_config = BUILD_RING_CONFIG(ring->ring_size); csr_ops->write_csr_ring_config(ring->bank->csr_addr, ring->bank->bank_number, ring->ring_number, ring_config); } static void adf_configure_rx_ring(struct adf_etr_ring_data *ring) { struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); u32 ring_config = BUILD_RESP_RING_CONFIG(ring->ring_size, ADF_RING_NEAR_WATERMARK_512, ADF_RING_NEAR_WATERMARK_0); csr_ops->write_csr_ring_config(ring->bank->csr_addr, ring->bank->bank_number, ring->ring_number, ring_config); } static int adf_init_ring(struct adf_etr_ring_data *ring) { struct adf_etr_bank_data *bank = ring->bank; struct adf_accel_dev *accel_dev = bank->accel_dev; struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); u64 ring_base; u32 ring_size_bytes = ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size); ring_size_bytes = ADF_RING_SIZE_BYTES_MIN(ring_size_bytes); int ret; ret = bus_dma_mem_create(&ring->dma_mem, accel_dev->dma_tag, ring_size_bytes, BUS_SPACE_MAXADDR, ring_size_bytes, M_WAITOK | M_ZERO); if (ret) return ret; ring->base_addr = ring->dma_mem.dma_vaddr; ring->dma_addr = ring->dma_mem.dma_baddr; memset(ring->base_addr, 0x7F, ring_size_bytes); /* The base_addr has to be aligned to the size of the buffer */ if (adf_check_ring_alignment(ring->dma_addr, ring_size_bytes)) { device_printf(GET_DEV(accel_dev), "Ring address not aligned\n"); bus_dma_mem_free(&ring->dma_mem); ring->base_addr = NULL; return EFAULT; } if (hw_data->tx_rings_mask & (1 << ring->ring_number)) adf_configure_tx_ring(ring); else adf_configure_rx_ring(ring); ring_base = csr_ops->build_csr_ring_base_addr(ring->dma_addr, ring->ring_size); csr_ops->write_csr_ring_base(ring->bank->csr_addr, ring->bank->bank_number, ring->ring_number, ring_base); mtx_init(&ring->lock, "adf bank", NULL, MTX_DEF); return 0; } static void adf_cleanup_ring(struct adf_etr_ring_data *ring) { u32 ring_size_bytes = ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size); ring_size_bytes = ADF_RING_SIZE_BYTES_MIN(ring_size_bytes); if (ring->base_addr) { explicit_bzero(ring->base_addr, ring_size_bytes); bus_dma_mem_free(&ring->dma_mem); } mtx_destroy(&ring->lock); } int adf_create_ring(struct adf_accel_dev *accel_dev, const char *section, u32 bank_num, u32 num_msgs, u32 msg_size, const char *ring_name, adf_callback_fn callback, int poll_mode, struct adf_etr_ring_data **ring_ptr) { struct adf_etr_data *transport_data = accel_dev->transport; struct adf_etr_bank_data *bank; struct adf_etr_ring_data *ring; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u32 ring_num; int ret; u8 num_rings_per_bank = accel_dev->hw_device->num_rings_per_bank; if (bank_num >= GET_MAX_BANKS(accel_dev)) { device_printf(GET_DEV(accel_dev), "Invalid bank number\n"); return EFAULT; } if (msg_size > ADF_MSG_SIZE_TO_BYTES(ADF_MAX_MSG_SIZE)) { device_printf(GET_DEV(accel_dev), "Invalid msg size\n"); return EFAULT; } if (ADF_MAX_INFLIGHTS(adf_verify_ring_size(msg_size, num_msgs), ADF_BYTES_TO_MSG_SIZE(msg_size)) < 2) { device_printf(GET_DEV(accel_dev), "Invalid ring size for given msg size\n"); return EFAULT; } if (adf_cfg_get_param_value(accel_dev, section, ring_name, val)) { device_printf(GET_DEV(accel_dev), "Section %s, no such entry : %s\n", section, ring_name); return EFAULT; } if (compat_strtouint(val, 10, &ring_num)) { device_printf(GET_DEV(accel_dev), "Can't get ring number\n"); return EFAULT; } if (ring_num >= num_rings_per_bank) { device_printf(GET_DEV(accel_dev), "Invalid ring number\n"); return EFAULT; } bank = &transport_data->banks[bank_num]; if (adf_reserve_ring(bank, ring_num)) { device_printf(GET_DEV(accel_dev), "Ring %d, %s already exists.\n", ring_num, ring_name); return EFAULT; } ring = &bank->rings[ring_num]; ring->ring_number = ring_num; ring->bank = bank; ring->callback = callback; ring->msg_size = ADF_BYTES_TO_MSG_SIZE(msg_size); ring->ring_size = adf_verify_ring_size(msg_size, num_msgs); ring->max_inflights = ADF_MAX_INFLIGHTS(ring->ring_size, ring->msg_size); ring->head = 0; ring->tail = 0; ring->csr_tail_offset = 0; ret = adf_init_ring(ring); if (ret) goto err; /* Enable HW arbitration for the given ring */ adf_update_ring_arb(ring); if (adf_ring_debugfs_add(ring, ring_name)) { device_printf(GET_DEV(accel_dev), "Couldn't add ring debugfs entry\n"); ret = EFAULT; goto err; } /* Enable interrupts if needed */ if (callback && !poll_mode) adf_enable_ring_irq(bank, ring->ring_number); *ring_ptr = ring; return 0; err: adf_cleanup_ring(ring); adf_unreserve_ring(bank, ring_num); adf_update_ring_arb(ring); return ret; } void adf_remove_ring(struct adf_etr_ring_data *ring) { struct adf_etr_bank_data *bank = ring->bank; struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); /* Disable interrupts for the given ring */ adf_disable_ring_irq(bank, ring->ring_number); /* Clear PCI config space */ csr_ops->write_csr_ring_config(bank->csr_addr, bank->bank_number, ring->ring_number, 0); csr_ops->write_csr_ring_base(bank->csr_addr, bank->bank_number, ring->ring_number, 0); adf_ring_debugfs_rm(ring); adf_unreserve_ring(bank, ring->ring_number); /* Disable HW arbitration for the given ring */ adf_update_ring_arb(ring); adf_cleanup_ring(ring); } static void adf_ring_response_handler(struct adf_etr_bank_data *bank) { struct adf_accel_dev *accel_dev = bank->accel_dev; struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); u8 num_rings_per_bank = hw_data->num_rings_per_bank; u32 empty_rings, i; empty_rings = csr_ops->read_csr_e_stat(bank->csr_addr, bank->bank_number); empty_rings = ~empty_rings & bank->irq_mask; for (i = 0; i < num_rings_per_bank; ++i) { if (empty_rings & (1 << i)) adf_handle_response(&bank->rings[i], 0); } } void adf_response_handler(uintptr_t bank_addr) { struct adf_etr_bank_data *bank = (void *)bank_addr; struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); /* Handle all the responses and re-enable IRQs */ adf_ring_response_handler(bank); csr_ops->write_csr_int_flag_and_col(bank->csr_addr, bank->bank_number, bank->irq_mask); } static inline int adf_get_cfg_int(struct adf_accel_dev *accel_dev, const char *section, const char *format, u32 key, u32 *value) { char key_buf[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val_buf[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; snprintf(key_buf, ADF_CFG_MAX_KEY_LEN_IN_BYTES, format, key); if (adf_cfg_get_param_value(accel_dev, section, key_buf, val_buf)) return EFAULT; if (compat_strtouint(val_buf, 10, value)) return EFAULT; return 0; } static void adf_get_coalesc_timer(struct adf_etr_bank_data *bank, const char *section, u32 bank_num_in_accel) { struct adf_accel_dev *accel_dev = bank->accel_dev; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 coalesc_timer = ADF_COALESCING_DEF_TIME; adf_get_cfg_int(accel_dev, section, ADF_ETRMGR_COALESCE_TIMER_FORMAT, bank_num_in_accel, &coalesc_timer); if (hw_data->get_clock_speed) bank->irq_coalesc_timer = (coalesc_timer * (hw_data->get_clock_speed(hw_data) / USEC_PER_SEC)) / NSEC_PER_USEC; else bank->irq_coalesc_timer = coalesc_timer; if (bank->irq_coalesc_timer > ADF_COALESCING_MAX_TIME) bank->irq_coalesc_timer = ADF_COALESCING_MAX_TIME; else if (bank->irq_coalesc_timer < ADF_COALESCING_MIN_TIME) bank->irq_coalesc_timer = ADF_COALESCING_MIN_TIME; } static int adf_init_bank(struct adf_accel_dev *accel_dev, struct adf_etr_bank_data *bank, u32 bank_num, struct resource *csr_addr) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct adf_hw_csr_ops *csr_ops = &hw_data->csr_info.csr_ops; struct adf_etr_ring_data *ring; struct adf_etr_ring_data *tx_ring; u32 i, coalesc_enabled = 0; u8 num_rings_per_bank = hw_data->num_rings_per_bank; u32 irq_mask = BIT(num_rings_per_bank) - 1; u32 size = 0; explicit_bzero(bank, sizeof(*bank)); bank->bank_number = bank_num; bank->csr_addr = csr_addr; bank->accel_dev = accel_dev; mtx_init(&bank->lock, "adf bank", NULL, MTX_DEF); /* Allocate the rings in the bank */ size = num_rings_per_bank * sizeof(struct adf_etr_ring_data); bank->rings = kzalloc_node(size, M_WAITOK | M_ZERO, dev_to_node(GET_DEV(accel_dev))); /* Enable IRQ coalescing always. This will allow to use * the optimised flag and coalesc register. * If it is disabled in the config file just use min time value */ if ((adf_get_cfg_int(accel_dev, "Accelerator0", ADF_ETRMGR_COALESCING_ENABLED_FORMAT, bank_num, &coalesc_enabled) == 0) && coalesc_enabled) adf_get_coalesc_timer(bank, "Accelerator0", bank_num); else bank->irq_coalesc_timer = ADF_COALESCING_MIN_TIME; for (i = 0; i < num_rings_per_bank; i++) { csr_ops->write_csr_ring_config(csr_addr, bank_num, i, 0); csr_ops->write_csr_ring_base(csr_addr, bank_num, i, 0); ring = &bank->rings[i]; if (hw_data->tx_rings_mask & (1 << i)) { ring->inflights = kzalloc_node(sizeof(atomic_t), M_WAITOK | M_ZERO, dev_to_node(GET_DEV(accel_dev))); } else { if (i < hw_data->tx_rx_gap) { device_printf(GET_DEV(accel_dev), "Invalid tx rings mask config\n"); goto err; } tx_ring = &bank->rings[i - hw_data->tx_rx_gap]; ring->inflights = tx_ring->inflights; } } if (adf_bank_debugfs_add(bank)) { device_printf(GET_DEV(accel_dev), "Failed to add bank debugfs entry\n"); goto err; } csr_ops->write_csr_int_flag(csr_addr, bank_num, irq_mask); csr_ops->write_csr_int_srcsel(csr_addr, bank_num); return 0; err: for (i = 0; i < num_rings_per_bank; i++) { ring = &bank->rings[i]; if (hw_data->tx_rings_mask & (1 << i)) { kfree(ring->inflights); ring->inflights = NULL; } } kfree(bank->rings); return ENOMEM; } /** * adf_init_etr_data() - Initialize transport rings for acceleration device * @accel_dev: Pointer to acceleration device. * * Function initializes the communications channels (rings) to the * acceleration device accel_dev. * To be used by QAT device specific drivers. * * Return: 0 on success, error code otherwise. */ int adf_init_etr_data(struct adf_accel_dev *accel_dev) { struct adf_etr_data *etr_data; struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct resource *csr_addr; u32 size; u32 num_banks = 0; int i, ret; etr_data = kzalloc_node(sizeof(*etr_data), M_WAITOK | M_ZERO, dev_to_node(GET_DEV(accel_dev))); num_banks = GET_MAX_BANKS(accel_dev); size = num_banks * sizeof(struct adf_etr_bank_data); etr_data->banks = kzalloc_node(size, M_WAITOK | M_ZERO, dev_to_node(GET_DEV(accel_dev))); accel_dev->transport = etr_data; i = hw_data->get_etr_bar_id(hw_data); csr_addr = accel_dev->accel_pci_dev.pci_bars[i].virt_addr; etr_data->debug = SYSCTL_ADD_NODE(&accel_dev->sysctl_ctx, SYSCTL_CHILDREN( device_get_sysctl_tree(GET_DEV(accel_dev))), OID_AUTO, "transport", CTLFLAG_RD, NULL, "Transport parameters"); if (!etr_data->debug) { device_printf(GET_DEV(accel_dev), "Unable to create transport debugfs entry\n"); ret = ENOENT; goto err_bank_all; } for (i = 0; i < num_banks; i++) { ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, csr_addr); if (ret) goto err_bank_all; } return 0; err_bank_all: kfree(etr_data->banks); kfree(etr_data); accel_dev->transport = NULL; return ret; } static void cleanup_bank(struct adf_etr_bank_data *bank) { u32 i; struct adf_accel_dev *accel_dev = bank->accel_dev; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u8 num_rings_per_bank = hw_data->num_rings_per_bank; for (i = 0; i < num_rings_per_bank; i++) { struct adf_accel_dev *accel_dev = bank->accel_dev; struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct adf_etr_ring_data *ring = &bank->rings[i]; if (bank->ring_mask & (1 << i)) adf_cleanup_ring(ring); if (hw_data->tx_rings_mask & (1 << i)) { kfree(ring->inflights); ring->inflights = NULL; } } kfree(bank->rings); adf_bank_debugfs_rm(bank); mtx_destroy(&bank->lock); explicit_bzero(bank, sizeof(*bank)); } static void adf_cleanup_etr_handles(struct adf_accel_dev *accel_dev) { struct adf_etr_data *etr_data = accel_dev->transport; u32 i, num_banks = GET_MAX_BANKS(accel_dev); for (i = 0; i < num_banks; i++) cleanup_bank(&etr_data->banks[i]); } /** * adf_cleanup_etr_data() - Clear transport rings for acceleration device * @accel_dev: Pointer to acceleration device. * * Function is the clears the communications channels (rings) of the * acceleration device accel_dev. * To be used by QAT device specific drivers. * * Return: void */ void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev) { struct adf_etr_data *etr_data = accel_dev->transport; if (etr_data) { adf_cleanup_etr_handles(accel_dev); kfree(etr_data->banks); kfree(etr_data); accel_dev->transport = NULL; } } diff --git a/sys/dev/qat/qat_common/adf_vf2pf_msg.c b/sys/dev/qat/qat_common/adf_vf2pf_msg.c deleted file mode 100644 index bd041c7946ab..000000000000 --- a/sys/dev/qat/qat_common/adf_vf2pf_msg.c +++ /dev/null @@ -1,275 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2007-2022 Intel Corporation */ -/* $FreeBSD$ */ -#include "adf_accel_devices.h" -#include "adf_common_drv.h" -#include "adf_pf2vf_msg.h" - -/** - * adf_vf2pf_init() - send init msg to PF - * @accel_dev: Pointer to acceleration VF device. - * - * Function sends an init messge from the VF to a PF - * - * Return: 0 on success, error code otherwise. - */ -int -adf_vf2pf_init(struct adf_accel_dev *accel_dev) -{ - u32 msg = (ADF_VF2PF_MSGORIGIN_SYSTEM | - (ADF_VF2PF_MSGTYPE_INIT << ADF_VF2PF_MSGTYPE_SHIFT)); - if (adf_iov_notify(accel_dev, msg, 0)) { - device_printf(GET_DEV(accel_dev), - "Failed to send Init event to PF\n"); - return -EFAULT; - } - set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); - return 0; -} - -/** - * adf_vf2pf_shutdown() - send shutdown msg to PF - * @accel_dev: Pointer to acceleration VF device. - * - * Function sends a shutdown messge from the VF to a PF - * - * Return: void - */ -void -adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev) -{ - u32 msg = (ADF_VF2PF_MSGORIGIN_SYSTEM | - (ADF_VF2PF_MSGTYPE_SHUTDOWN << ADF_VF2PF_MSGTYPE_SHIFT)); - mutex_init(&accel_dev->u1.vf.vf2pf_lock); - if (test_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status)) - if (adf_iov_notify(accel_dev, msg, 0)) - device_printf(GET_DEV(accel_dev), - "Failed to send Shutdown event to PF\n"); - mutex_destroy(&accel_dev->u1.vf.vf2pf_lock); -} - -static int -adf_iov_block_get_bc(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 msg_index, - u8 *data, - int get_crc) -{ - u8 blk_type; - u32 msg; - unsigned long timeout = msecs_to_jiffies(ADF_IOV_MSG_RESP_TIMEOUT); - int response_received = 0; - int retry_count = 0; - - msg = ADF_VF2PF_MSGORIGIN_SYSTEM; - if (get_crc) - msg |= 1 << ADF_VF2PF_BLOCK_REQ_CRC_SHIFT; - - if (msg_type <= ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE) { - if (msg_index >= - ADF_VF2PF_SMALL_PAYLOAD_SIZE + ADF_VF2PF_BLOCK_DATA) { - device_printf( - GET_DEV(accel_dev), - "Invalid byte index %d for message type %d\n", - msg_index, - msg_type); - return -EINVAL; - } - msg |= ADF_VF2PF_MSGTYPE_GET_SMALL_BLOCK_REQ - << ADF_VF2PF_MSGTYPE_SHIFT; - blk_type = msg_type; - msg |= blk_type << ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT; - msg |= msg_index << ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_SHIFT; - } else if (msg_type <= ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE) { - if (msg_index >= - ADF_VF2PF_MEDIUM_PAYLOAD_SIZE + ADF_VF2PF_BLOCK_DATA) { - device_printf( - GET_DEV(accel_dev), - "Invalid byte index %d for message type %d\n", - msg_index, - msg_type); - return -EINVAL; - } - msg |= ADF_VF2PF_MSGTYPE_GET_MEDIUM_BLOCK_REQ - << ADF_VF2PF_MSGTYPE_SHIFT; - blk_type = msg_type - ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE; - msg |= blk_type << ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT; - msg |= msg_index << ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_SHIFT; - } else if (msg_type <= ADF_VF2PF_MAX_LARGE_MESSAGE_TYPE) { - if (msg_index >= - ADF_VF2PF_LARGE_PAYLOAD_SIZE + ADF_VF2PF_BLOCK_DATA) { - device_printf( - GET_DEV(accel_dev), - "Invalid byte index %d for message type %d\n", - msg_index, - msg_type); - return -EINVAL; - } - msg |= ADF_VF2PF_MSGTYPE_GET_LARGE_BLOCK_REQ - << ADF_VF2PF_MSGTYPE_SHIFT; - blk_type = msg_type - ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE; - msg |= blk_type << ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT; - msg |= msg_index << ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_SHIFT; - } else { - device_printf(GET_DEV(accel_dev), - "Invalid message type %d\n", - msg_type); - } - accel_dev->u1.vf.iov_msg_completion = 0; - do { - /* Send request from VF to PF */ - if (retry_count) - accel_dev->u1.vf.pfvf_counters.retry++; - if (adf_iov_putmsg(accel_dev, msg, 0)) { - device_printf(GET_DEV(accel_dev), - "Failed to send block request to PF\n"); - return EIO; - } - - /* Wait for response */ - mutex_lock(&accel_dev->u1.vf.vf2pf_lock); - if (accel_dev->u1.vf.iov_msg_completion == 0 && - sx_sleep(&accel_dev->u1.vf.iov_msg_completion, - &accel_dev->u1.vf.vf2pf_lock.sx, - 0, - "pfver", - timeout) == EWOULDBLOCK) { - /* It's possible that wakeup could be missed */ - if (accel_dev->u1.vf.iov_msg_completion) { - response_received = 1; - } else { - device_printf( - GET_DEV(accel_dev), - "IOV request/response message timeout expired\n"); - } - } else { - response_received = 1; - } - mutex_unlock(&accel_dev->u1.vf.vf2pf_lock); - } while (!response_received && - ++retry_count < ADF_IOV_MSG_RESP_RETRIES); - - if (!response_received) - accel_dev->u1.vf.pfvf_counters.rx_timeout++; - else - accel_dev->u1.vf.pfvf_counters.rx_rsp++; - - if (!response_received) - return EIO; - - if (accel_dev->u1.vf.pf2vf_block_resp_type != - (get_crc ? ADF_PF2VF_BLOCK_RESP_TYPE_CRC : - ADF_PF2VF_BLOCK_RESP_TYPE_DATA)) { - device_printf( - GET_DEV(accel_dev), - "%sBlock response type %d, data %d, msg %d, index %d\n", - get_crc ? "CRC " : "", - accel_dev->u1.vf.pf2vf_block_resp_type, - accel_dev->u1.vf.pf2vf_block_byte, - msg_type, - msg_index); - return -EIO; - } - *data = accel_dev->u1.vf.pf2vf_block_byte; - return 0; -} - -static int -adf_iov_block_get_byte(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 msg_index, - u8 *data) -{ - return adf_iov_block_get_bc(accel_dev, msg_type, msg_index, data, 0); -} - -static int -adf_iov_block_get_crc(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 msg_index, - u8 *crc) -{ - return adf_iov_block_get_bc(accel_dev, msg_type, msg_index - 1, crc, 1); -} - -int -adf_iov_block_get(struct adf_accel_dev *accel_dev, - u8 msg_type, - u8 *block_version, - u8 *buffer, - u8 *length) -{ - u8 buf_size = *length; - u8 payload_len; - u8 remote_crc; - u8 local_crc; - u8 buf_index; - int ret; - - if (msg_type > ADF_VF2PF_MAX_LARGE_MESSAGE_TYPE) { - device_printf(GET_DEV(accel_dev), - "Invalid message type %d\n", - msg_type); - return -EINVAL; - } - - ret = adf_iov_block_get_byte(accel_dev, - msg_type, - ADF_VF2PF_BLOCK_VERSION_BYTE, - block_version); - if (ret) - return ret; - ret = adf_iov_block_get_byte(accel_dev, - msg_type, - ADF_VF2PF_BLOCK_LEN_BYTE, - length); - - if (ret) - return ret; - - payload_len = *length; - - if (buf_size < payload_len) { - device_printf( - GET_DEV(accel_dev), - "Truncating block type %d response from %d to %d bytes\n", - msg_type, - payload_len, - buf_size); - payload_len = buf_size; - } - - /* Get the data */ - for (buf_index = 0; buf_index < payload_len; buf_index++) { - ret = adf_iov_block_get_byte(accel_dev, - msg_type, - buf_index + ADF_VF2PF_BLOCK_DATA, - buffer + buf_index); - if (ret) - return ret; - } - - ret = adf_iov_block_get_crc(accel_dev, - msg_type, - payload_len + ADF_VF2PF_BLOCK_DATA, - &remote_crc); - if (ret) - return ret; - local_crc = adf_pfvf_crc(ADF_CRC8_INIT_VALUE, block_version, 1); - local_crc = adf_pfvf_crc(local_crc, length, 1); - local_crc = adf_pfvf_crc(local_crc, buffer, payload_len); - if (local_crc != remote_crc) { - device_printf( - GET_DEV(accel_dev), - "CRC error on msg type %d. Local %02X, remote %02X\n", - msg_type, - local_crc, - remote_crc); - accel_dev->u1.vf.pfvf_counters.crc_err++; - return EIO; - } - - accel_dev->u1.vf.pfvf_counters.blk_rx++; - *length = payload_len; - return 0; -} diff --git a/sys/dev/qat/qat_common/adf_vf_isr.c b/sys/dev/qat/qat_common/adf_vf_isr.c index 2e92133a0b5f..58142c8c965d 100644 --- a/sys/dev/qat/qat_common/adf_vf_isr.c +++ b/sys/dev/qat/qat_common/adf_vf_isr.c @@ -1,393 +1,391 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include #include #include #include +#include #include #include #include #include "adf_accel_devices.h" #include "adf_common_drv.h" #include "adf_cfg.h" #include "adf_cfg_strings.h" #include "adf_cfg_common.h" #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" -#include "adf_pf2vf_msg.h" - -#define ADF_VINTSOU_BUN BIT(0) -#define ADF_VINTSOU_PF2VF BIT(1) +#include "adf_pfvf_utils.h" static TASKQUEUE_DEFINE_THREAD(qat_vf); +static TASKQUEUE_DEFINE_THREAD(qat_bank_handler); static struct workqueue_struct *adf_vf_stop_wq; static DEFINE_MUTEX(vf_stop_wq_lock); struct adf_vf_stop_data { struct adf_accel_dev *accel_dev; - struct work_struct vf_stop_work; + struct work_struct work; }; static int adf_enable_msi(struct adf_accel_dev *accel_dev) { int stat; int count = 1; stat = pci_alloc_msi(accel_to_pci_dev(accel_dev), &count); if (stat) { device_printf(GET_DEV(accel_dev), "Failed to enable MSI interrupts\n"); return stat; } return stat; } static void adf_disable_msi(struct adf_accel_dev *accel_dev) { device_t pdev = accel_to_pci_dev(accel_dev); pci_release_msi(pdev); } static void adf_dev_stop_async(struct work_struct *work) { struct adf_vf_stop_data *stop_data = - container_of(work, struct adf_vf_stop_data, vf_stop_work); + container_of(work, struct adf_vf_stop_data, work); struct adf_accel_dev *accel_dev = stop_data->accel_dev; + struct adf_hw_device_data *hw_data = accel_dev->hw_device; adf_dev_restarting_notify(accel_dev); adf_dev_stop(accel_dev); adf_dev_shutdown(accel_dev); /* Re-enable PF2VF interrupts */ - adf_enable_pf2vf_interrupts(accel_dev); + hw_data->enable_pf2vf_interrupt(accel_dev); kfree(stop_data); } -static void -adf_pf2vf_bh_handler(void *data, int pending) +int +adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev) { - struct adf_accel_dev *accel_dev = data; - struct adf_hw_device_data *hw_data = accel_dev->hw_device; - struct adf_bar *pmisc = - &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; - struct resource *pmisc_bar_addr = pmisc->virt_addr; - u32 msg; - bool is_notification = false; - - /* Read the message from PF */ - msg = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_pf2vf_offset(0)); - if (!(msg & ADF_PF2VF_INT)) { - device_printf(GET_DEV(accel_dev), - "Spurious PF2VF interrupt. msg %X. Ignored\n", - msg); - accel_dev->u1.vf.pfvf_counters.spurious++; - goto out; - } - accel_dev->u1.vf.pfvf_counters.rx++; + struct adf_vf_stop_data *stop_data; - if (!(msg & ADF_PF2VF_MSGORIGIN_SYSTEM)) { + clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); + stop_data = kzalloc(sizeof(*stop_data), GFP_ATOMIC); + if (!stop_data) { device_printf(GET_DEV(accel_dev), - "Ignore non-system PF2VF message(0x%x)\n", - msg); - /* - * To ack, clear the VF2PFINT bit. - * Because this must be a legacy message, the far side - * must clear the in-use pattern. - */ - msg &= ~ADF_PF2VF_INT; - ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg); - goto out; + "Couldn't schedule stop for vf_%d\n", + accel_dev->accel_id); + return -ENOMEM; } + stop_data->accel_dev = accel_dev; + INIT_WORK(&stop_data->work, adf_dev_stop_async); + queue_work(adf_vf_stop_wq, &stop_data->work); - switch ((msg & ADF_PF2VF_MSGTYPE_MASK) >> ADF_PF2VF_MSGTYPE_SHIFT) { - case ADF_PF2VF_MSGTYPE_RESTARTING: { - struct adf_vf_stop_data *stop_data; + return 0; +} - is_notification = true; +int +adf_pf2vf_handle_pf_rp_reset(struct adf_accel_dev *accel_dev, + struct pfvf_message msg) +{ + accel_dev->u1.vf.rpreset_sts = msg.data; + if (accel_dev->u1.vf.rpreset_sts == RPRESET_SUCCESS) + device_printf( + GET_DEV(accel_dev), + "rpreset resp(success) from PF type:0x%x data:0x%x\n", + msg.type, + msg.data); + else if (accel_dev->u1.vf.rpreset_sts == RPRESET_NOT_SUPPORTED) + device_printf( + GET_DEV(accel_dev), + "rpreset resp(not supported) from PF type:0x%x data:0x%x\n", + msg.type, + msg.data); + else if (accel_dev->u1.vf.rpreset_sts == RPRESET_INVAL_BANK) + device_printf( + GET_DEV(accel_dev), + "rpreset resp(invalid bank) from PF type:0x%x data:0x%x\n", + msg.type, + msg.data); + else + device_printf( + GET_DEV(accel_dev), + "rpreset resp(timeout) from PF type:0x%x data:0x%x\nn", + msg.type, + msg.data); + + complete(&accel_dev->u1.vf.msg_received); - device_printf(GET_DEV(accel_dev), - "Restarting msg received from PF 0x%x\n", - msg); - - clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); - stop_data = kzalloc(sizeof(*stop_data), GFP_ATOMIC); - if (!stop_data) { - device_printf(GET_DEV(accel_dev), - "Couldn't schedule stop for vf_%d\n", - accel_dev->accel_id); - goto out; - } - stop_data->accel_dev = accel_dev; - INIT_WORK(&stop_data->vf_stop_work, adf_dev_stop_async); - queue_work(adf_vf_stop_wq, &stop_data->vf_stop_work); - break; - } - case ADF_PF2VF_MSGTYPE_VERSION_RESP: - device_printf(GET_DEV(accel_dev), - "Version resp received from PF 0x%x\n", - msg); - is_notification = false; - accel_dev->u1.vf.pf_version = - (msg & ADF_PF2VF_VERSION_RESP_VERS_MASK) >> - ADF_PF2VF_VERSION_RESP_VERS_SHIFT; - accel_dev->u1.vf.compatible = - (msg & ADF_PF2VF_VERSION_RESP_RESULT_MASK) >> - ADF_PF2VF_VERSION_RESP_RESULT_SHIFT; - accel_dev->u1.vf.iov_msg_completion = 1; - wakeup(&accel_dev->u1.vf.iov_msg_completion); - break; - case ADF_PF2VF_MSGTYPE_BLOCK_RESP: - is_notification = false; - accel_dev->u1.vf.pf2vf_block_byte = - (msg & ADF_PF2VF_BLOCK_RESP_DATA_MASK) >> - ADF_PF2VF_BLOCK_RESP_DATA_SHIFT; - accel_dev->u1.vf.pf2vf_block_resp_type = - (msg & ADF_PF2VF_BLOCK_RESP_TYPE_MASK) >> - ADF_PF2VF_BLOCK_RESP_TYPE_SHIFT; - accel_dev->u1.vf.iov_msg_completion = 1; - wakeup(&accel_dev->u1.vf.iov_msg_completion); - break; - case ADF_PF2VF_MSGTYPE_FATAL_ERROR: - device_printf(GET_DEV(accel_dev), - "Fatal error received from PF 0x%x\n", - msg); - is_notification = true; - if (adf_notify_fatal_error(accel_dev)) - device_printf(GET_DEV(accel_dev), - "Couldn't notify fatal error\n"); - break; - default: - device_printf(GET_DEV(accel_dev), - "Unknown PF2VF message(0x%x)\n", - msg); - } + return 0; +} + +static void +adf_pf2vf_bh_handler(void *data, int pending) +{ + struct adf_accel_dev *accel_dev = data; + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + + if (adf_recv_and_handle_pf2vf_msg(accel_dev)) + /* Re-enable PF2VF interrupts */ + hw_data->enable_pf2vf_interrupt(accel_dev); - /* To ack, clear the PF2VFINT bit */ - msg &= ~ADF_PF2VF_INT; - /* - * Clear the in-use pattern if the sender won't do it. - * Because the compatibility version must be the first message - * exchanged between the VF and PF, the pf.version must be - * set at this time. - * The in-use pattern is not cleared for notifications so that - * it can be used for collision detection. - */ - if (accel_dev->u1.vf.pf_version >= ADF_PFVF_COMPATIBILITY_FAST_ACK && - !is_notification) - msg &= ~ADF_PF2VF_IN_USE_BY_PF_MASK; - ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg); - -out: - /* Re-enable PF2VF interrupts */ - adf_enable_pf2vf_interrupts(accel_dev); return; } static int adf_setup_pf2vf_bh(struct adf_accel_dev *accel_dev) { TASK_INIT(&accel_dev->u1.vf.pf2vf_bh_tasklet, 0, adf_pf2vf_bh_handler, accel_dev); mutex_init(&accel_dev->u1.vf.vf2pf_lock); return 0; } static void adf_cleanup_pf2vf_bh(struct adf_accel_dev *accel_dev) { taskqueue_cancel(taskqueue_qat_vf, &accel_dev->u1.vf.pf2vf_bh_tasklet, NULL); taskqueue_drain(taskqueue_qat_vf, &accel_dev->u1.vf.pf2vf_bh_tasklet); mutex_destroy(&accel_dev->u1.vf.vf2pf_lock); } +static void +adf_bh_handler(void *data, int pending) +{ + struct adf_etr_bank_data *bank = (void *)data; + + adf_response_handler((uintptr_t)bank); + + return; +} + +static int +adf_setup_bh(struct adf_accel_dev *accel_dev) +{ + int i = 0; + struct adf_etr_data *priv_data = accel_dev->transport; + + for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) { + TASK_INIT(&priv_data->banks[i].resp_handler, + 0, + adf_bh_handler, + &priv_data->banks[i]); + } + + return 0; +} + +static void +adf_cleanup_bh(struct adf_accel_dev *accel_dev) +{ + int i = 0; + struct adf_etr_data *transport; + + if (!accel_dev || !accel_dev->transport) + return; + + transport = accel_dev->transport; + for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) { + taskqueue_cancel(taskqueue_qat_bank_handler, + &transport->banks[i].resp_handler, + NULL); + taskqueue_drain(taskqueue_qat_bank_handler, + &transport->banks[i].resp_handler); + } +} + static void adf_isr(void *privdata) { struct adf_accel_dev *accel_dev = privdata; struct adf_hw_device_data *hw_data = accel_dev->hw_device; - struct adf_bar *pmisc = - &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; - struct resource *pmisc_bar_addr = pmisc->virt_addr; - u32 v_int, v_mask; - int handled = 0; - - /* Read VF INT source CSR to determine the source of VF interrupt */ - v_int = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_vintsou_offset()); - v_mask = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_vintmsk_offset(0)); + struct adf_hw_csr_ops *csr_ops = &hw_data->csr_info.csr_ops; + int int_active_bundles = 0; + int i = 0; /* Check for PF2VF interrupt */ - if ((v_int & ~v_mask) & ADF_VINTSOU_PF2VF) { + if (hw_data->interrupt_active_pf2vf(accel_dev)) { /* Disable PF to VF interrupt */ - adf_disable_pf2vf_interrupts(accel_dev); - + hw_data->disable_pf2vf_interrupt(accel_dev); /* Schedule tasklet to handle interrupt BH */ taskqueue_enqueue(taskqueue_qat_vf, &accel_dev->u1.vf.pf2vf_bh_tasklet); - handled = 1; } - if ((v_int & ~v_mask) & ADF_VINTSOU_BUN) { - struct adf_etr_data *etr_data = accel_dev->transport; - struct adf_etr_bank_data *bank = &etr_data->banks[0]; - - /* Disable Flag and Coalesce Ring Interrupts */ - WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, - bank->bank_number, - 0); - adf_response_handler((uintptr_t)&etr_data->banks[0]); - handled = 1; + if (hw_data->get_int_active_bundles) + int_active_bundles = hw_data->get_int_active_bundles(accel_dev); + + for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) { + if (int_active_bundles & BIT(i)) { + struct adf_etr_data *etr_data = accel_dev->transport; + struct adf_etr_bank_data *bank = &etr_data->banks[i]; + + /* Disable Flag and Coalesce Ring Interrupts */ + csr_ops->write_csr_int_flag_and_col(bank->csr_addr, + bank->bank_number, + 0); + /* Schedule tasklet to handle interrupt BH */ + taskqueue_enqueue(taskqueue_qat_bank_handler, + &bank->resp_handler); + } } - - if (handled) - return; } static int adf_request_msi_irq(struct adf_accel_dev *accel_dev) { device_t pdev = accel_to_pci_dev(accel_dev); int ret; int rid = 1; + int cpu; + accel_dev->u1.vf.irq = bus_alloc_resource_any(pdev, SYS_RES_IRQ, &rid, RF_ACTIVE); if (accel_dev->u1.vf.irq == NULL) { device_printf(GET_DEV(accel_dev), "failed to allocate IRQ\n"); return ENXIO; } ret = bus_setup_intr(pdev, accel_dev->u1.vf.irq, INTR_TYPE_MISC | INTR_MPSAFE, NULL, adf_isr, accel_dev, &accel_dev->u1.vf.cookie); + if (ret) { + device_printf(GET_DEV(accel_dev), "failed to enable irq\n"); + goto errout; + } + + cpu = accel_dev->accel_id % num_online_cpus(); + ret = bus_bind_intr(pdev, accel_dev->u1.vf.irq, cpu); if (ret) { device_printf(GET_DEV(accel_dev), - "failed to enable irq for %s\n", - accel_dev->u1.vf.irq_name); - return ret; + "failed to bind IRQ handler to cpu core\n"); + goto errout; } - return ret; -} + accel_dev->u1.vf.irq_enabled = true; -static int -adf_setup_bh(struct adf_accel_dev *accel_dev) -{ - return 0; -} + return ret; +errout: + bus_free_resource(pdev, SYS_RES_IRQ, accel_dev->u1.vf.irq); -static void -adf_cleanup_bh(struct adf_accel_dev *accel_dev) -{ + return ret; } /** * adf_vf_isr_resource_free() - Free IRQ for acceleration device * @accel_dev: Pointer to acceleration device. * * Function frees interrupts for acceleration device virtual function. */ void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev) { device_t pdev = accel_to_pci_dev(accel_dev); - bus_teardown_intr(pdev, accel_dev->u1.vf.irq, accel_dev->u1.vf.cookie); - bus_free_resource(pdev, SYS_RES_IRQ, accel_dev->u1.vf.irq); + + if (accel_dev->u1.vf.irq_enabled) { + bus_teardown_intr(pdev, + accel_dev->u1.vf.irq, + accel_dev->u1.vf.cookie); + bus_free_resource(pdev, SYS_RES_IRQ, accel_dev->u1.vf.irq); + } adf_cleanup_bh(accel_dev); adf_cleanup_pf2vf_bh(accel_dev); adf_disable_msi(accel_dev); } /** * adf_vf_isr_resource_alloc() - Allocate IRQ for acceleration device * @accel_dev: Pointer to acceleration device. * * Function allocates interrupts for acceleration device virtual function. * * Return: 0 on success, error code otherwise. */ int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev) { if (adf_enable_msi(accel_dev)) goto err_out; if (adf_setup_pf2vf_bh(accel_dev)) - goto err_out; + goto err_disable_msi; if (adf_setup_bh(accel_dev)) goto err_out; if (adf_request_msi_irq(accel_dev)) - goto err_out; + goto err_disable_msi; return 0; + +err_disable_msi: + adf_disable_msi(accel_dev); + err_out: - adf_vf_isr_resource_free(accel_dev); - return EFAULT; + return -EFAULT; } /** * adf_flush_vf_wq() - Flush workqueue for VF + * @accel_dev: Pointer to acceleration device. * - * Function flushes workqueue 'adf_vf_stop_wq' for VF. + * Function disables the PF/VF interrupts on the VF so that no new messages + * are received and flushes the workqueue 'adf_vf_stop_wq'. * * Return: void. */ void -adf_flush_vf_wq(void) +adf_flush_vf_wq(struct adf_accel_dev *accel_dev) { + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + + hw_data->disable_pf2vf_interrupt(accel_dev); + if (adf_vf_stop_wq) flush_workqueue(adf_vf_stop_wq); } /** * adf_init_vf_wq() - Init workqueue for VF * * Function init workqueue 'adf_vf_stop_wq' for VF. * * Return: 0 on success, error code otherwise. */ int adf_init_vf_wq(void) { int ret = 0; mutex_lock(&vf_stop_wq_lock); if (!adf_vf_stop_wq) adf_vf_stop_wq = alloc_workqueue("adf_vf_stop_wq", WQ_MEM_RECLAIM, 0); if (!adf_vf_stop_wq) ret = ENOMEM; mutex_unlock(&vf_stop_wq_lock); return ret; } -/** - * adf_exit_vf_wq() - Destroy workqueue for VF - * - * Function destroy workqueue 'adf_vf_stop_wq' for VF. - * - * Return: void. - */ void adf_exit_vf_wq(void) { - if (adf_vf_stop_wq) { + if (adf_vf_stop_wq) destroy_workqueue(adf_vf_stop_wq); - adf_vf_stop_wq = NULL; - } + + adf_vf_stop_wq = NULL; } diff --git a/sys/dev/qat/qat_common/qat_common_module.c b/sys/dev/qat/qat_common/qat_common_module.c index 93abbbf16433..722575192c51 100644 --- a/sys/dev/qat/qat_common/qat_common_module.c +++ b/sys/dev/qat/qat_common/qat_common_module.c @@ -1,47 +1,50 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_common_drv.h" static int __init qat_common_register(void) { if (adf_init_aer()) return EFAULT; if (adf_init_fatal_error_wq()) return EFAULT; + if (adf_register_ctl_device_driver()) + return EFAULT; + return 0; } static void __exit qat_common_unregister(void) { adf_exit_vf_wq(); adf_exit_aer(); adf_exit_fatal_error_wq(); - adf_clean_vf_map(false); + adf_unregister_ctl_device_driver(); } static int qat_common_modevent(module_t mod, int type, void *data) { switch (type) { case MOD_LOAD: return qat_common_register(); case MOD_UNLOAD: qat_common_unregister(); return 0; default: return EOPNOTSUPP; } } static moduledata_t qat_common_mod = { "qat_common", qat_common_modevent, 0 }; DECLARE_MODULE(qat_common, qat_common_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); MODULE_VERSION(qat_common, 1); MODULE_DEPEND(qat_common, firmware, 1, 1, 1); MODULE_DEPEND(qat_common, linuxkpi, 1, 1, 1); diff --git a/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c b/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c index 5bfe1c7f40b3..74ba6cdbc2ec 100644 --- a/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c +++ b/sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c @@ -1,545 +1,530 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include #include #include -#include +#include #include #include +#include #include "adf_200xx_hw_data.h" #include "icp_qat_hw.h" #include "adf_heartbeat.h" /* Worker thread to service arbiter mappings */ static const u32 thrd_to_arb_map[ADF_200XX_MAX_ACCELENGINES] = { 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA }; enum { DEV_200XX_SKU_1 = 0, DEV_200XX_SKU_2 = 1, DEV_200XX_SKU_3 = 2 }; static u32 thrd_to_arb_map_gen[ADF_200XX_MAX_ACCELENGINES] = { 0 }; static struct adf_hw_device_class qat_200xx_class = {.name = ADF_200XX_DEVICE_NAME, .type = DEV_200XX, .instances = 0 }; static u32 get_accel_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; u32 straps; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); straps = pci_read_config(pdev, ADF_200XX_SOFTSTRAP_CSR_OFFSET, 4); return (~(fuse | straps)) >> ADF_200XX_ACCELERATORS_REG_OFFSET & ADF_200XX_ACCELERATORS_MASK; } static u32 get_ae_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; u32 me_straps; u32 me_disable; u32 ssms_disabled; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); me_straps = pci_read_config(pdev, ADF_200XX_SOFTSTRAP_CSR_OFFSET, 4); /* If SSMs are disabled, then disable the corresponding MEs */ ssms_disabled = (~get_accel_mask(accel_dev)) & ADF_200XX_ACCELERATORS_MASK; me_disable = 0x3; while (ssms_disabled) { if (ssms_disabled & 1) me_straps |= me_disable; ssms_disabled >>= 1; me_disable <<= 2; } return (~(fuse | me_straps)) & ADF_200XX_ACCELENGINES_MASK; } static u32 get_num_accels(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->accel_mask) return 0; for (i = 0; i < ADF_200XX_MAX_ACCELERATORS; i++) { if (self->accel_mask & (1 << i)) ctr++; } return ctr; } static u32 get_num_aes(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->ae_mask) return 0; for (i = 0; i < ADF_200XX_MAX_ACCELENGINES; i++) { if (self->ae_mask & (1 << i)) ctr++; } return ctr; } static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_200XX_PMISC_BAR; } static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_200XX_ETR_BAR; } static u32 get_sram_bar_id(struct adf_hw_device_data *self) { return 0; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { int aes = get_num_aes(self); if (aes == 6) return DEV_SKU_4; return DEV_SKU_UNKNOWN; } static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, u32 const **arb_map_config) { int i; struct adf_hw_device_data *hw_device = accel_dev->hw_device; for (i = 0; i < ADF_200XX_MAX_ACCELENGINES; i++) { thrd_to_arb_map_gen[i] = 0; if (hw_device->ae_mask & (1 << i)) thrd_to_arb_map_gen[i] = thrd_to_arb_map[i]; } adf_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map, thrd_to_arb_map_gen, ADF_200XX_MAX_ACCELENGINES); *arb_map_config = thrd_to_arb_map_gen; } -static u32 -get_pf2vf_offset(u32 i) -{ - return ADF_200XX_PF2VF_OFFSET(i); -} - -static u32 -get_vintmsk_offset(u32 i) -{ - return ADF_200XX_VINTMSK_OFFSET(i); -} - static void get_arb_info(struct arb_info *arb_csrs_info) { arb_csrs_info->arbiter_offset = ADF_200XX_ARB_OFFSET; arb_csrs_info->wrk_thd_2_srv_arb_map = ADF_200XX_ARB_WRK_2_SER_MAP_OFFSET; arb_csrs_info->wrk_cfg_offset = ADF_200XX_ARB_WQCFG_OFFSET; } static void get_admin_info(struct admin_info *admin_csrs_info) { admin_csrs_info->mailbox_offset = ADF_200XX_MAILBOX_BASE_OFFSET; admin_csrs_info->admin_msg_ur = ADF_200XX_ADMINMSGUR_OFFSET; admin_csrs_info->admin_msg_lr = ADF_200XX_ADMINMSGLR_OFFSET; } static void get_errsou_offset(u32 *errsou3, u32 *errsou5) { *errsou3 = ADF_200XX_ERRSOU3; *errsou5 = ADF_200XX_ERRSOU5; } static u32 get_clock_speed(struct adf_hw_device_data *self) { /* CPP clock is half high-speed clock */ return self->clock_frequency / 2; } static void adf_enable_error_interrupts(struct resource *csr) { ADF_CSR_WR(csr, ADF_ERRMSK0, ADF_200XX_ERRMSK0_CERR); /* ME0-ME3 */ ADF_CSR_WR(csr, ADF_ERRMSK1, ADF_200XX_ERRMSK1_CERR); /* ME4-ME5 */ ADF_CSR_WR(csr, ADF_ERRMSK5, ADF_200XX_ERRMSK5_CERR); /* SSM2 */ /* Reset everything except VFtoPF1_16. */ adf_csr_fetch_and_and(csr, ADF_ERRMSK3, ADF_200XX_VF2PF1_16); /* RI CPP bus interface error detection and reporting. */ ADF_CSR_WR(csr, ADF_200XX_RICPPINTCTL, ADF_200XX_RICPP_EN); /* TI CPP bus interface error detection and reporting. */ ADF_CSR_WR(csr, ADF_200XX_TICPPINTCTL, ADF_200XX_TICPP_EN); /* Enable CFC Error interrupts and logging. */ ADF_CSR_WR(csr, ADF_200XX_CPP_CFC_ERR_CTRL, ADF_200XX_CPP_CFC_UE); } static void adf_disable_error_interrupts(struct adf_accel_dev *accel_dev) { struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_200XX_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; /* ME0-ME3 */ ADF_CSR_WR(csr, ADF_ERRMSK0, ADF_200XX_ERRMSK0_UERR | ADF_200XX_ERRMSK0_CERR); /* ME4-ME5 */ ADF_CSR_WR(csr, ADF_ERRMSK1, ADF_200XX_ERRMSK1_UERR | ADF_200XX_ERRMSK1_CERR); /* CPP Push Pull, RI, TI, SSM0-SSM1, CFC */ ADF_CSR_WR(csr, ADF_ERRMSK3, ADF_200XX_ERRMSK3_UERR); /* SSM2 */ ADF_CSR_WR(csr, ADF_ERRMSK5, ADF_200XX_ERRMSK5_UERR); } static int adf_check_uncorrectable_error(struct adf_accel_dev *accel_dev) { struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_200XX_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; u32 errsou0 = ADF_CSR_RD(csr, ADF_ERRSOU0) & ADF_200XX_ERRMSK0_UERR; u32 errsou1 = ADF_CSR_RD(csr, ADF_ERRSOU1) & ADF_200XX_ERRMSK1_UERR; u32 errsou3 = ADF_CSR_RD(csr, ADF_ERRSOU3) & ADF_200XX_ERRMSK3_UERR; u32 errsou5 = ADF_CSR_RD(csr, ADF_ERRSOU5) & ADF_200XX_ERRMSK5_UERR; return (errsou0 | errsou1 | errsou3 | errsou5); } static void adf_enable_mmp_error_correction(struct resource *csr, struct adf_hw_device_data *hw_data) { unsigned int dev, mmp; unsigned int mask; /* Enable MMP Logging */ for (dev = 0, mask = hw_data->accel_mask; mask; dev++, mask >>= 1) { if (!(mask & 1)) continue; /* Set power-up */ adf_csr_fetch_and_and(csr, ADF_200XX_SLICEPWRDOWN(dev), ~ADF_200XX_MMP_PWR_UP_MSK); if (hw_data->accel_capabilities_mask & ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC) { for (mmp = 0; mmp < ADF_MAX_MMP; ++mmp) { /* * The device supports PKE, * so enable error reporting from MMP memory */ adf_csr_fetch_and_or(csr, ADF_UERRSSMMMP(dev, mmp), ADF_200XX_UERRSSMMMP_EN); /* * The device supports PKE, * so enable error correction from MMP memory */ adf_csr_fetch_and_or(csr, ADF_CERRSSMMMP(dev, mmp), ADF_200XX_CERRSSMMMP_EN); } } else { for (mmp = 0; mmp < ADF_MAX_MMP; ++mmp) { /* * The device doesn't support PKE, * so disable error reporting from MMP memory */ adf_csr_fetch_and_and(csr, ADF_UERRSSMMMP(dev, mmp), ~ADF_200XX_UERRSSMMMP_EN); /* * The device doesn't support PKE, * so disable error correction from MMP memory */ adf_csr_fetch_and_and(csr, ADF_CERRSSMMMP(dev, mmp), ~ADF_200XX_CERRSSMMMP_EN); } } /* Restore power-down value */ adf_csr_fetch_and_or(csr, ADF_200XX_SLICEPWRDOWN(dev), ADF_200XX_MMP_PWR_UP_MSK); /* Disabling correctable error interrupts. */ ADF_CSR_WR(csr, ADF_200XX_INTMASKSSM(dev), ADF_200XX_INTMASKSSM_UERR); } } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_200XX_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; unsigned int val, i; unsigned int mask; /* Enable Accel Engine error detection & correction */ mask = hw_device->ae_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_200XX_AE_CTX_ENABLES(i)); val |= ADF_200XX_ENABLE_AE_ECC_ERR; ADF_CSR_WR(csr, ADF_200XX_AE_CTX_ENABLES(i), val); val = ADF_CSR_RD(csr, ADF_200XX_AE_MISC_CONTROL(i)); val |= ADF_200XX_ENABLE_AE_ECC_PARITY_CORR; ADF_CSR_WR(csr, ADF_200XX_AE_MISC_CONTROL(i), val); } /* Enable shared memory error detection & correction */ mask = hw_device->accel_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_200XX_UERRSSMSH(i)); val |= ADF_200XX_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_200XX_UERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_200XX_CERRSSMSH(i)); val |= ADF_200XX_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_200XX_CERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_PPERR(i)); val |= ADF_200XX_PPERR_EN; ADF_CSR_WR(csr, ADF_PPERR(i), val); } adf_enable_error_interrupts(csr); adf_enable_mmp_error_correction(csr, hw_device); } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { struct resource *addr; addr = (&GET_BARS(accel_dev)[ADF_200XX_PMISC_BAR])->virt_addr; /* Enable bundle and misc interrupts */ ADF_CSR_WR(addr, ADF_200XX_SMIAPF0_MASK_OFFSET, ADF_200XX_SMIA0_MASK); ADF_CSR_WR(addr, ADF_200XX_SMIAPF1_MASK_OFFSET, ADF_200XX_SMIA1_MASK); } static u32 get_ae_clock(struct adf_hw_device_data *self) { /* * Clock update interval is <16> ticks for 200xx. */ return self->clock_frequency / 16; } static int get_storage_enabled(struct adf_accel_dev *accel_dev, uint32_t *storage_enabled) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; strlcpy(key, ADF_STORAGE_FIRMWARE_ENABLED, sizeof(key)); if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) { if (kstrtouint(val, 0, storage_enabled)) return -EFAULT; } return 0; } static int measure_clock(struct adf_accel_dev *accel_dev) { u32 frequency; int ret = 0; ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_200XX_MIN_AE_FREQ, ADF_200XX_MAX_AE_FREQ); if (ret) return ret; accel_dev->hw_device->clock_frequency = frequency; return 0; } static u32 adf_200xx_get_hw_cap(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 legfuses; u32 capabilities; u32 straps; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 fuses = hw_data->fuses; /* Read accelerator capabilities mask */ legfuses = pci_read_config(pdev, ADF_DEVICE_LEGFUSE_OFFSET, 4); capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC + ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC + ICP_ACCEL_CAPABILITIES_CIPHER + ICP_ACCEL_CAPABILITIES_AUTHENTICATION + ICP_ACCEL_CAPABILITIES_COMPRESSION + ICP_ACCEL_CAPABILITIES_ZUC + ICP_ACCEL_CAPABILITIES_SHA3 + ICP_ACCEL_CAPABILITIES_HKDF + ICP_ACCEL_CAPABILITIES_ECEDMONT + ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN; if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN); if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; if (legfuses & ICP_ACCEL_MASK_PKE_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_ECEDMONT); if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; if (legfuses & ICP_ACCEL_MASK_EIA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_ZUC; if (legfuses & ICP_ACCEL_MASK_SHA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_SHA3; straps = pci_read_config(pdev, ADF_200XX_SOFTSTRAP_CSR_OFFSET, 4); if ((straps | fuses) & ADF_200XX_POWERGATE_PKE) capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; if ((straps | fuses) & ADF_200XX_POWERGATE_CY) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; return capabilities; } static const char * get_obj_name(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { return ADF_CXXX_AE_FW_NAME_CUSTOM1; } static uint32_t get_objs_num(struct adf_accel_dev *accel_dev) { return 1; } static uint32_t get_obj_cfg_ae_mask(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services services) { return accel_dev->hw_device->ae_mask; } void adf_init_hw_data_200xx(struct adf_hw_device_data *hw_data) { hw_data->dev_class = &qat_200xx_class; hw_data->instance_id = qat_200xx_class.instances++; hw_data->num_banks = ADF_200XX_ETR_MAX_BANKS; hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK; hw_data->num_accel = ADF_200XX_MAX_ACCELERATORS; hw_data->num_logical_accel = 1; hw_data->num_engines = ADF_200XX_MAX_ACCELENGINES; hw_data->tx_rx_gap = ADF_200XX_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_200XX_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->check_uncorrectable_error = adf_check_uncorrectable_error; hw_data->print_err_registers = adf_print_err_registers; hw_data->disable_error_interrupts = adf_disable_error_interrupts; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; - hw_data->get_pf2vf_offset = get_pf2vf_offset; - hw_data->get_vintmsk_offset = get_vintmsk_offset; hw_data->get_arb_info = get_arb_info; hw_data->get_admin_info = get_admin_info; hw_data->get_errsou_offset = get_errsou_offset; hw_data->get_clock_speed = get_clock_speed; hw_data->get_sku = get_sku; hw_data->heartbeat_ctr_num = ADF_NUM_HB_CNT_PER_AE; hw_data->fw_name = ADF_200XX_FW; hw_data->fw_mmp_name = ADF_200XX_MMP; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->disable_iov = adf_disable_sriov; hw_data->send_admin_init = adf_send_admin_init; hw_data->init_arb = adf_init_gen2_arb; hw_data->exit_arb = adf_exit_arb; hw_data->get_arb_mapping = adf_get_arbiter_mapping; hw_data->enable_ints = adf_enable_ints; hw_data->set_ssm_wdtimer = adf_set_ssm_wdtimer; hw_data->check_slice_hang = adf_check_slice_hang; - hw_data->enable_vf2pf_comms = adf_pf_enable_vf2pf_comms; - hw_data->disable_vf2pf_comms = adf_pf_disable_vf2pf_comms; hw_data->restore_device = adf_dev_restore; hw_data->reset_device = adf_reset_flr; - hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; hw_data->measure_clock = measure_clock; hw_data->get_ae_clock = get_ae_clock; hw_data->reset_device = adf_reset_flr; hw_data->get_objs_num = get_objs_num; hw_data->get_obj_name = get_obj_name; hw_data->get_obj_cfg_ae_mask = get_obj_cfg_ae_mask; hw_data->get_accel_cap = adf_200xx_get_hw_cap; hw_data->clock_frequency = ADF_200XX_AE_FREQ; hw_data->extended_dc_capabilities = 0; hw_data->get_storage_enabled = get_storage_enabled; hw_data->query_storage_cap = 1; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->storage_enable = 0; hw_data->get_ring_to_svc_map = adf_cfg_get_services_enabled; hw_data->config_device = adf_config_device; hw_data->set_asym_rings_mask = adf_cfg_set_asym_rings_mask; hw_data->ring_to_svc_map = ADF_DEFAULT_RING_TO_SRV_MAP; hw_data->pre_reset = adf_dev_pre_reset; hw_data->post_reset = adf_dev_post_reset; adf_gen2_init_hw_csr_info(&hw_data->csr_info); + adf_gen2_init_pf_pfvf_ops(&hw_data->csr_info.pfvf_ops); } void adf_clean_hw_data_200xx(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } diff --git a/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c b/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c index 002ea6d5d876..20b38394263b 100644 --- a/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c +++ b/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c @@ -1,973 +1,1016 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include #include #include #include #include -#include +#include #include +#include +#include #include "adf_4xxx_hw_data.h" #include "adf_heartbeat.h" #include "icp_qat_fw_init_admin.h" #include "icp_qat_hw.h" #define ADF_CONST_TABLE_SIZE 1024 struct adf_fw_config { u32 ae_mask; char *obj_name; }; /* Accel unit information */ static const struct adf_accel_unit adf_4xxx_au_a_ae[] = { { 0x1, 0x1, 0xF, 0x1B, 4, ADF_ACCEL_SERVICE_NULL }, { 0x2, 0x1, 0xF0, 0x6C0, 4, ADF_ACCEL_SERVICE_NULL }, { 0x4, 0x1, 0x100, 0xF000, 1, ADF_ACCEL_ADMIN }, }; /* Worker thread to service arbiter mappings */ static u32 thrd_to_arb_map[ADF_4XXX_MAX_ACCELENGINES] = { 0x5555555, 0x5555555, 0x5555555, 0x5555555, 0xAAAAAAA, 0xAAAAAAA, 0xAAAAAAA, 0xAAAAAAA, 0x0 }; /* Masks representing ME thread-service mappings. * Thread 7 carries out Admin work and is thus * left out. */ static u8 default_active_thd_mask = 0x7F; static u8 dc_me_active_thd_mask = 0x03; static u32 thrd_to_arb_map_gen[ADF_4XXX_MAX_ACCELENGINES] = { 0 }; #define ADF_4XXX_ASYM_SYM \ (ASYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ ASYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ SYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_DC \ (COMP | COMP << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_SYM \ (SYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ SYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ SYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_ASYM \ (ASYM | ASYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ ASYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ ASYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_ASYM_DC \ (ASYM | ASYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_SYM_DC \ (SYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_NA \ (NA | NA << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ NA << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ NA << ADF_CFG_SERV_RING_PAIR_3_SHIFT) #define ADF_4XXX_DEFAULT_RING_TO_SRV_MAP ADF_4XXX_ASYM_SYM struct adf_enabled_services { const char svcs_enabled[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u16 rng_to_svc_msk; }; -static struct adf_enabled_services adf_4xxx_svcs[] = { - { "dc", ADF_4XXX_DC }, - { "sym", ADF_4XXX_SYM }, - { "asym", ADF_4XXX_ASYM }, - { "dc;asym", ADF_4XXX_ASYM_DC }, - { "asym;dc", ADF_4XXX_ASYM_DC }, - { "sym;dc", ADF_4XXX_SYM_DC }, - { "dc;sym", ADF_4XXX_SYM_DC }, - { "asym;sym", ADF_4XXX_ASYM_SYM }, - { "sym;asym", ADF_4XXX_ASYM_SYM }, -}; +static struct adf_enabled_services adf_4xxx_svcs[] = + { { "dc", ADF_4XXX_DC }, + { "sym", ADF_4XXX_SYM }, + { "asym", ADF_4XXX_ASYM }, + { "dc;asym", ADF_4XXX_ASYM_DC }, + { "asym;dc", ADF_4XXX_ASYM_DC }, + { "sym;dc", ADF_4XXX_SYM_DC }, + { "dc;sym", ADF_4XXX_SYM_DC }, + { "asym;sym", ADF_4XXX_ASYM_SYM }, + { "sym;asym", ADF_4XXX_ASYM_SYM }, + { "cy", ADF_4XXX_ASYM_SYM } }; static struct adf_hw_device_class adf_4xxx_class = { .name = ADF_4XXX_DEVICE_NAME, .type = DEV_4XXX, .instances = 0, }; static u32 get_accel_mask(struct adf_accel_dev *accel_dev) { return ADF_4XXX_ACCELERATORS_MASK; } static u32 get_ae_mask(struct adf_accel_dev *accel_dev) { u32 fusectl4 = accel_dev->hw_device->fuses; return ~fusectl4 & ADF_4XXX_ACCELENGINES_MASK; } +static void +adf_set_asym_rings_mask(struct adf_accel_dev *accel_dev) +{ + accel_dev->hw_device->asym_rings_mask = ADF_4XXX_DEF_ASYM_MASK; +} + static int get_ring_to_svc_map(struct adf_accel_dev *accel_dev, u16 *ring_to_svc_map) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; u32 i = 0; *ring_to_svc_map = 0; /* Get the services enabled by user */ snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; for (i = 0; i < ARRAY_SIZE(adf_4xxx_svcs); i++) { if (!strncmp(val, adf_4xxx_svcs[i].svcs_enabled, ADF_CFG_MAX_KEY_LEN_IN_BYTES)) { *ring_to_svc_map = adf_4xxx_svcs[i].rng_to_svc_msk; return 0; } } device_printf(GET_DEV(accel_dev), "Invalid services enabled: %s\n", val); return EFAULT; } static u32 get_num_accels(struct adf_hw_device_data *self) { return ADF_4XXX_MAX_ACCELERATORS; } static u32 get_num_aes(struct adf_hw_device_data *self) { if (!self || !self->ae_mask) return 0; return hweight32(self->ae_mask); } static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_4XXX_PMISC_BAR; } static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_4XXX_ETR_BAR; } static u32 get_sram_bar_id(struct adf_hw_device_data *self) { return ADF_4XXX_SRAM_BAR; } /* * The vector routing table is used to select the MSI-X entry to use for each * interrupt source. * The first ADF_4XXX_ETR_MAX_BANKS entries correspond to ring interrupts. * The final entry corresponds to VF2PF or error interrupts. * This vector table could be used to configure one MSI-X entry to be shared * between multiple interrupt sources. * * The default routing is set to have a one to one correspondence between the * interrupt source and the MSI-X entry used. */ static void set_msix_default_rttable(struct adf_accel_dev *accel_dev) { struct resource *csr; int i; csr = (&GET_BARS(accel_dev)[ADF_4XXX_PMISC_BAR])->virt_addr; for (i = 0; i <= ADF_4XXX_ETR_MAX_BANKS; i++) ADF_CSR_WR(csr, ADF_4XXX_MSIX_RTTABLE_OFFSET(i), i); } static u32 adf_4xxx_get_hw_cap(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fusectl1; u32 capabilities; /* Read accelerator capabilities mask */ fusectl1 = pci_read_config(pdev, ADF_4XXX_FUSECTL1_OFFSET, 4); capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_AUTHENTICATION | ICP_ACCEL_CAPABILITIES_COMPRESSION | ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION | ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION | - ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_SHA3_EXT | - ICP_ACCEL_CAPABILITIES_SM3 | ICP_ACCEL_CAPABILITIES_SM4 | - ICP_ACCEL_CAPABILITIES_CHACHA_POLY | - ICP_ACCEL_CAPABILITIES_AESGCM_SPC | - ICP_ACCEL_CAPABILITIES_AES_V2 | ICP_ACCEL_CAPABILITIES_RL; + ICP_ACCEL_CAPABILITIES_SHA3 | ICP_ACCEL_CAPABILITIES_HKDF | + ICP_ACCEL_CAPABILITIES_SHA3_EXT | ICP_ACCEL_CAPABILITIES_SM3 | + ICP_ACCEL_CAPABILITIES_SM4 | ICP_ACCEL_CAPABILITIES_CHACHA_POLY | + ICP_ACCEL_CAPABILITIES_AESGCM_SPC | ICP_ACCEL_CAPABILITIES_AES_V2 | + ICP_ACCEL_CAPABILITIES_RL | ICP_ACCEL_CAPABILITIES_ECEDMONT | + ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64; if (fusectl1 & ICP_ACCEL_4XXX_MASK_CIPHER_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC; + capabilities &= ~ICP_ACCEL_CAPABILITIES_HKDF; capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER; } - if (fusectl1 & ICP_ACCEL_4XXX_MASK_AUTH_SLICE) + if (fusectl1 & ICP_ACCEL_4XXX_MASK_AUTH_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; - if (fusectl1 & ICP_ACCEL_4XXX_MASK_PKE_SLICE) + capabilities &= ~ICP_ACCEL_CAPABILITIES_SHA3; + capabilities &= ~ICP_ACCEL_CAPABILITIES_SHA3_EXT; + capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER; + } + if (fusectl1 & ICP_ACCEL_MASK_PKE_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; + capabilities &= ~ICP_ACCEL_CAPABILITIES_ECEDMONT; + } if (fusectl1 & ICP_ACCEL_4XXX_MASK_COMPRESS_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; + capabilities &= ~ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION; + capabilities &= ~ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION; capabilities &= ~ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64; } if (fusectl1 & ICP_ACCEL_4XXX_MASK_SMX_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_SM3; capabilities &= ~ICP_ACCEL_CAPABILITIES_SM4; } + if (fusectl1 & ICP_ACCEL_4XXX_MASK_UCS_SLICE) { + capabilities &= ~ICP_ACCEL_CAPABILITIES_CHACHA_POLY; + capabilities &= ~ICP_ACCEL_CAPABILITIES_AESGCM_SPC; + capabilities &= ~ICP_ACCEL_CAPABILITIES_AES_V2; + capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER; + } + return capabilities; } static u32 get_hb_clock(struct adf_hw_device_data *self) { /* * 4XXX uses KPT counter for HB */ return ADF_4XXX_KPT_COUNTER_FREQ; } static u32 get_ae_clock(struct adf_hw_device_data *self) { /* * Clock update interval is <16> ticks for qat_4xxx. */ return self->clock_frequency / 16; } static int measure_clock(struct adf_accel_dev *accel_dev) { u32 frequency; int ret = 0; ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_4XXX_MIN_AE_FREQ, ADF_4XXX_MAX_AE_FREQ); if (ret) return ret; accel_dev->hw_device->clock_frequency = frequency; return 0; } static int adf_4xxx_configure_accel_units(struct adf_accel_dev *accel_dev) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES] = { 0 }; char val_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; if (adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC)) goto err; snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); snprintf(val_str, sizeof(val_str), ADF_CFG_ASYM ADF_SERVICES_SEPARATOR ADF_CFG_SYM); if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)val_str, ADF_STR)) goto err; return 0; err: device_printf(GET_DEV(accel_dev), "Failed to configure accel units\n"); return EINVAL; } static u32 get_num_accel_units(struct adf_hw_device_data *self) { return ADF_4XXX_MAX_ACCELUNITS; } static void get_accel_unit(struct adf_hw_device_data *self, struct adf_accel_unit **accel_unit) { memcpy(*accel_unit, adf_4xxx_au_a_ae, sizeof(adf_4xxx_au_a_ae)); } static void adf_exit_accel_unit_services(struct adf_accel_dev *accel_dev) { if (accel_dev->au_info) { kfree(accel_dev->au_info->au); accel_dev->au_info->au = NULL; kfree(accel_dev->au_info); accel_dev->au_info = NULL; } } static int get_accel_unit_config(struct adf_accel_dev *accel_dev, u8 *num_sym_au, u8 *num_dc_au, u8 *num_asym_au) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u32 num_au = hw_data->get_num_accel_units(hw_data); /* One AU will be allocated by default if a service enabled */ u32 alloc_au = 1; /* There's always one AU that is used for Admin AE */ u32 service_mask = ADF_ACCEL_ADMIN; char *token, *cur_str; u32 disabled_caps = 0; /* Get the services enabled by user */ snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; cur_str = val; token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); while (token) { if (!strncmp(token, ADF_CFG_SYM, strlen(ADF_CFG_SYM))) service_mask |= ADF_ACCEL_CRYPTO; if (!strncmp(token, ADF_CFG_ASYM, strlen(ADF_CFG_ASYM))) service_mask |= ADF_ACCEL_ASYM; /* cy means both asym & crypto should be enabled * Hardware resources allocation check will be done later */ if (!strncmp(token, ADF_CFG_CY, strlen(ADF_CFG_CY))) service_mask |= ADF_ACCEL_ASYM | ADF_ACCEL_CRYPTO; if (!strncmp(token, ADF_SERVICE_DC, strlen(ADF_SERVICE_DC))) service_mask |= ADF_ACCEL_COMPRESSION; token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); } /* Ensure the user won't enable more services than it can support */ if (hweight32(service_mask) > num_au) { device_printf(GET_DEV(accel_dev), "Can't enable more services than "); device_printf(GET_DEV(accel_dev), "%d!\n", num_au); return EFAULT; } else if (hweight32(service_mask) == 2) { /* Due to limitation, besides AU for Admin AE * only 2 more AUs can be allocated */ alloc_au = 2; } if (service_mask & ADF_ACCEL_CRYPTO) *num_sym_au = alloc_au; if (service_mask & ADF_ACCEL_ASYM) *num_asym_au = alloc_au; if (service_mask & ADF_ACCEL_COMPRESSION) *num_dc_au = alloc_au; /*update capability*/ if (!*num_sym_au || !(service_mask & ADF_ACCEL_CRYPTO)) { disabled_caps = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | + ICP_ACCEL_CAPABILITIES_SHA3 | ICP_ACCEL_CAPABILITIES_SHA3_EXT | - ICP_ACCEL_CAPABILITIES_SM3 | ICP_ACCEL_CAPABILITIES_SM4 | + ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_SM3 | + ICP_ACCEL_CAPABILITIES_SM4 | ICP_ACCEL_CAPABILITIES_CHACHA_POLY | ICP_ACCEL_CAPABILITIES_AESGCM_SPC | - ICP_ACCEL_CAPABILITIES_AES_V2; + ICP_ACCEL_CAPABILITIES_AES_V2 | + ICP_ACCEL_CAPABILITIES_AUTHENTICATION; } if (!*num_asym_au || !(service_mask & ADF_ACCEL_ASYM)) { disabled_caps |= ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | - ICP_ACCEL_CAPABILITIES_AUTHENTICATION; + ICP_ACCEL_CAPABILITIES_ECEDMONT; } if (!*num_dc_au || !(service_mask & ADF_ACCEL_COMPRESSION)) { disabled_caps |= ICP_ACCEL_CAPABILITIES_COMPRESSION | ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION | ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION | ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64; accel_dev->hw_device->extended_dc_capabilities = 0; } accel_dev->hw_device->accel_capabilities_mask = adf_4xxx_get_hw_cap(accel_dev) & ~disabled_caps; hw_data->service_mask = service_mask; hw_data->service_to_load_mask = service_mask; return 0; } static int adf_init_accel_unit_services(struct adf_accel_dev *accel_dev) { u8 num_sym_au = 0, num_dc_au = 0, num_asym_au = 0; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); u32 au_size = num_au * sizeof(struct adf_accel_unit); u8 i; if (get_accel_unit_config( accel_dev, &num_sym_au, &num_dc_au, &num_asym_au)) return EFAULT; accel_dev->au_info = kzalloc(sizeof(*accel_dev->au_info), GFP_KERNEL); if (!accel_dev->au_info) return ENOMEM; accel_dev->au_info->au = kzalloc(au_size, GFP_KERNEL); if (!accel_dev->au_info->au) { kfree(accel_dev->au_info); accel_dev->au_info = NULL; return ENOMEM; } accel_dev->au_info->num_cy_au = num_sym_au; accel_dev->au_info->num_dc_au = num_dc_au; accel_dev->au_info->num_asym_au = num_asym_au; get_accel_unit(hw_data, &accel_dev->au_info->au); /* Enable ASYM accel units */ for (i = 0; i < num_au && num_asym_au > 0; i++) { if (accel_dev->au_info->au[i].services == ADF_ACCEL_SERVICE_NULL) { accel_dev->au_info->au[i].services = ADF_ACCEL_ASYM; num_asym_au--; } } /* Enable SYM accel units */ for (i = 0; i < num_au && num_sym_au > 0; i++) { if (accel_dev->au_info->au[i].services == ADF_ACCEL_SERVICE_NULL) { accel_dev->au_info->au[i].services = ADF_ACCEL_CRYPTO; num_sym_au--; } } /* Enable compression accel units */ for (i = 0; i < num_au && num_dc_au > 0; i++) { if (accel_dev->au_info->au[i].services == ADF_ACCEL_SERVICE_NULL) { accel_dev->au_info->au[i].services = ADF_ACCEL_COMPRESSION; num_dc_au--; } } accel_dev->au_info->dc_ae_msk |= hw_data->get_obj_cfg_ae_mask(accel_dev, ADF_ACCEL_COMPRESSION); return 0; } static int adf_init_accel_units(struct adf_accel_dev *accel_dev) { return adf_init_accel_unit_services(accel_dev); } static void adf_exit_accel_units(struct adf_accel_dev *accel_dev) { /* reset the AU service */ adf_exit_accel_unit_services(accel_dev); } static const char * get_obj_name(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { switch (service) { case ADF_ACCEL_ASYM: return ADF_4XXX_ASYM_OBJ; case ADF_ACCEL_CRYPTO: return ADF_4XXX_SYM_OBJ; case ADF_ACCEL_COMPRESSION: return ADF_4XXX_DC_OBJ; case ADF_ACCEL_ADMIN: return ADF_4XXX_ADMIN_OBJ; default: return NULL; } } static uint32_t get_objs_num(struct adf_accel_dev *accel_dev) { return ADF_4XXX_MAX_OBJ; } static uint32_t get_obj_cfg_ae_mask(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { u32 ae_mask = 0; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); struct adf_accel_unit *accel_unit = accel_dev->au_info->au; u32 i = 0; if (service == ADF_ACCEL_SERVICE_NULL) return 0; for (i = 0; i < num_au; i++) { if (accel_unit[i].services == service) ae_mask |= accel_unit[i].ae_mask; } return ae_mask; } static enum adf_accel_unit_services adf_4xxx_get_service_type(struct adf_accel_dev *accel_dev, s32 obj_num) { struct adf_accel_unit *accel_unit; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u8 num_au = hw_data->get_num_accel_units(hw_data); int i; if (!hw_data->service_to_load_mask) return ADF_ACCEL_SERVICE_NULL; if (accel_dev->au_info && accel_dev->au_info->au) accel_unit = accel_dev->au_info->au; else return ADF_ACCEL_SERVICE_NULL; for (i = num_au - 2; i >= 0; i--) { if (hw_data->service_to_load_mask & accel_unit[i].services) { hw_data->service_to_load_mask &= ~accel_unit[i].services; return accel_unit[i].services; } } /* admin AE should be loaded last */ if (hw_data->service_to_load_mask & accel_unit[num_au - 1].services) { hw_data->service_to_load_mask &= ~accel_unit[num_au - 1].services; return accel_unit[num_au - 1].services; } return ADF_ACCEL_SERVICE_NULL; } static void get_ring_svc_map_data(int ring_pair_index, u16 ring_to_svc_map, u8 *serv_type, int *ring_index, int *num_rings_per_srv, int bundle_num) { *serv_type = GET_SRV_TYPE(ring_to_svc_map, bundle_num % ADF_CFG_NUM_SERVICES); *ring_index = 0; *num_rings_per_srv = ADF_4XXX_NUM_RINGS_PER_BANK / 2; } static int adf_get_dc_extcapabilities(struct adf_accel_dev *accel_dev, u32 *capabilities) { struct icp_qat_fw_init_admin_req req; struct icp_qat_fw_init_admin_resp resp; u8 i; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u8 num_au = hw_data->get_num_accel_units(hw_data); u32 first_dc_ae = 0; for (i = 0; i < num_au; i++) { if (accel_dev->au_info->au[i].services & ADF_ACCEL_COMPRESSION) { first_dc_ae = accel_dev->au_info->au[i].ae_mask; first_dc_ae &= ~(first_dc_ae - 1); } } memset(&req, 0, sizeof(req)); memset(&resp, 0, sizeof(resp)); req.cmd_id = ICP_QAT_FW_COMP_CAPABILITY_GET; if (likely(first_dc_ae)) { if (adf_send_admin(accel_dev, &req, &resp, first_dc_ae) || resp.status) { *capabilities = 0; return EFAULT; } *capabilities = resp.extended_features; } return 0; } static int adf_get_fw_status(struct adf_accel_dev *accel_dev, u8 *major, u8 *minor, u8 *patch) { struct icp_qat_fw_init_admin_req req; struct icp_qat_fw_init_admin_resp resp; u32 ae_mask = 1; memset(&req, 0, sizeof(req)); memset(&resp, 0, sizeof(resp)); req.cmd_id = ICP_QAT_FW_STATUS_GET; if (adf_send_admin(accel_dev, &req, &resp, ae_mask)) return EFAULT; *major = resp.version_major_num; *minor = resp.version_minor_num; *patch = resp.version_patch_num; return 0; } static int adf_4xxx_send_admin_init(struct adf_accel_dev *accel_dev) { int ret = 0; struct icp_qat_fw_init_admin_req req; struct icp_qat_fw_init_admin_resp resp; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 ae_mask = hw_data->ae_mask; u32 admin_ae_mask = hw_data->admin_ae_mask; u8 num_au = hw_data->get_num_accel_units(hw_data); u8 i; u32 dc_capabilities = 0; for (i = 0; i < num_au; i++) { if (accel_dev->au_info->au[i].services == ADF_ACCEL_SERVICE_NULL) ae_mask &= ~accel_dev->au_info->au[i].ae_mask; if (accel_dev->au_info->au[i].services != ADF_ACCEL_ADMIN) admin_ae_mask &= ~accel_dev->au_info->au[i].ae_mask; } if (!accel_dev->admin) { device_printf(GET_DEV(accel_dev), "adf_admin not available\n"); return EFAULT; } memset(&req, 0, sizeof(req)); memset(&resp, 0, sizeof(resp)); req.cmd_id = ICP_QAT_FW_CONSTANTS_CFG; req.init_cfg_sz = ADF_CONST_TABLE_SIZE; req.init_cfg_ptr = accel_dev->admin->const_tbl_addr; if (adf_send_admin(accel_dev, &req, &resp, admin_ae_mask)) { device_printf(GET_DEV(accel_dev), "Error sending constants config message\n"); return EFAULT; } memset(&req, 0, sizeof(req)); memset(&resp, 0, sizeof(resp)); req.cmd_id = ICP_QAT_FW_INIT_ME; if (adf_send_admin(accel_dev, &req, &resp, ae_mask)) { device_printf(GET_DEV(accel_dev), "Error sending init message\n"); return EFAULT; } memset(&req, 0, sizeof(req)); memset(&resp, 0, sizeof(resp)); req.cmd_id = ICP_QAT_FW_HEARTBEAT_TIMER_SET; req.init_cfg_ptr = accel_dev->admin->phy_hb_addr; if (adf_get_hb_timer(accel_dev, &req.heartbeat_ticks)) return EINVAL; if (adf_send_admin(accel_dev, &req, &resp, ae_mask)) device_printf(GET_DEV(accel_dev), "Heartbeat is not supported\n"); ret = adf_get_dc_extcapabilities(accel_dev, &dc_capabilities); if (unlikely(ret)) { device_printf(GET_DEV(accel_dev), "Could not get FW ext. capabilities\n"); } accel_dev->hw_device->extended_dc_capabilities = dc_capabilities; adf_get_fw_status(accel_dev, &accel_dev->fw_versions.fw_version_major, &accel_dev->fw_versions.fw_version_minor, &accel_dev->fw_versions.fw_version_patch); device_printf(GET_DEV(accel_dev), "FW version: %d.%d.%d\n", accel_dev->fw_versions.fw_version_major, accel_dev->fw_versions.fw_version_minor, accel_dev->fw_versions.fw_version_patch); return ret; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { return DEV_SKU_1; } static struct adf_accel_unit * get_au_by_ae(struct adf_accel_dev *accel_dev, int ae_num) { int i = 0; struct adf_accel_unit *accel_unit = accel_dev->au_info->au; if (!accel_unit) return NULL; for (i = 0; i < ADF_4XXX_MAX_ACCELUNITS; i++) if (accel_unit[i].ae_mask & BIT(ae_num)) return &accel_unit[i]; return NULL; } static bool check_accel_unit_service(enum adf_accel_unit_services au_srv, enum adf_cfg_service_type ring_srv) { if ((ADF_ACCEL_SERVICE_NULL == au_srv) && ring_srv == NA) return true; if ((au_srv & ADF_ACCEL_COMPRESSION) && ring_srv == COMP) return true; if ((au_srv & ADF_ACCEL_ASYM) && ring_srv == ASYM) return true; if ((au_srv & ADF_ACCEL_CRYPTO) && ring_srv == SYM) return true; return false; } static void adf_4xxx_cfg_gen_dispatch_arbiter(struct adf_accel_dev *accel_dev, u32 *thrd_to_arb_map_gen) { struct adf_accel_unit *au = NULL; int engine = 0; int thread = 0; int service; u16 ena_srv_mask; u16 service_type; u32 service_mask; unsigned long thd_srv_mask = default_active_thd_mask; + struct adf_hw_device_data *hw_data = accel_dev->hw_device; ena_srv_mask = accel_dev->hw_device->ring_to_svc_map; /* If ring_to_svc_map is not changed, return default arbiter value */ if (ena_srv_mask == ADF_4XXX_DEFAULT_RING_TO_SRV_MAP) { memcpy(thrd_to_arb_map_gen, thrd_to_arb_map, sizeof(thrd_to_arb_map_gen[0]) * ADF_4XXX_MAX_ACCELENGINES); return; } for (engine = 0; engine < ADF_4XXX_MAX_ACCELENGINES - 1; engine++) { thrd_to_arb_map_gen[engine] = 0; service_mask = 0; au = get_au_by_ae(accel_dev, engine); if (!au) continue; for (service = 0; service < ADF_CFG_MAX_SERVICES; service++) { service_type = GET_SRV_TYPE(ena_srv_mask, service); if (check_accel_unit_service(au->services, service_type)) service_mask |= BIT(service); } if (au->services == ADF_ACCEL_COMPRESSION) thd_srv_mask = dc_me_active_thd_mask; + else if (au->services == ADF_ACCEL_ASYM) + thd_srv_mask = hw_data->asym_ae_active_thd_mask; else thd_srv_mask = default_active_thd_mask; for_each_set_bit(thread, &thd_srv_mask, 8) { thrd_to_arb_map_gen[engine] |= (service_mask << (ADF_CFG_MAX_SERVICES * thread)); } } } static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, u32 const **arb_map_config) { int i; struct adf_hw_device_data *hw_device = accel_dev->hw_device; for (i = 1; i < ADF_4XXX_MAX_ACCELENGINES; i++) { if (~hw_device->ae_mask & (1 << i)) thrd_to_arb_map[i] = 0; } adf_4xxx_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map_gen); *arb_map_config = thrd_to_arb_map_gen; } static void get_arb_info(struct arb_info *arb_info) { arb_info->wrk_cfg_offset = ADF_4XXX_ARB_CONFIG; arb_info->arbiter_offset = ADF_4XXX_ARB_OFFSET; arb_info->wrk_thd_2_srv_arb_map = ADF_4XXX_ARB_WRK_2_SER_MAP_OFFSET; } static void get_admin_info(struct admin_info *admin_csrs_info) { admin_csrs_info->mailbox_offset = ADF_4XXX_MAILBOX_BASE_OFFSET; admin_csrs_info->admin_msg_ur = ADF_4XXX_ADMINMSGUR_OFFSET; admin_csrs_info->admin_msg_lr = ADF_4XXX_ADMINMSGLR_OFFSET; } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_4XXX_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; /* Enable all in errsou3 except VFLR notification on host */ ADF_CSR_WR(csr, ADF_4XXX_ERRMSK3, ADF_4XXX_VFLNOTIFY); } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { struct resource *addr; addr = (&GET_BARS(accel_dev)[ADF_4XXX_PMISC_BAR])->virt_addr; /* Enable bundle interrupts */ ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_RP_X0_MASK_OFFSET, 0); ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_RP_X1_MASK_OFFSET, 0); /* Enable misc interrupts */ ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_MASK_OFFSET, 0); } static int adf_init_device(struct adf_accel_dev *accel_dev) { struct resource *addr; u32 status; u32 csr; int ret; addr = (&GET_BARS(accel_dev)[ADF_4XXX_PMISC_BAR])->virt_addr; /* Temporarily mask PM interrupt */ csr = ADF_CSR_RD(addr, ADF_4XXX_ERRMSK2); csr |= ADF_4XXX_PM_SOU; ADF_CSR_WR(addr, ADF_4XXX_ERRMSK2, csr); /* Set DRV_ACTIVE bit to power up the device */ ADF_CSR_WR(addr, ADF_4XXX_PM_INTERRUPT, ADF_4XXX_PM_DRV_ACTIVE); /* Poll status register to make sure the device is powered up */ status = 0; ret = read_poll_timeout(ADF_CSR_RD, status, status & ADF_4XXX_PM_INIT_STATE, ADF_4XXX_PM_POLL_DELAY_US, ADF_4XXX_PM_POLL_TIMEOUT_US, true, addr, ADF_4XXX_PM_STATUS); if (ret) device_printf(GET_DEV(accel_dev), "Failed to power up the device\n"); return ret; } void -adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data) +adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 id) { hw_data->dev_class = &adf_4xxx_class; hw_data->instance_id = adf_4xxx_class.instances++; hw_data->num_banks = ADF_4XXX_ETR_MAX_BANKS; hw_data->num_rings_per_bank = ADF_4XXX_NUM_RINGS_PER_BANK; hw_data->num_accel = ADF_4XXX_MAX_ACCELERATORS; hw_data->num_engines = ADF_4XXX_MAX_ACCELENGINES; hw_data->num_logical_accel = 1; hw_data->tx_rx_gap = ADF_4XXX_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_4XXX_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; hw_data->get_arb_info = get_arb_info; hw_data->get_admin_info = get_admin_info; hw_data->get_accel_cap = adf_4xxx_get_hw_cap; hw_data->clock_frequency = ADF_4XXX_AE_FREQ; hw_data->get_sku = get_sku; hw_data->heartbeat_ctr_num = ADF_NUM_HB_CNT_PER_AE; hw_data->fw_name = ADF_4XXX_FW; hw_data->fw_mmp_name = ADF_4XXX_MMP; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->send_admin_init = adf_4xxx_send_admin_init; hw_data->init_arb = adf_init_gen2_arb; hw_data->exit_arb = adf_exit_arb; hw_data->get_arb_mapping = adf_get_arbiter_mapping; hw_data->enable_ints = adf_enable_ints; hw_data->init_device = adf_init_device; hw_data->reset_device = adf_reset_flr; hw_data->restore_device = adf_dev_restore; hw_data->init_accel_units = adf_init_accel_units; hw_data->exit_accel_units = adf_exit_accel_units; hw_data->get_num_accel_units = get_num_accel_units; hw_data->configure_accel_units = adf_4xxx_configure_accel_units; hw_data->get_ring_to_svc_map = get_ring_to_svc_map; hw_data->get_ring_svc_map_data = get_ring_svc_map_data; hw_data->admin_ae_mask = ADF_4XXX_ADMIN_AE_MASK; hw_data->get_objs_num = get_objs_num; hw_data->get_obj_name = get_obj_name; hw_data->get_obj_cfg_ae_mask = get_obj_cfg_ae_mask; hw_data->get_service_type = adf_4xxx_get_service_type; hw_data->set_msix_rttable = set_msix_default_rttable; hw_data->set_ssm_wdtimer = adf_gen4_set_ssm_wdtimer; hw_data->disable_iov = adf_disable_sriov; - hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; hw_data->config_device = adf_config_device; - hw_data->set_asym_rings_mask = adf_cfg_set_asym_rings_mask; + hw_data->set_asym_rings_mask = adf_set_asym_rings_mask; hw_data->get_hb_clock = get_hb_clock; + hw_data->int_timer_init = adf_int_timer_init; + hw_data->int_timer_exit = adf_int_timer_exit; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->measure_clock = measure_clock; hw_data->query_storage_cap = 1; + hw_data->ring_pair_reset = adf_gen4_ring_pair_reset; + + switch (id) { + case ADF_401XX_PCI_DEVICE_ID: + hw_data->asym_ae_active_thd_mask = DEFAULT_401XX_ASYM_AE_MASK; + break; + case ADF_4XXX_PCI_DEVICE_ID: + default: + hw_data->asym_ae_active_thd_mask = DEFAULT_4XXX_ASYM_AE_MASK; + } adf_gen4_init_hw_csr_info(&hw_data->csr_info); + adf_gen4_init_pf_pfvf_ops(&hw_data->csr_info.pfvf_ops); } void adf_clean_hw_data_4xxx(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } diff --git a/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h b/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h index c3e9750e2b17..0d1f8d8c833d 100644 --- a/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h +++ b/sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h @@ -1,111 +1,115 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007 - 2022 Intel Corporation */ /* $FreeBSD$ */ #ifndef ADF_4XXX_HW_DATA_H_ #define ADF_4XXX_HW_DATA_H_ #include +#define DEFAULT_4XXX_ASYM_AE_MASK 0x03 +#define DEFAULT_401XX_ASYM_AE_MASK 0x3F + /* PCIe configuration space */ #define ADF_4XXX_SRAM_BAR 0 #define ADF_4XXX_PMISC_BAR 1 #define ADF_4XXX_ETR_BAR 2 #define ADF_4XXX_RX_RINGS_OFFSET 1 #define ADF_4XXX_TX_RINGS_MASK 0x1 #define ADF_4XXX_MAX_ACCELERATORS 1 #define ADF_4XXX_MAX_ACCELENGINES 9 #define ADF_4XXX_BAR_MASK (BIT(0) | BIT(2) | BIT(4)) /* 2 Accel units dedicated to services and */ /* 1 Accel unit dedicated to Admin AE */ #define ADF_4XXX_MAX_ACCELUNITS 3 /* Physical function fuses */ #define ADF_4XXX_FUSECTL0_OFFSET (0x2C8) #define ADF_4XXX_FUSECTL1_OFFSET (0x2CC) #define ADF_4XXX_FUSECTL2_OFFSET (0x2D0) #define ADF_4XXX_FUSECTL3_OFFSET (0x2D4) #define ADF_4XXX_FUSECTL4_OFFSET (0x2D8) #define ADF_4XXX_FUSECTL5_OFFSET (0x2DC) #define ADF_4XXX_ACCELERATORS_MASK (0x1) #define ADF_4XXX_ACCELENGINES_MASK (0x1FF) #define ADF_4XXX_ADMIN_AE_MASK (0x100) #define ADF_4XXX_ETR_MAX_BANKS 64 /* MSIX interrupt */ #define ADF_4XXX_SMIAPF_RP_X0_MASK_OFFSET (0x41A040) #define ADF_4XXX_SMIAPF_RP_X1_MASK_OFFSET (0x41A044) #define ADF_4XXX_SMIAPF_MASK_OFFSET (0x41A084) #define ADF_4XXX_MSIX_RTTABLE_OFFSET(i) (0x409000 + ((i)*0x04)) /* Bank and ring configuration */ #define ADF_4XXX_NUM_RINGS_PER_BANK 2 /* Error source registers */ #define ADF_4XXX_ERRSOU0 (0x41A200) #define ADF_4XXX_ERRSOU1 (0x41A204) #define ADF_4XXX_ERRSOU2 (0x41A208) #define ADF_4XXX_ERRSOU3 (0x41A20C) /* Error source mask registers */ #define ADF_4XXX_ERRMSK0 (0x41A210) #define ADF_4XXX_ERRMSK1 (0x41A214) #define ADF_4XXX_ERRMSK2 (0x41A218) #define ADF_4XXX_ERRMSK3 (0x41A21C) #define ADF_4XXX_VFLNOTIFY BIT(7) +#define ADF_4XXX_DEF_ASYM_MASK 0x1 /* Arbiter configuration */ #define ADF_4XXX_ARB_CONFIG (BIT(31) | BIT(6) | BIT(0)) #define ADF_4XXX_ARB_OFFSET (0x0) #define ADF_4XXX_ARB_WRK_2_SER_MAP_OFFSET (0x400) /* Admin Interface Reg Offset */ #define ADF_4XXX_ADMINMSGUR_OFFSET (0x500574) #define ADF_4XXX_ADMINMSGLR_OFFSET (0x500578) #define ADF_4XXX_MAILBOX_BASE_OFFSET (0x600970) /* Power management */ #define ADF_4XXX_PM_POLL_DELAY_US 20 #define ADF_4XXX_PM_POLL_TIMEOUT_US USEC_PER_SEC #define ADF_4XXX_PM_STATUS (0x50A00C) #define ADF_4XXX_PM_INTERRUPT (0x50A028) #define ADF_4XXX_PM_DRV_ACTIVE BIT(20) #define ADF_4XXX_PM_INIT_STATE BIT(21) /* Power management source in ERRSOU2 and ERRMSK2 */ #define ADF_4XXX_PM_SOU BIT(18) /* Firmware Binaries */ #define ADF_4XXX_FW "qat_4xxx_fw" #define ADF_4XXX_MMP "qat_4xxx_mmp_fw" #define ADF_4XXX_DC_OBJ "qat_4xxx_dc.bin" #define ADF_4XXX_SYM_OBJ "qat_4xxx_sym.bin" #define ADF_4XXX_ASYM_OBJ "qat_4xxx_asym.bin" #define ADF_4XXX_ADMIN_OBJ "qat_4xxx_admin.bin" /* Only 3 types of images can be loaded including the admin image */ #define ADF_4XXX_MAX_OBJ 3 #define ADF_4XXX_AE_FREQ (1000 * 1000000) #define ADF_4XXX_KPT_COUNTER_FREQ (100 * 1000000) #define ADF_4XXX_MIN_AE_FREQ (9 * 1000000) #define ADF_4XXX_MAX_AE_FREQ (1100 * 1000000) /* qat_4xxx fuse bits are different from old GENs, redefine them */ enum icp_qat_4xxx_slice_mask { ICP_ACCEL_4XXX_MASK_CIPHER_SLICE = BIT(0), ICP_ACCEL_4XXX_MASK_AUTH_SLICE = BIT(1), ICP_ACCEL_4XXX_MASK_PKE_SLICE = BIT(2), ICP_ACCEL_4XXX_MASK_COMPRESS_SLICE = BIT(3), ICP_ACCEL_4XXX_MASK_UCS_SLICE = BIT(4), ICP_ACCEL_4XXX_MASK_EIA3_SLICE = BIT(5), ICP_ACCEL_4XXX_MASK_SMX_SLICE = BIT(6), }; -void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data); +void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 id); void adf_clean_hw_data_4xxx(struct adf_hw_device_data *hw_data); #endif diff --git a/sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c b/sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c index 76dcf7b37dee..f131f6359296 100644 --- a/sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c +++ b/sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c @@ -1,267 +1,267 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007 - 2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_accel_devices.h" #include "adf_4xxx_hw_data.h" #include "adf_gen4_hw_data.h" #include "adf_fw_counters.h" #include "adf_cfg_device.h" #include #include #include #include #include #include "adf_heartbeat_dbg.h" #include "adf_cnvnr_freq_counters.h" static MALLOC_DEFINE(M_QAT_4XXX, "qat_4xxx", "qat_4xxx"); #define ADF_SYSTEM_DEVICE(device_id) \ { \ PCI_VENDOR_ID_INTEL, device_id \ } static const struct pci_device_id adf_pci_tbl[] = { ADF_SYSTEM_DEVICE(ADF_4XXX_PCI_DEVICE_ID), ADF_SYSTEM_DEVICE(ADF_401XX_PCI_DEVICE_ID), { 0, } }; static int adf_probe(device_t dev) { const struct pci_device_id *id; for (id = adf_pci_tbl; id->vendor != 0; id++) { if (pci_get_vendor(dev) == id->vendor && pci_get_device(dev) == id->device) { device_set_desc(dev, "Intel " ADF_4XXX_DEVICE_NAME " QuickAssist"); return BUS_PROBE_GENERIC; } } return ENXIO; } static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) { struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; int i; if (accel_dev->dma_tag) bus_dma_tag_destroy(accel_dev->dma_tag); for (i = 0; i < ADF_PCI_MAX_BARS; i++) { struct adf_bar *bar = &accel_pci_dev->pci_bars[i]; if (bar->virt_addr) bus_free_resource(accel_pci_dev->pci_dev, SYS_RES_MEMORY, bar->virt_addr); } if (accel_dev->hw_device) { switch (pci_get_device(accel_pci_dev->pci_dev)) { case ADF_4XXX_PCI_DEVICE_ID: case ADF_401XX_PCI_DEVICE_ID: adf_clean_hw_data_4xxx(accel_dev->hw_device); break; default: break; } free(accel_dev->hw_device, M_QAT_4XXX); accel_dev->hw_device = NULL; } adf_cfg_dev_remove(accel_dev); adf_devmgr_rm_dev(accel_dev, NULL); } static int adf_attach(device_t dev) { struct adf_accel_dev *accel_dev; struct adf_accel_pci *accel_pci_dev; struct adf_hw_device_data *hw_data; unsigned int i, bar_nr; int ret, rid; struct adf_cfg_device *cfg_dev = NULL; - /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of + /* Set pci MaxPayLoad to 512. Implemented to avoid the issue of * Pci-passthrough causing Maxpayload to be reset to 128 bytes * when the device is reset. */ - if (pci_get_max_payload(dev) != 256) - pci_set_max_payload(dev, 256); + if (pci_get_max_payload(dev) != 512) + pci_set_max_payload(dev, 512); accel_dev = device_get_softc(dev); INIT_LIST_HEAD(&accel_dev->crypto_list); accel_pci_dev = &accel_dev->accel_pci_dev; accel_pci_dev->pci_dev = dev; if (bus_get_domain(dev, &accel_pci_dev->node) != 0) accel_pci_dev->node = 0; /* Add accel device to accel table. * This should be called before adf_cleanup_accel is called */ if (adf_devmgr_add_dev(accel_dev, NULL)) { device_printf(dev, "Failed to add new accelerator device.\n"); return ENXIO; } /* Allocate and configure device configuration structure */ hw_data = malloc(sizeof(*hw_data), M_QAT_4XXX, M_WAITOK | M_ZERO); accel_dev->hw_device = hw_data; - adf_init_hw_data_4xxx(accel_dev->hw_device); + adf_init_hw_data_4xxx(accel_dev->hw_device, pci_get_device(dev)); accel_pci_dev->revid = pci_get_revid(dev); hw_data->fuses = pci_read_config(dev, ADF_4XXX_FUSECTL4_OFFSET, 4); if (accel_pci_dev->revid == 0x00) { device_printf(dev, "A0 stepping is not supported.\n"); ret = ENODEV; goto out_err; } /* Get PPAERUCM values and store */ ret = adf_aer_store_ppaerucm_reg(dev, hw_data); if (ret) goto out_err; /* Get Accelerators and Accelerators Engines masks */ hw_data->accel_mask = hw_data->get_accel_mask(accel_dev); hw_data->ae_mask = hw_data->get_ae_mask(accel_dev); accel_pci_dev->sku = hw_data->get_sku(hw_data); /* If the device has no acceleration engines then ignore it. */ if (!hw_data->accel_mask || !hw_data->ae_mask || (~hw_data->ae_mask & 0x01)) { device_printf(dev, "No acceleration units found\n"); ret = ENXIO; goto out_err; } /* Create device configuration table */ ret = adf_cfg_dev_add(accel_dev); if (ret) goto out_err; ret = adf_clock_debugfs_add(accel_dev); if (ret) goto out_err; - pci_set_max_read_req(dev, 1024); + pci_set_max_read_req(dev, 4096); ret = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE, /* BUS_SPACE_UNRESTRICTED */ 1, BUS_SPACE_MAXSIZE, 0, NULL, NULL, &accel_dev->dma_tag); if (ret) goto out_err; if (hw_data->get_accel_cap) { hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev); } /* Find and map all the device's BARS */ i = 0; for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0; bar_nr++) { struct adf_bar *bar; rid = PCIR_BAR(bar_nr); if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0) continue; bar = &accel_pci_dev->pci_bars[i++]; bar->virt_addr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (!bar->virt_addr) { device_printf(dev, "Failed to map BAR %d\n", bar_nr); ret = ENXIO; goto out_err; } bar->base_addr = rman_get_start(bar->virt_addr); bar->size = rman_get_size(bar->virt_addr); } pci_enable_busmaster(dev); if (!accel_dev->hw_device->config_device) { ret = EFAULT; goto out_err; } ret = accel_dev->hw_device->config_device(accel_dev); if (ret) goto out_err; ret = adf_dev_init(accel_dev); if (ret) goto out_dev_shutdown; ret = adf_dev_start(accel_dev); if (ret) goto out_dev_stop; cfg_dev = accel_dev->cfg->dev; adf_cfg_device_clear(cfg_dev, accel_dev); free(cfg_dev, M_QAT); accel_dev->cfg->dev = NULL; return ret; out_dev_stop: adf_dev_stop(accel_dev); out_dev_shutdown: adf_dev_shutdown(accel_dev); out_err: adf_cleanup_accel(accel_dev); return ret; } static int adf_detach(device_t dev) { struct adf_accel_dev *accel_dev = device_get_softc(dev); if (adf_dev_stop(accel_dev)) { device_printf(dev, "Failed to stop QAT accel dev\n"); return EBUSY; } adf_dev_shutdown(accel_dev); adf_cleanup_accel(accel_dev); return 0; } static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe), DEVMETHOD(device_attach, adf_attach), DEVMETHOD(device_detach, adf_detach), DEVMETHOD_END }; static driver_t adf_driver = { "qat", adf_methods, sizeof(struct adf_accel_dev) }; DRIVER_MODULE_ORDERED(qat_4xxx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD); MODULE_VERSION(qat_4xxx, 1); MODULE_DEPEND(qat_4xxx, qat_common, 1, 1, 1); MODULE_DEPEND(qat_4xxx, qat_api, 1, 1, 1); MODULE_DEPEND(qat_4xxx, linuxkpi, 1, 1, 1); diff --git a/sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c b/sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c new file mode 100644 index 000000000000..add271accb7d --- /dev/null +++ b/sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c @@ -0,0 +1,390 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#include +#include +#include +#include +#include +#include +#include "adf_4xxxvf_hw_data.h" +#include "icp_qat_hw.h" +#include "adf_transport_internal.h" +#include "adf_pfvf_vf_proto.h" + +static struct adf_hw_device_class adf_4xxxiov_class = + { .name = ADF_4XXXVF_DEVICE_NAME, .type = DEV_4XXXVF, .instances = 0 }; + +#define ADF_4XXXIOV_DEFAULT_RING_TO_SRV_MAP \ + (ASYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + ASYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + SYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +#define ADF_4XXXIOV_ASYM_SYM ADF_4XXXIOV_DEFAULT_RING_TO_SRV_MAP + +#define ADF_4XXXIOV_DC \ + (COMP | COMP << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +#define ADF_4XXXIOV_SYM \ + (SYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + SYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + SYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +#define ADF_4XXXIOV_ASYM \ + (ASYM | ASYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + ASYM << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + ASYM << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +#define ADF_4XXXIOV_ASYM_DC \ + (ASYM | ASYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +#define ADF_4XXXIOV_SYM_DC \ + (SYM | SYM << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + COMP << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + COMP << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +#define ADF_4XXXIOV_NA \ + (NA | NA << ADF_CFG_SERV_RING_PAIR_1_SHIFT | \ + NA << ADF_CFG_SERV_RING_PAIR_2_SHIFT | \ + NA << ADF_CFG_SERV_RING_PAIR_3_SHIFT) + +struct adf_enabled_services { + const char svcs_enabled[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; + u16 rng_to_svc_msk; +}; + +static struct adf_enabled_services adf_4xxxiov_svcs[] = + { { "dc", ADF_4XXXIOV_DC }, + { "sym", ADF_4XXXIOV_SYM }, + { "asym", ADF_4XXXIOV_ASYM }, + { "dc;asym", ADF_4XXXIOV_ASYM_DC }, + { "asym;dc", ADF_4XXXIOV_ASYM_DC }, + { "sym;dc", ADF_4XXXIOV_SYM_DC }, + { "dc;sym", ADF_4XXXIOV_SYM_DC }, + { "asym;sym", ADF_4XXXIOV_ASYM_SYM }, + { "sym;asym", ADF_4XXXIOV_ASYM_SYM }, + { "cy", ADF_4XXXIOV_ASYM_SYM } }; + +static u32 +get_accel_mask(struct adf_accel_dev *accel_dev) +{ + return ADF_4XXXIOV_ACCELERATORS_MASK; +} + +static u32 +get_ae_mask(struct adf_accel_dev *accel_dev) +{ + return ADF_4XXXIOV_ACCELENGINES_MASK; +} + +static u32 +get_num_accels(struct adf_hw_device_data *self) +{ + return ADF_4XXXIOV_MAX_ACCELERATORS; +} + +static u32 +get_num_aes(struct adf_hw_device_data *self) +{ + return ADF_4XXXIOV_MAX_ACCELENGINES; +} + +static u32 +get_misc_bar_id(struct adf_hw_device_data *self) +{ + return ADF_4XXXIOV_PMISC_BAR; +} + +static u32 +get_etr_bar_id(struct adf_hw_device_data *self) +{ + return ADF_4XXXIOV_ETR_BAR; +} + +static u32 +get_clock_speed(struct adf_hw_device_data *self) +{ + /* CPP clock is half high-speed clock */ + return self->clock_frequency / 2; +} + +static enum dev_sku_info +get_sku(struct adf_hw_device_data *self) +{ + return DEV_SKU_VF; +} + +static int +adf_vf_int_noop(struct adf_accel_dev *accel_dev) +{ + return 0; +} + +static void +adf_vf_void_noop(struct adf_accel_dev *accel_dev) +{ +} + +u32 +adf_4xxxvf_get_hw_cap(struct adf_accel_dev *accel_dev) +{ + device_t pdev = accel_dev->accel_pci_dev.pci_dev; + u32 vffusectl1; + u32 capabilities; + + capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC + + ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC + + ICP_ACCEL_CAPABILITIES_CIPHER + + ICP_ACCEL_CAPABILITIES_AUTHENTICATION + + ICP_ACCEL_CAPABILITIES_COMPRESSION + + ICP_ACCEL_CAPABILITIES_SHA3_EXT + ICP_ACCEL_CAPABILITIES_SM2 + + ICP_ACCEL_CAPABILITIES_SM3 + ICP_ACCEL_CAPABILITIES_SM4 + + ICP_ACCEL_CAPABILITIES_CHACHA_POLY + + ICP_ACCEL_CAPABILITIES_AESGCM_SPC + + ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64 + + ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION + + ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION; + + /* Get fused capabilities */ + vffusectl1 = pci_read_config(pdev, ADF_4XXXIOV_VFFUSECTL1_OFFSET, 4); + + if (vffusectl1 & BIT(7)) { + capabilities &= + ~(ICP_ACCEL_CAPABILITIES_SM3 + ICP_ACCEL_CAPABILITIES_SM4); + } + if (vffusectl1 & BIT(6)) { + capabilities &= ~ICP_ACCEL_CAPABILITIES_SM3; + } + if (vffusectl1 & BIT(3)) { + capabilities &= ~(ICP_ACCEL_CAPABILITIES_COMPRESSION + + ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64); + } + if (vffusectl1 & BIT(2)) { + capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; + } + if (vffusectl1 & BIT(1)) { + capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; + } + if (vffusectl1 & BIT(0)) { + capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER; + } + return capabilities; +} + +static void +adf_set_asym_rings_mask(struct adf_accel_dev *accel_dev) +{ + accel_dev->hw_device->asym_rings_mask = ADF_4XXX_DEF_ASYM_MASK; +} + +static void +enable_pf2vm_interrupt(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data; + struct adf_bar *pmisc; + struct resource *pmisc_bar_addr; + + hw_data = accel_dev->hw_device; + pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; + pmisc_bar_addr = pmisc->virt_addr; + + ADF_CSR_WR(pmisc_bar_addr, ADF_4XXXIOV_VINTMSKPF2VM_OFFSET, 0x0); +} + +static void +disable_pf2vm_interrupt(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data; + struct adf_bar *pmisc; + struct resource *pmisc_bar_addr; + + hw_data = accel_dev->hw_device; + pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; + pmisc_bar_addr = pmisc->virt_addr; + + ADF_CSR_WR(pmisc_bar_addr, ADF_4XXXIOV_VINTMSKPF2VM_OFFSET, BIT(0)); +} + +static int +interrupt_active_pf2vm(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data; + struct adf_bar *pmisc; + struct resource *pmisc_bar_addr; + u32 v_sou, v_msk; + + hw_data = accel_dev->hw_device; + pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; + pmisc_bar_addr = pmisc->virt_addr; + + v_sou = ADF_CSR_RD(pmisc_bar_addr, ADF_4XXXIOV_VINTSOUPF2VM_OFFSET); + v_msk = ADF_CSR_RD(pmisc_bar_addr, ADF_4XXXIOV_VINTMSKPF2VM_OFFSET); + + return ((v_sou & ~v_msk) & BIT(0)) ? 1 : 0; +} + +static int +get_int_active_bundles(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data; + struct adf_bar *pmisc; + struct resource *pmisc_bar_addr; + u32 v_sou, v_msk; + + hw_data = accel_dev->hw_device; + pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; + pmisc_bar_addr = pmisc->virt_addr; + + v_sou = ADF_CSR_RD(pmisc_bar_addr, ADF_4XXXIOV_VINTSOU_OFFSET); + v_msk = ADF_CSR_RD(pmisc_bar_addr, ADF_4XXXIOV_VINTMSK_OFFSET); + + return v_sou & ~v_msk & 0xF; +} + +static void +get_ring_svc_map_data(int ring_pair_index, + u16 ring_to_svc_map, + u8 *serv_type, + int *ring_index, + int *num_rings_per_srv, + int bank_num) +{ + *serv_type = + GET_SRV_TYPE(ring_to_svc_map, bank_num % ADF_CFG_NUM_SERVICES); + *ring_index = 0; + *num_rings_per_srv = ADF_4XXXIOV_NUM_RINGS_PER_BANK / 2; +} + +static int +get_ring_to_svc_map(struct adf_accel_dev *accel_dev, u16 *ring_to_svc_map) +{ + char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; + char val[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; + u32 i = 0; + + /* Get the services enabled by user if provided. + * The function itself will also be called during the driver probe + * procedure where no ServicesEnable is provided. Then the device + * should still start with default configuration without + * ServicesEnable. Hence it still returns 0 when the + * adf_cfg_get_param_value() function returns failure. + */ + snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); + if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) + return 0; + + for (i = 0; i < ARRAY_SIZE(adf_4xxxiov_svcs); i++) { + if (!strncmp(val, + adf_4xxxiov_svcs[i].svcs_enabled, + ADF_CFG_MAX_KEY_LEN_IN_BYTES)) { + *ring_to_svc_map = adf_4xxxiov_svcs[i].rng_to_svc_msk; + return 0; + } + } + + device_printf(GET_DEV(accel_dev), + "Invalid services enabled: %s\n", + val); + return EFAULT; +} + +static int +adf_4xxxvf_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number) +{ + struct pfvf_message req = { 0 }; + unsigned long timeout = msecs_to_jiffies(ADF_PFVF_MSG_RESP_TIMEOUT); + int ret = 0; + + if (bank_number >= accel_dev->hw_device->num_banks) + return EINVAL; + + req.type = ADF_VF2PF_MSGTYPE_RP_RESET; + req.data = bank_number; + mutex_lock(&accel_dev->u1.vf.rpreset_lock); + init_completion(&accel_dev->u1.vf.msg_received); + accel_dev->u1.vf.rpreset_sts = RPRESET_SUCCESS; + if (adf_send_vf2pf_msg(accel_dev, req)) { + device_printf(GET_DEV(accel_dev), + "vf ring pair reset failure (vf2pf msg error)\n"); + ret = EFAULT; + goto out; + } + if (!wait_for_completion_timeout(&accel_dev->u1.vf.msg_received, + timeout)) { + device_printf( + GET_DEV(accel_dev), + "vf ring pair reset failure (pf2vf msg timeout)\n"); + ret = EFAULT; + goto out; + } + if (accel_dev->u1.vf.rpreset_sts != RPRESET_SUCCESS) { + device_printf( + GET_DEV(accel_dev), + "vf ring pair reset failure (pf reports error)\n"); + ret = EFAULT; + goto out; + } + +out: + mutex_unlock(&accel_dev->u1.vf.rpreset_lock); + return ret; +} + +void +adf_init_hw_data_4xxxiov(struct adf_hw_device_data *hw_data) +{ + hw_data->dev_class = &adf_4xxxiov_class; + hw_data->num_banks = ADF_4XXXIOV_ETR_MAX_BANKS; + hw_data->num_rings_per_bank = ADF_4XXXIOV_NUM_RINGS_PER_BANK; + hw_data->num_accel = ADF_4XXXIOV_MAX_ACCELERATORS; + hw_data->num_logical_accel = 1; + hw_data->num_engines = ADF_4XXXIOV_MAX_ACCELENGINES; + hw_data->tx_rx_gap = ADF_4XXXIOV_RX_RINGS_OFFSET; + hw_data->tx_rings_mask = ADF_4XXXIOV_TX_RINGS_MASK; + hw_data->ring_to_svc_map = ADF_4XXXIOV_DEFAULT_RING_TO_SRV_MAP; + hw_data->alloc_irq = adf_vf_isr_resource_alloc; + hw_data->free_irq = adf_vf_isr_resource_free; + hw_data->enable_error_correction = adf_vf_void_noop; + hw_data->init_admin_comms = adf_vf_int_noop; + hw_data->exit_admin_comms = adf_vf_void_noop; + hw_data->send_admin_init = adf_vf2pf_notify_init; + hw_data->init_arb = adf_vf_int_noop; + hw_data->exit_arb = adf_vf_void_noop; + hw_data->disable_iov = adf_vf2pf_notify_shutdown; + hw_data->get_accel_mask = get_accel_mask; + hw_data->get_ae_mask = get_ae_mask; + hw_data->get_num_accels = get_num_accels; + hw_data->get_num_aes = get_num_aes; + hw_data->get_etr_bar_id = get_etr_bar_id; + hw_data->get_misc_bar_id = get_misc_bar_id; + hw_data->get_clock_speed = get_clock_speed; + hw_data->get_sku = get_sku; + hw_data->enable_ints = adf_vf_void_noop; + hw_data->reset_device = adf_reset_flr; + hw_data->restore_device = adf_dev_restore; + hw_data->get_ring_svc_map_data = get_ring_svc_map_data; + hw_data->get_ring_to_svc_map = get_ring_to_svc_map; + hw_data->get_accel_cap = adf_4xxxvf_get_hw_cap; + hw_data->config_device = adf_config_device; + hw_data->set_asym_rings_mask = adf_set_asym_rings_mask; + hw_data->ring_pair_reset = adf_4xxxvf_ring_pair_reset; + hw_data->enable_pf2vf_interrupt = enable_pf2vm_interrupt; + hw_data->disable_pf2vf_interrupt = disable_pf2vm_interrupt; + hw_data->interrupt_active_pf2vf = interrupt_active_pf2vm; + hw_data->get_int_active_bundles = get_int_active_bundles; + hw_data->dev_class->instances++; + adf_devmgr_update_class_index(hw_data); + gen4vf_init_hw_csr_info(&hw_data->csr_info); + adf_gen4_init_vf_pfvf_ops(&hw_data->csr_info.pfvf_ops); +} + +void +adf_clean_hw_data_4xxxiov(struct adf_hw_device_data *hw_data) +{ + hw_data->dev_class->instances--; + adf_devmgr_update_class_index(hw_data); +} diff --git a/sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.h b/sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.h new file mode 100644 index 000000000000..30877e6e6856 --- /dev/null +++ b/sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright(c) 2007-2022 Intel Corporation */ +/* $FreeBSD$ */ +#ifndef ADF_4XXXVF_HW_DATA_H_ +#define ADF_4XXXVF_HW_DATA_H_ + +#define ADF_4XXXIOV_PMISC_BAR 1 +#define ADF_4XXXIOV_ACCELERATORS_MASK 0x1 +#define ADF_4XXXIOV_ACCELENGINES_MASK 0x1 +#define ADF_4XXXIOV_MAX_ACCELERATORS 1 +#define ADF_4XXXIOV_MAX_ACCELENGINES 1 +#define ADF_4XXXIOV_NUM_RINGS_PER_BANK 2 +#define ADF_4XXXIOV_RX_RINGS_OFFSET 1 +#define ADF_4XXXIOV_TX_RINGS_MASK 0x1 +#define ADF_4XXXIOV_ETR_BAR 0 +#define ADF_4XXXIOV_ETR_MAX_BANKS 4 + +#define ADF_4XXXIOV_VINTSOU_OFFSET 0x0 +#define ADF_4XXXIOV_VINTMSK_OFFSET 0x4 +#define ADF_4XXXIOV_VINTSOUPF2VM_OFFSET 0x1000 +#define ADF_4XXXIOV_VINTMSKPF2VM_OFFSET 0x1004 +#define ADF_4XXX_DEF_ASYM_MASK 0x1 + +/* Virtual function fuses */ +#define ADF_4XXXIOV_VFFUSECTL0_OFFSET (0x40) +#define ADF_4XXXIOV_VFFUSECTL1_OFFSET (0x44) +#define ADF_4XXXIOV_VFFUSECTL2_OFFSET (0x4C) +#define ADF_4XXXIOV_VFFUSECTL4_OFFSET (0x1C4) +#define ADF_4XXXIOV_VFFUSECTL5_OFFSET (0x1C8) + +void adf_init_hw_data_4xxxiov(struct adf_hw_device_data *hw_data); +void adf_clean_hw_data_4xxxiov(struct adf_hw_device_data *hw_data); +u32 adf_4xxxvf_get_hw_cap(struct adf_accel_dev *accel_dev); +#endif diff --git a/sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c b/sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c similarity index 59% copy from sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c copy to sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c index 76dcf7b37dee..f325ff4d75a4 100644 --- a/sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c +++ b/sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c @@ -1,267 +1,282 @@ /* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright(c) 2007 - 2022 Intel Corporation */ +/* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" -#include "adf_cfg.h" -#include "adf_common_drv.h" -#include "adf_accel_devices.h" -#include "adf_4xxx_hw_data.h" +#include +#include +#include +#include "adf_4xxxvf_hw_data.h" #include "adf_gen4_hw_data.h" #include "adf_fw_counters.h" #include "adf_cfg_device.h" #include #include #include #include #include -#include "adf_heartbeat_dbg.h" -#include "adf_cnvnr_freq_counters.h" -static MALLOC_DEFINE(M_QAT_4XXX, "qat_4xxx", "qat_4xxx"); +static MALLOC_DEFINE(M_QAT_4XXXVF, "qat_4xxxvf", "qat_4xxxvf"); #define ADF_SYSTEM_DEVICE(device_id) \ { \ PCI_VENDOR_ID_INTEL, device_id \ } static const struct pci_device_id adf_pci_tbl[] = - { ADF_SYSTEM_DEVICE(ADF_4XXX_PCI_DEVICE_ID), - ADF_SYSTEM_DEVICE(ADF_401XX_PCI_DEVICE_ID), + { ADF_SYSTEM_DEVICE(ADF_4XXXIOV_PCI_DEVICE_ID), + ADF_SYSTEM_DEVICE(ADF_401XXIOV_PCI_DEVICE_ID), { 0, } }; static int adf_probe(device_t dev) { const struct pci_device_id *id; for (id = adf_pci_tbl; id->vendor != 0; id++) { if (pci_get_vendor(dev) == id->vendor && pci_get_device(dev) == id->device) { device_set_desc(dev, - "Intel " ADF_4XXX_DEVICE_NAME + "Intel " ADF_4XXXVF_DEVICE_NAME " QuickAssist"); return BUS_PROBE_GENERIC; } } return ENXIO; } static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) { struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; + struct adf_accel_dev *pf; int i; if (accel_dev->dma_tag) bus_dma_tag_destroy(accel_dev->dma_tag); + for (i = 0; i < ADF_PCI_MAX_BARS; i++) { struct adf_bar *bar = &accel_pci_dev->pci_bars[i]; if (bar->virt_addr) bus_free_resource(accel_pci_dev->pci_dev, SYS_RES_MEMORY, bar->virt_addr); } + /* + * As adf_clean_hw_data_4xxxiov() will update class index, before + * index is updated, vf must be remove from accel_table. + */ + pf = adf_devmgr_pci_to_accel_dev(pci_find_pf(accel_pci_dev->pci_dev)); + adf_devmgr_rm_dev(accel_dev, pf); + if (accel_dev->hw_device) { switch (pci_get_device(accel_pci_dev->pci_dev)) { - case ADF_4XXX_PCI_DEVICE_ID: - case ADF_401XX_PCI_DEVICE_ID: - adf_clean_hw_data_4xxx(accel_dev->hw_device); + case ADF_4XXXIOV_PCI_DEVICE_ID: + case ADF_401XXIOV_PCI_DEVICE_ID: + adf_clean_hw_data_4xxxiov(accel_dev->hw_device); break; default: break; } - free(accel_dev->hw_device, M_QAT_4XXX); + free(accel_dev->hw_device, M_QAT_4XXXVF); accel_dev->hw_device = NULL; } adf_cfg_dev_remove(accel_dev); - adf_devmgr_rm_dev(accel_dev, NULL); } static int adf_attach(device_t dev) { struct adf_accel_dev *accel_dev; + struct adf_accel_dev *pf; struct adf_accel_pci *accel_pci_dev; struct adf_hw_device_data *hw_data; unsigned int i, bar_nr; - int ret, rid; + int ret = 0; + int rid; struct adf_cfg_device *cfg_dev = NULL; - /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of - * Pci-passthrough causing Maxpayload to be reset to 128 bytes - * when the device is reset. - */ - if (pci_get_max_payload(dev) != 256) - pci_set_max_payload(dev, 256); - accel_dev = device_get_softc(dev); + accel_dev->is_vf = true; + pf = adf_devmgr_pci_to_accel_dev(pci_find_pf(dev)); INIT_LIST_HEAD(&accel_dev->crypto_list); accel_pci_dev = &accel_dev->accel_pci_dev; accel_pci_dev->pci_dev = dev; if (bus_get_domain(dev, &accel_pci_dev->node) != 0) accel_pci_dev->node = 0; - /* Add accel device to accel table. - * This should be called before adf_cleanup_accel is called - */ - if (adf_devmgr_add_dev(accel_dev, NULL)) { - device_printf(dev, "Failed to add new accelerator device.\n"); - return ENXIO; + /* Add accel device to accel table */ + if (adf_devmgr_add_dev(accel_dev, pf)) { + device_printf(GET_DEV(accel_dev), + "Failed to add new accelerator device.\n"); + return -EFAULT; } - /* Allocate and configure device configuration structure */ - hw_data = malloc(sizeof(*hw_data), M_QAT_4XXX, M_WAITOK | M_ZERO); + hw_data = malloc(sizeof(*hw_data), M_QAT_4XXXVF, M_WAITOK | M_ZERO); + if (!hw_data) { + ret = -ENOMEM; + goto out_err; + } accel_dev->hw_device = hw_data; - adf_init_hw_data_4xxx(accel_dev->hw_device); + adf_init_hw_data_4xxxiov(accel_dev->hw_device); accel_pci_dev->revid = pci_get_revid(dev); - hw_data->fuses = pci_read_config(dev, ADF_4XXX_FUSECTL4_OFFSET, 4); - if (accel_pci_dev->revid == 0x00) { - device_printf(dev, "A0 stepping is not supported.\n"); - ret = ENODEV; - goto out_err; - } - /* Get PPAERUCM values and store */ - ret = adf_aer_store_ppaerucm_reg(dev, hw_data); - if (ret) - goto out_err; + hw_data->fuses = pci_read_config(dev, ADF_4XXXIOV_VFFUSECTL4_OFFSET, 4); /* Get Accelerators and Accelerators Engines masks */ hw_data->accel_mask = hw_data->get_accel_mask(accel_dev); hw_data->ae_mask = hw_data->get_ae_mask(accel_dev); - + hw_data->admin_ae_mask = hw_data->ae_mask; accel_pci_dev->sku = hw_data->get_sku(hw_data); - /* If the device has no acceleration engines then ignore it. */ - if (!hw_data->accel_mask || !hw_data->ae_mask || - (~hw_data->ae_mask & 0x01)) { - device_printf(dev, "No acceleration units found\n"); - ret = ENXIO; - goto out_err; - } /* Create device configuration table */ ret = adf_cfg_dev_add(accel_dev); - if (ret) - goto out_err; - ret = adf_clock_debugfs_add(accel_dev); if (ret) goto out_err; pci_set_max_read_req(dev, 1024); ret = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE, /* BUS_SPACE_UNRESTRICTED */ 1, BUS_SPACE_MAXSIZE, 0, NULL, NULL, &accel_dev->dma_tag); - if (ret) - goto out_err; - if (hw_data->get_accel_cap) { - hw_data->accel_capabilities_mask = - hw_data->get_accel_cap(accel_dev); - } + hw_data->accel_capabilities_mask = adf_4xxxvf_get_hw_cap(accel_dev); /* Find and map all the device's BARS */ i = 0; for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0; bar_nr++) { struct adf_bar *bar; rid = PCIR_BAR(bar_nr); - if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0) + if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != + 0) { continue; + } bar = &accel_pci_dev->pci_bars[i++]; bar->virt_addr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (!bar->virt_addr) { - device_printf(dev, "Failed to map BAR %d\n", bar_nr); + device_printf(GET_DEV(accel_dev), + "Failed to map BAR %d\n", + bar_nr); ret = ENXIO; goto out_err; } bar->base_addr = rman_get_start(bar->virt_addr); bar->size = rman_get_size(bar->virt_addr); } - pci_enable_busmaster(dev); - if (!accel_dev->hw_device->config_device) { - ret = EFAULT; + if (i == 0) { + device_printf( + GET_DEV(accel_dev), + "No BARs mapped. Please check if PCI BARs are mapped correctly for device\n"); + ret = ENXIO; goto out_err; } - ret = accel_dev->hw_device->config_device(accel_dev); + pci_enable_busmaster(dev); + + /* Completion for VF2PF request/response message exchange */ + init_completion(&accel_dev->u1.vf.msg_received); + mutex_init(&accel_dev->u1.vf.rpreset_lock); + + ret = hw_data->config_device(accel_dev); if (ret) goto out_err; ret = adf_dev_init(accel_dev); - if (ret) - goto out_dev_shutdown; - - ret = adf_dev_start(accel_dev); - if (ret) - goto out_dev_stop; + if (!ret) + ret = adf_dev_start(accel_dev); + + if (ret) { + device_printf( + GET_DEV(accel_dev), + "Failed to start - make sure PF enabled services match VF configuration.\n"); + adf_dev_stop(accel_dev); + adf_dev_shutdown(accel_dev); + return 0; + } cfg_dev = accel_dev->cfg->dev; adf_cfg_device_clear(cfg_dev, accel_dev); free(cfg_dev, M_QAT); accel_dev->cfg->dev = NULL; + return ret; -out_dev_stop: - adf_dev_stop(accel_dev); -out_dev_shutdown: - adf_dev_shutdown(accel_dev); + out_err: adf_cleanup_accel(accel_dev); return ret; } static int adf_detach(device_t dev) { struct adf_accel_dev *accel_dev = device_get_softc(dev); - if (adf_dev_stop(accel_dev)) { - device_printf(dev, "Failed to stop QAT accel dev\n"); - return EBUSY; + if (!accel_dev) { + printf("QAT: Driver removal failed\n"); + return EFAULT; } + adf_flush_vf_wq(accel_dev); + clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); + adf_dev_stop(accel_dev); adf_dev_shutdown(accel_dev); - adf_cleanup_accel(accel_dev); - return 0; } +static int +adf_modevent(module_t mod, int type, void *data) +{ + + switch (type) { + case MOD_UNLOAD: + adf_clean_vf_map(true); + return 0; + default: + return EOPNOTSUPP; + } +} + static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe), DEVMETHOD(device_attach, adf_attach), DEVMETHOD(device_detach, adf_detach), DEVMETHOD_END }; static driver_t adf_driver = { "qat", adf_methods, sizeof(struct adf_accel_dev) }; -DRIVER_MODULE_ORDERED(qat_4xxx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD); -MODULE_VERSION(qat_4xxx, 1); -MODULE_DEPEND(qat_4xxx, qat_common, 1, 1, 1); -MODULE_DEPEND(qat_4xxx, qat_api, 1, 1, 1); -MODULE_DEPEND(qat_4xxx, linuxkpi, 1, 1, 1); +DRIVER_MODULE_ORDERED(qat_4xxxvf, + pci, + adf_driver, + adf_modevent, + NULL, + SI_ORDER_THIRD); +MODULE_VERSION(qat_4xxxvf, 1); +MODULE_DEPEND(qat_4xxxvf, qat_common, 1, 1, 1); +MODULE_DEPEND(qat_4xxxvf, qat_api, 1, 1, 1); +MODULE_DEPEND(qat_4xxxvf, linuxkpi, 1, 1, 1); diff --git a/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c b/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c index a13683800c8e..5a2a8575ab3e 100644 --- a/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c +++ b/sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c @@ -1,419 +1,404 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include #include #include -#include +#include #include #include +#include #include "adf_c3xxx_hw_data.h" #include "icp_qat_hw.h" #include "adf_heartbeat.h" /* Worker thread to service arbiter mappings */ static const u32 thrd_to_arb_map[ADF_C3XXX_MAX_ACCELENGINES] = { 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA }; enum { DEV_C3XXX_SKU_1 = 0, DEV_C3XXX_SKU_2 = 1, DEV_C3XXX_SKU_3 = 2 }; static u32 thrd_to_arb_map_gen[ADF_C3XXX_MAX_ACCELENGINES] = { 0 }; static struct adf_hw_device_class c3xxx_class = {.name = ADF_C3XXX_DEVICE_NAME, .type = DEV_C3XXX, .instances = 0 }; static u32 get_accel_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; u32 straps; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); straps = pci_read_config(pdev, ADF_C3XXX_SOFTSTRAP_CSR_OFFSET, 4); return (~(fuse | straps)) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET & ADF_C3XXX_ACCELERATORS_MASK; } static u32 get_ae_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; u32 me_straps; u32 me_disable; u32 ssms_disabled; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); me_straps = pci_read_config(pdev, ADF_C3XXX_SOFTSTRAP_CSR_OFFSET, 4); /* If SSMs are disabled, then disable the corresponding MEs */ ssms_disabled = (~get_accel_mask(accel_dev)) & ADF_C3XXX_ACCELERATORS_MASK; me_disable = 0x3; while (ssms_disabled) { if (ssms_disabled & 1) me_straps |= me_disable; ssms_disabled >>= 1; me_disable <<= 2; } return (~(fuse | me_straps)) & ADF_C3XXX_ACCELENGINES_MASK; } static u32 get_num_accels(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->accel_mask) return 0; for (i = 0; i < ADF_C3XXX_MAX_ACCELERATORS; i++) { if (self->accel_mask & (1 << i)) ctr++; } return ctr; } static u32 get_num_aes(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->ae_mask) return 0; for (i = 0; i < ADF_C3XXX_MAX_ACCELENGINES; i++) { if (self->ae_mask & (1 << i)) ctr++; } return ctr; } static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_C3XXX_PMISC_BAR; } static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_C3XXX_ETR_BAR; } static u32 get_sram_bar_id(struct adf_hw_device_data *self) { return 0; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { int aes = get_num_aes(self); if (aes == 6) return DEV_SKU_4; return DEV_SKU_UNKNOWN; } static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, u32 const **arb_map_config) { int i; struct adf_hw_device_data *hw_device = accel_dev->hw_device; for (i = 0; i < ADF_C3XXX_MAX_ACCELENGINES; i++) { thrd_to_arb_map_gen[i] = 0; if (hw_device->ae_mask & (1 << i)) thrd_to_arb_map_gen[i] = thrd_to_arb_map[i]; } adf_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map, thrd_to_arb_map_gen, ADF_C3XXX_MAX_ACCELENGINES); *arb_map_config = thrd_to_arb_map_gen; } -static u32 -get_pf2vf_offset(u32 i) -{ - return ADF_C3XXX_PF2VF_OFFSET(i); -} - -static u32 -get_vintmsk_offset(u32 i) -{ - return ADF_C3XXX_VINTMSK_OFFSET(i); -} - static void get_arb_info(struct arb_info *arb_csrs_info) { arb_csrs_info->arbiter_offset = ADF_C3XXX_ARB_OFFSET; arb_csrs_info->wrk_thd_2_srv_arb_map = ADF_C3XXX_ARB_WRK_2_SER_MAP_OFFSET; arb_csrs_info->wrk_cfg_offset = ADF_C3XXX_ARB_WQCFG_OFFSET; } static void get_admin_info(struct admin_info *admin_csrs_info) { admin_csrs_info->mailbox_offset = ADF_C3XXX_MAILBOX_BASE_OFFSET; admin_csrs_info->admin_msg_ur = ADF_C3XXX_ADMINMSGUR_OFFSET; admin_csrs_info->admin_msg_lr = ADF_C3XXX_ADMINMSGLR_OFFSET; } static void get_errsou_offset(u32 *errsou3, u32 *errsou5) { *errsou3 = ADF_C3XXX_ERRSOU3; *errsou5 = ADF_C3XXX_ERRSOU5; } static u32 get_clock_speed(struct adf_hw_device_data *self) { /* CPP clock is half high-speed clock */ return self->clock_frequency / 2; } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C3XXX_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; unsigned int val, i; unsigned int mask; /* Enable Accel Engine error detection & correction */ mask = hw_device->ae_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_C3XXX_AE_CTX_ENABLES(i)); val |= ADF_C3XXX_ENABLE_AE_ECC_ERR; ADF_CSR_WR(csr, ADF_C3XXX_AE_CTX_ENABLES(i), val); val = ADF_CSR_RD(csr, ADF_C3XXX_AE_MISC_CONTROL(i)); val |= ADF_C3XXX_ENABLE_AE_ECC_PARITY_CORR; ADF_CSR_WR(csr, ADF_C3XXX_AE_MISC_CONTROL(i), val); } /* Enable shared memory error detection & correction */ mask = hw_device->accel_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_C3XXX_UERRSSMSH(i)); val |= ADF_C3XXX_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C3XXX_UERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_C3XXX_CERRSSMSH(i)); val |= ADF_C3XXX_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C3XXX_CERRSSMSH(i), val); } } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { struct resource *addr; addr = (&GET_BARS(accel_dev)[ADF_C3XXX_PMISC_BAR])->virt_addr; /* Enable bundle and misc interrupts */ ADF_CSR_WR(addr, ADF_C3XXX_SMIAPF0_MASK_OFFSET, ADF_C3XXX_SMIA0_MASK); ADF_CSR_WR(addr, ADF_C3XXX_SMIAPF1_MASK_OFFSET, ADF_C3XXX_SMIA1_MASK); } static u32 get_ae_clock(struct adf_hw_device_data *self) { /* * Clock update interval is <16> ticks for c3xxx. */ return self->clock_frequency / 16; } static int get_storage_enabled(struct adf_accel_dev *accel_dev, uint32_t *storage_enabled) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; strlcpy(key, ADF_STORAGE_FIRMWARE_ENABLED, sizeof(key)); if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) { if (kstrtouint(val, 0, storage_enabled)) return -EFAULT; } return 0; } static int measure_clock(struct adf_accel_dev *accel_dev) { u32 frequency; int ret = 0; ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_C3XXX_MIN_AE_FREQ, ADF_C3XXX_MAX_AE_FREQ); if (ret) return ret; accel_dev->hw_device->clock_frequency = frequency; return 0; } static u32 c3xxx_get_hw_cap(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 legfuses; u32 capabilities; u32 straps; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 fuses = hw_data->fuses; /* Read accelerator capabilities mask */ legfuses = pci_read_config(pdev, ADF_DEVICE_LEGFUSE_OFFSET, 4); capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC + ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC + ICP_ACCEL_CAPABILITIES_CIPHER + ICP_ACCEL_CAPABILITIES_AUTHENTICATION + ICP_ACCEL_CAPABILITIES_COMPRESSION + ICP_ACCEL_CAPABILITIES_ZUC + ICP_ACCEL_CAPABILITIES_SHA3 + ICP_ACCEL_CAPABILITIES_HKDF + ICP_ACCEL_CAPABILITIES_ECEDMONT + ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN; if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN); if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; if (legfuses & ICP_ACCEL_MASK_PKE_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_ECEDMONT); if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; if (legfuses & ICP_ACCEL_MASK_EIA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_ZUC; if (legfuses & ICP_ACCEL_MASK_SHA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_SHA3; straps = pci_read_config(pdev, ADF_C3XXX_SOFTSTRAP_CSR_OFFSET, 4); if ((straps | fuses) & ADF_C3XXX_POWERGATE_PKE) capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; if ((straps | fuses) & ADF_C3XXX_POWERGATE_CY) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; return capabilities; } static const char * get_obj_name(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { return ADF_CXXX_AE_FW_NAME_CUSTOM1; } static uint32_t get_objs_num(struct adf_accel_dev *accel_dev) { return 1; } static uint32_t get_obj_cfg_ae_mask(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services services) { return accel_dev->hw_device->ae_mask; } void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data) { hw_data->dev_class = &c3xxx_class; hw_data->instance_id = c3xxx_class.instances++; hw_data->num_banks = ADF_C3XXX_ETR_MAX_BANKS; hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK; hw_data->num_accel = ADF_C3XXX_MAX_ACCELERATORS; hw_data->num_logical_accel = 1; hw_data->num_engines = ADF_C3XXX_MAX_ACCELENGINES; hw_data->tx_rx_gap = ADF_C3XXX_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_C3XXX_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->print_err_registers = adf_print_err_registers; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; - hw_data->get_pf2vf_offset = get_pf2vf_offset; - hw_data->get_vintmsk_offset = get_vintmsk_offset; hw_data->get_arb_info = get_arb_info; hw_data->get_admin_info = get_admin_info; hw_data->get_errsou_offset = get_errsou_offset; hw_data->get_clock_speed = get_clock_speed; hw_data->get_sku = get_sku; hw_data->heartbeat_ctr_num = ADF_NUM_HB_CNT_PER_AE; hw_data->fw_name = ADF_C3XXX_FW; hw_data->fw_mmp_name = ADF_C3XXX_MMP; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->disable_iov = adf_disable_sriov; hw_data->send_admin_init = adf_send_admin_init; hw_data->init_arb = adf_init_gen2_arb; hw_data->exit_arb = adf_exit_arb; hw_data->get_arb_mapping = adf_get_arbiter_mapping; hw_data->enable_ints = adf_enable_ints; hw_data->set_ssm_wdtimer = adf_set_ssm_wdtimer; hw_data->check_slice_hang = adf_check_slice_hang; - hw_data->enable_vf2pf_comms = adf_pf_enable_vf2pf_comms; - hw_data->disable_vf2pf_comms = adf_pf_disable_vf2pf_comms; hw_data->restore_device = adf_dev_restore; hw_data->reset_device = adf_reset_flr; - hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; hw_data->measure_clock = measure_clock; hw_data->get_ae_clock = get_ae_clock; hw_data->reset_device = adf_reset_flr; hw_data->get_objs_num = get_objs_num; hw_data->get_obj_name = get_obj_name; hw_data->get_obj_cfg_ae_mask = get_obj_cfg_ae_mask; hw_data->get_accel_cap = c3xxx_get_hw_cap; hw_data->clock_frequency = ADF_C3XXX_AE_FREQ; hw_data->extended_dc_capabilities = 0; hw_data->get_storage_enabled = get_storage_enabled; hw_data->query_storage_cap = 1; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->storage_enable = 0; hw_data->get_fw_image_type = adf_cfg_get_fw_image_type; hw_data->get_ring_to_svc_map = adf_cfg_get_services_enabled; hw_data->config_device = adf_config_device; hw_data->set_asym_rings_mask = adf_cfg_set_asym_rings_mask; hw_data->ring_to_svc_map = ADF_DEFAULT_RING_TO_SRV_MAP; hw_data->pre_reset = adf_dev_pre_reset; hw_data->post_reset = adf_dev_post_reset; adf_gen2_init_hw_csr_info(&hw_data->csr_info); + adf_gen2_init_pf_pfvf_ops(&hw_data->csr_info.pfvf_ops); } void adf_clean_hw_data_c3xxx(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } diff --git a/sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c b/sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c index 28dafa68a357..13fc41cb3454 100644 --- a/sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c +++ b/sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c @@ -1,2238 +1,2223 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include #include #include #include -#include +#include #include #include #include #include +#include #include "adf_c4xxx_hw_data.h" #include "adf_c4xxx_reset.h" #include "adf_c4xxx_inline.h" #include "adf_c4xxx_ras.h" #include "adf_c4xxx_misc_error_stats.h" #include "adf_c4xxx_pke_replay_stats.h" #include "adf_heartbeat.h" #include "icp_qat_fw_init_admin.h" #include "icp_qat_hw.h" /* accel unit information */ static struct adf_accel_unit adf_c4xxx_au_32_ae[] = { { 0x1, 0x3, 0x3F, 0x1B, 6, ADF_ACCEL_SERVICE_NULL }, { 0x2, 0xC, 0xFC0, 0x6C0, 6, ADF_ACCEL_SERVICE_NULL }, { 0x4, 0x30, 0xF000, 0xF000, 4, ADF_ACCEL_SERVICE_NULL }, { 0x8, 0xC0, 0x3F0000, 0x1B0000, 6, ADF_ACCEL_SERVICE_NULL }, { 0x10, 0x300, 0xFC00000, 0x6C00000, 6, ADF_ACCEL_SERVICE_NULL }, { 0x20, 0xC00, 0xF0000000, 0xF0000000, 4, ADF_ACCEL_SERVICE_NULL } }; static struct adf_accel_unit adf_c4xxx_au_24_ae[] = { { 0x1, 0x3, 0x3F, 0x1B, 6, ADF_ACCEL_SERVICE_NULL }, { 0x2, 0xC, 0xFC0, 0x6C0, 6, ADF_ACCEL_SERVICE_NULL }, { 0x8, 0xC0, 0x3F0000, 0x1B0000, 6, ADF_ACCEL_SERVICE_NULL }, { 0x10, 0x300, 0xFC00000, 0x6C00000, 6, ADF_ACCEL_SERVICE_NULL }, }; static struct adf_accel_unit adf_c4xxx_au_12_ae[] = { { 0x1, 0x3, 0x3F, 0x1B, 6, ADF_ACCEL_SERVICE_NULL }, { 0x8, 0xC0, 0x3F0000, 0x1B0000, 6, ADF_ACCEL_SERVICE_NULL }, }; static struct adf_accel_unit adf_c4xxx_au_emulation[] = { { 0x1, 0x3, 0x3F, 0x1B, 6, ADF_ACCEL_SERVICE_NULL }, { 0x2, 0xC, 0xC0, 0xC0, 2, ADF_ACCEL_SERVICE_NULL } }; /* Accel engine threads for each of the following services * , , , */ /* Thread mapping for SKU capable of symmetric cryptography */ static const struct adf_ae_info adf_c4xxx_32_ae_sym[] = { { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 2, 6, 3 }, { 2, 6, 3 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 2, 6, 3 }, { 2, 6, 3 } }; static const struct adf_ae_info adf_c4xxx_24_ae_sym[] = { { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 } }; static const struct adf_ae_info adf_c4xxx_12_ae_sym[] = { { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 2, 6, 3 }, { 2, 6, 3 }, { 1, 7, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 } }; /* Thread mapping for SKU capable of asymmetric and symmetric cryptography */ static const struct adf_ae_info adf_c4xxx_32_ae[] = { { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 2, 5, 3 }, { 2, 5, 3 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 2, 5, 3 }, { 2, 5, 3 } }; static const struct adf_ae_info adf_c4xxx_24_ae[] = { { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 } }; static const struct adf_ae_info adf_c4xxx_12_ae[] = { { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 2, 5, 3 }, { 2, 5, 3 }, { 1, 6, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 }, { 0, 0, 0 } }; static struct adf_hw_device_class c4xxx_class = {.name = ADF_C4XXX_DEVICE_NAME, .type = DEV_C4XXX, .instances = 0 }; struct icp_qat_fw_init_c4xxx_admin_hb_stats { struct icp_qat_fw_init_admin_hb_cnt stats[ADF_NUM_THREADS_PER_AE]; }; struct adf_hb_count { u16 ae_thread[ADF_NUM_THREADS_PER_AE]; }; static const int sku_cy_au[] = ADF_C4XXX_NUM_CY_AU; static const int sku_dc_au[] = ADF_C4XXX_NUM_DC_AU; static const int sku_inline_au[] = ADF_C4XXX_NUM_INLINE_AU; /* * C4xxx devices introduce new fuses and soft straps and * are different from previous gen device implementations. */ static u32 get_accel_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fusectl0; u32 softstrappull0; fusectl0 = pci_read_config(pdev, ADF_C4XXX_FUSECTL0_OFFSET, 4); softstrappull0 = pci_read_config(pdev, ADF_C4XXX_SOFTSTRAPPULL0_OFFSET, 4); return (~(fusectl0 | softstrappull0)) & ADF_C4XXX_ACCELERATORS_MASK; } static u32 get_ae_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fusectl1; u32 softstrappull1; fusectl1 = pci_read_config(pdev, ADF_C4XXX_FUSECTL1_OFFSET, 4); softstrappull1 = pci_read_config(pdev, ADF_C4XXX_SOFTSTRAPPULL1_OFFSET, 4); /* Assume that AE and AU disable masks are consistent, so no * checks against the AU mask are performed */ return (~(fusectl1 | softstrappull1)) & ADF_C4XXX_ACCELENGINES_MASK; } static u32 get_num_accels(struct adf_hw_device_data *self) { return self ? hweight32(self->accel_mask) : 0; } static u32 get_num_aes(struct adf_hw_device_data *self) { return self ? hweight32(self->ae_mask) : 0; } static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_C4XXX_PMISC_BAR; } static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_C4XXX_ETR_BAR; } static u32 get_sram_bar_id(struct adf_hw_device_data *self) { return ADF_C4XXX_SRAM_BAR; } static inline void c4xxx_unpack_ssm_wdtimer(u64 value, u32 *upper, u32 *lower) { *lower = lower_32_bits(value); *upper = upper_32_bits(value); } /** * c4xxx_set_ssm_wdtimer() - Initialize the slice hang watchdog timer. * * @param accel_dev Structure holding accelerator data. * @return 0 on success, error code otherwise. */ static int c4xxx_set_ssm_wdtimer(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[hw_device->get_misc_bar_id(hw_device)]; struct resource *csr = misc_bar->virt_addr; unsigned long accel_mask = hw_device->accel_mask; u32 accel = 0; u64 timer_val = ADF_C4XXX_SSM_WDT_64BIT_DEFAULT_VALUE; u64 timer_val_pke = ADF_C4XXX_SSM_WDT_PKE_64BIT_DEFAULT_VALUE; u32 ssm_wdt_low = 0, ssm_wdt_high = 0; u32 ssm_wdt_pke_low = 0, ssm_wdt_pke_high = 0; /* Convert 64bit Slice Hang watchdog value into 32bit values for * mmio write to 32bit CSRs. */ c4xxx_unpack_ssm_wdtimer(timer_val, &ssm_wdt_high, &ssm_wdt_low); c4xxx_unpack_ssm_wdtimer(timer_val_pke, &ssm_wdt_pke_high, &ssm_wdt_pke_low); /* Configures Slice Hang watchdogs */ for_each_set_bit(accel, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { ADF_CSR_WR(csr, ADF_C4XXX_SSMWDTL_OFFSET(accel), ssm_wdt_low); ADF_CSR_WR(csr, ADF_C4XXX_SSMWDTH_OFFSET(accel), ssm_wdt_high); ADF_CSR_WR(csr, ADF_C4XXX_SSMWDTPKEL_OFFSET(accel), ssm_wdt_pke_low); ADF_CSR_WR(csr, ADF_C4XXX_SSMWDTPKEH_OFFSET(accel), ssm_wdt_pke_high); } return 0; } /** * c4xxx_check_slice_hang() - Check slice hang status * * Return: true if a slice hange interrupt is serviced.. */ static bool c4xxx_check_slice_hang(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[hw_device->get_misc_bar_id(hw_device)]; struct resource *csr = misc_bar->virt_addr; u32 slice_hang_offset; u32 ia_slice_hang_offset; u32 fw_irq_source; u32 ia_irq_source; u32 accel_num = 0; bool handled = false; u32 errsou10 = ADF_CSR_RD(csr, ADF_C4XXX_ERRSOU10); unsigned long accel_mask; accel_mask = hw_device->accel_mask; for_each_set_bit(accel_num, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { if (!(errsou10 & ADF_C4XXX_IRQ_SRC_MASK(accel_num))) continue; fw_irq_source = ADF_CSR_RD(csr, ADF_INTSTATSSM(accel_num)); ia_irq_source = ADF_CSR_RD(csr, ADF_C4XXX_IAINTSTATSSM(accel_num)); ia_slice_hang_offset = ADF_C4XXX_IASLICEHANGSTATUS_OFFSET(accel_num); /* FW did not clear SliceHang error, IA logs and clears * the error */ if ((fw_irq_source & ADF_INTSTATSSM_SHANGERR) && (ia_irq_source & ADF_INTSTATSSM_SHANGERR)) { slice_hang_offset = ADF_C4XXX_SLICEHANGSTATUS_OFFSET(accel_num); /* Bring hung slice out of reset */ adf_csr_fetch_and_and(csr, slice_hang_offset, ~0); /* Log SliceHang error and clear an interrupt */ handled = adf_handle_slice_hang(accel_dev, accel_num, csr, ia_slice_hang_offset); atomic_inc(&accel_dev->ras_counters[ADF_RAS_UNCORR]); } /* FW cleared SliceHang, IA only logs an error */ else if (!(fw_irq_source & ADF_INTSTATSSM_SHANGERR) && (ia_irq_source & ADF_INTSTATSSM_SHANGERR)) { /* Log SliceHang error and clear an interrupt */ handled = adf_handle_slice_hang(accel_dev, accel_num, csr, ia_slice_hang_offset); atomic_inc(&accel_dev->ras_counters[ADF_RAS_UNCORR]); } /* Clear the associated IA interrupt */ adf_csr_fetch_and_and(csr, ADF_C4XXX_IAINTSTATSSM(accel_num), ~BIT(13)); } return handled; } static bool get_eth_doorbell_msg(struct adf_accel_dev *accel_dev) { struct resource *csr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; struct adf_hw_device_data *hw_device = accel_dev->hw_device; u32 errsou11 = ADF_CSR_RD(csr, ADF_C4XXX_ERRSOU11); u32 doorbell_int = ADF_CSR_RD(csr, ADF_C4XXX_ETH_DOORBELL_INT); u32 eth_doorbell_reg[ADF_C4XXX_NUM_ETH_DOORBELL_REGS]; bool handled = false; u32 data_reg; u8 i; /* Reset cannot be acknowledged until the reset */ hw_device->reset_ack = false; /* Check if doorbell interrupt occurred. */ if (errsou11 & ADF_C4XXX_DOORBELL_INT_SRC) { /* Decode doorbell messages from ethernet device */ for (i = 0; i < ADF_C4XXX_NUM_ETH_DOORBELL_REGS; i++) { eth_doorbell_reg[i] = 0; if (doorbell_int & BIT(i)) { data_reg = ADF_C4XXX_ETH_DOORBELL(i); eth_doorbell_reg[i] = ADF_CSR_RD(csr, data_reg); device_printf( GET_DEV(accel_dev), "Receives Doorbell message(0x%08x)\n", eth_doorbell_reg[i]); } } /* Only need to check PF0 */ if (eth_doorbell_reg[0] == ADF_C4XXX_IOSFSB_RESET_ACK) { device_printf(GET_DEV(accel_dev), "Receives pending reset ACK\n"); hw_device->reset_ack = true; } /* Clear the interrupt source */ ADF_CSR_WR(csr, ADF_C4XXX_ETH_DOORBELL_INT, ADF_C4XXX_ETH_DOORBELL_MASK); handled = true; } return handled; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { int aes = get_num_aes(self); u32 capabilities = self->accel_capabilities_mask; bool sym_only_sku = false; /* Check if SKU is capable only of symmetric cryptography * via device capabilities. */ if ((capabilities & ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC) && !(capabilities & ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC) && !(capabilities & ADF_ACCEL_CAPABILITIES_COMPRESSION)) sym_only_sku = true; switch (aes) { case ADF_C4XXX_HIGH_SKU_AES: if (sym_only_sku) return DEV_SKU_1_CY; return DEV_SKU_1; case ADF_C4XXX_MED_SKU_AES: if (sym_only_sku) return DEV_SKU_2_CY; return DEV_SKU_2; case ADF_C4XXX_LOW_SKU_AES: if (sym_only_sku) return DEV_SKU_3_CY; return DEV_SKU_3; }; return DEV_SKU_UNKNOWN; } static bool c4xxx_check_prod_sku(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fusectl0 = 0; fusectl0 = pci_read_config(pdev, ADF_C4XXX_FUSECTL0_OFFSET, 4); if (fusectl0 & ADF_C4XXX_FUSE_PROD_SKU_MASK) return true; else return false; } static bool adf_check_sym_only_sku_c4xxx(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 legfuse = 0; legfuse = pci_read_config(pdev, ADF_DEVICE_LEGFUSE_OFFSET, 4); if (legfuse & ADF_C4XXX_LEGFUSE_BASE_SKU_MASK) return true; else return false; } static void adf_enable_slice_hang_detection(struct adf_accel_dev *accel_dev) { struct resource *csr; struct adf_hw_device_data *hw_device = accel_dev->hw_device; u32 accel = 0; unsigned long accel_mask; csr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; accel_mask = hw_device->accel_mask; for_each_set_bit(accel, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { /* Unmasks Slice Hang interrupts so they can be seen by IA. */ ADF_CSR_WR(csr, ADF_C4XXX_SHINTMASKSSM_OFFSET(accel), ADF_C4XXX_SHINTMASKSSM_VAL); } } static void adf_enable_ras(struct adf_accel_dev *accel_dev) { struct resource *csr; struct adf_hw_device_data *hw_device = accel_dev->hw_device; u32 accel = 0; unsigned long accel_mask; csr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; accel_mask = hw_device->accel_mask; for_each_set_bit(accel, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { ADF_CSR_WR(csr, ADF_C4XXX_GET_SSMFEATREN_OFFSET(accel), ADF_C4XXX_SSMFEATREN_VAL); } } static u32 get_clock_speed(struct adf_hw_device_data *self) { /* c4xxx CPP clock is equal to high-speed clock */ return self->clock_frequency; } static void adf_enable_error_interrupts(struct adf_accel_dev *accel_dev) { struct resource *csr, *aram_csr; struct adf_hw_device_data *hw_device = accel_dev->hw_device; u32 accel = 0; unsigned long accel_mask; csr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; aram_csr = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; accel_mask = hw_device->accel_mask; for_each_set_bit(accel, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { /* Enable shared memory, MMP, CPP, PPERR interrupts * for a given accel */ ADF_CSR_WR(csr, ADF_C4XXX_GET_INTMASKSSM_OFFSET(accel), 0); /* Enable SPP parity error interrupts for a given accel */ ADF_CSR_WR(csr, ADF_C4XXX_GET_SPPPARERRMSK_OFFSET(accel), 0); /* Enable ssm soft parity errors on given accel */ ADF_CSR_WR(csr, ADF_C4XXX_GET_SSMSOFTERRORPARITY_MASK_OFFSET(accel), ADF_C4XXX_SSMSOFTERRORPARITY_MASK_VAL); } /* Enable interrupts for VFtoPF0_127. */ ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK4, ADF_C4XXX_VF2PF0_31); ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK5, ADF_C4XXX_VF2PF32_63); ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK6, ADF_C4XXX_VF2PF64_95); ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK7, ADF_C4XXX_VF2PF96_127); /* Enable interrupts signaling ECC correctable errors for all AEs */ ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK8, ADF_C4XXX_ERRMSK8_COERR); ADF_CSR_WR(csr, ADF_C4XXX_HI_ME_COR_ERRLOG_ENABLE, ADF_C4XXX_HI_ME_COR_ERRLOG_ENABLE_MASK); /* Enable error interrupts reported by ERRSOU9 */ ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK9, ADF_C4XXX_ERRMSK9_IRQ_MASK); /* Enable uncorrectable errors on all the AE */ ADF_CSR_WR(csr, ADF_C4XXX_HI_ME_UNCERR_LOG_ENABLE, ADF_C4XXX_HI_ME_UNCERR_LOG_ENABLE_MASK); /* Enable CPP Agent to report command parity errors */ ADF_CSR_WR(csr, ADF_C4XXX_HI_CPP_AGENT_CMD_PAR_ERR_LOG_ENABLE, ADF_C4XXX_HI_CPP_AGENT_CMD_PAR_ERR_LOG_ENABLE_MASK); /* Enable reporting of RI memory parity errors */ ADF_CSR_WR(csr, ADF_C4XXX_RI_MEM_PAR_ERR_EN0, ADF_C4XXX_RI_MEM_PAR_ERR_EN0_MASK); /* Enable reporting of TI memory parity errors */ ADF_CSR_WR(csr, ADF_C4XXX_TI_MEM_PAR_ERR_EN0, ADF_C4XXX_TI_MEM_PAR_ERR_EN0_MASK); ADF_CSR_WR(csr, ADF_C4XXX_TI_MEM_PAR_ERR_EN1, ADF_C4XXX_TI_MEM_PAR_ERR_EN1_MASK); /* Enable SSM errors */ ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK10, ADF_C4XXX_ERRMSK10_SSM_ERR); /* Enable miscellaneous errors (ethernet doorbell aram, ici, ice) */ ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK11, ADF_C4XXX_ERRMSK11_ERR); /* RI CPP bus interface error detection and reporting. */ ADF_CSR_WR(csr, ADF_C4XXX_RICPPINTCTL, ADF_C4XXX_RICPP_EN); /* TI CPP bus interface error detection and reporting. */ ADF_CSR_WR(csr, ADF_C4XXX_TICPPINTCTL, ADF_C4XXX_TICPP_EN); /* Enable CFC Error interrupts and logging. */ ADF_CSR_WR(csr, ADF_C4XXX_CPP_CFC_ERR_CTRL, ADF_C4XXX_CPP_CFC_UE); /* Enable ARAM correctable error detection. */ ADF_CSR_WR(aram_csr, ADF_C4XXX_ARAMCERR, ADF_C4XXX_ARAM_CERR); /* Enable ARAM uncorrectable error detection. */ ADF_CSR_WR(aram_csr, ADF_C4XXX_ARAMUERR, ADF_C4XXX_ARAM_UERR); /* Enable Push/Pull Misc Uncorrectable error interrupts and logging */ ADF_CSR_WR(aram_csr, ADF_C4XXX_CPPMEMTGTERR, ADF_C4XXX_TGT_UERR); } static void adf_enable_mmp_error_correction(struct resource *csr, struct adf_hw_device_data *hw_data) { unsigned int accel = 0, mmp; unsigned long uerrssmmmp_mask, cerrssmmmp_mask; enum operation op; unsigned long accel_mask; /* Prepare values and operation that will be performed on * UERRSSMMMP and CERRSSMMMP registers on each MMP */ if (hw_data->accel_capabilities_mask & ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC) { uerrssmmmp_mask = ADF_C4XXX_UERRSSMMMP_EN; cerrssmmmp_mask = ADF_C4XXX_CERRSSMMMP_EN; op = OR; } else { uerrssmmmp_mask = ~ADF_C4XXX_UERRSSMMMP_EN; cerrssmmmp_mask = ~ADF_C4XXX_CERRSSMMMP_EN; op = AND; } accel_mask = hw_data->accel_mask; /* Enable MMP Logging */ for_each_set_bit(accel, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { /* Set power-up */ adf_csr_fetch_and_and(csr, ADF_C4XXX_SLICEPWRDOWN(accel), ~ADF_C4XXX_MMP_PWR_UP_MSK); for (mmp = 0; mmp < ADF_C4XXX_MAX_MMP; ++mmp) { adf_csr_fetch_and_update(op, csr, ADF_C4XXX_UERRSSMMMP(accel, mmp), uerrssmmmp_mask); adf_csr_fetch_and_update(op, csr, ADF_C4XXX_CERRSSMMMP(accel, mmp), cerrssmmmp_mask); } /* Restore power-down value */ adf_csr_fetch_and_or(csr, ADF_C4XXX_SLICEPWRDOWN(accel), ADF_C4XXX_MMP_PWR_UP_MSK); } } -static u32 -get_pf2vf_offset(u32 i) -{ - return ADF_C4XXX_PF2VF_OFFSET(i); -} - -static u32 -get_vintmsk_offset(u32 i) -{ - return ADF_C4XXX_VINTMSK_OFFSET(i); -} - static void get_arb_info(struct arb_info *arb_csrs_info) { arb_csrs_info->arbiter_offset = ADF_C4XXX_ARB_OFFSET; arb_csrs_info->wrk_cfg_offset = ADF_C4XXX_ARB_WQCFG_OFFSET; } static void get_admin_info(struct admin_info *admin_csrs_info) { admin_csrs_info->mailbox_offset = ADF_C4XXX_MAILBOX_BASE_OFFSET; admin_csrs_info->admin_msg_ur = ADF_C4XXX_ADMINMSGUR_OFFSET; admin_csrs_info->admin_msg_lr = ADF_C4XXX_ADMINMSGLR_OFFSET; } static void get_errsou_offset(u32 *errsou3, u32 *errsou5) { *errsou3 = ADF_C4XXX_ERRSOU3; *errsou5 = ADF_C4XXX_ERRSOU5; } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; unsigned int val, i = 0; unsigned long ae_mask; unsigned long accel_mask; ae_mask = hw_device->ae_mask; /* Enable Accel Engine error detection & correction */ for_each_set_bit(i, &ae_mask, ADF_C4XXX_MAX_ACCELENGINES) { val = ADF_CSR_RD(csr, ADF_C4XXX_AE_CTX_ENABLES(i)); val |= ADF_C4XXX_ENABLE_AE_ECC_ERR; ADF_CSR_WR(csr, ADF_C4XXX_AE_CTX_ENABLES(i), val); val = ADF_CSR_RD(csr, ADF_C4XXX_AE_MISC_CONTROL(i)); val |= ADF_C4XXX_ENABLE_AE_ECC_PARITY_CORR; ADF_CSR_WR(csr, ADF_C4XXX_AE_MISC_CONTROL(i), val); } accel_mask = hw_device->accel_mask; /* Enable shared memory error detection & correction */ for_each_set_bit(i, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { val = ADF_CSR_RD(csr, ADF_C4XXX_UERRSSMSH(i)); val |= ADF_C4XXX_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C4XXX_UERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_C4XXX_CERRSSMSH(i)); val |= ADF_C4XXX_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C4XXX_CERRSSMSH(i), val); } adf_enable_ras(accel_dev); adf_enable_mmp_error_correction(csr, hw_device); adf_enable_slice_hang_detection(accel_dev); adf_enable_error_interrupts(accel_dev); } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { struct resource *addr; addr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; /* Enable bundle interrupts */ ADF_CSR_WR(addr, ADF_C4XXX_SMIAPF0_MASK_OFFSET, ADF_C4XXX_SMIA0_MASK); ADF_CSR_WR(addr, ADF_C4XXX_SMIAPF1_MASK_OFFSET, ADF_C4XXX_SMIA1_MASK); ADF_CSR_WR(addr, ADF_C4XXX_SMIAPF2_MASK_OFFSET, ADF_C4XXX_SMIA2_MASK); ADF_CSR_WR(addr, ADF_C4XXX_SMIAPF3_MASK_OFFSET, ADF_C4XXX_SMIA3_MASK); /*Enable misc interrupts*/ ADF_CSR_WR(addr, ADF_C4XXX_SMIAPF4_MASK_OFFSET, ADF_C4XXX_SMIA4_MASK); } static u32 get_ae_clock(struct adf_hw_device_data *self) { /* Clock update interval is <16> ticks for c4xxx. */ return self->clock_frequency / 16; } static int measure_clock(struct adf_accel_dev *accel_dev) { u32 frequency; int ret = 0; ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_C4XXX_MIN_AE_FREQ, ADF_C4XXX_MAX_AE_FREQ); if (ret) return ret; accel_dev->hw_device->clock_frequency = frequency; return 0; } static int get_storage_enabled(struct adf_accel_dev *accel_dev, uint32_t *storage_enabled) { if (accel_dev->au_info->num_dc_au > 0) { *storage_enabled = 1; GET_HW_DATA(accel_dev)->extended_dc_capabilities = ICP_ACCEL_CAPABILITIES_ADVANCED_COMPRESSION; } return 0; } static u32 c4xxx_get_hw_cap(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 legfuses; u32 softstrappull0, softstrappull2; u32 fusectl0, fusectl2; u32 capabilities; /* Read accelerator capabilities mask */ legfuses = pci_read_config(pdev, ADF_DEVICE_LEGFUSE_OFFSET, 4); capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_AUTHENTICATION | ICP_ACCEL_CAPABILITIES_COMPRESSION | ICP_ACCEL_CAPABILITIES_ZUC | ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_SHA3_EXT | ICP_ACCEL_CAPABILITIES_SM3 | ICP_ACCEL_CAPABILITIES_SM4 | ICP_ACCEL_CAPABILITIES_CHACHA_POLY | ICP_ACCEL_CAPABILITIES_AESGCM_SPC | ICP_ACCEL_CAPABILITIES_ECEDMONT; if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC; capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER; } if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; if (legfuses & ICP_ACCEL_MASK_PKE_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_ECEDMONT); if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE) { capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; capabilities &= ~ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY; } if (legfuses & ICP_ACCEL_MASK_EIA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_ZUC; if (legfuses & ICP_ACCEL_MASK_SM3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_SM3; if (legfuses & ICP_ACCEL_MASK_SM4_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_SM4; /* Read fusectl0 & softstrappull0 registers to ensure inline * acceleration is not disabled */ softstrappull0 = pci_read_config(pdev, ADF_C4XXX_SOFTSTRAPPULL0_OFFSET, 4); fusectl0 = pci_read_config(pdev, ADF_C4XXX_FUSECTL0_OFFSET, 4); if ((fusectl0 | softstrappull0) & ADF_C4XXX_FUSE_DISABLE_INLINE_MASK) capabilities &= ~ICP_ACCEL_CAPABILITIES_INLINE; /* Read fusectl2 & softstrappull2 registers to check out if * PKE/DC are enabled/disabled */ softstrappull2 = pci_read_config(pdev, ADF_C4XXX_SOFTSTRAPPULL2_OFFSET, 4); fusectl2 = pci_read_config(pdev, ADF_C4XXX_FUSECTL2_OFFSET, 4); /* Disable PKE/DC cap if there are no PKE/DC-enabled AUs. */ if (!(~fusectl2 & ~softstrappull2 & ADF_C4XXX_FUSE_PKE_MASK)) capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; if (!(~fusectl2 & ~softstrappull2 & ADF_C4XXX_FUSE_COMP_MASK)) capabilities &= ~(ICP_ACCEL_CAPABILITIES_COMPRESSION | ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY); return capabilities; } static int c4xxx_configure_accel_units(struct adf_accel_dev *accel_dev) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES] = { 0 }; unsigned long val; char val_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 }; int sku; struct adf_hw_device_data *hw_data = accel_dev->hw_device; sku = get_sku(hw_data); if (adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC)) goto err; snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); /* Base station SKU supports symmetric cryptography only. */ if (adf_check_sym_only_sku_c4xxx(accel_dev)) snprintf(val_str, sizeof(val_str), ADF_SERVICE_SYM); else snprintf(val_str, sizeof(val_str), ADF_SERVICE_CY); val = sku_dc_au[sku]; if (val) { strncat(val_str, ADF_SERVICES_SEPARATOR ADF_SERVICE_DC, ADF_CFG_MAX_VAL_LEN_IN_BYTES - strnlen(val_str, sizeof(val_str)) - ADF_CFG_NULL_TERM_SIZE); } if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)val_str, ADF_STR)) goto err; snprintf(key, sizeof(key), ADF_NUM_CY_ACCEL_UNITS); val = sku_cy_au[sku]; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; snprintf(key, sizeof(key), ADF_NUM_DC_ACCEL_UNITS); val = sku_dc_au[sku]; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; snprintf(key, sizeof(key), ADF_NUM_INLINE_ACCEL_UNITS); val = sku_inline_au[sku]; if (adf_cfg_add_key_value_param( accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC)) goto err; return 0; err: device_printf(GET_DEV(accel_dev), "Failed to configure accel units\n"); return EINVAL; } static void update_hw_capability(struct adf_accel_dev *accel_dev) { struct adf_accel_unit_info *au_info = accel_dev->au_info; struct adf_hw_device_data *hw_device = accel_dev->hw_device; u32 disabled_caps = 0; if (!au_info->asym_ae_msk) disabled_caps = ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_AUTHENTICATION; if (!au_info->sym_ae_msk) disabled_caps |= ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_ZUC | ICP_ACCEL_CAPABILITIES_SHA3_EXT | ICP_ACCEL_CAPABILITIES_SM3 | ICP_ACCEL_CAPABILITIES_SM4 | ICP_ACCEL_CAPABILITIES_CHACHA_POLY | ICP_ACCEL_CAPABILITIES_AESGCM_SPC; if (!au_info->dc_ae_msk) { disabled_caps |= ICP_ACCEL_CAPABILITIES_COMPRESSION | ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY; hw_device->extended_dc_capabilities = 0; } if (!au_info->inline_ingress_msk && !au_info->inline_egress_msk) disabled_caps |= ICP_ACCEL_CAPABILITIES_INLINE; hw_device->accel_capabilities_mask = c4xxx_get_hw_cap(accel_dev) & ~disabled_caps; } static void c4xxx_set_sadb_size(struct adf_accel_dev *accel_dev) { u32 sadb_reg_value = 0; struct resource *aram_csr_base; aram_csr_base = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; if (accel_dev->au_info->num_inline_au) { /* REG_SA_DB_CTRL register initialisation */ sadb_reg_value = ADF_C4XXX_SADB_REG_VALUE(accel_dev); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_DB_CTRL, sadb_reg_value); } else { /* Zero the SADB size when inline is disabled. */ adf_csr_fetch_and_and(aram_csr_base, ADF_C4XXX_REG_SA_DB_CTRL, ADF_C4XXX_SADB_SIZE_BIT); } /* REG_SA_CTRL_LOCK register initialisation. We set the lock * bit in order to prevent the REG_SA_DB_CTRL to be * overwritten */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_CTRL_LOCK, ADF_C4XXX_DEFAULT_SA_CTRL_LOCKOUT); } static void c4xxx_init_error_notification_configuration(struct adf_accel_dev *accel_dev, u32 offset) { struct resource *aram_csr_base; aram_csr_base = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; /* configure error notification configuration registers */ /* Set CD Parity error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CD_RF_PARITY_ERR_0 + offset, ADF_C4XXX_CD_RF_PARITY_ERR_0_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CD_RF_PARITY_ERR_1 + offset, ADF_C4XXX_CD_RF_PARITY_ERR_1_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CD_RF_PARITY_ERR_2 + offset, ADF_C4XXX_CD_RF_PARITY_ERR_2_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CD_RF_PARITY_ERR_3 + offset, ADF_C4XXX_CD_RF_PARITY_ERR_3_VAL); /* Set CD RAM ECC Correctable Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CD_CERR + offset, ADF_C4XXX_CD_CERR_VAL); /* Set CD RAM ECC UnCorrectable Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CD_UERR + offset, ADF_C4XXX_CD_UERR_VAL); /* Set Inline (excl cmd_dis) Parity Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_INLN_RF_PARITY_ERR_0 + offset, ADF_C4XXX_INLN_RF_PARITY_ERR_0_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_INLN_RF_PARITY_ERR_1 + offset, ADF_C4XXX_INLN_RF_PARITY_ERR_1_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_INLN_RF_PARITY_ERR_2 + offset, ADF_C4XXX_INLN_RF_PARITY_ERR_2_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_INLN_RF_PARITY_ERR_3 + offset, ADF_C4XXX_INLN_RF_PARITY_ERR_3_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_INLN_RF_PARITY_ERR_4 + offset, ADF_C4XXX_INLN_RF_PARITY_ERR_4_VAL); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_INLN_RF_PARITY_ERR_5 + offset, ADF_C4XXX_INLN_RF_PARITY_ERR_5_VAL); /* Set Parser RAM ECC Correctable Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSER_CERR + offset, ADF_C4XXX_PARSER_CERR_VAL); /* Set Parser RAM ECC UnCorrectable Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSER_UERR + offset, ADF_C4XXX_PARSER_UERR_VAL); /* Set CTPB RAM ECC Correctable Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CTPB_CERR + offset, ADF_C4XXX_CTPB_CERR_VAL); /* Set CTPB RAM ECC UnCorrectable Error */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CTPB_UERR + offset, ADF_C4XXX_CTPB_UERR_VAL); /* Set CPP Interface Status */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CPPM_ERR_STAT + offset, ADF_C4XXX_CPPM_ERR_STAT_VAL); /* Set CGST_MGMT_INT */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CONGESTION_MGMT_INT + offset, ADF_C4XXX_CONGESTION_MGMT_INI_VAL); /* CPP Interface Status */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_CPPT_ERR_STAT + offset, ADF_C4XXX_CPPT_ERR_STAT_VAL); /* MAC Interrupt Mask */ ADF_CSR_WR64(aram_csr_base, ADF_C4XXX_IC_MAC_IM + offset, ADF_C4XXX_MAC_IM_VAL); } static void c4xxx_enable_parse_extraction(struct adf_accel_dev *accel_dev) { struct resource *aram_csr_base; aram_csr_base = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; /* Enable Inline Parse Extraction CRSs */ /* Set IC_PARSE_CTRL register */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_CTRL_OFFSET, ADF_C4XXX_IC_PARSE_CTRL_OFFSET_DEFAULT_VALUE); /* Set IC_PARSE_FIXED_DATA(0) */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_FIXED_DATA(0), ADF_C4XXX_DEFAULT_IC_PARSE_FIXED_DATA_0); /* Set IC_PARSE_FIXED_LENGTH */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_FIXED_LENGTH, ADF_C4XXX_DEFAULT_IC_PARSE_FIXED_LEN); /* Configure ESP protocol from an IPv4 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_OFFSET_0, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_OFFS_0_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_LENGTH_0, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_LEN_0_VALUE); /* Configure protocol extraction field from an IPv4 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_OFFSET_1, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_OFFS_1_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_LENGTH_1, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_LEN_1_VALUE); /* Configure SPI extraction field from an IPv4 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_OFFSET_2, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_OFFS_2_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_LENGTH_2, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_LEN_2_VALUE); /* Configure destination field IP address from an IPv4 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_OFFSET_3, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_OFFS_3_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV4_LENGTH_3, ADF_C4XXX_DEFAULT_IC_PARSE_IPV4_LEN_3_VALUE); /* Configure function number extraction field from an IPv6 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_OFFSET_0, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_OFFS_0_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_LENGTH_0, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_LEN_0_VALUE); /* Configure protocol extraction field from an IPv6 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_OFFSET_1, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_OFFS_1_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_LENGTH_1, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_LEN_1_VALUE); /* Configure SPI extraction field from an IPv6 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_OFFSET_2, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_OFFS_2_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_LENGTH_2, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_LEN_2_VALUE); /* Configure destination field IP address from an IPv6 header */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_OFFSET_3, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_OFFS_3_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_IC_PARSE_IPV6_LENGTH_3, ADF_C4XXX_DEFAULT_IC_PARSE_IPV6_LEN_3_VALUE); } static int adf_get_inline_ipsec_algo_group(struct adf_accel_dev *accel_dev, unsigned long *ipsec_algo_group) { char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; if (adf_cfg_get_param_value( accel_dev, ADF_INLINE_SEC, ADF_INLINE_IPSEC_ALGO_GROUP, val)) return EFAULT; if (kstrtoul(val, 0, ipsec_algo_group)) return EFAULT; /* Verify the ipsec_algo_group */ if (*ipsec_algo_group >= IPSEC_ALGO_GROUP_DELIMITER) { device_printf( GET_DEV(accel_dev), "Unsupported IPSEC algo group %lu in config file!\n", *ipsec_algo_group); return EFAULT; } return 0; } static int c4xxx_init_inline_hw(struct adf_accel_dev *accel_dev) { u32 sa_entry_reg_value = 0; u32 sa_fn_lim = 0; u32 supported_algo = 0; struct resource *aram_csr_base; u32 offset; unsigned long ipsec_algo_group = IPSEC_DEFAUL_ALGO_GROUP; aram_csr_base = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; if (adf_get_inline_ipsec_algo_group(accel_dev, &ipsec_algo_group)) return EFAULT; sa_entry_reg_value |= (ADF_C4XXX_DEFAULT_LU_KEY_LEN << ADF_C4XXX_LU_KEY_LEN_BIT_OFFSET); if (ipsec_algo_group == IPSEC_DEFAUL_ALGO_GROUP) { sa_entry_reg_value |= ADF_C4XXX_DEFAULT_SA_SIZE; sa_fn_lim = ADF_C4XXX_FUNC_LIMIT(accel_dev, ADF_C4XXX_DEFAULT_SA_SIZE); supported_algo = ADF_C4XXX_DEFAULT_SUPPORTED_ALGORITHMS; } else if (ipsec_algo_group == IPSEC_ALGO_GROUP1) { sa_entry_reg_value |= ADF_C4XXX_ALGO_GROUP1_SA_SIZE; sa_fn_lim = ADF_C4XXX_FUNC_LIMIT(accel_dev, ADF_C4XXX_ALGO_GROUP1_SA_SIZE); supported_algo = ADF_C4XXX_SUPPORTED_ALGORITHMS_GROUP1; } else { return EFAULT; } /* REG_SA_ENTRY_CTRL register initialisation */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_ENTRY_CTRL, sa_entry_reg_value); /* REG_SAL_FUNC_LIMITS register initialisation. Only the first register * needs to be initialised to enable as it is assigned to a physical * function. Other registers will be initialised by the LAN PF driver. * The function limits is initialised to its maximal value. */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_FUNC_LIMITS, sa_fn_lim); /* Initialize REG_SA_SCRATCH[0] register to * advertise supported crypto algorithms */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_SCRATCH_0, supported_algo); /* REG_SA_SCRATCH[2] register initialisation * to advertise supported crypto offload features. */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_SCRATCH_2, ADF_C4XXX_DEFAULT_CY_OFFLOAD_FEATURES); /* Overwrite default MAC_CFG register in ingress offset */ ADF_CSR_WR64(aram_csr_base, ADF_C4XXX_MAC_CFG + ADF_C4XXX_INLINE_INGRESS_OFFSET, ADF_C4XXX_MAC_CFG_VALUE); /* Overwrite default MAC_CFG register in egress offset */ ADF_CSR_WR64(aram_csr_base, ADF_C4XXX_MAC_CFG + ADF_C4XXX_INLINE_EGRESS_OFFSET, ADF_C4XXX_MAC_CFG_VALUE); /* Overwrite default MAC_PIA_CFG * (Packet Interface Adapter Configuration) registers * in ingress offset */ ADF_CSR_WR64(aram_csr_base, ADF_C4XXX_MAC_PIA_CFG + ADF_C4XXX_INLINE_INGRESS_OFFSET, ADF_C4XXX_MAC_PIA_CFG_VALUE); /* Overwrite default MAC_PIA_CFG in egress offset */ ADF_CSR_WR64(aram_csr_base, ADF_C4XXX_MAC_PIA_CFG + ADF_C4XXX_INLINE_EGRESS_OFFSET, ADF_C4XXX_MAC_PIA_CFG_VALUE); c4xxx_enable_parse_extraction(accel_dev); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_INGRESS_CMD_DIS_MISC, ADF_C4XXX_REG_CMD_DIS_MISC_DEFAULT_VALUE); ADF_CSR_WR(aram_csr_base, ADF_C4XXX_EGRESS_CMD_DIS_MISC, ADF_C4XXX_REG_CMD_DIS_MISC_DEFAULT_VALUE); /* Set bits<1:0> in ADF_C4XXX_INLINE_CAPABILITY register to * advertize that both ingress and egress directions are available */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_INLINE_CAPABILITY, ADF_C4XXX_INLINE_CAPABILITIES); /* Set error notification configuration of ingress */ offset = ADF_C4XXX_INLINE_INGRESS_OFFSET; c4xxx_init_error_notification_configuration(accel_dev, offset); /* Set error notification configuration of egress */ offset = ADF_C4XXX_INLINE_EGRESS_OFFSET; c4xxx_init_error_notification_configuration(accel_dev, offset); return 0; } static void adf_enable_inline_notification(struct adf_accel_dev *accel_dev) { struct resource *aram_csr_base; aram_csr_base = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; /* Set bit<0> in ADF_C4XXX_REG_SA_INLINE_ENABLE to advertise * that inline is enabled. */ ADF_CSR_WR(aram_csr_base, ADF_C4XXX_REG_SA_INLINE_ENABLE, ADF_C4XXX_INLINE_ENABLED); } static int c4xxx_init_aram_config(struct adf_accel_dev *accel_dev) { u32 aram_size = ADF_C4XXX_2MB_ARAM_SIZE; u32 ibuff_mem_needed = 0; u32 usable_aram_size = 0; struct adf_hw_aram_info *aram_info; u32 sa_db_ctl_value; struct resource *aram_csr_base; u8 profile = 0; u32 sadb_size = 0; u32 sa_size = 0; unsigned long ipsec_algo_group = IPSEC_DEFAUL_ALGO_GROUP; u32 i; if (accel_dev->au_info->num_inline_au > 0) if (adf_get_inline_ipsec_algo_group(accel_dev, &ipsec_algo_group)) return EFAULT; /* Allocate memory for adf_hw_aram_info */ aram_info = kzalloc(sizeof(*accel_dev->aram_info), GFP_KERNEL); if (!aram_info) return ENOMEM; /* Initialise Inline direction */ aram_info->inline_direction_egress_mask = 0; if (accel_dev->au_info->num_inline_au) { /* Set inline direction bitmap in the ARAM to * inform firmware which ME is egress */ aram_info->inline_direction_egress_mask = accel_dev->au_info->inline_egress_msk; /* User profile is valid, we can now add it * in the ARAM partition table */ aram_info->inline_congest_mngt_profile = profile; } /* Initialise DC ME mask, "1" = ME is used for DC operations */ aram_info->dc_ae_mask = accel_dev->au_info->dc_ae_msk; /* Initialise CY ME mask, "1" = ME is used for CY operations * Since asym service can also be enabled on inline AEs, here * we use the sym ae mask for configuring the cy_ae_msk */ aram_info->cy_ae_mask = accel_dev->au_info->sym_ae_msk; /* Configure number of long words in the ARAM */ aram_info->num_aram_lw_entries = ADF_C4XXX_NUM_ARAM_ENTRIES; /* Reset region offset values to 0xffffffff */ aram_info->mmp_region_offset = ~aram_info->mmp_region_offset; aram_info->skm_region_offset = ~aram_info->skm_region_offset; aram_info->inter_buff_aram_region_offset = ~aram_info->inter_buff_aram_region_offset; /* Determine ARAM size */ aram_csr_base = (&GET_BARS(accel_dev)[ADF_C4XXX_SRAM_BAR])->virt_addr; sa_db_ctl_value = ADF_CSR_RD(aram_csr_base, ADF_C4XXX_REG_SA_DB_CTRL); aram_size = (sa_db_ctl_value & ADF_C4XXX_SADB_SIZE_BIT) ? ADF_C4XXX_2MB_ARAM_SIZE : ADF_C4XXX_4MB_ARAM_SIZE; device_printf(GET_DEV(accel_dev), "Total available accelerator memory: %uMB\n", aram_size / ADF_C4XXX_1MB_SIZE); /* Compute MMP region offset */ aram_info->mmp_region_size = ADF_C4XXX_DEFAULT_MMP_REGION_SIZE; aram_info->mmp_region_offset = aram_size - aram_info->mmp_region_size; if (accel_dev->au_info->num_cy_au || accel_dev->au_info->num_inline_au) { /* Crypto is available therefore we must * include space in the ARAM for SKM. */ aram_info->skm_region_size = ADF_C4XXX_DEFAULT_SKM_REGION_SIZE; /* Compute SKM region offset */ aram_info->skm_region_offset = aram_size - (aram_info->mmp_region_size + aram_info->skm_region_size); } /* SADB always start at offset 0. */ if (accel_dev->au_info->num_inline_au) { /* Inline is available therefore we must * use remaining ARAM for the SADB. */ sadb_size = aram_size - (aram_info->mmp_region_size + aram_info->skm_region_size); /* * When the inline service is enabled, the policy is that * compression gives up it's space in ARAM to allow for a * larger SADB. Compression must use DRAM instead of ARAM. */ aram_info->inter_buff_aram_region_size = 0; /* the SADB size must be an integral multiple of the SA size */ if (ipsec_algo_group == IPSEC_DEFAUL_ALGO_GROUP) { sa_size = ADF_C4XXX_DEFAULT_SA_SIZE; } else { /* IPSEC_ALGO_GROUP1 * Total 2 algo groups. */ sa_size = ADF_C4XXX_ALGO_GROUP1_SA_SIZE; } sadb_size = sadb_size - (sadb_size % ADF_C4XXX_SA_SIZE_IN_BYTES(sa_size)); aram_info->sadb_region_size = sadb_size; } if (accel_dev->au_info->num_dc_au && !accel_dev->au_info->num_inline_au) { /* Compression is available therefore we must see if there is * space in the ARAM for intermediate buffers. */ aram_info->inter_buff_aram_region_size = 0; usable_aram_size = aram_size - (aram_info->mmp_region_size + aram_info->skm_region_size); for (i = 1; i <= accel_dev->au_info->num_dc_au; i++) { if ((i * ADF_C4XXX_AU_COMPR_INTERM_SIZE) > usable_aram_size) break; ibuff_mem_needed = i * ADF_C4XXX_AU_COMPR_INTERM_SIZE; } /* Set remaining ARAM to intermediate buffers. Firmware handles * fallback to DRAM for cases were number of AU assigned * to compression exceeds available ARAM memory. */ aram_info->inter_buff_aram_region_size = ibuff_mem_needed; /* If ARAM is used for compression set its initial offset. */ if (aram_info->inter_buff_aram_region_size) aram_info->inter_buff_aram_region_offset = 0; } accel_dev->aram_info = aram_info; return 0; } static void c4xxx_exit_aram_config(struct adf_accel_dev *accel_dev) { kfree(accel_dev->aram_info); accel_dev->aram_info = NULL; } static u32 get_num_accel_units(struct adf_hw_device_data *self) { u32 i = 0, num_accel = 0; unsigned long accel_mask = 0; if (!self || !self->accel_mask) return 0; accel_mask = self->accel_mask; for_each_set_bit(i, &accel_mask, ADF_C4XXX_MAX_ACCELERATORS) { num_accel++; } return num_accel / ADF_C4XXX_NUM_ACCEL_PER_AU; } static int get_accel_unit(struct adf_hw_device_data *self, struct adf_accel_unit **accel_unit) { enum dev_sku_info sku; sku = get_sku(self); switch (sku) { case DEV_SKU_1: case DEV_SKU_1_CY: *accel_unit = adf_c4xxx_au_32_ae; break; case DEV_SKU_2: case DEV_SKU_2_CY: *accel_unit = adf_c4xxx_au_24_ae; break; case DEV_SKU_3: case DEV_SKU_3_CY: *accel_unit = adf_c4xxx_au_12_ae; break; default: *accel_unit = adf_c4xxx_au_emulation; break; } return 0; } static int get_ae_info(struct adf_hw_device_data *self, const struct adf_ae_info **ae_info) { enum dev_sku_info sku; sku = get_sku(self); switch (sku) { case DEV_SKU_1: *ae_info = adf_c4xxx_32_ae; break; case DEV_SKU_1_CY: *ae_info = adf_c4xxx_32_ae_sym; break; case DEV_SKU_2: *ae_info = adf_c4xxx_24_ae; break; case DEV_SKU_2_CY: *ae_info = adf_c4xxx_24_ae_sym; break; case DEV_SKU_3: *ae_info = adf_c4xxx_12_ae; break; case DEV_SKU_3_CY: *ae_info = adf_c4xxx_12_ae_sym; break; default: *ae_info = adf_c4xxx_12_ae; break; } return 0; } static int adf_add_debugfs_info(struct adf_accel_dev *accel_dev) { /* Add Accel Unit configuration table to debug FS interface */ if (c4xxx_init_ae_config(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to create entry for AE configuration\n"); return EFAULT; } return 0; } static void adf_remove_debugfs_info(struct adf_accel_dev *accel_dev) { /* Remove Accel Unit configuration table from debug FS interface */ c4xxx_exit_ae_config(accel_dev); } static int check_svc_to_hw_capabilities(struct adf_accel_dev *accel_dev, const char *svc_name, enum icp_qat_capabilities_mask cap) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 hw_cap = hw_data->accel_capabilities_mask; hw_cap &= cap; if (hw_cap != cap) { device_printf(GET_DEV(accel_dev), "Service not supported by accelerator: %s\n", svc_name); return EPERM; } return 0; } static int check_accel_unit_config(struct adf_accel_dev *accel_dev, u8 num_cy_au, u8 num_dc_au, u8 num_inline_au) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; u32 num_au = hw_data->get_num_accel_units(hw_data); u32 service_mask = ADF_ACCEL_SERVICE_NULL; char *token, *cur_str; int ret = 0; /* Get the services enabled by user */ snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; cur_str = val; token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); while (token) { if (!strncmp(token, ADF_SERVICE_CY, strlen(ADF_SERVICE_CY))) { service_mask |= ADF_ACCEL_CRYPTO; ret |= check_svc_to_hw_capabilities( accel_dev, token, ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC); } if (!strncmp(token, ADF_CFG_SYM, strlen(ADF_CFG_SYM))) { service_mask |= ADF_ACCEL_CRYPTO; ret |= check_svc_to_hw_capabilities( accel_dev, token, ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC); } if (!strncmp(token, ADF_CFG_ASYM, strlen(ADF_CFG_ASYM))) { /* Handle a special case of services 'asym;inline' * enabled where ASYM is handled by Inline firmware * at AE level. This configuration allows to enable * ASYM service without accel units assigned to * CRYPTO service, e.g. * num_inline_au = 6 * num_cy_au = 0 */ if (num_inline_au < num_au) service_mask |= ADF_ACCEL_CRYPTO; ret |= check_svc_to_hw_capabilities( accel_dev, token, ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC); } if (!strncmp(token, ADF_SERVICE_DC, strlen(ADF_SERVICE_DC))) { service_mask |= ADF_ACCEL_COMPRESSION; ret |= check_svc_to_hw_capabilities( accel_dev, token, ICP_ACCEL_CAPABILITIES_COMPRESSION); } if (!strncmp(token, ADF_SERVICE_INLINE, strlen(ADF_SERVICE_INLINE))) { service_mask |= ADF_ACCEL_INLINE_CRYPTO; ret |= check_svc_to_hw_capabilities( accel_dev, token, ICP_ACCEL_CAPABILITIES_INLINE); } token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); } /* Ensure the user doesn't enable services that are not supported by * accelerator. */ if (ret) { device_printf(GET_DEV(accel_dev), "Invalid accelerator configuration.\n"); return EFAULT; } if (!(service_mask & ADF_ACCEL_COMPRESSION) && num_dc_au > 0) { device_printf(GET_DEV(accel_dev), "Invalid accel unit config.\n"); device_printf( GET_DEV(accel_dev), "DC accel units set when dc service not enabled\n"); return EFAULT; } if (!(service_mask & ADF_ACCEL_CRYPTO) && num_cy_au > 0) { device_printf(GET_DEV(accel_dev), "Invalid accel unit config.\n"); device_printf( GET_DEV(accel_dev), "CY accel units set when cy service not enabled\n"); return EFAULT; } if (!(service_mask & ADF_ACCEL_INLINE_CRYPTO) && num_inline_au > 0) { device_printf(GET_DEV(accel_dev), "Invalid accel unit config.\n" "Inline feature not supported.\n"); return EFAULT; } hw_data->service_mask = service_mask; /* Ensure the user doesn't allocate more than max accel units */ if (num_au != (num_cy_au + num_dc_au + num_inline_au)) { device_printf(GET_DEV(accel_dev), "Invalid accel unit config.\n"); device_printf(GET_DEV(accel_dev), "Max accel units is %d\n", num_au); return EFAULT; } /* Ensure user allocates hardware resources for enabled services */ if (!num_cy_au && (service_mask & ADF_ACCEL_CRYPTO)) { device_printf(GET_DEV(accel_dev), "Failed to enable cy service!\n"); device_printf(GET_DEV(accel_dev), "%s should not be 0", ADF_NUM_CY_ACCEL_UNITS); return EFAULT; } if (!num_dc_au && (service_mask & ADF_ACCEL_COMPRESSION)) { device_printf(GET_DEV(accel_dev), "Failed to enable dc service!\n"); device_printf(GET_DEV(accel_dev), "%s should not be 0", ADF_NUM_DC_ACCEL_UNITS); return EFAULT; } if (!num_inline_au && (service_mask & ADF_ACCEL_INLINE_CRYPTO)) { device_printf(GET_DEV(accel_dev), "Failed to enable"); device_printf(GET_DEV(accel_dev), " inline service!"); device_printf(GET_DEV(accel_dev), " %s should not be 0\n", ADF_NUM_INLINE_ACCEL_UNITS); return EFAULT; } return 0; } static int get_accel_unit_config(struct adf_accel_dev *accel_dev, u8 *num_cy_au, u8 *num_dc_au, u8 *num_inline_au) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; /* Get the number of accel units allocated for each service */ snprintf(key, sizeof(key), ADF_NUM_CY_ACCEL_UNITS); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; if (compat_strtou8(val, 10, num_cy_au)) return EFAULT; snprintf(key, sizeof(key), ADF_NUM_DC_ACCEL_UNITS); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; if (compat_strtou8(val, 10, num_dc_au)) return EFAULT; snprintf(key, sizeof(key), ADF_NUM_INLINE_ACCEL_UNITS); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; if (compat_strtou8(val, 10, num_inline_au)) return EFAULT; return 0; } /* Function reads the inline ingress/egress configuration * and returns the number of AEs reserved for ingress * and egress for accel units which are allocated for * inline service */ static int adf_get_inline_config(struct adf_accel_dev *accel_dev, u32 *num_ingress_aes) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; char *value; u32 num_au = hw_data->get_num_accel_units(hw_data); unsigned long ingress, egress = 0; struct adf_accel_unit *accel_unit = accel_dev->au_info->au; u32 num_inline_aes = 0, num_ingress_ae = 0; u32 i = 0; snprintf(key, sizeof(key), ADF_INLINE_INGRESS); if (adf_cfg_get_param_value(accel_dev, ADF_INLINE_SEC, key, val)) { device_printf(GET_DEV(accel_dev), "Failed to find ingress\n"); return EFAULT; } value = val; value = strsep(&value, ADF_C4XXX_PERCENTAGE); if (compat_strtoul(value, 10, &ingress)) return EFAULT; snprintf(key, sizeof(key), ADF_INLINE_EGRESS); if (adf_cfg_get_param_value(accel_dev, ADF_INLINE_SEC, key, val)) { device_printf(GET_DEV(accel_dev), "Failed to find egress\n"); return EFAULT; } value = val; value = strsep(&value, ADF_C4XXX_PERCENTAGE); if (compat_strtoul(value, 10, &egress)) return EFAULT; if (ingress + egress != ADF_C4XXX_100) { device_printf(GET_DEV(accel_dev), "The sum of ingress and egress should be 100\n"); return EFAULT; } for (i = 0; i < num_au; i++) { if (accel_unit[i].services == ADF_ACCEL_INLINE_CRYPTO) num_inline_aes += accel_unit[i].num_ae; } num_ingress_ae = num_inline_aes * ingress / ADF_C4XXX_100; if (((num_inline_aes * ingress) % ADF_C4XXX_100) > ADF_C4XXX_ROUND_LIMIT) num_ingress_ae++; *num_ingress_aes = num_ingress_ae; return 0; } static int adf_set_inline_ae_mask(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); struct adf_accel_unit_info *au_info = accel_dev->au_info; struct adf_accel_unit *accel_unit = accel_dev->au_info->au; u32 num_ingress_ae = 0; u32 ingress_msk = 0; u32 i, j, ae_mask; if (adf_get_inline_config(accel_dev, &num_ingress_ae)) return EFAULT; for (i = 0; i < num_au; i++) { j = 0; if (accel_unit[i].services == ADF_ACCEL_INLINE_CRYPTO) { /* AEs with inline service enabled are also used * for asymmetric crypto */ au_info->asym_ae_msk |= accel_unit[i].ae_mask; ae_mask = accel_unit[i].ae_mask; while (num_ingress_ae && ae_mask) { if (ae_mask & 1) { ingress_msk |= BIT(j); num_ingress_ae--; } ae_mask = ae_mask >> 1; j++; } au_info->inline_ingress_msk |= ingress_msk; au_info->inline_egress_msk |= ~(au_info->inline_ingress_msk) & accel_unit[i].ae_mask; } } return 0; } static int adf_set_ae_mask(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); struct adf_accel_unit_info *au_info = accel_dev->au_info; struct adf_accel_unit *accel_unit = accel_dev->au_info->au; char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; char *token, *cur_str; bool asym_en = false, sym_en = false; u32 i; /* Get the services enabled by user */ snprintf(key, sizeof(key), ADF_SERVICES_ENABLED); if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) return EFAULT; cur_str = val; token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); while (token) { if (!strncmp(token, ADF_CFG_ASYM, strlen(ADF_CFG_ASYM))) asym_en = true; if (!strncmp(token, ADF_CFG_SYM, strlen(ADF_CFG_SYM))) sym_en = true; if (!strncmp(token, ADF_CFG_CY, strlen(ADF_CFG_CY))) { sym_en = true; asym_en = true; } token = strsep(&cur_str, ADF_SERVICES_SEPARATOR); } for (i = 0; i < num_au; i++) { if (accel_unit[i].services == ADF_ACCEL_CRYPTO) { /* AEs that support crypto can perform both * symmetric and asymmetric crypto, however * we only enable the threads if the relevant * service is also enabled */ if (asym_en) au_info->asym_ae_msk |= accel_unit[i].ae_mask; if (sym_en) au_info->sym_ae_msk |= accel_unit[i].ae_mask; } else if (accel_unit[i].services == ADF_ACCEL_COMPRESSION) { au_info->dc_ae_msk |= accel_unit[i].comp_ae_mask; } } return 0; } static int adf_init_accel_unit_services(struct adf_accel_dev *accel_dev) { u8 num_cy_au, num_dc_au, num_inline_au; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); struct adf_accel_unit *accel_unit; const struct adf_ae_info *ae_info; int i; if (get_accel_unit_config( accel_dev, &num_cy_au, &num_dc_au, &num_inline_au)) { device_printf(GET_DEV(accel_dev), "Invalid accel unit cfg\n"); return EFAULT; } if (check_accel_unit_config( accel_dev, num_cy_au, num_dc_au, num_inline_au)) return EFAULT; accel_dev->au_info = kzalloc(sizeof(*accel_dev->au_info), GFP_KERNEL); if (!accel_dev->au_info) return ENOMEM; accel_dev->au_info->num_cy_au = num_cy_au; accel_dev->au_info->num_dc_au = num_dc_au; accel_dev->au_info->num_inline_au = num_inline_au; if (get_ae_info(hw_data, &ae_info)) { device_printf(GET_DEV(accel_dev), "Failed to get ae info\n"); goto err_au_info; } accel_dev->au_info->ae_info = ae_info; if (get_accel_unit(hw_data, &accel_unit)) { device_printf(GET_DEV(accel_dev), "Failed to get accel unit\n"); goto err_ae_info; } /* Enable compression accel units */ /* Accel units with 4AEs are reserved for compression first */ for (i = num_au - 1; i >= 0 && num_dc_au > 0; i--) { if (accel_unit[i].num_ae == ADF_C4XXX_4_AE) { accel_unit[i].services = ADF_ACCEL_COMPRESSION; num_dc_au--; } } for (i = num_au - 1; i >= 0 && num_dc_au > 0; i--) { if (accel_unit[i].services == ADF_ACCEL_SERVICE_NULL) { accel_unit[i].services = ADF_ACCEL_COMPRESSION; num_dc_au--; } } /* Enable inline accel units */ for (i = 0; i < num_au && num_inline_au > 0; i++) { if (accel_unit[i].services == ADF_ACCEL_SERVICE_NULL) { accel_unit[i].services = ADF_ACCEL_INLINE_CRYPTO; num_inline_au--; } } /* Enable crypto accel units */ for (i = 0; i < num_au && num_cy_au > 0; i++) { if (accel_unit[i].services == ADF_ACCEL_SERVICE_NULL) { accel_unit[i].services = ADF_ACCEL_CRYPTO; num_cy_au--; } } accel_dev->au_info->au = accel_unit; return 0; err_ae_info: accel_dev->au_info->ae_info = NULL; err_au_info: kfree(accel_dev->au_info); accel_dev->au_info = NULL; return EFAULT; } static void adf_exit_accel_unit_services(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); int i; if (accel_dev->au_info) { if (accel_dev->au_info->au) { for (i = 0; i < num_au; i++) { accel_dev->au_info->au[i].services = ADF_ACCEL_SERVICE_NULL; } } accel_dev->au_info->au = NULL; accel_dev->au_info->ae_info = NULL; kfree(accel_dev->au_info); accel_dev->au_info = NULL; } } static inline void adf_c4xxx_reset_hw_units(struct adf_accel_dev *accel_dev) { struct resource *pmisc = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; u32 global_clk_enable = ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ARAM | ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ICI_ENABLE | ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ICE_ENABLE; u32 ixp_reset_generic = ADF_C4XXX_IXP_RESET_GENERIC_ARAM | ADF_C4XXX_IXP_RESET_GENERIC_INLINE_EGRESS | ADF_C4XXX_IXP_RESET_GENERIC_INLINE_INGRESS; /* To properly reset each of the units driver must: * 1)Call out resetactive state using ixp reset generic * register; * 2)Disable generic clock; * 3)Take device out of reset by clearing ixp reset * generic register; * 4)Re-enable generic clock; */ ADF_CSR_WR(pmisc, ADF_C4XXX_IXP_RESET_GENERIC, ixp_reset_generic); ADF_CSR_WR(pmisc, ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC, ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_DISABLE_ALL); ADF_CSR_WR(pmisc, ADF_C4XXX_IXP_RESET_GENERIC, ADF_C4XXX_IXP_RESET_GENERIC_OUT_OF_RESET_TRIGGER); ADF_CSR_WR(pmisc, ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC, global_clk_enable); } static int adf_init_accel_units(struct adf_accel_dev *accel_dev) { struct resource *csr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; if (adf_init_accel_unit_services(accel_dev)) return EFAULT; /* Set cy and dc enabled AE masks */ if (accel_dev->au_info->num_cy_au || accel_dev->au_info->num_dc_au) { if (adf_set_ae_mask(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to set ae masks\n"); goto err_au; } } /* Set ingress/egress ae mask if inline is enabled */ if (accel_dev->au_info->num_inline_au) { if (adf_set_inline_ae_mask(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to set inline ae masks\n"); goto err_au; } } /* Define ARAM regions */ if (c4xxx_init_aram_config(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to init aram config\n"); goto err_au; } /* Configure h/w registers for inline operations */ if (accel_dev->au_info->num_inline_au > 0) /* Initialise configuration parsing registers */ if (c4xxx_init_inline_hw(accel_dev)) goto err_au; c4xxx_set_sadb_size(accel_dev); if (accel_dev->au_info->num_inline_au > 0) { /* ici/ice interrupt shall be enabled after msi-x enabled */ ADF_CSR_WR(csr, ADF_C4XXX_ERRMSK11, ADF_C4XXX_ERRMSK11_ERR_DISABLE_ICI_ICE_INTR); adf_enable_inline_notification(accel_dev); } update_hw_capability(accel_dev); if (adf_add_debugfs_info(accel_dev)) { device_printf(GET_DEV(accel_dev), "Failed to add debug FS information\n"); goto err_au; } return 0; err_au: /* Free and clear accel unit data structures */ adf_exit_accel_unit_services(accel_dev); return EFAULT; } static void adf_exit_accel_units(struct adf_accel_dev *accel_dev) { adf_exit_accel_unit_services(accel_dev); /* Free aram mapping structure */ c4xxx_exit_aram_config(accel_dev); /* Remove entries in debug FS */ adf_remove_debugfs_info(accel_dev); } static const char * get_obj_name(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { u32 capabilities = GET_HW_DATA(accel_dev)->accel_capabilities_mask; bool sym_only_sku = false; /* Check if SKU is capable only of symmetric cryptography * via device capabilities. */ if ((capabilities & ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC) && !(capabilities & ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC) && !(capabilities & ADF_ACCEL_CAPABILITIES_COMPRESSION)) sym_only_sku = true; switch (service) { case ADF_ACCEL_INLINE_CRYPTO: return ADF_C4XXX_INLINE_OBJ; case ADF_ACCEL_CRYPTO: if (sym_only_sku) return ADF_C4XXX_SYM_OBJ; else return ADF_C4XXX_CY_OBJ; break; case ADF_ACCEL_COMPRESSION: return ADF_C4XXX_DC_OBJ; default: return NULL; } } static uint32_t get_objs_num(struct adf_accel_dev *accel_dev) { u32 srv = 0; u32 max_srv_id = 0; unsigned long service_mask = accel_dev->hw_device->service_mask; /* The objects number corresponds to the number of services */ for_each_set_bit(srv, &service_mask, ADF_C4XXX_MAX_OBJ) { max_srv_id = srv; } return (max_srv_id + 1); } static uint32_t get_obj_cfg_ae_mask(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { u32 ae_mask = 0; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_au = hw_data->get_num_accel_units(hw_data); struct adf_accel_unit *accel_unit = accel_dev->au_info->au; u32 i = 0; if (service == ADF_ACCEL_SERVICE_NULL) return 0; for (i = 0; i < num_au; i++) { if (accel_unit[i].services == service) ae_mask |= accel_unit[i].ae_mask; } return ae_mask; } static void configure_iov_threads(struct adf_accel_dev *accel_dev, bool enable) { struct resource *addr; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 num_aes = hw_data->get_num_aes(hw_data); u32 reg = 0x0; u32 i; addr = (&GET_BARS(accel_dev)[ADF_C4XXX_PMISC_BAR])->virt_addr; /* Set/Unset Valid bits in AE Thread to PCIe Function Mapping */ for (i = 0; i < ADF_C4XXX_AE2FUNC_REG_PER_AE * num_aes; i++) { reg = ADF_CSR_RD(addr + ADF_C4XXX_AE2FUNC_MAP_OFFSET, i * ADF_C4XXX_AE2FUNC_MAP_REG_SIZE); if (enable) reg |= ADF_C4XXX_AE2FUNC_MAP_VALID; else reg &= ~ADF_C4XXX_AE2FUNC_MAP_VALID; ADF_CSR_WR(addr + ADF_C4XXX_AE2FUNC_MAP_OFFSET, i * ADF_C4XXX_AE2FUNC_MAP_REG_SIZE, reg); } } void adf_init_hw_data_c4xxx(struct adf_hw_device_data *hw_data) { hw_data->dev_class = &c4xxx_class; hw_data->instance_id = c4xxx_class.instances++; hw_data->num_banks = ADF_C4XXX_ETR_MAX_BANKS; hw_data->num_rings_per_bank = ADF_C4XXX_NUM_RINGS_PER_BANK; hw_data->num_accel = ADF_C4XXX_MAX_ACCELERATORS; hw_data->num_engines = ADF_C4XXX_MAX_ACCELENGINES; hw_data->num_logical_accel = 1; hw_data->tx_rx_gap = ADF_C4XXX_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_C4XXX_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->init_ras = adf_init_ras; hw_data->exit_ras = adf_exit_ras; hw_data->ras_interrupts = adf_ras_interrupts; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_num_accel_units = get_num_accel_units; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; - hw_data->get_pf2vf_offset = get_pf2vf_offset; - hw_data->get_vintmsk_offset = get_vintmsk_offset; hw_data->get_arb_info = get_arb_info; hw_data->get_admin_info = get_admin_info; hw_data->get_errsou_offset = get_errsou_offset; hw_data->get_clock_speed = get_clock_speed; hw_data->get_eth_doorbell_msg = get_eth_doorbell_msg; hw_data->get_sku = get_sku; hw_data->heartbeat_ctr_num = ADF_NUM_THREADS_PER_AE; hw_data->check_prod_sku = c4xxx_check_prod_sku; hw_data->fw_name = ADF_C4XXX_FW; hw_data->fw_mmp_name = ADF_C4XXX_MMP; hw_data->get_obj_name = get_obj_name; hw_data->get_objs_num = get_objs_num; hw_data->get_obj_cfg_ae_mask = get_obj_cfg_ae_mask; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->configure_iov_threads = configure_iov_threads; hw_data->disable_iov = adf_disable_sriov; hw_data->send_admin_init = adf_send_admin_init; hw_data->init_arb = adf_init_arb_c4xxx; hw_data->exit_arb = adf_exit_arb_c4xxx; hw_data->disable_arb = adf_disable_arb; hw_data->enable_ints = adf_enable_ints; hw_data->set_ssm_wdtimer = c4xxx_set_ssm_wdtimer; hw_data->check_slice_hang = c4xxx_check_slice_hang; - hw_data->enable_vf2pf_comms = adf_pf_enable_vf2pf_comms; - hw_data->disable_vf2pf_comms = adf_pf_disable_vf2pf_comms; hw_data->reset_device = adf_reset_flr; hw_data->restore_device = adf_c4xxx_dev_restore; - hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; hw_data->init_accel_units = adf_init_accel_units; hw_data->reset_hw_units = adf_c4xxx_reset_hw_units; hw_data->exit_accel_units = adf_exit_accel_units; hw_data->ring_to_svc_map = ADF_DEFAULT_RING_TO_SRV_MAP; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->clock_frequency = ADF_C4XXX_AE_FREQ; hw_data->measure_clock = measure_clock; hw_data->add_pke_stats = adf_pke_replay_counters_add_c4xxx; hw_data->remove_pke_stats = adf_pke_replay_counters_remove_c4xxx; hw_data->add_misc_error = adf_misc_error_add_c4xxx; hw_data->remove_misc_error = adf_misc_error_remove_c4xxx; hw_data->extended_dc_capabilities = 0; hw_data->get_storage_enabled = get_storage_enabled; hw_data->query_storage_cap = 0; hw_data->get_accel_cap = c4xxx_get_hw_cap; hw_data->configure_accel_units = c4xxx_configure_accel_units; hw_data->pre_reset = adf_dev_pre_reset; hw_data->post_reset = adf_dev_post_reset; hw_data->get_ring_to_svc_map = adf_cfg_get_services_enabled; hw_data->count_ras_event = adf_fw_count_ras_event; hw_data->config_device = adf_config_device; hw_data->set_asym_rings_mask = adf_cfg_set_asym_rings_mask; adf_gen2_init_hw_csr_info(&hw_data->csr_info); + adf_gen2_init_pf_pfvf_ops(&hw_data->csr_info.pfvf_ops); hw_data->csr_info.arb_enable_mask = 0xF; } void adf_clean_hw_data_c4xxx(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } void remove_oid(struct adf_accel_dev *accel_dev, struct sysctl_oid *oid) { struct sysctl_ctx_list *qat_sysctl_ctx; int ret; qat_sysctl_ctx = device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev); ret = sysctl_ctx_entry_del(qat_sysctl_ctx, oid); if (ret) device_printf(GET_DEV(accel_dev), "Failed to delete entry\n"); ret = sysctl_remove_oid(oid, 1, 1); if (ret) device_printf(GET_DEV(accel_dev), "Failed to delete oid\n"); } diff --git a/sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c b/sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c index bf73b60adc39..cfddc71dd371 100644 --- a/sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c +++ b/sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c @@ -1,424 +1,409 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include #include #include -#include +#include #include #include +#include #include "adf_c62x_hw_data.h" #include "icp_qat_hw.h" #include "adf_cfg.h" #include "adf_heartbeat.h" /* Worker thread to service arbiter mappings */ static const u32 thrd_to_arb_map[ADF_C62X_MAX_ACCELENGINES] = { 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA }; enum { DEV_C62X_SKU_1 = 0, DEV_C62X_SKU_2 = 1 }; static u32 thrd_to_arb_map_gen[ADF_C62X_MAX_ACCELENGINES] = { 0 }; static struct adf_hw_device_class c62x_class = {.name = ADF_C62X_DEVICE_NAME, .type = DEV_C62X, .instances = 0 }; static u32 get_accel_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; u32 straps; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); straps = pci_read_config(pdev, ADF_C62X_SOFTSTRAP_CSR_OFFSET, 4); return (~(fuse | straps)) >> ADF_C62X_ACCELERATORS_REG_OFFSET & ADF_C62X_ACCELERATORS_MASK; } static u32 get_ae_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; u32 me_straps; u32 me_disable; u32 ssms_disabled; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); me_straps = pci_read_config(pdev, ADF_C62X_SOFTSTRAP_CSR_OFFSET, 4); /* If SSMs are disabled, then disable the corresponding MEs */ ssms_disabled = (~get_accel_mask(accel_dev)) & ADF_C62X_ACCELERATORS_MASK; me_disable = 0x3; while (ssms_disabled) { if (ssms_disabled & 1) me_straps |= me_disable; ssms_disabled >>= 1; me_disable <<= 2; } return (~(fuse | me_straps)) & ADF_C62X_ACCELENGINES_MASK; } static u32 get_num_accels(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->accel_mask) return 0; for (i = 0; i < ADF_C62X_MAX_ACCELERATORS; i++) { if (self->accel_mask & (1 << i)) ctr++; } return ctr; } static u32 get_num_aes(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->ae_mask) return 0; for (i = 0; i < ADF_C62X_MAX_ACCELENGINES; i++) { if (self->ae_mask & (1 << i)) ctr++; } return ctr; } static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_PMISC_BAR; } static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_ETR_BAR; } static u32 get_sram_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_SRAM_BAR; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { int aes = get_num_aes(self); if (aes == 8) return DEV_SKU_2; else if (aes == 10) return DEV_SKU_4; return DEV_SKU_UNKNOWN; } static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, u32 const **arb_map_config) { int i; struct adf_hw_device_data *hw_device = accel_dev->hw_device; for (i = 0; i < ADF_C62X_MAX_ACCELENGINES; i++) { thrd_to_arb_map_gen[i] = 0; if (hw_device->ae_mask & (1 << i)) thrd_to_arb_map_gen[i] = thrd_to_arb_map[i]; } adf_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map, thrd_to_arb_map_gen, ADF_C62X_MAX_ACCELENGINES); *arb_map_config = thrd_to_arb_map_gen; } -static u32 -get_pf2vf_offset(u32 i) -{ - return ADF_C62X_PF2VF_OFFSET(i); -} - -static u32 -get_vintmsk_offset(u32 i) -{ - return ADF_C62X_VINTMSK_OFFSET(i); -} - static void get_arb_info(struct arb_info *arb_csrs_info) { arb_csrs_info->arbiter_offset = ADF_C62X_ARB_OFFSET; arb_csrs_info->wrk_thd_2_srv_arb_map = ADF_C62X_ARB_WRK_2_SER_MAP_OFFSET; arb_csrs_info->wrk_cfg_offset = ADF_C62X_ARB_WQCFG_OFFSET; } static void get_admin_info(struct admin_info *admin_csrs_info) { admin_csrs_info->mailbox_offset = ADF_C62X_MAILBOX_BASE_OFFSET; admin_csrs_info->admin_msg_ur = ADF_C62X_ADMINMSGUR_OFFSET; admin_csrs_info->admin_msg_lr = ADF_C62X_ADMINMSGLR_OFFSET; } static void get_errsou_offset(u32 *errsou3, u32 *errsou5) { *errsou3 = ADF_C62X_ERRSOU3; *errsou5 = ADF_C62X_ERRSOU5; } static u32 get_clock_speed(struct adf_hw_device_data *self) { /* CPP clock is half high-speed clock */ return self->clock_frequency / 2; } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C62X_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; unsigned int val, i; unsigned int mask; /* Enable Accel Engine error detection & correction */ mask = hw_device->ae_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_C62X_AE_CTX_ENABLES(i)); val |= ADF_C62X_ENABLE_AE_ECC_ERR; ADF_CSR_WR(csr, ADF_C62X_AE_CTX_ENABLES(i), val); val = ADF_CSR_RD(csr, ADF_C62X_AE_MISC_CONTROL(i)); val |= ADF_C62X_ENABLE_AE_ECC_PARITY_CORR; ADF_CSR_WR(csr, ADF_C62X_AE_MISC_CONTROL(i), val); } /* Enable shared memory error detection & correction */ mask = hw_device->accel_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_C62X_UERRSSMSH(i)); val |= ADF_C62X_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C62X_UERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_C62X_CERRSSMSH(i)); val |= ADF_C62X_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C62X_CERRSSMSH(i), val); } } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { struct resource *addr; addr = (&GET_BARS(accel_dev)[ADF_C62X_PMISC_BAR])->virt_addr; /* Enable bundle and misc interrupts */ ADF_CSR_WR(addr, ADF_C62X_SMIAPF0_MASK_OFFSET, ADF_C62X_SMIA0_MASK); ADF_CSR_WR(addr, ADF_C62X_SMIAPF1_MASK_OFFSET, ADF_C62X_SMIA1_MASK); } static u32 get_ae_clock(struct adf_hw_device_data *self) { /* * Clock update interval is <16> ticks for c62x. */ return self->clock_frequency / 16; } static int get_storage_enabled(struct adf_accel_dev *accel_dev, uint32_t *storage_enabled) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; strlcpy(key, ADF_STORAGE_FIRMWARE_ENABLED, sizeof(key)); if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) { if (kstrtouint(val, 0, storage_enabled)) return -EFAULT; } return 0; } static int measure_clock(struct adf_accel_dev *accel_dev) { u32 frequency; int ret = 0; ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_C62X_MIN_AE_FREQ, ADF_C62X_MAX_AE_FREQ); if (ret) return ret; accel_dev->hw_device->clock_frequency = frequency; return 0; } static u32 c62x_get_hw_cap(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 legfuses; u32 capabilities; u32 straps; struct adf_hw_device_data *hw_data = accel_dev->hw_device; u32 fuses = hw_data->fuses; /* Read accelerator capabilities mask */ legfuses = pci_read_config(pdev, ADF_DEVICE_LEGFUSE_OFFSET, 4); capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC + ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC + ICP_ACCEL_CAPABILITIES_CIPHER + ICP_ACCEL_CAPABILITIES_AUTHENTICATION + ICP_ACCEL_CAPABILITIES_COMPRESSION + ICP_ACCEL_CAPABILITIES_ZUC + ICP_ACCEL_CAPABILITIES_SHA3 + ICP_ACCEL_CAPABILITIES_HKDF + ICP_ACCEL_CAPABILITIES_ECEDMONT + ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN; if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN); if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; if (legfuses & ICP_ACCEL_MASK_PKE_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_ECEDMONT); if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; if (legfuses & ICP_ACCEL_MASK_EIA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_ZUC; if (legfuses & ICP_ACCEL_MASK_SHA3_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_SHA3; straps = pci_read_config(pdev, ADF_C62X_SOFTSTRAP_CSR_OFFSET, 4); if ((straps | fuses) & ADF_C62X_POWERGATE_PKE) capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; if ((straps | fuses) & ADF_C62X_POWERGATE_DC) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; return capabilities; } static const char * get_obj_name(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { return ADF_CXXX_AE_FW_NAME_CUSTOM1; } static uint32_t get_objs_num(struct adf_accel_dev *accel_dev) { return 1; } static uint32_t get_obj_cfg_ae_mask(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services services) { return accel_dev->hw_device->ae_mask; } void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data) { hw_data->dev_class = &c62x_class; hw_data->instance_id = c62x_class.instances++; hw_data->num_banks = ADF_C62X_ETR_MAX_BANKS; hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK; hw_data->num_accel = ADF_C62X_MAX_ACCELERATORS; hw_data->num_logical_accel = 1; hw_data->num_engines = ADF_C62X_MAX_ACCELENGINES; hw_data->tx_rx_gap = ADF_C62X_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_C62X_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->print_err_registers = adf_print_err_registers; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; - hw_data->get_pf2vf_offset = get_pf2vf_offset; - hw_data->get_vintmsk_offset = get_vintmsk_offset; hw_data->get_arb_info = get_arb_info; hw_data->get_admin_info = get_admin_info; hw_data->get_errsou_offset = get_errsou_offset; hw_data->get_clock_speed = get_clock_speed; hw_data->get_sku = get_sku; hw_data->heartbeat_ctr_num = ADF_NUM_HB_CNT_PER_AE; hw_data->fw_name = ADF_C62X_FW; hw_data->fw_mmp_name = ADF_C62X_MMP; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->disable_iov = adf_disable_sriov; hw_data->send_admin_init = adf_send_admin_init; hw_data->init_arb = adf_init_gen2_arb; hw_data->exit_arb = adf_exit_arb; hw_data->get_arb_mapping = adf_get_arbiter_mapping; hw_data->enable_ints = adf_enable_ints; hw_data->set_ssm_wdtimer = adf_set_ssm_wdtimer; hw_data->check_slice_hang = adf_check_slice_hang; - hw_data->enable_vf2pf_comms = adf_pf_enable_vf2pf_comms; - hw_data->disable_vf2pf_comms = adf_pf_disable_vf2pf_comms; hw_data->restore_device = adf_dev_restore; hw_data->reset_device = adf_reset_flr; - hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; hw_data->get_objs_num = get_objs_num; hw_data->get_obj_name = get_obj_name; hw_data->get_obj_cfg_ae_mask = get_obj_cfg_ae_mask; hw_data->clock_frequency = ADF_C62X_AE_FREQ; hw_data->measure_clock = measure_clock; hw_data->get_ae_clock = get_ae_clock; hw_data->get_accel_cap = c62x_get_hw_cap; hw_data->reset_device = adf_reset_flr; hw_data->extended_dc_capabilities = 0; hw_data->get_storage_enabled = get_storage_enabled; hw_data->query_storage_cap = 1; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->storage_enable = 0; hw_data->get_fw_image_type = adf_cfg_get_fw_image_type; hw_data->config_device = adf_config_device; hw_data->get_ring_to_svc_map = adf_cfg_get_services_enabled; hw_data->set_asym_rings_mask = adf_cfg_set_asym_rings_mask; hw_data->ring_to_svc_map = ADF_DEFAULT_RING_TO_SRV_MAP; hw_data->pre_reset = adf_dev_pre_reset; hw_data->post_reset = adf_dev_post_reset; adf_gen2_init_hw_csr_info(&hw_data->csr_info); + adf_gen2_init_pf_pfvf_ops(&hw_data->csr_info.pfvf_ops); } void adf_clean_hw_data_c62x(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } diff --git a/sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c b/sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c index 59c53db3947a..419de4f98bef 100644 --- a/sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ b/sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c @@ -1,409 +1,394 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* Copyright(c) 2007-2022 Intel Corporation */ /* $FreeBSD$ */ #include "qat_freebsd.h" #include "adf_cfg.h" #include -#include +#include #include #include #include +#include #include "adf_dh895xcc_hw_data.h" #include "icp_qat_hw.h" #include "adf_heartbeat.h" /* Worker thread to service arbiter mappings based on dev SKUs */ static const u32 thrd_to_arb_map_sku4[] = { 0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666, 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }; static const u32 thrd_to_arb_map_sku6[] = { 0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666, 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222 }; static const u32 thrd_to_arb_map_sku3[] = { 0x00000888, 0x00000000, 0x00000888, 0x00000000, 0x00000888, 0x00000000, 0x00000888, 0x00000000, 0x00000888, 0x00000000, 0x00000888, 0x00000000 }; static u32 thrd_to_arb_map_gen[ADF_DH895XCC_MAX_ACCELENGINES] = { 0 }; static struct adf_hw_device_class dh895xcc_class = {.name = ADF_DH895XCC_DEVICE_NAME, .type = DEV_DH895XCC, .instances = 0 }; static u32 get_accel_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); return (~fuse) >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & ADF_DH895XCC_ACCELERATORS_MASK; } static u32 get_ae_mask(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 fuse; fuse = pci_read_config(pdev, ADF_DEVICE_FUSECTL_OFFSET, 4); return (~fuse) & ADF_DH895XCC_ACCELENGINES_MASK; } static uint32_t get_num_accels(struct adf_hw_device_data *self) { uint32_t i, ctr = 0; if (!self || !self->accel_mask) return 0; for (i = 0; i < ADF_DH895XCC_MAX_ACCELERATORS; i++) { if (self->accel_mask & (1 << i)) ctr++; } return ctr; } static uint32_t get_num_aes(struct adf_hw_device_data *self) { uint32_t i, ctr = 0; if (!self || !self->ae_mask) return 0; for (i = 0; i < ADF_DH895XCC_MAX_ACCELENGINES; i++) { if (self->ae_mask & (1 << i)) ctr++; } return ctr; } static uint32_t get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_DH895XCC_PMISC_BAR; } static uint32_t get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_DH895XCC_ETR_BAR; } static uint32_t get_sram_bar_id(struct adf_hw_device_data *self) { return ADF_DH895XCC_SRAM_BAR; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) >> ADF_DH895XCC_FUSECTL_SKU_SHIFT; switch (sku) { case ADF_DH895XCC_FUSECTL_SKU_1: return DEV_SKU_1; case ADF_DH895XCC_FUSECTL_SKU_2: return DEV_SKU_2; case ADF_DH895XCC_FUSECTL_SKU_3: return DEV_SKU_3; case ADF_DH895XCC_FUSECTL_SKU_4: return DEV_SKU_4; default: return DEV_SKU_UNKNOWN; } return DEV_SKU_UNKNOWN; } static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, u32 const **arb_map_config) { switch (accel_dev->accel_pci_dev.sku) { case DEV_SKU_1: adf_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map_sku4, thrd_to_arb_map_gen, ADF_DH895XCC_MAX_ACCELENGINES); *arb_map_config = thrd_to_arb_map_gen; break; case DEV_SKU_2: case DEV_SKU_4: adf_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map_sku6, thrd_to_arb_map_gen, ADF_DH895XCC_MAX_ACCELENGINES); *arb_map_config = thrd_to_arb_map_gen; break; case DEV_SKU_3: adf_cfg_gen_dispatch_arbiter(accel_dev, thrd_to_arb_map_sku3, thrd_to_arb_map_gen, ADF_DH895XCC_MAX_ACCELENGINES); *arb_map_config = thrd_to_arb_map_gen; break; default: device_printf(GET_DEV(accel_dev), "The configuration doesn't match any SKU"); *arb_map_config = NULL; } } -static uint32_t -get_pf2vf_offset(uint32_t i) -{ - return ADF_DH895XCC_PF2VF_OFFSET(i); -} - -static uint32_t -get_vintmsk_offset(uint32_t i) -{ - return ADF_DH895XCC_VINTMSK_OFFSET(i); -} - static void get_arb_info(struct arb_info *arb_csrs_info) { arb_csrs_info->arbiter_offset = ADF_DH895XCC_ARB_OFFSET; arb_csrs_info->wrk_thd_2_srv_arb_map = ADF_DH895XCC_ARB_WRK_2_SER_MAP_OFFSET; arb_csrs_info->wrk_cfg_offset = ADF_DH895XCC_ARB_WQCFG_OFFSET; } static void get_admin_info(struct admin_info *admin_csrs_info) { admin_csrs_info->mailbox_offset = ADF_DH895XCC_MAILBOX_BASE_OFFSET; admin_csrs_info->admin_msg_ur = ADF_DH895XCC_ADMINMSGUR_OFFSET; admin_csrs_info->admin_msg_lr = ADF_DH895XCC_ADMINMSGLR_OFFSET; } static void get_errsou_offset(u32 *errsou3, u32 *errsou5) { *errsou3 = ADF_DH895XCC_ERRSOU3; *errsou5 = ADF_DH895XCC_ERRSOU5; } static u32 get_clock_speed(struct adf_hw_device_data *self) { /* CPP clock is half high-speed clock */ return self->clock_frequency / 2; } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_DH895XCC_PMISC_BAR]; struct resource *csr = misc_bar->virt_addr; unsigned int val, i; unsigned int mask; /* Enable Accel Engine error detection & correction */ mask = hw_device->ae_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_DH895XCC_AE_CTX_ENABLES(i)); val |= ADF_DH895XCC_ENABLE_AE_ECC_ERR; ADF_CSR_WR(csr, ADF_DH895XCC_AE_CTX_ENABLES(i), val); val = ADF_CSR_RD(csr, ADF_DH895XCC_AE_MISC_CONTROL(i)); val |= ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR; ADF_CSR_WR(csr, ADF_DH895XCC_AE_MISC_CONTROL(i), val); } /* Enable shared memory error detection & correction */ mask = hw_device->accel_mask; for (i = 0; mask; i++, mask >>= 1) { if (!(mask & 1)) continue; val = ADF_CSR_RD(csr, ADF_DH895XCC_UERRSSMSH(i)); val |= ADF_DH895XCC_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_DH895XCC_UERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_DH895XCC_CERRSSMSH(i)); val |= ADF_DH895XCC_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_DH895XCC_CERRSSMSH(i), val); } } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { struct resource *addr; addr = (&GET_BARS(accel_dev)[ADF_DH895XCC_PMISC_BAR])->virt_addr; /* Enable bundle and misc interrupts */ ADF_CSR_WR(addr, ADF_DH895XCC_SMIAPF0_MASK_OFFSET, accel_dev->u1.pf.vf_info ? 0 : (1ULL << GET_MAX_BANKS(accel_dev)) - 1); ADF_CSR_WR(addr, ADF_DH895XCC_SMIAPF1_MASK_OFFSET, ADF_DH895XCC_SMIA1_MASK); } static u32 get_ae_clock(struct adf_hw_device_data *self) { /* * Clock update interval is <16> ticks for dh895xcc. */ return self->clock_frequency / 16; } static int get_storage_enabled(struct adf_accel_dev *accel_dev, u32 *storage_enabled) { char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; strlcpy(key, ADF_STORAGE_FIRMWARE_ENABLED, sizeof(key)); if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) { if (kstrtouint(val, 0, storage_enabled)) return -EFAULT; } return 0; } static u32 dh895xcc_get_hw_cap(struct adf_accel_dev *accel_dev) { device_t pdev = accel_dev->accel_pci_dev.pci_dev; u32 legfuses; u32 capabilities; /* Read accelerator capabilities mask */ legfuses = pci_read_config(pdev, ADF_DEVICE_LEGFUSE_OFFSET, 4); capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC + ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC + ICP_ACCEL_CAPABILITIES_CIPHER + ICP_ACCEL_CAPABILITIES_AUTHENTICATION + ICP_ACCEL_CAPABILITIES_COMPRESSION + ICP_ACCEL_CAPABILITIES_RAND + ICP_ACCEL_CAPABILITIES_HKDF + ICP_ACCEL_CAPABILITIES_ECEDMONT + ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN; if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN); if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; if (legfuses & ICP_ACCEL_MASK_PKE_SLICE) capabilities &= ~(ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_ECEDMONT); if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; return capabilities; } static const char * get_obj_name(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services service) { return ADF_DH895XCC_AE_FW_NAME_CUSTOM1; } static u32 get_objs_num(struct adf_accel_dev *accel_dev) { return 1; } static u32 get_obj_cfg_ae_mask(struct adf_accel_dev *accel_dev, enum adf_accel_unit_services services) { return accel_dev->hw_device->ae_mask; } void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) { hw_data->dev_class = &dh895xcc_class; hw_data->instance_id = dh895xcc_class.instances++; hw_data->num_banks = ADF_DH895XCC_ETR_MAX_BANKS; hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK; hw_data->num_accel = ADF_DH895XCC_MAX_ACCELERATORS; hw_data->num_logical_accel = 1; hw_data->num_engines = ADF_DH895XCC_MAX_ACCELENGINES; hw_data->tx_rx_gap = ADF_DH895XCC_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_DH895XCC_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->print_err_registers = adf_print_err_registers; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; - hw_data->get_pf2vf_offset = get_pf2vf_offset; - hw_data->get_vintmsk_offset = get_vintmsk_offset; hw_data->get_arb_info = get_arb_info; hw_data->get_admin_info = get_admin_info; hw_data->get_errsou_offset = get_errsou_offset; hw_data->get_clock_speed = get_clock_speed; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_sku = get_sku; hw_data->heartbeat_ctr_num = ADF_NUM_HB_CNT_PER_AE; hw_data->fw_name = ADF_DH895XCC_FW; hw_data->fw_mmp_name = ADF_DH895XCC_MMP; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->disable_iov = adf_disable_sriov; hw_data->send_admin_init = adf_send_admin_init; hw_data->init_arb = adf_init_gen2_arb; hw_data->exit_arb = adf_exit_arb; hw_data->get_arb_mapping = adf_get_arbiter_mapping; hw_data->enable_ints = adf_enable_ints; - hw_data->enable_vf2pf_comms = adf_pf_enable_vf2pf_comms; - hw_data->disable_vf2pf_comms = adf_pf_disable_vf2pf_comms; hw_data->reset_device = adf_reset_sbr; hw_data->restore_device = adf_dev_restore; - hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; hw_data->get_accel_cap = dh895xcc_get_hw_cap; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->get_objs_num = get_objs_num; hw_data->get_obj_name = get_obj_name; hw_data->get_obj_cfg_ae_mask = get_obj_cfg_ae_mask; hw_data->clock_frequency = ADF_DH895XCC_AE_FREQ; hw_data->extended_dc_capabilities = 0; hw_data->get_storage_enabled = get_storage_enabled; hw_data->query_storage_cap = 1; hw_data->get_heartbeat_status = adf_get_heartbeat_status; hw_data->get_ae_clock = get_ae_clock; hw_data->storage_enable = 0; hw_data->get_fw_image_type = adf_cfg_get_fw_image_type; hw_data->config_device = adf_config_device; hw_data->get_ring_to_svc_map = adf_cfg_get_services_enabled; hw_data->set_asym_rings_mask = adf_cfg_set_asym_rings_mask; hw_data->ring_to_svc_map = ADF_DEFAULT_RING_TO_SRV_MAP; hw_data->pre_reset = adf_dev_pre_reset; hw_data->post_reset = adf_dev_post_reset; adf_gen2_init_hw_csr_info(&hw_data->csr_info); + adf_gen2_init_pf_pfvf_ops(&hw_data->csr_info.pfvf_ops); } void adf_clean_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } diff --git a/sys/modules/qat/qat_api/Makefile b/sys/modules/qat/qat_api/Makefile index 70886968ab56..810c67afdf6d 100644 --- a/sys/modules/qat/qat_api/Makefile +++ b/sys/modules/qat/qat_api/Makefile @@ -1,76 +1,80 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2007-2022 Intel Corporation # $FreeBSD$ .PATH: ${SRCTOP}/sys/dev/qat/qat_api KMOD= qat_api SRCS+= freebsd_module.c SRCS+= common/compression/dc_datapath.c SRCS+= common/compression/dc_header_footer.c SRCS+= common/compression/dc_session.c SRCS+= common/compression/dc_stats.c SRCS+= common/compression/dc_buffers.c SRCS+= common/compression/dc_dp.c SRCS+= common/compression/icp_sal_dc_err.c +SRCS+= common/compression/dc_chain.c +SRCS+= common/compression/dc_ns_datapath.c +SRCS+= common/compression/dc_ns_header_footer.c SRCS+= common/utils/lac_buffer_desc.c SRCS+= common/utils/lac_mem.c SRCS+= common/utils/lac_mem_pools.c SRCS+= common/utils/lac_sync.c SRCS+= common/utils/sal_service_state.c SRCS+= common/utils/sal_statistics.c SRCS+= common/utils/sal_string_parse.c SRCS+= common/utils/sal_versions.c SRCS+= common/utils/sal_user_process.c SRCS+= common/ctrl/sal_list.c SRCS+= common/ctrl/sal_compression.c SRCS+= common/ctrl/sal_ctrl_services.c SRCS+= common/ctrl/sal_create_services.c SRCS+= common/ctrl/sal_crypto.c +SRCS+= common/ctrl/sal_get_instances.c SRCS+= common/qat_comms/sal_qat_cmn_msg.c SRCS+= common/crypto/sym/lac_sym_api.c SRCS+= common/crypto/sym/lac_sym_cb.c SRCS+= common/crypto/sym/lac_sym_queue.c SRCS+= common/crypto/sym/lac_sym_cipher.c SRCS+= common/crypto/sym/lac_sym_alg_chain.c SRCS+= common/crypto/sym/lac_sym_auth_enc.c SRCS+= common/crypto/sym/lac_sym_hash.c SRCS+= common/crypto/sym/lac_sym_hash_sw_precomputes.c SRCS+= common/crypto/sym/lac_sym_stats.c SRCS+= common/crypto/sym/lac_sym_compile_check.c SRCS+= common/crypto/sym/lac_sym_partial.c SRCS+= common/crypto/sym/lac_sym_dp.c SRCS+= common/crypto/sym/qat/lac_sym_qat.c SRCS+= common/crypto/sym/qat/lac_sym_qat_hash.c SRCS+= common/crypto/sym/qat/lac_sym_qat_hash_defs_lookup.c SRCS+= common/crypto/sym/qat/lac_sym_qat_cipher.c SRCS+= common/crypto/sym/qat/lac_sym_qat_constants_table.c SRCS+= common/crypto/sym/qat/lac_sym_qat_key.c SRCS+= common/crypto/sym/key/lac_sym_key.c SRCS+= common/stubs/lac_stubs.c SRCS+= device/dev_info.c SRCS+= qat_kernel/src/lac_adf_interface_freebsd.c SRCS+= qat_kernel/src/qat_transport.c SRCS+= qat_kernel/src/lac_symbols.c SRCS+= qat_utils/src/QatUtilsServices.c SRCS+= qat_utils/src/QatUtilsSemaphore.c SRCS+= qat_utils/src/QatUtilsSpinLock.c SRCS+= qat_utils/src/QatUtilsAtomic.c SRCS+= qat_utils/src/QatUtilsCrypto.c SRCS+= bus_if.h cryptodev_if.h device_if.h pci_if.h vnode_if.h CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/include/lac CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/include/dc CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/qat_direct/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/qat_utils/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/common/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/common/compression/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/common/crypto/sym/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/firmware/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/include/common CFLAGS+= ${LINUXKPI_INCLUDES} .include CWARNFLAGS+= -Wno-cast-qual diff --git a/sys/modules/qat/qat_common/Makefile b/sys/modules/qat/qat_common/Makefile index 22ea235fdce6..e37ab2ddf006 100644 --- a/sys/modules/qat/qat_common/Makefile +++ b/sys/modules/qat/qat_common/Makefile @@ -1,31 +1,33 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2007-2022 Intel Corporation # $FreeBSD$ .PATH: ${SRCTOP}/sys/dev/qat/qat_common KMOD= qat_common SRCS+= adf_accel_engine.c adf_freebsd_admin.c adf_aer.c adf_cfg.c qat_common_module.c SRCS+= adf_heartbeat.c adf_freebsd_heartbeat_dbg.c -SRCS+= adf_dev_mgr.c adf_hw_arbiter.c +SRCS+= adf_freebsd_dev_processes.c adf_freebsd_uio.c adf_freebsd_uio_cleanup.c +SRCS+= adf_ctl_drv.c adf_dev_mgr.c adf_hw_arbiter.c SRCS+= adf_init.c adf_transport.c adf_isr.c adf_fw_counters.c adf_dev_err.c SRCS+= adf_gen2_hw_data.c SRCS+= adf_gen4_hw_data.c SRCS+= qat_freebsd.c SRCS+= adf_freebsd_cfg_dev_dbg.c adf_freebsd_ver_dbg.c -SRCS+= adf_cfg_device.c adf_cfg_section.c adf_cfg_instance.c adf_cfg_bundle.c +SRCS+= adf_cfg_device.c adf_cfg_section.c adf_cfg_instance.c adf_cfg_bundle.c adf_cfg_sysctl.c SRCS+= qat_hal.c qat_uclo.c -SRCS+= adf_vf_isr.c adf_pf2vf_msg.c -SRCS+= adf_vf2pf_msg.c -SRCS+= adf_pf2vf_capabilities.c -SRCS+= adf_pf2vf_ring_to_svc_map.c +SRCS+= adf_vf_isr.c +SRCS+= adf_gen4_pfvf.c +SRCS+= adf_gen4_timer.c +SRCS+= adf_pfvf_utils.c adf_pfvf_vf_msg.c adf_pfvf_vf_proto.c +SRCS+= adf_gen4vf_hw_csr_data.c SRCS+= adf_freebsd_transport_debug.c adf_clock.c SRCS+= adf_freebsd_cnvnr_ctrs_dbg.c SRCS+= adf_freebsd_pfvf_ctrs_dbg.c SRCS+= bus_if.h device_if.h pci_if.h vnode_if.h CFLAGS+= -I${SRCTOP}/sys/dev/qat/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/include/common CFLAGS+= ${LINUXKPI_INCLUDES} .include diff --git a/sys/modules/qat/qat_hw/Makefile b/sys/modules/qat/qat_hw/Makefile index 40c1d26b4687..8816a4bee83d 100644 --- a/sys/modules/qat/qat_hw/Makefile +++ b/sys/modules/qat/qat_hw/Makefile @@ -1,28 +1,29 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2007-2022 Intel Corporation # $FreeBSD$ .PATH: ${SRCTOP}/sys/dev/qat/qat_hw KMOD= qat_hw SRCS+= qat_c62x/adf_c62x_hw_data.c qat_c62x/adf_drv.c SRCS+= qat_200xx/adf_200xx_hw_data.c qat_200xx/adf_drv.c SRCS+= qat_4xxx/adf_4xxx_hw_data.c qat_4xxx/adf_drv.c +SRCS+= qat_4xxxvf/adf_4xxxvf_hw_data.c qat_4xxxvf/adf_drv.c SRCS+= qat_c3xxx/adf_c3xxx_hw_data.c qat_c3xxx/adf_drv.c SRCS+= qat_dh895xcc/adf_dh895xcc_hw_data.c qat_dh895xcc/adf_drv.c SRCS+= qat_c4xxx/adf_c4xxx_hw_data.c qat_c4xxx/adf_drv.c qat_c4xxx/adf_c4xxx_ae_config.c qat_c4xxx/adf_c4xxx_misc_error_stats.c SRCS+= qat_c4xxx/adf_c4xxx_pke_replay_stats.c qat_c4xxx/adf_c4xxx_ras.c qat_c4xxx/adf_c4xxx_res_part.c SRCS+= qat_c4xxx/adf_c4xxx_reset.c SRCS+= device_if.h bus_if.h vnode_if.h pci_if.h cryptodev_if.h CFLAGS+= ${LINUXKPI_INCLUDES} CFLAGS+= -I${SRCTOP}/sys/dev/qat/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/include/common CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/common/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/include/lac CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/qat_utils/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/qat_direct/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/firmware/include CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/common/crypto/sym/include .include