U-Boot 2014.01 (Apr 16 2014 - 18:20:12)

CPU  : OMAP4460 ES1.1
Board: OMAP4 Panda
I2C:   ready
DRAM:  1 GiB
WARNING: Caches not enabled
MMC:   OMAP SD/MMC: 0
Using default environment

Net:   No ethernet found.
Hit any key to stop autoboot:  0
reading ubldr
** Unable to read file ubldr **
## No elf image at address 0x88000000
U-Boot# fatload mmc 0:1 0x80200000 kernel
reading kernel
6758925 bytes read in 564 ms (11.4 MiB/s)
U-Boot# go 0x80200100
## Starting application at 0x80200100 ...
KDB: debugger backends: ddb
KDB: current backend: ddb
Copyright (c) 1992-2015 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
        The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 11.0-CURRENT #3 1fdc507(master)-dirty: Thu Apr 16 14:03:40 CEST 2015
FreeBSD clang version 3.6.0 (tags/RELEASE_360/final 230434) 20150225
CPU: Cortex A9-r2 rev 10 (Cortex-A core)
 Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
 WB disabled EABT branch prediction enabled
LoUU:2 LoC:2 LoUIS:2
Cache level 1:
 32KB/32B 4-way data cache WB Read-Alloc Write-Alloc
 32KB/32B 4-way instruction cache Read-Alloc
real memory  = 1073741824 (1024 MB)
avail memory = 1042345984 (994 MB)
Texas Instruments OMAP4460 Processor, Revision ES1.1
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
random: entropy device infrastructure driver
random: selecting highest priority adaptor <Dummy>
random: SOFT: yarrow init()
random: selecting highest priority adaptor <Yarrow>
ofwbus0: <Open Firmware Device Tree>
simplebus0: <Flattened device tree simple bus> mem 0x44000000-0x44000fff,0x44800000-0x44801fff,0x45000000-0x45000fff irq 41,42 on of
wbus0
ignoring unsupported trigger/polarity configuration 0x03
ignoring unsupported trigger/polarity configuration 0x03
ignoring unsupported trigger/polarity configuration 0x03
l2cache0: <PL310 L2 cache controller> mem 0x48242000-0x48242fff on ofwbus0
l2cache0: cannot allocate IRQ, not using interrupt
l2cache0: Part number: 0x3, release: 0x7
l2cache0: L2 Cache enabled: 1024KB/32B 16 ways
gic0: <ARM Generic Interrupt Controller> mem 0x48241000-0x48241fff,0x48240100-0x482401ff on ofwbus0
gic0: pn 0x390, arch 0x1, rev 0x2, implementer 0x43b irqs 160
omap4_prcm0: <TI OMAP Power, Reset and Clock Management (C1)> mem 0x4a004000-0x4a005fff on simplebus0
omap4_prcm1: <TI OMAP Power, Reset and Clock Management (PRM)> mem 0x4a306000-0x4a308fff irq 43 on simplebus0
omap4_prcm2: <TI OMAP Power, Reset and Clock Management (C2)> mem 0x4a008000-0x4a00afff on simplebus0
mp_tmr0: <ARM MPCore Timers> mem 0x48240600-0x4824061f irq 29 on ofwbus0
Event timer "MPCore" frequency 349988571 Hz quality 1000
mp_tmr1: <ARM MPCore Timers> mem 0x48240200-0x4824021f irq 27 on simplebus0
Timecounter "MPCore" frequency 349988571 Hz quality 800
ti_pinmux0: <TI Pinmux Module> mem 0x4a100040-0x4a1001d5 on simplebus0
ti_pinmux1: <TI Pinmux Module> mem 0x4a31e040-0x4a31e077 on simplebus0
device_attach: ti_pinmux1 attach returned 6
ti_scm0: <TI Control Module> mem 0x4a1005a0-0x4a10070f on simplebus0
ti_sdma0: <TI sDMA Controller> mem 0x4a056000-0x4a056fff irq 44,45,46,47 on simplebus0
ti_sdma0: sDMA revision 00010900
gpio0: <Ti OMAP4 General Purpose I/O (GPIO)> mem 0x4a310000-0x4a3101ff irq 61 on simplebus0
gpiobus0: <OFW GPIO bus> on gpio0
gpioled0: <GPIO led> at pin(s) 8 on gpiobus0
gpioc0: <GPIO controller> on gpio0
gpio1: <Ti OMAP4 General Purpose I/O (GPIO)> mem 0x48055000-0x480551ff irq 62 on simplebus0
gpiobus1: <OFW GPIO bus> on gpio1
gpioc1: <GPIO controller> on gpio1
gpio2: <Ti OMAP4 General Purpose I/O (GPIO)> mem 0x48057000-0x480571ff irq 63 on simplebus0
gpiobus2: <OFW GPIO bus> on gpio2
gpioc2: <GPIO controller> on gpio2
gpio3: <Ti OMAP4 General Purpose I/O (GPIO)> mem 0x48059000-0x480591ff irq 64 on simplebus0
gpiobus3: <OFW GPIO bus> on gpio3
gpioled1: <GPIO led> at pin(s) 14 on gpiobus3
gpioc3: <GPIO controller> on gpio3
gpio4: <Ti OMAP4 General Purpose I/O (GPIO)> mem 0x4805b000-0x4805b1ff irq 65 on simplebus0
gpiobus4: <OFW GPIO bus> on gpio4
gpioc4: <GPIO controller> on gpio4
gpio5: <Ti OMAP4 General Purpose I/O (GPIO)> mem 0x4805d000-0x4805d1ff irq 66 on simplebus0
gpiobus5: <OFW GPIO bus> on gpio5
gpioc5: <GPIO controller> on gpio5
uart0: <TI UART (16550 compatible)> mem 0x4806a000-0x4806a0ff irq 104 on simplebus0
uart1: <TI UART (16550 compatible)> mem 0x4806c000-0x4806c0ff irq 105,1616551635 on simplebus0
uart2: <TI UART (16550 compatible)> mem 0x48020000-0x480200ff irq 106,-530997549 on simplebus0
uart2: console (115384,n,8,1)
uart3: <TI UART (16550 compatible)> mem 0x4806e000-0x4806e0ff irq 102,542744275 on simplebus0
iichb0: <TI I2C Controller> mem 0x48070000-0x480700ff irq 88 on simplebus0
iichb0: I2C revision 4.0 FIFO size: 16 bytes
iicbus0: <OFW I2C bus> on iichb0
iic0: <I2C generic I/O> on iicbus0
twl0: <TI TWL6030 Companion IC> at addr 0x48 on iicbus0
twl_vreg0: <TI TWL6025/TWL6030 PMIC Voltage Regulators> on twl0
twl_clks0: <TI TWL6025/TWL6030 PMIC External Clocks> on twl0
iicbus0: <unknown card> at addr 0x4b
iichb1: <TI I2C Controller> mem 0x48072000-0x480720ff irq 89 on simplebus0
iichb1: I2C revision 4.0 FIFO size: 16 bytes
iicbus1: <OFW I2C bus> on iichb1
iic1: <I2C generic I/O> on iicbus1
iichb2: <TI I2C Controller> mem 0x48060000-0x480600ff irq 93 on simplebus0
iichb2: I2C revision 4.0 FIFO size: 16 bytes
iicbus2: <OFW I2C bus> on iichb2
iic2: <I2C generic I/O> on iicbus2
iicbus2: <unknown card> at addr 0x50
iichb3: <TI I2C Controller> mem 0x48350000-0x483500ff irq 94 on simplebus0
iichb3: I2C revision 4.0 FIFO size: 16 bytes
iicbus3: <OFW I2C bus> on iichb3
iic3: <I2C generic I/O> on iicbus3
sdhci_ti0: <TI MMCHS (SDHCI 2.0)> mem 0x4809c000-0x4809c3ff irq 115 on simplebus0
mmc0: <MMC/SD bus> on sdhci_ti0
omap_tll0: <TI OMAP USB 2.0 TLL module> mem 0x4a062000-0x4a062fff irq 110 on simplebus0
omap_uhh0: <TI OMAP USB 2.0 Host module> mem 0x4a064000-0x4a0647ff on simplebus0
omap_uhh0: UHH revision 0x50700100
omap_uhh0: OMAP_UHH_SYSCONFIG: 0x00000014
omap_uhh0: UHH setup done, uhh_hostconfig=0x8000001c
ehci0: <TI OMAP USB 2.0 controller> mem 0x4a064c00-0x4a064fff irq 109 on omap_uhh0
ehci0: Starting TI EHCI USB Controller
ehci0: PHY reset operation timed out
usbus0: EHCI version 1.0
usbus0 on ehci0
Timecounters tick every 10.000 msec
usbus0: 480Mbps High Speed USB v2.0
ugen0.1: <Texas Instruments> at usbus0
uhub0: <Texas Instruments EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
mmcsd0: 2GB <SD SA02G 0.4 SN 9C487077 MFG 11/2009 by 2 TM> at mmc0 24.0MHz/4bit/65535-block
random: unblocking device.
Release APs
Root mount waiting for: usbus0
Root mount waiting for: usbus0
uhub0: 3 ports with 3 removable, self powered
Root mount waiting for: usbus0
ugen0.2: <vendor 0x0424> at usbus0
uhub1: <vendor 0x0424 product 0x9514, class 9/0, rev 2.00/2.00, addr 2> on usbus0
uhub1: MTT enabled
Root mount waiting for: usbus0
uhub1: 5 ports with 4 removable, self powered
ugen0.3: <vendor 0x0424> at usbus0
smsc0: <vendor 0x0424 product 0xec00, rev 2.00/2.00, addr 3> on usbus0
Root mount waiting for: usbus0
smsc0: chip 0xec00, rev. 0002
miibus0: <MII bus> on smsc0
ukphy0: <Generic IEEE 802.3u media interface> PHY 1 on miibus0
ukphy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ue0: <USB Ethernet> on smsc0
ue0: Ethernet address: ea:94:f0:b5:42:d4
Root mount waiting for: usbus0
Root mount waiting for: usbus0
Root mount waiting for: usbus0
ugen0.4: <ADATA> at usbus0
umass0: <ADATA HD710, class 0/0, rev 2.10/1.00, addr 4> on usbus0
umass0:  SCSI over Bulk-Only; quirks = 0xc100
umass0:0:0: Attached to scbus0

Loader variables:

Manual root filesystem specification:
  <fstype>:<device> [options]
      Mount <device> using filesystem <fstype>
      and with the specified (optional) option list.

    eg. ufs:/dev/da0s1a
        zfs:tank
        cd9660:/dev/acd0 ro
          (which is equivalent to: mount -t cd9660 -o ro /dev/acd0 /)

  ?               List valid disk boot devices
  .               Yield 1 second (for background tasks)
  <empty line>    Abort manual input

mountroot>