diff --git a/lib/libc/riscv/gen/flt_rounds.c b/lib/libc/riscv/gen/flt_rounds.c index 5d3771ea6cd3..bccd7d8baa44 100644 --- a/lib/libc/riscv/gen/flt_rounds.c +++ b/lib/libc/riscv/gen/flt_rounds.c @@ -1,69 +1,59 @@ /*- * Copyright (c) 2015-2016 Ruslan Bukin * All rights reserved. * * Portions of this software were developed by SRI International and the * University of Cambridge Computer Laboratory under DARPA/AFRL contract * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. * * Portions of this software were developed by the University of Cambridge * Computer Laboratory as part of the CTSRD Project, with support from the * UK Higher Education Innovation Fund (HEIF). * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include #include #include -#ifdef __riscv_float_abi_soft -#include "softfloat-for-gcc.h" -#include "milieu.h" -#include "softfloat.h" -#endif - int __flt_rounds(void) { uint64_t mode; -#ifdef __riscv_float_abi_soft - mode = __softfloat_float_rounding_mode; -#else __asm __volatile("csrr %0, fcsr" : "=r" (mode)); -#endif switch (mode & _ROUND_MASK) { case FE_TOWARDZERO: return (0); case FE_TONEAREST: return (1); case FE_UPWARD: return (2); case FE_DOWNWARD: return (3); } return (-1); } diff --git a/lib/msun/riscv/Symbol.map b/lib/msun/riscv/Symbol.map index c3d72443cb2c..65157d0de9c1 100644 --- a/lib/msun/riscv/Symbol.map +++ b/lib/msun/riscv/Symbol.map @@ -1,13 +1,12 @@ FBSD_1.3 { fesetexceptflag; feraiseexcept; fegetenv; feholdexcept; feupdateenv; - fegetexcept; }; FBSD_1.8 { feenableexcept; fedisableexcept; }; diff --git a/lib/msun/riscv/fenv.c b/lib/msun/riscv/fenv.c index 9d7ae3d3fdaf..a4dde02a6ddc 100644 --- a/lib/msun/riscv/fenv.c +++ b/lib/msun/riscv/fenv.c @@ -1,61 +1,53 @@ /*- * Copyright (c) 2004 David Schultz * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #define __fenv_static #include "fenv.h" #ifdef __GNUC_GNU_INLINE__ #error "This file must be compiled with C99 'inline' semantics" #endif /* * Hopefully the system ID byte is immutable, so it's valid to use * this as a default environment. */ const fenv_t __fe_dfl_env = 0; -#ifdef __riscv_float_abi_soft -#define __set_env(env, flags, mask, rnd) env = ((flags) | (rnd) << 5) -#define __env_flags(env) ((env) & FE_ALL_EXCEPT) -#define __env_mask(env) (0) /* No exception traps. */ -#define __env_round(env) (((env) >> 5) & _ROUND_MASK) -#include "fenv-softfloat.h" -#endif - extern inline int feclearexcept(int __excepts); extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts); extern inline int fesetexceptflag(const fexcept_t *__flagp, int __excepts); extern inline int feraiseexcept(int __excepts); extern inline int fetestexcept(int __excepts); extern inline int fegetround(void); extern inline int fesetround(int __round); extern inline int fegetenv(fenv_t *__envp); extern inline int feholdexcept(fenv_t *__envp); extern inline int fesetenv(const fenv_t *__envp); extern inline int feupdateenv(const fenv_t *__envp); extern inline int feenableexcept(int __mask); extern inline int fedisableexcept(int __mask); extern inline int fegetexcept(void); diff --git a/lib/msun/riscv/fenv.h b/lib/msun/riscv/fenv.h index 36abb7b00b7d..cc50f0659248 100644 --- a/lib/msun/riscv/fenv.h +++ b/lib/msun/riscv/fenv.h @@ -1,257 +1,231 @@ /*- * Copyright (c) 2004-2005 David Schultz * Copyright (c) 2015-2016 Ruslan Bukin * All rights reserved. * * Portions of this software were developed by SRI International and the * University of Cambridge Computer Laboratory under DARPA/AFRL contract * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. * * Portions of this software were developed by the University of Cambridge * Computer Laboratory as part of the CTSRD Project, with support from the * UK Higher Education Innovation Fund (HEIF). * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #ifndef _FENV_H_ #define _FENV_H_ #include #ifndef __fenv_static #define __fenv_static static #endif typedef __uint64_t fenv_t; typedef __uint64_t fexcept_t; /* Exception flags */ #define FE_INVALID 0x0010 #define FE_DIVBYZERO 0x0008 #define FE_OVERFLOW 0x0004 #define FE_UNDERFLOW 0x0002 #define FE_INEXACT 0x0001 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) /* * RISC-V Rounding modes */ #define _ROUND_SHIFT 5 #define FE_TONEAREST (0x00 << _ROUND_SHIFT) #define FE_TOWARDZERO (0x01 << _ROUND_SHIFT) #define FE_DOWNWARD (0x02 << _ROUND_SHIFT) #define FE_UPWARD (0x03 << _ROUND_SHIFT) #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ FE_UPWARD | FE_TOWARDZERO) __BEGIN_DECLS /* Default floating-point environment */ extern const fenv_t __fe_dfl_env; #define FE_DFL_ENV (&__fe_dfl_env) -#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double) -#if defined(__riscv_float_abi_single) -#error single precision floating point ABI not supported -#else -#error compiler did not set soft/hard float macros -#endif +#ifndef __riscv_float_abi_double +#error only double hard float ABI supported #endif -#ifndef __riscv_float_abi_soft #define __rfs(__fcsr) __asm __volatile("csrr %0, fcsr" : "=r" (__fcsr)) #define __wfs(__fcsr) __asm __volatile("csrw fcsr, %0" :: "r" (__fcsr)) -#endif -#ifdef __riscv_float_abi_soft -int feclearexcept(int __excepts); -int fegetexceptflag(fexcept_t *__flagp, int __excepts); -int fesetexceptflag(const fexcept_t *__flagp, int __excepts); -int feraiseexcept(int __excepts); -int fetestexcept(int __excepts); -int fegetround(void); -int fesetround(int __round); -int fegetenv(fenv_t *__envp); -int feholdexcept(fenv_t *__envp); -int fesetenv(const fenv_t *__envp); -int feupdateenv(const fenv_t *__envp); -#else __fenv_static inline int feclearexcept(int __excepts) { __asm __volatile("csrc fflags, %0" :: "r"(__excepts)); return (0); } __fenv_static inline int fegetexceptflag(fexcept_t *__flagp, int __excepts) { fexcept_t __fcsr; __rfs(__fcsr); *__flagp = __fcsr & __excepts; return (0); } __fenv_static inline int fesetexceptflag(const fexcept_t *__flagp, int __excepts) { fexcept_t __fcsr; __fcsr = *__flagp; __asm __volatile("csrc fflags, %0" :: "r"(__excepts)); __asm __volatile("csrs fflags, %0" :: "r"(__fcsr & __excepts)); return (0); } __fenv_static inline int feraiseexcept(int __excepts) { __asm __volatile("csrs fflags, %0" :: "r"(__excepts)); return (0); } __fenv_static inline int fetestexcept(int __excepts) { fexcept_t __fcsr; __rfs(__fcsr); return (__fcsr & __excepts); } __fenv_static inline int fegetround(void) { fexcept_t __fcsr; __rfs(__fcsr); return (__fcsr & _ROUND_MASK); } __fenv_static inline int fesetround(int __round) { fexcept_t __fcsr; if (__round & ~_ROUND_MASK) return (-1); __rfs(__fcsr); __fcsr &= ~_ROUND_MASK; __fcsr |= __round; __wfs(__fcsr); return (0); } __fenv_static inline int fegetenv(fenv_t *__envp) { __rfs(*__envp); return (0); } __fenv_static inline int feholdexcept(fenv_t *__envp __unused) { /* No exception traps. */ return (-1); } __fenv_static inline int fesetenv(const fenv_t *__envp) { __wfs(*__envp); return (0); } __fenv_static inline int feupdateenv(const fenv_t *__envp) { fexcept_t __fcsr; __rfs(__fcsr); __wfs(*__envp); feraiseexcept(__fcsr & FE_ALL_EXCEPT); return (0); } -#endif /* !__riscv_float_abi_soft */ #if __BSD_VISIBLE -#ifdef __riscv_float_abi_soft -int feenableexcept(int __mask); -int fedisableexcept(int __mask); -int fegetexcept(void); -#else __fenv_static inline int feenableexcept(int __mask __unused) { /* No exception traps. */ return (0); } __fenv_static inline int fedisableexcept(int __mask __unused) { /* No exception traps. */ return (0); } /* We currently provide no external definition of fegetexcept(). */ static inline int fegetexcept(void) { /* No exception traps. */ return (0); } -#endif /* !__riscv_float_abi_soft */ #endif /* __BSD_VISIBLE */ __END_DECLS #endif /* !_FENV_H_ */