Index: sys/arm64/arm64/locore.S
===================================================================
--- sys/arm64/arm64/locore.S
+++ sys/arm64/arm64/locore.S
@@ -118,6 +118,9 @@
 	/* Enable the mmu */
 	bl	start_mmu
 
+	/* Load the new ttbr0 pagetable */
+	adr	x27, pagetable_l0_ttbr0
+
 	/* Jump to the virtual address space */
 	ldr	x15, .Lvirtdone
 	br	x15
@@ -128,6 +131,15 @@
 	mov	sp, x25
 	sub	sp, sp, #PCB_SIZE
 
+	/* Load the kernel ttbr0 pagetable */
+	msr	ttbr0_el1, x27
+	isb
+
+	/* Invalidate the TLB */
+	tlbi	vmalle1
+	dsb	sy
+	isb
+
 	/* Zero the BSS */
 	ldr	x15, .Lbss
 	ldr	x14, .Lend
@@ -193,11 +205,14 @@
 	/* Load the kernel page table */
 	adr	x24, pagetable_l0_ttbr1
 	/* Load the identity page table */
-	adr	x27, pagetable_l0_ttbr0
+	adr	x27, pagetable_l0_ttbr0_boostrap
 
 	/* Enable the mmu */
 	bl	start_mmu
 
+	/* Load the new ttbr0 pagetable */
+	adr	x27, pagetable_l0_ttbr0
+
 	/* Jump to the virtual address space */
 	ldr	x15, =mp_virtdone
 	br	x15
@@ -208,6 +223,15 @@
 	mul	x5, x0, x5
 	add	sp, x4, x5
 
+	/* Load the kernel ttbr0 pagetable */
+	msr	ttbr0_el1, x27
+	isb
+
+	/* Invalidate the TLB */
+	tlbi	vmalle1
+	dsb	sy
+	isb
+
 	b	init_secondary
 END(mpentry)
 #endif
@@ -682,10 +706,13 @@
 	//.section .init_pagetable
 	.align 12 /* 4KiB aligned */
 	/*
-	 * 3 initial tables (in the following order):
+	 * 6 initial tables (in the following order):
 	 *           L2 for kernel (High addresses)
 	 *           L1 for kernel
-	 *           L1 for user   (Low addresses)
+	 *           L0 for kernel
+	 *           L1 bootstrap for user   (Low addresses)
+	 *           L0 bootstrap for user
+	 *           L0 for user
 	 */
 pagetable:
 	.space	PAGE_SIZE
@@ -693,7 +720,9 @@
 	.space	PAGE_SIZE
 pagetable_l0_ttbr1:
 	.space	PAGE_SIZE
-pagetable_l1_ttbr0:
+pagetable_l1_ttbr0_bootstrap:
+	.space	PAGE_SIZE
+pagetable_l0_ttbr0_boostrap:
 	.space	PAGE_SIZE
 pagetable_l0_ttbr0:
 	.space	PAGE_SIZE