diff --git a/sys/dev/ixgbe/ixgbe_common.c b/sys/dev/ixgbe/ixgbe_common.c
--- a/sys/dev/ixgbe/ixgbe_common.c
+++ b/sys/dev/ixgbe/ixgbe_common.c
@@ -4631,11 +4631,11 @@
 	/* Setting this bit tells the ARC that a new command is pending. */
 	IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C);
 
-	for (i = 0; i < timeout; i++) {
+	for (i = 0; i < timeout * 1000; i++) {
 		hicr = IXGBE_READ_REG(hw, IXGBE_HICR);
 		if (!(hicr & IXGBE_HICR_C))
 			break;
-		msec_delay(1);
+		usec_delay(1);
 	}
 
 	/* For each command except "Apply Update" perform
diff --git a/sys/dev/ixgbe/ixgbe_x540.c b/sys/dev/ixgbe/ixgbe_x540.c
--- a/sys/dev/ixgbe/ixgbe_x540.c
+++ b/sys/dev/ixgbe/ixgbe_x540.c
@@ -878,7 +878,21 @@
 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);
 
 	ixgbe_release_swfw_sync_semaphore(hw);
-	msec_delay(2);
+
+	/*
+	 * EEPROM / flash access requires a 2ms sleep or interacting with
+	 * them isn't stable.  However, a 2ms delay for all sync operations
+	 * is very expensive for MDIO access.
+	 *
+	 * So use a 10us delay for PHY0/PHY1 MDIO and management access and
+	 * 2ms for everything else.  This keep MDIO access (eg from a switch
+	 * driver) fast.
+	 */
+	if (mask &
+	    (IXGBE_GSSR_PHY0_SM | IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_SW_MNG_SM))
+		usec_delay(10);
+	else
+		usec_delay(2000);
 }
 
 /**