diff --git a/sys/dev/thunderbolt/nhi_pci.c b/sys/dev/thunderbolt/nhi_pci.c --- a/sys/dev/thunderbolt/nhi_pci.c +++ b/sys/dev/thunderbolt/nhi_pci.c @@ -109,6 +109,10 @@ "Thunderbolt 3 NHI Port 0 (IceLake)" }, { VENDOR_INTEL, DEVICE_ICL_NHI_1, 0xffff, 0xffff, NHI_TYPE_ICL, "Thunderbolt 3 NHI Port 1 (IceLake)" }, + { VENDOR_INTEL, DEVICE_TR_2C_NHI, 0xffff, 0xffff, NHI_TYPE_TR, + "Thunderbolt 3 NHI (Titan Ridge 2C)" }, + { VENDOR_INTEL, DEVICE_TR_4C_NHI, 0xffff, 0xffff, NHI_TYPE_TR, + "Thunderbolt 3 NHI (Titan Ridge 4C)" }, { VENDOR_AMD, DEVICE_PINK_SARDINE_0, 0xffff, 0xffff, NHI_TYPE_USB4, "USB4 NHI Port 0 (Pink Sardine)" }, { VENDOR_AMD, DEVICE_PINK_SARDINE_1, 0xffff, 0xffff, NHI_TYPE_USB4, diff --git a/sys/dev/thunderbolt/nhi_reg.h b/sys/dev/thunderbolt/nhi_reg.h --- a/sys/dev/thunderbolt/nhi_reg.h +++ b/sys/dev/thunderbolt/nhi_reg.h @@ -49,7 +49,8 @@ #define DEVICE_AR_LP_NHI 0x15bf #define DEVICE_ICL_NHI_0 0x8a17 #define DEVICE_ICL_NHI_1 0x8a0d - +#define DEVICE_TR_2C_NHI 0x15e8 +#define DEVICE_TR_4C_NHI 0x15eb #define VENDOR_AMD 0x1022 #define DEVICE_PINK_SARDINE_0 0x1668 #define DEVICE_PINK_SARDINE_1 0x1669 diff --git a/sys/dev/thunderbolt/tb_pcib.h b/sys/dev/thunderbolt/tb_pcib.h --- a/sys/dev/thunderbolt/tb_pcib.h +++ b/sys/dev/thunderbolt/tb_pcib.h @@ -83,6 +83,8 @@ #define TB_DEV_AR_C_2C 0x15da #define TB_DEV_ICL_0 0x8a1d #define TB_DEV_ICL_1 0x8a21 +#define TB_DEV_TR_2C 0x15e7 +#define TB_DEV_TR_4C 0x15ea #define TB_PCIB_VSEC(dev) ((struct tb_pcib_softc *)(device_get_softc(dev)))->vsec; #define TB_DESC_MAX 80 diff --git a/sys/dev/thunderbolt/tb_pcib.c b/sys/dev/thunderbolt/tb_pcib.c --- a/sys/dev/thunderbolt/tb_pcib.c +++ b/sys/dev/thunderbolt/tb_pcib.c @@ -102,6 +102,10 @@ "Thunderbolt 3 PCI-PCI Bridge (IceLake)" }, { VENDOR_INTEL, TB_DEV_ICL_1, 0xffff, 0xffff, TB_GEN_TB3|TB_HWIF_ICL, "Thunderbolt 3 PCI-PCI Bridge (IceLake)" }, + { VENDOR_INTEL, TB_DEV_TR_2C, 0xffff, 0xffff, TB_GEN_TB3|TB_HWIF_TR, + "Thunderbolt 3 PCI-PCI Bridge (Titan Ridge 2C)" }, + { VENDOR_INTEL, TB_DEV_TR_4C, 0xffff, 0xffff, TB_GEN_TB3|TB_HWIF_TR, + "Thunderbolt 3 PCI-PCI Bridge (Titan Ridge 4C)" }, { 0, 0, 0, 0, 0, NULL } };