Index: head/sys/dev/sfxge/common/ef10_ev.c
===================================================================
--- head/sys/dev/sfxge/common/ef10_ev.c
+++ head/sys/dev/sfxge/common/ef10_ev.c
@@ -732,9 +732,15 @@
 			EFX_BAR_VI_WRITED(enp, ER_DD_EVQ_INDIRECT,
 			    eep->ee_index, &dword, 0);
 		} else {
-			EFX_POPULATE_DWORD_2(dword,
+			/*
+			 * NOTE: The TMR_REL field introduced in Medford2 is
+			 * ignored on earlier EF10 controllers. See bug66418
+			 * comment 9 for details.
+			 */
+			EFX_POPULATE_DWORD_3(dword,
 			    ERF_DZ_TC_TIMER_MODE, mode,
-			    ERF_DZ_TC_TIMER_VAL, ticks);
+			    ERF_DZ_TC_TIMER_VAL, ticks,
+			    ERF_FZ_TC_TMR_REL_VAL, ticks);
 			EFX_BAR_VI_WRITED(enp, ER_DZ_EVQ_TMR_REG,
 			    eep->ee_index, &dword, 0);
 		}
Index: head/sys/dev/sfxge/common/efx_regs_ef10.h
===================================================================
--- head/sys/dev/sfxge/common/efx_regs_ef10.h
+++ head/sys/dev/sfxge/common/efx_regs_ef10.h
@@ -184,6 +184,8 @@
 #define	ER_FZ_EVQ_TMR_REG_64K_RESET 0x0
 
 
+#define	ERF_FZ_TC_TMR_REL_VAL_LBN 16
+#define	ERF_FZ_TC_TMR_REL_VAL_WIDTH 14
 #define	ERF_FZ_TC_TIMER_MODE_LBN 14
 #define	ERF_FZ_TC_TIMER_MODE_WIDTH 2
 #define	ERF_FZ_TC_TIMER_VAL_LBN 0
@@ -202,6 +204,8 @@
 #define	ER_FZ_EVQ_TMR_REG_16K_RESET 0x0
 
 
+/* defined as ERF_FZ_TC_TMR_REL_VAL_LBN 16; */
+/* defined as ERF_FZ_TC_TMR_REL_VAL_WIDTH 14 */
 /* defined as ERF_FZ_TC_TIMER_MODE_LBN 14; */
 /* defined as ERF_FZ_TC_TIMER_MODE_WIDTH 2 */
 /* defined as ERF_FZ_TC_TIMER_VAL_LBN 0; */
@@ -220,6 +224,8 @@
 #define	ER_DZ_EVQ_TMR_REG_RESET 0x0
 
 
+/* defined as ERF_FZ_TC_TMR_REL_VAL_LBN 16; */
+/* defined as ERF_FZ_TC_TMR_REL_VAL_WIDTH 14 */
 #define	ERF_DZ_TC_TIMER_MODE_LBN 14
 #define	ERF_DZ_TC_TIMER_MODE_WIDTH 2
 #define	ERF_DZ_TC_TIMER_VAL_LBN 0