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usr.sbin/bhyve/pci_emul.h
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#include <sys/nv.h> | #include <sys/nv.h> | ||||
#include <sys/_pthreadtypes.h> | #include <sys/_pthreadtypes.h> | ||||
#include <dev/pci/pcireg.h> | #include <dev/pci/pcireg.h> | ||||
#include <assert.h> | #include <assert.h> | ||||
#define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */ | #define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */ | ||||
#define PCI_BARMAX_WITH_ROM (PCI_BARMAX + 1) | |||||
#define PCI_ROM_IDX (PCI_BARMAX + 1) | |||||
struct vmctx; | struct vmctx; | ||||
struct pci_devinst; | struct pci_devinst; | ||||
struct memory_region; | struct memory_region; | ||||
struct vm_snapshot_meta; | struct vm_snapshot_meta; | ||||
struct pci_devemu { | struct pci_devemu { | ||||
char *pe_emu; /* Name of device emulation */ | char *pe_emu; /* Name of device emulation */ | ||||
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}; | }; | ||||
#define PCI_EMUL_SET(x) DATA_SET(pci_devemu_set, x); | #define PCI_EMUL_SET(x) DATA_SET(pci_devemu_set, x); | ||||
enum pcibar_type { | enum pcibar_type { | ||||
PCIBAR_NONE, | PCIBAR_NONE, | ||||
PCIBAR_IO, | PCIBAR_IO, | ||||
PCIBAR_MEM32, | PCIBAR_MEM32, | ||||
PCIBAR_MEM64, | PCIBAR_MEM64, | ||||
PCIBAR_MEMHI64 | PCIBAR_MEMHI64, | ||||
PCIBAR_ROM, | |||||
}; | }; | ||||
struct pcibar { | struct pcibar { | ||||
enum pcibar_type type; /* io or memory */ | enum pcibar_type type; /* io or memory */ | ||||
uint64_t size; | uint64_t size; | ||||
uint64_t addr; | uint64_t addr; | ||||
uint8_t lobits; | uint8_t lobits; | ||||
}; | }; | ||||
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines | struct { | ||||
struct msix_table_entry *table; /* allocated at runtime */ | struct msix_table_entry *table; /* allocated at runtime */ | ||||
uint8_t *mapped_addr; | uint8_t *mapped_addr; | ||||
size_t mapped_size; | size_t mapped_size; | ||||
} pi_msix; | } pi_msix; | ||||
void *pi_arg; /* devemu-private data */ | void *pi_arg; /* devemu-private data */ | ||||
u_char pi_cfgdata[PCI_REGMAX + 1]; | u_char pi_cfgdata[PCI_REGMAX + 1]; | ||||
struct pcibar pi_bar[PCI_BARMAX + 1]; | /* ROM is handled like a BAR */ | ||||
struct pcibar pi_bar[PCI_BARMAX_WITH_ROM + 1]; | |||||
uint64_t pi_romoffset; | |||||
}; | }; | ||||
struct msicap { | struct msicap { | ||||
uint8_t capid; | uint8_t capid; | ||||
uint8_t nextptr; | uint8_t nextptr; | ||||
uint16_t msgctrl; | uint16_t msgctrl; | ||||
uint32_t addrlo; | uint32_t addrlo; | ||||
uint32_t addrhi; | uint32_t addrhi; | ||||
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typedef void (*pci_lintr_cb)(int b, int s, int pin, int pirq_pin, | typedef void (*pci_lintr_cb)(int b, int s, int pin, int pirq_pin, | ||||
int ioapic_irq, void *arg); | int ioapic_irq, void *arg); | ||||
int init_pci(struct vmctx *ctx); | int init_pci(struct vmctx *ctx); | ||||
void pci_callback(void); | void pci_callback(void); | ||||
int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, | int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, | ||||
enum pcibar_type type, uint64_t size); | enum pcibar_type type, uint64_t size); | ||||
int pci_emul_alloc_rom(struct pci_devinst *const pdi, const uint64_t size, | |||||
void **const addr); | |||||
int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum); | int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum); | ||||
int pci_emul_add_pciecap(struct pci_devinst *pi, int pcie_device_type); | int pci_emul_add_pciecap(struct pci_devinst *pi, int pcie_device_type); | ||||
void pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, | void pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, | ||||
uint32_t val, uint8_t capoff, int capid); | uint32_t val, uint8_t capoff, int capid); | ||||
void pci_emul_cmd_changed(struct pci_devinst *pi, uint16_t old); | void pci_emul_cmd_changed(struct pci_devinst *pi, uint16_t old); | ||||
void pci_generate_msi(struct pci_devinst *pi, int msgnum); | void pci_generate_msi(struct pci_devinst *pi, int msgnum); | ||||
void pci_generate_msix(struct pci_devinst *pi, int msgnum); | void pci_generate_msix(struct pci_devinst *pi, int msgnum); | ||||
void pci_lintr_assert(struct pci_devinst *pi); | void pci_lintr_assert(struct pci_devinst *pi); | ||||
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static __inline uint32_t | static __inline uint32_t | ||||
pci_get_cfgdata32(struct pci_devinst *pi, int offset) | pci_get_cfgdata32(struct pci_devinst *pi, int offset) | ||||
{ | { | ||||
assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0); | assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0); | ||||
return (*(uint32_t *)(pi->pi_cfgdata + offset)); | return (*(uint32_t *)(pi->pi_cfgdata + offset)); | ||||
} | } | ||||
#endif /* _PCI_EMUL_H_ */ | #endif /* _PCI_EMUL_H_ */ | ||||
corvink: Changing this function would enable GPU-Passthrough of dedicated graphics to a Windows VM:
```… |
Changing this function would enable GPU-Passthrough of dedicated graphics to a Windows VM: