Differential D33372 Diff 99819 sys/arm64/rockchip/clk/rk_clk_pll.c

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	#define RK3328_CLK_PLL_MODE_SLOW 0			#define RK3328_CLK_PLL_MODE_SLOW 0
	#define RK3328_CLK_PLL_MODE_NORMAL 1			#define RK3328_CLK_PLL_MODE_NORMAL 1
	#define RK3328_CLK_PLL_MODE_MASK 0x1			#define RK3328_CLK_PLL_MODE_MASK 0x1

	static int			static int
	rk3328_clk_pll_init(struct clknode *clk, device_t dev)			rk3328_clk_pll_init(struct clknode *clk, device_t dev)
	{			{
	struct rk_clk_pll_sc *sc;

	sc = clknode_get_softc(clk);

	clknode_init_parent_idx(clk, 0);			clknode_init_parent_idx(clk, 0);

	return (0);			return (0);
	}			}

	static int			static int
	rk3328_clk_pll_recalc(struct clknode clk, uint64_t freq)			rk3328_clk_pll_recalc(struct clknode clk, uint64_t freq)
	{			{
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	#define RK3399_CLK_PLL_MODE_DEEPSLOW 2			#define RK3399_CLK_PLL_MODE_DEEPSLOW 2
	#define RK3399_CLK_PLL_MODE_SHIFT 8			#define RK3399_CLK_PLL_MODE_SHIFT 8

	#define RK3399_CLK_PLL_WRITE_MASK 0xFFFF0000			#define RK3399_CLK_PLL_WRITE_MASK 0xFFFF0000

	static int			static int
	rk3399_clk_pll_init(struct clknode *clk, device_t dev)			rk3399_clk_pll_init(struct clknode *clk, device_t dev)
	{			{
	struct rk_clk_pll_sc *sc;

	sc = clknode_get_softc(clk);
	clknode_init_parent_idx(clk, 0);			clknode_init_parent_idx(clk, 0);

	return (0);			return (0);
	}			}

	static int			static int
	rk3399_clk_pll_recalc(struct clknode clk, uint64_t freq)			rk3399_clk_pll_recalc(struct clknode clk, uint64_t freq)
	{			{
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