Differential D32954 Diff 98391 sys/dev/pci/pcib_private.h

Changeset View

Standalone View

sys/dev/pci/pcib_private.h

	Show All 31 Lines
	* $FreeBSD$			* $FreeBSD$
	*/			*/

	#ifndef __PCIB_PRIVATE_H__			#ifndef __PCIB_PRIVATE_H__
	#define __PCIB_PRIVATE_H__			#define __PCIB_PRIVATE_H__

	#include <sys/taskqueue.h>			#include <sys/taskqueue.h>

	#ifdef NEW_PCIB
	/*			/*
	* Data structure and routines that Host to PCI bridge drivers can use			* Data structure and routines that Host to PCI bridge drivers can use
	* to restrict allocations for child devices to ranges decoded by the			* to restrict allocations for child devices to ranges decoded by the
	* bridge.			* bridge.
	*/			*/
	struct pcib_host_resources {			struct pcib_host_resources {
	device_t hr_pcib;			device_t hr_pcib;
	struct resource_list hr_rl;			struct resource_list hr_rl;
	};			};

	int pcib_host_res_init(device_t pcib,			int pcib_host_res_init(device_t pcib,
	struct pcib_host_resources *hr);			struct pcib_host_resources *hr);
	int pcib_host_res_free(device_t pcib,			int pcib_host_res_free(device_t pcib,
	struct pcib_host_resources *hr);			struct pcib_host_resources *hr);
	int pcib_host_res_decodes(struct pcib_host_resources *hr, int type,			int pcib_host_res_decodes(struct pcib_host_resources *hr, int type,
	rman_res_t start, rman_res_t end, u_int flags);			rman_res_t start, rman_res_t end, u_int flags);
	struct resource pcib_host_res_alloc(struct pcib_host_resources hr,			struct resource pcib_host_res_alloc(struct pcib_host_resources hr,
	device_t dev, int type, int *rid, rman_res_t start,			device_t dev, int type, int *rid, rman_res_t start,
	rman_res_t end, rman_res_t count, u_int flags);			rman_res_t end, rman_res_t count, u_int flags);
	int pcib_host_res_adjust(struct pcib_host_resources *hr,			int pcib_host_res_adjust(struct pcib_host_resources *hr,
	device_t dev, int type, struct resource *r, rman_res_t start,			device_t dev, int type, struct resource *r, rman_res_t start,
	rman_res_t end);			rman_res_t end);
	#endif

	/*			/*
	* Export portions of generic PCI:PCI bridge support so that it can be			* Export portions of generic PCI:PCI bridge support so that it can be
	* used by subclasses.			* used by subclasses.
	*/			*/
	DECLARE_CLASS(pcib_driver);			DECLARE_CLASS(pcib_driver);

	#ifdef NEW_PCIB
	#define WIN_IO 0x1			#define WIN_IO 0x1
	#define WIN_MEM 0x2			#define WIN_MEM 0x2
	#define WIN_PMEM 0x4			#define WIN_PMEM 0x4

	struct pcib_window {			struct pcib_window {
	pci_addr_t base; /* base address */			pci_addr_t base; /* base address */
	pci_addr_t limit; /* topmost address */			pci_addr_t limit; /* topmost address */
	struct rman rman;			struct rman rman;
	struct resource **res;			struct resource **res;
	int count; /* size of 'res' array */			int count; /* size of 'res' array */
	int reg; /* resource id from parent */			int reg; /* resource id from parent */
	int valid;			int valid;
	int mask; /* WIN_* bitmask of this window */			int mask; /* WIN_* bitmask of this window */
	int step; /* log_2 of window granularity */			int step; /* log_2 of window granularity */
	const char *name;			const char *name;
	};			};
	#endif

	struct pcib_secbus {			struct pcib_secbus {
	u_int sec;			u_int sec;
	u_int sub;			u_int sub;
	#if defined(NEW_PCIB) && defined(PCI_RES_BUS)			#if defined(PCI_RES_BUS)
	device_t dev;			device_t dev;
	struct rman rman;			struct rman rman;
	struct resource *res;			struct resource *res;
	const char *name;			const char *name;
	int sub_reg;			int sub_reg;
	#endif			#endif
	};			};

	Show All 11 Lines
	#define PCIB_ENABLE_ARI 0x8			#define PCIB_ENABLE_ARI 0x8
	#define PCIB_HOTPLUG 0x10			#define PCIB_HOTPLUG 0x10
	#define PCIB_HOTPLUG_CMD_PENDING 0x20			#define PCIB_HOTPLUG_CMD_PENDING 0x20
	#define PCIB_DETACH_PENDING 0x40			#define PCIB_DETACH_PENDING 0x40
	#define PCIB_DETACHING 0x80			#define PCIB_DETACHING 0x80
	u_int domain; /* domain number */			u_int domain; /* domain number */
	u_int pribus; /* primary bus number */			u_int pribus; /* primary bus number */
	struct pcib_secbus bus; /* secondary bus numbers */			struct pcib_secbus bus; /* secondary bus numbers */
	#ifdef NEW_PCIB
	struct pcib_window io; /* I/O port window */			struct pcib_window io; /* I/O port window */
	struct pcib_window mem; /* memory window */			struct pcib_window mem; /* memory window */
	struct pcib_window pmem; /* prefetchable memory window */			struct pcib_window pmem; /* prefetchable memory window */
	#else
	pci_addr_t pmembase; /* base address of prefetchable memory */
	pci_addr_t pmemlimit; /* topmost address of prefetchable memory */
	pci_addr_t membase; /* base address of memory window */
	pci_addr_t memlimit; /* topmost address of memory window */
	uint32_t iobase; /* base address of port window */
	uint32_t iolimit; /* topmost address of port window */
	#endif
	uint16_t bridgectl; /* bridge control register */			uint16_t bridgectl; /* bridge control register */
	uint16_t pcie_link_sta;			uint16_t pcie_link_sta;
	uint16_t pcie_slot_sta;			uint16_t pcie_slot_sta;
	uint32_t pcie_slot_cap;			uint32_t pcie_slot_cap;
	struct resource *pcie_irq;			struct resource *pcie_irq;
	void *pcie_ihand;			void *pcie_ihand;
	struct task pcie_hp_task;			struct task pcie_hp_task;
	struct timeout_task pcie_ab_task;			struct timeout_task pcie_ab_task;
	struct timeout_task pcie_cc_task;			struct timeout_task pcie_cc_task;
	struct timeout_task pcie_dll_task;			struct timeout_task pcie_dll_task;
	struct mtx *pcie_hp_lock;			struct mtx *pcie_hp_lock;
	};			};

	#define PCIB_HP_LOCK(sc) mtx_lock((sc)->pcie_hp_lock)			#define PCIB_HP_LOCK(sc) mtx_lock((sc)->pcie_hp_lock)
	#define PCIB_HP_UNLOCK(sc) mtx_unlock((sc)->pcie_hp_lock)			#define PCIB_HP_UNLOCK(sc) mtx_unlock((sc)->pcie_hp_lock)
	#define PCIB_HP_LOCK_ASSERT(sc) mtx_assert((sc)->pcie_hp_lock, MA_OWNED)			#define PCIB_HP_LOCK_ASSERT(sc) mtx_assert((sc)->pcie_hp_lock, MA_OWNED)

	#define PCIB_SUPPORTED_ARI_VER 1			#define PCIB_SUPPORTED_ARI_VER 1

	typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);			typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);

	int host_pcib_get_busno(pci_read_config_fn read_config, int bus,			int host_pcib_get_busno(pci_read_config_fn read_config, int bus,
	int slot, int func, uint8_t *busnum);			int slot, int func, uint8_t *busnum);
	#if defined(NEW_PCIB) && defined(PCI_RES_BUS)			#if defined(PCI_RES_BUS)
	struct resource pci_domain_alloc_bus(int domain, device_t dev, int rid,			struct resource pci_domain_alloc_bus(int domain, device_t dev, int rid,
	rman_res_t start, rman_res_t end, rman_res_t count, u_int flags);			rman_res_t start, rman_res_t end, rman_res_t count, u_int flags);
	int pci_domain_adjust_bus(int domain, device_t dev,			int pci_domain_adjust_bus(int domain, device_t dev,
	struct resource *r, rman_res_t start, rman_res_t end);			struct resource *r, rman_res_t start, rman_res_t end);
	int pci_domain_release_bus(int domain, device_t dev, int rid,			int pci_domain_release_bus(int domain, device_t dev, int rid,
	struct resource *r);			struct resource *r);
	struct resource pcib_alloc_subbus(struct pcib_secbus bus, device_t child,			struct resource pcib_alloc_subbus(struct pcib_secbus bus, device_t child,
	int *rid, rman_res_t start, rman_res_t end, rman_res_t count,			int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
	u_int flags);			u_int flags);
	void pcib_free_secbus(device_t dev, struct pcib_secbus *bus);			void pcib_free_secbus(device_t dev, struct pcib_secbus *bus);
	void pcib_setup_secbus(device_t dev, struct pcib_secbus *bus,			void pcib_setup_secbus(device_t dev, struct pcib_secbus *bus,
	int min_count);			int min_count);
	#endif			#endif
	int pcib_attach(device_t dev);			int pcib_attach(device_t dev);
	int pcib_attach_child(device_t dev);			int pcib_attach_child(device_t dev);
	void pcib_attach_common(device_t dev);			void pcib_attach_common(device_t dev);
	void pcib_bridge_init(device_t dev);			void pcib_bridge_init(device_t dev);
	#ifdef NEW_PCIB
	const char *pcib_child_name(device_t child);			const char *pcib_child_name(device_t child);
	#endif
	int pcib_child_present(device_t dev, device_t child);			int pcib_child_present(device_t dev, device_t child);
	int pcib_detach(device_t dev);			int pcib_detach(device_t dev);
	int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);			int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
	int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);			int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
	struct resource pcib_alloc_resource(device_t dev, device_t child, int type, int rid,			struct resource pcib_alloc_resource(device_t dev, device_t child, int type, int rid,
	rman_res_t start, rman_res_t end,			rman_res_t start, rman_res_t end,
	rman_res_t count, u_int flags);			rman_res_t count, u_int flags);
	#ifdef NEW_PCIB
	int pcib_adjust_resource(device_t bus, device_t child, int type,			int pcib_adjust_resource(device_t bus, device_t child, int type,
	struct resource *r, rman_res_t start, rman_res_t end);			struct resource *r, rman_res_t start, rman_res_t end);
	int pcib_release_resource(device_t dev, device_t child, int type, int rid,			int pcib_release_resource(device_t dev, device_t child, int type, int rid,
	struct resource *r);			struct resource *r);
	#endif
	int pcib_maxslots(device_t dev);			int pcib_maxslots(device_t dev);
	int pcib_maxfuncs(device_t dev);			int pcib_maxfuncs(device_t dev);
	int pcib_route_interrupt(device_t pcib, device_t dev, int pin);			int pcib_route_interrupt(device_t pcib, device_t dev, int pin);
	int pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs);			int pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs);
	int pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs);			int pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs);
	int pcib_alloc_msix(device_t pcib, device_t dev, int *irq);			int pcib_alloc_msix(device_t pcib, device_t dev, int *irq);
	int pcib_release_msix(device_t pcib, device_t dev, int irq);			int pcib_release_msix(device_t pcib, device_t dev, int irq);
	int pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t addr, uint32_t data);			int pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t addr, uint32_t data);
	int pcib_get_id(device_t pcib, device_t dev, enum pci_id_type type,			int pcib_get_id(device_t pcib, device_t dev, enum pci_id_type type,
	uintptr_t *id);			uintptr_t *id);
	void pcib_decode_rid(device_t pcib, uint16_t rid, int *bus,			void pcib_decode_rid(device_t pcib, uint16_t rid, int *bus,
	int slot, int func);			int slot, int func);
	int pcib_request_feature(device_t dev, enum pci_feature feature);			int pcib_request_feature(device_t dev, enum pci_feature feature);
	int pcib_request_feature_allow(device_t pcib, device_t dev, enum pci_feature feature);			int pcib_request_feature_allow(device_t pcib, device_t dev, enum pci_feature feature);

	#endif			#endif