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sys/arm64/include/cmn600_reg.h
| Show First 20 Lines • Show All 69 Lines • ▼ Show 20 Lines | |||||
| #define POR_CFGM_NODE_INFO 0x0000 /* ro */ | #define POR_CFGM_NODE_INFO 0x0000 /* ro */ | ||||
| #define POR_CFGM_NODE_INFO_LOGICAL_ID_MASK 0xffff00000000UL | #define POR_CFGM_NODE_INFO_LOGICAL_ID_MASK 0xffff00000000UL | ||||
| #define POR_CFGM_NODE_INFO_LOGICAL_ID_SHIFT 32 | #define POR_CFGM_NODE_INFO_LOGICAL_ID_SHIFT 32 | ||||
| #define POR_CFGM_NODE_INFO_NODE_ID_MASK 0xffff0000 | #define POR_CFGM_NODE_INFO_NODE_ID_MASK 0xffff0000 | ||||
| #define POR_CFGM_NODE_INFO_NODE_ID_SHIFT 16 | #define POR_CFGM_NODE_INFO_NODE_ID_SHIFT 16 | ||||
| #define POR_CFGM_NODE_INFO_NODE_TYPE_MASK 0xffff | #define POR_CFGM_NODE_INFO_NODE_TYPE_MASK 0xffff | ||||
| #define POR_CFGM_NODE_INFO_NODE_TYPE_SHIFT 0 | #define POR_CFGM_NODE_INFO_NODE_TYPE_SHIFT 0 | ||||
| #define NODE_ID_SUB_MASK 0x3 | |||||
| #define NODE_ID_SUB_SHIFT 0 | |||||
| #define NODE_ID_PORT_MASK 0x4 | |||||
| #define NODE_ID_PORT_SHIFT 2 | |||||
| #define NODE_ID_X2B_MASK (0x3 << 3) | |||||
| #define NODE_ID_X2B_SHIFT 3 | |||||
| #define NODE_ID_Y2B_MASK (0x3 << 5) | |||||
| #define NODE_ID_Y2B_SHIFT 5 | |||||
| #define NODE_ID_X3B_MASK (0x7 << 3) | |||||
| #define NODE_ID_X3B_SHIFT 3 | |||||
| #define NODE_ID_Y3B_MASK (0x7 << 6) | |||||
| #define NODE_ID_Y3B_SHIFT 6 | |||||
| #define NODE_TYPE_INVALID 0x000 | #define NODE_TYPE_INVALID 0x000 | ||||
| #define NODE_TYPE_DVM 0x001 | #define NODE_TYPE_DVM 0x001 | ||||
| #define NODE_TYPE_CFG 0x002 | #define NODE_TYPE_CFG 0x002 | ||||
| #define NODE_TYPE_DTC 0x003 | #define NODE_TYPE_DTC 0x003 | ||||
| #define NODE_TYPE_HN_I 0x004 | #define NODE_TYPE_HN_I 0x004 | ||||
| #define NODE_TYPE_HN_F 0x005 | #define NODE_TYPE_HN_F 0x005 | ||||
| #define NODE_TYPE_XP 0x006 | #define NODE_TYPE_XP 0x006 | ||||
| #define NODE_TYPE_SBSX 0x007 | #define NODE_TYPE_SBSX 0x007 | ||||
| ▲ Show 20 Lines • Show All 174 Lines • ▼ Show 20 Lines | |||||
| #define POR_DT_TRIGGER_STATUS_CLR 0x0a20 /* wo */ | #define POR_DT_TRIGGER_STATUS_CLR 0x0a20 /* wo */ | ||||
| #define POR_DT_TRACE_CONTROL 0x0a30 /* rw */ | #define POR_DT_TRACE_CONTROL 0x0a30 /* rw */ | ||||
| #define POR_DT_TRACEID 0x0a48 /* rw */ | #define POR_DT_TRACEID 0x0a48 /* rw */ | ||||
| #define POR_DT_PMEVCNTAB 0x2000 /* rw */ | #define POR_DT_PMEVCNTAB 0x2000 /* rw */ | ||||
| #define POR_DT_PMEVCNTCD 0x2010 /* rw */ | #define POR_DT_PMEVCNTCD 0x2010 /* rw */ | ||||
| #define POR_DT_PMEVCNTEF 0x2020 /* rw */ | #define POR_DT_PMEVCNTEF 0x2020 /* rw */ | ||||
| #define POR_DT_PMEVCNTGH 0x2030 /* rw */ | #define POR_DT_PMEVCNTGH 0x2030 /* rw */ | ||||
| #define POR_DT_PMEVCNT(x) (0x2000 + ((x) * 0x10)) | #define POR_DT_PMEVCNT(x) (0x2000 + ((x) * 0x10)) | ||||
| #define POR_DT_PMEVCNT_EVENCNT_SHIFT 0 | |||||
| #define POR_DT_PMEVCNT_ODDCNT_SHIFT 32 | |||||
| #define POR_DT_PMCCNTR 0x2040 /* rw */ | #define POR_DT_PMCCNTR 0x2040 /* rw */ | ||||
| #define POR_DT_PMEVCNTSRAB 0x2050 /* rw */ | #define POR_DT_PMEVCNTSRAB 0x2050 /* rw */ | ||||
| #define POR_DT_PMEVCNTSRCD 0x2060 /* rw */ | #define POR_DT_PMEVCNTSRCD 0x2060 /* rw */ | ||||
| #define POR_DT_PMEVCNTSREF 0x2070 /* rw */ | #define POR_DT_PMEVCNTSREF 0x2070 /* rw */ | ||||
| #define POR_DT_PMEVCNTSRGH 0x2080 /* rw */ | #define POR_DT_PMEVCNTSRGH 0x2080 /* rw */ | ||||
| #define POR_DT_PMCCNTRSR 0x2090 /* rw */ | #define POR_DT_PMCCNTRSR 0x2090 /* rw */ | ||||
| #define POR_DT_PMCR 0x2100 /* rw */ | #define POR_DT_PMCR 0x2100 /* rw */ | ||||
| #define POR_DT_PMCR_OVFL_INTR_EN (1 << 6) | #define POR_DT_PMCR_OVFL_INTR_EN (1 << 6) | ||||
| ▲ Show 20 Lines • Show All 231 Lines • ▼ Show 20 Lines | |||||
| #define POR_DTM_WP3_MASK 0x21f8 /* rw */ | #define POR_DTM_WP3_MASK 0x21f8 /* rw */ | ||||
| #define POR_DTM_PMSICR 0x2200 /* rw */ | #define POR_DTM_PMSICR 0x2200 /* rw */ | ||||
| #define POR_DTM_PMSIRR 0x2208 /* rw */ | #define POR_DTM_PMSIRR 0x2208 /* rw */ | ||||
| #define POR_DTM_PMU_CONFIG 0x2210 /* rw */ | #define POR_DTM_PMU_CONFIG 0x2210 /* rw */ | ||||
| #define POR_DTM_PMU_CONFIG_PMU_EN (1 << 0) | #define POR_DTM_PMU_CONFIG_PMU_EN (1 << 0) | ||||
| #define POR_DTM_PMU_CONFIG_VCNT_INPUT_SEL_SHIFT 32 | #define POR_DTM_PMU_CONFIG_VCNT_INPUT_SEL_SHIFT 32 | ||||
| #define POR_DTM_PMU_CONFIG_VCNT_INPUT_SEL_WIDTH 8 | #define POR_DTM_PMU_CONFIG_VCNT_INPUT_SEL_WIDTH 8 | ||||
| #define POR_DTM_PMEVCNT 0x2220 /* rw */ | #define POR_DTM_PMEVCNT 0x2220 /* rw */ | ||||
| #define POR_DTM_PMEVCNT_CNTR_WIDTH 16 | |||||
| #define POR_DTM_PMEVCNTSR 0x2240 /* rw */ | #define POR_DTM_PMEVCNTSR 0x2240 /* rw */ | ||||
| /* RN-D registers */ | /* RN-D registers */ | ||||
| #define POR_RND_NODE_INFO 0x0000 /* ro */ | #define POR_RND_NODE_INFO 0x0000 /* ro */ | ||||
| #define POR_RND_CHILD_INFO 0x0080 /* ro */ | #define POR_RND_CHILD_INFO 0x0080 /* ro */ | ||||
| #define POR_RND_SECURE_REGISTER_GROUPS_OVERRIDE 0x0980 /* rw */ | #define POR_RND_SECURE_REGISTER_GROUPS_OVERRIDE 0x0980 /* rw */ | ||||
| #define POR_RND_UNIT_INFO 0x0900 /* ro */ | #define POR_RND_UNIT_INFO 0x0900 /* ro */ | ||||
| #define POR_RND_CFG_CTL 0x0a00 /* rw */ | #define POR_RND_CFG_CTL 0x0a00 /* rw */ | ||||
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