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sys/xen/interface/arch-x86/pmu.h
Show First 20 Lines • Show All 99 Lines • ▼ Show 20 Lines | |||||
* XENPMU_flush hypercall and clear PMU_CACHED bit. | * XENPMU_flush hypercall and clear PMU_CACHED bit. | ||||
*/ | */ | ||||
struct xen_pmu_arch { | struct xen_pmu_arch { | ||||
union { | union { | ||||
/* | /* | ||||
* Processor's registers at the time of interrupt. | * Processor's registers at the time of interrupt. | ||||
* WO for hypervisor, RO for guests. | * WO for hypervisor, RO for guests. | ||||
*/ | */ | ||||
struct xen_pmu_regs regs; | xen_pmu_regs_t regs; | ||||
/* Padding for adding new registers to xen_pmu_regs in the future */ | /* Padding for adding new registers to xen_pmu_regs in the future */ | ||||
#define XENPMU_REGS_PAD_SZ 64 | #define XENPMU_REGS_PAD_SZ 64 | ||||
uint8_t pad[XENPMU_REGS_PAD_SZ]; | uint8_t pad[XENPMU_REGS_PAD_SZ]; | ||||
} r; | } r; | ||||
/* WO for hypervisor, RO for guest */ | /* WO for hypervisor, RO for guest */ | ||||
uint64_t pmu_flags; | uint64_t pmu_flags; | ||||
Show All 10 Lines | #define XENPMU_REGS_PAD_SZ 64 | ||||
/* | /* | ||||
* Vendor-specific PMU registers. | * Vendor-specific PMU registers. | ||||
* RW for both hypervisor and guest (see exceptions above). | * RW for both hypervisor and guest (see exceptions above). | ||||
* Guest's updates to this field are verified and then loaded by the | * Guest's updates to this field are verified and then loaded by the | ||||
* hypervisor into hardware during XENPMU_flush | * hypervisor into hardware during XENPMU_flush | ||||
*/ | */ | ||||
union { | union { | ||||
struct xen_pmu_amd_ctxt amd; | xen_pmu_amd_ctxt_t amd; | ||||
struct xen_pmu_intel_ctxt intel; | xen_pmu_intel_ctxt_t intel; | ||||
/* | /* | ||||
* Padding for contexts (fixed parts only, does not include MSR banks | * Padding for contexts (fixed parts only, does not include MSR banks | ||||
* that are specified by offsets) | * that are specified by offsets) | ||||
*/ | */ | ||||
#define XENPMU_CTXT_PAD_SZ 128 | #define XENPMU_CTXT_PAD_SZ 128 | ||||
uint8_t pad[XENPMU_CTXT_PAD_SZ]; | uint8_t pad[XENPMU_CTXT_PAD_SZ]; | ||||
} c; | } c; | ||||
Show All 15 Lines |