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sys/dev/ixgbe/ixgbe_x540.c
Show First 20 Lines • Show All 813 Lines • ▼ Show 20 Lines | s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) | ||||
} | } | ||||
/* If the resource is not released by the FW/HW the SW can assume that | /* If the resource is not released by the FW/HW the SW can assume that | ||||
* the FW/HW malfunctions. In that case the SW should set the SW bit(s) | * the FW/HW malfunctions. In that case the SW should set the SW bit(s) | ||||
* of the requested resource(s) while ignoring the corresponding FW/HW | * of the requested resource(s) while ignoring the corresponding FW/HW | ||||
* bits in the SW_FW_SYNC register. | * bits in the SW_FW_SYNC register. | ||||
*/ | */ | ||||
if (ixgbe_get_swfw_sync_semaphore(hw)) { | if (ixgbe_get_swfw_sync_semaphore(hw)) { | ||||
DEBUGOUT("Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n"); | DEBUGOUT("Failed to get NVM semaphore and register semaphore while forcefully ignoring FW semaphore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n"); | ||||
return IXGBE_ERR_SWFW_SYNC; | return IXGBE_ERR_SWFW_SYNC; | ||||
} | } | ||||
swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); | swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); | ||||
if (swfw_sync & (fwmask | hwmask)) { | if (swfw_sync & (fwmask | hwmask)) { | ||||
swfw_sync |= swmask; | swfw_sync |= swmask; | ||||
IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); | IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); | ||||
ixgbe_release_swfw_sync_semaphore(hw); | ixgbe_release_swfw_sync_semaphore(hw); | ||||
msec_delay(5); | msec_delay(5); | ||||
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