Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/ixgbe/ixgbe_type.h
Show First 20 Lines • Show All 42 Lines • ▼ Show 20 Lines | |||||
* - IXGBE_ERROR_INVALID_STATE | * - IXGBE_ERROR_INVALID_STATE | ||||
* This category is for errors which represent a serious failure state that is | * This category is for errors which represent a serious failure state that is | ||||
* unexpected, and could be potentially harmful to device operation. It should | * unexpected, and could be potentially harmful to device operation. It should | ||||
* not be used for errors relating to issues that can be worked around or | * not be used for errors relating to issues that can be worked around or | ||||
* ignored. | * ignored. | ||||
* | * | ||||
* - IXGBE_ERROR_POLLING | * - IXGBE_ERROR_POLLING | ||||
* This category is for errors related to polling/timeout issues and should be | * This category is for errors related to polling/timeout issues and should be | ||||
* used in any case where the timeout occurred, or a failure to obtain a lock, or | * used in any case where the timeout occurred, or a failure to obtain a lock, | ||||
* failure to receive data within the time limit. | * or failure to receive data within the time limit. | ||||
* | * | ||||
* - IXGBE_ERROR_CAUTION | * - IXGBE_ERROR_CAUTION | ||||
* This category should be used for reporting issues that may be the cause of | * This category should be used for reporting issues that may be the cause of | ||||
* other errors, such as temperature warnings. It should indicate an event which | * other errors, such as temperature warnings. It should indicate an event which | ||||
* could be serious, but hasn't necessarily caused problems yet. | * could be serious, but hasn't necessarily caused problems yet. | ||||
* | * | ||||
* - IXGBE_ERROR_SOFTWARE | * - IXGBE_ERROR_SOFTWARE | ||||
* This category is intended for errors due to software state preventing | * This category is intended for errors due to software state preventing | ||||
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines | |||||
#define IXGBE_DEV_ID_X550EM_X_XFI 0x15B0 | #define IXGBE_DEV_ID_X550EM_X_XFI 0x15B0 | ||||
#define IXGBE_DEV_ID_X550_VF_HV 0x1564 | #define IXGBE_DEV_ID_X550_VF_HV 0x1564 | ||||
#define IXGBE_DEV_ID_X550_VF 0x1565 | #define IXGBE_DEV_ID_X550_VF 0x1565 | ||||
#define IXGBE_DEV_ID_X550EM_A_VF 0x15C5 | #define IXGBE_DEV_ID_X550EM_A_VF 0x15C5 | ||||
#define IXGBE_DEV_ID_X550EM_A_VF_HV 0x15B4 | #define IXGBE_DEV_ID_X550EM_A_VF_HV 0x15B4 | ||||
#define IXGBE_DEV_ID_X550EM_X_VF 0x15A8 | #define IXGBE_DEV_ID_X550EM_X_VF 0x15A8 | ||||
#define IXGBE_DEV_ID_X550EM_X_VF_HV 0x15A9 | #define IXGBE_DEV_ID_X550EM_X_VF_HV 0x15A9 | ||||
#define IXGBE_CAT(r,m) IXGBE_##r##m | #define IXGBE_CAT(r, m) IXGBE_##r##m | ||||
#define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)]) | #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)]) | ||||
/* General Registers */ | /* General Registers */ | ||||
#define IXGBE_CTRL 0x00000 | #define IXGBE_CTRL 0x00000 | ||||
#define IXGBE_STATUS 0x00008 | #define IXGBE_STATUS 0x00008 | ||||
#define IXGBE_CTRL_EXT 0x00018 | #define IXGBE_CTRL_EXT 0x00018 | ||||
#define IXGBE_ESDP 0x00020 | #define IXGBE_ESDP 0x00020 | ||||
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines | |||||
#define IXGBE_I2C_CLK_OE_N_EN 0 | #define IXGBE_I2C_CLK_OE_N_EN 0 | ||||
#define IXGBE_I2C_CLK_OE_N_EN_X540 IXGBE_I2C_CLK_OE_N_EN | #define IXGBE_I2C_CLK_OE_N_EN_X540 IXGBE_I2C_CLK_OE_N_EN | ||||
#define IXGBE_I2C_CLK_OE_N_EN_X550 0x00002000 | #define IXGBE_I2C_CLK_OE_N_EN_X550 0x00002000 | ||||
#define IXGBE_I2C_CLK_OE_N_EN_X550EM_x IXGBE_I2C_CLK_OE_N_EN_X550 | #define IXGBE_I2C_CLK_OE_N_EN_X550EM_x IXGBE_I2C_CLK_OE_N_EN_X550 | ||||
#define IXGBE_I2C_CLK_OE_N_EN_X550EM_a IXGBE_I2C_CLK_OE_N_EN_X550 | #define IXGBE_I2C_CLK_OE_N_EN_X550EM_a IXGBE_I2C_CLK_OE_N_EN_X550 | ||||
#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN) | #define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN) | ||||
#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500 | #define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500 | ||||
#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 | |||||
#define IXGBE_EMC_INTERNAL_DATA 0x00 | |||||
#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 | |||||
#define IXGBE_EMC_DIODE1_DATA 0x01 | |||||
#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 | |||||
#define IXGBE_EMC_DIODE2_DATA 0x23 | |||||
#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A | |||||
#define IXGBE_MAX_SENSORS 3 | |||||
struct ixgbe_thermal_diode_data { | |||||
u8 location; | |||||
u8 temp; | |||||
u8 caution_thresh; | |||||
u8 max_op_thresh; | |||||
}; | |||||
struct ixgbe_thermal_sensor_data { | |||||
struct ixgbe_thermal_diode_data sensor[IXGBE_MAX_SENSORS]; | |||||
}; | |||||
#define NVM_OROM_OFFSET 0x17 | #define NVM_OROM_OFFSET 0x17 | ||||
#define NVM_OROM_BLK_LOW 0x83 | #define NVM_OROM_BLK_LOW 0x83 | ||||
#define NVM_OROM_BLK_HI 0x84 | #define NVM_OROM_BLK_HI 0x84 | ||||
#define NVM_OROM_PATCH_MASK 0xFF | #define NVM_OROM_PATCH_MASK 0xFF | ||||
#define NVM_OROM_SHIFT 8 | #define NVM_OROM_SHIFT 8 | ||||
#define NVM_VER_MASK 0x00FF /* version mask */ | #define NVM_VER_MASK 0x00FF /* version mask */ | ||||
#define NVM_VER_SHIFT 8 /* version bit shift */ | #define NVM_VER_SHIFT 8 /* version bit shift */ | ||||
▲ Show 20 Lines • Show All 2,056 Lines • ▼ Show 20 Lines | |||||
#define IXGBE_PCIE_CONFIG_SIZE 0x08 | #define IXGBE_PCIE_CONFIG_SIZE 0x08 | ||||
#define IXGBE_EEPROM_LAST_WORD 0x41 | #define IXGBE_EEPROM_LAST_WORD 0x41 | ||||
#define IXGBE_FW_PTR 0x0F | #define IXGBE_FW_PTR 0x0F | ||||
#define IXGBE_PBANUM0_PTR 0x15 | #define IXGBE_PBANUM0_PTR 0x15 | ||||
#define IXGBE_PBANUM1_PTR 0x16 | #define IXGBE_PBANUM1_PTR 0x16 | ||||
#define IXGBE_ALT_MAC_ADDR_PTR 0x37 | #define IXGBE_ALT_MAC_ADDR_PTR 0x37 | ||||
#define IXGBE_FREE_SPACE_PTR 0X3E | #define IXGBE_FREE_SPACE_PTR 0X3E | ||||
/* External Thermal Sensor Config */ | |||||
#define IXGBE_ETS_CFG 0x26 | |||||
#define IXGBE_ETS_LTHRES_DELTA_MASK 0x07C0 | |||||
#define IXGBE_ETS_LTHRES_DELTA_SHIFT 6 | |||||
#define IXGBE_ETS_TYPE_MASK 0x0038 | |||||
#define IXGBE_ETS_TYPE_SHIFT 3 | |||||
#define IXGBE_ETS_TYPE_EMC 0x000 | |||||
#define IXGBE_ETS_NUM_SENSORS_MASK 0x0007 | |||||
#define IXGBE_ETS_DATA_LOC_MASK 0x3C00 | |||||
#define IXGBE_ETS_DATA_LOC_SHIFT 10 | |||||
#define IXGBE_ETS_DATA_INDEX_MASK 0x0300 | |||||
#define IXGBE_ETS_DATA_INDEX_SHIFT 8 | |||||
#define IXGBE_ETS_DATA_HTHRESH_MASK 0x00FF | |||||
#define IXGBE_SAN_MAC_ADDR_PTR 0x28 | #define IXGBE_SAN_MAC_ADDR_PTR 0x28 | ||||
#define IXGBE_DEVICE_CAPS 0x2C | #define IXGBE_DEVICE_CAPS 0x2C | ||||
#define IXGBE_82599_SERIAL_NUMBER_MAC_ADDR 0x11 | #define IXGBE_82599_SERIAL_NUMBER_MAC_ADDR 0x11 | ||||
#define IXGBE_X550_SERIAL_NUMBER_MAC_ADDR 0x04 | #define IXGBE_X550_SERIAL_NUMBER_MAC_ADDR 0x04 | ||||
#define IXGBE_PCIE_MSIX_82599_CAPS 0x72 | #define IXGBE_PCIE_MSIX_82599_CAPS 0x72 | ||||
#define IXGBE_MAX_MSIX_VECTORS_82599 0x40 | #define IXGBE_MAX_MSIX_VECTORS_82599 0x40 | ||||
#define IXGBE_PCIE_MSIX_82598_CAPS 0x62 | #define IXGBE_PCIE_MSIX_82598_CAPS 0x62 | ||||
Show All 38 Lines | |||||
#define IXGBE_ETH_LENGTH_OF_ADDRESS 6 | #define IXGBE_ETH_LENGTH_OF_ADDRESS 6 | ||||
#define IXGBE_EEPROM_PAGE_SIZE_MAX 128 | #define IXGBE_EEPROM_PAGE_SIZE_MAX 128 | ||||
#define IXGBE_EEPROM_RD_BUFFER_MAX_COUNT 256 /* words rd in burst */ | #define IXGBE_EEPROM_RD_BUFFER_MAX_COUNT 256 /* words rd in burst */ | ||||
#define IXGBE_EEPROM_WR_BUFFER_MAX_COUNT 256 /* words wr in burst */ | #define IXGBE_EEPROM_WR_BUFFER_MAX_COUNT 256 /* words wr in burst */ | ||||
#define IXGBE_EEPROM_CTRL_2 1 /* EEPROM CTRL word 2 */ | #define IXGBE_EEPROM_CTRL_2 1 /* EEPROM CTRL word 2 */ | ||||
#define IXGBE_EEPROM_CCD_BIT 2 | #define IXGBE_EEPROM_CCD_BIT 2 | ||||
#ifndef IXGBE_EEPROM_GRANT_ATTEMPTS | |||||
#define IXGBE_EEPROM_GRANT_ATTEMPTS 1000 /* EEPROM attempts to gain grant */ | #define IXGBE_EEPROM_GRANT_ATTEMPTS 1000 /* EEPROM attempts to gain grant */ | ||||
#endif | |||||
/* Number of 5 microseconds we wait for EERD read and | /* Number of 5 microseconds we wait for EERD read and | ||||
* EERW write to complete */ | * EERW write to complete */ | ||||
#define IXGBE_EERD_EEWR_ATTEMPTS 100000 | #define IXGBE_EERD_EEWR_ATTEMPTS 100000 | ||||
/* # attempts we wait for flush update to complete */ | /* # attempts we wait for flush update to complete */ | ||||
#define IXGBE_FLUDONE_ATTEMPTS 20000 | #define IXGBE_FLUDONE_ATTEMPTS 20000 | ||||
▲ Show 20 Lines • Show All 1,501 Lines • ▼ Show 20 Lines | struct ixgbe_mac_operations { | ||||
s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); | s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); | ||||
s32 (*get_san_mac_addr)(struct ixgbe_hw *, u8 *); | s32 (*get_san_mac_addr)(struct ixgbe_hw *, u8 *); | ||||
s32 (*set_san_mac_addr)(struct ixgbe_hw *, u8 *); | s32 (*set_san_mac_addr)(struct ixgbe_hw *, u8 *); | ||||
s32 (*get_device_caps)(struct ixgbe_hw *, u16 *); | s32 (*get_device_caps)(struct ixgbe_hw *, u16 *); | ||||
s32 (*get_wwn_prefix)(struct ixgbe_hw *, u16 *, u16 *); | s32 (*get_wwn_prefix)(struct ixgbe_hw *, u16 *, u16 *); | ||||
s32 (*get_fcoe_boot_status)(struct ixgbe_hw *, u16 *); | s32 (*get_fcoe_boot_status)(struct ixgbe_hw *, u16 *); | ||||
s32 (*stop_adapter)(struct ixgbe_hw *); | s32 (*stop_adapter)(struct ixgbe_hw *); | ||||
s32 (*get_bus_info)(struct ixgbe_hw *); | s32 (*get_bus_info)(struct ixgbe_hw *); | ||||
s32 (*negotiate_api_version)(struct ixgbe_hw *, int); | |||||
void (*set_lan_id)(struct ixgbe_hw *); | void (*set_lan_id)(struct ixgbe_hw *); | ||||
s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*); | s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*); | ||||
s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8); | s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8); | ||||
s32 (*setup_sfp)(struct ixgbe_hw *); | s32 (*setup_sfp)(struct ixgbe_hw *); | ||||
s32 (*enable_rx_dma)(struct ixgbe_hw *, u32); | s32 (*enable_rx_dma)(struct ixgbe_hw *, u32); | ||||
s32 (*disable_sec_rx_path)(struct ixgbe_hw *); | s32 (*disable_sec_rx_path)(struct ixgbe_hw *); | ||||
s32 (*enable_sec_rx_path)(struct ixgbe_hw *); | s32 (*enable_sec_rx_path)(struct ixgbe_hw *); | ||||
s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32); | s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32); | ||||
void (*release_swfw_sync)(struct ixgbe_hw *, u32); | void (*release_swfw_sync)(struct ixgbe_hw *, u32); | ||||
void (*init_swfw_sync)(struct ixgbe_hw *); | void (*init_swfw_sync)(struct ixgbe_hw *); | ||||
s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *); | s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *); | ||||
s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool); | s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool); | ||||
s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api); | |||||
/* Link */ | /* Link */ | ||||
void (*disable_tx_laser)(struct ixgbe_hw *); | void (*disable_tx_laser)(struct ixgbe_hw *); | ||||
void (*enable_tx_laser)(struct ixgbe_hw *); | void (*enable_tx_laser)(struct ixgbe_hw *); | ||||
void (*flap_tx_laser)(struct ixgbe_hw *); | void (*flap_tx_laser)(struct ixgbe_hw *); | ||||
s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); | s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); | ||||
s32 (*setup_mac_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); | s32 (*setup_mac_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); | ||||
s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); | s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); | ||||
Show All 19 Lines | struct ixgbe_mac_operations { | ||||
s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32); | s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32); | ||||
s32 (*set_vmdq_san_mac)(struct ixgbe_hw *, u32); | s32 (*set_vmdq_san_mac)(struct ixgbe_hw *, u32); | ||||
s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32); | s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32); | ||||
s32 (*init_rx_addrs)(struct ixgbe_hw *); | s32 (*init_rx_addrs)(struct ixgbe_hw *); | ||||
s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32, | s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32, | ||||
ixgbe_mc_addr_itr); | ixgbe_mc_addr_itr); | ||||
s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32, | s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32, | ||||
ixgbe_mc_addr_itr, bool clear); | ixgbe_mc_addr_itr, bool clear); | ||||
s32 (*update_xcast_mode)(struct ixgbe_hw *, int); | |||||
s32 (*enable_mc)(struct ixgbe_hw *); | s32 (*enable_mc)(struct ixgbe_hw *); | ||||
s32 (*disable_mc)(struct ixgbe_hw *); | s32 (*disable_mc)(struct ixgbe_hw *); | ||||
s32 (*clear_vfta)(struct ixgbe_hw *); | s32 (*clear_vfta)(struct ixgbe_hw *); | ||||
s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool); | s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool); | ||||
s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32, | s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32, | ||||
bool); | bool); | ||||
s32 (*set_rlpml)(struct ixgbe_hw *, u16); | |||||
s32 (*init_uta_tables)(struct ixgbe_hw *); | s32 (*init_uta_tables)(struct ixgbe_hw *); | ||||
void (*set_mac_anti_spoofing)(struct ixgbe_hw *, bool, int); | void (*set_mac_anti_spoofing)(struct ixgbe_hw *, bool, int); | ||||
void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int); | void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int); | ||||
s32 (*update_xcast_mode)(struct ixgbe_hw *, int); | |||||
s32 (*set_rlpml)(struct ixgbe_hw *, u16); | |||||
/* Flow Control */ | /* Flow Control */ | ||||
s32 (*fc_enable)(struct ixgbe_hw *); | s32 (*fc_enable)(struct ixgbe_hw *); | ||||
s32 (*setup_fc)(struct ixgbe_hw *); | s32 (*setup_fc)(struct ixgbe_hw *); | ||||
void (*fc_autoneg)(struct ixgbe_hw *); | void (*fc_autoneg)(struct ixgbe_hw *); | ||||
/* Manageability interface */ | /* Manageability interface */ | ||||
s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8, u16, | s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8, u16, | ||||
const char *); | const char *); | ||||
s32 (*get_thermal_sensor_data)(struct ixgbe_hw *); | |||||
s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw); | |||||
s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status); | s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status); | ||||
bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg); | bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg); | ||||
s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action); | s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action); | ||||
s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value); | s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value); | ||||
void (*get_rtrup2tc)(struct ixgbe_hw *hw, u8 *map); | void (*get_rtrup2tc)(struct ixgbe_hw *hw, u8 *map); | ||||
void (*disable_rx)(struct ixgbe_hw *hw); | void (*disable_rx)(struct ixgbe_hw *hw); | ||||
void (*enable_rx)(struct ixgbe_hw *hw); | void (*enable_rx)(struct ixgbe_hw *hw); | ||||
void (*set_source_address_pruning)(struct ixgbe_hw *, bool, | void (*set_source_address_pruning)(struct ixgbe_hw *, bool, | ||||
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines | #define IXGBE_MAX_MTA 128 | ||||
u8 san_mac_rar_index; | u8 san_mac_rar_index; | ||||
bool get_link_status; | bool get_link_status; | ||||
u32 orig_autoc2; | u32 orig_autoc2; | ||||
u16 max_msix_vectors; | u16 max_msix_vectors; | ||||
bool arc_subsystem_valid; | bool arc_subsystem_valid; | ||||
bool orig_link_settings_stored; | bool orig_link_settings_stored; | ||||
bool autotry_restart; | bool autotry_restart; | ||||
u8 flags; | u8 flags; | ||||
struct ixgbe_thermal_sensor_data thermal_sensor_data; | |||||
bool thermal_sensor_enabled; | |||||
struct ixgbe_dmac_config dmac_config; | struct ixgbe_dmac_config dmac_config; | ||||
bool set_lben; | bool set_lben; | ||||
u32 max_link_up_time; | u32 max_link_up_time; | ||||
u8 led_link_act; | u8 led_link_act; | ||||
}; | }; | ||||
struct ixgbe_phy_info { | struct ixgbe_phy_info { | ||||
struct ixgbe_phy_operations ops; | struct ixgbe_phy_operations ops; | ||||
▲ Show 20 Lines • Show All 353 Lines • Show Last 20 Lines |