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Show First 20 Lines • Show All 200 Lines • ▼ Show 20 Lines	struct mlx5_create_qp {
__u64 sq_buf_addr;		__u64 sq_buf_addr;
};		};

struct mlx5_create_qp_resp {		struct mlx5_create_qp_resp {
struct ibv_create_qp_resp ibv_resp;		struct ibv_create_qp_resp ibv_resp;
__u32 uuar_index;		__u32 uuar_index;
};		};

		enum mlx5_create_wq_comp_mask {
		MLX5_IB_CREATE_WQ_STRIDING_RQ = 1 << 0,
		};

struct mlx5_drv_create_wq {		struct mlx5_drv_create_wq {
__u64 buf_addr;		__u64 buf_addr;
__u64 db_addr;		__u64 db_addr;
__u32 rq_wqe_count;		__u32 rq_wqe_count;
__u32 rq_wqe_shift;		__u32 rq_wqe_shift;
__u32 user_index;		__u32 user_index;
__u32 flags;		__u32 flags;
__u32 comp_mask;		__u32 comp_mask;
__u32 reserved;		__u32 single_stride_log_num_of_bytes;
		__u32 single_wqe_log_num_of_strides;
		__u32 two_byte_shift_en;
};		};

struct mlx5_create_wq {		struct mlx5_create_wq {
struct ibv_create_wq ibv_cmd;		struct ibv_create_wq ibv_cmd;
struct mlx5_drv_create_wq drv;		struct mlx5_drv_create_wq drv;
};		};

struct mlx5_create_wq_resp {		struct mlx5_create_wq_resp {
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