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sys/dev/mlx5/mlx5_ib/mlx5_ib.h
Show All 27 Lines | |||||
#ifndef MLX5_IB_H | #ifndef MLX5_IB_H | ||||
#define MLX5_IB_H | #define MLX5_IB_H | ||||
#include <linux/kernel.h> | #include <linux/kernel.h> | ||||
#include <linux/sched.h> | #include <linux/sched.h> | ||||
#include <linux/printk.h> | #include <linux/printk.h> | ||||
#include <linux/netdevice.h> | #include <linux/netdevice.h> | ||||
#include <rdma/ib_verbs.h> | #include <rdma/ib_verbs.h> | ||||
#include <rdma/ib_umem.h> | |||||
#include <rdma/ib_smi.h> | #include <rdma/ib_smi.h> | ||||
#include <dev/mlx5/cq.h> | #include <dev/mlx5/cq.h> | ||||
#include <dev/mlx5/qp.h> | #include <dev/mlx5/qp.h> | ||||
#include <dev/mlx5/srq.h> | #include <dev/mlx5/srq.h> | ||||
#include <linux/types.h> | #include <linux/types.h> | ||||
#include <dev/mlx5/mlx5_core/transobj.h> | #include <dev/mlx5/mlx5_core/transobj.h> | ||||
#include <rdma/ib_user_verbs.h> | #include <rdma/ib_user_verbs.h> | ||||
#include <rdma/mlx5-abi.h> | #include <rdma/mlx5-abi.h> | ||||
#include <rdma/uverbs_ioctl.h> | |||||
#define mlx5_ib_dbg(dev, format, arg...) \ | #define mlx5_ib_dbg(dev, format, arg...) \ | ||||
pr_debug("%s:%s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ | pr_debug("%s:%s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ | ||||
__LINE__, current->pid, ##arg) | __LINE__, current->pid, ##arg) | ||||
#define mlx5_ib_err(dev, format, arg...) \ | #define mlx5_ib_err(dev, format, arg...) \ | ||||
pr_err("%s: ERR: %s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ | pr_err("%s: ERR: %s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ | ||||
__LINE__, current->pid, ##arg) | __LINE__, current->pid, ##arg) | ||||
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#define MLX5_MKEY_PAGE_SHIFT_MASK __mlx5_mask(mkc, log_page_size) | #define MLX5_MKEY_PAGE_SHIFT_MASK __mlx5_mask(mkc, log_page_size) | ||||
enum { | enum { | ||||
MLX5_IB_MMAP_CMD_SHIFT = 8, | MLX5_IB_MMAP_CMD_SHIFT = 8, | ||||
MLX5_IB_MMAP_CMD_MASK = 0xff, | MLX5_IB_MMAP_CMD_MASK = 0xff, | ||||
}; | }; | ||||
enum mlx5_ib_mmap_cmd { | |||||
MLX5_IB_MMAP_REGULAR_PAGE = 0, | |||||
MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES = 1, | |||||
MLX5_IB_MMAP_WC_PAGE = 2, | |||||
MLX5_IB_MMAP_NC_PAGE = 3, | |||||
/* 5 is chosen in order to be compatible with old versions of libmlx5 */ | |||||
MLX5_IB_MMAP_CORE_CLOCK = 5, | |||||
}; | |||||
enum { | enum { | ||||
MLX5_RES_SCAT_DATA32_CQE = 0x1, | MLX5_RES_SCAT_DATA32_CQE = 0x1, | ||||
MLX5_RES_SCAT_DATA64_CQE = 0x2, | MLX5_RES_SCAT_DATA64_CQE = 0x2, | ||||
MLX5_REQ_SCAT_DATA32_CQE = 0x11, | MLX5_REQ_SCAT_DATA32_CQE = 0x11, | ||||
MLX5_REQ_SCAT_DATA64_CQE = 0x22, | MLX5_REQ_SCAT_DATA64_CQE = 0x22, | ||||
}; | }; | ||||
enum mlx5_ib_latency_class { | enum mlx5_ib_latency_class { | ||||
Show All 18 Lines | enum { | ||||
MLX5_CQE_VERSION_V1, | MLX5_CQE_VERSION_V1, | ||||
}; | }; | ||||
enum { | enum { | ||||
MLX5_IB_INVALID_UAR_INDEX = BIT(31), | MLX5_IB_INVALID_UAR_INDEX = BIT(31), | ||||
MLX5_IB_INVALID_BFREG = BIT(31), | MLX5_IB_INVALID_BFREG = BIT(31), | ||||
}; | }; | ||||
struct mlx5_ib_vma_private_data { | enum mlx5_ib_mmap_type { | ||||
struct list_head list; | MLX5_IB_MMAP_TYPE_MEMIC = 1, | ||||
struct vm_area_struct *vma; | MLX5_IB_MMAP_TYPE_VAR = 2, | ||||
MLX5_IB_MMAP_TYPE_UAR_WC = 3, | |||||
MLX5_IB_MMAP_TYPE_UAR_NC = 4, | |||||
}; | }; | ||||
struct mlx5_bfreg_info { | struct mlx5_bfreg_info { | ||||
u32 *sys_pages; | u32 *sys_pages; | ||||
int num_low_latency_bfregs; | int num_low_latency_bfregs; | ||||
unsigned int *count; | unsigned int *count; | ||||
/* | /* | ||||
Show All 15 Lines | struct mlx5_ib_ucontext { | ||||
/* protect doorbell record alloc/free | /* protect doorbell record alloc/free | ||||
*/ | */ | ||||
struct mutex db_page_mutex; | struct mutex db_page_mutex; | ||||
struct mlx5_bfreg_info bfregi; | struct mlx5_bfreg_info bfregi; | ||||
u8 cqe_version; | u8 cqe_version; | ||||
/* Transport Domain number */ | /* Transport Domain number */ | ||||
u32 tdn; | u32 tdn; | ||||
struct list_head vma_private_list; | |||||
u64 lib_caps; | |||||
u16 devx_uid; | |||||
}; | }; | ||||
static inline struct mlx5_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext) | static inline struct mlx5_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext) | ||||
{ | { | ||||
return container_of(ibucontext, struct mlx5_ib_ucontext, ibucontext); | return container_of(ibucontext, struct mlx5_ib_ucontext, ibucontext); | ||||
} | } | ||||
struct mlx5_ib_pd { | struct mlx5_ib_pd { | ||||
struct ib_pd ibpd; | struct ib_pd ibpd; | ||||
u32 pdn; | u32 pdn; | ||||
u16 uid; | |||||
}; | }; | ||||
#define MLX5_IB_FLOW_MCAST_PRIO (MLX5_BY_PASS_NUM_PRIOS - 1) | #define MLX5_IB_FLOW_MCAST_PRIO (MLX5_BY_PASS_NUM_PRIOS - 1) | ||||
#define MLX5_IB_FLOW_LAST_PRIO (MLX5_BY_PASS_NUM_REGULAR_PRIOS - 1) | #define MLX5_IB_FLOW_LAST_PRIO (MLX5_BY_PASS_NUM_REGULAR_PRIOS - 1) | ||||
#if (MLX5_IB_FLOW_LAST_PRIO <= 0) | #if (MLX5_IB_FLOW_LAST_PRIO <= 0) | ||||
#error "Invalid number of bypass priorities" | #error "Invalid number of bypass priorities" | ||||
#endif | #endif | ||||
#define MLX5_IB_FLOW_LEFTOVERS_PRIO (MLX5_IB_FLOW_MCAST_PRIO + 1) | #define MLX5_IB_FLOW_LEFTOVERS_PRIO (MLX5_IB_FLOW_MCAST_PRIO + 1) | ||||
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines | |||||
enum { | enum { | ||||
MLX5_WQ_USER, | MLX5_WQ_USER, | ||||
MLX5_WQ_KERNEL | MLX5_WQ_KERNEL | ||||
}; | }; | ||||
struct mlx5_ib_rwq_ind_table { | struct mlx5_ib_rwq_ind_table { | ||||
struct ib_rwq_ind_table ib_rwq_ind_tbl; | struct ib_rwq_ind_table ib_rwq_ind_tbl; | ||||
u32 rqtn; | u32 rqtn; | ||||
u16 uid; | |||||
}; | }; | ||||
/* | /* | ||||
* Connect-IB can trigger up to four concurrent pagefaults | * Connect-IB can trigger up to four concurrent pagefaults | ||||
* per-QP. | * per-QP. | ||||
*/ | */ | ||||
enum mlx5_ib_pagefault_context { | enum mlx5_ib_pagefault_context { | ||||
MLX5_IB_PAGEFAULT_RESPONDER_READ, | MLX5_IB_PAGEFAULT_RESPONDER_READ, | ||||
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines | |||||
struct mlx5_bf { | struct mlx5_bf { | ||||
int buf_size; | int buf_size; | ||||
unsigned long offset; | unsigned long offset; | ||||
struct mlx5_sq_bfreg *bfreg; | struct mlx5_sq_bfreg *bfreg; | ||||
spinlock_t lock32; | spinlock_t lock32; | ||||
}; | }; | ||||
struct mlx5_ib_dct { | |||||
struct mlx5_core_dct mdct; | |||||
u32 *in; | |||||
}; | |||||
struct mlx5_ib_qp { | struct mlx5_ib_qp { | ||||
struct ib_qp ibqp; | struct ib_qp ibqp; | ||||
union { | union { | ||||
struct mlx5_ib_qp_trans trans_qp; | struct mlx5_ib_qp_trans trans_qp; | ||||
struct mlx5_ib_raw_packet_qp raw_packet_qp; | struct mlx5_ib_raw_packet_qp raw_packet_qp; | ||||
struct mlx5_ib_rss_qp rss_qp; | struct mlx5_ib_rss_qp rss_qp; | ||||
struct mlx5_ib_dct dct; | |||||
}; | }; | ||||
struct mlx5_buf buf; | struct mlx5_buf buf; | ||||
struct mlx5_db db; | struct mlx5_db db; | ||||
struct mlx5_ib_wq rq; | struct mlx5_ib_wq rq; | ||||
u8 sq_signal_bits; | u8 sq_signal_bits; | ||||
u8 fm_cache; | u8 fm_cache; | ||||
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines | enum mlx5_ib_qp_flags { | ||||
MLX5_IB_QP_CROSS_CHANNEL = IB_QP_CREATE_CROSS_CHANNEL, | MLX5_IB_QP_CROSS_CHANNEL = IB_QP_CREATE_CROSS_CHANNEL, | ||||
MLX5_IB_QP_MANAGED_SEND = IB_QP_CREATE_MANAGED_SEND, | MLX5_IB_QP_MANAGED_SEND = IB_QP_CREATE_MANAGED_SEND, | ||||
MLX5_IB_QP_MANAGED_RECV = IB_QP_CREATE_MANAGED_RECV, | MLX5_IB_QP_MANAGED_RECV = IB_QP_CREATE_MANAGED_RECV, | ||||
MLX5_IB_QP_SIGNATURE_HANDLING = 1 << 5, | MLX5_IB_QP_SIGNATURE_HANDLING = 1 << 5, | ||||
/* QP uses 1 as its source QP number */ | /* QP uses 1 as its source QP number */ | ||||
MLX5_IB_QP_SQPN_QP1 = 1 << 6, | MLX5_IB_QP_SQPN_QP1 = 1 << 6, | ||||
MLX5_IB_QP_CAP_SCATTER_FCS = 1 << 7, | MLX5_IB_QP_CAP_SCATTER_FCS = 1 << 7, | ||||
MLX5_IB_QP_RSS = 1 << 8, | MLX5_IB_QP_RSS = 1 << 8, | ||||
MLX5_IB_QP_UNDERLAY = 1 << 10, | |||||
}; | }; | ||||
struct mlx5_umr_wr { | struct mlx5_umr_wr { | ||||
struct ib_send_wr wr; | struct ib_send_wr wr; | ||||
union { | union { | ||||
u64 virt_addr; | u64 virt_addr; | ||||
u64 offset; | u64 offset; | ||||
} target; | } target; | ||||
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines | struct mlx5_ib_xrcd { | ||||
u32 xrcdn; | u32 xrcdn; | ||||
}; | }; | ||||
enum mlx5_ib_mtt_access_flags { | enum mlx5_ib_mtt_access_flags { | ||||
MLX5_IB_MTT_READ = (1 << 0), | MLX5_IB_MTT_READ = (1 << 0), | ||||
MLX5_IB_MTT_WRITE = (1 << 1), | MLX5_IB_MTT_WRITE = (1 << 1), | ||||
}; | }; | ||||
struct mlx5_user_mmap_entry { | |||||
struct rdma_user_mmap_entry rdma_entry; | |||||
u8 mmap_flag; | |||||
u64 address; | |||||
u32 page_idx; | |||||
}; | |||||
#define MLX5_IB_MTT_PRESENT (MLX5_IB_MTT_READ | MLX5_IB_MTT_WRITE) | #define MLX5_IB_MTT_PRESENT (MLX5_IB_MTT_READ | MLX5_IB_MTT_WRITE) | ||||
struct mlx5_ib_mr { | struct mlx5_ib_mr { | ||||
struct ib_mr ibmr; | struct ib_mr ibmr; | ||||
void *descs; | void *descs; | ||||
dma_addr_t desc_map; | dma_addr_t desc_map; | ||||
int ndescs; | int ndescs; | ||||
int max_descs; | int max_descs; | ||||
int desc_size; | int desc_size; | ||||
int access_mode; | int access_mode; | ||||
struct mlx5_core_mr mmkey; | struct mlx5_core_mkey mmkey; | ||||
struct ib_umem *umem; | struct ib_umem *umem; | ||||
struct mlx5_shared_mr_info *smr_info; | struct mlx5_shared_mr_info *smr_info; | ||||
struct list_head list; | struct list_head list; | ||||
int order; | int order; | ||||
int umred; | int umred; | ||||
int npages; | int npages; | ||||
struct mlx5_ib_dev *dev; | struct mlx5_ib_dev *dev; | ||||
u32 out[MLX5_ST_SZ_DW(create_mkey_out)]; | u32 out[MLX5_ST_SZ_DW(create_mkey_out)]; | ||||
struct mlx5_core_sig_ctx *sig; | struct mlx5_core_sig_ctx *sig; | ||||
int live; | int live; | ||||
void *descs_alloc; | void *descs_alloc; | ||||
int access_flags; /* Needed for rereg MR */ | int access_flags; /* Needed for rereg MR */ | ||||
struct mlx5_async_work cb_work; | struct mlx5_async_work cb_work; | ||||
}; | }; | ||||
struct mlx5_ib_mw { | struct mlx5_ib_mw { | ||||
struct ib_mw ibmw; | struct ib_mw ibmw; | ||||
struct mlx5_core_mr mmkey; | struct mlx5_core_mkey mmkey; | ||||
}; | }; | ||||
struct mlx5_ib_devx_mr { | |||||
struct mlx5_core_mkey mmkey; | |||||
int ndescs; | |||||
}; | |||||
struct mlx5_ib_umr_context { | struct mlx5_ib_umr_context { | ||||
struct ib_cqe cqe; | struct ib_cqe cqe; | ||||
enum ib_wc_status status; | enum ib_wc_status status; | ||||
struct completion done; | struct completion done; | ||||
}; | }; | ||||
struct umr_common { | struct umr_common { | ||||
struct ib_pd *pd; | struct ib_pd *pd; | ||||
▲ Show 20 Lines • Show All 166 Lines • ▼ Show 20 Lines | union { | ||||
struct { | struct { | ||||
MLX5_IB_CONG_PARAMS(MLX5_IB_STATS_VAR) | MLX5_IB_CONG_PARAMS(MLX5_IB_STATS_VAR) | ||||
MLX5_IB_CONG_STATS(MLX5_IB_STATS_VAR) | MLX5_IB_CONG_STATS(MLX5_IB_STATS_VAR) | ||||
MLX5_IB_CONG_STATUS(MLX5_IB_STATS_VAR) | MLX5_IB_CONG_STATUS(MLX5_IB_STATS_VAR) | ||||
}; | }; | ||||
}; | }; | ||||
}; | }; | ||||
struct mlx5_devx_event_table { | |||||
/* serialize updating the event_xa */ | |||||
struct mutex event_xa_lock; | |||||
struct xarray event_xa; | |||||
}; | |||||
struct mlx5_ib_dev { | struct mlx5_ib_dev { | ||||
struct ib_device ib_dev; | struct ib_device ib_dev; | ||||
struct mlx5_core_dev *mdev; | struct mlx5_core_dev *mdev; | ||||
struct mlx5_roce roce; | struct mlx5_roce roce; | ||||
MLX5_DECLARE_DOORBELL_LOCK(uar_lock); | MLX5_DECLARE_DOORBELL_LOCK(uar_lock); | ||||
int num_ports; | int num_ports; | ||||
/* serialize update of capability mask | /* serialize update of capability mask | ||||
*/ | */ | ||||
struct mutex cap_mask_mutex; | struct mutex cap_mask_mutex; | ||||
bool ib_active; | u8 ib_active:1; | ||||
u8 wc_support:1; | |||||
struct umr_common umrc; | struct umr_common umrc; | ||||
/* sync used page count stats | /* sync used page count stats | ||||
*/ | */ | ||||
struct mlx5_ib_resources devr; | struct mlx5_ib_resources devr; | ||||
struct mlx5_mr_cache cache; | struct mlx5_mr_cache cache; | ||||
struct timer_list delay_timer; | struct timer_list delay_timer; | ||||
/* Prevents soft lock on massive reg MRs */ | /* Prevents soft lock on massive reg MRs */ | ||||
struct mutex slow_path_mutex; | struct mutex slow_path_mutex; | ||||
Show All 10 Lines | #endif | ||||
/* protect resources needed as part of reset flow */ | /* protect resources needed as part of reset flow */ | ||||
spinlock_t reset_flow_resource_lock; | spinlock_t reset_flow_resource_lock; | ||||
struct list_head qp_list; | struct list_head qp_list; | ||||
/* Array with num_ports elements */ | /* Array with num_ports elements */ | ||||
struct mlx5_ib_port *port; | struct mlx5_ib_port *port; | ||||
struct mlx5_sq_bfreg bfreg; | struct mlx5_sq_bfreg bfreg; | ||||
struct mlx5_sq_bfreg wc_bfreg; | struct mlx5_sq_bfreg wc_bfreg; | ||||
struct mlx5_sq_bfreg fp_bfreg; | struct mlx5_sq_bfreg fp_bfreg; | ||||
struct mlx5_devx_event_table devx_event_table; | |||||
struct mlx5_ib_congestion congestion; | struct mlx5_ib_congestion congestion; | ||||
struct mlx5_async_ctx async_ctx; | struct mlx5_async_ctx async_ctx; | ||||
}; | }; | ||||
static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq) | static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq) | ||||
{ | { | ||||
return container_of(mcq, struct mlx5_ib_cq, mcq); | return container_of(mcq, struct mlx5_ib_cq, mcq); | ||||
} | } | ||||
static inline struct mlx5_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd) | static inline struct mlx5_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd) | ||||
{ | { | ||||
return container_of(ibxrcd, struct mlx5_ib_xrcd, ibxrcd); | return container_of(ibxrcd, struct mlx5_ib_xrcd, ibxrcd); | ||||
} | } | ||||
static inline struct mlx5_ib_dev *to_mdev(struct ib_device *ibdev) | static inline struct mlx5_ib_dev *to_mdev(struct ib_device *ibdev) | ||||
{ | { | ||||
return container_of(ibdev, struct mlx5_ib_dev, ib_dev); | return container_of(ibdev, struct mlx5_ib_dev, ib_dev); | ||||
} | } | ||||
static inline struct mlx5_ib_dev *mlx5_udata_to_mdev(struct ib_udata *udata) | |||||
{ | |||||
struct mlx5_ib_ucontext *context = rdma_udata_to_drv_context( | |||||
udata, struct mlx5_ib_ucontext, ibucontext); | |||||
return to_mdev(context->ibucontext.device); | |||||
} | |||||
static inline struct mlx5_ib_cq *to_mcq(struct ib_cq *ibcq) | static inline struct mlx5_ib_cq *to_mcq(struct ib_cq *ibcq) | ||||
{ | { | ||||
return container_of(ibcq, struct mlx5_ib_cq, ibcq); | return container_of(ibcq, struct mlx5_ib_cq, ibcq); | ||||
} | } | ||||
static inline struct mlx5_ib_qp *to_mibqp(struct mlx5_core_qp *mqp) | static inline struct mlx5_ib_qp *to_mibqp(struct mlx5_core_qp *mqp) | ||||
{ | { | ||||
return container_of(mqp, struct mlx5_ib_qp_base, mqp)->container_mibqp; | return container_of(mqp, struct mlx5_ib_qp_base, mqp)->container_mibqp; | ||||
} | } | ||||
static inline struct mlx5_ib_rwq *to_mibrwq(struct mlx5_core_qp *core_qp) | static inline struct mlx5_ib_rwq *to_mibrwq(struct mlx5_core_qp *core_qp) | ||||
{ | { | ||||
return container_of(core_qp, struct mlx5_ib_rwq, core_qp); | return container_of(core_qp, struct mlx5_ib_rwq, core_qp); | ||||
} | } | ||||
static inline struct mlx5_ib_mr *to_mibmr(struct mlx5_core_mr *mmkey) | static inline struct mlx5_ib_mr *to_mibmr(struct mlx5_core_mkey *mmkey) | ||||
{ | { | ||||
return container_of(mmkey, struct mlx5_ib_mr, mmkey); | return container_of(mmkey, struct mlx5_ib_mr, mmkey); | ||||
} | } | ||||
static inline struct mlx5_ib_pd *to_mpd(struct ib_pd *ibpd) | static inline struct mlx5_ib_pd *to_mpd(struct ib_pd *ibpd) | ||||
{ | { | ||||
return container_of(ibpd, struct mlx5_ib_pd, ibpd); | return container_of(ibpd, struct mlx5_ib_pd, ibpd); | ||||
} | } | ||||
Show All 38 Lines | struct mlx5_ib_ah { | ||||
struct mlx5_av av; | struct mlx5_av av; | ||||
}; | }; | ||||
static inline struct mlx5_ib_ah *to_mah(struct ib_ah *ibah) | static inline struct mlx5_ib_ah *to_mah(struct ib_ah *ibah) | ||||
{ | { | ||||
return container_of(ibah, struct mlx5_ib_ah, ibah); | return container_of(ibah, struct mlx5_ib_ah, ibah); | ||||
} | } | ||||
static inline struct mlx5_user_mmap_entry * | |||||
to_mmmap(struct rdma_user_mmap_entry *rdma_entry) | |||||
{ | |||||
return container_of(rdma_entry, | |||||
struct mlx5_user_mmap_entry, rdma_entry); | |||||
} | |||||
int mlx5_ib_db_map_user(struct mlx5_ib_ucontext *context, unsigned long virt, | int mlx5_ib_db_map_user(struct mlx5_ib_ucontext *context, unsigned long virt, | ||||
struct mlx5_db *db); | struct mlx5_db *db); | ||||
void mlx5_ib_db_unmap_user(struct mlx5_ib_ucontext *context, struct mlx5_db *db); | void mlx5_ib_db_unmap_user(struct mlx5_ib_ucontext *context, struct mlx5_db *db); | ||||
void __mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq); | void __mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq); | ||||
void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq); | void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq); | ||||
void mlx5_ib_free_srq_wqe(struct mlx5_ib_srq *srq, int wqe_index); | void mlx5_ib_free_srq_wqe(struct mlx5_ib_srq *srq, int wqe_index); | ||||
int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey, | int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey, | ||||
u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh, | u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh, | ||||
const void *in_mad, void *response_mad); | const void *in_mad, void *response_mad); | ||||
struct ib_ah *mlx5_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, | int mlx5_ib_create_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr, u32 flags, | ||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr); | int mlx5_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr); | ||||
int mlx5_ib_destroy_ah(struct ib_ah *ah); | void mlx5_ib_destroy_ah(struct ib_ah *ah, u32 flags); | ||||
struct ib_srq *mlx5_ib_create_srq(struct ib_pd *pd, | int mlx5_ib_create_srq(struct ib_srq *srq, struct ib_srq_init_attr *init_attr, | ||||
struct ib_srq_init_attr *init_attr, | |||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, | int mlx5_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, | ||||
enum ib_srq_attr_mask attr_mask, struct ib_udata *udata); | enum ib_srq_attr_mask attr_mask, struct ib_udata *udata); | ||||
int mlx5_ib_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr); | int mlx5_ib_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr); | ||||
int mlx5_ib_destroy_srq(struct ib_srq *srq); | void mlx5_ib_destroy_srq(struct ib_srq *srq, struct ib_udata *udata); | ||||
int mlx5_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, | int mlx5_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, | ||||
const struct ib_recv_wr **bad_wr); | const struct ib_recv_wr **bad_wr); | ||||
struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, | struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, | ||||
struct ib_qp_init_attr *init_attr, | struct ib_qp_init_attr *init_attr, | ||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | ||||
int attr_mask, struct ib_udata *udata); | int attr_mask, struct ib_udata *udata); | ||||
int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask, | int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask, | ||||
struct ib_qp_init_attr *qp_init_attr); | struct ib_qp_init_attr *qp_init_attr); | ||||
int mlx5_ib_destroy_qp(struct ib_qp *qp); | int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata); | ||||
int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, | int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, | ||||
const struct ib_send_wr **bad_wr); | const struct ib_send_wr **bad_wr); | ||||
int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, | int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, | ||||
const struct ib_recv_wr **bad_wr); | const struct ib_recv_wr **bad_wr); | ||||
void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n); | void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n); | ||||
int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, | int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, | ||||
void *buffer, u32 length, | void *buffer, u32 length, | ||||
struct mlx5_ib_qp_base *base); | struct mlx5_ib_qp_base *base); | ||||
struct ib_cq *mlx5_ib_create_cq(struct ib_device *ibdev, | int mlx5_ib_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, | ||||
const struct ib_cq_init_attr *attr, | |||||
struct ib_ucontext *context, | |||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_destroy_cq(struct ib_cq *cq); | void mlx5_ib_destroy_cq(struct ib_cq *cq, struct ib_udata *udata); | ||||
int mlx5_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); | int mlx5_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); | ||||
int mlx5_ib_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags); | int mlx5_ib_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags); | ||||
int mlx5_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period); | int mlx5_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period); | ||||
int mlx5_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata); | int mlx5_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata); | ||||
struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc); | struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc); | ||||
struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, | struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, | ||||
u64 virt_addr, int access_flags, | u64 virt_addr, int access_flags, | ||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
struct ib_mw *mlx5_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type, | struct ib_mw *mlx5_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type, | ||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_dealloc_mw(struct ib_mw *mw); | int mlx5_ib_dealloc_mw(struct ib_mw *mw); | ||||
int mlx5_ib_update_mtt(struct mlx5_ib_mr *mr, u64 start_page_index, | int mlx5_ib_update_mtt(struct mlx5_ib_mr *mr, u64 start_page_index, | ||||
int npages, int zap); | int npages, int zap); | ||||
int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start, | int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start, | ||||
u64 length, u64 virt_addr, int access_flags, | u64 length, u64 virt_addr, int access_flags, | ||||
struct ib_pd *pd, struct ib_udata *udata); | struct ib_pd *pd, struct ib_udata *udata); | ||||
int mlx5_ib_dereg_mr(struct ib_mr *ibmr); | int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata); | ||||
struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, | struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, | ||||
enum ib_mr_type mr_type, | u32 max_num_sg, struct ib_udata *udata); | ||||
u32 max_num_sg); | |||||
int mlx5_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, | int mlx5_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, | ||||
unsigned int *sg_offset); | unsigned int *sg_offset); | ||||
int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num, | int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num, | ||||
const struct ib_wc *in_wc, const struct ib_grh *in_grh, | const struct ib_wc *in_wc, const struct ib_grh *in_grh, | ||||
const struct ib_mad_hdr *in, size_t in_mad_size, | const struct ib_mad_hdr *in, size_t in_mad_size, | ||||
struct ib_mad_hdr *out, size_t *out_mad_size, | struct ib_mad_hdr *out, size_t *out_mad_size, | ||||
u16 *out_mad_pkey_index); | u16 *out_mad_pkey_index); | ||||
struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, | struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, | ||||
struct ib_ucontext *context, | |||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd); | int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata); | ||||
int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset); | int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset); | ||||
int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port); | int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port); | ||||
int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev, | int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev, | ||||
struct ib_smp *out_mad); | struct ib_smp *out_mad); | ||||
int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev, | int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev, | ||||
__be64 *sys_image_guid); | __be64 *sys_image_guid); | ||||
int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev, | int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev, | ||||
u16 *max_pkeys); | u16 *max_pkeys); | ||||
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int mlx5_mr_cache_init(struct mlx5_ib_dev *dev); | int mlx5_mr_cache_init(struct mlx5_ib_dev *dev); | ||||
int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev); | int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev); | ||||
int mlx5_mr_ib_cont_pages(struct ib_umem *umem, u64 addr, int *count, int *shift); | int mlx5_mr_ib_cont_pages(struct ib_umem *umem, u64 addr, int *count, int *shift); | ||||
int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask, | int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask, | ||||
struct ib_mr_status *mr_status); | struct ib_mr_status *mr_status); | ||||
struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, | struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, | ||||
struct ib_wq_init_attr *init_attr, | struct ib_wq_init_attr *init_attr, | ||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_destroy_wq(struct ib_wq *wq); | void mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata); | ||||
int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, | int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, | ||||
u32 wq_attr_mask, struct ib_udata *udata); | u32 wq_attr_mask, struct ib_udata *udata); | ||||
struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, | struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, | ||||
struct ib_rwq_ind_table_init_attr *init_attr, | struct ib_rwq_ind_table_init_attr *init_attr, | ||||
struct ib_udata *udata); | struct ib_udata *udata); | ||||
int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table); | int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table); | ||||
#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING | #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING | ||||
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int mlx5_ib_gsi_post_recv(struct ib_qp *qp, const struct ib_recv_wr *wr, | int mlx5_ib_gsi_post_recv(struct ib_qp *qp, const struct ib_recv_wr *wr, | ||||
const struct ib_recv_wr **bad_wr); | const struct ib_recv_wr **bad_wr); | ||||
void mlx5_ib_gsi_pkey_change(struct mlx5_ib_gsi_qp *gsi); | void mlx5_ib_gsi_pkey_change(struct mlx5_ib_gsi_qp *gsi); | ||||
int mlx5_ib_generate_wc(struct ib_cq *ibcq, struct ib_wc *wc); | int mlx5_ib_generate_wc(struct ib_cq *ibcq, struct ib_wc *wc); | ||||
void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, | void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, | ||||
int bfregn); | int bfregn); | ||||
#if 1 /* IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS) */ | |||||
int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user); | |||||
void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid); | |||||
void mlx5_ib_devx_init_event_table(struct mlx5_ib_dev *dev); | |||||
void mlx5_ib_devx_cleanup_event_table(struct mlx5_ib_dev *dev); | |||||
bool mlx5_ib_devx_is_flow_dest(void *obj, int *dest_id, int *dest_type); | |||||
bool mlx5_ib_devx_is_flow_counter(void *obj, u32 offset, u32 *counter_id); | |||||
#else | |||||
static inline int | |||||
mlx5_ib_devx_create(struct mlx5_ib_dev *dev, | |||||
bool is_user) { return -EOPNOTSUPP; } | |||||
static inline void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid) {} | |||||
static inline void mlx5_ib_devx_init_event_table(struct mlx5_ib_dev *dev) {} | |||||
static inline void mlx5_ib_devx_cleanup_event_table(struct mlx5_ib_dev *dev) {} | |||||
static inline bool mlx5_ib_devx_is_flow_dest(void *obj, int *dest_id, | |||||
int *dest_type) | |||||
{ | |||||
return false; | |||||
} | |||||
#endif | |||||
static inline void init_query_mad(struct ib_smp *mad) | static inline void init_query_mad(struct ib_smp *mad) | ||||
{ | { | ||||
mad->base_version = 1; | mad->base_version = 1; | ||||
mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; | mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; | ||||
mad->class_version = 1; | mad->class_version = 1; | ||||
mad->method = IB_MGMT_METHOD_GET; | mad->method = IB_MGMT_METHOD_GET; | ||||
} | } | ||||
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