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sys/boot/fdt/dts/arm/db78460.dts
| Show First 20 Lines • Show All 105 Lines • ▼ Show 20 Lines | twsi@11100 { | ||||
| #size-cells = <0>; | #size-cells = <0>; | ||||
| compatible = "mrvl,twsi"; | compatible = "mrvl,twsi"; | ||||
| reg = <0x11100 0x20>; | reg = <0x11100 0x20>; | ||||
| interrupts = <32>; | interrupts = <32>; | ||||
| interrupt-parent = <&MPIC>; | interrupt-parent = <&MPIC>; | ||||
| }; | }; | ||||
| serial0: serial@12000 { | serial0: serial@12000 { | ||||
| compatible = "ns16550"; | compatible = "snps,dw-apb-uart"; | ||||
| reg = <0x12000 0x20>; | reg = <0x12000 0x20>; | ||||
| reg-shift = <2>; | reg-shift = <2>; | ||||
| current-speed = <115200>; | current-speed = <115200>; | ||||
| clock-frequency = <0>; | clock-frequency = <0>; | ||||
| busy-detect = <1>; | |||||
| interrupts = <41>; | interrupts = <41>; | ||||
| interrupt-parent = <&MPIC>; | interrupt-parent = <&MPIC>; | ||||
| }; | }; | ||||
| serial1: serial@12100 { | serial1: serial@12100 { | ||||
| compatible = "ns16550"; | compatible = "snps,dw-apb-uart"; | ||||
| reg = <0x12100 0x20>; | reg = <0x12100 0x20>; | ||||
| reg-shift = <2>; | reg-shift = <2>; | ||||
| current-speed = <115200>; | current-speed = <115200>; | ||||
| clock-frequency = <0>; | clock-frequency = <0>; | ||||
| busy-detect = <1>; | |||||
| interrupts = <42>; | interrupts = <42>; | ||||
| interrupt-parent = <&MPIC>; | interrupt-parent = <&MPIC>; | ||||
| }; | }; | ||||
| serial2: serial@12200 { | serial2: serial@12200 { | ||||
| compatible = "ns16550"; | compatible = "snps,dw-apb-uart"; | ||||
| reg = <0x12200 0x20>; | reg = <0x12200 0x20>; | ||||
| reg-shift = <2>; | reg-shift = <2>; | ||||
| current-speed = <115200>; | current-speed = <115200>; | ||||
| clock-frequency = <0>; | clock-frequency = <0>; | ||||
| busy-detect = <1>; | |||||
| interrupts = <43>; | interrupts = <43>; | ||||
| interrupt-parent = <&MPIC>; | interrupt-parent = <&MPIC>; | ||||
| }; | }; | ||||
| serial3: serial@12300 { | serial3: serial@12300 { | ||||
| compatible = "ns16550"; | compatible = "snps,dw-apb-uart"; | ||||
| reg = <0x12300 0x20>; | reg = <0x12300 0x20>; | ||||
| reg-shift = <2>; | reg-shift = <2>; | ||||
| current-speed = <115200>; | current-speed = <115200>; | ||||
| clock-frequency = <0>; | clock-frequency = <0>; | ||||
| busy-detect = <1>; | |||||
| interrupts = <44>; | interrupts = <44>; | ||||
| interrupt-parent = <&MPIC>; | interrupt-parent = <&MPIC>; | ||||
| }; | }; | ||||
| MPP: mpp@10000 { | MPP: mpp@10000 { | ||||
| #pin-cells = <2>; | #pin-cells = <2>; | ||||
| compatible = "mrvl,mpp"; | compatible = "mrvl,mpp"; | ||||
| reg = <0x18000 0x34>; | reg = <0x18000 0x34>; | ||||
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