Differential D31565 Diff 93767 sys/dev/ixl/i40e_register.h

Changeset View

Standalone View

sys/dev/ixl/i40e_register.h

This file is larger than 256 KB, so syntax highlighting is disabled by default.

	Show First 20 Lines • Show All 226 Lines • ▼ Show 20 Lines
	#define I40E_VFCM_PE_ERRINFO1_ERROR_INST_SHIFT 4			#define I40E_VFCM_PE_ERRINFO1_ERROR_INST_SHIFT 4
	#define I40E_VFCM_PE_ERRINFO1_ERROR_INST_MASK I40E_MASK(0x7, I40E_VFCM_PE_ERRINFO1_ERROR_INST_SHIFT)			#define I40E_VFCM_PE_ERRINFO1_ERROR_INST_MASK I40E_MASK(0x7, I40E_VFCM_PE_ERRINFO1_ERROR_INST_SHIFT)
	#define I40E_VFCM_PE_ERRINFO1_DBL_ERROR_CNT_SHIFT 8			#define I40E_VFCM_PE_ERRINFO1_DBL_ERROR_CNT_SHIFT 8
	#define I40E_VFCM_PE_ERRINFO1_DBL_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_DBL_ERROR_CNT_SHIFT)			#define I40E_VFCM_PE_ERRINFO1_DBL_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_DBL_ERROR_CNT_SHIFT)
	#define I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_SHIFT 16			#define I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_SHIFT 16
	#define I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_SHIFT)			#define I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_SHIFT)
	#define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT 24			#define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT 24
	#define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT)			#define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT)
				#define I40E_PRT_SWR_PM_THR 0x0026CD00 /* Reset: CORER */
				#define I40E_PRT_SWR_PM_THR_THRESHOLD_SHIFT 0
				#define I40E_PRT_SWR_PM_THR_THRESHOLD_MASK I40E_MASK(0xFF, I40E_PRT_SWR_PM_THR_THRESHOLD_SHIFT)
	#define I40E_GLDCB_GENC 0x00083044 /* Reset: CORER */			#define I40E_GLDCB_GENC 0x00083044 /* Reset: CORER */
	#define I40E_GLDCB_GENC_PCIRTT_SHIFT 0			#define I40E_GLDCB_GENC_PCIRTT_SHIFT 0
	#define I40E_GLDCB_GENC_PCIRTT_MASK I40E_MASK(0xFFFF, I40E_GLDCB_GENC_PCIRTT_SHIFT)			#define I40E_GLDCB_GENC_PCIRTT_MASK I40E_MASK(0xFFFF, I40E_GLDCB_GENC_PCIRTT_SHIFT)
	#define I40E_GLDCB_RUPTI 0x00122618 /* Reset: CORER */			#define I40E_GLDCB_RUPTI 0x00122618 /* Reset: CORER */
	#define I40E_GLDCB_RUPTI_PFCTIMEOUT_UP_SHIFT 0			#define I40E_GLDCB_RUPTI_PFCTIMEOUT_UP_SHIFT 0
	#define I40E_GLDCB_RUPTI_PFCTIMEOUT_UP_MASK I40E_MASK(0xFFFFFFFF, I40E_GLDCB_RUPTI_PFCTIMEOUT_UP_SHIFT)			#define I40E_GLDCB_RUPTI_PFCTIMEOUT_UP_MASK I40E_MASK(0xFFFFFFFF, I40E_GLDCB_RUPTI_PFCTIMEOUT_UP_SHIFT)
	#define I40E_PRTDCB_FCCFG 0x001E4640 /* Reset: GLOBR */			#define I40E_PRTDCB_FCCFG 0x001E4640 /* Reset: GLOBR */
	#define I40E_PRTDCB_FCCFG_TFCE_SHIFT 3			#define I40E_PRTDCB_FCCFG_TFCE_SHIFT 3
	▲ Show 20 Lines • Show All 5,135 Lines • Show Last 20 Lines