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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||||
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||||
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||||
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||||
.\" SUCH DAMAGE. | .\" SUCH DAMAGE. | ||||
.\" | .\" | ||||
.\" $FreeBSD$ | .\" $FreeBSD$ | ||||
.\" | .\" | ||||
.Dd December 12, 2020 | .Dd August 5, 2021 | ||||
.Dt PMC 3 | .Dt PMC 3 | ||||
.Os | .Os | ||||
.Sh NAME | .Sh NAME | ||||
.Nm pmc | .Nm pmc | ||||
.Nd library for accessing hardware performance monitoring counters | .Nd library for accessing hardware performance monitoring counters | ||||
.Sh LIBRARY | .Sh LIBRARY | ||||
.Lb libpmc | .Lb libpmc | ||||
.Sh SYNOPSIS | .Sh SYNOPSIS | ||||
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.Tn Intel | .Tn Intel | ||||
.Tn "Core2 Solo" , | .Tn "Core2 Solo" , | ||||
.Tn "Core2 Duo" | .Tn "Core2 Duo" | ||||
and | and | ||||
.Tn "Core2 Extreme" | .Tn "Core2 Extreme" | ||||
CPUs, and other CPUs conforming to version 2 of the | CPUs, and other CPUs conforming to version 2 of the | ||||
.Tn Intel | .Tn Intel | ||||
performance measurement architecture. | performance measurement architecture. | ||||
.It Li PMC_CPU_INTEL_P5 | |||||
.Tn Intel | |||||
.Tn "Pentium" | |||||
CPUs. | |||||
.It Li PMC_CPU_INTEL_P6 | |||||
.Tn Intel | |||||
.Tn "Pentium Pro" | |||||
CPUs. | |||||
.It Li PMC_CPU_INTEL_PII | |||||
.Tn "Intel Pentium II" | |||||
CPUs. | |||||
.It Li PMC_CPU_INTEL_PIII | |||||
.Tn "Intel Pentium III" | |||||
CPUs. | |||||
.It Li PMC_CPU_INTEL_PIV | |||||
.Tn "Intel Pentium 4" | |||||
CPUs. | |||||
.It Li PMC_CPU_INTEL_PM | |||||
.Tn "Intel Pentium M" | |||||
CPUs. | |||||
.El | .El | ||||
.Ss Supported PMCs | .Ss Supported PMCs | ||||
PMC supported by this library are named by the | PMC supported by this library are named by the | ||||
.Vt enum pmc_class | .Vt enum pmc_class | ||||
enumeration. | enumeration. | ||||
Supported PMC kinds include: | Supported PMC kinds include: | ||||
.Pp | .Pp | ||||
.Bl -tag -width "Li PMC_CLASS_IAF" -compact | .Bl -tag -width "Li PMC_CLASS_IAF" -compact | ||||
.It Li PMC_CLASS_IAF | .It Li PMC_CLASS_IAF | ||||
Fixed function hardware counters presents in CPUs conforming to the | Fixed function hardware counters presents in CPUs conforming to the | ||||
.Tn Intel | .Tn Intel | ||||
performance measurement architecture version 2 and later. | performance measurement architecture version 2 and later. | ||||
.It Li PMC_CLASS_IAP | .It Li PMC_CLASS_IAP | ||||
Programmable hardware counters present in CPUs conforming to the | Programmable hardware counters present in CPUs conforming to the | ||||
.Tn Intel | .Tn Intel | ||||
performance measurement architecture version 1 and later. | performance measurement architecture version 1 and later. | ||||
.It Li PMC_CLASS_K7 | .It Li PMC_CLASS_K7 | ||||
Programmable hardware counters present in | Programmable hardware counters present in | ||||
.Tn "AMD Athlon" | .Tn "AMD Athlon" | ||||
CPUs. | CPUs. | ||||
.It Li PMC_CLASS_K8 | .It Li PMC_CLASS_K8 | ||||
Programmable hardware counters present in | Programmable hardware counters present in | ||||
.Tn "AMD Athlon64" | .Tn "AMD Athlon64" | ||||
CPUs. | CPUs. | ||||
.It Li PMC_CLASS_P4 | |||||
Programmable hardware counters present in | |||||
.Tn "Intel Pentium 4" | |||||
CPUs. | |||||
.It Li PMC_CLASS_P5 | |||||
Programmable hardware counters present in | |||||
.Tn Intel | |||||
.Tn Pentium | |||||
CPUs. | |||||
.It Li PMC_CLASS_P6 | |||||
Programmable hardware counters present in | |||||
.Tn Intel | |||||
.Tn "Pentium Pro" , | |||||
.Tn "Pentium II" , | |||||
.Tn "Pentium III" , | |||||
.Tn "Celeron" , | |||||
and | |||||
.Tn "Pentium M" | |||||
CPUs. | |||||
.It Li PMC_CLASS_TSC | .It Li PMC_CLASS_TSC | ||||
The timestamp counter on i386 and amd64 architecture CPUs. | The timestamp counter on i386 and amd64 architecture CPUs. | ||||
.It Li PMC_CLASS_SOFT | .It Li PMC_CLASS_SOFT | ||||
Software events. | Software events. | ||||
.El | .El | ||||
.Ss PMC Capabilities | .Ss PMC Capabilities | ||||
Capabilities of performance monitoring hardware are denoted using | Capabilities of performance monitoring hardware are denoted using | ||||
the | the | ||||
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PMC architecture dependent event specifiers are described in the | PMC architecture dependent event specifiers are described in the | ||||
following manual pages: | following manual pages: | ||||
.Bl -column " PMC_CLASS_TSC " "MANUAL PAGE " | .Bl -column " PMC_CLASS_TSC " "MANUAL PAGE " | ||||
.It Em "PMC Class" Ta Em "Manual Page" | .It Em "PMC Class" Ta Em "Manual Page" | ||||
.It Li PMC_CLASS_IAF Ta Xr pmc.iaf 3 | .It Li PMC_CLASS_IAF Ta Xr pmc.iaf 3 | ||||
.It Li PMC_CLASS_IAP Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3 | .It Li PMC_CLASS_IAP Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3 | ||||
.It Li PMC_CLASS_K7 Ta Xr pmc.k7 3 | .It Li PMC_CLASS_K7 Ta Xr pmc.k7 3 | ||||
.It Li PMC_CLASS_K8 Ta Xr pmc.k8 3 | .It Li PMC_CLASS_K8 Ta Xr pmc.k8 3 | ||||
.It Li PMC_CLASS_P4 Ta Xr pmc.p4 3 | |||||
.It Li PMC_CLASS_P5 Ta Xr pmc.p5 3 | |||||
.It Li PMC_CLASS_P6 Ta Xr pmc.p6 3 | |||||
.It Li PMC_CLASS_TSC Ta Xr pmc.tsc 3 | .It Li PMC_CLASS_TSC Ta Xr pmc.tsc 3 | ||||
.El | .El | ||||
.Ss Event Name Aliases | .Ss Event Name Aliases | ||||
Event name aliases are PMC-independent names for commonly used events. | Event name aliases are PMC-independent names for commonly used events. | ||||
The following aliases are known to this version of the | The following aliases are known to this version of the | ||||
.Nm pmc | .Nm pmc | ||||
library: | library: | ||||
.Bl -tag -width indent | .Bl -tag -width indent | ||||
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.Xr pmc.haswellxeon 3 , | .Xr pmc.haswellxeon 3 , | ||||
.Xr pmc.iaf 3 , | .Xr pmc.iaf 3 , | ||||
.Xr pmc.ivybridge 3 , | .Xr pmc.ivybridge 3 , | ||||
.Xr pmc.ivybridgexeon 3 , | .Xr pmc.ivybridgexeon 3 , | ||||
.Xr pmc.k7 3 , | .Xr pmc.k7 3 , | ||||
.Xr pmc.k8 3 , | .Xr pmc.k8 3 , | ||||
.Xr pmc.mips24k 3 , | .Xr pmc.mips24k 3 , | ||||
.Xr pmc.octeon 3 , | .Xr pmc.octeon 3 , | ||||
.Xr pmc.p4 3 , | |||||
.Xr pmc.p5 3 , | |||||
.Xr pmc.p6 3 , | |||||
.Xr pmc.sandybridge 3 , | .Xr pmc.sandybridge 3 , | ||||
.Xr pmc.sandybridgeuc 3 , | .Xr pmc.sandybridgeuc 3 , | ||||
.Xr pmc.sandybridgexeon 3 , | .Xr pmc.sandybridgexeon 3 , | ||||
.Xr pmc.soft 3 , | .Xr pmc.soft 3 , | ||||
.Xr pmc.tsc 3 , | .Xr pmc.tsc 3 , | ||||
.Xr pmc.westmere 3 , | .Xr pmc.westmere 3 , | ||||
.Xr pmc.westmereuc 3 , | .Xr pmc.westmereuc 3 , | ||||
.Xr pmc_allocate 3 , | .Xr pmc_allocate 3 , | ||||
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