Differential D31333 Diff 92864 sys/arm64/arm64/identcpu.c

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sys/arm64/arm64/identcpu.c

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	struct mrs_user_reg {			struct mrs_user_reg {
	u_int reg;			u_int reg;
	u_int CRm;			u_int CRm;
	u_int Op2;			u_int Op2;
	size_t offset;			size_t offset;
	struct mrs_field *fields;			struct mrs_field *fields;
	};			};

				#define USER_REG(name, field_name) \
				{ \
				.reg = name, \
				.CRm = name##_CRm, \
				.Op2 = name##_op2, \
				.offset = __offsetof(struct cpu_desc, field_name), \
				.fields = field_name##_fields, \
				}
	static struct mrs_user_reg user_regs[] = {			static struct mrs_user_reg user_regs[] = {
	{ /* id_aa64isar0_el1 */			USER_REG(ID_AA64ISAR0_EL1, id_aa64isar0),
	.reg = ID_AA64ISAR0_EL1,			USER_REG(ID_AA64ISAR1_EL1, id_aa64isar1),
	.CRm = 6,			USER_REG(ID_AA64PFR0_EL1, id_aa64pfr0),
	.Op2 = 0,			USER_REG(ID_AA64DFR0_EL1, id_aa64dfr0),
	.offset = __offsetof(struct cpu_desc, id_aa64isar0),			USER_REG(ID_AA64MMFR0_EL1, id_aa64mmfr0),
	.fields = id_aa64isar0_fields,
	},
	{ /* id_aa64isar1_el1 */
	.reg = ID_AA64ISAR1_EL1,
	.CRm = 6,
	.Op2 = 1,
	.offset = __offsetof(struct cpu_desc, id_aa64isar1),
	.fields = id_aa64isar1_fields,
	},
	{ /* id_aa64pfr0_el1 */
	.reg = ID_AA64PFR0_EL1,
	.CRm = 4,
	.Op2 = 0,
	.offset = __offsetof(struct cpu_desc, id_aa64pfr0),
	.fields = id_aa64pfr0_fields,
	},
	{ /* id_aa64pfr0_el1 */
	.reg = ID_AA64PFR1_EL1,
	.CRm = 4,
	.Op2 = 1,
	.offset = __offsetof(struct cpu_desc, id_aa64pfr1),
	.fields = id_aa64pfr1_fields,
	},
	{ /* id_aa64dfr0_el1 */
	.reg = ID_AA64DFR0_EL1,
	.CRm = 5,
	.Op2 = 0,
	.offset = __offsetof(struct cpu_desc, id_aa64dfr0),
	.fields = id_aa64dfr0_fields,
	},
	{ /* id_aa64mmfr0_el1 */
	.reg = ID_AA64MMFR0_EL1,
	.CRm = 7,
	.Op2 = 0,
	.offset = __offsetof(struct cpu_desc, id_aa64mmfr0),
	.fields = id_aa64mmfr0_fields,
	},
	#ifdef COMPAT_FREEBSD32			#ifdef COMPAT_FREEBSD32
	{			USER_REG(ID_ISAR5_EL1, id_isar5),
	/* id_isar5_el1 */			USER_REG(MVFR0_EL1, mvfr0),
	.reg = ID_ISAR5_EL1,			USER_REG(MVFR1_EL1, mvfr1),
	.CRm = 2,
	.Op2 = 5,
	.offset = __offsetof(struct cpu_desc, id_isar5),
	.fields = id_isar5_fields,
	},
	{
	/* mvfr0 */
	.reg = MVFR0_EL1,
	.CRm = 3,
	.Op2 = 0,
	.offset = __offsetof(struct cpu_desc, mvfr0),
	.fields = mvfr0_fields,
	},
	{
	/* mvfr1 */
	.reg = MVFR1_EL1,
	.CRm = 3,
	.Op2 = 1,
	.offset = __offsetof(struct cpu_desc, mvfr1),
	.fields = mvfr1_fields,
	},
	#endif /* COMPAT_FREEBSD32 */			#endif /* COMPAT_FREEBSD32 */
	};			};

	#define CPU_DESC_FIELD(desc, idx) \			#define CPU_DESC_FIELD(desc, idx) \
	(uint64_t )((char *)&(desc) + user_regs[(idx)].offset)			(uint64_t )((char *)&(desc) + user_regs[(idx)].offset)

	static int			static int
	user_mrs_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame,			user_mrs_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame,
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