Differential D31201 Diff 92851 sys/arm64/arm64/identcpu.c

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sys/arm64/arm64/identcpu.c

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#include <machine/atomic.h>		#include <machine/atomic.h>
#include <machine/cpu.h>		#include <machine/cpu.h>
#include <machine/cpufunc.h>		#include <machine/cpufunc.h>
#include <machine/elf.h>		#include <machine/elf.h>
#include <machine/md_var.h>		#include <machine/md_var.h>
#include <machine/undefined.h>		#include <machine/undefined.h>

static void print_cpu_features(u_int cpu);		static void print_cpu_features(u_int cpu);
static u_long parse_cpu_features_hwcap(void);
static u_long parse_cpu_features_hwcap2(void);
#ifdef COMPAT_FREEBSD32		#ifdef COMPAT_FREEBSD32
static u_long parse_cpu_features_hwcap32(void);		static u_long parse_cpu_features_hwcap32(void);
static u_long parse_cpu_features_hwcap32_2(void);
#endif		#endif

char machine[] = "arm64";		char machine[] = "arm64";

#ifdef SCTL_MASK32		#ifdef SCTL_MASK32
extern int adaptive_machine_arch;		extern int adaptive_machine_arch;
#endif		#endif

▲ Show 20 Lines • Show All 216 Lines • ▼ Show 20 Lines	#define MRS_FIELD_VALUE_COUNT(_reg, _field, _desc) \
MRS_FIELD_VALUE(11ul<< _reg ## _ ## _field ## _SHIFT, "12 "_desc "s"), \		MRS_FIELD_VALUE(11ul<< _reg ## _ ## _field ## _SHIFT, "12 "_desc "s"), \
MRS_FIELD_VALUE(12ul<< _reg ## _ ## _field ## _SHIFT, "13 "_desc "s"), \		MRS_FIELD_VALUE(12ul<< _reg ## _ ## _field ## _SHIFT, "13 "_desc "s"), \
MRS_FIELD_VALUE(13ul<< _reg ## _ ## _field ## _SHIFT, "14 "_desc "s"), \		MRS_FIELD_VALUE(13ul<< _reg ## _ ## _field ## _SHIFT, "14 "_desc "s"), \
MRS_FIELD_VALUE(14ul<< _reg ## _ ## _field ## _SHIFT, "15 "_desc "s"), \		MRS_FIELD_VALUE(14ul<< _reg ## _ ## _field ## _SHIFT, "15 "_desc "s"), \
MRS_FIELD_VALUE(15ul<< _reg ## _ ## _field ## _SHIFT, "16 "_desc "s")		MRS_FIELD_VALUE(15ul<< _reg ## _ ## _field ## _SHIFT, "16 "_desc "s")

#define MRS_FIELD_VALUE_END { .desc = NULL }		#define MRS_FIELD_VALUE_END { .desc = NULL }

		struct mrs_field_hwcap {
		u_long *hwcap;
		uint64_t min;
		u_long hwcap_val;
		};

		#define MRS_HWCAP(_hwcap, _val, _min) \
		{ \
		.hwcap = (_hwcap), \
		.hwcap_val = (_val), \
		.min = (_min), \
		}

		#define MRS_HWCAP_END { .hwcap = NULL }

struct mrs_field {		struct mrs_field {
const char *name;		const char *name;
struct mrs_field_value *values;		struct mrs_field_value *values;
		struct mrs_field_hwcap *hwcaps;
uint64_t mask;		uint64_t mask;
bool sign;		bool sign;
u_int type;		u_int type;
u_int shift;		u_int shift;
};		};

#define MRS_FIELD(_register, _name, _sign, _type, _values) \		#define MRS_FIELD_HWCAP(_register, _name, _sign, _type, _values, _hwcap) \
{ \		{ \
.name = #_name, \		.name = #_name, \
.sign = (_sign), \		.sign = (_sign), \
.type = (_type), \		.type = (_type), \
.shift = _register ## _ ## _name ## _SHIFT, \		.shift = _register ## _ ## _name ## _SHIFT, \
.mask = _register ## _ ## _name ## _MASK, \		.mask = _register ## _ ## _name ## _MASK, \
.values = (_values), \		.values = (_values), \
		.hwcaps = (_hwcap), \
}		}

		#define MRS_FIELD(_register, _name, _sign, _type, _values) \
		MRS_FIELD_HWCAP(_register, _name, _sign, _type, _values, NULL)

#define MRS_FIELD_END { .type = MRS_INVALID, }		#define MRS_FIELD_END { .type = MRS_INVALID, }

/* ID_AA64AFR0_EL1 */		/* ID_AA64AFR0_EL1 */
static struct mrs_field id_aa64afr0_fields[] = {		static struct mrs_field id_aa64afr0_fields[] = {
MRS_FIELD_END,		MRS_FIELD_END,
};		};


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/* ID_AA64ISAR0_EL1 */		/* ID_AA64ISAR0_EL1 */
static struct mrs_field_value id_aa64isar0_rndr[] = {		static struct mrs_field_value id_aa64isar0_rndr[] = {
MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_IMPL, "RNG"),		MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_IMPL, "RNG"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_rndr_caps[] = {
		MRS_HWCAP(&elf_hwcap2, HWCAP2_RNG, ID_AA64ISAR0_RNDR_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_tlb[] = {		static struct mrs_field_value id_aa64isar0_tlb[] = {
MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_TLBIOS, "TLBI-OS"),		MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_TLBIOS, "TLBI-OS"),
MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_TLBIOSR, "TLBI-OSR"),		MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_TLBIOSR, "TLBI-OSR"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64isar0_ts[] = {		static struct mrs_field_value id_aa64isar0_ts[] = {
MRS_FIELD_VALUE(ID_AA64ISAR0_TS_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR0_TS_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR0_TS_CondM_8_4, "CondM-8.4"),		MRS_FIELD_VALUE(ID_AA64ISAR0_TS_CondM_8_4, "CondM-8.4"),
MRS_FIELD_VALUE(ID_AA64ISAR0_TS_CondM_8_5, "CondM-8.5"),		MRS_FIELD_VALUE(ID_AA64ISAR0_TS_CondM_8_5, "CondM-8.5"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_ts_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_FLAGM, ID_AA64ISAR0_TS_CondM_8_4),
		MRS_HWCAP(&elf_hwcap2, HWCAP2_FLAGM2, ID_AA64ISAR0_TS_CondM_8_5),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_fhm[] = {		static struct mrs_field_value id_aa64isar0_fhm[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, FHM, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, FHM, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_fhm_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_ASIMDFHM, ID_AA64ISAR0_FHM_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_dp[] = {		static struct mrs_field_value id_aa64isar0_dp[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, DP, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, DP, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_dp_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_ASIMDDP, ID_AA64ISAR0_DP_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_sm4[] = {		static struct mrs_field_value id_aa64isar0_sm4[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SM4, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SM4, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_sm4_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SM4, ID_AA64ISAR0_SM4_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_sm3[] = {		static struct mrs_field_value id_aa64isar0_sm3[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SM3, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SM3, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_sm3_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SM3, ID_AA64ISAR0_SM3_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_sha3[] = {		static struct mrs_field_value id_aa64isar0_sha3[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SHA3, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SHA3, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_sha3_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SHA3, ID_AA64ISAR0_SHA3_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_rdm[] = {		static struct mrs_field_value id_aa64isar0_rdm[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, RDM, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, RDM, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_rdm_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_ASIMDRDM, ID_AA64ISAR0_RDM_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_atomic[] = {		static struct mrs_field_value id_aa64isar0_atomic[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, Atomic, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, Atomic, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_atomic_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_ATOMICS, ID_AA64ISAR0_Atomic_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_crc32[] = {		static struct mrs_field_value id_aa64isar0_crc32[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, CRC32, NONE, BASE),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, CRC32, NONE, BASE),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_crc32_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_CRC32, ID_AA64ISAR0_CRC32_BASE),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_sha2[] = {		static struct mrs_field_value id_aa64isar0_sha2[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SHA2, NONE, BASE),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SHA2, NONE, BASE),
MRS_FIELD_VALUE(ID_AA64ISAR0_SHA2_512, "SHA2+SHA512"),		MRS_FIELD_VALUE(ID_AA64ISAR0_SHA2_512, "SHA2+SHA512"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_sha2_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SHA2, ID_AA64ISAR0_SHA2_BASE),
		MRS_HWCAP(&elf_hwcap, HWCAP_SHA512, ID_AA64ISAR0_SHA2_512),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_sha1[] = {		static struct mrs_field_value id_aa64isar0_sha1[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SHA1, NONE, BASE),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, SHA1, NONE, BASE),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_sha1_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SHA1, ID_AA64ISAR0_SHA1_BASE),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar0_aes[] = {		static struct mrs_field_value id_aa64isar0_aes[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, AES, NONE, BASE),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, AES, NONE, BASE),
MRS_FIELD_VALUE(ID_AA64ISAR0_AES_PMULL, "AES+PMULL"),		MRS_FIELD_VALUE(ID_AA64ISAR0_AES_PMULL, "AES+PMULL"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar0_aes_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_AES, ID_AA64ISAR0_AES_BASE),
		MRS_HWCAP(&elf_hwcap, HWCAP_PMULL, ID_AA64ISAR0_AES_PMULL),
		MRS_HWCAP_END
		};

static struct mrs_field id_aa64isar0_fields[] = {		static struct mrs_field id_aa64isar0_fields[] = {
MRS_FIELD(ID_AA64ISAR0, RNDR, false, MRS_LOWER, id_aa64isar0_rndr),		MRS_FIELD_HWCAP(ID_AA64ISAR0, RNDR, false, MRS_LOWER,
		id_aa64isar0_rndr, id_aa64isar0_rndr_caps),
MRS_FIELD(ID_AA64ISAR0, TLB, false, MRS_EXACT, id_aa64isar0_tlb),		MRS_FIELD(ID_AA64ISAR0, TLB, false, MRS_EXACT, id_aa64isar0_tlb),
MRS_FIELD(ID_AA64ISAR0, TS, false, MRS_LOWER, id_aa64isar0_ts),		MRS_FIELD_HWCAP(ID_AA64ISAR0, TS, false, MRS_LOWER, id_aa64isar0_ts,
MRS_FIELD(ID_AA64ISAR0, FHM, false, MRS_LOWER, id_aa64isar0_fhm),		id_aa64isar0_ts_caps),
MRS_FIELD(ID_AA64ISAR0, DP, false, MRS_LOWER, id_aa64isar0_dp),		MRS_FIELD_HWCAP(ID_AA64ISAR0, FHM, false, MRS_LOWER, id_aa64isar0_fhm,
MRS_FIELD(ID_AA64ISAR0, SM4, false, MRS_LOWER, id_aa64isar0_sm4),		id_aa64isar0_fhm_caps),
MRS_FIELD(ID_AA64ISAR0, SM3, false, MRS_LOWER, id_aa64isar0_sm3),		MRS_FIELD_HWCAP(ID_AA64ISAR0, DP, false, MRS_LOWER, id_aa64isar0_dp,
MRS_FIELD(ID_AA64ISAR0, SHA3, false, MRS_LOWER, id_aa64isar0_sha3),		id_aa64isar0_dp_caps),
MRS_FIELD(ID_AA64ISAR0, RDM, false, MRS_LOWER, id_aa64isar0_rdm),		MRS_FIELD_HWCAP(ID_AA64ISAR0, SM4, false, MRS_LOWER, id_aa64isar0_sm4,
MRS_FIELD(ID_AA64ISAR0, Atomic, false, MRS_LOWER, id_aa64isar0_atomic),		id_aa64isar0_sm4_caps),
MRS_FIELD(ID_AA64ISAR0, CRC32, false, MRS_LOWER, id_aa64isar0_crc32),		MRS_FIELD_HWCAP(ID_AA64ISAR0, SM3, false, MRS_LOWER, id_aa64isar0_sm3,
MRS_FIELD(ID_AA64ISAR0, SHA2, false, MRS_LOWER, id_aa64isar0_sha2),		id_aa64isar0_sm3_caps),
MRS_FIELD(ID_AA64ISAR0, SHA1, false, MRS_LOWER, id_aa64isar0_sha1),		MRS_FIELD_HWCAP(ID_AA64ISAR0, SHA3, false, MRS_LOWER, id_aa64isar0_sha3,
MRS_FIELD(ID_AA64ISAR0, AES, false, MRS_LOWER, id_aa64isar0_aes),		id_aa64isar0_sha3_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR0, RDM, false, MRS_LOWER, id_aa64isar0_rdm,
		id_aa64isar0_rdm_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR0, Atomic, false, MRS_LOWER,
		id_aa64isar0_atomic, id_aa64isar0_atomic_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR0, CRC32, false, MRS_LOWER,
		id_aa64isar0_crc32, id_aa64isar0_crc32_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR0, SHA2, false, MRS_LOWER, id_aa64isar0_sha2,
		id_aa64isar0_sha2_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR0, SHA1, false, MRS_LOWER,
		id_aa64isar0_sha1, id_aa64isar0_sha1_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR0, AES, false, MRS_LOWER, id_aa64isar0_aes,
		id_aa64isar0_aes_caps),
MRS_FIELD_END,		MRS_FIELD_END,
};		};


/* ID_AA64ISAR1_EL1 */		/* ID_AA64ISAR1_EL1 */
static struct mrs_field_value id_aa64isar1_i8mm[] = {		static struct mrs_field_value id_aa64isar1_i8mm[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, I8MM, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, I8MM, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_i8mm_caps[] = {
		MRS_HWCAP(&elf_hwcap2, HWCAP2_I8MM, ID_AA64ISAR1_I8MM_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_dgh[] = {		static struct mrs_field_value id_aa64isar1_dgh[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, DGH, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, DGH, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_dgh_caps[] = {
		MRS_HWCAP(&elf_hwcap2, HWCAP2_DGH, ID_AA64ISAR1_DGH_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_bf16[] = {		static struct mrs_field_value id_aa64isar1_bf16[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, BF16, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, BF16, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_bf16_caps[] = {
		MRS_HWCAP(&elf_hwcap2, HWCAP2_BF16, ID_AA64ISAR1_BF16_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_specres[] = {		static struct mrs_field_value id_aa64isar1_specres[] = {
MRS_FIELD_VALUE(ID_AA64ISAR1_SPECRES_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR1_SPECRES_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR1_SPECRES_IMPL, "PredInv"),		MRS_FIELD_VALUE(ID_AA64ISAR1_SPECRES_IMPL, "PredInv"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64isar1_sb[] = {		static struct mrs_field_value id_aa64isar1_sb[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, SB, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, SB, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_sb_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SB, ID_AA64ISAR1_SB_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_frintts[] = {		static struct mrs_field_value id_aa64isar1_frintts[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, FRINTTS, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, FRINTTS, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_frintts_caps[] = {
		MRS_HWCAP(&elf_hwcap2, HWCAP2_FRINT, ID_AA64ISAR1_FRINTTS_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_gpi[] = {		static struct mrs_field_value id_aa64isar1_gpi[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, GPI, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, GPI, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64isar1_gpa[] = {		static struct mrs_field_value id_aa64isar1_gpa[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, GPA, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, GPA, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64isar1_lrcpc[] = {		static struct mrs_field_value id_aa64isar1_lrcpc[] = {
MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_RCPC_8_3, "RCPC-8.3"),		MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_RCPC_8_3, "RCPC-8.3"),
MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_RCPC_8_4, "RCPC-8.4"),		MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_RCPC_8_4, "RCPC-8.4"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_lrcpc_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_LRCPC, ID_AA64ISAR1_LRCPC_RCPC_8_3),
		MRS_HWCAP(&elf_hwcap, HWCAP_ILRCPC, ID_AA64ISAR1_LRCPC_RCPC_8_4),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_fcma[] = {		static struct mrs_field_value id_aa64isar1_fcma[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, FCMA, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, FCMA, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_fcma_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_FCMA, ID_AA64ISAR1_FCMA_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_jscvt[] = {		static struct mrs_field_value id_aa64isar1_jscvt[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, JSCVT, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, JSCVT, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_jscvt_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_JSCVT, ID_AA64ISAR1_JSCVT_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64isar1_api[] = {		static struct mrs_field_value id_aa64isar1_api[] = {
MRS_FIELD_VALUE(ID_AA64ISAR1_API_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR1_API_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR1_API_PAC, "API PAC"),		MRS_FIELD_VALUE(ID_AA64ISAR1_API_PAC, "API PAC"),
MRS_FIELD_VALUE(ID_AA64ISAR1_API_EPAC, "API EPAC"),		MRS_FIELD_VALUE(ID_AA64ISAR1_API_EPAC, "API EPAC"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64isar1_apa[] = {		static struct mrs_field_value id_aa64isar1_apa[] = {
MRS_FIELD_VALUE(ID_AA64ISAR1_APA_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR1_APA_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR1_APA_PAC, "APA PAC"),		MRS_FIELD_VALUE(ID_AA64ISAR1_APA_PAC, "APA PAC"),
MRS_FIELD_VALUE(ID_AA64ISAR1_APA_EPAC, "APA EPAC"),		MRS_FIELD_VALUE(ID_AA64ISAR1_APA_EPAC, "APA EPAC"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64isar1_dpb[] = {		static struct mrs_field_value id_aa64isar1_dpb[] = {
MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_NONE, ""),		MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_NONE, ""),
MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_DCCVAP, "DCPoP"),		MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_DCCVAP, "DCPoP"),
MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_DCCVADP, "DCCVADP"),		MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_DCCVADP, "DCCVADP"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64isar1_dpb_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_DCPOP, ID_AA64ISAR1_DPB_DCCVAP),
		MRS_HWCAP(&elf_hwcap2, HWCAP2_DCPODP, ID_AA64ISAR1_DPB_DCCVADP),
		MRS_HWCAP_END
		};

static struct mrs_field id_aa64isar1_fields[] = {		static struct mrs_field id_aa64isar1_fields[] = {
MRS_FIELD(ID_AA64ISAR1, I8MM, false, MRS_LOWER, id_aa64isar1_i8mm),		MRS_FIELD_HWCAP(ID_AA64ISAR1, I8MM, false, MRS_LOWER,
MRS_FIELD(ID_AA64ISAR1, DGH, false, MRS_LOWER, id_aa64isar1_dgh),		id_aa64isar1_i8mm, id_aa64isar1_i8mm_caps),
MRS_FIELD(ID_AA64ISAR1, BF16, false, MRS_LOWER, id_aa64isar1_bf16),		MRS_FIELD_HWCAP(ID_AA64ISAR1, DGH, false, MRS_LOWER, id_aa64isar1_dgh,
		id_aa64isar1_dgh_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR1, BF16, false, MRS_LOWER,
		id_aa64isar1_bf16, id_aa64isar1_bf16_caps),
MRS_FIELD(ID_AA64ISAR1, SPECRES, false, MRS_EXACT,		MRS_FIELD(ID_AA64ISAR1, SPECRES, false, MRS_EXACT,
id_aa64isar1_specres),		id_aa64isar1_specres),
MRS_FIELD(ID_AA64ISAR1, SB, false, MRS_LOWER, id_aa64isar1_sb),		MRS_FIELD_HWCAP(ID_AA64ISAR1, SB, false, MRS_LOWER, id_aa64isar1_sb,
MRS_FIELD(ID_AA64ISAR1, FRINTTS, false, MRS_LOWER,		id_aa64isar1_sb_caps),
id_aa64isar1_frintts),		MRS_FIELD_HWCAP(ID_AA64ISAR1, FRINTTS, false, MRS_LOWER,
		id_aa64isar1_frintts, id_aa64isar1_frintts_caps),
MRS_FIELD(ID_AA64ISAR1, GPI, false, MRS_EXACT, id_aa64isar1_gpi),		MRS_FIELD(ID_AA64ISAR1, GPI, false, MRS_EXACT, id_aa64isar1_gpi),
MRS_FIELD(ID_AA64ISAR1, GPA, false, MRS_EXACT, id_aa64isar1_gpa),		MRS_FIELD(ID_AA64ISAR1, GPA, false, MRS_EXACT, id_aa64isar1_gpa),
MRS_FIELD(ID_AA64ISAR1, LRCPC, false, MRS_LOWER, id_aa64isar1_lrcpc),		MRS_FIELD_HWCAP(ID_AA64ISAR1, LRCPC, false, MRS_LOWER,
MRS_FIELD(ID_AA64ISAR1, FCMA, false, MRS_LOWER, id_aa64isar1_fcma),		id_aa64isar1_lrcpc, id_aa64isar1_lrcpc_caps),
MRS_FIELD(ID_AA64ISAR1, JSCVT, false, MRS_LOWER, id_aa64isar1_jscvt),		MRS_FIELD_HWCAP(ID_AA64ISAR1, FCMA, false, MRS_LOWER,
		id_aa64isar1_fcma, id_aa64isar1_fcma_caps),
		MRS_FIELD_HWCAP(ID_AA64ISAR1, JSCVT, false, MRS_LOWER,
		id_aa64isar1_jscvt, id_aa64isar1_jscvt_caps),
MRS_FIELD(ID_AA64ISAR1, API, false, MRS_EXACT, id_aa64isar1_api),		MRS_FIELD(ID_AA64ISAR1, API, false, MRS_EXACT, id_aa64isar1_api),
MRS_FIELD(ID_AA64ISAR1, APA, false, MRS_EXACT, id_aa64isar1_apa),		MRS_FIELD(ID_AA64ISAR1, APA, false, MRS_EXACT, id_aa64isar1_apa),
MRS_FIELD(ID_AA64ISAR1, DPB, false, MRS_LOWER, id_aa64isar1_dpb),		MRS_FIELD_HWCAP(ID_AA64ISAR1, DPB, false, MRS_LOWER, id_aa64isar1_dpb,
		id_aa64isar1_dpb_caps),
MRS_FIELD_END,		MRS_FIELD_END,
};		};


/* ID_AA64MMFR0_EL1 */		/* ID_AA64MMFR0_EL1 */
static struct mrs_field_value id_aa64mmfr0_exs[] = {		static struct mrs_field_value id_aa64mmfr0_exs[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR0, ExS, ALL, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR0, ExS, ALL, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
▲ Show 20 Lines • Show All 189 Lines • ▼ Show 20 Lines	static struct mrs_field_value id_aa64mmfr2_ids[] = {
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64mmfr2_at[] = {		static struct mrs_field_value id_aa64mmfr2_at[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, AT, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, AT, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64mmfr2_at_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_USCAT, ID_AA64MMFR2_AT_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64mmfr2_st[] = {		static struct mrs_field_value id_aa64mmfr2_st[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, ST, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, ST, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64mmfr2_nv[] = {		static struct mrs_field_value id_aa64mmfr2_nv[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, NV, NONE, 8_3),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, NV, NONE, 8_3),
MRS_FIELD_VALUE(ID_AA64MMFR2_NV_8_4, "NV v8.4"),		MRS_FIELD_VALUE(ID_AA64MMFR2_NV_8_4, "NV v8.4"),
Show All 34 Lines

static struct mrs_field id_aa64mmfr2_fields[] = {		static struct mrs_field id_aa64mmfr2_fields[] = {
MRS_FIELD(ID_AA64MMFR2, E0PD, false, MRS_EXACT, id_aa64mmfr2_e0pd),		MRS_FIELD(ID_AA64MMFR2, E0PD, false, MRS_EXACT, id_aa64mmfr2_e0pd),
MRS_FIELD(ID_AA64MMFR2, EVT, false, MRS_EXACT, id_aa64mmfr2_evt),		MRS_FIELD(ID_AA64MMFR2, EVT, false, MRS_EXACT, id_aa64mmfr2_evt),
MRS_FIELD(ID_AA64MMFR2, BBM, false, MRS_EXACT, id_aa64mmfr2_bbm),		MRS_FIELD(ID_AA64MMFR2, BBM, false, MRS_EXACT, id_aa64mmfr2_bbm),
MRS_FIELD(ID_AA64MMFR2, TTL, false, MRS_EXACT, id_aa64mmfr2_ttl),		MRS_FIELD(ID_AA64MMFR2, TTL, false, MRS_EXACT, id_aa64mmfr2_ttl),
MRS_FIELD(ID_AA64MMFR2, FWB, false, MRS_EXACT, id_aa64mmfr2_fwb),		MRS_FIELD(ID_AA64MMFR2, FWB, false, MRS_EXACT, id_aa64mmfr2_fwb),
MRS_FIELD(ID_AA64MMFR2, IDS, false, MRS_EXACT, id_aa64mmfr2_ids),		MRS_FIELD(ID_AA64MMFR2, IDS, false, MRS_EXACT, id_aa64mmfr2_ids),
MRS_FIELD(ID_AA64MMFR2, AT, false, MRS_LOWER, id_aa64mmfr2_at),		MRS_FIELD_HWCAP(ID_AA64MMFR2, AT, false, MRS_LOWER, id_aa64mmfr2_at,
		id_aa64mmfr2_at_caps),
MRS_FIELD(ID_AA64MMFR2, ST, false, MRS_EXACT, id_aa64mmfr2_st),		MRS_FIELD(ID_AA64MMFR2, ST, false, MRS_EXACT, id_aa64mmfr2_st),
MRS_FIELD(ID_AA64MMFR2, NV, false, MRS_EXACT, id_aa64mmfr2_nv),		MRS_FIELD(ID_AA64MMFR2, NV, false, MRS_EXACT, id_aa64mmfr2_nv),
MRS_FIELD(ID_AA64MMFR2, CCIDX, false, MRS_EXACT, id_aa64mmfr2_ccidx),		MRS_FIELD(ID_AA64MMFR2, CCIDX, false, MRS_EXACT, id_aa64mmfr2_ccidx),
MRS_FIELD(ID_AA64MMFR2, VARange, false, MRS_EXACT,		MRS_FIELD(ID_AA64MMFR2, VARange, false, MRS_EXACT,
id_aa64mmfr2_varange),		id_aa64mmfr2_varange),
MRS_FIELD(ID_AA64MMFR2, IESB, false, MRS_EXACT, id_aa64mmfr2_iesb),		MRS_FIELD(ID_AA64MMFR2, IESB, false, MRS_EXACT, id_aa64mmfr2_iesb),
MRS_FIELD(ID_AA64MMFR2, LSM, false, MRS_EXACT, id_aa64mmfr2_lsm),		MRS_FIELD(ID_AA64MMFR2, LSM, false, MRS_EXACT, id_aa64mmfr2_lsm),
MRS_FIELD(ID_AA64MMFR2, UAO, false, MRS_EXACT, id_aa64mmfr2_uao),		MRS_FIELD(ID_AA64MMFR2, UAO, false, MRS_EXACT, id_aa64mmfr2_uao),
Show All 17 Lines
};		};

static struct mrs_field_value id_aa64pfr0_dit[] = {		static struct mrs_field_value id_aa64pfr0_dit[] = {
MRS_FIELD_VALUE(ID_AA64PFR0_DIT_NONE, ""),		MRS_FIELD_VALUE(ID_AA64PFR0_DIT_NONE, ""),
MRS_FIELD_VALUE(ID_AA64PFR0_DIT_PSTATE, "PSTATE.DIT"),		MRS_FIELD_VALUE(ID_AA64PFR0_DIT_PSTATE, "PSTATE.DIT"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64pfr0_dit_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_DIT, ID_AA64PFR0_DIT_PSTATE),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64pfr0_amu[] = {		static struct mrs_field_value id_aa64pfr0_amu[] = {
MRS_FIELD_VALUE(ID_AA64PFR0_AMU_NONE, ""),		MRS_FIELD_VALUE(ID_AA64PFR0_AMU_NONE, ""),
MRS_FIELD_VALUE(ID_AA64PFR0_AMU_V1, "AMUv1"),		MRS_FIELD_VALUE(ID_AA64PFR0_AMU_V1, "AMUv1"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr0_mpam[] = {		static struct mrs_field_value id_aa64pfr0_mpam[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, MPAM, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, MPAM, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr0_sel2[] = {		static struct mrs_field_value id_aa64pfr0_sel2[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, SEL2, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, SEL2, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr0_sve[] = {		static struct mrs_field_value id_aa64pfr0_sve[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, SVE, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, SVE, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		#if 0
		/* Enable when we add SVE support */
		static struct mrs_field_hwcap id_aa64pfr0_sve_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SVE, ID_AA64PFR0_SVE_IMPL),
		MRS_HWCAP_END
		};
		#endif

static struct mrs_field_value id_aa64pfr0_ras[] = {		static struct mrs_field_value id_aa64pfr0_ras[] = {
MRS_FIELD_VALUE(ID_AA64PFR0_RAS_NONE, ""),		MRS_FIELD_VALUE(ID_AA64PFR0_RAS_NONE, ""),
MRS_FIELD_VALUE(ID_AA64PFR0_RAS_IMPL, "RAS"),		MRS_FIELD_VALUE(ID_AA64PFR0_RAS_IMPL, "RAS"),
MRS_FIELD_VALUE(ID_AA64PFR0_RAS_8_4, "RAS v8.4"),		MRS_FIELD_VALUE(ID_AA64PFR0_RAS_8_4, "RAS v8.4"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr0_gic[] = {		static struct mrs_field_value id_aa64pfr0_gic[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, GIC, CPUIF_NONE, CPUIF_EN),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, GIC, CPUIF_NONE, CPUIF_EN),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr0_advsimd[] = {		static struct mrs_field_value id_aa64pfr0_advsimd[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, AdvSIMD, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, AdvSIMD, NONE, IMPL),
MRS_FIELD_VALUE(ID_AA64PFR0_AdvSIMD_HP, "AdvSIMD+HP"),		MRS_FIELD_VALUE(ID_AA64PFR0_AdvSIMD_HP, "AdvSIMD+HP"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64pfr0_advsimd_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_ASIMD, ID_AA64PFR0_AdvSIMD_IMPL),
		MRS_HWCAP(&elf_hwcap, HWCAP_ASIMDHP, ID_AA64PFR0_AdvSIMD_HP),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64pfr0_fp[] = {		static struct mrs_field_value id_aa64pfr0_fp[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, FP, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, FP, NONE, IMPL),
MRS_FIELD_VALUE(ID_AA64PFR0_FP_HP, "FP+HP"),		MRS_FIELD_VALUE(ID_AA64PFR0_FP_HP, "FP+HP"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64pfr0_fp_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_FP, ID_AA64PFR0_FP_IMPL),
		MRS_HWCAP(&elf_hwcap, HWCAP_FPHP, ID_AA64PFR0_FP_HP),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64pfr0_el3[] = {		static struct mrs_field_value id_aa64pfr0_el3[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, EL3, NONE, 64),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, EL3, NONE, 64),
MRS_FIELD_VALUE(ID_AA64PFR0_EL3_64_32, "EL3 32"),		MRS_FIELD_VALUE(ID_AA64PFR0_EL3_64_32, "EL3 32"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr0_el2[] = {		static struct mrs_field_value id_aa64pfr0_el2[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, EL2, NONE, 64),		MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, EL2, NONE, 64),
Show All 11 Lines	static struct mrs_field_value id_aa64pfr0_el0[] = {
MRS_FIELD_VALUE(ID_AA64PFR0_EL0_64, "EL0"),		MRS_FIELD_VALUE(ID_AA64PFR0_EL0_64, "EL0"),
MRS_FIELD_VALUE(ID_AA64PFR0_EL0_64_32, "EL0 32"),		MRS_FIELD_VALUE(ID_AA64PFR0_EL0_64_32, "EL0 32"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field id_aa64pfr0_fields[] = {		static struct mrs_field id_aa64pfr0_fields[] = {
MRS_FIELD(ID_AA64PFR0, CSV3, false, MRS_EXACT, id_aa64pfr0_csv3),		MRS_FIELD(ID_AA64PFR0, CSV3, false, MRS_EXACT, id_aa64pfr0_csv3),
MRS_FIELD(ID_AA64PFR0, CSV2, false, MRS_EXACT, id_aa64pfr0_csv2),		MRS_FIELD(ID_AA64PFR0, CSV2, false, MRS_EXACT, id_aa64pfr0_csv2),
MRS_FIELD(ID_AA64PFR0, DIT, false, MRS_LOWER, id_aa64pfr0_dit),		MRS_FIELD_HWCAP(ID_AA64PFR0, DIT, false, MRS_LOWER, id_aa64pfr0_dit,
		id_aa64pfr0_dit_caps),
MRS_FIELD(ID_AA64PFR0, AMU, false, MRS_EXACT, id_aa64pfr0_amu),		MRS_FIELD(ID_AA64PFR0, AMU, false, MRS_EXACT, id_aa64pfr0_amu),
MRS_FIELD(ID_AA64PFR0, MPAM, false, MRS_EXACT, id_aa64pfr0_mpam),		MRS_FIELD(ID_AA64PFR0, MPAM, false, MRS_EXACT, id_aa64pfr0_mpam),
MRS_FIELD(ID_AA64PFR0, SEL2, false, MRS_EXACT, id_aa64pfr0_sel2),		MRS_FIELD(ID_AA64PFR0, SEL2, false, MRS_EXACT, id_aa64pfr0_sel2),
MRS_FIELD(ID_AA64PFR0, SVE, false, MRS_EXACT, id_aa64pfr0_sve),		MRS_FIELD(ID_AA64PFR0, SVE, false, MRS_EXACT, id_aa64pfr0_sve),
MRS_FIELD(ID_AA64PFR0, RAS, false, MRS_EXACT, id_aa64pfr0_ras),		MRS_FIELD(ID_AA64PFR0, RAS, false, MRS_EXACT, id_aa64pfr0_ras),
MRS_FIELD(ID_AA64PFR0, GIC, false, MRS_EXACT, id_aa64pfr0_gic),		MRS_FIELD(ID_AA64PFR0, GIC, false, MRS_EXACT, id_aa64pfr0_gic),
MRS_FIELD(ID_AA64PFR0, AdvSIMD, true, MRS_LOWER, id_aa64pfr0_advsimd),		MRS_FIELD_HWCAP(ID_AA64PFR0, AdvSIMD, true, MRS_LOWER,
MRS_FIELD(ID_AA64PFR0, FP, true, MRS_LOWER, id_aa64pfr0_fp),		id_aa64pfr0_advsimd, id_aa64pfr0_advsimd_caps),
		MRS_FIELD_HWCAP(ID_AA64PFR0, FP, true, MRS_LOWER, id_aa64pfr0_fp,
		id_aa64pfr0_fp_caps),
MRS_FIELD(ID_AA64PFR0, EL3, false, MRS_EXACT, id_aa64pfr0_el3),		MRS_FIELD(ID_AA64PFR0, EL3, false, MRS_EXACT, id_aa64pfr0_el3),
MRS_FIELD(ID_AA64PFR0, EL2, false, MRS_EXACT, id_aa64pfr0_el2),		MRS_FIELD(ID_AA64PFR0, EL2, false, MRS_EXACT, id_aa64pfr0_el2),
MRS_FIELD(ID_AA64PFR0, EL1, false, MRS_LOWER, id_aa64pfr0_el1),		MRS_FIELD(ID_AA64PFR0, EL1, false, MRS_LOWER, id_aa64pfr0_el1),
MRS_FIELD(ID_AA64PFR0, EL0, false, MRS_LOWER, id_aa64pfr0_el0),		MRS_FIELD(ID_AA64PFR0, EL0, false, MRS_LOWER, id_aa64pfr0_el0),
MRS_FIELD_END,		MRS_FIELD_END,
};		};


/* ID_AA64PFR1_EL1 */		/* ID_AA64PFR1_EL1 */
static struct mrs_field_value id_aa64pfr1_mte[] = {		static struct mrs_field_value id_aa64pfr1_mte[] = {
MRS_FIELD_VALUE(ID_AA64PFR1_MTE_NONE, ""),		MRS_FIELD_VALUE(ID_AA64PFR1_MTE_NONE, ""),
MRS_FIELD_VALUE(ID_AA64PFR1_MTE_IMPL_EL0, "MTE EL0"),		MRS_FIELD_VALUE(ID_AA64PFR1_MTE_IMPL_EL0, "MTE EL0"),
MRS_FIELD_VALUE(ID_AA64PFR1_MTE_IMPL, "MTE"),		MRS_FIELD_VALUE(ID_AA64PFR1_MTE_IMPL, "MTE"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_aa64pfr1_ssbs[] = {		static struct mrs_field_value id_aa64pfr1_ssbs[] = {
MRS_FIELD_VALUE(ID_AA64PFR1_SSBS_NONE, ""),		MRS_FIELD_VALUE(ID_AA64PFR1_SSBS_NONE, ""),
MRS_FIELD_VALUE(ID_AA64PFR1_SSBS_PSTATE, "PSTATE.SSBS"),		MRS_FIELD_VALUE(ID_AA64PFR1_SSBS_PSTATE, "PSTATE.SSBS"),
MRS_FIELD_VALUE(ID_AA64PFR1_SSBS_PSTATE_MSR, "PSTATE.SSBS MSR"),		MRS_FIELD_VALUE(ID_AA64PFR1_SSBS_PSTATE_MSR, "PSTATE.SSBS MSR"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_aa64pfr1_ssbs_caps[] = {
		MRS_HWCAP(&elf_hwcap, HWCAP_SSBS, ID_AA64PFR1_SSBS_PSTATE),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_aa64pfr1_bt[] = {		static struct mrs_field_value id_aa64pfr1_bt[] = {
MRS_FIELD_VALUE(ID_AA64PFR1_BT_NONE, ""),		MRS_FIELD_VALUE(ID_AA64PFR1_BT_NONE, ""),
MRS_FIELD_VALUE(ID_AA64PFR1_BT_IMPL, "BTI"),		MRS_FIELD_VALUE(ID_AA64PFR1_BT_IMPL, "BTI"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		#if 0
		/* Enable when we add BTI support */
		static struct mrs_field_hwcap id_aa64pfr1_bt_caps[] = {
		MRS_HWCAP(&elf_hwcap2, HWCAP2_BTI, ID_AA64PFR1_BT_IMPL),
		MRS_HWCAP_END
		};
		#endif

static struct mrs_field id_aa64pfr1_fields[] = {		static struct mrs_field id_aa64pfr1_fields[] = {
MRS_FIELD(ID_AA64PFR1, MTE, false, MRS_EXACT, id_aa64pfr1_mte),		MRS_FIELD(ID_AA64PFR1, MTE, false, MRS_EXACT, id_aa64pfr1_mte),
MRS_FIELD(ID_AA64PFR1, SSBS, false, MRS_LOWER, id_aa64pfr1_ssbs),		MRS_FIELD_HWCAP(ID_AA64PFR1, SSBS, false, MRS_LOWER, id_aa64pfr1_ssbs,
		id_aa64pfr1_ssbs_caps),
MRS_FIELD(ID_AA64PFR1, BT, false, MRS_EXACT, id_aa64pfr1_bt),		MRS_FIELD(ID_AA64PFR1, BT, false, MRS_EXACT, id_aa64pfr1_bt),
MRS_FIELD_END,		MRS_FIELD_END,
};		};

#ifdef COMPAT_FREEBSD32		#ifdef COMPAT_FREEBSD32
/* ID_ISAR5_EL1 */		/* ID_ISAR5_EL1 */
static struct mrs_field_value id_isar5_vcma[] = {		static struct mrs_field_value id_isar5_vcma[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, VCMA, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, VCMA, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_isar5_rdm[] = {		static struct mrs_field_value id_isar5_rdm[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, RDM, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, RDM, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value id_isar5_crc32[] = {		static struct mrs_field_value id_isar5_crc32[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, CRC32, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, CRC32, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_isar5_crc32_caps[] = {
		MRS_HWCAP(&elf32_hwcap2, HWCAP32_2_CRC32, ID_ISAR5_CRC32_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_isar5_sha2[] = {		static struct mrs_field_value id_isar5_sha2[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, SHA2, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, SHA2, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_isar5_sha2_caps[] = {
		MRS_HWCAP(&elf32_hwcap2, HWCAP32_2_SHA2, ID_ISAR5_SHA2_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_isar5_sha1[] = {		static struct mrs_field_value id_isar5_sha1[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, SHA1, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, SHA1, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_isar5_sha1_caps[] = {
		MRS_HWCAP(&elf32_hwcap2, HWCAP32_2_SHA1, ID_ISAR5_SHA1_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_isar5_aes[] = {		static struct mrs_field_value id_isar5_aes[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, AES, NONE, BASE),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, AES, NONE, BASE),
MRS_FIELD_VALUE(ID_ISAR5_AES_VMULL, "AES+VMULL"),		MRS_FIELD_VALUE(ID_ISAR5_AES_VMULL, "AES+VMULL"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap id_isar5_aes_caps[] = {
		MRS_HWCAP(&elf32_hwcap2, HWCAP32_2_AES, ID_ISAR5_AES_BASE),
		MRS_HWCAP(&elf32_hwcap2, HWCAP32_2_PMULL, ID_ISAR5_AES_VMULL),
		MRS_HWCAP_END
		};

static struct mrs_field_value id_isar5_sevl[] = {		static struct mrs_field_value id_isar5_sevl[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, SEVL, NOP, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(ID_ISAR5, SEVL, NOP, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field id_isar5_fields[] = {		static struct mrs_field id_isar5_fields[] = {
MRS_FIELD(ID_ISAR5, VCMA, false, MRS_LOWER, id_isar5_vcma),		MRS_FIELD(ID_ISAR5, VCMA, false, MRS_LOWER, id_isar5_vcma),
MRS_FIELD(ID_ISAR5, RDM, false, MRS_LOWER, id_isar5_rdm),		MRS_FIELD(ID_ISAR5, RDM, false, MRS_LOWER, id_isar5_rdm),
MRS_FIELD(ID_ISAR5, CRC32, false, MRS_LOWER, id_isar5_crc32),		MRS_FIELD_HWCAP(ID_ISAR5, CRC32, false, MRS_LOWER, id_isar5_crc32,
MRS_FIELD(ID_ISAR5, SHA2, false, MRS_LOWER, id_isar5_sha2),		id_isar5_crc32_caps),
MRS_FIELD(ID_ISAR5, SHA1, false, MRS_LOWER, id_isar5_sha1),		MRS_FIELD_HWCAP(ID_ISAR5, SHA2, false, MRS_LOWER, id_isar5_sha2,
MRS_FIELD(ID_ISAR5, AES, false, MRS_LOWER, id_isar5_aes),		id_isar5_sha2_caps),
		MRS_FIELD_HWCAP(ID_ISAR5, SHA1, false, MRS_LOWER, id_isar5_sha1,
		id_isar5_sha1_caps),
		MRS_FIELD_HWCAP(ID_ISAR5, AES, false, MRS_LOWER, id_isar5_aes,
		id_isar5_aes_caps),
MRS_FIELD(ID_ISAR5, SEVL, false, MRS_LOWER, id_isar5_sevl),		MRS_FIELD(ID_ISAR5, SEVL, false, MRS_LOWER, id_isar5_sevl),
MRS_FIELD_END,		MRS_FIELD_END,
};		};

/* MVFR0 */		/* MVFR0 */
static struct mrs_field_value mvfr0_fpround[] = {		static struct mrs_field_value mvfr0_fpround[] = {
MRS_FIELD_VALUE_NONE_IMPL(MVFR0, FPRound, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(MVFR0, FPRound, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
Show All 16 Lines

static struct mrs_field_value mvfr0_fpdp[] = {		static struct mrs_field_value mvfr0_fpdp[] = {
MRS_FIELD_VALUE(MVFR0_FPDP_NONE, ""),		MRS_FIELD_VALUE(MVFR0_FPDP_NONE, ""),
MRS_FIELD_VALUE(MVFR0_FPDP_VFP_v2, "DP VFPv2"),		MRS_FIELD_VALUE(MVFR0_FPDP_VFP_v2, "DP VFPv2"),
MRS_FIELD_VALUE(MVFR0_FPDP_VFP_v3_v4, "DP VFPv3+v4"),		MRS_FIELD_VALUE(MVFR0_FPDP_VFP_v3_v4, "DP VFPv3+v4"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap mvfr0_fpdp_caps[] = {
		MRS_HWCAP(&elf32_hwcap, HWCAP32_VFP, MVFR0_FPDP_VFP_v2),
		MRS_HWCAP(&elf32_hwcap, HWCAP32_VFPv3, MVFR0_FPDP_VFP_v3_v4),
		};

static struct mrs_field_value mvfr0_fpsp[] = {		static struct mrs_field_value mvfr0_fpsp[] = {
MRS_FIELD_VALUE(MVFR0_FPSP_NONE, ""),		MRS_FIELD_VALUE(MVFR0_FPSP_NONE, ""),
MRS_FIELD_VALUE(MVFR0_FPSP_VFP_v2, "SP VFPv2"),		MRS_FIELD_VALUE(MVFR0_FPSP_VFP_v2, "SP VFPv2"),
MRS_FIELD_VALUE(MVFR0_FPSP_VFP_v3_v4, "SP VFPv3+v4"),		MRS_FIELD_VALUE(MVFR0_FPSP_VFP_v3_v4, "SP VFPv3+v4"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value mvfr0_simdreg[] = {		static struct mrs_field_value mvfr0_simdreg[] = {
MRS_FIELD_VALUE(MVFR0_SIMDReg_NONE, ""),		MRS_FIELD_VALUE(MVFR0_SIMDReg_NONE, ""),
MRS_FIELD_VALUE(MVFR0_SIMDReg_FP, "FP 16x64"),		MRS_FIELD_VALUE(MVFR0_SIMDReg_FP, "FP 16x64"),
MRS_FIELD_VALUE(MVFR0_SIMDReg_AdvSIMD, "AdvSIMD"),		MRS_FIELD_VALUE(MVFR0_SIMDReg_AdvSIMD, "AdvSIMD"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field mvfr0_fields[] = {		static struct mrs_field mvfr0_fields[] = {
MRS_FIELD(MVFR0, FPRound, false, MRS_LOWER, mvfr0_fpround),		MRS_FIELD(MVFR0, FPRound, false, MRS_LOWER, mvfr0_fpround),
MRS_FIELD(MVFR0, FPSqrt, false, MRS_LOWER, mvfr0_fpsqrt),		MRS_FIELD(MVFR0, FPSqrt, false, MRS_LOWER, mvfr0_fpsqrt),
MRS_FIELD(MVFR0, FPDivide, false, MRS_LOWER, mvfr0_fpdivide),		MRS_FIELD(MVFR0, FPDivide, false, MRS_LOWER, mvfr0_fpdivide),
MRS_FIELD(MVFR0, FPTrap, false, MRS_LOWER, mvfr0_fptrap),		MRS_FIELD(MVFR0, FPTrap, false, MRS_LOWER, mvfr0_fptrap),
MRS_FIELD(MVFR0, FPDP, false, MRS_LOWER, mvfr0_fpdp),		MRS_FIELD_HWCAP(MVFR0, FPDP, false, MRS_LOWER, mvfr0_fpdp,
		mvfr0_fpdp_caps),
MRS_FIELD(MVFR0, FPSP, false, MRS_LOWER, mvfr0_fpsp),		MRS_FIELD(MVFR0, FPSP, false, MRS_LOWER, mvfr0_fpsp),
MRS_FIELD(MVFR0, SIMDReg, false, MRS_LOWER, mvfr0_simdreg),		MRS_FIELD(MVFR0, SIMDReg, false, MRS_LOWER, mvfr0_simdreg),
MRS_FIELD_END,		MRS_FIELD_END,
};		};

/* MVFR1 */		/* MVFR1 */
static struct mrs_field_value mvfr1_simdfmac[] = {		static struct mrs_field_value mvfr1_simdfmac[] = {
MRS_FIELD_VALUE_NONE_IMPL(MVFR1, SIMDFMAC, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(MVFR1, SIMDFMAC, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap mvfr1_simdfmac_caps[] = {
		MRS_HWCAP(&elf32_hwcap, HWCAP32_VFPv4, MVFR1_SIMDFMAC_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value mvfr1_fphp[] = {		static struct mrs_field_value mvfr1_fphp[] = {
MRS_FIELD_VALUE(MVFR1_FPHP_NONE, ""),		MRS_FIELD_VALUE(MVFR1_FPHP_NONE, ""),
MRS_FIELD_VALUE(MVFR1_FPHP_CONV_SP, "FPHP SP Conv"),		MRS_FIELD_VALUE(MVFR1_FPHP_CONV_SP, "FPHP SP Conv"),
MRS_FIELD_VALUE(MVFR1_FPHP_CONV_DP, "FPHP DP Conv"),		MRS_FIELD_VALUE(MVFR1_FPHP_CONV_DP, "FPHP DP Conv"),
MRS_FIELD_VALUE(MVFR1_FPHP_ARITH, "FPHP Arith"),		MRS_FIELD_VALUE(MVFR1_FPHP_ARITH, "FPHP Arith"),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

Show All 14 Lines	static struct mrs_field_value mvfr1_simdint[] = {
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value mvfr1_simdls[] = {		static struct mrs_field_value mvfr1_simdls[] = {
MRS_FIELD_VALUE_NONE_IMPL(MVFR1, SIMDLS, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(MVFR1, SIMDLS, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

		static struct mrs_field_hwcap mvfr1_simdls_caps[] = {
		MRS_HWCAP(&elf32_hwcap, HWCAP32_VFPv4, MVFR1_SIMDFMAC_IMPL),
		MRS_HWCAP_END
		};

static struct mrs_field_value mvfr1_fpdnan[] = {		static struct mrs_field_value mvfr1_fpdnan[] = {
MRS_FIELD_VALUE_NONE_IMPL(MVFR1, FPDNaN, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(MVFR1, FPDNaN, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field_value mvfr1_fpftz[] = {		static struct mrs_field_value mvfr1_fpftz[] = {
MRS_FIELD_VALUE_NONE_IMPL(MVFR1, FPFtZ, NONE, IMPL),		MRS_FIELD_VALUE_NONE_IMPL(MVFR1, FPFtZ, NONE, IMPL),
MRS_FIELD_VALUE_END,		MRS_FIELD_VALUE_END,
};		};

static struct mrs_field mvfr1_fields[] = {		static struct mrs_field mvfr1_fields[] = {
MRS_FIELD(MVFR1, SIMDFMAC, false, MRS_LOWER, mvfr1_simdfmac),		MRS_FIELD_HWCAP(MVFR1, SIMDFMAC, false, MRS_LOWER, mvfr1_simdfmac,
		mvfr1_simdfmac_caps),
MRS_FIELD(MVFR1, FPHP, false, MRS_LOWER, mvfr1_fphp),		MRS_FIELD(MVFR1, FPHP, false, MRS_LOWER, mvfr1_fphp),
MRS_FIELD(MVFR1, SIMDHP, false, MRS_LOWER, mvfr1_simdhp),		MRS_FIELD(MVFR1, SIMDHP, false, MRS_LOWER, mvfr1_simdhp),
MRS_FIELD(MVFR1, SIMDSP, false, MRS_LOWER, mvfr1_simdsp),		MRS_FIELD(MVFR1, SIMDSP, false, MRS_LOWER, mvfr1_simdsp),
MRS_FIELD(MVFR1, SIMDInt, false, MRS_LOWER, mvfr1_simdint),		MRS_FIELD(MVFR1, SIMDInt, false, MRS_LOWER, mvfr1_simdint),
MRS_FIELD(MVFR1, SIMDLS, false, MRS_LOWER, mvfr1_simdls),		MRS_FIELD_HWCAP(MVFR1, SIMDLS, false, MRS_LOWER, mvfr1_simdls,
		mvfr1_simdls_caps),
MRS_FIELD(MVFR1, FPDNaN, false, MRS_LOWER, mvfr1_fpdnan),		MRS_FIELD(MVFR1, FPDNaN, false, MRS_LOWER, mvfr1_fpdnan),
MRS_FIELD(MVFR1, FPFtZ, false, MRS_LOWER, mvfr1_fpftz),		MRS_FIELD(MVFR1, FPFtZ, false, MRS_LOWER, mvfr1_fpftz),
MRS_FIELD_END,		MRS_FIELD_END,
};		};
#endif /* COMPAT_FREEBSD32 */		#endif /* COMPAT_FREEBSD32 */

struct mrs_user_reg {		struct mrs_user_reg {
u_int reg;		u_int reg;
▲ Show 20 Lines • Show All 293 Lines • ▼ Show 20 Lines

bool __read_frequently icache_aliasing = false;		bool __read_frequently icache_aliasing = false;
bool __read_frequently icache_vmid = false;		bool __read_frequently icache_vmid = false;

int64_t dcache_line_size; /* The minimum D cache line size */		int64_t dcache_line_size; /* The minimum D cache line size */
int64_t icache_line_size; /* The minimum I cache line size */		int64_t icache_line_size; /* The minimum I cache line size */
int64_t idcache_line_size; /* The minimum cache line size */		int64_t idcache_line_size; /* The minimum cache line size */

		/*
		* Find the values to export to userspace as AT_HWCAP and AT_HWCAP2.
		*/
static void		static void
		parse_cpu_features(void)
		{
		struct mrs_field_hwcap *hwcaps;
		struct mrs_field *fields;
		uint64_t min, reg;
		int i, j, k;

		for (i = 0; i < nitems(user_regs); i++) {
		reg = CPU_DESC_FIELD(user_cpu_desc, i);
		fields = user_regs[i].fields;
		for (j = 0; fields[j].type != 0; j++) {
		hwcaps = fields[j].hwcaps;
		if (hwcaps == NULL)
		continue;

		for (k = 0; hwcaps[k].hwcap != NULL; k++) {
		min = hwcaps[k].min;

		/*
		* If the field is greater than the minimum
		* value we can set the hwcap;
		*/
		if (mrs_field_cmp(reg, min, fields[j].shift,
		4, fields[j].sign) >= 0) {
		*hwcaps[k].hwcap \|= hwcaps[k].hwcap_val;
		}
		}
		}
		}
		}

		static void
identify_cpu_sysinit(void *dummy __unused)		identify_cpu_sysinit(void *dummy __unused)
{		{
int cpu;		int cpu;
bool dic, idc;		bool dic, idc;

dic = (allow_dic != 0);		dic = (allow_dic != 0);
idc = (allow_idc != 0);		idc = (allow_idc != 0);

CPU_FOREACH(cpu) {		CPU_FOREACH(cpu) {
check_cpu_regs(cpu);		check_cpu_regs(cpu);
if (cpu != 0)		if (cpu != 0)
update_special_regs(cpu);		update_special_regs(cpu);

if (CTR_DIC_VAL(cpu_desc[cpu].ctr) == 0)		if (CTR_DIC_VAL(cpu_desc[cpu].ctr) == 0)
dic = false;		dic = false;
if (CTR_IDC_VAL(cpu_desc[cpu].ctr) == 0)		if (CTR_IDC_VAL(cpu_desc[cpu].ctr) == 0)
idc = false;		idc = false;
}		}

/* Exposed to userspace as AT_HWCAP and AT_HWCAP2 */		/* Find the values to export to userspace as AT_HWCAP and AT_HWCAP2 */
elf_hwcap = parse_cpu_features_hwcap();		parse_cpu_features();
elf_hwcap2 = parse_cpu_features_hwcap2();

#ifdef COMPAT_FREEBSD32		#ifdef COMPAT_FREEBSD32
/* 32-bit ARM versions of AT_HWCAP/HWCAP2 */		/* Set the default caps and any that need to check multiple fields */
elf32_hwcap = parse_cpu_features_hwcap32();		elf32_hwcap \|= parse_cpu_features_hwcap32();
elf32_hwcap2 = parse_cpu_features_hwcap32_2();
#endif		#endif

if (dic && idc) {		if (dic && idc) {
arm64_icache_sync_range = &arm64_dic_idc_icache_sync_range;		arm64_icache_sync_range = &arm64_dic_idc_icache_sync_range;
if (bootverbose)		if (bootverbose)
printf("Enabling DIC & IDC ICache sync\n");		printf("Enabling DIC & IDC ICache sync\n");
}		}

Show All 17 Lines	cpu_features_sysinit(void *dummy __unused)
u_int cpu;		u_int cpu;

CPU_FOREACH(cpu)		CPU_FOREACH(cpu)
print_cpu_features(cpu);		print_cpu_features(cpu);
}		}
/* Log features before APs are released and start printing to the dmesg. */		/* Log features before APs are released and start printing to the dmesg. */
SYSINIT(cpu_features, SI_SUB_SMP - 1, SI_ORDER_ANY, cpu_features_sysinit, NULL);		SYSINIT(cpu_features, SI_SUB_SMP - 1, SI_ORDER_ANY, cpu_features_sysinit, NULL);

static u_long
parse_cpu_features_hwcap(void)
{
u_long hwcap = 0;

switch (ID_AA64ISAR0_TS_VAL(user_cpu_desc.id_aa64isar0)) {
case ID_AA64ISAR0_TS_CondM_8_4:
case ID_AA64ISAR0_TS_CondM_8_5:
hwcap \|= HWCAP_FLAGM;
break;
default:
break;
}

if (ID_AA64ISAR0_FHM_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_FHM_IMPL)
hwcap \|= HWCAP_ASIMDFHM;

if (ID_AA64ISAR0_DP_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_DP_IMPL)
hwcap \|= HWCAP_ASIMDDP;

if (ID_AA64ISAR0_SM4_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_SM4_IMPL)
hwcap \|= HWCAP_SM4;

if (ID_AA64ISAR0_SM3_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_SM3_IMPL)
hwcap \|= HWCAP_SM3;

if (ID_AA64ISAR0_SHA3_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_SHA3_IMPL)
hwcap \|= HWCAP_SHA3;

if (ID_AA64ISAR0_RDM_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_RDM_IMPL)
hwcap \|= HWCAP_ASIMDRDM;

if (ID_AA64ISAR0_Atomic_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_Atomic_IMPL)
hwcap \|= HWCAP_ATOMICS;

if (ID_AA64ISAR0_CRC32_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_CRC32_BASE)
hwcap \|= HWCAP_CRC32;

switch (ID_AA64ISAR0_SHA2_VAL(user_cpu_desc.id_aa64isar0)) {
case ID_AA64ISAR0_SHA2_BASE:
hwcap \|= HWCAP_SHA2;
break;
case ID_AA64ISAR0_SHA2_512:
hwcap \|= HWCAP_SHA2 \| HWCAP_SHA512;
break;
default:
break;
}

if (ID_AA64ISAR0_SHA1_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_SHA1_BASE)
hwcap \|= HWCAP_SHA1;

switch (ID_AA64ISAR0_AES_VAL(user_cpu_desc.id_aa64isar0)) {
case ID_AA64ISAR0_AES_BASE:
hwcap \|= HWCAP_AES;
break;
case ID_AA64ISAR0_AES_PMULL:
hwcap \|= HWCAP_PMULL \| HWCAP_AES;
break;
default:
break;
}

if (ID_AA64ISAR1_SB_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_SB_IMPL)
hwcap \|= HWCAP_SB;

switch (ID_AA64ISAR1_LRCPC_VAL(user_cpu_desc.id_aa64isar1)) {
case ID_AA64ISAR1_LRCPC_RCPC_8_3:
hwcap \|= HWCAP_LRCPC;
break;
case ID_AA64ISAR1_LRCPC_RCPC_8_4:
hwcap \|= HWCAP_LRCPC \| HWCAP_ILRCPC;
break;
default:
break;
}

if (ID_AA64ISAR1_FCMA_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_FCMA_IMPL)
hwcap \|= HWCAP_FCMA;

if (ID_AA64ISAR1_JSCVT_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_JSCVT_IMPL)
hwcap \|= HWCAP_JSCVT;

if (ID_AA64ISAR1_DPB_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_DPB_DCCVAP)
hwcap \|= HWCAP_DCPOP;

if (ID_AA64MMFR2_AT_VAL(user_cpu_desc.id_aa64mmfr2) ==
ID_AA64MMFR2_AT_IMPL)
hwcap \|= HWCAP_USCAT;

if (ID_AA64PFR0_DIT_VAL(user_cpu_desc.id_aa64pfr0) ==
ID_AA64PFR0_DIT_PSTATE)
hwcap \|= HWCAP_DIT;

if (ID_AA64PFR0_SVE_VAL(user_cpu_desc.id_aa64pfr0) ==
ID_AA64PFR0_SVE_IMPL)
hwcap \|= HWCAP_SVE;

switch (ID_AA64PFR0_AdvSIMD_VAL(user_cpu_desc.id_aa64pfr0)) {
case ID_AA64PFR0_AdvSIMD_IMPL:
hwcap \|= HWCAP_ASIMD;
break;
case ID_AA64PFR0_AdvSIMD_HP:
hwcap \|= HWCAP_ASIMD \| HWCAP_ASIMDHP;
break;
default:
break;
}

switch (ID_AA64PFR0_FP_VAL(user_cpu_desc.id_aa64pfr0)) {
case ID_AA64PFR0_FP_IMPL:
hwcap \|= HWCAP_FP;
break;
case ID_AA64PFR0_FP_HP:
hwcap \|= HWCAP_FP \| HWCAP_FPHP;
break;
default:
break;
}

if (ID_AA64PFR1_SSBS_VAL(user_cpu_desc.id_aa64pfr1) ==
ID_AA64PFR1_SSBS_PSTATE_MSR)
hwcap \|= HWCAP_SSBS;

return (hwcap);
}

static u_long
parse_cpu_features_hwcap2(void)
{
u_long hwcap2 = 0;

if (ID_AA64ISAR0_RNDR_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_RNDR_IMPL)
hwcap2 \|= HWCAP2_RNG;

if (ID_AA64ISAR0_TS_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_TS_CondM_8_5)
hwcap2 \|= HWCAP2_FLAGM2;

if (ID_AA64ISAR1_I8MM_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_I8MM_IMPL)
hwcap2 \|= HWCAP2_I8MM;

if (ID_AA64ISAR1_DGH_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_DGH_IMPL)
hwcap2 \|= HWCAP2_DGH;

if (ID_AA64ISAR1_BF16_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_BF16_IMPL)
hwcap2 \|= HWCAP2_BF16;

if (ID_AA64ISAR1_FRINTTS_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_FRINTTS_IMPL)
hwcap2 \|= HWCAP2_FRINT;

if (ID_AA64ISAR1_DPB_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_DPB_DCCVADP)
hwcap2 \|= HWCAP2_DCPODP;

if (ID_AA64PFR1_BT_VAL(user_cpu_desc.id_aa64pfr1) ==
ID_AA64PFR1_BT_IMPL)
hwcap2 \|= HWCAP2_BTI;

return (hwcap2);
}

#ifdef COMPAT_FREEBSD32		#ifdef COMPAT_FREEBSD32
static u_long		static u_long
parse_cpu_features_hwcap32(void)		parse_cpu_features_hwcap32(void)
{		{
u_long hwcap = HWCAP32_DEFAULT;		u_long hwcap = HWCAP32_DEFAULT;

if (MVFR0_FPDP_VAL(user_cpu_desc.mvfr0) >=		if ((MVFR1_SIMDLS_VAL(user_cpu_desc.mvfr1) >=
MVFR0_FPDP_VFP_v2) {
hwcap \|= HWCAP32_VFP;

if (MVFR0_FPDP_VAL(user_cpu_desc.mvfr0) ==
MVFR0_FPDP_VFP_v3_v4) {
hwcap \|= HWCAP32_VFPv3;

if (MVFR1_SIMDFMAC_VAL(user_cpu_desc.mvfr1) ==
MVFR1_SIMDFMAC_IMPL)
hwcap \|= HWCAP32_VFPv4;
}
}

if ((MVFR1_SIMDLS_VAL(user_cpu_desc.mvfr1) ==
MVFR1_SIMDLS_IMPL) &&		MVFR1_SIMDLS_IMPL) &&
(MVFR1_SIMDInt_VAL(user_cpu_desc.mvfr1) ==		(MVFR1_SIMDInt_VAL(user_cpu_desc.mvfr1) >=
MVFR1_SIMDInt_IMPL) &&		MVFR1_SIMDInt_IMPL) &&
(MVFR1_SIMDSP_VAL(user_cpu_desc.mvfr1) ==		(MVFR1_SIMDSP_VAL(user_cpu_desc.mvfr1) >=
MVFR1_SIMDSP_IMPL))		MVFR1_SIMDSP_IMPL))
hwcap \|= HWCAP32_NEON;		hwcap \|= HWCAP32_NEON;

return (hwcap);		return (hwcap);
}

static u_long
parse_cpu_features_hwcap32_2(void)
{
u_long hwcap2 = 0;

if (ID_ISAR5_AES_VAL(user_cpu_desc.id_isar5) >=
ID_ISAR5_AES_BASE)
hwcap2 \|= HWCAP32_2_AES;

if (ID_ISAR5_AES_VAL(user_cpu_desc.id_isar5) ==
ID_ISAR5_AES_VMULL)
hwcap2 \|= HWCAP32_2_PMULL;

if (ID_ISAR5_SHA1_VAL(user_cpu_desc.id_isar5) ==
ID_ISAR5_SHA1_IMPL)
hwcap2 \|= HWCAP32_2_SHA1;

if (ID_ISAR5_SHA2_VAL(user_cpu_desc.id_isar5) ==
ID_ISAR5_SHA2_IMPL)
hwcap2 \|= HWCAP32_2_SHA2;

if (ID_ISAR5_CRC32_VAL(user_cpu_desc.id_isar5) ==
ID_ISAR5_CRC32_IMPL)
hwcap2 \|= HWCAP32_2_CRC32;

return (hwcap2);
}		}
#endif /* COMPAT_FREEBSD32 */		#endif /* COMPAT_FREEBSD32 */

static void		static void
print_ctr_fields(struct sbuf sb, uint64_t reg, void arg)		print_ctr_fields(struct sbuf sb, uint64_t reg, void arg)
{		{

sbuf_printf(sb, "%u byte D-cacheline,", CTR_DLINE_SIZE(reg));		sbuf_printf(sb, "%u byte D-cacheline,", CTR_DLINE_SIZE(reg));
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