Differential D27889 Diff 92755 sys/arm/ti/clk/ti_divider_clock.c

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sys/arm/ti/clk/ti_divider_clock.c

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	#include <sys/module.h>			#include <sys/module.h>
	#include <sys/systm.h>			#include <sys/systm.h>
	#include <sys/libkern.h>			#include <sys/libkern.h>

	#include <machine/bus.h>			#include <machine/bus.h>
	#include <dev/fdt/simplebus.h>			#include <dev/fdt/simplebus.h>

	#include <dev/extres/clk/clk_div.h>			#include <dev/extres/clk/clk_div.h>
				#include <dev/extres/syscon/syscon.h>
	#include <dev/ofw/ofw_bus.h>			#include <dev/ofw/ofw_bus.h>
	#include <dev/ofw/ofw_bus_subr.h>			#include <dev/ofw/ofw_bus_subr.h>

	#include "clock_common.h"			#include "clock_common.h"

				#include "clkdev_if.h"
				#include "syscon_if.h"

	#if 0			#if 0
	#define DPRINTF(dev, msg...) device_printf(dev, msg)			#define DPRINTF(dev, msg...) device_printf(dev, msg)
	#else			#else
	#define DPRINTF(dev, msg...)			#define DPRINTF(dev, msg...)
	#endif			#endif

	/*			/*
	* Devicetree description			* Devicetree description
	* Documentation/devicetree/bindings/clock/ti/divider.txt			* Documentation/devicetree/bindings/clock/ti/divider.txt
	*/			*/

	struct ti_divider_softc {			struct ti_divider_softc {
	device_t sc_dev;			device_t dev;
	bool attach_done;
	struct clk_div_def div_def;			struct clk_div_def div_def;

	struct clock_cell_info clock_cell;
	struct clkdom *clkdom;			struct clkdom *clkdom;
				struct syscon *syscon;
	};			};

	static int ti_divider_probe(device_t dev);			static int ti_divider_probe(device_t dev);
	static int ti_divider_attach(device_t dev);			static int ti_divider_attach(device_t dev);
	static int ti_divider_detach(device_t dev);			static int ti_divider_detach(device_t dev);

	#define TI_DIVIDER_CLOCK 2			#define TI_DIVIDER_CLOCK 2
	#define TI_COMPOSITE_DIVIDER_CLOCK 1			#define TI_COMPOSITE_DIVIDER_CLOCK 1
	#define TI_DIVIDER_END 0			#define TI_DIVIDER_END 0

	static struct ofw_compat_data compat_data[] = {			static struct ofw_compat_data compat_data[] = {
	{ "ti,divider-clock", TI_DIVIDER_CLOCK },			{ "ti,divider-clock", TI_DIVIDER_CLOCK },
	{ "ti,composite-divider-clock", TI_COMPOSITE_DIVIDER_CLOCK },			{ "ti,composite-divider-clock", TI_COMPOSITE_DIVIDER_CLOCK },
	{ NULL, TI_DIVIDER_END }			{ NULL, TI_DIVIDER_END }
	};			};

				PLIST(dpll_core_m4_ck_parent) = { "dpll_core_x2_ck" };
				PLIST(dpll_core_m5_ck_parent) = { "dpll_core_x2_ck" };
				PLIST(dpll_core_m6_ck_parent) = { "dpll_core_x2_ck" };
				PLIST(dpll_mpu_m2_ck_parent) = { "dpll_mpu_ck@488" };
				PLIST(dpll_ddr_m2_ck_parent) = { "dpll_ddr_ck@494" };
				PLIST(dpll_disp_m2_ck_parent) = { "dpll_disp_ck@498" };
				PLIST(dpll_per_m2_ck_parent) = { "dpll_per_ck@48c" };
				PLIST(gfx_fck_div_ck_parent) = { "gfx_fclk_clksel_ck@52c" };
				PLIST(clkout2_div_ck_parent) = { "sysclkout_pre_ck@700" };


				static struct parent_lookup_table div_parent_table[] = {
				{
				"dpll_core_m4_ck@480",
				nitems(dpll_core_m4_ck_parent),
				dpll_core_m4_ck_parent
				},
				{
				"dpll_core_m5_ck@484",
				nitems(dpll_core_m5_ck_parent),
				dpll_core_m5_ck_parent
				},
				{
				"dpll_core_m6_ck@4d8",
				nitems(dpll_core_m6_ck_parent),
				dpll_core_m6_ck_parent
				},
				{
				"dpll_mpu_m2_ck@4a8",
				nitems(dpll_mpu_m2_ck_parent),
				dpll_mpu_m2_ck_parent
				},
				{
				"dpll_ddr_m2_ck@4a0",
				nitems(dpll_ddr_m2_ck_parent),
				dpll_ddr_m2_ck_parent
				},
				{
				"dpll_disp_m2_ck@4a4",
				nitems(dpll_disp_m2_ck_parent),
				dpll_disp_m2_ck_parent
				},
				{
				"dpll_per_m2_ck@4ac",
				nitems(dpll_per_m2_ck_parent),
				dpll_per_m2_ck_parent
				},
				{
				"gfx_fck_div_ck@52c",
				nitems(gfx_fck_div_ck_parent),
				gfx_fck_div_ck_parent
				},
				{
				"clkout2_div_ck@700",
				nitems(clkout2_div_ck_parent),
				clkout2_div_ck_parent
				},
				};


	static int			static int
	register_clk(struct ti_divider_softc *sc) {			ti_divider_clkdev_write_4(device_t dev, bus_addr_t addr, uint32_t val)
	int err;			{
				struct ti_divider_softc *sc;

	sc->clkdom = clkdom_create(sc->sc_dev);			sc = device_get_softc(dev);
	if (sc->clkdom == NULL) {			DPRINTF(sc->dev, "ti_divider_clkdev_write_4: addr %x val %x\n",
	DPRINTF(sc->sc_dev, "Failed to create clkdom\n");			addr, val);
	return (ENXIO);			return (SYSCON_UNLOCKED_WRITE_4(sc->syscon, addr, val));
	}			}

	err = clknode_div_register(sc->clkdom, &sc->div_def);			static int
	if (err) {			ti_divider_clkdev_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
	DPRINTF(sc->sc_dev, "clknode_div_register failed %x\n", err);			{
	return (ENXIO);			struct ti_divider_softc *sc;
				uint32_t rdval;

				sc = device_get_softc(dev);

				rdval = SYSCON_UNLOCKED_READ_4(sc->syscon, addr);
				*val = rdval;
				DPRINTF(sc->dev, "ti_divider_clkdev_read_4: addr %x val %x\n",
				addr, *val);
				return (0);
	}			}

	err = clkdom_finit(sc->clkdom);			static int
	if (err) {			ti_divider_clkdev_modify_4(device_t dev, bus_addr_t addr,
	DPRINTF(sc->sc_dev, "Clk domain finit fails %x.\n", err);			uint32_t clear_mask, uint32_t set_mask)
	return (ENXIO);			{
				struct ti_divider_softc *sc;

				sc = device_get_softc(dev);
				DPRINTF(sc->dev, "ti_divider_clkdev_modify_4: addr %x clear %x set %x\n",
				addr, clear_mask, set_mask);
				return (SYSCON_UNLOCKED_MODIFY_4(sc->syscon, addr, clear_mask,
				set_mask));
	}			}

	return (0);			static void
				ti_divider_clkdev_device_lock(device_t dev)
				{
				struct ti_divider_softc *sc;

				sc = device_get_softc(dev);
				DPRINTF(sc->dev, "ti_divider_clkdev_device_lock\n");
				SYSCON_DEVICE_LOCK(sc->syscon->pdev);
	}			}

				static void
				ti_divider_clkdev_device_unlock(device_t dev)
				{
				struct ti_divider_softc *sc;

				sc = device_get_softc(dev);
				DPRINTF(sc->dev, "ti_divider_clkdev_device_unlock\n");
				SYSCON_DEVICE_UNLOCK(sc->syscon->pdev);
				}

	static int			static int
	ti_divider_probe(device_t dev)			ti_divider_probe(device_t dev)
	{			{
	if (!ofw_bus_status_okay(dev))			if (!ofw_bus_status_okay(dev))
	return (ENXIO);			return (ENXIO);

	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)			if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
	return (ENXIO);			return (ENXIO);

	device_set_desc(dev, "TI Divider Clock");			device_set_desc(dev, "TI Divider Clock");

	return (BUS_PROBE_DEFAULT);			return (BUS_PROBE_DEFAULT);
	}			}

	static int			static int
	ti_divider_attach(device_t dev)			ti_divider_attach(device_t dev)
	{			{
	struct ti_divider_softc *sc;			struct ti_divider_softc *sc;
	phandle_t node;			phandle_t node;
	int err;			int err, index;
	cell_t value;			cell_t value;
	uint32_t ti_max_div;			uint32_t ti_max_div;
				const char *node_name;

	sc = device_get_softc(dev);			sc = device_get_softc(dev);
	sc->sc_dev = dev;			sc->dev = dev;
	node = ofw_bus_get_node(dev);			node = ofw_bus_get_node(dev);

				err = SYSCON_GET_HANDLE(dev, &sc->syscon);
				if (err != 0) {
				panic("Cannot get syscon handle.\n");
				}

				node_name = ofw_bus_get_name(dev);
				if (node_name == NULL) {
				panic("Cannot get name of the clock node");
				}

	/* Grab the content of reg properties */			/* Grab the content of reg properties */
	OF_getencprop(node, "reg", &value, sizeof(value));			OF_getencprop(node, "reg", &value, sizeof(value));
	sc->div_def.offset = value;			sc->div_def.offset = value;

	if (OF_hasprop(node, "ti,bit-shift")) {			if (OF_hasprop(node, "ti,bit-shift")) {
	OF_getencprop(node, "ti,bit-shift", &value, sizeof(value));			OF_getencprop(node, "ti,bit-shift", &value, sizeof(value));
	sc->div_def.i_shift = value;			sc->div_def.i_shift = value;
	}			}

	if (OF_hasprop(node, "ti,index-starts-at-one")) {			if (OF_hasprop(node, "ti,index-starts-at-one")) {
	sc->div_def.div_flags = CLK_DIV_ZERO_BASED;			sc->div_def.div_flags = CLK_DIV_ZERO_BASED;
	}			}

	if (OF_hasprop(node, "ti,index-power-of-two")) {			if (OF_hasprop(node, "ti,index-power-of-two")) {
	/* FIXME: later */			/* FIXME: later */
	device_printf(sc->sc_dev, "ti,index-power-of-two - Not implemented\n");			device_printf(sc->dev,
				"ti,index-power-of-two - Not implemented\n");
	/* remember to update i_width a few lines below */			/* remember to update i_width a few lines below */
	}			}
	if (OF_hasprop(node, "ti,max-div")) {			if (OF_hasprop(node, "ti,max-div")) {
	OF_getencprop(node, "ti,max-div", &value, sizeof(value));			OF_getencprop(node, "ti,max-div", &value, sizeof(value));
	ti_max_div = value;			ti_max_div = value;
	}			}

	if (OF_hasprop(node, "clock-output-names"))			if (OF_hasprop(node, "clock-output-names"))
	device_printf(sc->sc_dev, "clock-output-names\n");			device_printf(sc->dev, "clock-output-names\n");
	if (OF_hasprop(node, "ti,dividers"))			if (OF_hasprop(node, "ti,dividers"))
	device_printf(sc->sc_dev, "ti,dividers\n");			device_printf(sc->dev, "ti,dividers\n");
	if (OF_hasprop(node, "ti,min-div"))			if (OF_hasprop(node, "ti,min-div"))
	device_printf(sc->sc_dev, "ti,min-div - Not implemented\n");			device_printf(sc->dev, "ti,min-div - Not implemented\n");

	if (OF_hasprop(node, "ti,autoidle-shift"))			if (OF_hasprop(node, "ti,autoidle-shift"))
	device_printf(sc->sc_dev, "ti,autoidle-shift - Not implemented\n");			device_printf(sc->dev,
				"ti,autoidle-shift - Not implemented\n");
	if (OF_hasprop(node, "ti,set-rate-parent"))			if (OF_hasprop(node, "ti,set-rate-parent"))
	device_printf(sc->sc_dev, "ti,set-rate-parent - Not implemented\n");			device_printf(sc->dev,
				"ti,set-rate-parent - Not implemented\n");
	if (OF_hasprop(node, "ti,latch-bit"))			if (OF_hasprop(node, "ti,latch-bit"))
	device_printf(sc->sc_dev, "ti,latch-bit - Not implemented\n");			device_printf(sc->dev,
				"ti,latch-bit - Not implemented\n");

	/* Figure out the width from ti_max_div */			/* Figure out the width from ti_max_div */
	if (sc->div_def.div_flags)			if (sc->div_def.div_flags)
	sc->div_def.i_width = fls(ti_max_div-1);			sc->div_def.i_width = fls(ti_max_div-1);
	else			else
	sc->div_def.i_width = fls(ti_max_div);			sc->div_def.i_width = fls(ti_max_div);

	DPRINTF(sc->sc_dev, "div_def.i_width %x\n", sc->div_def.i_width);			DPRINTF(sc->dev, "div_def.i_width %x\n", sc->div_def.i_width);

	read_clock_cells(sc->sc_dev, &sc->clock_cell);			/* Find parent in lookup table */
				for (index = 0; index < nitems(div_parent_table); index++) {
				if (strcmp(node_name, div_parent_table[index].node_name) == 0)
				break;
				}

	create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef);			if (index == nitems(div_parent_table))
				panic("Cant find clock %s\n", node_name);

	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef);			DPRINTF(sc->dev, "%s at div_parent_table[%d]\n", node_name, index);

	if (err) {			/* Fill clknode_init_def */
	/* free_clkdef will be called in ti_divider_new_pass */			sc->div_def.clkdef.id = 1;
	DPRINTF(sc->sc_dev, "find_parent_clock_names failed\n");			sc->div_def.clkdef.flags = CLK_NODE_STATIC_STRINGS;
	return (bus_generic_attach(sc->sc_dev));			sc->div_def.clkdef.name = div_parent_table[index].node_name;
				sc->div_def.clkdef.parent_cnt = div_parent_table[index].parent_cnt;
				sc->div_def.clkdef.parent_names =
				div_parent_table[index].parent_names;

				sc->clkdom = clkdom_create(sc->dev);
				if (sc->clkdom == NULL) {
				DPRINTF(sc->dev, "Failed to create clkdom\n");
				return (ENXIO);
	}			}

	err = register_clk(sc);			err = clknode_div_register(sc->clkdom, &sc->div_def);
				if (err != 0) {
				DPRINTF(sc->dev, "clknode_div_register failed %x\n", err);
				return (ENXIO);
				}

	if (err) {			err = clkdom_finit(sc->clkdom);
	/* free_clkdef will be called in ti_divider_new_pass */			if (err != 0) {
	DPRINTF(sc->sc_dev, "register_clk failed\n");			DPRINTF(sc->dev, "Clk domain finit fails %x.\n", err);
	return (bus_generic_attach(sc->sc_dev));			return (ENXIO);
	}			}

	sc->attach_done = true;			return (bus_generic_attach(sc->dev));

	free_clkdef(&sc->div_def.clkdef);

	return (bus_generic_attach(sc->sc_dev));
	}			}

	static int			static int
	ti_divider_detach(device_t dev)			ti_divider_detach(device_t dev)
	{			{
	return (EBUSY);			return (EBUSY);
	}			}

	static void
	ti_divider_new_pass(device_t dev)
	{
	struct ti_divider_softc *sc;
	int err;

	sc = device_get_softc(dev);

	if (sc->attach_done) {
	return;
	}

	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef);
	if (err) {
	/* free_clkdef will be called in a later call to ti_divider_new_pass */
	DPRINTF(sc->sc_dev, "new_pass find_parent_clock_names failed\n");
	return;
	}

	err = register_clk(sc);
	if (err) {
	/* free_clkdef will be called in a later call to ti_divider_new_pass */
	DPRINTF(sc->sc_dev, "new_pass register_clk failed\n");
	return;
	}

	sc->attach_done = true;

	free_clkdef(&sc->div_def.clkdef);
	}

	static device_method_t ti_divider_methods[] = {			static device_method_t ti_divider_methods[] = {
	/* Device interface */			/* Device interface */
	DEVMETHOD(device_probe, ti_divider_probe),			DEVMETHOD(device_probe, ti_divider_probe),
	DEVMETHOD(device_attach, ti_divider_attach),			DEVMETHOD(device_attach, ti_divider_attach),
	DEVMETHOD(device_detach, ti_divider_detach),			DEVMETHOD(device_detach, ti_divider_detach),

	/* Bus interface */			/* Clock device interface */
	DEVMETHOD(bus_new_pass, ti_divider_new_pass),			DEVMETHOD(clkdev_device_lock, ti_divider_clkdev_device_lock),
				DEVMETHOD(clkdev_device_unlock, ti_divider_clkdev_device_unlock),
				DEVMETHOD(clkdev_read_4, ti_divider_clkdev_read_4),
				DEVMETHOD(clkdev_write_4, ti_divider_clkdev_write_4),
				DEVMETHOD(clkdev_modify_4, ti_divider_clkdev_modify_4),

	DEVMETHOD_END			DEVMETHOD_END
	};			};

	DEFINE_CLASS_0(ti_divider, ti_divider_driver, ti_divider_methods,			DEFINE_CLASS_0(ti_divider, ti_divider_driver, ti_divider_methods,
	sizeof(struct ti_divider_softc));			sizeof(struct ti_divider_softc));

	static devclass_t ti_divider_devclass;			static devclass_t ti_divider_devclass;

	EARLY_DRIVER_MODULE(ti_divider, simplebus, ti_divider_driver,			EARLY_DRIVER_MODULE(ti_divider, simplebus, ti_divider_driver,
	ti_divider_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);			ti_divider_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
	MODULE_VERSION(ti_divider, 1);			MODULE_VERSION(ti_divider, 1);