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sys/dev/cadence/if_cgem.c
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#define TX_MAX_DMA_SEGS 8 /* maximum segs in a tx mbuf dma */ | #define TX_MAX_DMA_SEGS 8 /* maximum segs in a tx mbuf dma */ | ||||
#define CGEM_CKSUM_ASSIST (CSUM_IP | CSUM_TCP | CSUM_UDP | \ | #define CGEM_CKSUM_ASSIST (CSUM_IP | CSUM_TCP | CSUM_UDP | \ | ||||
CSUM_TCP_IPV6 | CSUM_UDP_IPV6) | CSUM_TCP_IPV6 | CSUM_UDP_IPV6) | ||||
#define HWTYPE_GENERIC_GEM 1 | #define HWTYPE_GENERIC_GEM 1 | ||||
#define HWTYPE_ZYNQ 2 | #define HWTYPE_ZYNQ 2 | ||||
#define HWTYPE_ZYNQMP 3 | #define HWTYPE_ZYNQMP 3 | ||||
#define HWTYPE_SIFIVE_FU540 4 | #define HWTYPE_SIFIVE 4 | ||||
static struct ofw_compat_data compat_data[] = { | static struct ofw_compat_data compat_data[] = { | ||||
{ "cdns,zynq-gem", HWTYPE_ZYNQ }, | { "cdns,zynq-gem", HWTYPE_ZYNQ }, | ||||
{ "cdns,zynqmp-gem", HWTYPE_ZYNQMP }, | { "cdns,zynqmp-gem", HWTYPE_ZYNQMP }, | ||||
{ "sifive,fu540-c000-gem", HWTYPE_SIFIVE_FU540 }, | { "sifive,fu540-c000-gem", HWTYPE_SIFIVE }, | ||||
{ "sifive,fu740-c000-gem", HWTYPE_SIFIVE }, | |||||
{ "cdns,gem", HWTYPE_GENERIC_GEM }, | { "cdns,gem", HWTYPE_GENERIC_GEM }, | ||||
{ "cadence,gem", HWTYPE_GENERIC_GEM }, | { "cadence,gem", HWTYPE_GENERIC_GEM }, | ||||
{ NULL, 0 } | { NULL, 0 } | ||||
}; | }; | ||||
struct cgem_softc { | struct cgem_softc { | ||||
if_t ifp; | if_t ifp; | ||||
struct mtx sc_mtx; | struct mtx sc_mtx; | ||||
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#ifdef EXT_RESOURCES | #ifdef EXT_RESOURCES | ||||
if (hwtype == HWTYPE_ZYNQ || hwtype == HWTYPE_ZYNQMP) { | if (hwtype == HWTYPE_ZYNQ || hwtype == HWTYPE_ZYNQMP) { | ||||
if (clk_get_by_ofw_name(dev, 0, "tx_clk", &sc->ref_clk) != 0) | if (clk_get_by_ofw_name(dev, 0, "tx_clk", &sc->ref_clk) != 0) | ||||
device_printf(dev, | device_printf(dev, | ||||
"could not retrieve reference clock.\n"); | "could not retrieve reference clock.\n"); | ||||
else if (clk_enable(sc->ref_clk) != 0) | else if (clk_enable(sc->ref_clk) != 0) | ||||
device_printf(dev, "could not enable clock.\n"); | device_printf(dev, "could not enable clock.\n"); | ||||
} | } else if (hwtype == HWTYPE_SIFIVE) { | ||||
else if (hwtype == HWTYPE_SIFIVE_FU540) { | |||||
if (clk_get_by_ofw_name(dev, 0, "pclk", &sc->ref_clk) != 0) | if (clk_get_by_ofw_name(dev, 0, "pclk", &sc->ref_clk) != 0) | ||||
device_printf(dev, | device_printf(dev, | ||||
"could not retrieve reference clock.\n"); | "could not retrieve reference clock.\n"); | ||||
else if (clk_enable(sc->ref_clk) != 0) | else if (clk_enable(sc->ref_clk) != 0) | ||||
device_printf(dev, "could not enable clock.\n"); | device_printf(dev, "could not enable clock.\n"); | ||||
} | } | ||||
#else | #else | ||||
/* Get reference clock number and base divider from fdt. */ | /* Get reference clock number and base divider from fdt. */ | ||||
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