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sys/dev/pci/pci_host_generic.c
| Show First 20 Lines • Show All 318 Lines • ▼ Show 20 Lines | if (rm != NULL) { | ||||
| KASSERT(rman_is_region_manager(res, rm), ("rman mismatch")); | KASSERT(rman_is_region_manager(res, rm), ("rman mismatch")); | ||||
| rman_release_resource(res); | rman_release_resource(res); | ||||
| } | } | ||||
| return (bus_generic_release_resource(dev, child, type, rid, res)); | return (bus_generic_release_resource(dev, child, type, rid, res)); | ||||
| } | } | ||||
| static bool | static bool | ||||
| generic_pcie_translate_resource(device_t dev, int type, rman_res_t start, | generic_pcie_translate_resource_common(device_t dev, int type, rman_res_t start, | ||||
hselasky: use the word _common instead of _end . | |||||
| rman_res_t end, rman_res_t *new_start, rman_res_t *new_end) | rman_res_t end, rman_res_t *new_start, rman_res_t *new_end) | ||||
| { | { | ||||
| struct generic_pcie_core_softc *sc; | struct generic_pcie_core_softc *sc; | ||||
| uint64_t phys_base; | uint64_t phys_base; | ||||
| uint64_t pci_base; | uint64_t pci_base; | ||||
| uint64_t size; | uint64_t size; | ||||
| int i, space; | int i, space; | ||||
| bool found; | bool found; | ||||
| Show All 39 Lines | default: | ||||
| *new_end = end; | *new_end = end; | ||||
| found = true; | found = true; | ||||
| break; | break; | ||||
| } | } | ||||
| return (found); | return (found); | ||||
| } | } | ||||
| static int | |||||
| generic_pcie_translate_resource(device_t bus, int type, | |||||
| rman_res_t start, rman_res_t *newstart) | |||||
| { | |||||
| rman_res_t newend; /* unused */ | |||||
| return (!generic_pcie_translate_resource_common( | |||||
| bus, type, start, 0, newstart, &newend)); | |||||
| } | |||||
| struct resource * | struct resource * | ||||
| pci_host_generic_core_alloc_resource(device_t dev, device_t child, int type, | pci_host_generic_core_alloc_resource(device_t dev, device_t child, int type, | ||||
| int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) | int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) | ||||
| { | { | ||||
| struct generic_pcie_core_softc *sc; | struct generic_pcie_core_softc *sc; | ||||
| struct resource *res; | struct resource *res; | ||||
| struct rman *rm; | struct rman *rm; | ||||
| rman_res_t phys_start, phys_end; | rman_res_t phys_start, phys_end; | ||||
| sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
| #if defined(NEW_PCIB) && defined(PCI_RES_BUS) | #if defined(NEW_PCIB) && defined(PCI_RES_BUS) | ||||
| if (type == PCI_RES_BUS) { | if (type == PCI_RES_BUS) { | ||||
| return (pci_domain_alloc_bus(sc->ecam, child, rid, start, end, | return (pci_domain_alloc_bus(sc->ecam, child, rid, start, end, | ||||
| count, flags)); | count, flags)); | ||||
| } | } | ||||
| #endif | #endif | ||||
| rm = generic_pcie_rman(sc, type, flags); | rm = generic_pcie_rman(sc, type, flags); | ||||
| if (rm == NULL) | if (rm == NULL) | ||||
| return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, | return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, | ||||
| type, rid, start, end, count, flags)); | type, rid, start, end, count, flags)); | ||||
| /* Translate the address from a PCI address to a physical address */ | /* Translate the address from a PCI address to a physical address */ | ||||
| if (!generic_pcie_translate_resource(dev, type, start, end, &phys_start, | if (!generic_pcie_translate_resource_common(dev, type, start, end, &phys_start, | ||||
| &phys_end)) { | &phys_end)) { | ||||
| device_printf(dev, | device_printf(dev, | ||||
| "Failed to translate resource %jx-%jx type %x for %s\n", | "Failed to translate resource %jx-%jx type %x for %s\n", | ||||
| (uintmax_t)start, (uintmax_t)end, type, | (uintmax_t)start, (uintmax_t)end, type, | ||||
| device_get_nameunit(child)); | device_get_nameunit(child)); | ||||
| return (NULL); | return (NULL); | ||||
| } | } | ||||
| Show All 35 Lines | generic_pcie_activate_resource(device_t dev, device_t child, int type, | ||||
| sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
| if ((res = rman_activate_resource(r)) != 0) | if ((res = rman_activate_resource(r)) != 0) | ||||
| return (res); | return (res); | ||||
| start = rman_get_start(r); | start = rman_get_start(r); | ||||
| end = rman_get_end(r); | end = rman_get_end(r); | ||||
| if (!generic_pcie_translate_resource(dev, type, start, end, &start, | if (!generic_pcie_translate_resource_common(dev, type, start, end, &start, | ||||
| &end)) | &end)) | ||||
| return (EINVAL); | return (EINVAL); | ||||
| rman_set_start(r, start); | rman_set_start(r, start); | ||||
| rman_set_end(r, end); | rman_set_end(r, end); | ||||
| return (BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, | return (BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, | ||||
| rid, r)); | rid, r)); | ||||
| } | } | ||||
| ▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines | static device_method_t generic_pcie_methods[] = { | ||||
| DEVMETHOD(device_attach, pci_host_generic_core_attach), | DEVMETHOD(device_attach, pci_host_generic_core_attach), | ||||
| DEVMETHOD(bus_read_ivar, generic_pcie_read_ivar), | DEVMETHOD(bus_read_ivar, generic_pcie_read_ivar), | ||||
| DEVMETHOD(bus_write_ivar, generic_pcie_write_ivar), | DEVMETHOD(bus_write_ivar, generic_pcie_write_ivar), | ||||
| DEVMETHOD(bus_alloc_resource, pci_host_generic_core_alloc_resource), | DEVMETHOD(bus_alloc_resource, pci_host_generic_core_alloc_resource), | ||||
| DEVMETHOD(bus_adjust_resource, generic_pcie_adjust_resource), | DEVMETHOD(bus_adjust_resource, generic_pcie_adjust_resource), | ||||
| DEVMETHOD(bus_activate_resource, generic_pcie_activate_resource), | DEVMETHOD(bus_activate_resource, generic_pcie_activate_resource), | ||||
| DEVMETHOD(bus_deactivate_resource, generic_pcie_deactivate_resource), | DEVMETHOD(bus_deactivate_resource, generic_pcie_deactivate_resource), | ||||
| DEVMETHOD(bus_release_resource, pci_host_generic_core_release_resource), | DEVMETHOD(bus_release_resource, pci_host_generic_core_release_resource), | ||||
| DEVMETHOD(bus_translate_resource, generic_pcie_translate_resource), | |||||
| DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), | DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), | ||||
| DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), | DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), | ||||
| DEVMETHOD(bus_get_dma_tag, generic_pcie_get_dma_tag), | DEVMETHOD(bus_get_dma_tag, generic_pcie_get_dma_tag), | ||||
| /* pcib interface */ | /* pcib interface */ | ||||
| DEVMETHOD(pcib_maxslots, generic_pcie_maxslots), | DEVMETHOD(pcib_maxslots, generic_pcie_maxslots), | ||||
| DEVMETHOD(pcib_read_config, generic_pcie_read_config), | DEVMETHOD(pcib_read_config, generic_pcie_read_config), | ||||
| DEVMETHOD(pcib_write_config, generic_pcie_write_config), | DEVMETHOD(pcib_write_config, generic_pcie_write_config), | ||||
| DEVMETHOD_END | DEVMETHOD_END | ||||
| }; | }; | ||||
| DEFINE_CLASS_0(pcib, generic_pcie_core_driver, | DEFINE_CLASS_0(pcib, generic_pcie_core_driver, | ||||
| generic_pcie_methods, sizeof(struct generic_pcie_core_softc)); | generic_pcie_methods, sizeof(struct generic_pcie_core_softc)); | ||||
use the word _common instead of _end .