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sys/dev/smartpqi/smartpqi_main.c
/*- | /*- | ||||
* Copyright (c) 2018 Microsemi Corporation. | * Copyright 2016-2021 Microchip Technology, Inc. and/or its subsidiaries. | ||||
* All rights reserved. | |||||
* | * | ||||
* Redistribution and use in source and binary forms, with or without | * Redistribution and use in source and binary forms, with or without | ||||
* modification, are permitted provided that the following conditions | * modification, are permitted provided that the following conditions | ||||
* are met: | * are met: | ||||
* 1. Redistributions of source code must retain the above copyright | * 1. Redistributions of source code must retain the above copyright | ||||
* notice, this list of conditions and the following disclaimer. | * notice, this list of conditions and the following disclaimer. | ||||
* 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright | ||||
* notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the | ||||
Show All 16 Lines | |||||
/* | /* | ||||
* Driver for the Microsemi Smart storage controllers | * Driver for the Microsemi Smart storage controllers | ||||
*/ | */ | ||||
#include "smartpqi_includes.h" | #include "smartpqi_includes.h" | ||||
#include "smartpqi_prototypes.h" | #include "smartpqi_prototypes.h" | ||||
CTASSERT(BSD_SUCCESS == PQI_STATUS_SUCCESS); | |||||
/* | /* | ||||
* Supported devices | * Supported devices | ||||
*/ | */ | ||||
struct pqi_ident | struct pqi_ident | ||||
{ | { | ||||
u_int16_t vendor; | u_int16_t vendor; | ||||
u_int16_t device; | u_int16_t device; | ||||
u_int16_t subvendor; | u_int16_t subvendor; | ||||
u_int16_t subdevice; | u_int16_t subdevice; | ||||
int hwif; | int hwif; | ||||
char *desc; | char *desc; | ||||
} pqi_identifiers[] = { | } pqi_identifiers[] = { | ||||
/* (MSCC PM8205 8x12G based) */ | /* (MSCC PM8205 8x12G based) */ | ||||
{0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, | ||||
{0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, | {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, | ||||
{0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, | {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, | ||||
{0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, | {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, | ||||
/* (MSCC PM8225 8x12G based) */ | /* (MSCC PM8225 8x12G based) */ | ||||
{0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"}, | ||||
/* (MSCC PM8221 8x12G based) */ | /* (MSCC PM8221 8x12G based) */ | ||||
{0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"}, | ||||
{0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"}, | |||||
{0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"}, | |||||
{0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"}, | |||||
/* (MSCC PM8204 8x12G based) */ | /* (MSCC PM8204 8x12G based) */ | ||||
{0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"}, | {0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"}, | {0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"}, | {0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"}, | {0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"}, | {0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"}, | {0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"}, | {0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"}, | ||||
{0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"}, | {0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"}, | ||||
{0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"}, | {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"}, | ||||
{0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"}, | {0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"}, | ||||
{0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"}, | {0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR RAID PM8204-2GB"}, | {0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR PM8204-2GB"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR RAID PM8204-4GB"}, | {0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR PM8204-4GB"}, | ||||
{0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"}, | |||||
{0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"}, | |||||
{0x9005, 0x028f, 0x1d8d, 0x800, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"}, | |||||
{0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV, "SmartRAID 3101E-4i"}, | |||||
{0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"}, | |||||
{0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"}, | |||||
/* (MSCC PM8222 8x12G based) */ | /* (MSCC PM8222 8x12G based) */ | ||||
{0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"}, | {0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"}, | {0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"}, | {0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"}, | {0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"}, | {0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"}, | {0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"}, | {0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"}, | {0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"}, | ||||
{0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"}, | {0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"}, | ||||
{0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"}, | {0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"}, | ||||
{0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"}, | {0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"}, | ||||
{0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"}, | {0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR SMART-HBA PM8222-SHBA"}, | {0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"}, | ||||
{0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"}, | |||||
{0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR PM8222-SHBA"}, | |||||
{0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"}, | {0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "INSPUR PM8222-HBA"}, | |||||
{0x9005, 0x028f, 0x1d8d, 0x908, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"}, | |||||
/* (SRCx MSCC FVB 24x12G based) */ | /* (SRCx MSCC FVB 24x12G based) */ | ||||
{0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"}, | {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"}, | ||||
/* (MSCC PM8241 24x12G based) */ | /* (MSCC PM8241 24x12G based) */ | ||||
/* (MSCC PM8242 24x12G based) */ | /* (MSCC PM8242 24x12G based) */ | ||||
{0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"}, | {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"}, | {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"}, | {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"}, | {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"}, | {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"}, | ||||
{0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"}, | {0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"}, | {0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"}, | ||||
/* (MSCC PM8236 16x12G based) */ | /* (MSCC PM8236 16x12G based) */ | ||||
{0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"}, | {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"}, | {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"}, | {0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"}, | ||||
{0x9005, 0x028f, 0x1d8d, 0x806, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"}, | |||||
/* (MSCC PM8237 24x12G based) */ | /* (MSCC PM8237 24x12G based) */ | ||||
{0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"}, | {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"}, | ||||
{0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"}, | {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"}, | ||||
/* (MSCC PM8238 16x12G based) */ | /* (MSCC PM8238 16x12G based) */ | ||||
{0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"}, | {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"}, | {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"}, | {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"}, | ||||
{0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"}, | {0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"}, | {0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"}, | {0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"}, | ||||
{0x9005, 0x028f, 0x1d8d, 0x916, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"}, | |||||
{0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"}, | |||||
/* (MSCC PM8240 24x12G based) */ | /* (MSCC PM8240 24x12G based) */ | ||||
{0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"}, | {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"}, | {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"}, | {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"}, | ||||
{0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"}, | {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"}, | ||||
{0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"}, | {0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"}, | ||||
/* Huawei ID's */ | |||||
{0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"}, | |||||
{0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"}, | |||||
{0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"}, | |||||
{0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"}, | |||||
{0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"}, | |||||
{0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"}, | |||||
{0, 0, 0, 0, 0, 0} | {0, 0, 0, 0, 0, 0} | ||||
}; | }; | ||||
struct pqi_ident | struct pqi_ident | ||||
pqi_family_identifiers[] = { | pqi_family_identifiers[] = { | ||||
{0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"}, | {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"}, | ||||
{0, 0, 0, 0, 0, 0} | {0, 0, 0, 0, 0, 0} | ||||
}; | }; | ||||
/* | /* | ||||
* Function to identify the installed adapter. | * Function to identify the installed adapter. | ||||
*/ | */ | ||||
static struct pqi_ident * | static struct | ||||
pqi_find_ident(device_t dev) | pqi_ident *pqi_find_ident(device_t dev) | ||||
{ | { | ||||
struct pqi_ident *m; | struct pqi_ident *m; | ||||
u_int16_t vendid, devid, sub_vendid, sub_devid; | u_int16_t vendid, devid, sub_vendid, sub_devid; | ||||
vendid = pci_get_vendor(dev); | vendid = pci_get_vendor(dev); | ||||
devid = pci_get_device(dev); | devid = pci_get_device(dev); | ||||
sub_vendid = pci_get_subvendor(dev); | sub_vendid = pci_get_subvendor(dev); | ||||
sub_devid = pci_get_subdevice(dev); | sub_devid = pci_get_subdevice(dev); | ||||
Show All 19 Lines | |||||
* Determine whether this is one of our supported adapters. | * Determine whether this is one of our supported adapters. | ||||
*/ | */ | ||||
static int | static int | ||||
smartpqi_probe(device_t dev) | smartpqi_probe(device_t dev) | ||||
{ | { | ||||
struct pqi_ident *id; | struct pqi_ident *id; | ||||
if ((id = pqi_find_ident(dev)) != NULL) { | if ((id = pqi_find_ident(dev)) != NULL) { | ||||
device_set_desc(dev, id->desc); | device_set_desc(dev, id->desc); | ||||
return(BUS_PROBE_VENDOR); | return(BUS_PROBE_VENDOR); | ||||
} | } | ||||
return(ENXIO); | return(ENXIO); | ||||
} | } | ||||
/* | /* | ||||
* Store Bus/Device/Function in softs | * Store Bus/Device/Function in softs | ||||
*/ | */ | ||||
void pqisrc_save_controller_info(struct pqisrc_softstate *softs) | void | ||||
pqisrc_save_controller_info(struct pqisrc_softstate *softs) | |||||
{ | { | ||||
device_t dev = softs->os_specific.pqi_dev; | device_t dev = softs->os_specific.pqi_dev; | ||||
softs->bus_id = (uint32_t)pci_get_bus(dev); | softs->bus_id = (uint32_t)pci_get_bus(dev); | ||||
softs->device_id = (uint32_t)pci_get_device(dev); | softs->device_id = (uint32_t)pci_get_device(dev); | ||||
softs->func_id = (uint32_t)pci_get_function(dev); | softs->func_id = (uint32_t)pci_get_function(dev); | ||||
} | } | ||||
/* | /* | ||||
* Allocate resources for our device, set up the bus interface. | * Allocate resources for our device, set up the bus interface. | ||||
* Initialize the PQI related functionality, scan devices, register sim to | * Initialize the PQI related functionality, scan devices, register sim to | ||||
* upper layer, create management interface device node etc. | * upper layer, create management interface device node etc. | ||||
*/ | */ | ||||
static int | static int | ||||
smartpqi_attach(device_t dev) | smartpqi_attach(device_t dev) | ||||
{ | { | ||||
struct pqisrc_softstate *softs = NULL; | struct pqisrc_softstate *softs = NULL; | ||||
struct pqi_ident *id = NULL; | struct pqi_ident *id = NULL; | ||||
int error = 0; | int error = BSD_SUCCESS; | ||||
u_int32_t command = 0, i = 0; | u_int32_t command = 0, i = 0; | ||||
int card_index = device_get_unit(dev); | int card_index = device_get_unit(dev); | ||||
rcb_t *rcbp = NULL; | rcb_t *rcbp = NULL; | ||||
/* | /* | ||||
* Initialise softc. | * Initialise softc. | ||||
*/ | */ | ||||
softs = device_get_softc(dev); | softs = device_get_softc(dev); | ||||
if (!softs) { | if (!softs) { | ||||
printf("Could not get softc\n"); | printf("Could not get softc\n"); | ||||
error = EINVAL; | error = EINVAL; | ||||
goto out; | goto out; | ||||
} | } | ||||
memset(softs, 0, sizeof(*softs)); | memset(softs, 0, sizeof(*softs)); | ||||
softs->os_specific.pqi_dev = dev; | softs->os_specific.pqi_dev = dev; | ||||
DBG_FUNC("IN\n"); | DBG_FUNC("IN\n"); | ||||
/* assume failure is 'not configured' */ | /* assume failure is 'not configured' */ | ||||
error = ENXIO; | error = ENXIO; | ||||
/* | /* | ||||
* Verify that the adapter is correctly set up in PCI space. | * Verify that the adapter is correctly set up in PCI space. | ||||
*/ | */ | ||||
pci_enable_busmaster(softs->os_specific.pqi_dev); | pci_enable_busmaster(softs->os_specific.pqi_dev); | ||||
command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2); | command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2); | ||||
if ((command & PCIM_CMD_MEMEN) == 0) { | if ((command & PCIM_CMD_MEMEN) == 0) { | ||||
DBG_ERR("memory window not available command = %d\n", command); | DBG_ERR("memory window not available command = %d\n", command); | ||||
error = ENXIO; | error = ENXIO; | ||||
goto out; | goto out; | ||||
} | } | ||||
/* | /* | ||||
* Detect the hardware interface version, set up the bus interface | * Detect the hardware interface version, set up the bus interface | ||||
* indirection. | * indirection. | ||||
*/ | */ | ||||
id = pqi_find_ident(dev); | id = pqi_find_ident(dev); | ||||
if (!id) { | |||||
DBG_ERR("NULL return value from pqi_find_ident\n"); | |||||
goto out; | |||||
} | |||||
softs->os_specific.pqi_hwif = id->hwif; | softs->os_specific.pqi_hwif = id->hwif; | ||||
switch(softs->os_specific.pqi_hwif) { | switch(softs->os_specific.pqi_hwif) { | ||||
case PQI_HWIF_SRCV: | case PQI_HWIF_SRCV: | ||||
DBG_INFO("set hardware up for PMC SRCv for %p", softs); | DBG_INFO("set hardware up for PMC SRCv for %p\n", softs); | ||||
break; | break; | ||||
default: | default: | ||||
softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN; | softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN; | ||||
DBG_ERR("unknown hardware type\n"); | DBG_ERR("unknown hardware type\n"); | ||||
error = ENXIO; | error = ENXIO; | ||||
goto out; | goto out; | ||||
} | } | ||||
Show All 17 Lines | smartpqi_attach(device_t dev) | ||||
softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0); | softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0); | ||||
softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0); | softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0); | ||||
/* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */ | /* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */ | ||||
softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0); | softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0); | ||||
/* | /* | ||||
* Allocate the parent bus DMA tag appropriate for our PCI interface. | * Allocate the parent bus DMA tag appropriate for our PCI interface. | ||||
* | * | ||||
* Note that some of these controllers are 64-bit capable. | * Note that some of these controllers are 64-bit capable. | ||||
*/ | */ | ||||
if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ | if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ | ||||
PAGE_SIZE, 0, /* algnmnt, boundary */ | PAGE_SIZE, 0, /* algnmnt, boundary */ | ||||
BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ | ||||
BUS_SPACE_MAXADDR, /* highaddr */ | BUS_SPACE_MAXADDR, /* highaddr */ | ||||
NULL, NULL, /* filter, filterarg */ | NULL, NULL, /* filter, filterarg */ | ||||
BUS_SPACE_MAXSIZE_32BIT, /* maxsize */ | BUS_SPACE_MAXSIZE_32BIT, /* maxsize */ | ||||
BUS_SPACE_UNRESTRICTED, /* nsegments */ | BUS_SPACE_UNRESTRICTED, /* nsegments */ | ||||
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ | BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ | ||||
0, /* flags */ | 0, /* flags */ | ||||
NULL, NULL, /* No locking needed */ | NULL, NULL, /* No locking needed */ | ||||
&softs->os_specific.pqi_parent_dmat)) { | &softs->os_specific.pqi_parent_dmat)) { | ||||
DBG_ERR("can't allocate parent DMA tag\n"); | DBG_ERR("can't allocate parent DMA tag\n"); | ||||
/* assume failure is 'out of memory' */ | /* assume failure is 'out of memory' */ | ||||
error = ENOMEM; | error = ENOMEM; | ||||
goto dma_out; | goto dma_out; | ||||
} | } | ||||
softs->os_specific.sim_registered = FALSE; | softs->os_specific.sim_registered = FALSE; | ||||
softs->os_name = "FreeBSD "; | softs->os_name = "FreeBSD "; | ||||
/* Initialize the PQI library */ | /* Initialize the PQI library */ | ||||
error = pqisrc_init(softs); | error = pqisrc_init(softs); | ||||
if (error) { | if (error != PQI_STATUS_SUCCESS) { | ||||
DBG_ERR("Failed to initialize pqi lib error = %d\n", error); | DBG_ERR("Failed to initialize pqi lib error = %d\n", error); | ||||
error = PQI_STATUS_FAILURE; | error = ENXIO; | ||||
goto out; | goto out; | ||||
} | } | ||||
else { | |||||
error = BSD_SUCCESS; | |||||
} | |||||
mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF); | mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF); | ||||
softs->os_specific.mtx_init = TRUE; | softs->os_specific.mtx_init = TRUE; | ||||
mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF); | mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF); | ||||
callout_init(&softs->os_specific.wellness_periodic, 1); | callout_init(&softs->os_specific.wellness_periodic, 1); | ||||
callout_init(&softs->os_specific.heartbeat_timeout_id, 1); | callout_init(&softs->os_specific.heartbeat_timeout_id, 1); | ||||
/* | /* | ||||
* Create DMA tag for mapping buffers into controller-addressable space. | * Create DMA tag for mapping buffers into controller-addressable space. | ||||
*/ | */ | ||||
if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */ | if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */ | ||||
1, 0, /* algnmnt, boundary */ | PAGE_SIZE, 0, /* algnmnt, boundary */ | ||||
BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ | ||||
BUS_SPACE_MAXADDR, /* highaddr */ | BUS_SPACE_MAXADDR, /* highaddr */ | ||||
NULL, NULL, /* filter, filterarg */ | NULL, NULL, /* filter, filterarg */ | ||||
softs->pqi_cap.max_sg_elem*PAGE_SIZE,/*maxsize*/ | (bus_size_t)softs->pqi_cap.max_sg_elem*PAGE_SIZE,/* maxsize */ | ||||
softs->pqi_cap.max_sg_elem, /* nsegments */ | softs->pqi_cap.max_sg_elem, /* nsegments */ | ||||
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ | BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ | ||||
BUS_DMA_ALLOCNOW, /* flags */ | BUS_DMA_ALLOCNOW, /* flags */ | ||||
busdma_lock_mutex, /* lockfunc */ | busdma_lock_mutex, /* lockfunc */ | ||||
&softs->os_specific.map_lock, /* lockfuncarg*/ | &softs->os_specific.map_lock, /* lockfuncarg*/ | ||||
&softs->os_specific.pqi_buffer_dmat)) { | &softs->os_specific.pqi_buffer_dmat)) { | ||||
DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n"); | DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n"); | ||||
return (ENOMEM); | return (ENOMEM); | ||||
} | } | ||||
rcbp = &softs->rcb[1]; | rcbp = &softs->rcb[1]; | ||||
for( i = 1; i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) { | for( i = 1; i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) { | ||||
if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) { | if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) { | ||||
DBG_ERR("Cant create datamap for buf @" | DBG_ERR("Cant create datamap for buf @" | ||||
"rcbp = %p maxio = %d error = %d\n", | "rcbp = %p maxio = %d error = %d\n", | ||||
rcbp, softs->pqi_cap.max_outstanding_io, error); | rcbp, softs->pqi_cap.max_outstanding_io, error); | ||||
goto dma_out; | goto dma_out; | ||||
} | } | ||||
} | } | ||||
os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */ | os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */ | ||||
callout_reset(&softs->os_specific.wellness_periodic, 120*hz, | callout_reset(&softs->os_specific.wellness_periodic, 120 * hz, | ||||
os_wellness_periodic, softs); | os_wellness_periodic, softs); | ||||
/* Register our shutdown handler. */ | |||||
softs->os_specific.eh = EVENTHANDLER_REGISTER(shutdown_final, | |||||
smartpqi_shutdown, softs, SHUTDOWN_PRI_DEFAULT); | |||||
error = pqisrc_scan_devices(softs); | error = pqisrc_scan_devices(softs); | ||||
if (error) { | if (error != PQI_STATUS_SUCCESS) { | ||||
DBG_ERR("Failed to scan lib error = %d\n", error); | DBG_ERR("Failed to scan lib error = %d\n", error); | ||||
error = PQI_STATUS_FAILURE; | error = ENXIO; | ||||
goto out; | goto out; | ||||
} | } | ||||
error = register_sim(softs, card_index); | error = register_sim(softs, card_index); | ||||
if (error) { | if (error) { | ||||
DBG_ERR("Failed to register sim index = %d error = %d\n", | DBG_ERR("Failed to register sim index = %d error = %d\n", | ||||
card_index, error); | card_index, error); | ||||
goto out; | goto out; | ||||
} | } | ||||
smartpqi_target_rescan(softs); | smartpqi_target_rescan(softs); | ||||
TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs); | TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs); | ||||
error = create_char_dev(softs, card_index); | error = create_char_dev(softs, card_index); | ||||
if (error) { | if (error) { | ||||
DBG_ERR("Failed to register character device index=%d r=%d\n", | DBG_ERR("Failed to register character device index=%d r=%d\n", | ||||
card_index, error); | card_index, error); | ||||
goto out; | goto out; | ||||
} | } | ||||
goto out; | goto out; | ||||
dma_out: | dma_out: | ||||
if (softs->os_specific.pqi_regs_res0 != NULL) | if (softs->os_specific.pqi_regs_res0 != NULL) | ||||
bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY, | bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY, | ||||
softs->os_specific.pqi_regs_rid0, | softs->os_specific.pqi_regs_rid0, | ||||
softs->os_specific.pqi_regs_res0); | softs->os_specific.pqi_regs_res0); | ||||
out: | out: | ||||
DBG_FUNC("OUT error = %d\n", error); | DBG_FUNC("OUT error = %d\n", error); | ||||
return(error); | return(error); | ||||
} | } | ||||
/* | /* | ||||
* Deallocate resources for our device. | * Deallocate resources for our device. | ||||
*/ | */ | ||||
static int | static int | ||||
smartpqi_detach(device_t dev) | smartpqi_detach(device_t dev) | ||||
{ | { | ||||
struct pqisrc_softstate *softs = NULL; | struct pqisrc_softstate *softs = device_get_softc(dev); | ||||
softs = device_get_softc(dev); | int rval = BSD_SUCCESS; | ||||
DBG_FUNC("IN\n"); | DBG_FUNC("IN\n"); | ||||
EVENTHANDLER_DEREGISTER(shutdown_final, softs->os_specific.eh); | if (softs == NULL) | ||||
return ENXIO; | |||||
/* kill the periodic event */ | /* kill the periodic event */ | ||||
callout_drain(&softs->os_specific.wellness_periodic); | callout_drain(&softs->os_specific.wellness_periodic); | ||||
/* Kill the heart beat event */ | /* Kill the heart beat event */ | ||||
callout_drain(&softs->os_specific.heartbeat_timeout_id); | callout_drain(&softs->os_specific.heartbeat_timeout_id); | ||||
smartpqi_shutdown(softs); | if (!pqisrc_ctrl_offline(softs)) { | ||||
rval = pqisrc_flush_cache(softs, PQISRC_NONE_CACHE_FLUSH_ONLY); | |||||
if (rval != PQI_STATUS_SUCCESS) { | |||||
DBG_ERR("Unable to flush adapter cache! rval = %d\n", rval); | |||||
rval = EIO; | |||||
} | |||||
} | |||||
destroy_char_dev(softs); | destroy_char_dev(softs); | ||||
pqisrc_uninit(softs); | pqisrc_uninit(softs); | ||||
deregister_sim(softs); | deregister_sim(softs); | ||||
pci_release_msi(dev); | pci_release_msi(dev); | ||||
DBG_FUNC("OUT\n"); | DBG_FUNC("OUT\n"); | ||||
return 0; | |||||
return rval; | |||||
} | } | ||||
/* | /* | ||||
* Bring the controller to a quiescent state, ready for system suspend. | * Bring the controller to a quiescent state, ready for system suspend. | ||||
*/ | */ | ||||
static int | static int | ||||
smartpqi_suspend(device_t dev) | smartpqi_suspend(device_t dev) | ||||
{ | { | ||||
struct pqisrc_softstate *softs; | struct pqisrc_softstate *softs = device_get_softc(dev); | ||||
softs = device_get_softc(dev); | |||||
DBG_FUNC("IN\n"); | DBG_FUNC("IN\n"); | ||||
if (softs == NULL) | |||||
return ENXIO; | |||||
DBG_INFO("Suspending the device %p\n", softs); | DBG_INFO("Suspending the device %p\n", softs); | ||||
softs->os_specific.pqi_state |= SMART_STATE_SUSPEND; | softs->os_specific.pqi_state |= SMART_STATE_SUSPEND; | ||||
DBG_FUNC("OUT\n"); | DBG_FUNC("OUT\n"); | ||||
return(0); | |||||
return BSD_SUCCESS; | |||||
} | } | ||||
/* | /* | ||||
* Bring the controller back to a state ready for operation. | * Bring the controller back to a state ready for operation. | ||||
*/ | */ | ||||
static int | static int | ||||
smartpqi_resume(device_t dev) | smartpqi_resume(device_t dev) | ||||
{ | { | ||||
struct pqisrc_softstate *softs; | struct pqisrc_softstate *softs = device_get_softc(dev); | ||||
softs = device_get_softc(dev); | |||||
DBG_FUNC("IN\n"); | DBG_FUNC("IN\n"); | ||||
if (softs == NULL) | |||||
return ENXIO; | |||||
softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND; | softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND; | ||||
DBG_FUNC("OUT\n"); | DBG_FUNC("OUT\n"); | ||||
return(0); | |||||
return BSD_SUCCESS; | |||||
} | } | ||||
/* | /* | ||||
* Do whatever is needed during a system shutdown. | * Do whatever is needed during a system shutdown. | ||||
*/ | */ | ||||
int | static int | ||||
smartpqi_shutdown(void *arg) | smartpqi_shutdown(device_t dev) | ||||
{ | { | ||||
struct pqisrc_softstate *softs = NULL; | struct pqisrc_softstate *softs = device_get_softc(dev); | ||||
int rval = 0; | int bsd_status = BSD_SUCCESS; | ||||
int pqi_status; | |||||
DBG_FUNC("IN\n"); | DBG_FUNC("IN\n"); | ||||
softs = (struct pqisrc_softstate *)arg; | if (softs == NULL) | ||||
return ENXIO; | |||||
rval = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN); | if (pqisrc_ctrl_offline(softs)) | ||||
if (rval != PQI_STATUS_SUCCESS) { | return BSD_SUCCESS; | ||||
DBG_ERR("Unable to flush adapter cache! rval = %d", rval); | |||||
pqi_status = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN); | |||||
if (pqi_status != PQI_STATUS_SUCCESS) { | |||||
DBG_ERR("Unable to flush adapter cache! rval = %d\n", pqi_status); | |||||
bsd_status = EIO; | |||||
} | } | ||||
DBG_FUNC("OUT\n"); | DBG_FUNC("OUT\n"); | ||||
return rval; | return bsd_status; | ||||
} | } | ||||
/* | /* | ||||
* PCI bus interface. | * PCI bus interface. | ||||
*/ | */ | ||||
static device_method_t pqi_methods[] = { | static device_method_t pqi_methods[] = { | ||||
/* Device interface */ | /* Device interface */ | ||||
DEVMETHOD(device_probe, smartpqi_probe), | DEVMETHOD(device_probe, smartpqi_probe), | ||||
DEVMETHOD(device_attach, smartpqi_attach), | DEVMETHOD(device_attach, smartpqi_attach), | ||||
DEVMETHOD(device_detach, smartpqi_detach), | DEVMETHOD(device_detach, smartpqi_detach), | ||||
DEVMETHOD(device_suspend, smartpqi_suspend), | DEVMETHOD(device_suspend, smartpqi_suspend), | ||||
DEVMETHOD(device_resume, smartpqi_resume), | DEVMETHOD(device_resume, smartpqi_resume), | ||||
DEVMETHOD(device_shutdown, smartpqi_shutdown), | |||||
{ 0, 0 } | { 0, 0 } | ||||
}; | }; | ||||
static devclass_t pqi_devclass; | static devclass_t pqi_devclass; | ||||
static driver_t smartpqi_pci_driver = { | static driver_t smartpqi_pci_driver = { | ||||
"smartpqi", | "smartpqi", | ||||
pqi_methods, | pqi_methods, | ||||
sizeof(struct pqisrc_softstate) | sizeof(struct pqisrc_softstate) | ||||
}; | }; | ||||
DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, pqi_devclass, 0, 0); | DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, pqi_devclass, 0, 0); | ||||
MODULE_DEPEND(smartpqi, pci, 1, 1, 1); | MODULE_DEPEND(smartpqi, pci, 1, 1, 1); |