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sys/cam/ata/ata_pmp.c
Show First 20 Lines • Show All 438 Lines • ▼ Show 20 Lines | else | ||||
softc->state = min(softc->state, PMP_STATE_PRECONFIG); | softc->state = min(softc->state, PMP_STATE_PRECONFIG); | ||||
} | } | ||||
/* Fetch user wanted device speed. */ | /* Fetch user wanted device speed. */ | ||||
if (softc->state == PMP_STATE_RESET || | if (softc->state == PMP_STATE_RESET || | ||||
softc->state == PMP_STATE_CONNECT) { | softc->state == PMP_STATE_CONNECT) { | ||||
if (xpt_create_path(&dpath, periph, | if (xpt_create_path(&dpath, periph, | ||||
xpt_path_path_id(periph->path), | xpt_path_path_id(periph->path), | ||||
softc->pm_step, 0) == CAM_REQ_CMP) { | softc->pm_step, 0) == CAM_REQ_CMP) { | ||||
bzero(&cts, sizeof(cts)); | xpt_setup_stack_ccb( | ||||
xpt_setup_ccb(&cts.ccb_h, dpath, CAM_PRIORITY_NONE); | &cts.ccb_h, sizeof(cts), dpath, CAM_PRIORITY_NONE); | ||||
cts.ccb_h.func_code = XPT_GET_TRAN_SETTINGS; | cts.ccb_h.func_code = XPT_GET_TRAN_SETTINGS; | ||||
cts.type = CTS_TYPE_USER_SETTINGS; | cts.type = CTS_TYPE_USER_SETTINGS; | ||||
xpt_action((union ccb *)&cts); | xpt_action((union ccb *)&cts); | ||||
if (cts.xport_specific.sata.valid & CTS_SATA_VALID_REVISION) | if (cts.xport_specific.sata.valid & CTS_SATA_VALID_REVISION) | ||||
revision = cts.xport_specific.sata.revision; | revision = cts.xport_specific.sata.revision; | ||||
xpt_free_path(dpath); | xpt_free_path(dpath); | ||||
} | } | ||||
} | } | ||||
Show All 32 Lines | cam_fill_ataio(ataio, | ||||
/*data_ptr*/NULL, | /*data_ptr*/NULL, | ||||
/*dxfer_len*/0, | /*dxfer_len*/0, | ||||
pmp_default_timeout * 1000); | pmp_default_timeout * 1000); | ||||
ata_pm_write_cmd(ataio, 129, 15, softc->caps & ~0x1); | ata_pm_write_cmd(ataio, 129, 15, softc->caps & ~0x1); | ||||
break; | break; | ||||
case PMP_STATE_PRECONFIG: | case PMP_STATE_PRECONFIG: | ||||
/* Get/update host SATA capabilities. */ | /* Get/update host SATA capabilities. */ | ||||
bzero(&cts, sizeof(cts)); | xpt_setup_stack_ccb( | ||||
xpt_setup_ccb(&cts.ccb_h, periph->path, CAM_PRIORITY_NONE); | &cts.ccb_h, sizeof(cts), periph->path, CAM_PRIORITY_NONE); | ||||
cts.ccb_h.func_code = XPT_GET_TRAN_SETTINGS; | cts.ccb_h.func_code = XPT_GET_TRAN_SETTINGS; | ||||
cts.type = CTS_TYPE_CURRENT_SETTINGS; | cts.type = CTS_TYPE_CURRENT_SETTINGS; | ||||
xpt_action((union ccb *)&cts); | xpt_action((union ccb *)&cts); | ||||
if (cts.xport_specific.sata.valid & CTS_SATA_VALID_CAPS) | if (cts.xport_specific.sata.valid & CTS_SATA_VALID_CAPS) | ||||
softc->caps = cts.xport_specific.sata.caps; | softc->caps = cts.xport_specific.sata.caps; | ||||
else | else | ||||
softc->caps = 0; | softc->caps = 0; | ||||
cam_fill_ataio(ataio, | cam_fill_ataio(ataio, | ||||
▲ Show 20 Lines • Show All 243 Lines • ▼ Show 20 Lines | if (((res & 0xf0f) == 0x103 && (res & 0x0f0) != 0) || | ||||
periph->periph_name, periph->unit_number, | periph->periph_name, periph->unit_number, | ||||
softc->pm_step, res); | softc->pm_step, res); | ||||
} | } | ||||
/* Report device speed if it is online. */ | /* Report device speed if it is online. */ | ||||
if ((res & 0xf0f) == 0x103 && | if ((res & 0xf0f) == 0x103 && | ||||
xpt_create_path(&dpath, periph, | xpt_create_path(&dpath, periph, | ||||
xpt_path_path_id(periph->path), | xpt_path_path_id(periph->path), | ||||
softc->pm_step, 0) == CAM_REQ_CMP) { | softc->pm_step, 0) == CAM_REQ_CMP) { | ||||
bzero(&cts, sizeof(cts)); | xpt_setup_stack_ccb(&cts.ccb_h, sizeof(cts), | ||||
xpt_setup_ccb(&cts.ccb_h, dpath, CAM_PRIORITY_NONE); | dpath, CAM_PRIORITY_NONE); | ||||
cts.ccb_h.func_code = XPT_SET_TRAN_SETTINGS; | cts.ccb_h.func_code = XPT_SET_TRAN_SETTINGS; | ||||
cts.type = CTS_TYPE_CURRENT_SETTINGS; | cts.type = CTS_TYPE_CURRENT_SETTINGS; | ||||
cts.xport_specific.sata.revision = (res & 0x0f0) >> 4; | cts.xport_specific.sata.revision = (res & 0x0f0) >> 4; | ||||
cts.xport_specific.sata.valid = CTS_SATA_VALID_REVISION; | cts.xport_specific.sata.valid = CTS_SATA_VALID_REVISION; | ||||
cts.xport_specific.sata.caps = softc->caps & | cts.xport_specific.sata.caps = softc->caps & | ||||
(CTS_SATA_CAPS_H_PMREQ | | (CTS_SATA_CAPS_H_PMREQ | | ||||
CTS_SATA_CAPS_H_DMAAA | | CTS_SATA_CAPS_H_DMAAA | | ||||
CTS_SATA_CAPS_H_AN); | CTS_SATA_CAPS_H_AN); | ||||
▲ Show 20 Lines • Show All 96 Lines • Show Last 20 Lines |