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usr.sbin/bhyve/pci_virtio_9p.c
Show First 20 Lines • Show All 319 Lines • ▼ Show 20 Lines | pci_vt9p_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) | ||||
vi_softc_linkup(&sc->vsc_vs, &vt9p_vi_consts, sc, pi, &sc->vsc_vq); | vi_softc_linkup(&sc->vsc_vs, &vt9p_vi_consts, sc, pi, &sc->vsc_vq); | ||||
sc->vsc_vs.vs_mtx = &sc->vsc_mtx; | sc->vsc_vs.vs_mtx = &sc->vsc_mtx; | ||||
sc->vsc_vq.vq_qsize = VT9P_RINGSZ; | sc->vsc_vq.vq_qsize = VT9P_RINGSZ; | ||||
/* initialize config space */ | /* initialize config space */ | ||||
pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_9P); | pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_9P); | ||||
pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR); | pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR); | ||||
pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE); | pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE); | ||||
pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_9P); | pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_ID_9P); | ||||
pci_set_cfgdata16(pi, PCIR_SUBVEND_0, VIRTIO_VENDOR); | pci_set_cfgdata16(pi, PCIR_SUBVEND_0, VIRTIO_VENDOR); | ||||
if (vi_intr_init(&sc->vsc_vs, 1, fbsdrun_virtio_msix())) | if (vi_intr_init(&sc->vsc_vs, 1, fbsdrun_virtio_msix())) | ||||
return (1); | return (1); | ||||
vi_set_io_bar(&sc->vsc_vs, 0); | vi_set_io_bar(&sc->vsc_vs, 0); | ||||
return (0); | return (0); | ||||
} | } | ||||
struct pci_devemu pci_de_v9p = { | struct pci_devemu pci_de_v9p = { | ||||
.pe_emu = "virtio-9p", | .pe_emu = "virtio-9p", | ||||
.pe_init = pci_vt9p_init, | .pe_init = pci_vt9p_init, | ||||
.pe_barwrite = vi_pci_write, | .pe_barwrite = vi_pci_write, | ||||
.pe_barread = vi_pci_read | .pe_barread = vi_pci_read | ||||
}; | }; | ||||
PCI_EMUL_SET(pci_de_v9p); | PCI_EMUL_SET(pci_de_v9p); |